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Fix a memory access violation when attempting to parse a corrupt COFF binary with...
[deliverable/binutils-gdb.git] / bfd / coff-arm.c
1 /* BFD back-end for ARM COFF files.
2 Copyright (C) 1990-2017 Free Software Foundation, Inc.
3 Written by Cygnus Support.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include "bfd.h"
24 #include "libbfd.h"
25 #include "coff/arm.h"
26 #include "coff/internal.h"
27
28 #ifdef COFF_WITH_PE
29 #include "coff/pe.h"
30 #endif
31
32 #include "libcoff.h"
33
34 /* Macros for manipulation the bits in the flags field of the coff data
35 structure. */
36 #define APCS_26_FLAG(abfd) \
37 (coff_data (abfd)->flags & F_APCS_26)
38
39 #define APCS_FLOAT_FLAG(abfd) \
40 (coff_data (abfd)->flags & F_APCS_FLOAT)
41
42 #define PIC_FLAG(abfd) \
43 (coff_data (abfd)->flags & F_PIC)
44
45 #define APCS_SET(abfd) \
46 (coff_data (abfd)->flags & F_APCS_SET)
47
48 #define SET_APCS_FLAGS(abfd, flgs) \
49 do \
50 { \
51 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \
52 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \
53 } \
54 while (0)
55
56 #define INTERWORK_FLAG(abfd) \
57 (coff_data (abfd)->flags & F_INTERWORK)
58
59 #define INTERWORK_SET(abfd) \
60 (coff_data (abfd)->flags & F_INTERWORK_SET)
61
62 #define SET_INTERWORK_FLAG(abfd, flg) \
63 do \
64 { \
65 coff_data (abfd)->flags &= ~F_INTERWORK; \
66 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \
67 } \
68 while (0)
69
70 #ifndef NUM_ELEM
71 #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
72 #endif
73
74 typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
75 /* Some typedefs for holding instructions. */
76 typedef unsigned long int insn32;
77 typedef unsigned short int insn16;
78
79 /* The linker script knows the section names for placement.
80 The entry_names are used to do simple name mangling on the stubs.
81 Given a function name, and its type, the stub can be found. The
82 name can be changed. The only requirement is the %s be present. */
83
84 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
85 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
86
87 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
88 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
89
90 /* Used by the assembler. */
91
92 static bfd_reloc_status_type
93 coff_arm_reloc (bfd *abfd,
94 arelent *reloc_entry,
95 asymbol *symbol ATTRIBUTE_UNUSED,
96 void * data,
97 asection *input_section ATTRIBUTE_UNUSED,
98 bfd *output_bfd,
99 char **error_message ATTRIBUTE_UNUSED)
100 {
101 symvalue diff;
102
103 if (output_bfd == NULL)
104 return bfd_reloc_continue;
105
106 diff = reloc_entry->addend;
107
108 #define DOIT(x) \
109 x = ((x & ~howto->dst_mask) \
110 | (((x & howto->src_mask) + diff) & howto->dst_mask))
111
112 if (diff != 0)
113 {
114 reloc_howto_type *howto = reloc_entry->howto;
115 unsigned char *addr = (unsigned char *) data + reloc_entry->address;
116
117 if (! bfd_reloc_offset_in_range (howto, abfd, input_section,
118 reloc_entry->address
119 * bfd_octets_per_byte (abfd)))
120 return bfd_reloc_outofrange;
121
122 switch (howto->size)
123 {
124 case 0:
125 {
126 char x = bfd_get_8 (abfd, addr);
127 DOIT (x);
128 bfd_put_8 (abfd, x, addr);
129 }
130 break;
131
132 case 1:
133 {
134 short x = bfd_get_16 (abfd, addr);
135 DOIT (x);
136 bfd_put_16 (abfd, (bfd_vma) x, addr);
137 }
138 break;
139
140 case 2:
141 {
142 long x = bfd_get_32 (abfd, addr);
143 DOIT (x);
144 bfd_put_32 (abfd, (bfd_vma) x, addr);
145 }
146 break;
147
148 default:
149 abort ();
150 }
151 }
152
153 /* Now let bfd_perform_relocation finish everything up. */
154 return bfd_reloc_continue;
155 }
156
157 /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
158 in this file), then TARGET_UNDERSCORE should be defined, otherwise it
159 should not. */
160 #ifndef TARGET_UNDERSCORE
161 #define TARGET_UNDERSCORE '_'
162 #endif
163
164 #ifndef PCRELOFFSET
165 #define PCRELOFFSET TRUE
166 #endif
167
168 /* These most certainly belong somewhere else. Just had to get rid of
169 the manifest constants in the code. */
170
171 #ifdef ARM_WINCE
172
173 #define ARM_26D 0
174 #define ARM_32 1
175 #define ARM_RVA32 2
176 #define ARM_26 3
177 #define ARM_THUMB12 4
178 #define ARM_SECTION 14
179 #define ARM_SECREL 15
180
181 #else
182
183 #define ARM_8 0
184 #define ARM_16 1
185 #define ARM_32 2
186 #define ARM_26 3
187 #define ARM_DISP8 4
188 #define ARM_DISP16 5
189 #define ARM_DISP32 6
190 #define ARM_26D 7
191 /* 8 is unused. */
192 #define ARM_NEG16 9
193 #define ARM_NEG32 10
194 #define ARM_RVA32 11
195 #define ARM_THUMB9 12
196 #define ARM_THUMB12 13
197 #define ARM_THUMB23 14
198
199 #endif
200
201 static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
202 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
203 static bfd_reloc_status_type aoutarm_fix_pcrel_26
204 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
205 static bfd_reloc_status_type coff_thumb_pcrel_12
206 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
207 #ifndef ARM_WINCE
208 static bfd_reloc_status_type coff_thumb_pcrel_9
209 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
210 static bfd_reloc_status_type coff_thumb_pcrel_23
211 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
212 #endif
213
214 static reloc_howto_type aoutarm_std_reloc_howto[] =
215 {
216 #ifdef ARM_WINCE
217 HOWTO (ARM_26D,
218 2,
219 2,
220 24,
221 TRUE,
222 0,
223 complain_overflow_dont,
224 aoutarm_fix_pcrel_26_done,
225 "ARM_26D",
226 TRUE, /* partial_inplace. */
227 0x00ffffff,
228 0x0,
229 PCRELOFFSET),
230 HOWTO (ARM_32,
231 0,
232 2,
233 32,
234 FALSE,
235 0,
236 complain_overflow_bitfield,
237 coff_arm_reloc,
238 "ARM_32",
239 TRUE, /* partial_inplace. */
240 0xffffffff,
241 0xffffffff,
242 PCRELOFFSET),
243 HOWTO (ARM_RVA32,
244 0,
245 2,
246 32,
247 FALSE,
248 0,
249 complain_overflow_bitfield,
250 coff_arm_reloc,
251 "ARM_RVA32",
252 TRUE, /* partial_inplace. */
253 0xffffffff,
254 0xffffffff,
255 PCRELOFFSET),
256 HOWTO (ARM_26,
257 2,
258 2,
259 24,
260 TRUE,
261 0,
262 complain_overflow_signed,
263 aoutarm_fix_pcrel_26 ,
264 "ARM_26",
265 FALSE,
266 0x00ffffff,
267 0x00ffffff,
268 PCRELOFFSET),
269 HOWTO (ARM_THUMB12,
270 1,
271 1,
272 11,
273 TRUE,
274 0,
275 complain_overflow_signed,
276 coff_thumb_pcrel_12 ,
277 "ARM_THUMB12",
278 FALSE,
279 0x000007ff,
280 0x000007ff,
281 PCRELOFFSET),
282 EMPTY_HOWTO (-1),
283 EMPTY_HOWTO (-1),
284 EMPTY_HOWTO (-1),
285 EMPTY_HOWTO (-1),
286 EMPTY_HOWTO (-1),
287 EMPTY_HOWTO (-1),
288 EMPTY_HOWTO (-1),
289 EMPTY_HOWTO (-1),
290 EMPTY_HOWTO (-1),
291 HOWTO (ARM_SECTION,
292 0,
293 1,
294 16,
295 FALSE,
296 0,
297 complain_overflow_bitfield,
298 coff_arm_reloc,
299 "ARM_SECTION",
300 TRUE, /* partial_inplace. */
301 0x0000ffff,
302 0x0000ffff,
303 PCRELOFFSET),
304 HOWTO (ARM_SECREL,
305 0,
306 2,
307 32,
308 FALSE,
309 0,
310 complain_overflow_bitfield,
311 coff_arm_reloc,
312 "ARM_SECREL",
313 TRUE, /* partial_inplace. */
314 0xffffffff,
315 0xffffffff,
316 PCRELOFFSET),
317 #else /* not ARM_WINCE */
318 HOWTO (ARM_8,
319 0,
320 0,
321 8,
322 FALSE,
323 0,
324 complain_overflow_bitfield,
325 coff_arm_reloc,
326 "ARM_8",
327 TRUE,
328 0x000000ff,
329 0x000000ff,
330 PCRELOFFSET),
331 HOWTO (ARM_16,
332 0,
333 1,
334 16,
335 FALSE,
336 0,
337 complain_overflow_bitfield,
338 coff_arm_reloc,
339 "ARM_16",
340 TRUE,
341 0x0000ffff,
342 0x0000ffff,
343 PCRELOFFSET),
344 HOWTO (ARM_32,
345 0,
346 2,
347 32,
348 FALSE,
349 0,
350 complain_overflow_bitfield,
351 coff_arm_reloc,
352 "ARM_32",
353 TRUE,
354 0xffffffff,
355 0xffffffff,
356 PCRELOFFSET),
357 HOWTO (ARM_26,
358 2,
359 2,
360 24,
361 TRUE,
362 0,
363 complain_overflow_signed,
364 aoutarm_fix_pcrel_26 ,
365 "ARM_26",
366 FALSE,
367 0x00ffffff,
368 0x00ffffff,
369 PCRELOFFSET),
370 HOWTO (ARM_DISP8,
371 0,
372 0,
373 8,
374 TRUE,
375 0,
376 complain_overflow_signed,
377 coff_arm_reloc,
378 "ARM_DISP8",
379 TRUE,
380 0x000000ff,
381 0x000000ff,
382 TRUE),
383 HOWTO (ARM_DISP16,
384 0,
385 1,
386 16,
387 TRUE,
388 0,
389 complain_overflow_signed,
390 coff_arm_reloc,
391 "ARM_DISP16",
392 TRUE,
393 0x0000ffff,
394 0x0000ffff,
395 TRUE),
396 HOWTO (ARM_DISP32,
397 0,
398 2,
399 32,
400 TRUE,
401 0,
402 complain_overflow_signed,
403 coff_arm_reloc,
404 "ARM_DISP32",
405 TRUE,
406 0xffffffff,
407 0xffffffff,
408 TRUE),
409 HOWTO (ARM_26D,
410 2,
411 2,
412 24,
413 FALSE,
414 0,
415 complain_overflow_dont,
416 aoutarm_fix_pcrel_26_done,
417 "ARM_26D",
418 TRUE,
419 0x00ffffff,
420 0x0,
421 FALSE),
422 /* 8 is unused */
423 EMPTY_HOWTO (-1),
424 HOWTO (ARM_NEG16,
425 0,
426 -1,
427 16,
428 FALSE,
429 0,
430 complain_overflow_bitfield,
431 coff_arm_reloc,
432 "ARM_NEG16",
433 TRUE,
434 0x0000ffff,
435 0x0000ffff,
436 FALSE),
437 HOWTO (ARM_NEG32,
438 0,
439 -2,
440 32,
441 FALSE,
442 0,
443 complain_overflow_bitfield,
444 coff_arm_reloc,
445 "ARM_NEG32",
446 TRUE,
447 0xffffffff,
448 0xffffffff,
449 FALSE),
450 HOWTO (ARM_RVA32,
451 0,
452 2,
453 32,
454 FALSE,
455 0,
456 complain_overflow_bitfield,
457 coff_arm_reloc,
458 "ARM_RVA32",
459 TRUE,
460 0xffffffff,
461 0xffffffff,
462 PCRELOFFSET),
463 HOWTO (ARM_THUMB9,
464 1,
465 1,
466 8,
467 TRUE,
468 0,
469 complain_overflow_signed,
470 coff_thumb_pcrel_9 ,
471 "ARM_THUMB9",
472 FALSE,
473 0x000000ff,
474 0x000000ff,
475 PCRELOFFSET),
476 HOWTO (ARM_THUMB12,
477 1,
478 1,
479 11,
480 TRUE,
481 0,
482 complain_overflow_signed,
483 coff_thumb_pcrel_12 ,
484 "ARM_THUMB12",
485 FALSE,
486 0x000007ff,
487 0x000007ff,
488 PCRELOFFSET),
489 HOWTO (ARM_THUMB23,
490 1,
491 2,
492 22,
493 TRUE,
494 0,
495 complain_overflow_signed,
496 coff_thumb_pcrel_23 ,
497 "ARM_THUMB23",
498 FALSE,
499 0x07ff07ff,
500 0x07ff07ff,
501 PCRELOFFSET)
502 #endif /* not ARM_WINCE */
503 };
504
505 #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)
506
507 #ifdef COFF_WITH_PE
508 /* Return TRUE if this relocation should
509 appear in the output .reloc section. */
510
511 static bfd_boolean
512 in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
513 reloc_howto_type * howto)
514 {
515 return !howto->pc_relative && howto->type != ARM_RVA32;
516 }
517 #endif
518
519 #define RTYPE2HOWTO(cache_ptr, dst) \
520 (cache_ptr)->howto = \
521 (dst)->r_type < NUM_RELOCS \
522 ? aoutarm_std_reloc_howto + (dst)->r_type \
523 : NULL
524
525 #define coff_rtype_to_howto coff_arm_rtype_to_howto
526
527 static reloc_howto_type *
528 coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
529 asection *sec,
530 struct internal_reloc *rel,
531 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
532 struct internal_syment *sym ATTRIBUTE_UNUSED,
533 bfd_vma *addendp)
534 {
535 reloc_howto_type * howto;
536
537 if (rel->r_type >= NUM_RELOCS)
538 return NULL;
539
540 howto = aoutarm_std_reloc_howto + rel->r_type;
541
542 if (rel->r_type == ARM_RVA32)
543 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
544
545 #if defined COFF_WITH_PE && defined ARM_WINCE
546 if (rel->r_type == ARM_SECREL)
547 {
548 bfd_vma osect_vma;
549
550 if (h && (h->type == bfd_link_hash_defined
551 || h->type == bfd_link_hash_defweak))
552 osect_vma = h->root.u.def.section->output_section->vma;
553 else
554 {
555 int i;
556
557 /* Sigh, the only way to get the section to offset against
558 is to find it the hard way. */
559
560 for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
561 sec = sec->next;
562
563 osect_vma = sec->output_section->vma;
564 }
565
566 *addendp -= osect_vma;
567 }
568 #endif
569
570 return howto;
571 }
572
573 /* Used by the assembler. */
574
575 static bfd_reloc_status_type
576 aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
577 arelent *reloc_entry ATTRIBUTE_UNUSED,
578 asymbol *symbol ATTRIBUTE_UNUSED,
579 void * data ATTRIBUTE_UNUSED,
580 asection *input_section ATTRIBUTE_UNUSED,
581 bfd *output_bfd ATTRIBUTE_UNUSED,
582 char **error_message ATTRIBUTE_UNUSED)
583 {
584 /* This is dead simple at present. */
585 return bfd_reloc_ok;
586 }
587
588 /* Used by the assembler. */
589
590 static bfd_reloc_status_type
591 aoutarm_fix_pcrel_26 (bfd *abfd,
592 arelent *reloc_entry,
593 asymbol *symbol,
594 void * data,
595 asection *input_section,
596 bfd *output_bfd,
597 char **error_message ATTRIBUTE_UNUSED)
598 {
599 bfd_vma relocation;
600 bfd_size_type addr = reloc_entry->address;
601 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
602 bfd_reloc_status_type flag = bfd_reloc_ok;
603
604 /* If this is an undefined symbol, return error. */
605 if (bfd_is_und_section (symbol->section)
606 && (symbol->flags & BSF_WEAK) == 0)
607 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
608
609 /* If the sections are different, and we are doing a partial relocation,
610 just ignore it for now. */
611 if (symbol->section->name != input_section->name
612 && output_bfd != (bfd *)NULL)
613 return bfd_reloc_continue;
614
615 relocation = (target & 0x00ffffff) << 2;
616 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
617 relocation += symbol->value;
618 relocation += symbol->section->output_section->vma;
619 relocation += symbol->section->output_offset;
620 relocation += reloc_entry->addend;
621 relocation -= input_section->output_section->vma;
622 relocation -= input_section->output_offset;
623 relocation -= addr;
624
625 if (relocation & 3)
626 return bfd_reloc_overflow;
627
628 /* Check for overflow. */
629 if (relocation & 0x02000000)
630 {
631 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
632 flag = bfd_reloc_overflow;
633 }
634 else if (relocation & ~(bfd_vma) 0x03ffffff)
635 flag = bfd_reloc_overflow;
636
637 target &= ~0x00ffffff;
638 target |= (relocation >> 2) & 0x00ffffff;
639 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
640
641 /* Now the ARM magic... Change the reloc type so that it is marked as done.
642 Strictly this is only necessary if we are doing a partial relocation. */
643 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
644
645 return flag;
646 }
647
648 static bfd_reloc_status_type
649 coff_thumb_pcrel_common (bfd *abfd,
650 arelent *reloc_entry,
651 asymbol *symbol,
652 void * data,
653 asection *input_section,
654 bfd *output_bfd,
655 char **error_message ATTRIBUTE_UNUSED,
656 thumb_pcrel_branchtype btype)
657 {
658 bfd_vma relocation = 0;
659 bfd_size_type addr = reloc_entry->address;
660 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
661 bfd_reloc_status_type flag = bfd_reloc_ok;
662 bfd_vma dstmsk;
663 bfd_vma offmsk;
664 bfd_vma signbit;
665
666 /* NOTE: This routine is currently used by GAS, but not by the link
667 phase. */
668 switch (btype)
669 {
670 case b9:
671 dstmsk = 0x000000ff;
672 offmsk = 0x000001fe;
673 signbit = 0x00000100;
674 break;
675
676 case b12:
677 dstmsk = 0x000007ff;
678 offmsk = 0x00000ffe;
679 signbit = 0x00000800;
680 break;
681
682 case b23:
683 dstmsk = 0x07ff07ff;
684 offmsk = 0x007fffff;
685 signbit = 0x00400000;
686 break;
687
688 default:
689 abort ();
690 }
691
692 /* If this is an undefined symbol, return error. */
693 if (bfd_is_und_section (symbol->section)
694 && (symbol->flags & BSF_WEAK) == 0)
695 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
696
697 /* If the sections are different, and we are doing a partial relocation,
698 just ignore it for now. */
699 if (symbol->section->name != input_section->name
700 && output_bfd != (bfd *)NULL)
701 return bfd_reloc_continue;
702
703 switch (btype)
704 {
705 case b9:
706 case b12:
707 relocation = ((target & dstmsk) << 1);
708 break;
709
710 case b23:
711 if (bfd_big_endian (abfd))
712 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
713 else
714 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
715 break;
716
717 default:
718 abort ();
719 }
720
721 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */
722 relocation += symbol->value;
723 relocation += symbol->section->output_section->vma;
724 relocation += symbol->section->output_offset;
725 relocation += reloc_entry->addend;
726 relocation -= input_section->output_section->vma;
727 relocation -= input_section->output_offset;
728 relocation -= addr;
729
730 if (relocation & 1)
731 return bfd_reloc_overflow;
732
733 /* Check for overflow. */
734 if (relocation & signbit)
735 {
736 if ((relocation & ~offmsk) != ~offmsk)
737 flag = bfd_reloc_overflow;
738 }
739 else if (relocation & ~offmsk)
740 flag = bfd_reloc_overflow;
741
742 target &= ~dstmsk;
743 switch (btype)
744 {
745 case b9:
746 case b12:
747 target |= (relocation >> 1);
748 break;
749
750 case b23:
751 if (bfd_big_endian (abfd))
752 target |= (((relocation & 0xfff) >> 1)
753 | ((relocation << 4) & 0x07ff0000));
754 else
755 target |= (((relocation & 0xffe) << 15)
756 | ((relocation >> 12) & 0x7ff));
757 break;
758
759 default:
760 abort ();
761 }
762
763 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
764
765 /* Now the ARM magic... Change the reloc type so that it is marked as done.
766 Strictly this is only necessary if we are doing a partial relocation. */
767 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
768
769 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */
770 return flag;
771 }
772
773 #ifndef ARM_WINCE
774 static bfd_reloc_status_type
775 coff_thumb_pcrel_23 (bfd *abfd,
776 arelent *reloc_entry,
777 asymbol *symbol,
778 void * data,
779 asection *input_section,
780 bfd *output_bfd,
781 char **error_message)
782 {
783 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
784 input_section, output_bfd, error_message,
785 b23);
786 }
787
788 static bfd_reloc_status_type
789 coff_thumb_pcrel_9 (bfd *abfd,
790 arelent *reloc_entry,
791 asymbol *symbol,
792 void * data,
793 asection *input_section,
794 bfd *output_bfd,
795 char **error_message)
796 {
797 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
798 input_section, output_bfd, error_message,
799 b9);
800 }
801 #endif /* not ARM_WINCE */
802
803 static bfd_reloc_status_type
804 coff_thumb_pcrel_12 (bfd *abfd,
805 arelent *reloc_entry,
806 asymbol *symbol,
807 void * data,
808 asection *input_section,
809 bfd *output_bfd,
810 char **error_message)
811 {
812 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
813 input_section, output_bfd, error_message,
814 b12);
815 }
816
817 static const struct reloc_howto_struct *
818 coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
819 {
820 #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j
821
822 if (code == BFD_RELOC_CTOR)
823 switch (bfd_arch_bits_per_address (abfd))
824 {
825 case 32:
826 code = BFD_RELOC_32;
827 break;
828 default:
829 return NULL;
830 }
831
832 switch (code)
833 {
834 #ifdef ARM_WINCE
835 ASTD (BFD_RELOC_32, ARM_32);
836 ASTD (BFD_RELOC_RVA, ARM_RVA32);
837 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
838 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
839 ASTD (BFD_RELOC_32_SECREL, ARM_SECREL);
840 #else
841 ASTD (BFD_RELOC_8, ARM_8);
842 ASTD (BFD_RELOC_16, ARM_16);
843 ASTD (BFD_RELOC_32, ARM_32);
844 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
845 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26);
846 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
847 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
848 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
849 ASTD (BFD_RELOC_RVA, ARM_RVA32);
850 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
851 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
852 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
853 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23);
854 #endif
855 default: return NULL;
856 }
857 }
858
859 static reloc_howto_type *
860 coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
861 const char *r_name)
862 {
863 unsigned int i;
864
865 for (i = 0;
866 i < (sizeof (aoutarm_std_reloc_howto)
867 / sizeof (aoutarm_std_reloc_howto[0]));
868 i++)
869 if (aoutarm_std_reloc_howto[i].name != NULL
870 && strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0)
871 return &aoutarm_std_reloc_howto[i];
872
873 return NULL;
874 }
875
876 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
877 #define COFF_PAGE_SIZE 0x1000
878
879 /* Turn a howto into a reloc nunmber. */
880 #define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
881 #define BADMAG(x) ARMBADMAG(x)
882 #define ARM 1 /* Customize coffcode.h. */
883
884 #ifndef ARM_WINCE
885 /* Make sure that the 'r_offset' field is copied properly
886 so that identical binaries will compare the same. */
887 #define SWAP_IN_RELOC_OFFSET H_GET_32
888 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
889 #endif
890
891 /* Extend the coff_link_hash_table structure with a few ARM specific fields.
892 This allows us to store global data here without actually creating any
893 global variables, which is a no-no in the BFD world. */
894 struct coff_arm_link_hash_table
895 {
896 /* The original coff_link_hash_table structure. MUST be first field. */
897 struct coff_link_hash_table root;
898
899 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
900 bfd_size_type thumb_glue_size;
901
902 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
903 bfd_size_type arm_glue_size;
904
905 /* An arbitrary input BFD chosen to hold the glue sections. */
906 bfd * bfd_of_glue_owner;
907
908 /* Support interworking with old, non-interworking aware ARM code. */
909 int support_old_code;
910 };
911
912 /* Get the ARM coff linker hash table from a link_info structure. */
913 #define coff_arm_hash_table(info) \
914 ((struct coff_arm_link_hash_table *) ((info)->hash))
915
916 /* Create an ARM coff linker hash table. */
917
918 static struct bfd_link_hash_table *
919 coff_arm_link_hash_table_create (bfd * abfd)
920 {
921 struct coff_arm_link_hash_table * ret;
922 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
923
924 ret = bfd_zmalloc (amt);
925 if (ret == NULL)
926 return NULL;
927
928 if (!_bfd_coff_link_hash_table_init (&ret->root,
929 abfd,
930 _bfd_coff_link_hash_newfunc,
931 sizeof (struct coff_link_hash_entry)))
932 {
933 free (ret);
934 return NULL;
935 }
936
937 return & ret->root.root;
938 }
939
940 static bfd_boolean
941 arm_emit_base_file_entry (struct bfd_link_info *info,
942 bfd *output_bfd,
943 asection *input_section,
944 bfd_vma reloc_offset)
945 {
946 bfd_vma addr = (reloc_offset
947 - input_section->vma
948 + input_section->output_offset
949 + input_section->output_section->vma);
950
951 if (coff_data (output_bfd)->pe)
952 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
953 if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1)
954 return TRUE;
955
956 bfd_set_error (bfd_error_system_call);
957 return FALSE;
958 }
959 \f
960 #ifndef ARM_WINCE
961 /* The thumb form of a long branch is a bit finicky, because the offset
962 encoding is split over two fields, each in it's own instruction. They
963 can occur in any order. So given a thumb form of long branch, and an
964 offset, insert the offset into the thumb branch and return finished
965 instruction.
966
967 It takes two thumb instructions to encode the target address. Each has
968 11 bits to invest. The upper 11 bits are stored in one (identified by
969 H-0.. see below), the lower 11 bits are stored in the other (identified
970 by H-1).
971
972 Combine together and shifted left by 1 (it's a half word address) and
973 there you have it.
974
975 Op: 1111 = F,
976 H-0, upper address-0 = 000
977 Op: 1111 = F,
978 H-1, lower address-0 = 800
979
980 They can be ordered either way, but the arm tools I've seen always put
981 the lower one first. It probably doesn't matter. krk@cygnus.com
982
983 XXX: Actually the order does matter. The second instruction (H-1)
984 moves the computed address into the PC, so it must be the second one
985 in the sequence. The problem, however is that whilst little endian code
986 stores the instructions in HI then LOW order, big endian code does the
987 reverse. nickc@cygnus.com. */
988
989 #define LOW_HI_ORDER 0xF800F000
990 #define HI_LOW_ORDER 0xF000F800
991
992 static insn32
993 insert_thumb_branch (insn32 br_insn, int rel_off)
994 {
995 unsigned int low_bits;
996 unsigned int high_bits;
997
998 BFD_ASSERT ((rel_off & 1) != 1);
999
1000 rel_off >>= 1; /* Half word aligned address. */
1001 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
1002 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
1003
1004 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
1005 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
1006 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
1007 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
1008 else
1009 /* FIXME: the BFD library should never abort except for internal errors
1010 - it should return an error status. */
1011 abort (); /* Error - not a valid branch instruction form. */
1012
1013 return br_insn;
1014 }
1015
1016 \f
1017 static struct coff_link_hash_entry *
1018 find_thumb_glue (struct bfd_link_info *info,
1019 const char *name,
1020 bfd *input_bfd)
1021 {
1022 char *tmp_name;
1023 struct coff_link_hash_entry *myh;
1024 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1025
1026 tmp_name = bfd_malloc (amt);
1027
1028 BFD_ASSERT (tmp_name);
1029
1030 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1031
1032 myh = coff_link_hash_lookup
1033 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1034
1035 if (myh == NULL)
1036 /* xgettext:c-format */
1037 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"),
1038 input_bfd, tmp_name, name);
1039
1040 free (tmp_name);
1041
1042 return myh;
1043 }
1044 #endif /* not ARM_WINCE */
1045
1046 static struct coff_link_hash_entry *
1047 find_arm_glue (struct bfd_link_info *info,
1048 const char *name,
1049 bfd *input_bfd)
1050 {
1051 char *tmp_name;
1052 struct coff_link_hash_entry * myh;
1053 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1054
1055 tmp_name = bfd_malloc (amt);
1056
1057 BFD_ASSERT (tmp_name);
1058
1059 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1060
1061 myh = coff_link_hash_lookup
1062 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1063
1064 if (myh == NULL)
1065 /* xgettext:c-format */
1066 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"),
1067 input_bfd, tmp_name, name);
1068
1069 free (tmp_name);
1070
1071 return myh;
1072 }
1073
1074 /*
1075 ARM->Thumb glue:
1076
1077 .arm
1078 __func_from_arm:
1079 ldr r12, __func_addr
1080 bx r12
1081 __func_addr:
1082 .word func @ behave as if you saw a ARM_32 reloc
1083 */
1084
1085 #define ARM2THUMB_GLUE_SIZE 12
1086 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1087 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1088 static const insn32 a2t3_func_addr_insn = 0x00000001;
1089
1090 /*
1091 Thumb->ARM: Thumb->(non-interworking aware) ARM
1092
1093 .thumb .thumb
1094 .align 2 .align 2
1095 __func_from_thumb: __func_from_thumb:
1096 bx pc push {r6, lr}
1097 nop ldr r6, __func_addr
1098 .arm mov lr, pc
1099 __func_change_to_arm: bx r6
1100 b func .arm
1101 __func_back_to_thumb:
1102 ldmia r13! {r6, lr}
1103 bx lr
1104 __func_addr:
1105 .word func
1106 */
1107
1108 #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8)
1109 #ifndef ARM_WINCE
1110 static const insn16 t2a1_bx_pc_insn = 0x4778;
1111 static const insn16 t2a2_noop_insn = 0x46c0;
1112 static const insn32 t2a3_b_insn = 0xea000000;
1113
1114 static const insn16 t2a1_push_insn = 0xb540;
1115 static const insn16 t2a2_ldr_insn = 0x4e03;
1116 static const insn16 t2a3_mov_insn = 0x46fe;
1117 static const insn16 t2a4_bx_insn = 0x4730;
1118 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1119 static const insn32 t2a6_bx_insn = 0xe12fff1e;
1120 #endif
1121
1122 /* TODO:
1123 We should really create new local (static) symbols in destination
1124 object for each stub we create. We should also create local
1125 (static) symbols within the stubs when switching between ARM and
1126 Thumb code. This will ensure that the debugger and disassembler
1127 can present a better view of stubs.
1128
1129 We can treat stubs like literal sections, and for the THUMB9 ones
1130 (short addressing range) we should be able to insert the stubs
1131 between sections. i.e. the simplest approach (since relocations
1132 are done on a section basis) is to dump the stubs at the end of
1133 processing a section. That way we can always try and minimise the
1134 offset to and from a stub. However, this does not map well onto
1135 the way that the linker/BFD does its work: mapping all input
1136 sections to output sections via the linker script before doing
1137 all the processing.
1138
1139 Unfortunately it may be easier to just to disallow short range
1140 Thumb->ARM stubs (i.e. no conditional inter-working branches,
1141 only branch-and-link (BL) calls. This will simplify the processing
1142 since we can then put all of the stubs into their own section.
1143
1144 TODO:
1145 On a different subject, rather than complaining when a
1146 branch cannot fit in the number of bits available for the
1147 instruction we should generate a trampoline stub (needed to
1148 address the complete 32bit address space). */
1149
1150 /* The standard COFF backend linker does not cope with the special
1151 Thumb BRANCH23 relocation. The alternative would be to split the
1152 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
1153 bit simpler simply providing our own relocation driver. */
1154
1155 /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
1156 This code is a very slightly modified copy of
1157 _bfd_coff_generic_relocate_section. It would be a much more
1158 maintainable solution to have a MACRO that could be expanded within
1159 _bfd_coff_generic_relocate_section that would only be provided for
1160 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that
1161 is different from the original. */
1162
1163 static bfd_boolean
1164 coff_arm_relocate_section (bfd *output_bfd,
1165 struct bfd_link_info *info,
1166 bfd *input_bfd,
1167 asection *input_section,
1168 bfd_byte *contents,
1169 struct internal_reloc *relocs,
1170 struct internal_syment *syms,
1171 asection **sections)
1172 {
1173 struct internal_reloc * rel;
1174 struct internal_reloc * relend;
1175 #ifndef ARM_WINCE
1176 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section);
1177 #endif
1178
1179 rel = relocs;
1180 relend = rel + input_section->reloc_count;
1181
1182 for (; rel < relend; rel++)
1183 {
1184 int done = 0;
1185 long symndx;
1186 struct coff_link_hash_entry * h;
1187 struct internal_syment * sym;
1188 bfd_vma addend;
1189 bfd_vma val;
1190 reloc_howto_type * howto;
1191 bfd_reloc_status_type rstat;
1192 bfd_vma h_val;
1193
1194 symndx = rel->r_symndx;
1195
1196 if (symndx == -1)
1197 {
1198 h = NULL;
1199 sym = NULL;
1200 }
1201 else
1202 {
1203 h = obj_coff_sym_hashes (input_bfd)[symndx];
1204 sym = syms + symndx;
1205 }
1206
1207 /* COFF treats common symbols in one of two ways. Either the
1208 size of the symbol is included in the section contents, or it
1209 is not. We assume that the size is not included, and force
1210 the rtype_to_howto function to adjust the addend as needed. */
1211
1212 if (sym != NULL && sym->n_scnum != 0)
1213 addend = - sym->n_value;
1214 else
1215 addend = 0;
1216
1217 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h,
1218 sym, &addend);
1219 if (howto == NULL)
1220 return FALSE;
1221
1222 /* The relocation_section function will skip pcrel_offset relocs
1223 when doing a relocatable link. However, we want to convert
1224 ARM_26 to ARM_26D relocs if possible. We return a fake howto in
1225 this case without pcrel_offset set, and adjust the addend to
1226 compensate. 'partial_inplace' is also set, since we want 'done'
1227 relocations to be reflected in section's data. */
1228 if (rel->r_type == ARM_26
1229 && h != NULL
1230 && bfd_link_relocatable (info)
1231 && (h->root.type == bfd_link_hash_defined
1232 || h->root.type == bfd_link_hash_defweak)
1233 && (h->root.u.def.section->output_section
1234 == input_section->output_section))
1235 {
1236 static reloc_howto_type fake_arm26_reloc =
1237 HOWTO (ARM_26,
1238 2,
1239 2,
1240 24,
1241 TRUE,
1242 0,
1243 complain_overflow_signed,
1244 aoutarm_fix_pcrel_26 ,
1245 "ARM_26",
1246 TRUE,
1247 0x00ffffff,
1248 0x00ffffff,
1249 FALSE);
1250
1251 addend -= rel->r_vaddr - input_section->vma;
1252 #ifdef ARM_WINCE
1253 /* FIXME: I don't know why, but the hack is necessary for correct
1254 generation of bl's instruction offset. */
1255 addend -= 8;
1256 #endif
1257 howto = & fake_arm26_reloc;
1258 }
1259
1260 #ifdef ARM_WINCE
1261 /* MS ARM-CE makes the reloc relative to the opcode's pc, not
1262 the next opcode's pc, so is off by one. */
1263 if (howto->pc_relative && !bfd_link_relocatable (info))
1264 addend -= 8;
1265 #endif
1266
1267 /* If we are doing a relocatable link, then we can just ignore
1268 a PC relative reloc that is pcrel_offset. It will already
1269 have the correct value. If this is not a relocatable link,
1270 then we should ignore the symbol value. */
1271 if (howto->pc_relative && howto->pcrel_offset)
1272 {
1273 if (bfd_link_relocatable (info))
1274 continue;
1275 /* FIXME - it is not clear which targets need this next test
1276 and which do not. It is known that it is needed for the
1277 VxWorks and EPOC-PE targets, but it is also known that it
1278 was suppressed for other ARM targets. This ought to be
1279 sorted out one day. */
1280 #ifdef ARM_COFF_BUGFIX
1281 /* We must not ignore the symbol value. If the symbol is
1282 within the same section, the relocation should have already
1283 been fixed, but if it is not, we'll be handed a reloc into
1284 the beginning of the symbol's section, so we must not cancel
1285 out the symbol's value, otherwise we'll be adding it in
1286 twice. */
1287 if (sym != NULL && sym->n_scnum != 0)
1288 addend += sym->n_value;
1289 #endif
1290 }
1291
1292 val = 0;
1293
1294 if (h == NULL)
1295 {
1296 asection *sec;
1297
1298 if (symndx == -1)
1299 {
1300 sec = bfd_abs_section_ptr;
1301 val = 0;
1302 }
1303 else
1304 {
1305 sec = sections[symndx];
1306 val = (sec->output_section->vma
1307 + sec->output_offset
1308 + sym->n_value
1309 - sec->vma);
1310 }
1311 }
1312 else
1313 {
1314 /* We don't output the stubs if we are generating a
1315 relocatable output file, since we may as well leave the
1316 stub generation to the final linker pass. If we fail to
1317 verify that the name is defined, we'll try to build stubs
1318 for an undefined name... */
1319 if (! bfd_link_relocatable (info)
1320 && ( h->root.type == bfd_link_hash_defined
1321 || h->root.type == bfd_link_hash_defweak))
1322 {
1323 asection * h_sec = h->root.u.def.section;
1324 const char * name = h->root.root.string;
1325
1326 /* h locates the symbol referenced in the reloc. */
1327 h_val = (h->root.u.def.value
1328 + h_sec->output_section->vma
1329 + h_sec->output_offset);
1330
1331 if (howto->type == ARM_26)
1332 {
1333 if ( h->symbol_class == C_THUMBSTATFUNC
1334 || h->symbol_class == C_THUMBEXTFUNC)
1335 {
1336 /* Arm code calling a Thumb function. */
1337 unsigned long int tmp;
1338 bfd_vma my_offset;
1339 asection * s;
1340 long int ret_offset;
1341 struct coff_link_hash_entry * myh;
1342 struct coff_arm_link_hash_table * globals;
1343
1344 myh = find_arm_glue (info, name, input_bfd);
1345 if (myh == NULL)
1346 return FALSE;
1347
1348 globals = coff_arm_hash_table (info);
1349
1350 BFD_ASSERT (globals != NULL);
1351 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1352
1353 my_offset = myh->root.u.def.value;
1354
1355 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1356 ARM2THUMB_GLUE_SECTION_NAME);
1357 BFD_ASSERT (s != NULL);
1358 BFD_ASSERT (s->contents != NULL);
1359 BFD_ASSERT (s->output_section != NULL);
1360
1361 if ((my_offset & 0x01) == 0x01)
1362 {
1363 if (h_sec->owner != NULL
1364 && INTERWORK_SET (h_sec->owner)
1365 && ! INTERWORK_FLAG (h_sec->owner))
1366 _bfd_error_handler
1367 /* xgettext:c-format */
1368 (_("%B(%s): warning: interworking not enabled.\n"
1369 " first occurrence: %B: arm call to thumb"),
1370 h_sec->owner, name, input_bfd);
1371
1372 --my_offset;
1373 myh->root.u.def.value = my_offset;
1374
1375 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn,
1376 s->contents + my_offset);
1377
1378 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn,
1379 s->contents + my_offset + 4);
1380
1381 /* It's a thumb address. Add the low order bit. */
1382 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn,
1383 s->contents + my_offset + 8);
1384
1385 if (info->base_file
1386 && !arm_emit_base_file_entry (info, output_bfd,
1387 s, my_offset + 8))
1388 return FALSE;
1389 }
1390
1391 BFD_ASSERT (my_offset <= globals->arm_glue_size);
1392
1393 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1394 - input_section->vma);
1395
1396 tmp = tmp & 0xFF000000;
1397
1398 /* Somehow these are both 4 too far, so subtract 8. */
1399 ret_offset =
1400 s->output_offset
1401 + my_offset
1402 + s->output_section->vma
1403 - (input_section->output_offset
1404 + input_section->output_section->vma
1405 + rel->r_vaddr)
1406 - 8;
1407
1408 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
1409
1410 bfd_put_32 (output_bfd, (bfd_vma) tmp,
1411 contents + rel->r_vaddr - input_section->vma);
1412 done = 1;
1413 }
1414 }
1415
1416 #ifndef ARM_WINCE
1417 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */
1418 else if (howto->type == ARM_THUMB23)
1419 {
1420 if ( h->symbol_class == C_EXT
1421 || h->symbol_class == C_STAT
1422 || h->symbol_class == C_LABEL)
1423 {
1424 /* Thumb code calling an ARM function. */
1425 asection * s = 0;
1426 bfd_vma my_offset;
1427 unsigned long int tmp;
1428 long int ret_offset;
1429 struct coff_link_hash_entry * myh;
1430 struct coff_arm_link_hash_table * globals;
1431
1432 myh = find_thumb_glue (info, name, input_bfd);
1433 if (myh == NULL)
1434 return FALSE;
1435
1436 globals = coff_arm_hash_table (info);
1437
1438 BFD_ASSERT (globals != NULL);
1439 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1440
1441 my_offset = myh->root.u.def.value;
1442
1443 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1444 THUMB2ARM_GLUE_SECTION_NAME);
1445
1446 BFD_ASSERT (s != NULL);
1447 BFD_ASSERT (s->contents != NULL);
1448 BFD_ASSERT (s->output_section != NULL);
1449
1450 if ((my_offset & 0x01) == 0x01)
1451 {
1452 if (h_sec->owner != NULL
1453 && INTERWORK_SET (h_sec->owner)
1454 && ! INTERWORK_FLAG (h_sec->owner)
1455 && ! globals->support_old_code)
1456 _bfd_error_handler
1457 /* xgettext:c-format */
1458 (_("%B(%s): warning: interworking not enabled.\n"
1459 " first occurrence: %B: thumb call to arm\n"
1460 " consider relinking with --support-old-code enabled"),
1461 h_sec->owner, name, input_bfd);
1462
1463 -- my_offset;
1464 myh->root.u.def.value = my_offset;
1465
1466 if (globals->support_old_code)
1467 {
1468 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn,
1469 s->contents + my_offset);
1470
1471 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn,
1472 s->contents + my_offset + 2);
1473
1474 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn,
1475 s->contents + my_offset + 4);
1476
1477 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn,
1478 s->contents + my_offset + 6);
1479
1480 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn,
1481 s->contents + my_offset + 8);
1482
1483 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn,
1484 s->contents + my_offset + 12);
1485
1486 /* Store the address of the function in the last word of the stub. */
1487 bfd_put_32 (output_bfd, h_val,
1488 s->contents + my_offset + 16);
1489
1490 if (info->base_file
1491 && !arm_emit_base_file_entry (info,
1492 output_bfd, s,
1493 my_offset + 16))
1494 return FALSE;
1495 }
1496 else
1497 {
1498 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn,
1499 s->contents + my_offset);
1500
1501 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn,
1502 s->contents + my_offset + 2);
1503
1504 ret_offset =
1505 /* Address of destination of the stub. */
1506 ((bfd_signed_vma) h_val)
1507 - ((bfd_signed_vma)
1508 /* Offset from the start of the current section to the start of the stubs. */
1509 (s->output_offset
1510 /* Offset of the start of this stub from the start of the stubs. */
1511 + my_offset
1512 /* Address of the start of the current section. */
1513 + s->output_section->vma)
1514 /* The branch instruction is 4 bytes into the stub. */
1515 + 4
1516 /* ARM branches work from the pc of the instruction + 8. */
1517 + 8);
1518
1519 bfd_put_32 (output_bfd,
1520 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
1521 s->contents + my_offset + 4);
1522
1523 }
1524 }
1525
1526 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
1527
1528 /* Now go back and fix up the original BL insn to point
1529 to here. */
1530 ret_offset =
1531 s->output_offset
1532 + my_offset
1533 - (input_section->output_offset
1534 + rel->r_vaddr)
1535 -4;
1536
1537 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1538 - input_section->vma);
1539
1540 bfd_put_32 (output_bfd,
1541 (bfd_vma) insert_thumb_branch (tmp,
1542 ret_offset),
1543 contents + rel->r_vaddr - input_section->vma);
1544
1545 done = 1;
1546 }
1547 }
1548 #endif
1549 }
1550
1551 /* If the relocation type and destination symbol does not
1552 fall into one of the above categories, then we can just
1553 perform a direct link. */
1554
1555 if (done)
1556 rstat = bfd_reloc_ok;
1557 else
1558 if ( h->root.type == bfd_link_hash_defined
1559 || h->root.type == bfd_link_hash_defweak)
1560 {
1561 asection *sec;
1562
1563 sec = h->root.u.def.section;
1564 val = (h->root.u.def.value
1565 + sec->output_section->vma
1566 + sec->output_offset);
1567 }
1568
1569 else if (! bfd_link_relocatable (info))
1570 (*info->callbacks->undefined_symbol)
1571 (info, h->root.root.string, input_bfd, input_section,
1572 rel->r_vaddr - input_section->vma, TRUE);
1573 }
1574
1575 /* Emit a reloc if the backend thinks it needs it. */
1576 if (info->base_file
1577 && sym
1578 && pe_data(output_bfd)->in_reloc_p(output_bfd, howto)
1579 && !arm_emit_base_file_entry (info, output_bfd, input_section,
1580 rel->r_vaddr))
1581 return FALSE;
1582
1583 if (done)
1584 rstat = bfd_reloc_ok;
1585 #ifndef ARM_WINCE
1586 /* Only perform this fix during the final link, not a relocatable link. */
1587 else if (! bfd_link_relocatable (info)
1588 && howto->type == ARM_THUMB23)
1589 {
1590 /* This is pretty much a copy of what the default
1591 _bfd_final_link_relocate and _bfd_relocate_contents
1592 routines do to perform a relocation, with special
1593 processing for the split addressing of the Thumb BL
1594 instruction. Again, it would probably be simpler adding a
1595 ThumbBRANCH23 specific macro expansion into the default
1596 code. */
1597
1598 bfd_vma address = rel->r_vaddr - input_section->vma;
1599
1600 if (address > high_address)
1601 rstat = bfd_reloc_outofrange;
1602 else
1603 {
1604 bfd_vma relocation = val + addend;
1605 int size = bfd_get_reloc_size (howto);
1606 bfd_boolean overflow = FALSE;
1607 bfd_byte *location = contents + address;
1608 bfd_vma x = bfd_get_32 (input_bfd, location);
1609 bfd_vma src_mask = 0x007FFFFE;
1610 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
1611 bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
1612 bfd_vma check;
1613 bfd_signed_vma signed_check;
1614 bfd_vma add;
1615 bfd_signed_vma signed_add;
1616
1617 BFD_ASSERT (size == 4);
1618
1619 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */
1620 relocation -= (input_section->output_section->vma
1621 + input_section->output_offset);
1622
1623 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */
1624 relocation -= address;
1625
1626 /* No need to negate the relocation with BRANCH23. */
1627 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */
1628 /* howto->rightshift == 1 */
1629
1630 /* Drop unwanted bits from the value we are relocating to. */
1631 check = relocation >> howto->rightshift;
1632
1633 /* If this is a signed value, the rightshift just dropped
1634 leading 1 bits (assuming twos complement). */
1635 if ((bfd_signed_vma) relocation >= 0)
1636 signed_check = check;
1637 else
1638 signed_check = (check
1639 | ((bfd_vma) - 1
1640 & ~((bfd_vma) - 1 >> howto->rightshift)));
1641
1642 /* Get the value from the object file. */
1643 if (bfd_big_endian (input_bfd))
1644 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
1645 else
1646 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));
1647
1648 /* Get the value from the object file with an appropriate sign.
1649 The expression involving howto->src_mask isolates the upper
1650 bit of src_mask. If that bit is set in the value we are
1651 adding, it is negative, and we subtract out that number times
1652 two. If src_mask includes the highest possible bit, then we
1653 can not get the upper bit, but that does not matter since
1654 signed_add needs no adjustment to become negative in that
1655 case. */
1656 signed_add = add;
1657
1658 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
1659 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;
1660
1661 /* howto->bitpos == 0 */
1662 /* Add the value from the object file, shifted so that it is a
1663 straight number. */
1664 signed_check += signed_add;
1665 relocation += signed_add;
1666
1667 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);
1668
1669 /* Assumes two's complement. */
1670 if ( signed_check > reloc_signed_max
1671 || signed_check < reloc_signed_min)
1672 overflow = TRUE;
1673
1674 /* Put the relocation into the correct bits.
1675 For a BLX instruction, make sure that the relocation is rounded up
1676 to a word boundary. This follows the semantics of the instruction
1677 which specifies that bit 1 of the target address will come from bit
1678 1 of the base address. */
1679 if (bfd_big_endian (input_bfd))
1680 {
1681 if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
1682 relocation += 2;
1683 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
1684 }
1685 else
1686 {
1687 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
1688 relocation += 2;
1689 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
1690 }
1691
1692 /* Add the relocation to the correct bits of X. */
1693 x = ((x & ~howto->dst_mask) | relocation);
1694
1695 /* Put the relocated value back in the object file. */
1696 bfd_put_32 (input_bfd, x, location);
1697
1698 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
1699 }
1700 }
1701 #endif
1702 else
1703 if (bfd_link_relocatable (info) && ! howto->partial_inplace)
1704 rstat = bfd_reloc_ok;
1705 else
1706 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
1707 contents,
1708 rel->r_vaddr - input_section->vma,
1709 val, addend);
1710 /* Only perform this fix during the final link, not a relocatable link. */
1711 if (! bfd_link_relocatable (info)
1712 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32))
1713 {
1714 /* Determine if we need to set the bottom bit of a relocated address
1715 because the address is the address of a Thumb code symbol. */
1716 int patchit = FALSE;
1717
1718 if (h != NULL
1719 && ( h->symbol_class == C_THUMBSTATFUNC
1720 || h->symbol_class == C_THUMBEXTFUNC))
1721 {
1722 patchit = TRUE;
1723 }
1724 else if (sym != NULL
1725 && sym->n_scnum > N_UNDEF)
1726 {
1727 /* No hash entry - use the symbol instead. */
1728 if ( sym->n_sclass == C_THUMBSTATFUNC
1729 || sym->n_sclass == C_THUMBEXTFUNC)
1730 patchit = TRUE;
1731 }
1732
1733 if (patchit)
1734 {
1735 bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
1736 bfd_vma x = bfd_get_32 (input_bfd, location);
1737
1738 bfd_put_32 (input_bfd, x | 1, location);
1739 }
1740 }
1741
1742 switch (rstat)
1743 {
1744 default:
1745 abort ();
1746 case bfd_reloc_ok:
1747 break;
1748 case bfd_reloc_outofrange:
1749 _bfd_error_handler
1750 /* xgettext:c-format */
1751 (_("%B: bad reloc address %#Lx in section `%A'"),
1752 input_bfd, rel->r_vaddr, input_section);
1753 return FALSE;
1754 case bfd_reloc_overflow:
1755 {
1756 const char *name;
1757 char buf[SYMNMLEN + 1];
1758
1759 if (symndx == -1)
1760 name = "*ABS*";
1761 else if (h != NULL)
1762 name = NULL;
1763 else
1764 {
1765 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
1766 if (name == NULL)
1767 return FALSE;
1768 }
1769
1770 (*info->callbacks->reloc_overflow)
1771 (info, (h ? &h->root : NULL), name, howto->name,
1772 (bfd_vma) 0, input_bfd, input_section,
1773 rel->r_vaddr - input_section->vma);
1774 }
1775 }
1776 }
1777
1778 return TRUE;
1779 }
1780
1781 #ifndef COFF_IMAGE_WITH_PE
1782
1783 bfd_boolean
1784 bfd_arm_allocate_interworking_sections (struct bfd_link_info * info)
1785 {
1786 asection * s;
1787 bfd_byte * foo;
1788 struct coff_arm_link_hash_table * globals;
1789
1790 globals = coff_arm_hash_table (info);
1791
1792 BFD_ASSERT (globals != NULL);
1793
1794 if (globals->arm_glue_size != 0)
1795 {
1796 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1797
1798 s = bfd_get_section_by_name
1799 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1800
1801 BFD_ASSERT (s != NULL);
1802
1803 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
1804
1805 s->size = globals->arm_glue_size;
1806 s->contents = foo;
1807 }
1808
1809 if (globals->thumb_glue_size != 0)
1810 {
1811 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1812
1813 s = bfd_get_section_by_name
1814 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1815
1816 BFD_ASSERT (s != NULL);
1817
1818 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
1819
1820 s->size = globals->thumb_glue_size;
1821 s->contents = foo;
1822 }
1823
1824 return TRUE;
1825 }
1826
1827 static void
1828 record_arm_to_thumb_glue (struct bfd_link_info * info,
1829 struct coff_link_hash_entry * h)
1830 {
1831 const char * name = h->root.root.string;
1832 register asection * s;
1833 char * tmp_name;
1834 struct coff_link_hash_entry * myh;
1835 struct bfd_link_hash_entry * bh;
1836 struct coff_arm_link_hash_table * globals;
1837 bfd_vma val;
1838 bfd_size_type amt;
1839
1840 globals = coff_arm_hash_table (info);
1841
1842 BFD_ASSERT (globals != NULL);
1843 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1844
1845 s = bfd_get_section_by_name
1846 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1847
1848 BFD_ASSERT (s != NULL);
1849
1850 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1851 tmp_name = bfd_malloc (amt);
1852
1853 BFD_ASSERT (tmp_name);
1854
1855 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1856
1857 myh = coff_link_hash_lookup
1858 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1859
1860 if (myh != NULL)
1861 {
1862 free (tmp_name);
1863 /* We've already seen this guy. */
1864 return;
1865 }
1866
1867 /* The only trick here is using globals->arm_glue_size as the value. Even
1868 though the section isn't allocated yet, this is where we will be putting
1869 it. */
1870 bh = NULL;
1871 val = globals->arm_glue_size + 1;
1872 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1873 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1874
1875 free (tmp_name);
1876
1877 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE;
1878
1879 return;
1880 }
1881
1882 #ifndef ARM_WINCE
1883 static void
1884 record_thumb_to_arm_glue (struct bfd_link_info * info,
1885 struct coff_link_hash_entry * h)
1886 {
1887 const char * name = h->root.root.string;
1888 asection * s;
1889 char * tmp_name;
1890 struct coff_link_hash_entry * myh;
1891 struct bfd_link_hash_entry * bh;
1892 struct coff_arm_link_hash_table * globals;
1893 bfd_vma val;
1894 bfd_size_type amt;
1895
1896 globals = coff_arm_hash_table (info);
1897
1898 BFD_ASSERT (globals != NULL);
1899 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1900
1901 s = bfd_get_section_by_name
1902 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1903
1904 BFD_ASSERT (s != NULL);
1905
1906 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1907 tmp_name = bfd_malloc (amt);
1908
1909 BFD_ASSERT (tmp_name);
1910
1911 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1912
1913 myh = coff_link_hash_lookup
1914 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1915
1916 if (myh != NULL)
1917 {
1918 free (tmp_name);
1919 /* We've already seen this guy. */
1920 return;
1921 }
1922
1923 bh = NULL;
1924 val = globals->thumb_glue_size + 1;
1925 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1926 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1927
1928 /* If we mark it 'thumb', the disassembler will do a better job. */
1929 myh = (struct coff_link_hash_entry *) bh;
1930 myh->symbol_class = C_THUMBEXTFUNC;
1931
1932 free (tmp_name);
1933
1934 /* Allocate another symbol to mark where we switch to arm mode. */
1935
1936 #define CHANGE_TO_ARM "__%s_change_to_arm"
1937 #define BACK_FROM_ARM "__%s_back_from_arm"
1938
1939 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1;
1940 tmp_name = bfd_malloc (amt);
1941
1942 BFD_ASSERT (tmp_name);
1943
1944 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);
1945
1946 bh = NULL;
1947 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
1948 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1949 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh);
1950
1951 free (tmp_name);
1952
1953 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
1954
1955 return;
1956 }
1957 #endif /* not ARM_WINCE */
1958
1959 /* Select a BFD to be used to hold the sections used by the glue code.
1960 This function is called from the linker scripts in ld/emultempl/
1961 {armcoff/pe}.em */
1962
1963 bfd_boolean
1964 bfd_arm_get_bfd_for_interworking (bfd * abfd,
1965 struct bfd_link_info * info)
1966 {
1967 struct coff_arm_link_hash_table * globals;
1968 flagword flags;
1969 asection * sec;
1970
1971 /* If we are only performing a partial link do not bother
1972 getting a bfd to hold the glue. */
1973 if (bfd_link_relocatable (info))
1974 return TRUE;
1975
1976 globals = coff_arm_hash_table (info);
1977
1978 BFD_ASSERT (globals != NULL);
1979
1980 if (globals->bfd_of_glue_owner != NULL)
1981 return TRUE;
1982
1983 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
1984
1985 if (sec == NULL)
1986 {
1987 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
1988 | SEC_CODE | SEC_READONLY);
1989 sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME,
1990 flags);
1991 if (sec == NULL
1992 || ! bfd_set_section_alignment (abfd, sec, 2))
1993 return FALSE;
1994 }
1995
1996 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
1997
1998 if (sec == NULL)
1999 {
2000 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
2001 | SEC_CODE | SEC_READONLY);
2002 sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME,
2003 flags);
2004
2005 if (sec == NULL
2006 || ! bfd_set_section_alignment (abfd, sec, 2))
2007 return FALSE;
2008 }
2009
2010 /* Save the bfd for later use. */
2011 globals->bfd_of_glue_owner = abfd;
2012
2013 return TRUE;
2014 }
2015
2016 bfd_boolean
2017 bfd_arm_process_before_allocation (bfd * abfd,
2018 struct bfd_link_info * info,
2019 int support_old_code)
2020 {
2021 asection * sec;
2022 struct coff_arm_link_hash_table * globals;
2023
2024 /* If we are only performing a partial link do not bother
2025 to construct any glue. */
2026 if (bfd_link_relocatable (info))
2027 return TRUE;
2028
2029 /* Here we have a bfd that is to be included on the link. We have a hook
2030 to do reloc rummaging, before section sizes are nailed down. */
2031 _bfd_coff_get_external_symbols (abfd);
2032
2033 globals = coff_arm_hash_table (info);
2034
2035 BFD_ASSERT (globals != NULL);
2036 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2037
2038 globals->support_old_code = support_old_code;
2039
2040 /* Rummage around all the relocs and map the glue vectors. */
2041 sec = abfd->sections;
2042
2043 if (sec == NULL)
2044 return TRUE;
2045
2046 for (; sec != NULL; sec = sec->next)
2047 {
2048 struct internal_reloc * i;
2049 struct internal_reloc * rel;
2050
2051 if (sec->reloc_count == 0)
2052 continue;
2053
2054 /* Load the relocs. */
2055 /* FIXME: there may be a storage leak here. */
2056 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);
2057
2058 BFD_ASSERT (i != 0);
2059
2060 for (rel = i; rel < i + sec->reloc_count; ++rel)
2061 {
2062 unsigned short r_type = rel->r_type;
2063 long symndx;
2064 struct coff_link_hash_entry * h;
2065
2066 symndx = rel->r_symndx;
2067
2068 /* If the relocation is not against a symbol it cannot concern us. */
2069 if (symndx == -1)
2070 continue;
2071
2072 /* If the index is outside of the range of our table, something has gone wrong. */
2073 if (symndx >= obj_conv_table_size (abfd))
2074 {
2075 /* xgettext:c-format */
2076 _bfd_error_handler (_("%B: illegal symbol index in reloc: %ld"),
2077 abfd, symndx);
2078 continue;
2079 }
2080
2081 h = obj_coff_sym_hashes (abfd)[symndx];
2082
2083 /* If the relocation is against a static symbol it must be within
2084 the current section and so cannot be a cross ARM/Thumb relocation. */
2085 if (h == NULL)
2086 continue;
2087
2088 switch (r_type)
2089 {
2090 case ARM_26:
2091 /* This one is a call from arm code. We need to look up
2092 the target of the call. If it is a thumb target, we
2093 insert glue. */
2094
2095 if (h->symbol_class == C_THUMBEXTFUNC)
2096 record_arm_to_thumb_glue (info, h);
2097 break;
2098
2099 #ifndef ARM_WINCE
2100 case ARM_THUMB23:
2101 /* This one is a call from thumb code. We used to look
2102 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look
2103 up the target of the call. If it is an arm target, we
2104 insert glue. If the symbol does not exist it will be
2105 given a class of C_EXT and so we will generate a stub
2106 for it. This is not really a problem, since the link
2107 is doomed anyway. */
2108
2109 switch (h->symbol_class)
2110 {
2111 case C_EXT:
2112 case C_STAT:
2113 case C_LABEL:
2114 record_thumb_to_arm_glue (info, h);
2115 break;
2116 default:
2117 ;
2118 }
2119 break;
2120 #endif
2121
2122 default:
2123 break;
2124 }
2125 }
2126 }
2127
2128 return TRUE;
2129 }
2130
2131 #endif /* ! defined (COFF_IMAGE_WITH_PE) */
2132
2133 #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup
2134 #define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup
2135 #define coff_relocate_section coff_arm_relocate_section
2136 #define coff_bfd_is_local_label_name coff_arm_is_local_label_name
2137 #define coff_adjust_symndx coff_arm_adjust_symndx
2138 #define coff_link_output_has_begun coff_arm_link_output_has_begun
2139 #define coff_final_link_postscript coff_arm_final_link_postscript
2140 #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data
2141 #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data
2142 #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags
2143 #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data
2144 #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create
2145
2146 /* When doing a relocatable link, we want to convert ARM_26 relocs
2147 into ARM_26D relocs. */
2148
2149 static bfd_boolean
2150 coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED,
2151 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2152 bfd *ibfd,
2153 asection *sec,
2154 struct internal_reloc *irel,
2155 bfd_boolean *adjustedp)
2156 {
2157 if (irel->r_type == ARM_26)
2158 {
2159 struct coff_link_hash_entry *h;
2160
2161 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
2162 if (h != NULL
2163 && (h->root.type == bfd_link_hash_defined
2164 || h->root.type == bfd_link_hash_defweak)
2165 && h->root.u.def.section->output_section == sec->output_section)
2166 irel->r_type = ARM_26D;
2167 }
2168 *adjustedp = FALSE;
2169 return TRUE;
2170 }
2171
2172 /* Called when merging the private data areas of two BFDs.
2173 This is important as it allows us to detect if we are
2174 attempting to merge binaries compiled for different ARM
2175 targets, eg different CPUs or different APCS's. */
2176
2177 static bfd_boolean
2178 coff_arm_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
2179 {
2180 bfd *obfd = info->output_bfd;
2181 BFD_ASSERT (ibfd != NULL && obfd != NULL);
2182
2183 if (ibfd == obfd)
2184 return TRUE;
2185
2186 /* If the two formats are different we cannot merge anything.
2187 This is not an error, since it is permissable to change the
2188 input and output formats. */
2189 if ( ibfd->xvec->flavour != bfd_target_coff_flavour
2190 || obfd->xvec->flavour != bfd_target_coff_flavour)
2191 return TRUE;
2192
2193 /* Determine what should happen if the input ARM architecture
2194 does not match the output ARM architecture. */
2195 if (! bfd_arm_merge_machines (ibfd, obfd))
2196 return FALSE;
2197
2198 /* Verify that the APCS is the same for the two BFDs. */
2199 if (APCS_SET (ibfd))
2200 {
2201 if (APCS_SET (obfd))
2202 {
2203 /* If the src and dest have different APCS flag bits set, fail. */
2204 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
2205 {
2206 _bfd_error_handler
2207 /* xgettext: c-format */
2208 (_("error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
2209 ibfd, APCS_26_FLAG (ibfd) ? 26 : 32,
2210 obfd, APCS_26_FLAG (obfd) ? 26 : 32
2211 );
2212
2213 bfd_set_error (bfd_error_wrong_format);
2214 return FALSE;
2215 }
2216
2217 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
2218 {
2219 if (APCS_FLOAT_FLAG (ibfd))
2220 /* xgettext: c-format */
2221 _bfd_error_handler (_("\
2222 error: %B passes floats in float registers, whereas %B passes them in integer registers"),
2223 ibfd, obfd);
2224 else
2225 /* xgettext: c-format */
2226 _bfd_error_handler (_("\
2227 error: %B passes floats in integer registers, whereas %B passes them in float registers"),
2228 ibfd, obfd);
2229
2230 bfd_set_error (bfd_error_wrong_format);
2231 return FALSE;
2232 }
2233
2234 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
2235 {
2236 if (PIC_FLAG (ibfd))
2237 /* xgettext: c-format */
2238 _bfd_error_handler (_("\
2239 error: %B is compiled as position independent code, whereas target %B is absolute position"),
2240 ibfd, obfd);
2241 else
2242 /* xgettext: c-format */
2243 _bfd_error_handler (_("\
2244 error: %B is compiled as absolute position code, whereas target %B is position independent"),
2245 ibfd, obfd);
2246
2247 bfd_set_error (bfd_error_wrong_format);
2248 return FALSE;
2249 }
2250 }
2251 else
2252 {
2253 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));
2254
2255 /* Set up the arch and fields as well as these are probably wrong. */
2256 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2257 }
2258 }
2259
2260 /* Check the interworking support. */
2261 if (INTERWORK_SET (ibfd))
2262 {
2263 if (INTERWORK_SET (obfd))
2264 {
2265 /* If the src and dest differ in their interworking issue a warning. */
2266 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
2267 {
2268 if (INTERWORK_FLAG (ibfd))
2269 /* xgettext: c-format */
2270 _bfd_error_handler (_("\
2271 Warning: %B supports interworking, whereas %B does not"),
2272 ibfd, obfd);
2273 else
2274 /* xgettext: c-format */
2275 _bfd_error_handler (_("\
2276 Warning: %B does not support interworking, whereas %B does"),
2277 ibfd, obfd);
2278 }
2279 }
2280 else
2281 {
2282 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
2283 }
2284 }
2285
2286 return TRUE;
2287 }
2288
2289 /* Display the flags field. */
2290
2291 static bfd_boolean
2292 coff_arm_print_private_bfd_data (bfd * abfd, void * ptr)
2293 {
2294 FILE * file = (FILE *) ptr;
2295
2296 BFD_ASSERT (abfd != NULL && ptr != NULL);
2297
2298 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags);
2299
2300 if (APCS_SET (abfd))
2301 {
2302 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */
2303 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);
2304
2305 if (APCS_FLOAT_FLAG (abfd))
2306 fprintf (file, _(" [floats passed in float registers]"));
2307 else
2308 fprintf (file, _(" [floats passed in integer registers]"));
2309
2310 if (PIC_FLAG (abfd))
2311 fprintf (file, _(" [position independent]"));
2312 else
2313 fprintf (file, _(" [absolute position]"));
2314 }
2315
2316 if (! INTERWORK_SET (abfd))
2317 fprintf (file, _(" [interworking flag not initialised]"));
2318 else if (INTERWORK_FLAG (abfd))
2319 fprintf (file, _(" [interworking supported]"));
2320 else
2321 fprintf (file, _(" [interworking not supported]"));
2322
2323 fputc ('\n', file);
2324
2325 return TRUE;
2326 }
2327
2328 /* Copies the given flags into the coff_tdata.flags field.
2329 Typically these flags come from the f_flags[] field of
2330 the COFF filehdr structure, which contains important,
2331 target specific information.
2332 Note: Although this function is static, it is explicitly
2333 called from both coffcode.h and peicode.h. */
2334
2335 static bfd_boolean
2336 _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags)
2337 {
2338 flagword flag;
2339
2340 BFD_ASSERT (abfd != NULL);
2341
2342 flag = (flags & F_APCS26) ? F_APCS_26 : 0;
2343
2344 /* Make sure that the APCS field has not been initialised to the opposite
2345 value. */
2346 if (APCS_SET (abfd)
2347 && ( (APCS_26_FLAG (abfd) != flag)
2348 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
2349 || (PIC_FLAG (abfd) != (flags & F_PIC))
2350 ))
2351 return FALSE;
2352
2353 flag |= (flags & (F_APCS_FLOAT | F_PIC));
2354
2355 SET_APCS_FLAGS (abfd, flag);
2356
2357 flag = (flags & F_INTERWORK);
2358
2359 /* If the BFD has already had its interworking flag set, but it
2360 is different from the value that we have been asked to set,
2361 then assume that that merged code will not support interworking
2362 and set the flag accordingly. */
2363 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
2364 {
2365 if (flag)
2366 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
2367 abfd);
2368 else
2369 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"),
2370 abfd);
2371 flag = 0;
2372 }
2373
2374 SET_INTERWORK_FLAG (abfd, flag);
2375
2376 return TRUE;
2377 }
2378
2379 /* Copy the important parts of the target specific data
2380 from one instance of a BFD to another. */
2381
2382 static bfd_boolean
2383 coff_arm_copy_private_bfd_data (bfd * src, bfd * dest)
2384 {
2385 BFD_ASSERT (src != NULL && dest != NULL);
2386
2387 if (src == dest)
2388 return TRUE;
2389
2390 /* If the destination is not in the same format as the source, do not do
2391 the copy. */
2392 if (src->xvec != dest->xvec)
2393 return TRUE;
2394
2395 /* Copy the flags field. */
2396 if (APCS_SET (src))
2397 {
2398 if (APCS_SET (dest))
2399 {
2400 /* If the src and dest have different APCS flag bits set, fail. */
2401 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
2402 return FALSE;
2403
2404 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
2405 return FALSE;
2406
2407 if (PIC_FLAG (dest) != PIC_FLAG (src))
2408 return FALSE;
2409 }
2410 else
2411 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src)
2412 | PIC_FLAG (src));
2413 }
2414
2415 if (INTERWORK_SET (src))
2416 {
2417 if (INTERWORK_SET (dest))
2418 {
2419 /* If the src and dest have different interworking flags then turn
2420 off the interworking bit. */
2421 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
2422 {
2423 if (INTERWORK_FLAG (dest))
2424 {
2425 /* xgettext:c-format */
2426 _bfd_error_handler (_("\
2427 Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
2428 dest, src);
2429 }
2430
2431 SET_INTERWORK_FLAG (dest, 0);
2432 }
2433 }
2434 else
2435 {
2436 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
2437 }
2438 }
2439
2440 return TRUE;
2441 }
2442
2443 /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
2444 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */
2445 #ifndef LOCAL_LABEL_PREFIX
2446 #define LOCAL_LABEL_PREFIX ""
2447 #endif
2448 #ifndef USER_LABEL_PREFIX
2449 #define USER_LABEL_PREFIX "_"
2450 #endif
2451
2452 /* Like _bfd_coff_is_local_label_name, but
2453 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be
2454 non-local.
2455 b) Allow other prefixes than ".", e.g. an empty prefix would cause all
2456 labels of the form Lxxx to be stripped. */
2457
2458 static bfd_boolean
2459 coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED,
2460 const char * name)
2461 {
2462 #ifdef USER_LABEL_PREFIX
2463 if (USER_LABEL_PREFIX[0] != 0)
2464 {
2465 size_t len = strlen (USER_LABEL_PREFIX);
2466
2467 if (strncmp (name, USER_LABEL_PREFIX, len) == 0)
2468 return FALSE;
2469 }
2470 #endif
2471
2472 #ifdef LOCAL_LABEL_PREFIX
2473 /* If there is a prefix for local labels then look for this.
2474 If the prefix exists, but it is empty, then ignore the test. */
2475
2476 if (LOCAL_LABEL_PREFIX[0] != 0)
2477 {
2478 size_t len = strlen (LOCAL_LABEL_PREFIX);
2479
2480 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0)
2481 return FALSE;
2482
2483 /* Perform the checks below for the rest of the name. */
2484 name += len;
2485 }
2486 #endif
2487
2488 return name[0] == 'L';
2489 }
2490
2491 /* This piece of machinery exists only to guarantee that the bfd that holds
2492 the glue section is written last.
2493
2494 This does depend on bfd_make_section attaching a new section to the
2495 end of the section list for the bfd. */
2496
2497 static bfd_boolean
2498 coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info)
2499 {
2500 return (sub->output_has_begun
2501 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner);
2502 }
2503
2504 static bfd_boolean
2505 coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED,
2506 struct coff_final_link_info * pfinfo)
2507 {
2508 struct coff_arm_link_hash_table * globals;
2509
2510 globals = coff_arm_hash_table (pfinfo->info);
2511
2512 BFD_ASSERT (globals != NULL);
2513
2514 if (globals->bfd_of_glue_owner != NULL)
2515 {
2516 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner))
2517 return FALSE;
2518
2519 globals->bfd_of_glue_owner->output_has_begun = TRUE;
2520 }
2521
2522 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
2523 }
2524
2525 #ifndef bfd_pe_print_pdata
2526 #define bfd_pe_print_pdata NULL
2527 #endif
2528
2529 #include "coffcode.h"
2530
2531 #ifndef TARGET_LITTLE_SYM
2532 #define TARGET_LITTLE_SYM arm_coff_le_vec
2533 #endif
2534 #ifndef TARGET_LITTLE_NAME
2535 #define TARGET_LITTLE_NAME "coff-arm-little"
2536 #endif
2537 #ifndef TARGET_BIG_SYM
2538 #define TARGET_BIG_SYM arm_coff_be_vec
2539 #endif
2540 #ifndef TARGET_BIG_NAME
2541 #define TARGET_BIG_NAME "coff-arm-big"
2542 #endif
2543
2544 #ifndef TARGET_UNDERSCORE
2545 #define TARGET_UNDERSCORE 0
2546 #endif
2547
2548 #ifndef EXTRA_S_FLAGS
2549 #ifdef COFF_WITH_PE
2550 #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES)
2551 #else
2552 #define EXTRA_S_FLAGS SEC_CODE
2553 #endif
2554 #endif
2555
2556 /* Forward declaration for use initialising alternative_target field. */
2557 extern const bfd_target TARGET_BIG_SYM ;
2558
2559 /* Target vectors. */
2560 CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE)
2561 CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE)
GDB Binutils - Deliverables
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