bfd/cpu-mips.c

   1 /* bfd back-end for mips support
   2    Copyright (C) 1990-2020 Free Software Foundation, Inc.
   3    Written by Steve Chamberlain of Cygnus Support.
   4
   5    This file is part of BFD, the Binary File Descriptor library.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22 #include "sysdep.h"
  23 #include "bfd.h"
  24 #include "libbfd.h"
  25
  26 static const bfd_arch_info_type *mips_compatible
  27   (const bfd_arch_info_type *, const bfd_arch_info_type *);
  28
  29 /* The default routine tests bits_per_word, which is wrong on mips as
  30    mips word size doesn't correlate with reloc size.  */
  31
  32 static const bfd_arch_info_type *
  33 mips_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
  34 {
  35   if (a->arch != b->arch)
  36     return NULL;
  37
  38   /* Machine compatibility is checked in
  39      _bfd_mips_elf_merge_private_bfd_data.  */
  40
  41   return a;
  42 }
  43
  44 #define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT)           \
  45   {                                                     \
  46     BITS_WORD,  /* Bits in a word.  */                  \
  47     BITS_ADDR,  /* Bits in an address.  */              \
  48     8,          /* Bits in a byte.  */                  \
  49     bfd_arch_mips,                                      \
  50     NUMBER,                                             \
  51     "mips",                                             \
  52     PRINT,                                              \
  53     3,                                                  \
  54     DEFAULT,                                            \
  55     mips_compatible,                                    \
  56     bfd_default_scan,                                   \
  57     bfd_arch_default_fill,                              \
  58     NEXT,                                               \
  59     0 /* Maximum offset of a reloc from the start of an insn.  */ \
  60   }
  61
  62 enum
  63 {
  64   I_mips3000,
  65   I_mips3900,
  66   I_mips4000,
  67   I_mips4010,
  68   I_mips4100,
  69   I_mips4111,
  70   I_mips4120,
  71   I_mips4300,
  72   I_mips4400,
  73   I_mips4600,
  74   I_mips4650,
  75   I_mips5000,
  76   I_mips5400,
  77   I_mips5500,
  78   I_mips5900,
  79   I_mips6000,
  80   I_mips7000,
  81   I_mips8000,
  82   I_mips9000,
  83   I_mips10000,
  84   I_mips12000,
  85   I_mips14000,
  86   I_mips16000,
  87   I_mips16,
  88   I_mips5,
  89   I_mipsisa32,
  90   I_mipsisa32r2,
  91   I_mipsisa32r3,
  92   I_mipsisa32r5,
  93   I_mipsisa32r6,
  94   I_mipsisa64,
  95   I_mipsisa64r2,
  96   I_mipsisa64r3,
  97   I_mipsisa64r5,
  98   I_mipsisa64r6,
  99   I_sb1,
 100   I_loongson_2e,
 101   I_loongson_2f,
 102   I_gs464,
 103   I_gs464e,
 104   I_gs264e,
 105   I_mipsocteon,
 106   I_mipsocteonp,
 107   I_mipsocteon2,
 108   I_mipsocteon3,
 109   I_xlr,
 110   I_interaptiv_mr2,
 111   I_micromips
 112 };
 113
 114 #define NN(index) (&arch_info_struct[(index) + 1])
 115
 116 static const bfd_arch_info_type arch_info_struct[] =
 117 {
 118   N (32, 32, bfd_mach_mips3000, "mips:3000",      FALSE, NN(I_mips3000)),
 119   N (32, 32, bfd_mach_mips3900, "mips:3900",      FALSE, NN(I_mips3900)),
 120   N (64, 64, bfd_mach_mips4000, "mips:4000",      FALSE, NN(I_mips4000)),
 121   N (32, 32, bfd_mach_mips4010, "mips:4010",      FALSE, NN(I_mips4010)),
 122   N (64, 64, bfd_mach_mips4100, "mips:4100",      FALSE, NN(I_mips4100)),
 123   N (64, 64, bfd_mach_mips4111, "mips:4111",      FALSE, NN(I_mips4111)),
 124   N (64, 64, bfd_mach_mips4120, "mips:4120",      FALSE, NN(I_mips4120)),
 125   N (64, 64, bfd_mach_mips4300, "mips:4300",      FALSE, NN(I_mips4300)),
 126   N (64, 64, bfd_mach_mips4400, "mips:4400",      FALSE, NN(I_mips4400)),
 127   N (64, 64, bfd_mach_mips4600, "mips:4600",      FALSE, NN(I_mips4600)),
 128   N (64, 64, bfd_mach_mips4650, "mips:4650",      FALSE, NN(I_mips4650)),
 129   N (64, 64, bfd_mach_mips5000, "mips:5000",      FALSE, NN(I_mips5000)),
 130   N (64, 64, bfd_mach_mips5400, "mips:5400",      FALSE, NN(I_mips5400)),
 131   N (64, 64, bfd_mach_mips5500, "mips:5500",      FALSE, NN(I_mips5500)),
 132   N (64, 32, bfd_mach_mips5900, "mips:5900",      FALSE, NN(I_mips5900)),
 133   N (32, 32, bfd_mach_mips6000, "mips:6000",      FALSE, NN(I_mips6000)),
 134   N (64, 64, bfd_mach_mips7000, "mips:7000",      FALSE, NN(I_mips7000)),
 135   N (64, 64, bfd_mach_mips8000, "mips:8000",      FALSE, NN(I_mips8000)),
 136   N (64, 64, bfd_mach_mips9000, "mips:9000",      FALSE, NN(I_mips9000)),
 137   N (64, 64, bfd_mach_mips10000,"mips:10000",     FALSE, NN(I_mips10000)),
 138   N (64, 64, bfd_mach_mips12000,"mips:12000",     FALSE, NN(I_mips12000)),
 139   N (64, 64, bfd_mach_mips14000,"mips:14000",     FALSE, NN(I_mips14000)),
 140   N (64, 64, bfd_mach_mips16000,"mips:16000",     FALSE, NN(I_mips16000)),
 141   N (64, 64, bfd_mach_mips16,   "mips:16",        FALSE, NN(I_mips16)),
 142   N (64, 64, bfd_mach_mips5,    "mips:mips5",     FALSE, NN(I_mips5)),
 143   N (32, 32, bfd_mach_mipsisa32,  "mips:isa32",   FALSE, NN(I_mipsisa32)),
 144   N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)),
 145   N (32, 32, bfd_mach_mipsisa32r3,"mips:isa32r3", FALSE, NN(I_mipsisa32r3)),
 146   N (32, 32, bfd_mach_mipsisa32r5,"mips:isa32r5", FALSE, NN(I_mipsisa32r5)),
 147   N (32, 32, bfd_mach_mipsisa32r6,"mips:isa32r6", FALSE, NN(I_mipsisa32r6)),
 148   N (64, 64, bfd_mach_mipsisa64,  "mips:isa64",   FALSE, NN(I_mipsisa64)),
 149   N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)),
 150   N (64, 64, bfd_mach_mipsisa64r3,"mips:isa64r3", FALSE, NN(I_mipsisa64r3)),
 151   N (64, 64, bfd_mach_mipsisa64r5,"mips:isa64r5", FALSE, NN(I_mipsisa64r5)),
 152   N (64, 64, bfd_mach_mipsisa64r6,"mips:isa64r6", FALSE, NN(I_mipsisa64r6)),
 153   N (64, 64, bfd_mach_mips_sb1, "mips:sb1",       FALSE, NN(I_sb1)),
 154   N (64, 64, bfd_mach_mips_loongson_2e, "mips:loongson_2e", FALSE, NN(I_loongson_2e)),
 155   N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, NN(I_loongson_2f)),
 156   N (64, 64, bfd_mach_mips_gs464, "mips:gs464",   FALSE, NN(I_gs464)),
 157   N (64, 64, bfd_mach_mips_gs464e, "mips:gs464e", FALSE, NN(I_gs464e)),
 158   N (64, 64, bfd_mach_mips_gs264e, "mips:gs264e", FALSE, NN(I_gs264e)),
 159   N (64, 64, bfd_mach_mips_octeon,"mips:octeon",  FALSE, NN(I_mipsocteon)),
 160   N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
 161   N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
 162   N (64, 64, bfd_mach_mips_octeon3, "mips:octeon3", FALSE, NN(I_mipsocteon3)),
 163   N (64, 64, bfd_mach_mips_xlr, "mips:xlr",        FALSE, NN(I_xlr)),
 164   N (32, 32, bfd_mach_mips_interaptiv_mr2, "mips:interaptiv-mr2", FALSE,
 165      NN(I_interaptiv_mr2)),
 166   N (64, 64, bfd_mach_mips_micromips, "mips:micromips", FALSE, NULL)
 167 };
 168
 169 /* The default architecture is mips:3000, but with a machine number of
 170    zero.  This lets the linker distinguish between a default setting
 171    of mips, and an explicit setting of mips:3000.  */
 172
 173 const bfd_arch_info_type bfd_mips_arch =
 174 N (32, 32, 0, "mips", TRUE, &arch_info_struct[0]);