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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 #define CMSE_PREFIX "__acle_se_"
2142
2143 /* The name of the dynamic interpreter. This is put in the .interp
2144 section. */
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2146
2147 static const unsigned long tls_trampoline [] =
2148 {
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2152 };
2153
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2155 {
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 };
2166
2167 #ifdef FOUR_WORD_PLT
2168
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2172 linker first. */
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2174 {
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 };
2180
2181 /* Subsequent entries in a procedure linkage table look like
2182 this. */
2183 static const bfd_vma elf32_arm_plt_entry [] =
2184 {
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2189 };
2190
2191 #else /* not FOUR_WORD_PLT */
2192
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2196 linker first. */
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2198 {
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2204 };
2205
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2209 {
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 };
2214
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2218 {
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 };
2224
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2226
2227 #endif /* not FOUR_WORD_PLT */
2228
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2233 {
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2238 /* add lr, pc */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2241 };
2242
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2244 look like this. */
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2246 {
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2253 /* nop */
2254 };
2255
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2259 {
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 };
2265
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2268 {
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 };
2276
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2279 {
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 };
2287
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2291 {
2292 0x4778, /* bx pc */
2293 0x46c0 /* nop */
2294 };
2295
2296 /* The entries in a PLT when using a DLL-based target with multiple
2297 address spaces. */
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2299 {
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 };
2303
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2307 linker first. */
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 {
2310 /* First bundle: */
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2320 /* Third bundle: */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2324 /* .Lplt_tail: */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2331 };
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2333
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2336 {
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2341 };
2342
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2351
2352 enum stub_insn_type
2353 {
2354 THUMB16_TYPE = 1,
2355 THUMB32_TYPE,
2356 ARM_TYPE,
2357 DATA_TYPE
2358 };
2359
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371
2372 typedef struct
2373 {
2374 bfd_vma data;
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2377 int reloc_addend;
2378 } insn_sequence;
2379
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2383 {
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2386 };
2387
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2389 available. */
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2391 {
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2395 };
2396
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2399 {
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2407 };
2408
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2411 {
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2414 };
2415
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2419 {
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2434 };
2435
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2437 available. */
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2439 {
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2444 };
2445
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2453 };
2454
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2458 {
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2462 };
2463
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2467 ARMv7). */
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2469 {
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2474 };
2475
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2478 {
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2483 };
2484
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2487 {
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2493 };
2494
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2496 architectures. */
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2498 {
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2506 };
2507
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2509 allowed. */
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2511 {
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2523 {
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2532 {
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2538 };
2539
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2542 {
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2551 };
2552
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2555 {
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2564 };
2565
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2568 {
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2571 };
2572
2573
2574 /* Cortex-A8 erratum-workaround stubs. */
2575
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2578
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2580 {
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2584 };
2585
2586 /* Stub used for b.w and bl.w instructions. */
2587
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2589 {
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2591 };
2592
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2594 {
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2596 };
2597
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2601
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2603 {
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2605 };
2606
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2610 applied.
2611
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2615
2616 const char * stubborn_problems[] = { "np" };
2617
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2619 section called:
2620
2621 .data.rel.local.stubborn_problems
2622
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2624
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2627 continue;
2628
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2631 C identifier. */
2632 #define STUB_SUFFIX ".__stub"
2633
2634 /* One entry per long/short branch stub defined above. */
2635 #define DEF_STUBS \
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2659
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2662 {
2663 arm_stub_none,
2664 DEF_STUBS
2665 max_stub_type
2666 };
2667 #undef DEF_STUB
2668
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2671
2672 typedef struct
2673 {
2674 const insn_sequence* template_sequence;
2675 int template_size;
2676 } stub_def;
2677
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2680 {
2681 {NULL, 0},
2682 DEF_STUBS
2683 };
2684
2685 struct elf32_arm_stub_hash_entry
2686 {
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2689
2690 /* The stub section. */
2691 asection *stub_sec;
2692
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2695
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2700
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2705 same section. */
2706 bfd_vma source_value;
2707
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2711
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2715 int stub_size;
2716 /* Its template. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2720
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2723
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2726
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2729 asection *id_sec;
2730
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2734 char *output_name;
2735 };
2736
2737 /* Used to build a map of a section. This is required for mixed-endian
2738 code/data. */
2739
2740 typedef struct elf32_elf_section_map
2741 {
2742 bfd_vma vma;
2743 char type;
2744 }
2745 elf32_arm_section_map;
2746
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2748
2749 typedef enum
2750 {
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2755 }
2756 elf32_vfp11_erratum_type;
2757
2758 typedef struct elf32_vfp11_erratum_list
2759 {
2760 struct elf32_vfp11_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_vfp11_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_vfp11_erratum_type type;
2776 }
2777 elf32_vfp11_erratum_list;
2778
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2780 veneer. */
2781 typedef enum
2782 {
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2785 }
2786 elf32_stm32l4xx_erratum_type;
2787
2788 typedef struct elf32_stm32l4xx_erratum_list
2789 {
2790 struct elf32_stm32l4xx_erratum_list *next;
2791 bfd_vma vma;
2792 union
2793 {
2794 struct
2795 {
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2797 unsigned int insn;
2798 } b;
2799 struct
2800 {
2801 struct elf32_stm32l4xx_erratum_list *branch;
2802 unsigned int id;
2803 } v;
2804 } u;
2805 elf32_stm32l4xx_erratum_type type;
2806 }
2807 elf32_stm32l4xx_erratum_list;
2808
2809 typedef enum
2810 {
2811 DELETE_EXIDX_ENTRY,
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2813 }
2814 arm_unwind_edit_type;
2815
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2818 {
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2824 unsigned int index;
2825 struct arm_unwind_table_edit *next;
2826 }
2827 arm_unwind_table_edit;
2828
2829 typedef struct _arm_elf_section_data
2830 {
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2843 union
2844 {
2845 /* Unwind info attached to a text section. */
2846 struct
2847 {
2848 asection *arm_exidx_sec;
2849 } text;
2850
2851 /* Unwind info attached to an .ARM.exidx section. */
2852 struct
2853 {
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2856 } exidx;
2857 } u;
2858 }
2859 _arm_elf_section_data;
2860
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2863
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2869
2870 struct a8_erratum_fix
2871 {
2872 bfd *input_bfd;
2873 asection *section;
2874 bfd_vma offset;
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2877 char *stub_name;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2880 };
2881
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2883 erratum. */
2884
2885 struct a8_erratum_reloc
2886 {
2887 bfd_vma from;
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2894 };
2895
2896 /* The size of the thread control block. */
2897 #define TCB_SIZE 8
2898
2899 /* ARM-specific information about a PLT entry, over and above the usual
2900 gotplt_union. */
2901 struct arm_plt_info
2902 {
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2906
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2910
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2917
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2922 };
2923
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2926 {
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2930
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2934
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2937 };
2938
2939 struct elf_arm_obj_tdata
2940 {
2941 struct elf_obj_tdata root;
2942
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2945
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2948
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2951
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2954
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2957 };
2958
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2961
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2964
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2967
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2970
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2975
2976 static bfd_boolean
2977 elf32_arm_mkobject (bfd *abfd)
2978 {
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2980 ARM_ELF_DATA);
2981 }
2982
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2984
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2987 {
2988 struct elf_link_hash_entry root;
2989
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2992
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2995
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3003
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3006
3007 unsigned int unused : 23;
3008
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3012
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3016
3017 /* A pointer to the most recently used stub hash entry against this
3018 symbol. */
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3020 };
3021
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3025 (&(table)->root, \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3027 (info)))
3028
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3033
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3037
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3040 struct map_stub
3041 {
3042 /* This is the section to which stubs in the group will be
3043 attached. */
3044 asection *link_sec;
3045 /* The stub section. */
3046 asection *stub_sec;
3047 };
3048
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3051
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3054 {
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3057
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3060
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3063
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3066
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3070
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3072 veneers. */
3073 bfd_size_type vfp11_erratum_glue_size;
3074
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3076 veneers. */
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3078
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3084
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3087
3088 /* Nonzero to output a BE8 image. */
3089 int byteswap_code;
3090
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3093 int target1_is_rel;
3094
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3096 int target2_reloc;
3097
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3101 int fix_v4bx;
3102
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3104 int fix_cortex_a8;
3105
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3107 int fix_arm1176;
3108
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3110 int use_blx;
3111
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3115
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3118
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3122
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3125
3126 /* Nonzero to force PIC branch veneers. */
3127 int pic_veneer;
3128
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3131
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3134
3135 /* True if the target system is VxWorks. */
3136 int vxworks_p;
3137
3138 /* True if the target system is Symbian OS. */
3139 int symbian_p;
3140
3141 /* True if the target system is Native Client. */
3142 int nacl_p;
3143
3144 /* True if the target uses REL relocations. */
3145 int use_rel;
3146
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3149 int cmse_implib;
3150
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3153 bfd *in_implib_bfd;
3154
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3157
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3160
3161 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3162 asection *srelplt2;
3163
3164 /* The offset into splt of the PLT entry for the TLS descriptor
3165 resolver. Special values are 0, if not necessary (or not found
3166 to be necessary yet), and -1 if needed but not determined
3167 yet. */
3168 bfd_vma dt_tlsdesc_plt;
3169
3170 /* The offset into sgot of the GOT entry used by the PLT entry
3171 above. */
3172 bfd_vma dt_tlsdesc_got;
3173
3174 /* Offset in .plt section of tls_arm_trampoline. */
3175 bfd_vma tls_trampoline;
3176
3177 /* Data for R_ARM_TLS_LDM32 relocations. */
3178 union
3179 {
3180 bfd_signed_vma refcount;
3181 bfd_vma offset;
3182 } tls_ldm_got;
3183
3184 /* Small local sym cache. */
3185 struct sym_cache sym_cache;
3186
3187 /* For convenience in allocate_dynrelocs. */
3188 bfd * obfd;
3189
3190 /* The amount of space used by the reserved portion of the sgotplt
3191 section, plus whatever space is used by the jump slots. */
3192 bfd_vma sgotplt_jump_table_size;
3193
3194 /* The stub hash table. */
3195 struct bfd_hash_table stub_hash_table;
3196
3197 /* Linker stub bfd. */
3198 bfd *stub_bfd;
3199
3200 /* Linker call-backs. */
3201 asection * (*add_stub_section) (const char *, asection *, asection *,
3202 unsigned int);
3203 void (*layout_sections_again) (void);
3204
3205 /* Array to keep track of which stub sections have been created, and
3206 information on stub grouping. */
3207 struct map_stub *stub_group;
3208
3209 /* Input stub section holding secure gateway veneers. */
3210 asection *cmse_stub_sec;
3211
3212 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3213 start to be allocated. */
3214 bfd_vma new_cmse_stub_offset;
3215
3216 /* Number of elements in stub_group. */
3217 unsigned int top_id;
3218
3219 /* Assorted information used by elf32_arm_size_stubs. */
3220 unsigned int bfd_count;
3221 unsigned int top_index;
3222 asection **input_list;
3223 };
3224
3225 static inline int
3226 ctz (unsigned int mask)
3227 {
3228 #if GCC_VERSION >= 3004
3229 return __builtin_ctz (mask);
3230 #else
3231 unsigned int i;
3232
3233 for (i = 0; i < 8 * sizeof (mask); i++)
3234 {
3235 if (mask & 0x1)
3236 break;
3237 mask = (mask >> 1);
3238 }
3239 return i;
3240 #endif
3241 }
3242
3243 static inline int
3244 elf32_arm_popcount (unsigned int mask)
3245 {
3246 #if GCC_VERSION >= 3004
3247 return __builtin_popcount (mask);
3248 #else
3249 unsigned int i;
3250 int sum = 0;
3251
3252 for (i = 0; i < 8 * sizeof (mask); i++)
3253 {
3254 if (mask & 0x1)
3255 sum++;
3256 mask = (mask >> 1);
3257 }
3258 return sum;
3259 #endif
3260 }
3261
3262 /* Create an entry in an ARM ELF linker hash table. */
3263
3264 static struct bfd_hash_entry *
3265 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3266 struct bfd_hash_table * table,
3267 const char * string)
3268 {
3269 struct elf32_arm_link_hash_entry * ret =
3270 (struct elf32_arm_link_hash_entry *) entry;
3271
3272 /* Allocate the structure if it has not already been allocated by a
3273 subclass. */
3274 if (ret == NULL)
3275 ret = (struct elf32_arm_link_hash_entry *)
3276 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3277 if (ret == NULL)
3278 return (struct bfd_hash_entry *) ret;
3279
3280 /* Call the allocation method of the superclass. */
3281 ret = ((struct elf32_arm_link_hash_entry *)
3282 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3283 table, string));
3284 if (ret != NULL)
3285 {
3286 ret->dyn_relocs = NULL;
3287 ret->tls_type = GOT_UNKNOWN;
3288 ret->tlsdesc_got = (bfd_vma) -1;
3289 ret->plt.thumb_refcount = 0;
3290 ret->plt.maybe_thumb_refcount = 0;
3291 ret->plt.noncall_refcount = 0;
3292 ret->plt.got_offset = -1;
3293 ret->is_iplt = FALSE;
3294 ret->export_glue = NULL;
3295
3296 ret->stub_cache = NULL;
3297 }
3298
3299 return (struct bfd_hash_entry *) ret;
3300 }
3301
3302 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3303 symbols. */
3304
3305 static bfd_boolean
3306 elf32_arm_allocate_local_sym_info (bfd *abfd)
3307 {
3308 if (elf_local_got_refcounts (abfd) == NULL)
3309 {
3310 bfd_size_type num_syms;
3311 bfd_size_type size;
3312 char *data;
3313
3314 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3315 size = num_syms * (sizeof (bfd_signed_vma)
3316 + sizeof (struct arm_local_iplt_info *)
3317 + sizeof (bfd_vma)
3318 + sizeof (char));
3319 data = bfd_zalloc (abfd, size);
3320 if (data == NULL)
3321 return FALSE;
3322
3323 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3324 data += num_syms * sizeof (bfd_signed_vma);
3325
3326 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3327 data += num_syms * sizeof (struct arm_local_iplt_info *);
3328
3329 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3330 data += num_syms * sizeof (bfd_vma);
3331
3332 elf32_arm_local_got_tls_type (abfd) = data;
3333 }
3334 return TRUE;
3335 }
3336
3337 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3338 to input bfd ABFD. Create the information if it doesn't already exist.
3339 Return null if an allocation fails. */
3340
3341 static struct arm_local_iplt_info *
3342 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3343 {
3344 struct arm_local_iplt_info **ptr;
3345
3346 if (!elf32_arm_allocate_local_sym_info (abfd))
3347 return NULL;
3348
3349 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3350 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3351 if (*ptr == NULL)
3352 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3353 return *ptr;
3354 }
3355
3356 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3357 in ABFD's symbol table. If the symbol is global, H points to its
3358 hash table entry, otherwise H is null.
3359
3360 Return true if the symbol does have PLT information. When returning
3361 true, point *ROOT_PLT at the target-independent reference count/offset
3362 union and *ARM_PLT at the ARM-specific information. */
3363
3364 static bfd_boolean
3365 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3366 struct elf32_arm_link_hash_entry *h,
3367 unsigned long r_symndx, union gotplt_union **root_plt,
3368 struct arm_plt_info **arm_plt)
3369 {
3370 struct arm_local_iplt_info *local_iplt;
3371
3372 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3373 return FALSE;
3374
3375 if (h != NULL)
3376 {
3377 *root_plt = &h->root.plt;
3378 *arm_plt = &h->plt;
3379 return TRUE;
3380 }
3381
3382 if (elf32_arm_local_iplt (abfd) == NULL)
3383 return FALSE;
3384
3385 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3386 if (local_iplt == NULL)
3387 return FALSE;
3388
3389 *root_plt = &local_iplt->root;
3390 *arm_plt = &local_iplt->arm;
3391 return TRUE;
3392 }
3393
3394 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3395 before it. */
3396
3397 static bfd_boolean
3398 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3399 struct arm_plt_info *arm_plt)
3400 {
3401 struct elf32_arm_link_hash_table *htab;
3402
3403 htab = elf32_arm_hash_table (info);
3404 return (arm_plt->thumb_refcount != 0
3405 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3406 }
3407
3408 /* Return a pointer to the head of the dynamic reloc list that should
3409 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3410 ABFD's symbol table. Return null if an error occurs. */
3411
3412 static struct elf_dyn_relocs **
3413 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3414 Elf_Internal_Sym *isym)
3415 {
3416 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3417 {
3418 struct arm_local_iplt_info *local_iplt;
3419
3420 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3421 if (local_iplt == NULL)
3422 return NULL;
3423 return &local_iplt->dyn_relocs;
3424 }
3425 else
3426 {
3427 /* Track dynamic relocs needed for local syms too.
3428 We really need local syms available to do this
3429 easily. Oh well. */
3430 asection *s;
3431 void *vpp;
3432
3433 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3434 if (s == NULL)
3435 abort ();
3436
3437 vpp = &elf_section_data (s)->local_dynrel;
3438 return (struct elf_dyn_relocs **) vpp;
3439 }
3440 }
3441
3442 /* Initialize an entry in the stub hash table. */
3443
3444 static struct bfd_hash_entry *
3445 stub_hash_newfunc (struct bfd_hash_entry *entry,
3446 struct bfd_hash_table *table,
3447 const char *string)
3448 {
3449 /* Allocate the structure if it has not already been allocated by a
3450 subclass. */
3451 if (entry == NULL)
3452 {
3453 entry = (struct bfd_hash_entry *)
3454 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3455 if (entry == NULL)
3456 return entry;
3457 }
3458
3459 /* Call the allocation method of the superclass. */
3460 entry = bfd_hash_newfunc (entry, table, string);
3461 if (entry != NULL)
3462 {
3463 struct elf32_arm_stub_hash_entry *eh;
3464
3465 /* Initialize the local fields. */
3466 eh = (struct elf32_arm_stub_hash_entry *) entry;
3467 eh->stub_sec = NULL;
3468 eh->stub_offset = (bfd_vma) -1;
3469 eh->source_value = 0;
3470 eh->target_value = 0;
3471 eh->target_section = NULL;
3472 eh->orig_insn = 0;
3473 eh->stub_type = arm_stub_none;
3474 eh->stub_size = 0;
3475 eh->stub_template = NULL;
3476 eh->stub_template_size = -1;
3477 eh->h = NULL;
3478 eh->id_sec = NULL;
3479 eh->output_name = NULL;
3480 }
3481
3482 return entry;
3483 }
3484
3485 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3486 shortcuts to them in our hash table. */
3487
3488 static bfd_boolean
3489 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3490 {
3491 struct elf32_arm_link_hash_table *htab;
3492
3493 htab = elf32_arm_hash_table (info);
3494 if (htab == NULL)
3495 return FALSE;
3496
3497 /* BPABI objects never have a GOT, or associated sections. */
3498 if (htab->symbian_p)
3499 return TRUE;
3500
3501 if (! _bfd_elf_create_got_section (dynobj, info))
3502 return FALSE;
3503
3504 return TRUE;
3505 }
3506
3507 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3508
3509 static bfd_boolean
3510 create_ifunc_sections (struct bfd_link_info *info)
3511 {
3512 struct elf32_arm_link_hash_table *htab;
3513 const struct elf_backend_data *bed;
3514 bfd *dynobj;
3515 asection *s;
3516 flagword flags;
3517
3518 htab = elf32_arm_hash_table (info);
3519 dynobj = htab->root.dynobj;
3520 bed = get_elf_backend_data (dynobj);
3521 flags = bed->dynamic_sec_flags;
3522
3523 if (htab->root.iplt == NULL)
3524 {
3525 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3526 flags | SEC_READONLY | SEC_CODE);
3527 if (s == NULL
3528 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3529 return FALSE;
3530 htab->root.iplt = s;
3531 }
3532
3533 if (htab->root.irelplt == NULL)
3534 {
3535 s = bfd_make_section_anyway_with_flags (dynobj,
3536 RELOC_SECTION (htab, ".iplt"),
3537 flags | SEC_READONLY);
3538 if (s == NULL
3539 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3540 return FALSE;
3541 htab->root.irelplt = s;
3542 }
3543
3544 if (htab->root.igotplt == NULL)
3545 {
3546 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3547 if (s == NULL
3548 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3549 return FALSE;
3550 htab->root.igotplt = s;
3551 }
3552 return TRUE;
3553 }
3554
3555 /* Determine if we're dealing with a Thumb only architecture. */
3556
3557 static bfd_boolean
3558 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3559 {
3560 int arch;
3561 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3562 Tag_CPU_arch_profile);
3563
3564 if (profile)
3565 return profile == 'M';
3566
3567 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3568
3569 /* Force return logic to be reviewed for each new architecture. */
3570 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3571
3572 if (arch == TAG_CPU_ARCH_V6_M
3573 || arch == TAG_CPU_ARCH_V6S_M
3574 || arch == TAG_CPU_ARCH_V7E_M
3575 || arch == TAG_CPU_ARCH_V8M_BASE
3576 || arch == TAG_CPU_ARCH_V8M_MAIN)
3577 return TRUE;
3578
3579 return FALSE;
3580 }
3581
3582 /* Determine if we're dealing with a Thumb-2 object. */
3583
3584 static bfd_boolean
3585 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3586 {
3587 int arch;
3588 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3589 Tag_THUMB_ISA_use);
3590
3591 if (thumb_isa)
3592 return thumb_isa == 2;
3593
3594 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3595
3596 /* Force return logic to be reviewed for each new architecture. */
3597 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3598
3599 return (arch == TAG_CPU_ARCH_V6T2
3600 || arch == TAG_CPU_ARCH_V7
3601 || arch == TAG_CPU_ARCH_V7E_M
3602 || arch == TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8R
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3605 }
3606
3607 /* Determine whether Thumb-2 BL instruction is available. */
3608
3609 static bfd_boolean
3610 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3611 {
3612 int arch =
3613 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3614
3615 /* Force return logic to be reviewed for each new architecture. */
3616 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3617
3618 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3619 return (arch == TAG_CPU_ARCH_V6T2
3620 || arch >= TAG_CPU_ARCH_V7);
3621 }
3622
3623 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3624 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3625 hash table. */
3626
3627 static bfd_boolean
3628 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3629 {
3630 struct elf32_arm_link_hash_table *htab;
3631
3632 htab = elf32_arm_hash_table (info);
3633 if (htab == NULL)
3634 return FALSE;
3635
3636 if (!htab->root.sgot && !create_got_section (dynobj, info))
3637 return FALSE;
3638
3639 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3640 return FALSE;
3641
3642 if (htab->vxworks_p)
3643 {
3644 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3645 return FALSE;
3646
3647 if (bfd_link_pic (info))
3648 {
3649 htab->plt_header_size = 0;
3650 htab->plt_entry_size
3651 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3652 }
3653 else
3654 {
3655 htab->plt_header_size
3656 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3657 htab->plt_entry_size
3658 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3659 }
3660
3661 if (elf_elfheader (dynobj))
3662 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3663 }
3664 else
3665 {
3666 /* PR ld/16017
3667 Test for thumb only architectures. Note - we cannot just call
3668 using_thumb_only() as the attributes in the output bfd have not been
3669 initialised at this point, so instead we use the input bfd. */
3670 bfd * saved_obfd = htab->obfd;
3671
3672 htab->obfd = dynobj;
3673 if (using_thumb_only (htab))
3674 {
3675 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3676 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3677 }
3678 htab->obfd = saved_obfd;
3679 }
3680
3681 if (!htab->root.splt
3682 || !htab->root.srelplt
3683 || !htab->root.sdynbss
3684 || (!bfd_link_pic (info) && !htab->root.srelbss))
3685 abort ();
3686
3687 return TRUE;
3688 }
3689
3690 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3691
3692 static void
3693 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3694 struct elf_link_hash_entry *dir,
3695 struct elf_link_hash_entry *ind)
3696 {
3697 struct elf32_arm_link_hash_entry *edir, *eind;
3698
3699 edir = (struct elf32_arm_link_hash_entry *) dir;
3700 eind = (struct elf32_arm_link_hash_entry *) ind;
3701
3702 if (eind->dyn_relocs != NULL)
3703 {
3704 if (edir->dyn_relocs != NULL)
3705 {
3706 struct elf_dyn_relocs **pp;
3707 struct elf_dyn_relocs *p;
3708
3709 /* Add reloc counts against the indirect sym to the direct sym
3710 list. Merge any entries against the same section. */
3711 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3712 {
3713 struct elf_dyn_relocs *q;
3714
3715 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3716 if (q->sec == p->sec)
3717 {
3718 q->pc_count += p->pc_count;
3719 q->count += p->count;
3720 *pp = p->next;
3721 break;
3722 }
3723 if (q == NULL)
3724 pp = &p->next;
3725 }
3726 *pp = edir->dyn_relocs;
3727 }
3728
3729 edir->dyn_relocs = eind->dyn_relocs;
3730 eind->dyn_relocs = NULL;
3731 }
3732
3733 if (ind->root.type == bfd_link_hash_indirect)
3734 {
3735 /* Copy over PLT info. */
3736 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3737 eind->plt.thumb_refcount = 0;
3738 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3739 eind->plt.maybe_thumb_refcount = 0;
3740 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3741 eind->plt.noncall_refcount = 0;
3742
3743 /* We should only allocate a function to .iplt once the final
3744 symbol information is known. */
3745 BFD_ASSERT (!eind->is_iplt);
3746
3747 if (dir->got.refcount <= 0)
3748 {
3749 edir->tls_type = eind->tls_type;
3750 eind->tls_type = GOT_UNKNOWN;
3751 }
3752 }
3753
3754 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3755 }
3756
3757 /* Destroy an ARM elf linker hash table. */
3758
3759 static void
3760 elf32_arm_link_hash_table_free (bfd *obfd)
3761 {
3762 struct elf32_arm_link_hash_table *ret
3763 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3764
3765 bfd_hash_table_free (&ret->stub_hash_table);
3766 _bfd_elf_link_hash_table_free (obfd);
3767 }
3768
3769 /* Create an ARM elf linker hash table. */
3770
3771 static struct bfd_link_hash_table *
3772 elf32_arm_link_hash_table_create (bfd *abfd)
3773 {
3774 struct elf32_arm_link_hash_table *ret;
3775 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3776
3777 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3778 if (ret == NULL)
3779 return NULL;
3780
3781 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3782 elf32_arm_link_hash_newfunc,
3783 sizeof (struct elf32_arm_link_hash_entry),
3784 ARM_ELF_DATA))
3785 {
3786 free (ret);
3787 return NULL;
3788 }
3789
3790 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3791 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3792 #ifdef FOUR_WORD_PLT
3793 ret->plt_header_size = 16;
3794 ret->plt_entry_size = 16;
3795 #else
3796 ret->plt_header_size = 20;
3797 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3798 #endif
3799 ret->use_rel = 1;
3800 ret->obfd = abfd;
3801
3802 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3803 sizeof (struct elf32_arm_stub_hash_entry)))
3804 {
3805 _bfd_elf_link_hash_table_free (abfd);
3806 return NULL;
3807 }
3808 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3809
3810 return &ret->root.root;
3811 }
3812
3813 /* Determine what kind of NOPs are available. */
3814
3815 static bfd_boolean
3816 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3817 {
3818 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3819 Tag_CPU_arch);
3820
3821 /* Force return logic to be reviewed for each new architecture. */
3822 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3823
3824 return (arch == TAG_CPU_ARCH_V6T2
3825 || arch == TAG_CPU_ARCH_V6K
3826 || arch == TAG_CPU_ARCH_V7
3827 || arch == TAG_CPU_ARCH_V8
3828 || arch == TAG_CPU_ARCH_V8R);
3829 }
3830
3831 static bfd_boolean
3832 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3833 {
3834 switch (stub_type)
3835 {
3836 case arm_stub_long_branch_thumb_only:
3837 case arm_stub_long_branch_thumb2_only:
3838 case arm_stub_long_branch_thumb2_only_pure:
3839 case arm_stub_long_branch_v4t_thumb_arm:
3840 case arm_stub_short_branch_v4t_thumb_arm:
3841 case arm_stub_long_branch_v4t_thumb_arm_pic:
3842 case arm_stub_long_branch_v4t_thumb_tls_pic:
3843 case arm_stub_long_branch_thumb_only_pic:
3844 case arm_stub_cmse_branch_thumb_only:
3845 return TRUE;
3846 case arm_stub_none:
3847 BFD_FAIL ();
3848 return FALSE;
3849 break;
3850 default:
3851 return FALSE;
3852 }
3853 }
3854
3855 /* Determine the type of stub needed, if any, for a call. */
3856
3857 static enum elf32_arm_stub_type
3858 arm_type_of_stub (struct bfd_link_info *info,
3859 asection *input_sec,
3860 const Elf_Internal_Rela *rel,
3861 unsigned char st_type,
3862 enum arm_st_branch_type *actual_branch_type,
3863 struct elf32_arm_link_hash_entry *hash,
3864 bfd_vma destination,
3865 asection *sym_sec,
3866 bfd *input_bfd,
3867 const char *name)
3868 {
3869 bfd_vma location;
3870 bfd_signed_vma branch_offset;
3871 unsigned int r_type;
3872 struct elf32_arm_link_hash_table * globals;
3873 bfd_boolean thumb2, thumb2_bl, thumb_only;
3874 enum elf32_arm_stub_type stub_type = arm_stub_none;
3875 int use_plt = 0;
3876 enum arm_st_branch_type branch_type = *actual_branch_type;
3877 union gotplt_union *root_plt;
3878 struct arm_plt_info *arm_plt;
3879 int arch;
3880 int thumb2_movw;
3881
3882 if (branch_type == ST_BRANCH_LONG)
3883 return stub_type;
3884
3885 globals = elf32_arm_hash_table (info);
3886 if (globals == NULL)
3887 return stub_type;
3888
3889 thumb_only = using_thumb_only (globals);
3890 thumb2 = using_thumb2 (globals);
3891 thumb2_bl = using_thumb2_bl (globals);
3892
3893 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3894
3895 /* True for architectures that implement the thumb2 movw instruction. */
3896 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3897
3898 /* Determine where the call point is. */
3899 location = (input_sec->output_offset
3900 + input_sec->output_section->vma
3901 + rel->r_offset);
3902
3903 r_type = ELF32_R_TYPE (rel->r_info);
3904
3905 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3906 are considering a function call relocation. */
3907 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3908 || r_type == R_ARM_THM_JUMP19)
3909 && branch_type == ST_BRANCH_TO_ARM)
3910 branch_type = ST_BRANCH_TO_THUMB;
3911
3912 /* For TLS call relocs, it is the caller's responsibility to provide
3913 the address of the appropriate trampoline. */
3914 if (r_type != R_ARM_TLS_CALL
3915 && r_type != R_ARM_THM_TLS_CALL
3916 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3917 ELF32_R_SYM (rel->r_info), &root_plt,
3918 &arm_plt)
3919 && root_plt->offset != (bfd_vma) -1)
3920 {
3921 asection *splt;
3922
3923 if (hash == NULL || hash->is_iplt)
3924 splt = globals->root.iplt;
3925 else
3926 splt = globals->root.splt;
3927 if (splt != NULL)
3928 {
3929 use_plt = 1;
3930
3931 /* Note when dealing with PLT entries: the main PLT stub is in
3932 ARM mode, so if the branch is in Thumb mode, another
3933 Thumb->ARM stub will be inserted later just before the ARM
3934 PLT stub. If a long branch stub is needed, we'll add a
3935 Thumb->Arm one and branch directly to the ARM PLT entry.
3936 Here, we have to check if a pre-PLT Thumb->ARM stub
3937 is needed and if it will be close enough. */
3938
3939 destination = (splt->output_section->vma
3940 + splt->output_offset
3941 + root_plt->offset);
3942 st_type = STT_FUNC;
3943
3944 /* Thumb branch/call to PLT: it can become a branch to ARM
3945 or to Thumb. We must perform the same checks and
3946 corrections as in elf32_arm_final_link_relocate. */
3947 if ((r_type == R_ARM_THM_CALL)
3948 || (r_type == R_ARM_THM_JUMP24))
3949 {
3950 if (globals->use_blx
3951 && r_type == R_ARM_THM_CALL
3952 && !thumb_only)
3953 {
3954 /* If the Thumb BLX instruction is available, convert
3955 the BL to a BLX instruction to call the ARM-mode
3956 PLT entry. */
3957 branch_type = ST_BRANCH_TO_ARM;
3958 }
3959 else
3960 {
3961 if (!thumb_only)
3962 /* Target the Thumb stub before the ARM PLT entry. */
3963 destination -= PLT_THUMB_STUB_SIZE;
3964 branch_type = ST_BRANCH_TO_THUMB;
3965 }
3966 }
3967 else
3968 {
3969 branch_type = ST_BRANCH_TO_ARM;
3970 }
3971 }
3972 }
3973 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3974 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3975
3976 branch_offset = (bfd_signed_vma)(destination - location);
3977
3978 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3979 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3980 {
3981 /* Handle cases where:
3982 - this call goes too far (different Thumb/Thumb2 max
3983 distance)
3984 - it's a Thumb->Arm call and blx is not available, or it's a
3985 Thumb->Arm branch (not bl). A stub is needed in this case,
3986 but only if this call is not through a PLT entry. Indeed,
3987 PLT stubs handle mode switching already. */
3988 if ((!thumb2_bl
3989 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3990 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3991 || (thumb2_bl
3992 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3993 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3994 || (thumb2
3995 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3996 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3997 && (r_type == R_ARM_THM_JUMP19))
3998 || (branch_type == ST_BRANCH_TO_ARM
3999 && (((r_type == R_ARM_THM_CALL
4000 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4001 || (r_type == R_ARM_THM_JUMP24)
4002 || (r_type == R_ARM_THM_JUMP19))
4003 && !use_plt))
4004 {
4005 /* If we need to insert a Thumb-Thumb long branch stub to a
4006 PLT, use one that branches directly to the ARM PLT
4007 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4008 stub, undo this now. */
4009 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4010 {
4011 branch_type = ST_BRANCH_TO_ARM;
4012 branch_offset += PLT_THUMB_STUB_SIZE;
4013 }
4014
4015 if (branch_type == ST_BRANCH_TO_THUMB)
4016 {
4017 /* Thumb to thumb. */
4018 if (!thumb_only)
4019 {
4020 if (input_sec->flags & SEC_ELF_PURECODE)
4021 _bfd_error_handler
4022 (_("%pB(%pA): warning: long branch veneers used in"
4023 " section with SHF_ARM_PURECODE section"
4024 " attribute is only supported for M-profile"
4025 " targets that implement the movw instruction."),
4026 input_bfd, input_sec);
4027
4028 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4029 /* PIC stubs. */
4030 ? ((globals->use_blx
4031 && (r_type == R_ARM_THM_CALL))
4032 /* V5T and above. Stub starts with ARM code, so
4033 we must be able to switch mode before
4034 reaching it, which is only possible for 'bl'
4035 (ie R_ARM_THM_CALL relocation). */
4036 ? arm_stub_long_branch_any_thumb_pic
4037 /* On V4T, use Thumb code only. */
4038 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4039
4040 /* non-PIC stubs. */
4041 : ((globals->use_blx
4042 && (r_type == R_ARM_THM_CALL))
4043 /* V5T and above. */
4044 ? arm_stub_long_branch_any_any
4045 /* V4T. */
4046 : arm_stub_long_branch_v4t_thumb_thumb);
4047 }
4048 else
4049 {
4050 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4051 stub_type = arm_stub_long_branch_thumb2_only_pure;
4052 else
4053 {
4054 if (input_sec->flags & SEC_ELF_PURECODE)
4055 _bfd_error_handler
4056 (_("%pB(%pA): warning: long branch veneers used in"
4057 " section with SHF_ARM_PURECODE section"
4058 " attribute is only supported for M-profile"
4059 " targets that implement the movw instruction."),
4060 input_bfd, input_sec);
4061
4062 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4063 /* PIC stub. */
4064 ? arm_stub_long_branch_thumb_only_pic
4065 /* non-PIC stub. */
4066 : (thumb2 ? arm_stub_long_branch_thumb2_only
4067 : arm_stub_long_branch_thumb_only);
4068 }
4069 }
4070 }
4071 else
4072 {
4073 if (input_sec->flags & SEC_ELF_PURECODE)
4074 _bfd_error_handler
4075 (_("%pB(%pA): warning: long branch veneers used in"
4076 " section with SHF_ARM_PURECODE section"
4077 " attribute is only supported" " for M-profile"
4078 " targets that implement the movw instruction."),
4079 input_bfd, input_sec);
4080
4081 /* Thumb to arm. */
4082 if (sym_sec != NULL
4083 && sym_sec->owner != NULL
4084 && !INTERWORK_FLAG (sym_sec->owner))
4085 {
4086 _bfd_error_handler
4087 (_("%pB(%s): warning: interworking not enabled.\n"
4088 " first occurrence: %pB: Thumb call to ARM"),
4089 sym_sec->owner, name, input_bfd);
4090 }
4091
4092 stub_type =
4093 (bfd_link_pic (info) | globals->pic_veneer)
4094 /* PIC stubs. */
4095 ? (r_type == R_ARM_THM_TLS_CALL
4096 /* TLS PIC stubs. */
4097 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4098 : arm_stub_long_branch_v4t_thumb_tls_pic)
4099 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4100 /* V5T PIC and above. */
4101 ? arm_stub_long_branch_any_arm_pic
4102 /* V4T PIC stub. */
4103 : arm_stub_long_branch_v4t_thumb_arm_pic))
4104
4105 /* non-PIC stubs. */
4106 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4107 /* V5T and above. */
4108 ? arm_stub_long_branch_any_any
4109 /* V4T. */
4110 : arm_stub_long_branch_v4t_thumb_arm);
4111
4112 /* Handle v4t short branches. */
4113 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4114 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4115 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4116 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4117 }
4118 }
4119 }
4120 else if (r_type == R_ARM_CALL
4121 || r_type == R_ARM_JUMP24
4122 || r_type == R_ARM_PLT32
4123 || r_type == R_ARM_TLS_CALL)
4124 {
4125 if (input_sec->flags & SEC_ELF_PURECODE)
4126 _bfd_error_handler
4127 (_("%pB(%pA): warning: long branch veneers used in"
4128 " section with SHF_ARM_PURECODE section"
4129 " attribute is only supported for M-profile"
4130 " targets that implement the movw instruction."),
4131 input_bfd, input_sec);
4132 if (branch_type == ST_BRANCH_TO_THUMB)
4133 {
4134 /* Arm to thumb. */
4135
4136 if (sym_sec != NULL
4137 && sym_sec->owner != NULL
4138 && !INTERWORK_FLAG (sym_sec->owner))
4139 {
4140 _bfd_error_handler
4141 (_("%pB(%s): warning: interworking not enabled.\n"
4142 " first occurrence: %pB: ARM call to Thumb"),
4143 sym_sec->owner, name, input_bfd);
4144 }
4145
4146 /* We have an extra 2-bytes reach because of
4147 the mode change (bit 24 (H) of BLX encoding). */
4148 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4149 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4150 || (r_type == R_ARM_CALL && !globals->use_blx)
4151 || (r_type == R_ARM_JUMP24)
4152 || (r_type == R_ARM_PLT32))
4153 {
4154 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4155 /* PIC stubs. */
4156 ? ((globals->use_blx)
4157 /* V5T and above. */
4158 ? arm_stub_long_branch_any_thumb_pic
4159 /* V4T stub. */
4160 : arm_stub_long_branch_v4t_arm_thumb_pic)
4161
4162 /* non-PIC stubs. */
4163 : ((globals->use_blx)
4164 /* V5T and above. */
4165 ? arm_stub_long_branch_any_any
4166 /* V4T. */
4167 : arm_stub_long_branch_v4t_arm_thumb);
4168 }
4169 }
4170 else
4171 {
4172 /* Arm to arm. */
4173 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4174 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4175 {
4176 stub_type =
4177 (bfd_link_pic (info) | globals->pic_veneer)
4178 /* PIC stubs. */
4179 ? (r_type == R_ARM_TLS_CALL
4180 /* TLS PIC Stub. */
4181 ? arm_stub_long_branch_any_tls_pic
4182 : (globals->nacl_p
4183 ? arm_stub_long_branch_arm_nacl_pic
4184 : arm_stub_long_branch_any_arm_pic))
4185 /* non-PIC stubs. */
4186 : (globals->nacl_p
4187 ? arm_stub_long_branch_arm_nacl
4188 : arm_stub_long_branch_any_any);
4189 }
4190 }
4191 }
4192
4193 /* If a stub is needed, record the actual destination type. */
4194 if (stub_type != arm_stub_none)
4195 *actual_branch_type = branch_type;
4196
4197 return stub_type;
4198 }
4199
4200 /* Build a name for an entry in the stub hash table. */
4201
4202 static char *
4203 elf32_arm_stub_name (const asection *input_section,
4204 const asection *sym_sec,
4205 const struct elf32_arm_link_hash_entry *hash,
4206 const Elf_Internal_Rela *rel,
4207 enum elf32_arm_stub_type stub_type)
4208 {
4209 char *stub_name;
4210 bfd_size_type len;
4211
4212 if (hash)
4213 {
4214 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4215 stub_name = (char *) bfd_malloc (len);
4216 if (stub_name != NULL)
4217 sprintf (stub_name, "%08x_%s+%x_%d",
4218 input_section->id & 0xffffffff,
4219 hash->root.root.root.string,
4220 (int) rel->r_addend & 0xffffffff,
4221 (int) stub_type);
4222 }
4223 else
4224 {
4225 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4226 stub_name = (char *) bfd_malloc (len);
4227 if (stub_name != NULL)
4228 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4229 input_section->id & 0xffffffff,
4230 sym_sec->id & 0xffffffff,
4231 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4232 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4233 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4234 (int) rel->r_addend & 0xffffffff,
4235 (int) stub_type);
4236 }
4237
4238 return stub_name;
4239 }
4240
4241 /* Look up an entry in the stub hash. Stub entries are cached because
4242 creating the stub name takes a bit of time. */
4243
4244 static struct elf32_arm_stub_hash_entry *
4245 elf32_arm_get_stub_entry (const asection *input_section,
4246 const asection *sym_sec,
4247 struct elf_link_hash_entry *hash,
4248 const Elf_Internal_Rela *rel,
4249 struct elf32_arm_link_hash_table *htab,
4250 enum elf32_arm_stub_type stub_type)
4251 {
4252 struct elf32_arm_stub_hash_entry *stub_entry;
4253 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4254 const asection *id_sec;
4255
4256 if ((input_section->flags & SEC_CODE) == 0)
4257 return NULL;
4258
4259 /* If this input section is part of a group of sections sharing one
4260 stub section, then use the id of the first section in the group.
4261 Stub names need to include a section id, as there may well be
4262 more than one stub used to reach say, printf, and we need to
4263 distinguish between them. */
4264 BFD_ASSERT (input_section->id <= htab->top_id);
4265 id_sec = htab->stub_group[input_section->id].link_sec;
4266
4267 if (h != NULL && h->stub_cache != NULL
4268 && h->stub_cache->h == h
4269 && h->stub_cache->id_sec == id_sec
4270 && h->stub_cache->stub_type == stub_type)
4271 {
4272 stub_entry = h->stub_cache;
4273 }
4274 else
4275 {
4276 char *stub_name;
4277
4278 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4279 if (stub_name == NULL)
4280 return NULL;
4281
4282 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4283 stub_name, FALSE, FALSE);
4284 if (h != NULL)
4285 h->stub_cache = stub_entry;
4286
4287 free (stub_name);
4288 }
4289
4290 return stub_entry;
4291 }
4292
4293 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4294 section. */
4295
4296 static bfd_boolean
4297 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4298 {
4299 if (stub_type >= max_stub_type)
4300 abort (); /* Should be unreachable. */
4301
4302 switch (stub_type)
4303 {
4304 case arm_stub_cmse_branch_thumb_only:
4305 return TRUE;
4306
4307 default:
4308 return FALSE;
4309 }
4310
4311 abort (); /* Should be unreachable. */
4312 }
4313
4314 /* Required alignment (as a power of 2) for the dedicated section holding
4315 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4316 with input sections. */
4317
4318 static int
4319 arm_dedicated_stub_output_section_required_alignment
4320 (enum elf32_arm_stub_type stub_type)
4321 {
4322 if (stub_type >= max_stub_type)
4323 abort (); /* Should be unreachable. */
4324
4325 switch (stub_type)
4326 {
4327 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4328 boundary. */
4329 case arm_stub_cmse_branch_thumb_only:
4330 return 5;
4331
4332 default:
4333 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4334 return 0;
4335 }
4336
4337 abort (); /* Should be unreachable. */
4338 }
4339
4340 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4341 NULL if veneers of this type are interspersed with input sections. */
4342
4343 static const char *
4344 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4345 {
4346 if (stub_type >= max_stub_type)
4347 abort (); /* Should be unreachable. */
4348
4349 switch (stub_type)
4350 {
4351 case arm_stub_cmse_branch_thumb_only:
4352 return ".gnu.sgstubs";
4353
4354 default:
4355 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4356 return NULL;
4357 }
4358
4359 abort (); /* Should be unreachable. */
4360 }
4361
4362 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4363 returns the address of the hash table field in HTAB holding a pointer to the
4364 corresponding input section. Otherwise, returns NULL. */
4365
4366 static asection **
4367 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4368 enum elf32_arm_stub_type stub_type)
4369 {
4370 if (stub_type >= max_stub_type)
4371 abort (); /* Should be unreachable. */
4372
4373 switch (stub_type)
4374 {
4375 case arm_stub_cmse_branch_thumb_only:
4376 return &htab->cmse_stub_sec;
4377
4378 default:
4379 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4380 return NULL;
4381 }
4382
4383 abort (); /* Should be unreachable. */
4384 }
4385
4386 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4387 is the section that branch into veneer and can be NULL if stub should go in
4388 a dedicated output section. Returns a pointer to the stub section, and the
4389 section to which the stub section will be attached (in *LINK_SEC_P).
4390 LINK_SEC_P may be NULL. */
4391
4392 static asection *
4393 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4394 struct elf32_arm_link_hash_table *htab,
4395 enum elf32_arm_stub_type stub_type)
4396 {
4397 asection *link_sec, *out_sec, **stub_sec_p;
4398 const char *stub_sec_prefix;
4399 bfd_boolean dedicated_output_section =
4400 arm_dedicated_stub_output_section_required (stub_type);
4401 int align;
4402
4403 if (dedicated_output_section)
4404 {
4405 bfd *output_bfd = htab->obfd;
4406 const char *out_sec_name =
4407 arm_dedicated_stub_output_section_name (stub_type);
4408 link_sec = NULL;
4409 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4410 stub_sec_prefix = out_sec_name;
4411 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4412 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4413 if (out_sec == NULL)
4414 {
4415 _bfd_error_handler (_("No address assigned to the veneers output "
4416 "section %s"), out_sec_name);
4417 return NULL;
4418 }
4419 }
4420 else
4421 {
4422 BFD_ASSERT (section->id <= htab->top_id);
4423 link_sec = htab->stub_group[section->id].link_sec;
4424 BFD_ASSERT (link_sec != NULL);
4425 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4426 if (*stub_sec_p == NULL)
4427 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4428 stub_sec_prefix = link_sec->name;
4429 out_sec = link_sec->output_section;
4430 align = htab->nacl_p ? 4 : 3;
4431 }
4432
4433 if (*stub_sec_p == NULL)
4434 {
4435 size_t namelen;
4436 bfd_size_type len;
4437 char *s_name;
4438
4439 namelen = strlen (stub_sec_prefix);
4440 len = namelen + sizeof (STUB_SUFFIX);
4441 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4442 if (s_name == NULL)
4443 return NULL;
4444
4445 memcpy (s_name, stub_sec_prefix, namelen);
4446 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4447 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4448 align);
4449 if (*stub_sec_p == NULL)
4450 return NULL;
4451
4452 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4453 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4454 | SEC_KEEP;
4455 }
4456
4457 if (!dedicated_output_section)
4458 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4459
4460 if (link_sec_p)
4461 *link_sec_p = link_sec;
4462
4463 return *stub_sec_p;
4464 }
4465
4466 /* Add a new stub entry to the stub hash. Not all fields of the new
4467 stub entry are initialised. */
4468
4469 static struct elf32_arm_stub_hash_entry *
4470 elf32_arm_add_stub (const char *stub_name, asection *section,
4471 struct elf32_arm_link_hash_table *htab,
4472 enum elf32_arm_stub_type stub_type)
4473 {
4474 asection *link_sec;
4475 asection *stub_sec;
4476 struct elf32_arm_stub_hash_entry *stub_entry;
4477
4478 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4479 stub_type);
4480 if (stub_sec == NULL)
4481 return NULL;
4482
4483 /* Enter this entry into the linker stub hash table. */
4484 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4485 TRUE, FALSE);
4486 if (stub_entry == NULL)
4487 {
4488 if (section == NULL)
4489 section = stub_sec;
4490 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4491 section->owner, stub_name);
4492 return NULL;
4493 }
4494
4495 stub_entry->stub_sec = stub_sec;
4496 stub_entry->stub_offset = (bfd_vma) -1;
4497 stub_entry->id_sec = link_sec;
4498
4499 return stub_entry;
4500 }
4501
4502 /* Store an Arm insn into an output section not processed by
4503 elf32_arm_write_section. */
4504
4505 static void
4506 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4507 bfd * output_bfd, bfd_vma val, void * ptr)
4508 {
4509 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4510 bfd_putl32 (val, ptr);
4511 else
4512 bfd_putb32 (val, ptr);
4513 }
4514
4515 /* Store a 16-bit Thumb insn into an output section not processed by
4516 elf32_arm_write_section. */
4517
4518 static void
4519 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4520 bfd * output_bfd, bfd_vma val, void * ptr)
4521 {
4522 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4523 bfd_putl16 (val, ptr);
4524 else
4525 bfd_putb16 (val, ptr);
4526 }
4527
4528 /* Store a Thumb2 insn into an output section not processed by
4529 elf32_arm_write_section. */
4530
4531 static void
4532 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4533 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4534 {
4535 /* T2 instructions are 16-bit streamed. */
4536 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4537 {
4538 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4539 bfd_putl16 ((val & 0xffff), ptr + 2);
4540 }
4541 else
4542 {
4543 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4544 bfd_putb16 ((val & 0xffff), ptr + 2);
4545 }
4546 }
4547
4548 /* If it's possible to change R_TYPE to a more efficient access
4549 model, return the new reloc type. */
4550
4551 static unsigned
4552 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4553 struct elf_link_hash_entry *h)
4554 {
4555 int is_local = (h == NULL);
4556
4557 if (bfd_link_pic (info)
4558 || (h && h->root.type == bfd_link_hash_undefweak))
4559 return r_type;
4560
4561 /* We do not support relaxations for Old TLS models. */
4562 switch (r_type)
4563 {
4564 case R_ARM_TLS_GOTDESC:
4565 case R_ARM_TLS_CALL:
4566 case R_ARM_THM_TLS_CALL:
4567 case R_ARM_TLS_DESCSEQ:
4568 case R_ARM_THM_TLS_DESCSEQ:
4569 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4570 }
4571
4572 return r_type;
4573 }
4574
4575 static bfd_reloc_status_type elf32_arm_final_link_relocate
4576 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4577 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4578 const char *, unsigned char, enum arm_st_branch_type,
4579 struct elf_link_hash_entry *, bfd_boolean *, char **);
4580
4581 static unsigned int
4582 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4583 {
4584 switch (stub_type)
4585 {
4586 case arm_stub_a8_veneer_b_cond:
4587 case arm_stub_a8_veneer_b:
4588 case arm_stub_a8_veneer_bl:
4589 return 2;
4590
4591 case arm_stub_long_branch_any_any:
4592 case arm_stub_long_branch_v4t_arm_thumb:
4593 case arm_stub_long_branch_thumb_only:
4594 case arm_stub_long_branch_thumb2_only:
4595 case arm_stub_long_branch_thumb2_only_pure:
4596 case arm_stub_long_branch_v4t_thumb_thumb:
4597 case arm_stub_long_branch_v4t_thumb_arm:
4598 case arm_stub_short_branch_v4t_thumb_arm:
4599 case arm_stub_long_branch_any_arm_pic:
4600 case arm_stub_long_branch_any_thumb_pic:
4601 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4602 case arm_stub_long_branch_v4t_arm_thumb_pic:
4603 case arm_stub_long_branch_v4t_thumb_arm_pic:
4604 case arm_stub_long_branch_thumb_only_pic:
4605 case arm_stub_long_branch_any_tls_pic:
4606 case arm_stub_long_branch_v4t_thumb_tls_pic:
4607 case arm_stub_cmse_branch_thumb_only:
4608 case arm_stub_a8_veneer_blx:
4609 return 4;
4610
4611 case arm_stub_long_branch_arm_nacl:
4612 case arm_stub_long_branch_arm_nacl_pic:
4613 return 16;
4614
4615 default:
4616 abort (); /* Should be unreachable. */
4617 }
4618 }
4619
4620 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4621 veneering (TRUE) or have their own symbol (FALSE). */
4622
4623 static bfd_boolean
4624 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4625 {
4626 if (stub_type >= max_stub_type)
4627 abort (); /* Should be unreachable. */
4628
4629 switch (stub_type)
4630 {
4631 case arm_stub_cmse_branch_thumb_only:
4632 return TRUE;
4633
4634 default:
4635 return FALSE;
4636 }
4637
4638 abort (); /* Should be unreachable. */
4639 }
4640
4641 /* Returns the padding needed for the dedicated section used stubs of type
4642 STUB_TYPE. */
4643
4644 static int
4645 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4646 {
4647 if (stub_type >= max_stub_type)
4648 abort (); /* Should be unreachable. */
4649
4650 switch (stub_type)
4651 {
4652 case arm_stub_cmse_branch_thumb_only:
4653 return 32;
4654
4655 default:
4656 return 0;
4657 }
4658
4659 abort (); /* Should be unreachable. */
4660 }
4661
4662 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4663 returns the address of the hash table field in HTAB holding the offset at
4664 which new veneers should be layed out in the stub section. */
4665
4666 static bfd_vma*
4667 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4668 enum elf32_arm_stub_type stub_type)
4669 {
4670 switch (stub_type)
4671 {
4672 case arm_stub_cmse_branch_thumb_only:
4673 return &htab->new_cmse_stub_offset;
4674
4675 default:
4676 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4677 return NULL;
4678 }
4679 }
4680
4681 static bfd_boolean
4682 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4683 void * in_arg)
4684 {
4685 #define MAXRELOCS 3
4686 bfd_boolean removed_sg_veneer;
4687 struct elf32_arm_stub_hash_entry *stub_entry;
4688 struct elf32_arm_link_hash_table *globals;
4689 struct bfd_link_info *info;
4690 asection *stub_sec;
4691 bfd *stub_bfd;
4692 bfd_byte *loc;
4693 bfd_vma sym_value;
4694 int template_size;
4695 int size;
4696 const insn_sequence *template_sequence;
4697 int i;
4698 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4699 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4700 int nrelocs = 0;
4701 int just_allocated = 0;
4702
4703 /* Massage our args to the form they really have. */
4704 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4705 info = (struct bfd_link_info *) in_arg;
4706
4707 globals = elf32_arm_hash_table (info);
4708 if (globals == NULL)
4709 return FALSE;
4710
4711 stub_sec = stub_entry->stub_sec;
4712
4713 if ((globals->fix_cortex_a8 < 0)
4714 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4715 /* We have to do less-strictly-aligned fixes last. */
4716 return TRUE;
4717
4718 /* Assign a slot at the end of section if none assigned yet. */
4719 if (stub_entry->stub_offset == (bfd_vma) -1)
4720 {
4721 stub_entry->stub_offset = stub_sec->size;
4722 just_allocated = 1;
4723 }
4724 loc = stub_sec->contents + stub_entry->stub_offset;
4725
4726 stub_bfd = stub_sec->owner;
4727
4728 /* This is the address of the stub destination. */
4729 sym_value = (stub_entry->target_value
4730 + stub_entry->target_section->output_offset
4731 + stub_entry->target_section->output_section->vma);
4732
4733 template_sequence = stub_entry->stub_template;
4734 template_size = stub_entry->stub_template_size;
4735
4736 size = 0;
4737 for (i = 0; i < template_size; i++)
4738 {
4739 switch (template_sequence[i].type)
4740 {
4741 case THUMB16_TYPE:
4742 {
4743 bfd_vma data = (bfd_vma) template_sequence[i].data;
4744 if (template_sequence[i].reloc_addend != 0)
4745 {
4746 /* We've borrowed the reloc_addend field to mean we should
4747 insert a condition code into this (Thumb-1 branch)
4748 instruction. See THUMB16_BCOND_INSN. */
4749 BFD_ASSERT ((data & 0xff00) == 0xd000);
4750 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4751 }
4752 bfd_put_16 (stub_bfd, data, loc + size);
4753 size += 2;
4754 }
4755 break;
4756
4757 case THUMB32_TYPE:
4758 bfd_put_16 (stub_bfd,
4759 (template_sequence[i].data >> 16) & 0xffff,
4760 loc + size);
4761 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4762 loc + size + 2);
4763 if (template_sequence[i].r_type != R_ARM_NONE)
4764 {
4765 stub_reloc_idx[nrelocs] = i;
4766 stub_reloc_offset[nrelocs++] = size;
4767 }
4768 size += 4;
4769 break;
4770
4771 case ARM_TYPE:
4772 bfd_put_32 (stub_bfd, template_sequence[i].data,
4773 loc + size);
4774 /* Handle cases where the target is encoded within the
4775 instruction. */
4776 if (template_sequence[i].r_type == R_ARM_JUMP24)
4777 {
4778 stub_reloc_idx[nrelocs] = i;
4779 stub_reloc_offset[nrelocs++] = size;
4780 }
4781 size += 4;
4782 break;
4783
4784 case DATA_TYPE:
4785 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4786 stub_reloc_idx[nrelocs] = i;
4787 stub_reloc_offset[nrelocs++] = size;
4788 size += 4;
4789 break;
4790
4791 default:
4792 BFD_FAIL ();
4793 return FALSE;
4794 }
4795 }
4796
4797 if (just_allocated)
4798 stub_sec->size += size;
4799
4800 /* Stub size has already been computed in arm_size_one_stub. Check
4801 consistency. */
4802 BFD_ASSERT (size == stub_entry->stub_size);
4803
4804 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4805 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4806 sym_value |= 1;
4807
4808 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4809 to relocate in each stub. */
4810 removed_sg_veneer =
4811 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4812 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4813
4814 for (i = 0; i < nrelocs; i++)
4815 {
4816 Elf_Internal_Rela rel;
4817 bfd_boolean unresolved_reloc;
4818 char *error_message;
4819 bfd_vma points_to =
4820 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4821
4822 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4823 rel.r_info = ELF32_R_INFO (0,
4824 template_sequence[stub_reloc_idx[i]].r_type);
4825 rel.r_addend = 0;
4826
4827 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4828 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4829 template should refer back to the instruction after the original
4830 branch. We use target_section as Cortex-A8 erratum workaround stubs
4831 are only generated when both source and target are in the same
4832 section. */
4833 points_to = stub_entry->target_section->output_section->vma
4834 + stub_entry->target_section->output_offset
4835 + stub_entry->source_value;
4836
4837 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4838 (template_sequence[stub_reloc_idx[i]].r_type),
4839 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4840 points_to, info, stub_entry->target_section, "", STT_FUNC,
4841 stub_entry->branch_type,
4842 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4843 &error_message);
4844 }
4845
4846 return TRUE;
4847 #undef MAXRELOCS
4848 }
4849
4850 /* Calculate the template, template size and instruction size for a stub.
4851 Return value is the instruction size. */
4852
4853 static unsigned int
4854 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4855 const insn_sequence **stub_template,
4856 int *stub_template_size)
4857 {
4858 const insn_sequence *template_sequence = NULL;
4859 int template_size = 0, i;
4860 unsigned int size;
4861
4862 template_sequence = stub_definitions[stub_type].template_sequence;
4863 if (stub_template)
4864 *stub_template = template_sequence;
4865
4866 template_size = stub_definitions[stub_type].template_size;
4867 if (stub_template_size)
4868 *stub_template_size = template_size;
4869
4870 size = 0;
4871 for (i = 0; i < template_size; i++)
4872 {
4873 switch (template_sequence[i].type)
4874 {
4875 case THUMB16_TYPE:
4876 size += 2;
4877 break;
4878
4879 case ARM_TYPE:
4880 case THUMB32_TYPE:
4881 case DATA_TYPE:
4882 size += 4;
4883 break;
4884
4885 default:
4886 BFD_FAIL ();
4887 return 0;
4888 }
4889 }
4890
4891 return size;
4892 }
4893
4894 /* As above, but don't actually build the stub. Just bump offset so
4895 we know stub section sizes. */
4896
4897 static bfd_boolean
4898 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4899 void *in_arg ATTRIBUTE_UNUSED)
4900 {
4901 struct elf32_arm_stub_hash_entry *stub_entry;
4902 const insn_sequence *template_sequence;
4903 int template_size, size;
4904
4905 /* Massage our args to the form they really have. */
4906 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4907
4908 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4909 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4910
4911 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4912 &template_size);
4913
4914 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4915 if (stub_entry->stub_template_size)
4916 {
4917 stub_entry->stub_size = size;
4918 stub_entry->stub_template = template_sequence;
4919 stub_entry->stub_template_size = template_size;
4920 }
4921
4922 /* Already accounted for. */
4923 if (stub_entry->stub_offset != (bfd_vma) -1)
4924 return TRUE;
4925
4926 size = (size + 7) & ~7;
4927 stub_entry->stub_sec->size += size;
4928
4929 return TRUE;
4930 }
4931
4932 /* External entry points for sizing and building linker stubs. */
4933
4934 /* Set up various things so that we can make a list of input sections
4935 for each output section included in the link. Returns -1 on error,
4936 0 when no stubs will be needed, and 1 on success. */
4937
4938 int
4939 elf32_arm_setup_section_lists (bfd *output_bfd,
4940 struct bfd_link_info *info)
4941 {
4942 bfd *input_bfd;
4943 unsigned int bfd_count;
4944 unsigned int top_id, top_index;
4945 asection *section;
4946 asection **input_list, **list;
4947 bfd_size_type amt;
4948 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4949
4950 if (htab == NULL)
4951 return 0;
4952 if (! is_elf_hash_table (htab))
4953 return 0;
4954
4955 /* Count the number of input BFDs and find the top input section id. */
4956 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4957 input_bfd != NULL;
4958 input_bfd = input_bfd->link.next)
4959 {
4960 bfd_count += 1;
4961 for (section = input_bfd->sections;
4962 section != NULL;
4963 section = section->next)
4964 {
4965 if (top_id < section->id)
4966 top_id = section->id;
4967 }
4968 }
4969 htab->bfd_count = bfd_count;
4970
4971 amt = sizeof (struct map_stub) * (top_id + 1);
4972 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4973 if (htab->stub_group == NULL)
4974 return -1;
4975 htab->top_id = top_id;
4976
4977 /* We can't use output_bfd->section_count here to find the top output
4978 section index as some sections may have been removed, and
4979 _bfd_strip_section_from_output doesn't renumber the indices. */
4980 for (section = output_bfd->sections, top_index = 0;
4981 section != NULL;
4982 section = section->next)
4983 {
4984 if (top_index < section->index)
4985 top_index = section->index;
4986 }
4987
4988 htab->top_index = top_index;
4989 amt = sizeof (asection *) * (top_index + 1);
4990 input_list = (asection **) bfd_malloc (amt);
4991 htab->input_list = input_list;
4992 if (input_list == NULL)
4993 return -1;
4994
4995 /* For sections we aren't interested in, mark their entries with a
4996 value we can check later. */
4997 list = input_list + top_index;
4998 do
4999 *list = bfd_abs_section_ptr;
5000 while (list-- != input_list);
5001
5002 for (section = output_bfd->sections;
5003 section != NULL;
5004 section = section->next)
5005 {
5006 if ((section->flags & SEC_CODE) != 0)
5007 input_list[section->index] = NULL;
5008 }
5009
5010 return 1;
5011 }
5012
5013 /* The linker repeatedly calls this function for each input section,
5014 in the order that input sections are linked into output sections.
5015 Build lists of input sections to determine groupings between which
5016 we may insert linker stubs. */
5017
5018 void
5019 elf32_arm_next_input_section (struct bfd_link_info *info,
5020 asection *isec)
5021 {
5022 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5023
5024 if (htab == NULL)
5025 return;
5026
5027 if (isec->output_section->index <= htab->top_index)
5028 {
5029 asection **list = htab->input_list + isec->output_section->index;
5030
5031 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5032 {
5033 /* Steal the link_sec pointer for our list. */
5034 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5035 /* This happens to make the list in reverse order,
5036 which we reverse later. */
5037 PREV_SEC (isec) = *list;
5038 *list = isec;
5039 }
5040 }
5041 }
5042
5043 /* See whether we can group stub sections together. Grouping stub
5044 sections may result in fewer stubs. More importantly, we need to
5045 put all .init* and .fini* stubs at the end of the .init or
5046 .fini output sections respectively, because glibc splits the
5047 _init and _fini functions into multiple parts. Putting a stub in
5048 the middle of a function is not a good idea. */
5049
5050 static void
5051 group_sections (struct elf32_arm_link_hash_table *htab,
5052 bfd_size_type stub_group_size,
5053 bfd_boolean stubs_always_after_branch)
5054 {
5055 asection **list = htab->input_list;
5056
5057 do
5058 {
5059 asection *tail = *list;
5060 asection *head;
5061
5062 if (tail == bfd_abs_section_ptr)
5063 continue;
5064
5065 /* Reverse the list: we must avoid placing stubs at the
5066 beginning of the section because the beginning of the text
5067 section may be required for an interrupt vector in bare metal
5068 code. */
5069 #define NEXT_SEC PREV_SEC
5070 head = NULL;
5071 while (tail != NULL)
5072 {
5073 /* Pop from tail. */
5074 asection *item = tail;
5075 tail = PREV_SEC (item);
5076
5077 /* Push on head. */
5078 NEXT_SEC (item) = head;
5079 head = item;
5080 }
5081
5082 while (head != NULL)
5083 {
5084 asection *curr;
5085 asection *next;
5086 bfd_vma stub_group_start = head->output_offset;
5087 bfd_vma end_of_next;
5088
5089 curr = head;
5090 while (NEXT_SEC (curr) != NULL)
5091 {
5092 next = NEXT_SEC (curr);
5093 end_of_next = next->output_offset + next->size;
5094 if (end_of_next - stub_group_start >= stub_group_size)
5095 /* End of NEXT is too far from start, so stop. */
5096 break;
5097 /* Add NEXT to the group. */
5098 curr = next;
5099 }
5100
5101 /* OK, the size from the start to the start of CURR is less
5102 than stub_group_size and thus can be handled by one stub
5103 section. (Or the head section is itself larger than
5104 stub_group_size, in which case we may be toast.)
5105 We should really be keeping track of the total size of
5106 stubs added here, as stubs contribute to the final output
5107 section size. */
5108 do
5109 {
5110 next = NEXT_SEC (head);
5111 /* Set up this stub group. */
5112 htab->stub_group[head->id].link_sec = curr;
5113 }
5114 while (head != curr && (head = next) != NULL);
5115
5116 /* But wait, there's more! Input sections up to stub_group_size
5117 bytes after the stub section can be handled by it too. */
5118 if (!stubs_always_after_branch)
5119 {
5120 stub_group_start = curr->output_offset + curr->size;
5121
5122 while (next != NULL)
5123 {
5124 end_of_next = next->output_offset + next->size;
5125 if (end_of_next - stub_group_start >= stub_group_size)
5126 /* End of NEXT is too far from stubs, so stop. */
5127 break;
5128 /* Add NEXT to the stub group. */
5129 head = next;
5130 next = NEXT_SEC (head);
5131 htab->stub_group[head->id].link_sec = curr;
5132 }
5133 }
5134 head = next;
5135 }
5136 }
5137 while (list++ != htab->input_list + htab->top_index);
5138
5139 free (htab->input_list);
5140 #undef PREV_SEC
5141 #undef NEXT_SEC
5142 }
5143
5144 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5145 erratum fix. */
5146
5147 static int
5148 a8_reloc_compare (const void *a, const void *b)
5149 {
5150 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5151 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5152
5153 if (ra->from < rb->from)
5154 return -1;
5155 else if (ra->from > rb->from)
5156 return 1;
5157 else
5158 return 0;
5159 }
5160
5161 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5162 const char *, char **);
5163
5164 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5165 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5166 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5167 otherwise. */
5168
5169 static bfd_boolean
5170 cortex_a8_erratum_scan (bfd *input_bfd,
5171 struct bfd_link_info *info,
5172 struct a8_erratum_fix **a8_fixes_p,
5173 unsigned int *num_a8_fixes_p,
5174 unsigned int *a8_fix_table_size_p,
5175 struct a8_erratum_reloc *a8_relocs,
5176 unsigned int num_a8_relocs,
5177 unsigned prev_num_a8_fixes,
5178 bfd_boolean *stub_changed_p)
5179 {
5180 asection *section;
5181 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5182 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5183 unsigned int num_a8_fixes = *num_a8_fixes_p;
5184 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5185
5186 if (htab == NULL)
5187 return FALSE;
5188
5189 for (section = input_bfd->sections;
5190 section != NULL;
5191 section = section->next)
5192 {
5193 bfd_byte *contents = NULL;
5194 struct _arm_elf_section_data *sec_data;
5195 unsigned int span;
5196 bfd_vma base_vma;
5197
5198 if (elf_section_type (section) != SHT_PROGBITS
5199 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5200 || (section->flags & SEC_EXCLUDE) != 0
5201 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5202 || (section->output_section == bfd_abs_section_ptr))
5203 continue;
5204
5205 base_vma = section->output_section->vma + section->output_offset;
5206
5207 if (elf_section_data (section)->this_hdr.contents != NULL)
5208 contents = elf_section_data (section)->this_hdr.contents;
5209 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5210 return TRUE;
5211
5212 sec_data = elf32_arm_section_data (section);
5213
5214 for (span = 0; span < sec_data->mapcount; span++)
5215 {
5216 unsigned int span_start = sec_data->map[span].vma;
5217 unsigned int span_end = (span == sec_data->mapcount - 1)
5218 ? section->size : sec_data->map[span + 1].vma;
5219 unsigned int i;
5220 char span_type = sec_data->map[span].type;
5221 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5222
5223 if (span_type != 't')
5224 continue;
5225
5226 /* Span is entirely within a single 4KB region: skip scanning. */
5227 if (((base_vma + span_start) & ~0xfff)
5228 == ((base_vma + span_end) & ~0xfff))
5229 continue;
5230
5231 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5232
5233 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5234 * The branch target is in the same 4KB region as the
5235 first half of the branch.
5236 * The instruction before the branch is a 32-bit
5237 length non-branch instruction. */
5238 for (i = span_start; i < span_end;)
5239 {
5240 unsigned int insn = bfd_getl16 (&contents[i]);
5241 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5242 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5243
5244 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5245 insn_32bit = TRUE;
5246
5247 if (insn_32bit)
5248 {
5249 /* Load the rest of the insn (in manual-friendly order). */
5250 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5251
5252 /* Encoding T4: B<c>.W. */
5253 is_b = (insn & 0xf800d000) == 0xf0009000;
5254 /* Encoding T1: BL<c>.W. */
5255 is_bl = (insn & 0xf800d000) == 0xf000d000;
5256 /* Encoding T2: BLX<c>.W. */
5257 is_blx = (insn & 0xf800d000) == 0xf000c000;
5258 /* Encoding T3: B<c>.W (not permitted in IT block). */
5259 is_bcc = (insn & 0xf800d000) == 0xf0008000
5260 && (insn & 0x07f00000) != 0x03800000;
5261 }
5262
5263 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5264
5265 if (((base_vma + i) & 0xfff) == 0xffe
5266 && insn_32bit
5267 && is_32bit_branch
5268 && last_was_32bit
5269 && ! last_was_branch)
5270 {
5271 bfd_signed_vma offset = 0;
5272 bfd_boolean force_target_arm = FALSE;
5273 bfd_boolean force_target_thumb = FALSE;
5274 bfd_vma target;
5275 enum elf32_arm_stub_type stub_type = arm_stub_none;
5276 struct a8_erratum_reloc key, *found;
5277 bfd_boolean use_plt = FALSE;
5278
5279 key.from = base_vma + i;
5280 found = (struct a8_erratum_reloc *)
5281 bsearch (&key, a8_relocs, num_a8_relocs,
5282 sizeof (struct a8_erratum_reloc),
5283 &a8_reloc_compare);
5284
5285 if (found)
5286 {
5287 char *error_message = NULL;
5288 struct elf_link_hash_entry *entry;
5289
5290 /* We don't care about the error returned from this
5291 function, only if there is glue or not. */
5292 entry = find_thumb_glue (info, found->sym_name,
5293 &error_message);
5294
5295 if (entry)
5296 found->non_a8_stub = TRUE;
5297
5298 /* Keep a simpler condition, for the sake of clarity. */
5299 if (htab->root.splt != NULL && found->hash != NULL
5300 && found->hash->root.plt.offset != (bfd_vma) -1)
5301 use_plt = TRUE;
5302
5303 if (found->r_type == R_ARM_THM_CALL)
5304 {
5305 if (found->branch_type == ST_BRANCH_TO_ARM
5306 || use_plt)
5307 force_target_arm = TRUE;
5308 else
5309 force_target_thumb = TRUE;
5310 }
5311 }
5312
5313 /* Check if we have an offending branch instruction. */
5314
5315 if (found && found->non_a8_stub)
5316 /* We've already made a stub for this instruction, e.g.
5317 it's a long branch or a Thumb->ARM stub. Assume that
5318 stub will suffice to work around the A8 erratum (see
5319 setting of always_after_branch above). */
5320 ;
5321 else if (is_bcc)
5322 {
5323 offset = (insn & 0x7ff) << 1;
5324 offset |= (insn & 0x3f0000) >> 4;
5325 offset |= (insn & 0x2000) ? 0x40000 : 0;
5326 offset |= (insn & 0x800) ? 0x80000 : 0;
5327 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5328 if (offset & 0x100000)
5329 offset |= ~ ((bfd_signed_vma) 0xfffff);
5330 stub_type = arm_stub_a8_veneer_b_cond;
5331 }
5332 else if (is_b || is_bl || is_blx)
5333 {
5334 int s = (insn & 0x4000000) != 0;
5335 int j1 = (insn & 0x2000) != 0;
5336 int j2 = (insn & 0x800) != 0;
5337 int i1 = !(j1 ^ s);
5338 int i2 = !(j2 ^ s);
5339
5340 offset = (insn & 0x7ff) << 1;
5341 offset |= (insn & 0x3ff0000) >> 4;
5342 offset |= i2 << 22;
5343 offset |= i1 << 23;
5344 offset |= s << 24;
5345 if (offset & 0x1000000)
5346 offset |= ~ ((bfd_signed_vma) 0xffffff);
5347
5348 if (is_blx)
5349 offset &= ~ ((bfd_signed_vma) 3);
5350
5351 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5352 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5353 }
5354
5355 if (stub_type != arm_stub_none)
5356 {
5357 bfd_vma pc_for_insn = base_vma + i + 4;
5358
5359 /* The original instruction is a BL, but the target is
5360 an ARM instruction. If we were not making a stub,
5361 the BL would have been converted to a BLX. Use the
5362 BLX stub instead in that case. */
5363 if (htab->use_blx && force_target_arm
5364 && stub_type == arm_stub_a8_veneer_bl)
5365 {
5366 stub_type = arm_stub_a8_veneer_blx;
5367 is_blx = TRUE;
5368 is_bl = FALSE;
5369 }
5370 /* Conversely, if the original instruction was
5371 BLX but the target is Thumb mode, use the BL
5372 stub. */
5373 else if (force_target_thumb
5374 && stub_type == arm_stub_a8_veneer_blx)
5375 {
5376 stub_type = arm_stub_a8_veneer_bl;
5377 is_blx = FALSE;
5378 is_bl = TRUE;
5379 }
5380
5381 if (is_blx)
5382 pc_for_insn &= ~ ((bfd_vma) 3);
5383
5384 /* If we found a relocation, use the proper destination,
5385 not the offset in the (unrelocated) instruction.
5386 Note this is always done if we switched the stub type
5387 above. */
5388 if (found)
5389 offset =
5390 (bfd_signed_vma) (found->destination - pc_for_insn);
5391
5392 /* If the stub will use a Thumb-mode branch to a
5393 PLT target, redirect it to the preceding Thumb
5394 entry point. */
5395 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5396 offset -= PLT_THUMB_STUB_SIZE;
5397
5398 target = pc_for_insn + offset;
5399
5400 /* The BLX stub is ARM-mode code. Adjust the offset to
5401 take the different PC value (+8 instead of +4) into
5402 account. */
5403 if (stub_type == arm_stub_a8_veneer_blx)
5404 offset += 4;
5405
5406 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5407 {
5408 char *stub_name = NULL;
5409
5410 if (num_a8_fixes == a8_fix_table_size)
5411 {
5412 a8_fix_table_size *= 2;
5413 a8_fixes = (struct a8_erratum_fix *)
5414 bfd_realloc (a8_fixes,
5415 sizeof (struct a8_erratum_fix)
5416 * a8_fix_table_size);
5417 }
5418
5419 if (num_a8_fixes < prev_num_a8_fixes)
5420 {
5421 /* If we're doing a subsequent scan,
5422 check if we've found the same fix as
5423 before, and try and reuse the stub
5424 name. */
5425 stub_name = a8_fixes[num_a8_fixes].stub_name;
5426 if ((a8_fixes[num_a8_fixes].section != section)
5427 || (a8_fixes[num_a8_fixes].offset != i))
5428 {
5429 free (stub_name);
5430 stub_name = NULL;
5431 *stub_changed_p = TRUE;
5432 }
5433 }
5434
5435 if (!stub_name)
5436 {
5437 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5438 if (stub_name != NULL)
5439 sprintf (stub_name, "%x:%x", section->id, i);
5440 }
5441
5442 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5443 a8_fixes[num_a8_fixes].section = section;
5444 a8_fixes[num_a8_fixes].offset = i;
5445 a8_fixes[num_a8_fixes].target_offset =
5446 target - base_vma;
5447 a8_fixes[num_a8_fixes].orig_insn = insn;
5448 a8_fixes[num_a8_fixes].stub_name = stub_name;
5449 a8_fixes[num_a8_fixes].stub_type = stub_type;
5450 a8_fixes[num_a8_fixes].branch_type =
5451 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5452
5453 num_a8_fixes++;
5454 }
5455 }
5456 }
5457
5458 i += insn_32bit ? 4 : 2;
5459 last_was_32bit = insn_32bit;
5460 last_was_branch = is_32bit_branch;
5461 }
5462 }
5463
5464 if (elf_section_data (section)->this_hdr.contents == NULL)
5465 free (contents);
5466 }
5467
5468 *a8_fixes_p = a8_fixes;
5469 *num_a8_fixes_p = num_a8_fixes;
5470 *a8_fix_table_size_p = a8_fix_table_size;
5471
5472 return FALSE;
5473 }
5474
5475 /* Create or update a stub entry depending on whether the stub can already be
5476 found in HTAB. The stub is identified by:
5477 - its type STUB_TYPE
5478 - its source branch (note that several can share the same stub) whose
5479 section and relocation (if any) are given by SECTION and IRELA
5480 respectively
5481 - its target symbol whose input section, hash, name, value and branch type
5482 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5483 respectively
5484
5485 If found, the value of the stub's target symbol is updated from SYM_VALUE
5486 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5487 TRUE and the stub entry is initialized.
5488
5489 Returns the stub that was created or updated, or NULL if an error
5490 occurred. */
5491
5492 static struct elf32_arm_stub_hash_entry *
5493 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5494 enum elf32_arm_stub_type stub_type, asection *section,
5495 Elf_Internal_Rela *irela, asection *sym_sec,
5496 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5497 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5498 bfd_boolean *new_stub)
5499 {
5500 const asection *id_sec;
5501 char *stub_name;
5502 struct elf32_arm_stub_hash_entry *stub_entry;
5503 unsigned int r_type;
5504 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5505
5506 BFD_ASSERT (stub_type != arm_stub_none);
5507 *new_stub = FALSE;
5508
5509 if (sym_claimed)
5510 stub_name = sym_name;
5511 else
5512 {
5513 BFD_ASSERT (irela);
5514 BFD_ASSERT (section);
5515 BFD_ASSERT (section->id <= htab->top_id);
5516
5517 /* Support for grouping stub sections. */
5518 id_sec = htab->stub_group[section->id].link_sec;
5519
5520 /* Get the name of this stub. */
5521 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5522 stub_type);
5523 if (!stub_name)
5524 return NULL;
5525 }
5526
5527 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5528 FALSE);
5529 /* The proper stub has already been created, just update its value. */
5530 if (stub_entry != NULL)
5531 {
5532 if (!sym_claimed)
5533 free (stub_name);
5534 stub_entry->target_value = sym_value;
5535 return stub_entry;
5536 }
5537
5538 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5539 if (stub_entry == NULL)
5540 {
5541 if (!sym_claimed)
5542 free (stub_name);
5543 return NULL;
5544 }
5545
5546 stub_entry->target_value = sym_value;
5547 stub_entry->target_section = sym_sec;
5548 stub_entry->stub_type = stub_type;
5549 stub_entry->h = hash;
5550 stub_entry->branch_type = branch_type;
5551
5552 if (sym_claimed)
5553 stub_entry->output_name = sym_name;
5554 else
5555 {
5556 if (sym_name == NULL)
5557 sym_name = "unnamed";
5558 stub_entry->output_name = (char *)
5559 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5560 + strlen (sym_name));
5561 if (stub_entry->output_name == NULL)
5562 {
5563 free (stub_name);
5564 return NULL;
5565 }
5566
5567 /* For historical reasons, use the existing names for ARM-to-Thumb and
5568 Thumb-to-ARM stubs. */
5569 r_type = ELF32_R_TYPE (irela->r_info);
5570 if ((r_type == (unsigned int) R_ARM_THM_CALL
5571 || r_type == (unsigned int) R_ARM_THM_JUMP24
5572 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5573 && branch_type == ST_BRANCH_TO_ARM)
5574 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5575 else if ((r_type == (unsigned int) R_ARM_CALL
5576 || r_type == (unsigned int) R_ARM_JUMP24)
5577 && branch_type == ST_BRANCH_TO_THUMB)
5578 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5579 else
5580 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5581 }
5582
5583 *new_stub = TRUE;
5584 return stub_entry;
5585 }
5586
5587 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5588 gateway veneer to transition from non secure to secure state and create them
5589 accordingly.
5590
5591 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5592 defines the conditions that govern Secure Gateway veneer creation for a
5593 given symbol <SYM> as follows:
5594 - it has function type
5595 - it has non local binding
5596 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5597 same type, binding and value as <SYM> (called normal symbol).
5598 An entry function can handle secure state transition itself in which case
5599 its special symbol would have a different value from the normal symbol.
5600
5601 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5602 entry mapping while HTAB gives the name to hash entry mapping.
5603 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5604 created.
5605
5606 The return value gives whether a stub failed to be allocated. */
5607
5608 static bfd_boolean
5609 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5610 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5611 int *cmse_stub_created)
5612 {
5613 const struct elf_backend_data *bed;
5614 Elf_Internal_Shdr *symtab_hdr;
5615 unsigned i, j, sym_count, ext_start;
5616 Elf_Internal_Sym *cmse_sym, *local_syms;
5617 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5618 enum arm_st_branch_type branch_type;
5619 char *sym_name, *lsym_name;
5620 bfd_vma sym_value;
5621 asection *section;
5622 struct elf32_arm_stub_hash_entry *stub_entry;
5623 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5624
5625 bed = get_elf_backend_data (input_bfd);
5626 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5627 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5628 ext_start = symtab_hdr->sh_info;
5629 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5630 && out_attr[Tag_CPU_arch_profile].i == 'M');
5631
5632 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5633 if (local_syms == NULL)
5634 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5635 symtab_hdr->sh_info, 0, NULL, NULL,
5636 NULL);
5637 if (symtab_hdr->sh_info && local_syms == NULL)
5638 return FALSE;
5639
5640 /* Scan symbols. */
5641 for (i = 0; i < sym_count; i++)
5642 {
5643 cmse_invalid = FALSE;
5644
5645 if (i < ext_start)
5646 {
5647 cmse_sym = &local_syms[i];
5648 /* Not a special symbol. */
5649 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5650 continue;
5651 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5652 symtab_hdr->sh_link,
5653 cmse_sym->st_name);
5654 /* Special symbol with local binding. */
5655 cmse_invalid = TRUE;
5656 }
5657 else
5658 {
5659 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5660 sym_name = (char *) cmse_hash->root.root.root.string;
5661
5662 /* Not a special symbol. */
5663 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5664 continue;
5665
5666 /* Special symbol has incorrect binding or type. */
5667 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5668 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5669 || cmse_hash->root.type != STT_FUNC)
5670 cmse_invalid = TRUE;
5671 }
5672
5673 if (!is_v8m)
5674 {
5675 _bfd_error_handler (_("%pB: Special symbol `%s' only allowed for "
5676 "ARMv8-M architecture or later."),
5677 input_bfd, sym_name);
5678 is_v8m = TRUE; /* Avoid multiple warning. */
5679 ret = FALSE;
5680 }
5681
5682 if (cmse_invalid)
5683 {
5684 _bfd_error_handler (_("%pB: invalid special symbol `%s'."),
5685 input_bfd, sym_name);
5686 _bfd_error_handler (_("It must be a global or weak function "
5687 "symbol."));
5688 ret = FALSE;
5689 if (i < ext_start)
5690 continue;
5691 }
5692
5693 sym_name += strlen (CMSE_PREFIX);
5694 hash = (struct elf32_arm_link_hash_entry *)
5695 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5696
5697 /* No associated normal symbol or it is neither global nor weak. */
5698 if (!hash
5699 || (hash->root.root.type != bfd_link_hash_defined
5700 && hash->root.root.type != bfd_link_hash_defweak)
5701 || hash->root.type != STT_FUNC)
5702 {
5703 /* Initialize here to avoid warning about use of possibly
5704 uninitialized variable. */
5705 j = 0;
5706
5707 if (!hash)
5708 {
5709 /* Searching for a normal symbol with local binding. */
5710 for (; j < ext_start; j++)
5711 {
5712 lsym_name =
5713 bfd_elf_string_from_elf_section (input_bfd,
5714 symtab_hdr->sh_link,
5715 local_syms[j].st_name);
5716 if (!strcmp (sym_name, lsym_name))
5717 break;
5718 }
5719 }
5720
5721 if (hash || j < ext_start)
5722 {
5723 _bfd_error_handler
5724 (_("%pB: invalid standard symbol `%s'."), input_bfd, sym_name);
5725 _bfd_error_handler
5726 (_("It must be a global or weak function symbol."));
5727 }
5728 else
5729 _bfd_error_handler
5730 (_("%pB: absent standard symbol `%s'."), input_bfd, sym_name);
5731 ret = FALSE;
5732 if (!hash)
5733 continue;
5734 }
5735
5736 sym_value = hash->root.root.u.def.value;
5737 section = hash->root.root.u.def.section;
5738
5739 if (cmse_hash->root.root.u.def.section != section)
5740 {
5741 _bfd_error_handler
5742 (_("%pB: `%s' and its special symbol are in different sections."),
5743 input_bfd, sym_name);
5744 ret = FALSE;
5745 }
5746 if (cmse_hash->root.root.u.def.value != sym_value)
5747 continue; /* Ignore: could be an entry function starting with SG. */
5748
5749 /* If this section is a link-once section that will be discarded, then
5750 don't create any stubs. */
5751 if (section->output_section == NULL)
5752 {
5753 _bfd_error_handler
5754 (_("%pB: entry function `%s' not output."), input_bfd, sym_name);
5755 continue;
5756 }
5757
5758 if (hash->root.size == 0)
5759 {
5760 _bfd_error_handler
5761 (_("%pB: entry function `%s' is empty."), input_bfd, sym_name);
5762 ret = FALSE;
5763 }
5764
5765 if (!ret)
5766 continue;
5767 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5768 stub_entry
5769 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5770 NULL, NULL, section, hash, sym_name,
5771 sym_value, branch_type, &new_stub);
5772
5773 if (stub_entry == NULL)
5774 ret = FALSE;
5775 else
5776 {
5777 BFD_ASSERT (new_stub);
5778 (*cmse_stub_created)++;
5779 }
5780 }
5781
5782 if (!symtab_hdr->contents)
5783 free (local_syms);
5784 return ret;
5785 }
5786
5787 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5788 code entry function, ie can be called from non secure code without using a
5789 veneer. */
5790
5791 static bfd_boolean
5792 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5793 {
5794 bfd_byte contents[4];
5795 uint32_t first_insn;
5796 asection *section;
5797 file_ptr offset;
5798 bfd *abfd;
5799
5800 /* Defined symbol of function type. */
5801 if (hash->root.root.type != bfd_link_hash_defined
5802 && hash->root.root.type != bfd_link_hash_defweak)
5803 return FALSE;
5804 if (hash->root.type != STT_FUNC)
5805 return FALSE;
5806
5807 /* Read first instruction. */
5808 section = hash->root.root.u.def.section;
5809 abfd = section->owner;
5810 offset = hash->root.root.u.def.value - section->vma;
5811 if (!bfd_get_section_contents (abfd, section, contents, offset,
5812 sizeof (contents)))
5813 return FALSE;
5814
5815 first_insn = bfd_get_32 (abfd, contents);
5816
5817 /* Starts by SG instruction. */
5818 return first_insn == 0xe97fe97f;
5819 }
5820
5821 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5822 secure gateway veneers (ie. the veneers was not in the input import library)
5823 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5824
5825 static bfd_boolean
5826 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5827 {
5828 struct elf32_arm_stub_hash_entry *stub_entry;
5829 struct bfd_link_info *info;
5830
5831 /* Massage our args to the form they really have. */
5832 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5833 info = (struct bfd_link_info *) gen_info;
5834
5835 if (info->out_implib_bfd)
5836 return TRUE;
5837
5838 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5839 return TRUE;
5840
5841 if (stub_entry->stub_offset == (bfd_vma) -1)
5842 _bfd_error_handler (" %s", stub_entry->output_name);
5843
5844 return TRUE;
5845 }
5846
5847 /* Set offset of each secure gateway veneers so that its address remain
5848 identical to the one in the input import library referred by
5849 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5850 (present in input import library but absent from the executable being
5851 linked) or if new veneers appeared and there is no output import library
5852 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5853 number of secure gateway veneers found in the input import library.
5854
5855 The function returns whether an error occurred. If no error occurred,
5856 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5857 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5858 veneer observed set for new veneers to be layed out after. */
5859
5860 static bfd_boolean
5861 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5862 struct elf32_arm_link_hash_table *htab,
5863 int *cmse_stub_created)
5864 {
5865 long symsize;
5866 char *sym_name;
5867 flagword flags;
5868 long i, symcount;
5869 bfd *in_implib_bfd;
5870 asection *stub_out_sec;
5871 bfd_boolean ret = TRUE;
5872 Elf_Internal_Sym *intsym;
5873 const char *out_sec_name;
5874 bfd_size_type cmse_stub_size;
5875 asymbol **sympp = NULL, *sym;
5876 struct elf32_arm_link_hash_entry *hash;
5877 const insn_sequence *cmse_stub_template;
5878 struct elf32_arm_stub_hash_entry *stub_entry;
5879 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5880 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5881 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5882
5883 /* No input secure gateway import library. */
5884 if (!htab->in_implib_bfd)
5885 return TRUE;
5886
5887 in_implib_bfd = htab->in_implib_bfd;
5888 if (!htab->cmse_implib)
5889 {
5890 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
5891 "Gateway import libraries."), in_implib_bfd);
5892 return FALSE;
5893 }
5894
5895 /* Get symbol table size. */
5896 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5897 if (symsize < 0)
5898 return FALSE;
5899
5900 /* Read in the input secure gateway import library's symbol table. */
5901 sympp = (asymbol **) xmalloc (symsize);
5902 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5903 if (symcount < 0)
5904 {
5905 ret = FALSE;
5906 goto free_sym_buf;
5907 }
5908
5909 htab->new_cmse_stub_offset = 0;
5910 cmse_stub_size =
5911 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5912 &cmse_stub_template,
5913 &cmse_stub_template_size);
5914 out_sec_name =
5915 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5916 stub_out_sec =
5917 bfd_get_section_by_name (htab->obfd, out_sec_name);
5918 if (stub_out_sec != NULL)
5919 cmse_stub_sec_vma = stub_out_sec->vma;
5920
5921 /* Set addresses of veneers mentionned in input secure gateway import
5922 library's symbol table. */
5923 for (i = 0; i < symcount; i++)
5924 {
5925 sym = sympp[i];
5926 flags = sym->flags;
5927 sym_name = (char *) bfd_asymbol_name (sym);
5928 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5929
5930 if (sym->section != bfd_abs_section_ptr
5931 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5932 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5933 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5934 != ST_BRANCH_TO_THUMB))
5935 {
5936 _bfd_error_handler (_("%pB: invalid import library entry: `%s'."),
5937 in_implib_bfd, sym_name);
5938 _bfd_error_handler (_("Symbol should be absolute, global and "
5939 "refer to Thumb functions."));
5940 ret = FALSE;
5941 continue;
5942 }
5943
5944 veneer_value = bfd_asymbol_value (sym);
5945 stub_offset = veneer_value - cmse_stub_sec_vma;
5946 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5947 FALSE, FALSE);
5948 hash = (struct elf32_arm_link_hash_entry *)
5949 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5950
5951 /* Stub entry should have been created by cmse_scan or the symbol be of
5952 a secure function callable from non secure code. */
5953 if (!stub_entry && !hash)
5954 {
5955 bfd_boolean new_stub;
5956
5957 _bfd_error_handler
5958 (_("Entry function `%s' disappeared from secure code."), sym_name);
5959 hash = (struct elf32_arm_link_hash_entry *)
5960 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5961 stub_entry
5962 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5963 NULL, NULL, bfd_abs_section_ptr, hash,
5964 sym_name, veneer_value,
5965 ST_BRANCH_TO_THUMB, &new_stub);
5966 if (stub_entry == NULL)
5967 ret = FALSE;
5968 else
5969 {
5970 BFD_ASSERT (new_stub);
5971 new_cmse_stubs_created++;
5972 (*cmse_stub_created)++;
5973 }
5974 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5975 stub_entry->stub_offset = stub_offset;
5976 }
5977 /* Symbol found is not callable from non secure code. */
5978 else if (!stub_entry)
5979 {
5980 if (!cmse_entry_fct_p (hash))
5981 {
5982 _bfd_error_handler (_("`%s' refers to a non entry function."),
5983 sym_name);
5984 ret = FALSE;
5985 }
5986 continue;
5987 }
5988 else
5989 {
5990 /* Only stubs for SG veneers should have been created. */
5991 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5992
5993 /* Check visibility hasn't changed. */
5994 if (!!(flags & BSF_GLOBAL)
5995 != (hash->root.root.type == bfd_link_hash_defined))
5996 _bfd_error_handler
5997 (_("%pB: visibility of symbol `%s' has changed."), in_implib_bfd,
5998 sym_name);
5999
6000 stub_entry->stub_offset = stub_offset;
6001 }
6002
6003 /* Size should match that of a SG veneer. */
6004 if (intsym->st_size != cmse_stub_size)
6005 {
6006 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'."),
6007 in_implib_bfd, sym_name);
6008 ret = FALSE;
6009 }
6010
6011 /* Previous veneer address is before current SG veneer section. */
6012 if (veneer_value < cmse_stub_sec_vma)
6013 {
6014 /* Avoid offset underflow. */
6015 if (stub_entry)
6016 stub_entry->stub_offset = 0;
6017 stub_offset = 0;
6018 ret = FALSE;
6019 }
6020
6021 /* Complain if stub offset not a multiple of stub size. */
6022 if (stub_offset % cmse_stub_size)
6023 {
6024 _bfd_error_handler
6025 (_("Offset of veneer for entry function `%s' not a multiple of "
6026 "its size."), sym_name);
6027 ret = FALSE;
6028 }
6029
6030 if (!ret)
6031 continue;
6032
6033 new_cmse_stubs_created--;
6034 if (veneer_value < cmse_stub_array_start)
6035 cmse_stub_array_start = veneer_value;
6036 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6037 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6038 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6039 }
6040
6041 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6042 {
6043 BFD_ASSERT (new_cmse_stubs_created > 0);
6044 _bfd_error_handler
6045 (_("new entry function(s) introduced but no output import library "
6046 "specified:"));
6047 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6048 }
6049
6050 if (cmse_stub_array_start != cmse_stub_sec_vma)
6051 {
6052 _bfd_error_handler
6053 (_("Start address of `%s' is different from previous link."),
6054 out_sec_name);
6055 ret = FALSE;
6056 }
6057
6058 free_sym_buf:
6059 free (sympp);
6060 return ret;
6061 }
6062
6063 /* Determine and set the size of the stub section for a final link.
6064
6065 The basic idea here is to examine all the relocations looking for
6066 PC-relative calls to a target that is unreachable with a "bl"
6067 instruction. */
6068
6069 bfd_boolean
6070 elf32_arm_size_stubs (bfd *output_bfd,
6071 bfd *stub_bfd,
6072 struct bfd_link_info *info,
6073 bfd_signed_vma group_size,
6074 asection * (*add_stub_section) (const char *, asection *,
6075 asection *,
6076 unsigned int),
6077 void (*layout_sections_again) (void))
6078 {
6079 bfd_boolean ret = TRUE;
6080 obj_attribute *out_attr;
6081 int cmse_stub_created = 0;
6082 bfd_size_type stub_group_size;
6083 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6084 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6085 struct a8_erratum_fix *a8_fixes = NULL;
6086 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6087 struct a8_erratum_reloc *a8_relocs = NULL;
6088 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6089
6090 if (htab == NULL)
6091 return FALSE;
6092
6093 if (htab->fix_cortex_a8)
6094 {
6095 a8_fixes = (struct a8_erratum_fix *)
6096 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6097 a8_relocs = (struct a8_erratum_reloc *)
6098 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6099 }
6100
6101 /* Propagate mach to stub bfd, because it may not have been
6102 finalized when we created stub_bfd. */
6103 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6104 bfd_get_mach (output_bfd));
6105
6106 /* Stash our params away. */
6107 htab->stub_bfd = stub_bfd;
6108 htab->add_stub_section = add_stub_section;
6109 htab->layout_sections_again = layout_sections_again;
6110 stubs_always_after_branch = group_size < 0;
6111
6112 out_attr = elf_known_obj_attributes_proc (output_bfd);
6113 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6114
6115 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6116 as the first half of a 32-bit branch straddling two 4K pages. This is a
6117 crude way of enforcing that. */
6118 if (htab->fix_cortex_a8)
6119 stubs_always_after_branch = 1;
6120
6121 if (group_size < 0)
6122 stub_group_size = -group_size;
6123 else
6124 stub_group_size = group_size;
6125
6126 if (stub_group_size == 1)
6127 {
6128 /* Default values. */
6129 /* Thumb branch range is +-4MB has to be used as the default
6130 maximum size (a given section can contain both ARM and Thumb
6131 code, so the worst case has to be taken into account).
6132
6133 This value is 24K less than that, which allows for 2025
6134 12-byte stubs. If we exceed that, then we will fail to link.
6135 The user will have to relink with an explicit group size
6136 option. */
6137 stub_group_size = 4170000;
6138 }
6139
6140 group_sections (htab, stub_group_size, stubs_always_after_branch);
6141
6142 /* If we're applying the cortex A8 fix, we need to determine the
6143 program header size now, because we cannot change it later --
6144 that could alter section placements. Notice the A8 erratum fix
6145 ends up requiring the section addresses to remain unchanged
6146 modulo the page size. That's something we cannot represent
6147 inside BFD, and we don't want to force the section alignment to
6148 be the page size. */
6149 if (htab->fix_cortex_a8)
6150 (*htab->layout_sections_again) ();
6151
6152 while (1)
6153 {
6154 bfd *input_bfd;
6155 unsigned int bfd_indx;
6156 asection *stub_sec;
6157 enum elf32_arm_stub_type stub_type;
6158 bfd_boolean stub_changed = FALSE;
6159 unsigned prev_num_a8_fixes = num_a8_fixes;
6160
6161 num_a8_fixes = 0;
6162 for (input_bfd = info->input_bfds, bfd_indx = 0;
6163 input_bfd != NULL;
6164 input_bfd = input_bfd->link.next, bfd_indx++)
6165 {
6166 Elf_Internal_Shdr *symtab_hdr;
6167 asection *section;
6168 Elf_Internal_Sym *local_syms = NULL;
6169
6170 if (!is_arm_elf (input_bfd))
6171 continue;
6172
6173 num_a8_relocs = 0;
6174
6175 /* We'll need the symbol table in a second. */
6176 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6177 if (symtab_hdr->sh_info == 0)
6178 continue;
6179
6180 /* Limit scan of symbols to object file whose profile is
6181 Microcontroller to not hinder performance in the general case. */
6182 if (m_profile && first_veneer_scan)
6183 {
6184 struct elf_link_hash_entry **sym_hashes;
6185
6186 sym_hashes = elf_sym_hashes (input_bfd);
6187 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6188 &cmse_stub_created))
6189 goto error_ret_free_local;
6190
6191 if (cmse_stub_created != 0)
6192 stub_changed = TRUE;
6193 }
6194
6195 /* Walk over each section attached to the input bfd. */
6196 for (section = input_bfd->sections;
6197 section != NULL;
6198 section = section->next)
6199 {
6200 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6201
6202 /* If there aren't any relocs, then there's nothing more
6203 to do. */
6204 if ((section->flags & SEC_RELOC) == 0
6205 || section->reloc_count == 0
6206 || (section->flags & SEC_CODE) == 0)
6207 continue;
6208
6209 /* If this section is a link-once section that will be
6210 discarded, then don't create any stubs. */
6211 if (section->output_section == NULL
6212 || section->output_section->owner != output_bfd)
6213 continue;
6214
6215 /* Get the relocs. */
6216 internal_relocs
6217 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6218 NULL, info->keep_memory);
6219 if (internal_relocs == NULL)
6220 goto error_ret_free_local;
6221
6222 /* Now examine each relocation. */
6223 irela = internal_relocs;
6224 irelaend = irela + section->reloc_count;
6225 for (; irela < irelaend; irela++)
6226 {
6227 unsigned int r_type, r_indx;
6228 asection *sym_sec;
6229 bfd_vma sym_value;
6230 bfd_vma destination;
6231 struct elf32_arm_link_hash_entry *hash;
6232 const char *sym_name;
6233 unsigned char st_type;
6234 enum arm_st_branch_type branch_type;
6235 bfd_boolean created_stub = FALSE;
6236
6237 r_type = ELF32_R_TYPE (irela->r_info);
6238 r_indx = ELF32_R_SYM (irela->r_info);
6239
6240 if (r_type >= (unsigned int) R_ARM_max)
6241 {
6242 bfd_set_error (bfd_error_bad_value);
6243 error_ret_free_internal:
6244 if (elf_section_data (section)->relocs == NULL)
6245 free (internal_relocs);
6246 /* Fall through. */
6247 error_ret_free_local:
6248 if (local_syms != NULL
6249 && (symtab_hdr->contents
6250 != (unsigned char *) local_syms))
6251 free (local_syms);
6252 return FALSE;
6253 }
6254
6255 hash = NULL;
6256 if (r_indx >= symtab_hdr->sh_info)
6257 hash = elf32_arm_hash_entry
6258 (elf_sym_hashes (input_bfd)
6259 [r_indx - symtab_hdr->sh_info]);
6260
6261 /* Only look for stubs on branch instructions, or
6262 non-relaxed TLSCALL */
6263 if ((r_type != (unsigned int) R_ARM_CALL)
6264 && (r_type != (unsigned int) R_ARM_THM_CALL)
6265 && (r_type != (unsigned int) R_ARM_JUMP24)
6266 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6267 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6268 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6269 && (r_type != (unsigned int) R_ARM_PLT32)
6270 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6271 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6272 && r_type == elf32_arm_tls_transition
6273 (info, r_type, &hash->root)
6274 && ((hash ? hash->tls_type
6275 : (elf32_arm_local_got_tls_type
6276 (input_bfd)[r_indx]))
6277 & GOT_TLS_GDESC) != 0))
6278 continue;
6279
6280 /* Now determine the call target, its name, value,
6281 section. */
6282 sym_sec = NULL;
6283 sym_value = 0;
6284 destination = 0;
6285 sym_name = NULL;
6286
6287 if (r_type == (unsigned int) R_ARM_TLS_CALL
6288 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6289 {
6290 /* A non-relaxed TLS call. The target is the
6291 plt-resident trampoline and nothing to do
6292 with the symbol. */
6293 BFD_ASSERT (htab->tls_trampoline > 0);
6294 sym_sec = htab->root.splt;
6295 sym_value = htab->tls_trampoline;
6296 hash = 0;
6297 st_type = STT_FUNC;
6298 branch_type = ST_BRANCH_TO_ARM;
6299 }
6300 else if (!hash)
6301 {
6302 /* It's a local symbol. */
6303 Elf_Internal_Sym *sym;
6304
6305 if (local_syms == NULL)
6306 {
6307 local_syms
6308 = (Elf_Internal_Sym *) symtab_hdr->contents;
6309 if (local_syms == NULL)
6310 local_syms
6311 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6312 symtab_hdr->sh_info, 0,
6313 NULL, NULL, NULL);
6314 if (local_syms == NULL)
6315 goto error_ret_free_internal;
6316 }
6317
6318 sym = local_syms + r_indx;
6319 if (sym->st_shndx == SHN_UNDEF)
6320 sym_sec = bfd_und_section_ptr;
6321 else if (sym->st_shndx == SHN_ABS)
6322 sym_sec = bfd_abs_section_ptr;
6323 else if (sym->st_shndx == SHN_COMMON)
6324 sym_sec = bfd_com_section_ptr;
6325 else
6326 sym_sec =
6327 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6328
6329 if (!sym_sec)
6330 /* This is an undefined symbol. It can never
6331 be resolved. */
6332 continue;
6333
6334 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6335 sym_value = sym->st_value;
6336 destination = (sym_value + irela->r_addend
6337 + sym_sec->output_offset
6338 + sym_sec->output_section->vma);
6339 st_type = ELF_ST_TYPE (sym->st_info);
6340 branch_type =
6341 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6342 sym_name
6343 = bfd_elf_string_from_elf_section (input_bfd,
6344 symtab_hdr->sh_link,
6345 sym->st_name);
6346 }
6347 else
6348 {
6349 /* It's an external symbol. */
6350 while (hash->root.root.type == bfd_link_hash_indirect
6351 || hash->root.root.type == bfd_link_hash_warning)
6352 hash = ((struct elf32_arm_link_hash_entry *)
6353 hash->root.root.u.i.link);
6354
6355 if (hash->root.root.type == bfd_link_hash_defined
6356 || hash->root.root.type == bfd_link_hash_defweak)
6357 {
6358 sym_sec = hash->root.root.u.def.section;
6359 sym_value = hash->root.root.u.def.value;
6360
6361 struct elf32_arm_link_hash_table *globals =
6362 elf32_arm_hash_table (info);
6363
6364 /* For a destination in a shared library,
6365 use the PLT stub as target address to
6366 decide whether a branch stub is
6367 needed. */
6368 if (globals != NULL
6369 && globals->root.splt != NULL
6370 && hash != NULL
6371 && hash->root.plt.offset != (bfd_vma) -1)
6372 {
6373 sym_sec = globals->root.splt;
6374 sym_value = hash->root.plt.offset;
6375 if (sym_sec->output_section != NULL)
6376 destination = (sym_value
6377 + sym_sec->output_offset
6378 + sym_sec->output_section->vma);
6379 }
6380 else if (sym_sec->output_section != NULL)
6381 destination = (sym_value + irela->r_addend
6382 + sym_sec->output_offset
6383 + sym_sec->output_section->vma);
6384 }
6385 else if ((hash->root.root.type == bfd_link_hash_undefined)
6386 || (hash->root.root.type == bfd_link_hash_undefweak))
6387 {
6388 /* For a shared library, use the PLT stub as
6389 target address to decide whether a long
6390 branch stub is needed.
6391 For absolute code, they cannot be handled. */
6392 struct elf32_arm_link_hash_table *globals =
6393 elf32_arm_hash_table (info);
6394
6395 if (globals != NULL
6396 && globals->root.splt != NULL
6397 && hash != NULL
6398 && hash->root.plt.offset != (bfd_vma) -1)
6399 {
6400 sym_sec = globals->root.splt;
6401 sym_value = hash->root.plt.offset;
6402 if (sym_sec->output_section != NULL)
6403 destination = (sym_value
6404 + sym_sec->output_offset
6405 + sym_sec->output_section->vma);
6406 }
6407 else
6408 continue;
6409 }
6410 else
6411 {
6412 bfd_set_error (bfd_error_bad_value);
6413 goto error_ret_free_internal;
6414 }
6415 st_type = hash->root.type;
6416 branch_type =
6417 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6418 sym_name = hash->root.root.root.string;
6419 }
6420
6421 do
6422 {
6423 bfd_boolean new_stub;
6424 struct elf32_arm_stub_hash_entry *stub_entry;
6425
6426 /* Determine what (if any) linker stub is needed. */
6427 stub_type = arm_type_of_stub (info, section, irela,
6428 st_type, &branch_type,
6429 hash, destination, sym_sec,
6430 input_bfd, sym_name);
6431 if (stub_type == arm_stub_none)
6432 break;
6433
6434 /* We've either created a stub for this reloc already,
6435 or we are about to. */
6436 stub_entry =
6437 elf32_arm_create_stub (htab, stub_type, section, irela,
6438 sym_sec, hash,
6439 (char *) sym_name, sym_value,
6440 branch_type, &new_stub);
6441
6442 created_stub = stub_entry != NULL;
6443 if (!created_stub)
6444 goto error_ret_free_internal;
6445 else if (!new_stub)
6446 break;
6447 else
6448 stub_changed = TRUE;
6449 }
6450 while (0);
6451
6452 /* Look for relocations which might trigger Cortex-A8
6453 erratum. */
6454 if (htab->fix_cortex_a8
6455 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6456 || r_type == (unsigned int) R_ARM_THM_JUMP19
6457 || r_type == (unsigned int) R_ARM_THM_CALL
6458 || r_type == (unsigned int) R_ARM_THM_XPC22))
6459 {
6460 bfd_vma from = section->output_section->vma
6461 + section->output_offset
6462 + irela->r_offset;
6463
6464 if ((from & 0xfff) == 0xffe)
6465 {
6466 /* Found a candidate. Note we haven't checked the
6467 destination is within 4K here: if we do so (and
6468 don't create an entry in a8_relocs) we can't tell
6469 that a branch should have been relocated when
6470 scanning later. */
6471 if (num_a8_relocs == a8_reloc_table_size)
6472 {
6473 a8_reloc_table_size *= 2;
6474 a8_relocs = (struct a8_erratum_reloc *)
6475 bfd_realloc (a8_relocs,
6476 sizeof (struct a8_erratum_reloc)
6477 * a8_reloc_table_size);
6478 }
6479
6480 a8_relocs[num_a8_relocs].from = from;
6481 a8_relocs[num_a8_relocs].destination = destination;
6482 a8_relocs[num_a8_relocs].r_type = r_type;
6483 a8_relocs[num_a8_relocs].branch_type = branch_type;
6484 a8_relocs[num_a8_relocs].sym_name = sym_name;
6485 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6486 a8_relocs[num_a8_relocs].hash = hash;
6487
6488 num_a8_relocs++;
6489 }
6490 }
6491 }
6492
6493 /* We're done with the internal relocs, free them. */
6494 if (elf_section_data (section)->relocs == NULL)
6495 free (internal_relocs);
6496 }
6497
6498 if (htab->fix_cortex_a8)
6499 {
6500 /* Sort relocs which might apply to Cortex-A8 erratum. */
6501 qsort (a8_relocs, num_a8_relocs,
6502 sizeof (struct a8_erratum_reloc),
6503 &a8_reloc_compare);
6504
6505 /* Scan for branches which might trigger Cortex-A8 erratum. */
6506 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6507 &num_a8_fixes, &a8_fix_table_size,
6508 a8_relocs, num_a8_relocs,
6509 prev_num_a8_fixes, &stub_changed)
6510 != 0)
6511 goto error_ret_free_local;
6512 }
6513
6514 if (local_syms != NULL
6515 && symtab_hdr->contents != (unsigned char *) local_syms)
6516 {
6517 if (!info->keep_memory)
6518 free (local_syms);
6519 else
6520 symtab_hdr->contents = (unsigned char *) local_syms;
6521 }
6522 }
6523
6524 if (first_veneer_scan
6525 && !set_cmse_veneer_addr_from_implib (info, htab,
6526 &cmse_stub_created))
6527 ret = FALSE;
6528
6529 if (prev_num_a8_fixes != num_a8_fixes)
6530 stub_changed = TRUE;
6531
6532 if (!stub_changed)
6533 break;
6534
6535 /* OK, we've added some stubs. Find out the new size of the
6536 stub sections. */
6537 for (stub_sec = htab->stub_bfd->sections;
6538 stub_sec != NULL;
6539 stub_sec = stub_sec->next)
6540 {
6541 /* Ignore non-stub sections. */
6542 if (!strstr (stub_sec->name, STUB_SUFFIX))
6543 continue;
6544
6545 stub_sec->size = 0;
6546 }
6547
6548 /* Add new SG veneers after those already in the input import
6549 library. */
6550 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6551 stub_type++)
6552 {
6553 bfd_vma *start_offset_p;
6554 asection **stub_sec_p;
6555
6556 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6557 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6558 if (start_offset_p == NULL)
6559 continue;
6560
6561 BFD_ASSERT (stub_sec_p != NULL);
6562 if (*stub_sec_p != NULL)
6563 (*stub_sec_p)->size = *start_offset_p;
6564 }
6565
6566 /* Compute stub section size, considering padding. */
6567 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6568 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6569 stub_type++)
6570 {
6571 int size, padding;
6572 asection **stub_sec_p;
6573
6574 padding = arm_dedicated_stub_section_padding (stub_type);
6575 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6576 /* Skip if no stub input section or no stub section padding
6577 required. */
6578 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6579 continue;
6580 /* Stub section padding required but no dedicated section. */
6581 BFD_ASSERT (stub_sec_p);
6582
6583 size = (*stub_sec_p)->size;
6584 size = (size + padding - 1) & ~(padding - 1);
6585 (*stub_sec_p)->size = size;
6586 }
6587
6588 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6589 if (htab->fix_cortex_a8)
6590 for (i = 0; i < num_a8_fixes; i++)
6591 {
6592 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6593 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6594
6595 if (stub_sec == NULL)
6596 return FALSE;
6597
6598 stub_sec->size
6599 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6600 NULL);
6601 }
6602
6603
6604 /* Ask the linker to do its stuff. */
6605 (*htab->layout_sections_again) ();
6606 first_veneer_scan = FALSE;
6607 }
6608
6609 /* Add stubs for Cortex-A8 erratum fixes now. */
6610 if (htab->fix_cortex_a8)
6611 {
6612 for (i = 0; i < num_a8_fixes; i++)
6613 {
6614 struct elf32_arm_stub_hash_entry *stub_entry;
6615 char *stub_name = a8_fixes[i].stub_name;
6616 asection *section = a8_fixes[i].section;
6617 unsigned int section_id = a8_fixes[i].section->id;
6618 asection *link_sec = htab->stub_group[section_id].link_sec;
6619 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6620 const insn_sequence *template_sequence;
6621 int template_size, size = 0;
6622
6623 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6624 TRUE, FALSE);
6625 if (stub_entry == NULL)
6626 {
6627 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6628 section->owner, stub_name);
6629 return FALSE;
6630 }
6631
6632 stub_entry->stub_sec = stub_sec;
6633 stub_entry->stub_offset = (bfd_vma) -1;
6634 stub_entry->id_sec = link_sec;
6635 stub_entry->stub_type = a8_fixes[i].stub_type;
6636 stub_entry->source_value = a8_fixes[i].offset;
6637 stub_entry->target_section = a8_fixes[i].section;
6638 stub_entry->target_value = a8_fixes[i].target_offset;
6639 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6640 stub_entry->branch_type = a8_fixes[i].branch_type;
6641
6642 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6643 &template_sequence,
6644 &template_size);
6645
6646 stub_entry->stub_size = size;
6647 stub_entry->stub_template = template_sequence;
6648 stub_entry->stub_template_size = template_size;
6649 }
6650
6651 /* Stash the Cortex-A8 erratum fix array for use later in
6652 elf32_arm_write_section(). */
6653 htab->a8_erratum_fixes = a8_fixes;
6654 htab->num_a8_erratum_fixes = num_a8_fixes;
6655 }
6656 else
6657 {
6658 htab->a8_erratum_fixes = NULL;
6659 htab->num_a8_erratum_fixes = 0;
6660 }
6661 return ret;
6662 }
6663
6664 /* Build all the stubs associated with the current output file. The
6665 stubs are kept in a hash table attached to the main linker hash
6666 table. We also set up the .plt entries for statically linked PIC
6667 functions here. This function is called via arm_elf_finish in the
6668 linker. */
6669
6670 bfd_boolean
6671 elf32_arm_build_stubs (struct bfd_link_info *info)
6672 {
6673 asection *stub_sec;
6674 struct bfd_hash_table *table;
6675 enum elf32_arm_stub_type stub_type;
6676 struct elf32_arm_link_hash_table *htab;
6677
6678 htab = elf32_arm_hash_table (info);
6679 if (htab == NULL)
6680 return FALSE;
6681
6682 for (stub_sec = htab->stub_bfd->sections;
6683 stub_sec != NULL;
6684 stub_sec = stub_sec->next)
6685 {
6686 bfd_size_type size;
6687
6688 /* Ignore non-stub sections. */
6689 if (!strstr (stub_sec->name, STUB_SUFFIX))
6690 continue;
6691
6692 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6693 must at least be done for stub section requiring padding and for SG
6694 veneers to ensure that a non secure code branching to a removed SG
6695 veneer causes an error. */
6696 size = stub_sec->size;
6697 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6698 if (stub_sec->contents == NULL && size != 0)
6699 return FALSE;
6700
6701 stub_sec->size = 0;
6702 }
6703
6704 /* Add new SG veneers after those already in the input import library. */
6705 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6706 {
6707 bfd_vma *start_offset_p;
6708 asection **stub_sec_p;
6709
6710 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6711 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6712 if (start_offset_p == NULL)
6713 continue;
6714
6715 BFD_ASSERT (stub_sec_p != NULL);
6716 if (*stub_sec_p != NULL)
6717 (*stub_sec_p)->size = *start_offset_p;
6718 }
6719
6720 /* Build the stubs as directed by the stub hash table. */
6721 table = &htab->stub_hash_table;
6722 bfd_hash_traverse (table, arm_build_one_stub, info);
6723 if (htab->fix_cortex_a8)
6724 {
6725 /* Place the cortex a8 stubs last. */
6726 htab->fix_cortex_a8 = -1;
6727 bfd_hash_traverse (table, arm_build_one_stub, info);
6728 }
6729
6730 return TRUE;
6731 }
6732
6733 /* Locate the Thumb encoded calling stub for NAME. */
6734
6735 static struct elf_link_hash_entry *
6736 find_thumb_glue (struct bfd_link_info *link_info,
6737 const char *name,
6738 char **error_message)
6739 {
6740 char *tmp_name;
6741 struct elf_link_hash_entry *hash;
6742 struct elf32_arm_link_hash_table *hash_table;
6743
6744 /* We need a pointer to the armelf specific hash table. */
6745 hash_table = elf32_arm_hash_table (link_info);
6746 if (hash_table == NULL)
6747 return NULL;
6748
6749 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6750 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6751
6752 BFD_ASSERT (tmp_name);
6753
6754 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6755
6756 hash = elf_link_hash_lookup
6757 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6758
6759 if (hash == NULL
6760 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6761 tmp_name, name) == -1)
6762 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6763
6764 free (tmp_name);
6765
6766 return hash;
6767 }
6768
6769 /* Locate the ARM encoded calling stub for NAME. */
6770
6771 static struct elf_link_hash_entry *
6772 find_arm_glue (struct bfd_link_info *link_info,
6773 const char *name,
6774 char **error_message)
6775 {
6776 char *tmp_name;
6777 struct elf_link_hash_entry *myh;
6778 struct elf32_arm_link_hash_table *hash_table;
6779
6780 /* We need a pointer to the elfarm specific hash table. */
6781 hash_table = elf32_arm_hash_table (link_info);
6782 if (hash_table == NULL)
6783 return NULL;
6784
6785 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6786 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6787
6788 BFD_ASSERT (tmp_name);
6789
6790 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6791
6792 myh = elf_link_hash_lookup
6793 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6794
6795 if (myh == NULL
6796 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6797 tmp_name, name) == -1)
6798 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6799
6800 free (tmp_name);
6801
6802 return myh;
6803 }
6804
6805 /* ARM->Thumb glue (static images):
6806
6807 .arm
6808 __func_from_arm:
6809 ldr r12, __func_addr
6810 bx r12
6811 __func_addr:
6812 .word func @ behave as if you saw a ARM_32 reloc.
6813
6814 (v5t static images)
6815 .arm
6816 __func_from_arm:
6817 ldr pc, __func_addr
6818 __func_addr:
6819 .word func @ behave as if you saw a ARM_32 reloc.
6820
6821 (relocatable images)
6822 .arm
6823 __func_from_arm:
6824 ldr r12, __func_offset
6825 add r12, r12, pc
6826 bx r12
6827 __func_offset:
6828 .word func - . */
6829
6830 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6831 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6832 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6833 static const insn32 a2t3_func_addr_insn = 0x00000001;
6834
6835 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6836 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6837 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6838
6839 #define ARM2THUMB_PIC_GLUE_SIZE 16
6840 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6841 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6842 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6843
6844 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6845
6846 .thumb .thumb
6847 .align 2 .align 2
6848 __func_from_thumb: __func_from_thumb:
6849 bx pc push {r6, lr}
6850 nop ldr r6, __func_addr
6851 .arm mov lr, pc
6852 b func bx r6
6853 .arm
6854 ;; back_to_thumb
6855 ldmia r13! {r6, lr}
6856 bx lr
6857 __func_addr:
6858 .word func */
6859
6860 #define THUMB2ARM_GLUE_SIZE 8
6861 static const insn16 t2a1_bx_pc_insn = 0x4778;
6862 static const insn16 t2a2_noop_insn = 0x46c0;
6863 static const insn32 t2a3_b_insn = 0xea000000;
6864
6865 #define VFP11_ERRATUM_VENEER_SIZE 8
6866 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6867 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6868
6869 #define ARM_BX_VENEER_SIZE 12
6870 static const insn32 armbx1_tst_insn = 0xe3100001;
6871 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6872 static const insn32 armbx3_bx_insn = 0xe12fff10;
6873
6874 #ifndef ELFARM_NABI_C_INCLUDED
6875 static void
6876 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6877 {
6878 asection * s;
6879 bfd_byte * contents;
6880
6881 if (size == 0)
6882 {
6883 /* Do not include empty glue sections in the output. */
6884 if (abfd != NULL)
6885 {
6886 s = bfd_get_linker_section (abfd, name);
6887 if (s != NULL)
6888 s->flags |= SEC_EXCLUDE;
6889 }
6890 return;
6891 }
6892
6893 BFD_ASSERT (abfd != NULL);
6894
6895 s = bfd_get_linker_section (abfd, name);
6896 BFD_ASSERT (s != NULL);
6897
6898 contents = (bfd_byte *) bfd_alloc (abfd, size);
6899
6900 BFD_ASSERT (s->size == size);
6901 s->contents = contents;
6902 }
6903
6904 bfd_boolean
6905 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6906 {
6907 struct elf32_arm_link_hash_table * globals;
6908
6909 globals = elf32_arm_hash_table (info);
6910 BFD_ASSERT (globals != NULL);
6911
6912 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6913 globals->arm_glue_size,
6914 ARM2THUMB_GLUE_SECTION_NAME);
6915
6916 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6917 globals->thumb_glue_size,
6918 THUMB2ARM_GLUE_SECTION_NAME);
6919
6920 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6921 globals->vfp11_erratum_glue_size,
6922 VFP11_ERRATUM_VENEER_SECTION_NAME);
6923
6924 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6925 globals->stm32l4xx_erratum_glue_size,
6926 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6927
6928 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6929 globals->bx_glue_size,
6930 ARM_BX_GLUE_SECTION_NAME);
6931
6932 return TRUE;
6933 }
6934
6935 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6936 returns the symbol identifying the stub. */
6937
6938 static struct elf_link_hash_entry *
6939 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6940 struct elf_link_hash_entry * h)
6941 {
6942 const char * name = h->root.root.string;
6943 asection * s;
6944 char * tmp_name;
6945 struct elf_link_hash_entry * myh;
6946 struct bfd_link_hash_entry * bh;
6947 struct elf32_arm_link_hash_table * globals;
6948 bfd_vma val;
6949 bfd_size_type size;
6950
6951 globals = elf32_arm_hash_table (link_info);
6952 BFD_ASSERT (globals != NULL);
6953 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6954
6955 s = bfd_get_linker_section
6956 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6957
6958 BFD_ASSERT (s != NULL);
6959
6960 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6961 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6962
6963 BFD_ASSERT (tmp_name);
6964
6965 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6966
6967 myh = elf_link_hash_lookup
6968 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6969
6970 if (myh != NULL)
6971 {
6972 /* We've already seen this guy. */
6973 free (tmp_name);
6974 return myh;
6975 }
6976
6977 /* The only trick here is using hash_table->arm_glue_size as the value.
6978 Even though the section isn't allocated yet, this is where we will be
6979 putting it. The +1 on the value marks that the stub has not been
6980 output yet - not that it is a Thumb function. */
6981 bh = NULL;
6982 val = globals->arm_glue_size + 1;
6983 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6984 tmp_name, BSF_GLOBAL, s, val,
6985 NULL, TRUE, FALSE, &bh);
6986
6987 myh = (struct elf_link_hash_entry *) bh;
6988 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6989 myh->forced_local = 1;
6990
6991 free (tmp_name);
6992
6993 if (bfd_link_pic (link_info)
6994 || globals->root.is_relocatable_executable
6995 || globals->pic_veneer)
6996 size = ARM2THUMB_PIC_GLUE_SIZE;
6997 else if (globals->use_blx)
6998 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6999 else
7000 size = ARM2THUMB_STATIC_GLUE_SIZE;
7001
7002 s->size += size;
7003 globals->arm_glue_size += size;
7004
7005 return myh;
7006 }
7007
7008 /* Allocate space for ARMv4 BX veneers. */
7009
7010 static void
7011 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7012 {
7013 asection * s;
7014 struct elf32_arm_link_hash_table *globals;
7015 char *tmp_name;
7016 struct elf_link_hash_entry *myh;
7017 struct bfd_link_hash_entry *bh;
7018 bfd_vma val;
7019
7020 /* BX PC does not need a veneer. */
7021 if (reg == 15)
7022 return;
7023
7024 globals = elf32_arm_hash_table (link_info);
7025 BFD_ASSERT (globals != NULL);
7026 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7027
7028 /* Check if this veneer has already been allocated. */
7029 if (globals->bx_glue_offset[reg])
7030 return;
7031
7032 s = bfd_get_linker_section
7033 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7034
7035 BFD_ASSERT (s != NULL);
7036
7037 /* Add symbol for veneer. */
7038 tmp_name = (char *)
7039 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7040
7041 BFD_ASSERT (tmp_name);
7042
7043 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7044
7045 myh = elf_link_hash_lookup
7046 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7047
7048 BFD_ASSERT (myh == NULL);
7049
7050 bh = NULL;
7051 val = globals->bx_glue_size;
7052 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7053 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7054 NULL, TRUE, FALSE, &bh);
7055
7056 myh = (struct elf_link_hash_entry *) bh;
7057 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7058 myh->forced_local = 1;
7059
7060 s->size += ARM_BX_VENEER_SIZE;
7061 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7062 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7063 }
7064
7065
7066 /* Add an entry to the code/data map for section SEC. */
7067
7068 static void
7069 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7070 {
7071 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7072 unsigned int newidx;
7073
7074 if (sec_data->map == NULL)
7075 {
7076 sec_data->map = (elf32_arm_section_map *)
7077 bfd_malloc (sizeof (elf32_arm_section_map));
7078 sec_data->mapcount = 0;
7079 sec_data->mapsize = 1;
7080 }
7081
7082 newidx = sec_data->mapcount++;
7083
7084 if (sec_data->mapcount > sec_data->mapsize)
7085 {
7086 sec_data->mapsize *= 2;
7087 sec_data->map = (elf32_arm_section_map *)
7088 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7089 * sizeof (elf32_arm_section_map));
7090 }
7091
7092 if (sec_data->map)
7093 {
7094 sec_data->map[newidx].vma = vma;
7095 sec_data->map[newidx].type = type;
7096 }
7097 }
7098
7099
7100 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7101 veneers are handled for now. */
7102
7103 static bfd_vma
7104 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7105 elf32_vfp11_erratum_list *branch,
7106 bfd *branch_bfd,
7107 asection *branch_sec,
7108 unsigned int offset)
7109 {
7110 asection *s;
7111 struct elf32_arm_link_hash_table *hash_table;
7112 char *tmp_name;
7113 struct elf_link_hash_entry *myh;
7114 struct bfd_link_hash_entry *bh;
7115 bfd_vma val;
7116 struct _arm_elf_section_data *sec_data;
7117 elf32_vfp11_erratum_list *newerr;
7118
7119 hash_table = elf32_arm_hash_table (link_info);
7120 BFD_ASSERT (hash_table != NULL);
7121 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7122
7123 s = bfd_get_linker_section
7124 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7125
7126 sec_data = elf32_arm_section_data (s);
7127
7128 BFD_ASSERT (s != NULL);
7129
7130 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7131 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7132
7133 BFD_ASSERT (tmp_name);
7134
7135 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7136 hash_table->num_vfp11_fixes);
7137
7138 myh = elf_link_hash_lookup
7139 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7140
7141 BFD_ASSERT (myh == NULL);
7142
7143 bh = NULL;
7144 val = hash_table->vfp11_erratum_glue_size;
7145 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7146 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7147 NULL, TRUE, FALSE, &bh);
7148
7149 myh = (struct elf_link_hash_entry *) bh;
7150 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7151 myh->forced_local = 1;
7152
7153 /* Link veneer back to calling location. */
7154 sec_data->erratumcount += 1;
7155 newerr = (elf32_vfp11_erratum_list *)
7156 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7157
7158 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7159 newerr->vma = -1;
7160 newerr->u.v.branch = branch;
7161 newerr->u.v.id = hash_table->num_vfp11_fixes;
7162 branch->u.b.veneer = newerr;
7163
7164 newerr->next = sec_data->erratumlist;
7165 sec_data->erratumlist = newerr;
7166
7167 /* A symbol for the return from the veneer. */
7168 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7169 hash_table->num_vfp11_fixes);
7170
7171 myh = elf_link_hash_lookup
7172 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7173
7174 if (myh != NULL)
7175 abort ();
7176
7177 bh = NULL;
7178 val = offset + 4;
7179 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7180 branch_sec, val, NULL, TRUE, FALSE, &bh);
7181
7182 myh = (struct elf_link_hash_entry *) bh;
7183 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7184 myh->forced_local = 1;
7185
7186 free (tmp_name);
7187
7188 /* Generate a mapping symbol for the veneer section, and explicitly add an
7189 entry for that symbol to the code/data map for the section. */
7190 if (hash_table->vfp11_erratum_glue_size == 0)
7191 {
7192 bh = NULL;
7193 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7194 ever requires this erratum fix. */
7195 _bfd_generic_link_add_one_symbol (link_info,
7196 hash_table->bfd_of_glue_owner, "$a",
7197 BSF_LOCAL, s, 0, NULL,
7198 TRUE, FALSE, &bh);
7199
7200 myh = (struct elf_link_hash_entry *) bh;
7201 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7202 myh->forced_local = 1;
7203
7204 /* The elf32_arm_init_maps function only cares about symbols from input
7205 BFDs. We must make a note of this generated mapping symbol
7206 ourselves so that code byteswapping works properly in
7207 elf32_arm_write_section. */
7208 elf32_arm_section_map_add (s, 'a', 0);
7209 }
7210
7211 s->size += VFP11_ERRATUM_VENEER_SIZE;
7212 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7213 hash_table->num_vfp11_fixes++;
7214
7215 /* The offset of the veneer. */
7216 return val;
7217 }
7218
7219 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7220 veneers need to be handled because used only in Cortex-M. */
7221
7222 static bfd_vma
7223 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7224 elf32_stm32l4xx_erratum_list *branch,
7225 bfd *branch_bfd,
7226 asection *branch_sec,
7227 unsigned int offset,
7228 bfd_size_type veneer_size)
7229 {
7230 asection *s;
7231 struct elf32_arm_link_hash_table *hash_table;
7232 char *tmp_name;
7233 struct elf_link_hash_entry *myh;
7234 struct bfd_link_hash_entry *bh;
7235 bfd_vma val;
7236 struct _arm_elf_section_data *sec_data;
7237 elf32_stm32l4xx_erratum_list *newerr;
7238
7239 hash_table = elf32_arm_hash_table (link_info);
7240 BFD_ASSERT (hash_table != NULL);
7241 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7242
7243 s = bfd_get_linker_section
7244 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7245
7246 BFD_ASSERT (s != NULL);
7247
7248 sec_data = elf32_arm_section_data (s);
7249
7250 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7251 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7252
7253 BFD_ASSERT (tmp_name);
7254
7255 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7256 hash_table->num_stm32l4xx_fixes);
7257
7258 myh = elf_link_hash_lookup
7259 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7260
7261 BFD_ASSERT (myh == NULL);
7262
7263 bh = NULL;
7264 val = hash_table->stm32l4xx_erratum_glue_size;
7265 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7266 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7267 NULL, TRUE, FALSE, &bh);
7268
7269 myh = (struct elf_link_hash_entry *) bh;
7270 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7271 myh->forced_local = 1;
7272
7273 /* Link veneer back to calling location. */
7274 sec_data->stm32l4xx_erratumcount += 1;
7275 newerr = (elf32_stm32l4xx_erratum_list *)
7276 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7277
7278 newerr->type = STM32L4XX_ERRATUM_VENEER;
7279 newerr->vma = -1;
7280 newerr->u.v.branch = branch;
7281 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7282 branch->u.b.veneer = newerr;
7283
7284 newerr->next = sec_data->stm32l4xx_erratumlist;
7285 sec_data->stm32l4xx_erratumlist = newerr;
7286
7287 /* A symbol for the return from the veneer. */
7288 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7289 hash_table->num_stm32l4xx_fixes);
7290
7291 myh = elf_link_hash_lookup
7292 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7293
7294 if (myh != NULL)
7295 abort ();
7296
7297 bh = NULL;
7298 val = offset + 4;
7299 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7300 branch_sec, val, NULL, TRUE, FALSE, &bh);
7301
7302 myh = (struct elf_link_hash_entry *) bh;
7303 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7304 myh->forced_local = 1;
7305
7306 free (tmp_name);
7307
7308 /* Generate a mapping symbol for the veneer section, and explicitly add an
7309 entry for that symbol to the code/data map for the section. */
7310 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7311 {
7312 bh = NULL;
7313 /* Creates a THUMB symbol since there is no other choice. */
7314 _bfd_generic_link_add_one_symbol (link_info,
7315 hash_table->bfd_of_glue_owner, "$t",
7316 BSF_LOCAL, s, 0, NULL,
7317 TRUE, FALSE, &bh);
7318
7319 myh = (struct elf_link_hash_entry *) bh;
7320 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7321 myh->forced_local = 1;
7322
7323 /* The elf32_arm_init_maps function only cares about symbols from input
7324 BFDs. We must make a note of this generated mapping symbol
7325 ourselves so that code byteswapping works properly in
7326 elf32_arm_write_section. */
7327 elf32_arm_section_map_add (s, 't', 0);
7328 }
7329
7330 s->size += veneer_size;
7331 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7332 hash_table->num_stm32l4xx_fixes++;
7333
7334 /* The offset of the veneer. */
7335 return val;
7336 }
7337
7338 #define ARM_GLUE_SECTION_FLAGS \
7339 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7340 | SEC_READONLY | SEC_LINKER_CREATED)
7341
7342 /* Create a fake section for use by the ARM backend of the linker. */
7343
7344 static bfd_boolean
7345 arm_make_glue_section (bfd * abfd, const char * name)
7346 {
7347 asection * sec;
7348
7349 sec = bfd_get_linker_section (abfd, name);
7350 if (sec != NULL)
7351 /* Already made. */
7352 return TRUE;
7353
7354 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7355
7356 if (sec == NULL
7357 || !bfd_set_section_alignment (abfd, sec, 2))
7358 return FALSE;
7359
7360 /* Set the gc mark to prevent the section from being removed by garbage
7361 collection, despite the fact that no relocs refer to this section. */
7362 sec->gc_mark = 1;
7363
7364 return TRUE;
7365 }
7366
7367 /* Set size of .plt entries. This function is called from the
7368 linker scripts in ld/emultempl/{armelf}.em. */
7369
7370 void
7371 bfd_elf32_arm_use_long_plt (void)
7372 {
7373 elf32_arm_use_long_plt_entry = TRUE;
7374 }
7375
7376 /* Add the glue sections to ABFD. This function is called from the
7377 linker scripts in ld/emultempl/{armelf}.em. */
7378
7379 bfd_boolean
7380 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7381 struct bfd_link_info *info)
7382 {
7383 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7384 bfd_boolean dostm32l4xx = globals
7385 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7386 bfd_boolean addglue;
7387
7388 /* If we are only performing a partial
7389 link do not bother adding the glue. */
7390 if (bfd_link_relocatable (info))
7391 return TRUE;
7392
7393 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7394 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7395 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7396 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7397
7398 if (!dostm32l4xx)
7399 return addglue;
7400
7401 return addglue
7402 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7403 }
7404
7405 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7406 ensures they are not marked for deletion by
7407 strip_excluded_output_sections () when veneers are going to be created
7408 later. Not doing so would trigger assert on empty section size in
7409 lang_size_sections_1 (). */
7410
7411 void
7412 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7413 {
7414 enum elf32_arm_stub_type stub_type;
7415
7416 /* If we are only performing a partial
7417 link do not bother adding the glue. */
7418 if (bfd_link_relocatable (info))
7419 return;
7420
7421 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7422 {
7423 asection *out_sec;
7424 const char *out_sec_name;
7425
7426 if (!arm_dedicated_stub_output_section_required (stub_type))
7427 continue;
7428
7429 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7430 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7431 if (out_sec != NULL)
7432 out_sec->flags |= SEC_KEEP;
7433 }
7434 }
7435
7436 /* Select a BFD to be used to hold the sections used by the glue code.
7437 This function is called from the linker scripts in ld/emultempl/
7438 {armelf/pe}.em. */
7439
7440 bfd_boolean
7441 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7442 {
7443 struct elf32_arm_link_hash_table *globals;
7444
7445 /* If we are only performing a partial link
7446 do not bother getting a bfd to hold the glue. */
7447 if (bfd_link_relocatable (info))
7448 return TRUE;
7449
7450 /* Make sure we don't attach the glue sections to a dynamic object. */
7451 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7452
7453 globals = elf32_arm_hash_table (info);
7454 BFD_ASSERT (globals != NULL);
7455
7456 if (globals->bfd_of_glue_owner != NULL)
7457 return TRUE;
7458
7459 /* Save the bfd for later use. */
7460 globals->bfd_of_glue_owner = abfd;
7461
7462 return TRUE;
7463 }
7464
7465 static void
7466 check_use_blx (struct elf32_arm_link_hash_table *globals)
7467 {
7468 int cpu_arch;
7469
7470 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7471 Tag_CPU_arch);
7472
7473 if (globals->fix_arm1176)
7474 {
7475 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7476 globals->use_blx = 1;
7477 }
7478 else
7479 {
7480 if (cpu_arch > TAG_CPU_ARCH_V4T)
7481 globals->use_blx = 1;
7482 }
7483 }
7484
7485 bfd_boolean
7486 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7487 struct bfd_link_info *link_info)
7488 {
7489 Elf_Internal_Shdr *symtab_hdr;
7490 Elf_Internal_Rela *internal_relocs = NULL;
7491 Elf_Internal_Rela *irel, *irelend;
7492 bfd_byte *contents = NULL;
7493
7494 asection *sec;
7495 struct elf32_arm_link_hash_table *globals;
7496
7497 /* If we are only performing a partial link do not bother
7498 to construct any glue. */
7499 if (bfd_link_relocatable (link_info))
7500 return TRUE;
7501
7502 /* Here we have a bfd that is to be included on the link. We have a
7503 hook to do reloc rummaging, before section sizes are nailed down. */
7504 globals = elf32_arm_hash_table (link_info);
7505 BFD_ASSERT (globals != NULL);
7506
7507 check_use_blx (globals);
7508
7509 if (globals->byteswap_code && !bfd_big_endian (abfd))
7510 {
7511 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode."),
7512 abfd);
7513 return FALSE;
7514 }
7515
7516 /* PR 5398: If we have not decided to include any loadable sections in
7517 the output then we will not have a glue owner bfd. This is OK, it
7518 just means that there is nothing else for us to do here. */
7519 if (globals->bfd_of_glue_owner == NULL)
7520 return TRUE;
7521
7522 /* Rummage around all the relocs and map the glue vectors. */
7523 sec = abfd->sections;
7524
7525 if (sec == NULL)
7526 return TRUE;
7527
7528 for (; sec != NULL; sec = sec->next)
7529 {
7530 if (sec->reloc_count == 0)
7531 continue;
7532
7533 if ((sec->flags & SEC_EXCLUDE) != 0)
7534 continue;
7535
7536 symtab_hdr = & elf_symtab_hdr (abfd);
7537
7538 /* Load the relocs. */
7539 internal_relocs
7540 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7541
7542 if (internal_relocs == NULL)
7543 goto error_return;
7544
7545 irelend = internal_relocs + sec->reloc_count;
7546 for (irel = internal_relocs; irel < irelend; irel++)
7547 {
7548 long r_type;
7549 unsigned long r_index;
7550
7551 struct elf_link_hash_entry *h;
7552
7553 r_type = ELF32_R_TYPE (irel->r_info);
7554 r_index = ELF32_R_SYM (irel->r_info);
7555
7556 /* These are the only relocation types we care about. */
7557 if ( r_type != R_ARM_PC24
7558 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7559 continue;
7560
7561 /* Get the section contents if we haven't done so already. */
7562 if (contents == NULL)
7563 {
7564 /* Get cached copy if it exists. */
7565 if (elf_section_data (sec)->this_hdr.contents != NULL)
7566 contents = elf_section_data (sec)->this_hdr.contents;
7567 else
7568 {
7569 /* Go get them off disk. */
7570 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7571 goto error_return;
7572 }
7573 }
7574
7575 if (r_type == R_ARM_V4BX)
7576 {
7577 int reg;
7578
7579 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7580 record_arm_bx_glue (link_info, reg);
7581 continue;
7582 }
7583
7584 /* If the relocation is not against a symbol it cannot concern us. */
7585 h = NULL;
7586
7587 /* We don't care about local symbols. */
7588 if (r_index < symtab_hdr->sh_info)
7589 continue;
7590
7591 /* This is an external symbol. */
7592 r_index -= symtab_hdr->sh_info;
7593 h = (struct elf_link_hash_entry *)
7594 elf_sym_hashes (abfd)[r_index];
7595
7596 /* If the relocation is against a static symbol it must be within
7597 the current section and so cannot be a cross ARM/Thumb relocation. */
7598 if (h == NULL)
7599 continue;
7600
7601 /* If the call will go through a PLT entry then we do not need
7602 glue. */
7603 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7604 continue;
7605
7606 switch (r_type)
7607 {
7608 case R_ARM_PC24:
7609 /* This one is a call from arm code. We need to look up
7610 the target of the call. If it is a thumb target, we
7611 insert glue. */
7612 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7613 == ST_BRANCH_TO_THUMB)
7614 record_arm_to_thumb_glue (link_info, h);
7615 break;
7616
7617 default:
7618 abort ();
7619 }
7620 }
7621
7622 if (contents != NULL
7623 && elf_section_data (sec)->this_hdr.contents != contents)
7624 free (contents);
7625 contents = NULL;
7626
7627 if (internal_relocs != NULL
7628 && elf_section_data (sec)->relocs != internal_relocs)
7629 free (internal_relocs);
7630 internal_relocs = NULL;
7631 }
7632
7633 return TRUE;
7634
7635 error_return:
7636 if (contents != NULL
7637 && elf_section_data (sec)->this_hdr.contents != contents)
7638 free (contents);
7639 if (internal_relocs != NULL
7640 && elf_section_data (sec)->relocs != internal_relocs)
7641 free (internal_relocs);
7642
7643 return FALSE;
7644 }
7645 #endif
7646
7647
7648 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7649
7650 void
7651 bfd_elf32_arm_init_maps (bfd *abfd)
7652 {
7653 Elf_Internal_Sym *isymbuf;
7654 Elf_Internal_Shdr *hdr;
7655 unsigned int i, localsyms;
7656
7657 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7658 if (! is_arm_elf (abfd))
7659 return;
7660
7661 if ((abfd->flags & DYNAMIC) != 0)
7662 return;
7663
7664 hdr = & elf_symtab_hdr (abfd);
7665 localsyms = hdr->sh_info;
7666
7667 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7668 should contain the number of local symbols, which should come before any
7669 global symbols. Mapping symbols are always local. */
7670 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7671 NULL);
7672
7673 /* No internal symbols read? Skip this BFD. */
7674 if (isymbuf == NULL)
7675 return;
7676
7677 for (i = 0; i < localsyms; i++)
7678 {
7679 Elf_Internal_Sym *isym = &isymbuf[i];
7680 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7681 const char *name;
7682
7683 if (sec != NULL
7684 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7685 {
7686 name = bfd_elf_string_from_elf_section (abfd,
7687 hdr->sh_link, isym->st_name);
7688
7689 if (bfd_is_arm_special_symbol_name (name,
7690 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7691 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7692 }
7693 }
7694 }
7695
7696
7697 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7698 say what they wanted. */
7699
7700 void
7701 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7702 {
7703 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7704 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7705
7706 if (globals == NULL)
7707 return;
7708
7709 if (globals->fix_cortex_a8 == -1)
7710 {
7711 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7712 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7713 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7714 || out_attr[Tag_CPU_arch_profile].i == 0))
7715 globals->fix_cortex_a8 = 1;
7716 else
7717 globals->fix_cortex_a8 = 0;
7718 }
7719 }
7720
7721
7722 void
7723 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7724 {
7725 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7726 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7727
7728 if (globals == NULL)
7729 return;
7730 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7731 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7732 {
7733 switch (globals->vfp11_fix)
7734 {
7735 case BFD_ARM_VFP11_FIX_DEFAULT:
7736 case BFD_ARM_VFP11_FIX_NONE:
7737 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7738 break;
7739
7740 default:
7741 /* Give a warning, but do as the user requests anyway. */
7742 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
7743 "workaround is not necessary for target architecture"), obfd);
7744 }
7745 }
7746 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7747 /* For earlier architectures, we might need the workaround, but do not
7748 enable it by default. If users is running with broken hardware, they
7749 must enable the erratum fix explicitly. */
7750 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7751 }
7752
7753 void
7754 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7755 {
7756 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7757 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7758
7759 if (globals == NULL)
7760 return;
7761
7762 /* We assume only Cortex-M4 may require the fix. */
7763 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7764 || out_attr[Tag_CPU_arch_profile].i != 'M')
7765 {
7766 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7767 /* Give a warning, but do as the user requests anyway. */
7768 _bfd_error_handler
7769 (_("%pB: warning: selected STM32L4XX erratum "
7770 "workaround is not necessary for target architecture"), obfd);
7771 }
7772 }
7773
7774 enum bfd_arm_vfp11_pipe
7775 {
7776 VFP11_FMAC,
7777 VFP11_LS,
7778 VFP11_DS,
7779 VFP11_BAD
7780 };
7781
7782 /* Return a VFP register number. This is encoded as RX:X for single-precision
7783 registers, or X:RX for double-precision registers, where RX is the group of
7784 four bits in the instruction encoding and X is the single extension bit.
7785 RX and X fields are specified using their lowest (starting) bit. The return
7786 value is:
7787
7788 0...31: single-precision registers s0...s31
7789 32...63: double-precision registers d0...d31.
7790
7791 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7792 encounter VFP3 instructions, so we allow the full range for DP registers. */
7793
7794 static unsigned int
7795 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7796 unsigned int x)
7797 {
7798 if (is_double)
7799 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7800 else
7801 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7802 }
7803
7804 /* Set bits in *WMASK according to a register number REG as encoded by
7805 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7806
7807 static void
7808 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7809 {
7810 if (reg < 32)
7811 *wmask |= 1 << reg;
7812 else if (reg < 48)
7813 *wmask |= 3 << ((reg - 32) * 2);
7814 }
7815
7816 /* Return TRUE if WMASK overwrites anything in REGS. */
7817
7818 static bfd_boolean
7819 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7820 {
7821 int i;
7822
7823 for (i = 0; i < numregs; i++)
7824 {
7825 unsigned int reg = regs[i];
7826
7827 if (reg < 32 && (wmask & (1 << reg)) != 0)
7828 return TRUE;
7829
7830 reg -= 32;
7831
7832 if (reg >= 16)
7833 continue;
7834
7835 if ((wmask & (3 << (reg * 2))) != 0)
7836 return TRUE;
7837 }
7838
7839 return FALSE;
7840 }
7841
7842 /* In this function, we're interested in two things: finding input registers
7843 for VFP data-processing instructions, and finding the set of registers which
7844 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7845 hold the written set, so FLDM etc. are easy to deal with (we're only
7846 interested in 32 SP registers or 16 dp registers, due to the VFP version
7847 implemented by the chip in question). DP registers are marked by setting
7848 both SP registers in the write mask). */
7849
7850 static enum bfd_arm_vfp11_pipe
7851 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7852 int *numregs)
7853 {
7854 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7855 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7856
7857 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7858 {
7859 unsigned int pqrs;
7860 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7861 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7862
7863 pqrs = ((insn & 0x00800000) >> 20)
7864 | ((insn & 0x00300000) >> 19)
7865 | ((insn & 0x00000040) >> 6);
7866
7867 switch (pqrs)
7868 {
7869 case 0: /* fmac[sd]. */
7870 case 1: /* fnmac[sd]. */
7871 case 2: /* fmsc[sd]. */
7872 case 3: /* fnmsc[sd]. */
7873 vpipe = VFP11_FMAC;
7874 bfd_arm_vfp11_write_mask (destmask, fd);
7875 regs[0] = fd;
7876 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7877 regs[2] = fm;
7878 *numregs = 3;
7879 break;
7880
7881 case 4: /* fmul[sd]. */
7882 case 5: /* fnmul[sd]. */
7883 case 6: /* fadd[sd]. */
7884 case 7: /* fsub[sd]. */
7885 vpipe = VFP11_FMAC;
7886 goto vfp_binop;
7887
7888 case 8: /* fdiv[sd]. */
7889 vpipe = VFP11_DS;
7890 vfp_binop:
7891 bfd_arm_vfp11_write_mask (destmask, fd);
7892 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7893 regs[1] = fm;
7894 *numregs = 2;
7895 break;
7896
7897 case 15: /* extended opcode. */
7898 {
7899 unsigned int extn = ((insn >> 15) & 0x1e)
7900 | ((insn >> 7) & 1);
7901
7902 switch (extn)
7903 {
7904 case 0: /* fcpy[sd]. */
7905 case 1: /* fabs[sd]. */
7906 case 2: /* fneg[sd]. */
7907 case 8: /* fcmp[sd]. */
7908 case 9: /* fcmpe[sd]. */
7909 case 10: /* fcmpz[sd]. */
7910 case 11: /* fcmpez[sd]. */
7911 case 16: /* fuito[sd]. */
7912 case 17: /* fsito[sd]. */
7913 case 24: /* ftoui[sd]. */
7914 case 25: /* ftouiz[sd]. */
7915 case 26: /* ftosi[sd]. */
7916 case 27: /* ftosiz[sd]. */
7917 /* These instructions will not bounce due to underflow. */
7918 *numregs = 0;
7919 vpipe = VFP11_FMAC;
7920 break;
7921
7922 case 3: /* fsqrt[sd]. */
7923 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7924 registers to cause the erratum in previous instructions. */
7925 bfd_arm_vfp11_write_mask (destmask, fd);
7926 vpipe = VFP11_DS;
7927 break;
7928
7929 case 15: /* fcvt{ds,sd}. */
7930 {
7931 int rnum = 0;
7932
7933 bfd_arm_vfp11_write_mask (destmask, fd);
7934
7935 /* Only FCVTSD can underflow. */
7936 if ((insn & 0x100) != 0)
7937 regs[rnum++] = fm;
7938
7939 *numregs = rnum;
7940
7941 vpipe = VFP11_FMAC;
7942 }
7943 break;
7944
7945 default:
7946 return VFP11_BAD;
7947 }
7948 }
7949 break;
7950
7951 default:
7952 return VFP11_BAD;
7953 }
7954 }
7955 /* Two-register transfer. */
7956 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7957 {
7958 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7959
7960 if ((insn & 0x100000) == 0)
7961 {
7962 if (is_double)
7963 bfd_arm_vfp11_write_mask (destmask, fm);
7964 else
7965 {
7966 bfd_arm_vfp11_write_mask (destmask, fm);
7967 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7968 }
7969 }
7970
7971 vpipe = VFP11_LS;
7972 }
7973 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7974 {
7975 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7976 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7977
7978 switch (puw)
7979 {
7980 case 0: /* Two-reg transfer. We should catch these above. */
7981 abort ();
7982
7983 case 2: /* fldm[sdx]. */
7984 case 3:
7985 case 5:
7986 {
7987 unsigned int i, offset = insn & 0xff;
7988
7989 if (is_double)
7990 offset >>= 1;
7991
7992 for (i = fd; i < fd + offset; i++)
7993 bfd_arm_vfp11_write_mask (destmask, i);
7994 }
7995 break;
7996
7997 case 4: /* fld[sd]. */
7998 case 6:
7999 bfd_arm_vfp11_write_mask (destmask, fd);
8000 break;
8001
8002 default:
8003 return VFP11_BAD;
8004 }
8005
8006 vpipe = VFP11_LS;
8007 }
8008 /* Single-register transfer. Note L==0. */
8009 else if ((insn & 0x0f100e10) == 0x0e000a10)
8010 {
8011 unsigned int opcode = (insn >> 21) & 7;
8012 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8013
8014 switch (opcode)
8015 {
8016 case 0: /* fmsr/fmdlr. */
8017 case 1: /* fmdhr. */
8018 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8019 destination register. I don't know if this is exactly right,
8020 but it is the conservative choice. */
8021 bfd_arm_vfp11_write_mask (destmask, fn);
8022 break;
8023
8024 case 7: /* fmxr. */
8025 break;
8026 }
8027
8028 vpipe = VFP11_LS;
8029 }
8030
8031 return vpipe;
8032 }
8033
8034
8035 static int elf32_arm_compare_mapping (const void * a, const void * b);
8036
8037
8038 /* Look for potentially-troublesome code sequences which might trigger the
8039 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8040 (available from ARM) for details of the erratum. A short version is
8041 described in ld.texinfo. */
8042
8043 bfd_boolean
8044 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8045 {
8046 asection *sec;
8047 bfd_byte *contents = NULL;
8048 int state = 0;
8049 int regs[3], numregs = 0;
8050 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8051 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8052
8053 if (globals == NULL)
8054 return FALSE;
8055
8056 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8057 The states transition as follows:
8058
8059 0 -> 1 (vector) or 0 -> 2 (scalar)
8060 A VFP FMAC-pipeline instruction has been seen. Fill
8061 regs[0]..regs[numregs-1] with its input operands. Remember this
8062 instruction in 'first_fmac'.
8063
8064 1 -> 2
8065 Any instruction, except for a VFP instruction which overwrites
8066 regs[*].
8067
8068 1 -> 3 [ -> 0 ] or
8069 2 -> 3 [ -> 0 ]
8070 A VFP instruction has been seen which overwrites any of regs[*].
8071 We must make a veneer! Reset state to 0 before examining next
8072 instruction.
8073
8074 2 -> 0
8075 If we fail to match anything in state 2, reset to state 0 and reset
8076 the instruction pointer to the instruction after 'first_fmac'.
8077
8078 If the VFP11 vector mode is in use, there must be at least two unrelated
8079 instructions between anti-dependent VFP11 instructions to properly avoid
8080 triggering the erratum, hence the use of the extra state 1. */
8081
8082 /* If we are only performing a partial link do not bother
8083 to construct any glue. */
8084 if (bfd_link_relocatable (link_info))
8085 return TRUE;
8086
8087 /* Skip if this bfd does not correspond to an ELF image. */
8088 if (! is_arm_elf (abfd))
8089 return TRUE;
8090
8091 /* We should have chosen a fix type by the time we get here. */
8092 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8093
8094 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8095 return TRUE;
8096
8097 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8098 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8099 return TRUE;
8100
8101 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8102 {
8103 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8104 struct _arm_elf_section_data *sec_data;
8105
8106 /* If we don't have executable progbits, we're not interested in this
8107 section. Also skip if section is to be excluded. */
8108 if (elf_section_type (sec) != SHT_PROGBITS
8109 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8110 || (sec->flags & SEC_EXCLUDE) != 0
8111 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8112 || sec->output_section == bfd_abs_section_ptr
8113 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8114 continue;
8115
8116 sec_data = elf32_arm_section_data (sec);
8117
8118 if (sec_data->mapcount == 0)
8119 continue;
8120
8121 if (elf_section_data (sec)->this_hdr.contents != NULL)
8122 contents = elf_section_data (sec)->this_hdr.contents;
8123 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8124 goto error_return;
8125
8126 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8127 elf32_arm_compare_mapping);
8128
8129 for (span = 0; span < sec_data->mapcount; span++)
8130 {
8131 unsigned int span_start = sec_data->map[span].vma;
8132 unsigned int span_end = (span == sec_data->mapcount - 1)
8133 ? sec->size : sec_data->map[span + 1].vma;
8134 char span_type = sec_data->map[span].type;
8135
8136 /* FIXME: Only ARM mode is supported at present. We may need to
8137 support Thumb-2 mode also at some point. */
8138 if (span_type != 'a')
8139 continue;
8140
8141 for (i = span_start; i < span_end;)
8142 {
8143 unsigned int next_i = i + 4;
8144 unsigned int insn = bfd_big_endian (abfd)
8145 ? (contents[i] << 24)
8146 | (contents[i + 1] << 16)
8147 | (contents[i + 2] << 8)
8148 | contents[i + 3]
8149 : (contents[i + 3] << 24)
8150 | (contents[i + 2] << 16)
8151 | (contents[i + 1] << 8)
8152 | contents[i];
8153 unsigned int writemask = 0;
8154 enum bfd_arm_vfp11_pipe vpipe;
8155
8156 switch (state)
8157 {
8158 case 0:
8159 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8160 &numregs);
8161 /* I'm assuming the VFP11 erratum can trigger with denorm
8162 operands on either the FMAC or the DS pipeline. This might
8163 lead to slightly overenthusiastic veneer insertion. */
8164 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8165 {
8166 state = use_vector ? 1 : 2;
8167 first_fmac = i;
8168 veneer_of_insn = insn;
8169 }
8170 break;
8171
8172 case 1:
8173 {
8174 int other_regs[3], other_numregs;
8175 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8176 other_regs,
8177 &other_numregs);
8178 if (vpipe != VFP11_BAD
8179 && bfd_arm_vfp11_antidependency (writemask, regs,
8180 numregs))
8181 state = 3;
8182 else
8183 state = 2;
8184 }
8185 break;
8186
8187 case 2:
8188 {
8189 int other_regs[3], other_numregs;
8190 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8191 other_regs,
8192 &other_numregs);
8193 if (vpipe != VFP11_BAD
8194 && bfd_arm_vfp11_antidependency (writemask, regs,
8195 numregs))
8196 state = 3;
8197 else
8198 {
8199 state = 0;
8200 next_i = first_fmac + 4;
8201 }
8202 }
8203 break;
8204
8205 case 3:
8206 abort (); /* Should be unreachable. */
8207 }
8208
8209 if (state == 3)
8210 {
8211 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8212 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8213
8214 elf32_arm_section_data (sec)->erratumcount += 1;
8215
8216 newerr->u.b.vfp_insn = veneer_of_insn;
8217
8218 switch (span_type)
8219 {
8220 case 'a':
8221 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8222 break;
8223
8224 default:
8225 abort ();
8226 }
8227
8228 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8229 first_fmac);
8230
8231 newerr->vma = -1;
8232
8233 newerr->next = sec_data->erratumlist;
8234 sec_data->erratumlist = newerr;
8235
8236 state = 0;
8237 }
8238
8239 i = next_i;
8240 }
8241 }
8242
8243 if (contents != NULL
8244 && elf_section_data (sec)->this_hdr.contents != contents)
8245 free (contents);
8246 contents = NULL;
8247 }
8248
8249 return TRUE;
8250
8251 error_return:
8252 if (contents != NULL
8253 && elf_section_data (sec)->this_hdr.contents != contents)
8254 free (contents);
8255
8256 return FALSE;
8257 }
8258
8259 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8260 after sections have been laid out, using specially-named symbols. */
8261
8262 void
8263 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8264 struct bfd_link_info *link_info)
8265 {
8266 asection *sec;
8267 struct elf32_arm_link_hash_table *globals;
8268 char *tmp_name;
8269
8270 if (bfd_link_relocatable (link_info))
8271 return;
8272
8273 /* Skip if this bfd does not correspond to an ELF image. */
8274 if (! is_arm_elf (abfd))
8275 return;
8276
8277 globals = elf32_arm_hash_table (link_info);
8278 if (globals == NULL)
8279 return;
8280
8281 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8282 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8283
8284 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8285 {
8286 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8287 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8288
8289 for (; errnode != NULL; errnode = errnode->next)
8290 {
8291 struct elf_link_hash_entry *myh;
8292 bfd_vma vma;
8293
8294 switch (errnode->type)
8295 {
8296 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8297 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8298 /* Find veneer symbol. */
8299 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8300 errnode->u.b.veneer->u.v.id);
8301
8302 myh = elf_link_hash_lookup
8303 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8304
8305 if (myh == NULL)
8306 _bfd_error_handler (_("%pB: unable to find VFP11 veneer "
8307 "`%s'"), abfd, tmp_name);
8308
8309 vma = myh->root.u.def.section->output_section->vma
8310 + myh->root.u.def.section->output_offset
8311 + myh->root.u.def.value;
8312
8313 errnode->u.b.veneer->vma = vma;
8314 break;
8315
8316 case VFP11_ERRATUM_ARM_VENEER:
8317 case VFP11_ERRATUM_THUMB_VENEER:
8318 /* Find return location. */
8319 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8320 errnode->u.v.id);
8321
8322 myh = elf_link_hash_lookup
8323 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8324
8325 if (myh == NULL)
8326 _bfd_error_handler (_("%pB: unable to find VFP11 veneer "
8327 "`%s'"), abfd, tmp_name);
8328
8329 vma = myh->root.u.def.section->output_section->vma
8330 + myh->root.u.def.section->output_offset
8331 + myh->root.u.def.value;
8332
8333 errnode->u.v.branch->vma = vma;
8334 break;
8335
8336 default:
8337 abort ();
8338 }
8339 }
8340 }
8341
8342 free (tmp_name);
8343 }
8344
8345 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8346 return locations after sections have been laid out, using
8347 specially-named symbols. */
8348
8349 void
8350 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8351 struct bfd_link_info *link_info)
8352 {
8353 asection *sec;
8354 struct elf32_arm_link_hash_table *globals;
8355 char *tmp_name;
8356
8357 if (bfd_link_relocatable (link_info))
8358 return;
8359
8360 /* Skip if this bfd does not correspond to an ELF image. */
8361 if (! is_arm_elf (abfd))
8362 return;
8363
8364 globals = elf32_arm_hash_table (link_info);
8365 if (globals == NULL)
8366 return;
8367
8368 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8369 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8370
8371 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8372 {
8373 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8374 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8375
8376 for (; errnode != NULL; errnode = errnode->next)
8377 {
8378 struct elf_link_hash_entry *myh;
8379 bfd_vma vma;
8380
8381 switch (errnode->type)
8382 {
8383 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8384 /* Find veneer symbol. */
8385 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8386 errnode->u.b.veneer->u.v.id);
8387
8388 myh = elf_link_hash_lookup
8389 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8390
8391 if (myh == NULL)
8392 _bfd_error_handler (_("%pB: unable to find STM32L4XX veneer "
8393 "`%s'"), abfd, tmp_name);
8394
8395 vma = myh->root.u.def.section->output_section->vma
8396 + myh->root.u.def.section->output_offset
8397 + myh->root.u.def.value;
8398
8399 errnode->u.b.veneer->vma = vma;
8400 break;
8401
8402 case STM32L4XX_ERRATUM_VENEER:
8403 /* Find return location. */
8404 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8405 errnode->u.v.id);
8406
8407 myh = elf_link_hash_lookup
8408 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8409
8410 if (myh == NULL)
8411 _bfd_error_handler (_("%pB: unable to find STM32L4XX veneer "
8412 "`%s'"), abfd, tmp_name);
8413
8414 vma = myh->root.u.def.section->output_section->vma
8415 + myh->root.u.def.section->output_offset
8416 + myh->root.u.def.value;
8417
8418 errnode->u.v.branch->vma = vma;
8419 break;
8420
8421 default:
8422 abort ();
8423 }
8424 }
8425 }
8426
8427 free (tmp_name);
8428 }
8429
8430 static inline bfd_boolean
8431 is_thumb2_ldmia (const insn32 insn)
8432 {
8433 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8434 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8435 return (insn & 0xffd02000) == 0xe8900000;
8436 }
8437
8438 static inline bfd_boolean
8439 is_thumb2_ldmdb (const insn32 insn)
8440 {
8441 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8442 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8443 return (insn & 0xffd02000) == 0xe9100000;
8444 }
8445
8446 static inline bfd_boolean
8447 is_thumb2_vldm (const insn32 insn)
8448 {
8449 /* A6.5 Extension register load or store instruction
8450 A7.7.229
8451 We look for SP 32-bit and DP 64-bit registers.
8452 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8453 <list> is consecutive 64-bit registers
8454 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8455 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8456 <list> is consecutive 32-bit registers
8457 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8458 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8459 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8460 return
8461 (((insn & 0xfe100f00) == 0xec100b00) ||
8462 ((insn & 0xfe100f00) == 0xec100a00))
8463 && /* (IA without !). */
8464 (((((insn << 7) >> 28) & 0xd) == 0x4)
8465 /* (IA with !), includes VPOP (when reg number is SP). */
8466 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8467 /* (DB with !). */
8468 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8469 }
8470
8471 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8472 VLDM opcode and:
8473 - computes the number and the mode of memory accesses
8474 - decides if the replacement should be done:
8475 . replaces only if > 8-word accesses
8476 . or (testing purposes only) replaces all accesses. */
8477
8478 static bfd_boolean
8479 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8480 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8481 {
8482 int nb_words = 0;
8483
8484 /* The field encoding the register list is the same for both LDMIA
8485 and LDMDB encodings. */
8486 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8487 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8488 else if (is_thumb2_vldm (insn))
8489 nb_words = (insn & 0xff);
8490
8491 /* DEFAULT mode accounts for the real bug condition situation,
8492 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8493 return
8494 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8495 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8496 }
8497
8498 /* Look for potentially-troublesome code sequences which might trigger
8499 the STM STM32L4XX erratum. */
8500
8501 bfd_boolean
8502 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8503 struct bfd_link_info *link_info)
8504 {
8505 asection *sec;
8506 bfd_byte *contents = NULL;
8507 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8508
8509 if (globals == NULL)
8510 return FALSE;
8511
8512 /* If we are only performing a partial link do not bother
8513 to construct any glue. */
8514 if (bfd_link_relocatable (link_info))
8515 return TRUE;
8516
8517 /* Skip if this bfd does not correspond to an ELF image. */
8518 if (! is_arm_elf (abfd))
8519 return TRUE;
8520
8521 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8522 return TRUE;
8523
8524 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8525 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8526 return TRUE;
8527
8528 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8529 {
8530 unsigned int i, span;
8531 struct _arm_elf_section_data *sec_data;
8532
8533 /* If we don't have executable progbits, we're not interested in this
8534 section. Also skip if section is to be excluded. */
8535 if (elf_section_type (sec) != SHT_PROGBITS
8536 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8537 || (sec->flags & SEC_EXCLUDE) != 0
8538 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8539 || sec->output_section == bfd_abs_section_ptr
8540 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8541 continue;
8542
8543 sec_data = elf32_arm_section_data (sec);
8544
8545 if (sec_data->mapcount == 0)
8546 continue;
8547
8548 if (elf_section_data (sec)->this_hdr.contents != NULL)
8549 contents = elf_section_data (sec)->this_hdr.contents;
8550 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8551 goto error_return;
8552
8553 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8554 elf32_arm_compare_mapping);
8555
8556 for (span = 0; span < sec_data->mapcount; span++)
8557 {
8558 unsigned int span_start = sec_data->map[span].vma;
8559 unsigned int span_end = (span == sec_data->mapcount - 1)
8560 ? sec->size : sec_data->map[span + 1].vma;
8561 char span_type = sec_data->map[span].type;
8562 int itblock_current_pos = 0;
8563
8564 /* Only Thumb2 mode need be supported with this CM4 specific
8565 code, we should not encounter any arm mode eg span_type
8566 != 'a'. */
8567 if (span_type != 't')
8568 continue;
8569
8570 for (i = span_start; i < span_end;)
8571 {
8572 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8573 bfd_boolean insn_32bit = FALSE;
8574 bfd_boolean is_ldm = FALSE;
8575 bfd_boolean is_vldm = FALSE;
8576 bfd_boolean is_not_last_in_it_block = FALSE;
8577
8578 /* The first 16-bits of all 32-bit thumb2 instructions start
8579 with opcode[15..13]=0b111 and the encoded op1 can be anything
8580 except opcode[12..11]!=0b00.
8581 See 32-bit Thumb instruction encoding. */
8582 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8583 insn_32bit = TRUE;
8584
8585 /* Compute the predicate that tells if the instruction
8586 is concerned by the IT block
8587 - Creates an error if there is a ldm that is not
8588 last in the IT block thus cannot be replaced
8589 - Otherwise we can create a branch at the end of the
8590 IT block, it will be controlled naturally by IT
8591 with the proper pseudo-predicate
8592 - So the only interesting predicate is the one that
8593 tells that we are not on the last item of an IT
8594 block. */
8595 if (itblock_current_pos != 0)
8596 is_not_last_in_it_block = !!--itblock_current_pos;
8597
8598 if (insn_32bit)
8599 {
8600 /* Load the rest of the insn (in manual-friendly order). */
8601 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8602 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8603 is_vldm = is_thumb2_vldm (insn);
8604
8605 /* Veneers are created for (v)ldm depending on
8606 option flags and memory accesses conditions; but
8607 if the instruction is not the last instruction of
8608 an IT block, we cannot create a jump there, so we
8609 bail out. */
8610 if ((is_ldm || is_vldm)
8611 && stm32l4xx_need_create_replacing_stub
8612 (insn, globals->stm32l4xx_fix))
8613 {
8614 if (is_not_last_in_it_block)
8615 {
8616 _bfd_error_handler
8617 /* xgettext:c-format */
8618 (_("%pB(%pA+%#x): error: multiple load detected"
8619 " in non-last IT block instruction :"
8620 " STM32L4XX veneer cannot be generated.\n"
8621 "Use gcc option -mrestrict-it to generate"
8622 " only one instruction per IT block.\n"),
8623 abfd, sec, i);
8624 }
8625 else
8626 {
8627 elf32_stm32l4xx_erratum_list *newerr =
8628 (elf32_stm32l4xx_erratum_list *)
8629 bfd_zmalloc
8630 (sizeof (elf32_stm32l4xx_erratum_list));
8631
8632 elf32_arm_section_data (sec)
8633 ->stm32l4xx_erratumcount += 1;
8634 newerr->u.b.insn = insn;
8635 /* We create only thumb branches. */
8636 newerr->type =
8637 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8638 record_stm32l4xx_erratum_veneer
8639 (link_info, newerr, abfd, sec,
8640 i,
8641 is_ldm ?
8642 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8643 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8644 newerr->vma = -1;
8645 newerr->next = sec_data->stm32l4xx_erratumlist;
8646 sec_data->stm32l4xx_erratumlist = newerr;
8647 }
8648 }
8649 }
8650 else
8651 {
8652 /* A7.7.37 IT p208
8653 IT blocks are only encoded in T1
8654 Encoding T1: IT{x{y{z}}} <firstcond>
8655 1 0 1 1 - 1 1 1 1 - firstcond - mask
8656 if mask = '0000' then see 'related encodings'
8657 We don't deal with UNPREDICTABLE, just ignore these.
8658 There can be no nested IT blocks so an IT block
8659 is naturally a new one for which it is worth
8660 computing its size. */
8661 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8662 && ((insn & 0x000f) != 0x0000);
8663 /* If we have a new IT block we compute its size. */
8664 if (is_newitblock)
8665 {
8666 /* Compute the number of instructions controlled
8667 by the IT block, it will be used to decide
8668 whether we are inside an IT block or not. */
8669 unsigned int mask = insn & 0x000f;
8670 itblock_current_pos = 4 - ctz (mask);
8671 }
8672 }
8673
8674 i += insn_32bit ? 4 : 2;
8675 }
8676 }
8677
8678 if (contents != NULL
8679 && elf_section_data (sec)->this_hdr.contents != contents)
8680 free (contents);
8681 contents = NULL;
8682 }
8683
8684 return TRUE;
8685
8686 error_return:
8687 if (contents != NULL
8688 && elf_section_data (sec)->this_hdr.contents != contents)
8689 free (contents);
8690
8691 return FALSE;
8692 }
8693
8694 /* Set target relocation values needed during linking. */
8695
8696 void
8697 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8698 struct bfd_link_info *link_info,
8699 struct elf32_arm_params *params)
8700 {
8701 struct elf32_arm_link_hash_table *globals;
8702
8703 globals = elf32_arm_hash_table (link_info);
8704 if (globals == NULL)
8705 return;
8706
8707 globals->target1_is_rel = params->target1_is_rel;
8708 if (strcmp (params->target2_type, "rel") == 0)
8709 globals->target2_reloc = R_ARM_REL32;
8710 else if (strcmp (params->target2_type, "abs") == 0)
8711 globals->target2_reloc = R_ARM_ABS32;
8712 else if (strcmp (params->target2_type, "got-rel") == 0)
8713 globals->target2_reloc = R_ARM_GOT_PREL;
8714 else
8715 {
8716 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8717 params->target2_type);
8718 }
8719 globals->fix_v4bx = params->fix_v4bx;
8720 globals->use_blx |= params->use_blx;
8721 globals->vfp11_fix = params->vfp11_denorm_fix;
8722 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8723 globals->pic_veneer = params->pic_veneer;
8724 globals->fix_cortex_a8 = params->fix_cortex_a8;
8725 globals->fix_arm1176 = params->fix_arm1176;
8726 globals->cmse_implib = params->cmse_implib;
8727 globals->in_implib_bfd = params->in_implib_bfd;
8728
8729 BFD_ASSERT (is_arm_elf (output_bfd));
8730 elf_arm_tdata (output_bfd)->no_enum_size_warning
8731 = params->no_enum_size_warning;
8732 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8733 = params->no_wchar_size_warning;
8734 }
8735
8736 /* Replace the target offset of a Thumb bl or b.w instruction. */
8737
8738 static void
8739 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8740 {
8741 bfd_vma upper;
8742 bfd_vma lower;
8743 int reloc_sign;
8744
8745 BFD_ASSERT ((offset & 1) == 0);
8746
8747 upper = bfd_get_16 (abfd, insn);
8748 lower = bfd_get_16 (abfd, insn + 2);
8749 reloc_sign = (offset < 0) ? 1 : 0;
8750 upper = (upper & ~(bfd_vma) 0x7ff)
8751 | ((offset >> 12) & 0x3ff)
8752 | (reloc_sign << 10);
8753 lower = (lower & ~(bfd_vma) 0x2fff)
8754 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8755 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8756 | ((offset >> 1) & 0x7ff);
8757 bfd_put_16 (abfd, upper, insn);
8758 bfd_put_16 (abfd, lower, insn + 2);
8759 }
8760
8761 /* Thumb code calling an ARM function. */
8762
8763 static int
8764 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8765 const char * name,
8766 bfd * input_bfd,
8767 bfd * output_bfd,
8768 asection * input_section,
8769 bfd_byte * hit_data,
8770 asection * sym_sec,
8771 bfd_vma offset,
8772 bfd_signed_vma addend,
8773 bfd_vma val,
8774 char **error_message)
8775 {
8776 asection * s = 0;
8777 bfd_vma my_offset;
8778 long int ret_offset;
8779 struct elf_link_hash_entry * myh;
8780 struct elf32_arm_link_hash_table * globals;
8781
8782 myh = find_thumb_glue (info, name, error_message);
8783 if (myh == NULL)
8784 return FALSE;
8785
8786 globals = elf32_arm_hash_table (info);
8787 BFD_ASSERT (globals != NULL);
8788 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8789
8790 my_offset = myh->root.u.def.value;
8791
8792 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8793 THUMB2ARM_GLUE_SECTION_NAME);
8794
8795 BFD_ASSERT (s != NULL);
8796 BFD_ASSERT (s->contents != NULL);
8797 BFD_ASSERT (s->output_section != NULL);
8798
8799 if ((my_offset & 0x01) == 0x01)
8800 {
8801 if (sym_sec != NULL
8802 && sym_sec->owner != NULL
8803 && !INTERWORK_FLAG (sym_sec->owner))
8804 {
8805 _bfd_error_handler
8806 (_("%pB(%s): warning: interworking not enabled.\n"
8807 " first occurrence: %pB: Thumb call to ARM"),
8808 sym_sec->owner, name, input_bfd);
8809
8810 return FALSE;
8811 }
8812
8813 --my_offset;
8814 myh->root.u.def.value = my_offset;
8815
8816 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8817 s->contents + my_offset);
8818
8819 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8820 s->contents + my_offset + 2);
8821
8822 ret_offset =
8823 /* Address of destination of the stub. */
8824 ((bfd_signed_vma) val)
8825 - ((bfd_signed_vma)
8826 /* Offset from the start of the current section
8827 to the start of the stubs. */
8828 (s->output_offset
8829 /* Offset of the start of this stub from the start of the stubs. */
8830 + my_offset
8831 /* Address of the start of the current section. */
8832 + s->output_section->vma)
8833 /* The branch instruction is 4 bytes into the stub. */
8834 + 4
8835 /* ARM branches work from the pc of the instruction + 8. */
8836 + 8);
8837
8838 put_arm_insn (globals, output_bfd,
8839 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8840 s->contents + my_offset + 4);
8841 }
8842
8843 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8844
8845 /* Now go back and fix up the original BL insn to point to here. */
8846 ret_offset =
8847 /* Address of where the stub is located. */
8848 (s->output_section->vma + s->output_offset + my_offset)
8849 /* Address of where the BL is located. */
8850 - (input_section->output_section->vma + input_section->output_offset
8851 + offset)
8852 /* Addend in the relocation. */
8853 - addend
8854 /* Biassing for PC-relative addressing. */
8855 - 8;
8856
8857 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8858
8859 return TRUE;
8860 }
8861
8862 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8863
8864 static struct elf_link_hash_entry *
8865 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8866 const char * name,
8867 bfd * input_bfd,
8868 bfd * output_bfd,
8869 asection * sym_sec,
8870 bfd_vma val,
8871 asection * s,
8872 char ** error_message)
8873 {
8874 bfd_vma my_offset;
8875 long int ret_offset;
8876 struct elf_link_hash_entry * myh;
8877 struct elf32_arm_link_hash_table * globals;
8878
8879 myh = find_arm_glue (info, name, error_message);
8880 if (myh == NULL)
8881 return NULL;
8882
8883 globals = elf32_arm_hash_table (info);
8884 BFD_ASSERT (globals != NULL);
8885 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8886
8887 my_offset = myh->root.u.def.value;
8888
8889 if ((my_offset & 0x01) == 0x01)
8890 {
8891 if (sym_sec != NULL
8892 && sym_sec->owner != NULL
8893 && !INTERWORK_FLAG (sym_sec->owner))
8894 {
8895 _bfd_error_handler
8896 (_("%pB(%s): warning: interworking not enabled.\n"
8897 " first occurrence: %pB: arm call to thumb"),
8898 sym_sec->owner, name, input_bfd);
8899 }
8900
8901 --my_offset;
8902 myh->root.u.def.value = my_offset;
8903
8904 if (bfd_link_pic (info)
8905 || globals->root.is_relocatable_executable
8906 || globals->pic_veneer)
8907 {
8908 /* For relocatable objects we can't use absolute addresses,
8909 so construct the address from a relative offset. */
8910 /* TODO: If the offset is small it's probably worth
8911 constructing the address with adds. */
8912 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8913 s->contents + my_offset);
8914 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8915 s->contents + my_offset + 4);
8916 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8917 s->contents + my_offset + 8);
8918 /* Adjust the offset by 4 for the position of the add,
8919 and 8 for the pipeline offset. */
8920 ret_offset = (val - (s->output_offset
8921 + s->output_section->vma
8922 + my_offset + 12))
8923 | 1;
8924 bfd_put_32 (output_bfd, ret_offset,
8925 s->contents + my_offset + 12);
8926 }
8927 else if (globals->use_blx)
8928 {
8929 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8930 s->contents + my_offset);
8931
8932 /* It's a thumb address. Add the low order bit. */
8933 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8934 s->contents + my_offset + 4);
8935 }
8936 else
8937 {
8938 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8939 s->contents + my_offset);
8940
8941 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8942 s->contents + my_offset + 4);
8943
8944 /* It's a thumb address. Add the low order bit. */
8945 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8946 s->contents + my_offset + 8);
8947
8948 my_offset += 12;
8949 }
8950 }
8951
8952 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8953
8954 return myh;
8955 }
8956
8957 /* Arm code calling a Thumb function. */
8958
8959 static int
8960 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8961 const char * name,
8962 bfd * input_bfd,
8963 bfd * output_bfd,
8964 asection * input_section,
8965 bfd_byte * hit_data,
8966 asection * sym_sec,
8967 bfd_vma offset,
8968 bfd_signed_vma addend,
8969 bfd_vma val,
8970 char **error_message)
8971 {
8972 unsigned long int tmp;
8973 bfd_vma my_offset;
8974 asection * s;
8975 long int ret_offset;
8976 struct elf_link_hash_entry * myh;
8977 struct elf32_arm_link_hash_table * globals;
8978
8979 globals = elf32_arm_hash_table (info);
8980 BFD_ASSERT (globals != NULL);
8981 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8982
8983 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8984 ARM2THUMB_GLUE_SECTION_NAME);
8985 BFD_ASSERT (s != NULL);
8986 BFD_ASSERT (s->contents != NULL);
8987 BFD_ASSERT (s->output_section != NULL);
8988
8989 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8990 sym_sec, val, s, error_message);
8991 if (!myh)
8992 return FALSE;
8993
8994 my_offset = myh->root.u.def.value;
8995 tmp = bfd_get_32 (input_bfd, hit_data);
8996 tmp = tmp & 0xFF000000;
8997
8998 /* Somehow these are both 4 too far, so subtract 8. */
8999 ret_offset = (s->output_offset
9000 + my_offset
9001 + s->output_section->vma
9002 - (input_section->output_offset
9003 + input_section->output_section->vma
9004 + offset + addend)
9005 - 8);
9006
9007 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9008
9009 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9010
9011 return TRUE;
9012 }
9013
9014 /* Populate Arm stub for an exported Thumb function. */
9015
9016 static bfd_boolean
9017 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9018 {
9019 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9020 asection * s;
9021 struct elf_link_hash_entry * myh;
9022 struct elf32_arm_link_hash_entry *eh;
9023 struct elf32_arm_link_hash_table * globals;
9024 asection *sec;
9025 bfd_vma val;
9026 char *error_message;
9027
9028 eh = elf32_arm_hash_entry (h);
9029 /* Allocate stubs for exported Thumb functions on v4t. */
9030 if (eh->export_glue == NULL)
9031 return TRUE;
9032
9033 globals = elf32_arm_hash_table (info);
9034 BFD_ASSERT (globals != NULL);
9035 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9036
9037 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9038 ARM2THUMB_GLUE_SECTION_NAME);
9039 BFD_ASSERT (s != NULL);
9040 BFD_ASSERT (s->contents != NULL);
9041 BFD_ASSERT (s->output_section != NULL);
9042
9043 sec = eh->export_glue->root.u.def.section;
9044
9045 BFD_ASSERT (sec->output_section != NULL);
9046
9047 val = eh->export_glue->root.u.def.value + sec->output_offset
9048 + sec->output_section->vma;
9049
9050 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9051 h->root.u.def.section->owner,
9052 globals->obfd, sec, val, s,
9053 &error_message);
9054 BFD_ASSERT (myh);
9055 return TRUE;
9056 }
9057
9058 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9059
9060 static bfd_vma
9061 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9062 {
9063 bfd_byte *p;
9064 bfd_vma glue_addr;
9065 asection *s;
9066 struct elf32_arm_link_hash_table *globals;
9067
9068 globals = elf32_arm_hash_table (info);
9069 BFD_ASSERT (globals != NULL);
9070 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9071
9072 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9073 ARM_BX_GLUE_SECTION_NAME);
9074 BFD_ASSERT (s != NULL);
9075 BFD_ASSERT (s->contents != NULL);
9076 BFD_ASSERT (s->output_section != NULL);
9077
9078 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9079
9080 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9081
9082 if ((globals->bx_glue_offset[reg] & 1) == 0)
9083 {
9084 p = s->contents + glue_addr;
9085 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9086 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9087 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9088 globals->bx_glue_offset[reg] |= 1;
9089 }
9090
9091 return glue_addr + s->output_section->vma + s->output_offset;
9092 }
9093
9094 /* Generate Arm stubs for exported Thumb symbols. */
9095 static void
9096 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9097 struct bfd_link_info *link_info)
9098 {
9099 struct elf32_arm_link_hash_table * globals;
9100
9101 if (link_info == NULL)
9102 /* Ignore this if we are not called by the ELF backend linker. */
9103 return;
9104
9105 globals = elf32_arm_hash_table (link_info);
9106 if (globals == NULL)
9107 return;
9108
9109 /* If blx is available then exported Thumb symbols are OK and there is
9110 nothing to do. */
9111 if (globals->use_blx)
9112 return;
9113
9114 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9115 link_info);
9116 }
9117
9118 /* Reserve space for COUNT dynamic relocations in relocation selection
9119 SRELOC. */
9120
9121 static void
9122 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9123 bfd_size_type count)
9124 {
9125 struct elf32_arm_link_hash_table *htab;
9126
9127 htab = elf32_arm_hash_table (info);
9128 BFD_ASSERT (htab->root.dynamic_sections_created);
9129 if (sreloc == NULL)
9130 abort ();
9131 sreloc->size += RELOC_SIZE (htab) * count;
9132 }
9133
9134 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9135 dynamic, the relocations should go in SRELOC, otherwise they should
9136 go in the special .rel.iplt section. */
9137
9138 static void
9139 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9140 bfd_size_type count)
9141 {
9142 struct elf32_arm_link_hash_table *htab;
9143
9144 htab = elf32_arm_hash_table (info);
9145 if (!htab->root.dynamic_sections_created)
9146 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9147 else
9148 {
9149 BFD_ASSERT (sreloc != NULL);
9150 sreloc->size += RELOC_SIZE (htab) * count;
9151 }
9152 }
9153
9154 /* Add relocation REL to the end of relocation section SRELOC. */
9155
9156 static void
9157 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9158 asection *sreloc, Elf_Internal_Rela *rel)
9159 {
9160 bfd_byte *loc;
9161 struct elf32_arm_link_hash_table *htab;
9162
9163 htab = elf32_arm_hash_table (info);
9164 if (!htab->root.dynamic_sections_created
9165 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9166 sreloc = htab->root.irelplt;
9167 if (sreloc == NULL)
9168 abort ();
9169 loc = sreloc->contents;
9170 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9171 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9172 abort ();
9173 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9174 }
9175
9176 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9177 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9178 to .plt. */
9179
9180 static void
9181 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9182 bfd_boolean is_iplt_entry,
9183 union gotplt_union *root_plt,
9184 struct arm_plt_info *arm_plt)
9185 {
9186 struct elf32_arm_link_hash_table *htab;
9187 asection *splt;
9188 asection *sgotplt;
9189
9190 htab = elf32_arm_hash_table (info);
9191
9192 if (is_iplt_entry)
9193 {
9194 splt = htab->root.iplt;
9195 sgotplt = htab->root.igotplt;
9196
9197 /* NaCl uses a special first entry in .iplt too. */
9198 if (htab->nacl_p && splt->size == 0)
9199 splt->size += htab->plt_header_size;
9200
9201 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9202 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9203 }
9204 else
9205 {
9206 splt = htab->root.splt;
9207 sgotplt = htab->root.sgotplt;
9208
9209 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9210 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9211
9212 /* If this is the first .plt entry, make room for the special
9213 first entry. */
9214 if (splt->size == 0)
9215 splt->size += htab->plt_header_size;
9216
9217 htab->next_tls_desc_index++;
9218 }
9219
9220 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9221 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9222 splt->size += PLT_THUMB_STUB_SIZE;
9223 root_plt->offset = splt->size;
9224 splt->size += htab->plt_entry_size;
9225
9226 if (!htab->symbian_p)
9227 {
9228 /* We also need to make an entry in the .got.plt section, which
9229 will be placed in the .got section by the linker script. */
9230 if (is_iplt_entry)
9231 arm_plt->got_offset = sgotplt->size;
9232 else
9233 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9234 sgotplt->size += 4;
9235 }
9236 }
9237
9238 static bfd_vma
9239 arm_movw_immediate (bfd_vma value)
9240 {
9241 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9242 }
9243
9244 static bfd_vma
9245 arm_movt_immediate (bfd_vma value)
9246 {
9247 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9248 }
9249
9250 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9251 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9252 Otherwise, DYNINDX is the index of the symbol in the dynamic
9253 symbol table and SYM_VALUE is undefined.
9254
9255 ROOT_PLT points to the offset of the PLT entry from the start of its
9256 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9257 bookkeeping information.
9258
9259 Returns FALSE if there was a problem. */
9260
9261 static bfd_boolean
9262 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9263 union gotplt_union *root_plt,
9264 struct arm_plt_info *arm_plt,
9265 int dynindx, bfd_vma sym_value)
9266 {
9267 struct elf32_arm_link_hash_table *htab;
9268 asection *sgot;
9269 asection *splt;
9270 asection *srel;
9271 bfd_byte *loc;
9272 bfd_vma plt_index;
9273 Elf_Internal_Rela rel;
9274 bfd_vma plt_header_size;
9275 bfd_vma got_header_size;
9276
9277 htab = elf32_arm_hash_table (info);
9278
9279 /* Pick the appropriate sections and sizes. */
9280 if (dynindx == -1)
9281 {
9282 splt = htab->root.iplt;
9283 sgot = htab->root.igotplt;
9284 srel = htab->root.irelplt;
9285
9286 /* There are no reserved entries in .igot.plt, and no special
9287 first entry in .iplt. */
9288 got_header_size = 0;
9289 plt_header_size = 0;
9290 }
9291 else
9292 {
9293 splt = htab->root.splt;
9294 sgot = htab->root.sgotplt;
9295 srel = htab->root.srelplt;
9296
9297 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9298 plt_header_size = htab->plt_header_size;
9299 }
9300 BFD_ASSERT (splt != NULL && srel != NULL);
9301
9302 /* Fill in the entry in the procedure linkage table. */
9303 if (htab->symbian_p)
9304 {
9305 BFD_ASSERT (dynindx >= 0);
9306 put_arm_insn (htab, output_bfd,
9307 elf32_arm_symbian_plt_entry[0],
9308 splt->contents + root_plt->offset);
9309 bfd_put_32 (output_bfd,
9310 elf32_arm_symbian_plt_entry[1],
9311 splt->contents + root_plt->offset + 4);
9312
9313 /* Fill in the entry in the .rel.plt section. */
9314 rel.r_offset = (splt->output_section->vma
9315 + splt->output_offset
9316 + root_plt->offset + 4);
9317 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9318
9319 /* Get the index in the procedure linkage table which
9320 corresponds to this symbol. This is the index of this symbol
9321 in all the symbols for which we are making plt entries. The
9322 first entry in the procedure linkage table is reserved. */
9323 plt_index = ((root_plt->offset - plt_header_size)
9324 / htab->plt_entry_size);
9325 }
9326 else
9327 {
9328 bfd_vma got_offset, got_address, plt_address;
9329 bfd_vma got_displacement, initial_got_entry;
9330 bfd_byte * ptr;
9331
9332 BFD_ASSERT (sgot != NULL);
9333
9334 /* Get the offset into the .(i)got.plt table of the entry that
9335 corresponds to this function. */
9336 got_offset = (arm_plt->got_offset & -2);
9337
9338 /* Get the index in the procedure linkage table which
9339 corresponds to this symbol. This is the index of this symbol
9340 in all the symbols for which we are making plt entries.
9341 After the reserved .got.plt entries, all symbols appear in
9342 the same order as in .plt. */
9343 plt_index = (got_offset - got_header_size) / 4;
9344
9345 /* Calculate the address of the GOT entry. */
9346 got_address = (sgot->output_section->vma
9347 + sgot->output_offset
9348 + got_offset);
9349
9350 /* ...and the address of the PLT entry. */
9351 plt_address = (splt->output_section->vma
9352 + splt->output_offset
9353 + root_plt->offset);
9354
9355 ptr = splt->contents + root_plt->offset;
9356 if (htab->vxworks_p && bfd_link_pic (info))
9357 {
9358 unsigned int i;
9359 bfd_vma val;
9360
9361 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9362 {
9363 val = elf32_arm_vxworks_shared_plt_entry[i];
9364 if (i == 2)
9365 val |= got_address - sgot->output_section->vma;
9366 if (i == 5)
9367 val |= plt_index * RELOC_SIZE (htab);
9368 if (i == 2 || i == 5)
9369 bfd_put_32 (output_bfd, val, ptr);
9370 else
9371 put_arm_insn (htab, output_bfd, val, ptr);
9372 }
9373 }
9374 else if (htab->vxworks_p)
9375 {
9376 unsigned int i;
9377 bfd_vma val;
9378
9379 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9380 {
9381 val = elf32_arm_vxworks_exec_plt_entry[i];
9382 if (i == 2)
9383 val |= got_address;
9384 if (i == 4)
9385 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9386 if (i == 5)
9387 val |= plt_index * RELOC_SIZE (htab);
9388 if (i == 2 || i == 5)
9389 bfd_put_32 (output_bfd, val, ptr);
9390 else
9391 put_arm_insn (htab, output_bfd, val, ptr);
9392 }
9393
9394 loc = (htab->srelplt2->contents
9395 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9396
9397 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9398 referencing the GOT for this PLT entry. */
9399 rel.r_offset = plt_address + 8;
9400 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9401 rel.r_addend = got_offset;
9402 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9403 loc += RELOC_SIZE (htab);
9404
9405 /* Create the R_ARM_ABS32 relocation referencing the
9406 beginning of the PLT for this GOT entry. */
9407 rel.r_offset = got_address;
9408 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9409 rel.r_addend = 0;
9410 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9411 }
9412 else if (htab->nacl_p)
9413 {
9414 /* Calculate the displacement between the PLT slot and the
9415 common tail that's part of the special initial PLT slot. */
9416 int32_t tail_displacement
9417 = ((splt->output_section->vma + splt->output_offset
9418 + ARM_NACL_PLT_TAIL_OFFSET)
9419 - (plt_address + htab->plt_entry_size + 4));
9420 BFD_ASSERT ((tail_displacement & 3) == 0);
9421 tail_displacement >>= 2;
9422
9423 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9424 || (-tail_displacement & 0xff000000) == 0);
9425
9426 /* Calculate the displacement between the PLT slot and the entry
9427 in the GOT. The offset accounts for the value produced by
9428 adding to pc in the penultimate instruction of the PLT stub. */
9429 got_displacement = (got_address
9430 - (plt_address + htab->plt_entry_size));
9431
9432 /* NaCl does not support interworking at all. */
9433 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9434
9435 put_arm_insn (htab, output_bfd,
9436 elf32_arm_nacl_plt_entry[0]
9437 | arm_movw_immediate (got_displacement),
9438 ptr + 0);
9439 put_arm_insn (htab, output_bfd,
9440 elf32_arm_nacl_plt_entry[1]
9441 | arm_movt_immediate (got_displacement),
9442 ptr + 4);
9443 put_arm_insn (htab, output_bfd,
9444 elf32_arm_nacl_plt_entry[2],
9445 ptr + 8);
9446 put_arm_insn (htab, output_bfd,
9447 elf32_arm_nacl_plt_entry[3]
9448 | (tail_displacement & 0x00ffffff),
9449 ptr + 12);
9450 }
9451 else if (using_thumb_only (htab))
9452 {
9453 /* PR ld/16017: Generate thumb only PLT entries. */
9454 if (!using_thumb2 (htab))
9455 {
9456 /* FIXME: We ought to be able to generate thumb-1 PLT
9457 instructions... */
9458 _bfd_error_handler (_("%pB: Warning: thumb-1 mode PLT generation not currently supported"),
9459 output_bfd);
9460 return FALSE;
9461 }
9462
9463 /* Calculate the displacement between the PLT slot and the entry in
9464 the GOT. The 12-byte offset accounts for the value produced by
9465 adding to pc in the 3rd instruction of the PLT stub. */
9466 got_displacement = got_address - (plt_address + 12);
9467
9468 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9469 instead of 'put_thumb_insn'. */
9470 put_arm_insn (htab, output_bfd,
9471 elf32_thumb2_plt_entry[0]
9472 | ((got_displacement & 0x000000ff) << 16)
9473 | ((got_displacement & 0x00000700) << 20)
9474 | ((got_displacement & 0x00000800) >> 1)
9475 | ((got_displacement & 0x0000f000) >> 12),
9476 ptr + 0);
9477 put_arm_insn (htab, output_bfd,
9478 elf32_thumb2_plt_entry[1]
9479 | ((got_displacement & 0x00ff0000) )
9480 | ((got_displacement & 0x07000000) << 4)
9481 | ((got_displacement & 0x08000000) >> 17)
9482 | ((got_displacement & 0xf0000000) >> 28),
9483 ptr + 4);
9484 put_arm_insn (htab, output_bfd,
9485 elf32_thumb2_plt_entry[2],
9486 ptr + 8);
9487 put_arm_insn (htab, output_bfd,
9488 elf32_thumb2_plt_entry[3],
9489 ptr + 12);
9490 }
9491 else
9492 {
9493 /* Calculate the displacement between the PLT slot and the
9494 entry in the GOT. The eight-byte offset accounts for the
9495 value produced by adding to pc in the first instruction
9496 of the PLT stub. */
9497 got_displacement = got_address - (plt_address + 8);
9498
9499 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9500 {
9501 put_thumb_insn (htab, output_bfd,
9502 elf32_arm_plt_thumb_stub[0], ptr - 4);
9503 put_thumb_insn (htab, output_bfd,
9504 elf32_arm_plt_thumb_stub[1], ptr - 2);
9505 }
9506
9507 if (!elf32_arm_use_long_plt_entry)
9508 {
9509 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9510
9511 put_arm_insn (htab, output_bfd,
9512 elf32_arm_plt_entry_short[0]
9513 | ((got_displacement & 0x0ff00000) >> 20),
9514 ptr + 0);
9515 put_arm_insn (htab, output_bfd,
9516 elf32_arm_plt_entry_short[1]
9517 | ((got_displacement & 0x000ff000) >> 12),
9518 ptr+ 4);
9519 put_arm_insn (htab, output_bfd,
9520 elf32_arm_plt_entry_short[2]
9521 | (got_displacement & 0x00000fff),
9522 ptr + 8);
9523 #ifdef FOUR_WORD_PLT
9524 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9525 #endif
9526 }
9527 else
9528 {
9529 put_arm_insn (htab, output_bfd,
9530 elf32_arm_plt_entry_long[0]
9531 | ((got_displacement & 0xf0000000) >> 28),
9532 ptr + 0);
9533 put_arm_insn (htab, output_bfd,
9534 elf32_arm_plt_entry_long[1]
9535 | ((got_displacement & 0x0ff00000) >> 20),
9536 ptr + 4);
9537 put_arm_insn (htab, output_bfd,
9538 elf32_arm_plt_entry_long[2]
9539 | ((got_displacement & 0x000ff000) >> 12),
9540 ptr+ 8);
9541 put_arm_insn (htab, output_bfd,
9542 elf32_arm_plt_entry_long[3]
9543 | (got_displacement & 0x00000fff),
9544 ptr + 12);
9545 }
9546 }
9547
9548 /* Fill in the entry in the .rel(a).(i)plt section. */
9549 rel.r_offset = got_address;
9550 rel.r_addend = 0;
9551 if (dynindx == -1)
9552 {
9553 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9554 The dynamic linker or static executable then calls SYM_VALUE
9555 to determine the correct run-time value of the .igot.plt entry. */
9556 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9557 initial_got_entry = sym_value;
9558 }
9559 else
9560 {
9561 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9562 initial_got_entry = (splt->output_section->vma
9563 + splt->output_offset);
9564 }
9565
9566 /* Fill in the entry in the global offset table. */
9567 bfd_put_32 (output_bfd, initial_got_entry,
9568 sgot->contents + got_offset);
9569 }
9570
9571 if (dynindx == -1)
9572 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9573 else
9574 {
9575 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9576 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9577 }
9578
9579 return TRUE;
9580 }
9581
9582 /* Some relocations map to different relocations depending on the
9583 target. Return the real relocation. */
9584
9585 static int
9586 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9587 int r_type)
9588 {
9589 switch (r_type)
9590 {
9591 case R_ARM_TARGET1:
9592 if (globals->target1_is_rel)
9593 return R_ARM_REL32;
9594 else
9595 return R_ARM_ABS32;
9596
9597 case R_ARM_TARGET2:
9598 return globals->target2_reloc;
9599
9600 default:
9601 return r_type;
9602 }
9603 }
9604
9605 /* Return the base VMA address which should be subtracted from real addresses
9606 when resolving @dtpoff relocation.
9607 This is PT_TLS segment p_vaddr. */
9608
9609 static bfd_vma
9610 dtpoff_base (struct bfd_link_info *info)
9611 {
9612 /* If tls_sec is NULL, we should have signalled an error already. */
9613 if (elf_hash_table (info)->tls_sec == NULL)
9614 return 0;
9615 return elf_hash_table (info)->tls_sec->vma;
9616 }
9617
9618 /* Return the relocation value for @tpoff relocation
9619 if STT_TLS virtual address is ADDRESS. */
9620
9621 static bfd_vma
9622 tpoff (struct bfd_link_info *info, bfd_vma address)
9623 {
9624 struct elf_link_hash_table *htab = elf_hash_table (info);
9625 bfd_vma base;
9626
9627 /* If tls_sec is NULL, we should have signalled an error already. */
9628 if (htab->tls_sec == NULL)
9629 return 0;
9630 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9631 return address - htab->tls_sec->vma + base;
9632 }
9633
9634 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9635 VALUE is the relocation value. */
9636
9637 static bfd_reloc_status_type
9638 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9639 {
9640 if (value > 0xfff)
9641 return bfd_reloc_overflow;
9642
9643 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9644 bfd_put_32 (abfd, value, data);
9645 return bfd_reloc_ok;
9646 }
9647
9648 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9649 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9650 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9651
9652 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9653 is to then call final_link_relocate. Return other values in the
9654 case of error.
9655
9656 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9657 the pre-relaxed code. It would be nice if the relocs were updated
9658 to match the optimization. */
9659
9660 static bfd_reloc_status_type
9661 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9662 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9663 Elf_Internal_Rela *rel, unsigned long is_local)
9664 {
9665 unsigned long insn;
9666
9667 switch (ELF32_R_TYPE (rel->r_info))
9668 {
9669 default:
9670 return bfd_reloc_notsupported;
9671
9672 case R_ARM_TLS_GOTDESC:
9673 if (is_local)
9674 insn = 0;
9675 else
9676 {
9677 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9678 if (insn & 1)
9679 insn -= 5; /* THUMB */
9680 else
9681 insn -= 8; /* ARM */
9682 }
9683 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9684 return bfd_reloc_continue;
9685
9686 case R_ARM_THM_TLS_DESCSEQ:
9687 /* Thumb insn. */
9688 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9689 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9690 {
9691 if (is_local)
9692 /* nop */
9693 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9694 }
9695 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9696 {
9697 if (is_local)
9698 /* nop */
9699 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9700 else
9701 /* ldr rx,[ry] */
9702 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9703 }
9704 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9705 {
9706 if (is_local)
9707 /* nop */
9708 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9709 else
9710 /* mov r0, rx */
9711 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9712 contents + rel->r_offset);
9713 }
9714 else
9715 {
9716 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9717 /* It's a 32 bit instruction, fetch the rest of it for
9718 error generation. */
9719 insn = (insn << 16)
9720 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9721 _bfd_error_handler
9722 /* xgettext:c-format */
9723 (_("%pB(%pA+%#" PRIx64 "): "
9724 "unexpected Thumb instruction '%#lx' in TLS trampoline"),
9725 input_bfd, input_sec, (uint64_t) rel->r_offset, insn);
9726 return bfd_reloc_notsupported;
9727 }
9728 break;
9729
9730 case R_ARM_TLS_DESCSEQ:
9731 /* arm insn. */
9732 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9733 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9734 {
9735 if (is_local)
9736 /* mov rx, ry */
9737 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9738 contents + rel->r_offset);
9739 }
9740 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9741 {
9742 if (is_local)
9743 /* nop */
9744 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9745 else
9746 /* ldr rx,[ry] */
9747 bfd_put_32 (input_bfd, insn & 0xfffff000,
9748 contents + rel->r_offset);
9749 }
9750 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9751 {
9752 if (is_local)
9753 /* nop */
9754 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9755 else
9756 /* mov r0, rx */
9757 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9758 contents + rel->r_offset);
9759 }
9760 else
9761 {
9762 _bfd_error_handler
9763 /* xgettext:c-format */
9764 (_("%pB(%pA+%#" PRIx64 "): "
9765 "unexpected ARM instruction '%#lx' in TLS trampoline"),
9766 input_bfd, input_sec, (uint64_t) rel->r_offset, insn);
9767 return bfd_reloc_notsupported;
9768 }
9769 break;
9770
9771 case R_ARM_TLS_CALL:
9772 /* GD->IE relaxation, turn the instruction into 'nop' or
9773 'ldr r0, [pc,r0]' */
9774 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9775 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9776 break;
9777
9778 case R_ARM_THM_TLS_CALL:
9779 /* GD->IE relaxation. */
9780 if (!is_local)
9781 /* add r0,pc; ldr r0, [r0] */
9782 insn = 0x44786800;
9783 else if (using_thumb2 (globals))
9784 /* nop.w */
9785 insn = 0xf3af8000;
9786 else
9787 /* nop; nop */
9788 insn = 0xbf00bf00;
9789
9790 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9791 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9792 break;
9793 }
9794 return bfd_reloc_ok;
9795 }
9796
9797 /* For a given value of n, calculate the value of G_n as required to
9798 deal with group relocations. We return it in the form of an
9799 encoded constant-and-rotation, together with the final residual. If n is
9800 specified as less than zero, then final_residual is filled with the
9801 input value and no further action is performed. */
9802
9803 static bfd_vma
9804 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9805 {
9806 int current_n;
9807 bfd_vma g_n;
9808 bfd_vma encoded_g_n = 0;
9809 bfd_vma residual = value; /* Also known as Y_n. */
9810
9811 for (current_n = 0; current_n <= n; current_n++)
9812 {
9813 int shift;
9814
9815 /* Calculate which part of the value to mask. */
9816 if (residual == 0)
9817 shift = 0;
9818 else
9819 {
9820 int msb;
9821
9822 /* Determine the most significant bit in the residual and
9823 align the resulting value to a 2-bit boundary. */
9824 for (msb = 30; msb >= 0; msb -= 2)
9825 if (residual & (3 << msb))
9826 break;
9827
9828 /* The desired shift is now (msb - 6), or zero, whichever
9829 is the greater. */
9830 shift = msb - 6;
9831 if (shift < 0)
9832 shift = 0;
9833 }
9834
9835 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9836 g_n = residual & (0xff << shift);
9837 encoded_g_n = (g_n >> shift)
9838 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9839
9840 /* Calculate the residual for the next time around. */
9841 residual &= ~g_n;
9842 }
9843
9844 *final_residual = residual;
9845
9846 return encoded_g_n;
9847 }
9848
9849 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9850 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9851
9852 static int
9853 identify_add_or_sub (bfd_vma insn)
9854 {
9855 int opcode = insn & 0x1e00000;
9856
9857 if (opcode == 1 << 23) /* ADD */
9858 return 1;
9859
9860 if (opcode == 1 << 22) /* SUB */
9861 return -1;
9862
9863 return 0;
9864 }
9865
9866 /* Perform a relocation as part of a final link. */
9867
9868 static bfd_reloc_status_type
9869 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9870 bfd * input_bfd,
9871 bfd * output_bfd,
9872 asection * input_section,
9873 bfd_byte * contents,
9874 Elf_Internal_Rela * rel,
9875 bfd_vma value,
9876 struct bfd_link_info * info,
9877 asection * sym_sec,
9878 const char * sym_name,
9879 unsigned char st_type,
9880 enum arm_st_branch_type branch_type,
9881 struct elf_link_hash_entry * h,
9882 bfd_boolean * unresolved_reloc_p,
9883 char ** error_message)
9884 {
9885 unsigned long r_type = howto->type;
9886 unsigned long r_symndx;
9887 bfd_byte * hit_data = contents + rel->r_offset;
9888 bfd_vma * local_got_offsets;
9889 bfd_vma * local_tlsdesc_gotents;
9890 asection * sgot;
9891 asection * splt;
9892 asection * sreloc = NULL;
9893 asection * srelgot;
9894 bfd_vma addend;
9895 bfd_signed_vma signed_addend;
9896 unsigned char dynreloc_st_type;
9897 bfd_vma dynreloc_value;
9898 struct elf32_arm_link_hash_table * globals;
9899 struct elf32_arm_link_hash_entry *eh;
9900 union gotplt_union *root_plt;
9901 struct arm_plt_info *arm_plt;
9902 bfd_vma plt_offset;
9903 bfd_vma gotplt_offset;
9904 bfd_boolean has_iplt_entry;
9905 bfd_boolean resolved_to_zero;
9906
9907 globals = elf32_arm_hash_table (info);
9908 if (globals == NULL)
9909 return bfd_reloc_notsupported;
9910
9911 BFD_ASSERT (is_arm_elf (input_bfd));
9912 BFD_ASSERT (howto != NULL);
9913
9914 /* Some relocation types map to different relocations depending on the
9915 target. We pick the right one here. */
9916 r_type = arm_real_reloc_type (globals, r_type);
9917
9918 /* It is possible to have linker relaxations on some TLS access
9919 models. Update our information here. */
9920 r_type = elf32_arm_tls_transition (info, r_type, h);
9921
9922 if (r_type != howto->type)
9923 howto = elf32_arm_howto_from_type (r_type);
9924
9925 eh = (struct elf32_arm_link_hash_entry *) h;
9926 sgot = globals->root.sgot;
9927 local_got_offsets = elf_local_got_offsets (input_bfd);
9928 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9929
9930 if (globals->root.dynamic_sections_created)
9931 srelgot = globals->root.srelgot;
9932 else
9933 srelgot = NULL;
9934
9935 r_symndx = ELF32_R_SYM (rel->r_info);
9936
9937 if (globals->use_rel)
9938 {
9939 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9940
9941 if (addend & ((howto->src_mask + 1) >> 1))
9942 {
9943 signed_addend = -1;
9944 signed_addend &= ~ howto->src_mask;
9945 signed_addend |= addend;
9946 }
9947 else
9948 signed_addend = addend;
9949 }
9950 else
9951 addend = signed_addend = rel->r_addend;
9952
9953 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9954 are resolving a function call relocation. */
9955 if (using_thumb_only (globals)
9956 && (r_type == R_ARM_THM_CALL
9957 || r_type == R_ARM_THM_JUMP24)
9958 && branch_type == ST_BRANCH_TO_ARM)
9959 branch_type = ST_BRANCH_TO_THUMB;
9960
9961 /* Record the symbol information that should be used in dynamic
9962 relocations. */
9963 dynreloc_st_type = st_type;
9964 dynreloc_value = value;
9965 if (branch_type == ST_BRANCH_TO_THUMB)
9966 dynreloc_value |= 1;
9967
9968 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9969 VALUE appropriately for relocations that we resolve at link time. */
9970 has_iplt_entry = FALSE;
9971 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9972 &arm_plt)
9973 && root_plt->offset != (bfd_vma) -1)
9974 {
9975 plt_offset = root_plt->offset;
9976 gotplt_offset = arm_plt->got_offset;
9977
9978 if (h == NULL || eh->is_iplt)
9979 {
9980 has_iplt_entry = TRUE;
9981 splt = globals->root.iplt;
9982
9983 /* Populate .iplt entries here, because not all of them will
9984 be seen by finish_dynamic_symbol. The lower bit is set if
9985 we have already populated the entry. */
9986 if (plt_offset & 1)
9987 plt_offset--;
9988 else
9989 {
9990 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9991 -1, dynreloc_value))
9992 root_plt->offset |= 1;
9993 else
9994 return bfd_reloc_notsupported;
9995 }
9996
9997 /* Static relocations always resolve to the .iplt entry. */
9998 st_type = STT_FUNC;
9999 value = (splt->output_section->vma
10000 + splt->output_offset
10001 + plt_offset);
10002 branch_type = ST_BRANCH_TO_ARM;
10003
10004 /* If there are non-call relocations that resolve to the .iplt
10005 entry, then all dynamic ones must too. */
10006 if (arm_plt->noncall_refcount != 0)
10007 {
10008 dynreloc_st_type = st_type;
10009 dynreloc_value = value;
10010 }
10011 }
10012 else
10013 /* We populate the .plt entry in finish_dynamic_symbol. */
10014 splt = globals->root.splt;
10015 }
10016 else
10017 {
10018 splt = NULL;
10019 plt_offset = (bfd_vma) -1;
10020 gotplt_offset = (bfd_vma) -1;
10021 }
10022
10023 resolved_to_zero = (h != NULL
10024 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10025
10026 switch (r_type)
10027 {
10028 case R_ARM_NONE:
10029 /* We don't need to find a value for this symbol. It's just a
10030 marker. */
10031 *unresolved_reloc_p = FALSE;
10032 return bfd_reloc_ok;
10033
10034 case R_ARM_ABS12:
10035 if (!globals->vxworks_p)
10036 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10037 /* Fall through. */
10038
10039 case R_ARM_PC24:
10040 case R_ARM_ABS32:
10041 case R_ARM_ABS32_NOI:
10042 case R_ARM_REL32:
10043 case R_ARM_REL32_NOI:
10044 case R_ARM_CALL:
10045 case R_ARM_JUMP24:
10046 case R_ARM_XPC25:
10047 case R_ARM_PREL31:
10048 case R_ARM_PLT32:
10049 /* Handle relocations which should use the PLT entry. ABS32/REL32
10050 will use the symbol's value, which may point to a PLT entry, but we
10051 don't need to handle that here. If we created a PLT entry, all
10052 branches in this object should go to it, except if the PLT is too
10053 far away, in which case a long branch stub should be inserted. */
10054 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10055 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10056 && r_type != R_ARM_CALL
10057 && r_type != R_ARM_JUMP24
10058 && r_type != R_ARM_PLT32)
10059 && plt_offset != (bfd_vma) -1)
10060 {
10061 /* If we've created a .plt section, and assigned a PLT entry
10062 to this function, it must either be a STT_GNU_IFUNC reference
10063 or not be known to bind locally. In other cases, we should
10064 have cleared the PLT entry by now. */
10065 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10066
10067 value = (splt->output_section->vma
10068 + splt->output_offset
10069 + plt_offset);
10070 *unresolved_reloc_p = FALSE;
10071 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10072 contents, rel->r_offset, value,
10073 rel->r_addend);
10074 }
10075
10076 /* When generating a shared object or relocatable executable, these
10077 relocations are copied into the output file to be resolved at
10078 run time. */
10079 if ((bfd_link_pic (info)
10080 || globals->root.is_relocatable_executable)
10081 && (input_section->flags & SEC_ALLOC)
10082 && !(globals->vxworks_p
10083 && strcmp (input_section->output_section->name,
10084 ".tls_vars") == 0)
10085 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10086 || !SYMBOL_CALLS_LOCAL (info, h))
10087 && !(input_bfd == globals->stub_bfd
10088 && strstr (input_section->name, STUB_SUFFIX))
10089 && (h == NULL
10090 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10091 && !resolved_to_zero)
10092 || h->root.type != bfd_link_hash_undefweak)
10093 && r_type != R_ARM_PC24
10094 && r_type != R_ARM_CALL
10095 && r_type != R_ARM_JUMP24
10096 && r_type != R_ARM_PREL31
10097 && r_type != R_ARM_PLT32)
10098 {
10099 Elf_Internal_Rela outrel;
10100 bfd_boolean skip, relocate;
10101
10102 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10103 && !h->def_regular)
10104 {
10105 char *v = _("shared object");
10106
10107 if (bfd_link_executable (info))
10108 v = _("PIE executable");
10109
10110 _bfd_error_handler
10111 (_("%pB: relocation %s against external or undefined symbol `%s'"
10112 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10113 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10114 return bfd_reloc_notsupported;
10115 }
10116
10117 *unresolved_reloc_p = FALSE;
10118
10119 if (sreloc == NULL && globals->root.dynamic_sections_created)
10120 {
10121 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10122 ! globals->use_rel);
10123
10124 if (sreloc == NULL)
10125 return bfd_reloc_notsupported;
10126 }
10127
10128 skip = FALSE;
10129 relocate = FALSE;
10130
10131 outrel.r_addend = addend;
10132 outrel.r_offset =
10133 _bfd_elf_section_offset (output_bfd, info, input_section,
10134 rel->r_offset);
10135 if (outrel.r_offset == (bfd_vma) -1)
10136 skip = TRUE;
10137 else if (outrel.r_offset == (bfd_vma) -2)
10138 skip = TRUE, relocate = TRUE;
10139 outrel.r_offset += (input_section->output_section->vma
10140 + input_section->output_offset);
10141
10142 if (skip)
10143 memset (&outrel, 0, sizeof outrel);
10144 else if (h != NULL
10145 && h->dynindx != -1
10146 && (!bfd_link_pic (info)
10147 || !(bfd_link_pie (info)
10148 || SYMBOLIC_BIND (info, h))
10149 || !h->def_regular))
10150 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10151 else
10152 {
10153 int symbol;
10154
10155 /* This symbol is local, or marked to become local. */
10156 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10157 if (globals->symbian_p)
10158 {
10159 asection *osec;
10160
10161 /* On Symbian OS, the data segment and text segement
10162 can be relocated independently. Therefore, we
10163 must indicate the segment to which this
10164 relocation is relative. The BPABI allows us to
10165 use any symbol in the right segment; we just use
10166 the section symbol as it is convenient. (We
10167 cannot use the symbol given by "h" directly as it
10168 will not appear in the dynamic symbol table.)
10169
10170 Note that the dynamic linker ignores the section
10171 symbol value, so we don't subtract osec->vma
10172 from the emitted reloc addend. */
10173 if (sym_sec)
10174 osec = sym_sec->output_section;
10175 else
10176 osec = input_section->output_section;
10177 symbol = elf_section_data (osec)->dynindx;
10178 if (symbol == 0)
10179 {
10180 struct elf_link_hash_table *htab = elf_hash_table (info);
10181
10182 if ((osec->flags & SEC_READONLY) == 0
10183 && htab->data_index_section != NULL)
10184 osec = htab->data_index_section;
10185 else
10186 osec = htab->text_index_section;
10187 symbol = elf_section_data (osec)->dynindx;
10188 }
10189 BFD_ASSERT (symbol != 0);
10190 }
10191 else
10192 /* On SVR4-ish systems, the dynamic loader cannot
10193 relocate the text and data segments independently,
10194 so the symbol does not matter. */
10195 symbol = 0;
10196 if (dynreloc_st_type == STT_GNU_IFUNC)
10197 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10198 to the .iplt entry. Instead, every non-call reference
10199 must use an R_ARM_IRELATIVE relocation to obtain the
10200 correct run-time address. */
10201 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10202 else
10203 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10204 if (globals->use_rel)
10205 relocate = TRUE;
10206 else
10207 outrel.r_addend += dynreloc_value;
10208 }
10209
10210 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10211
10212 /* If this reloc is against an external symbol, we do not want to
10213 fiddle with the addend. Otherwise, we need to include the symbol
10214 value so that it becomes an addend for the dynamic reloc. */
10215 if (! relocate)
10216 return bfd_reloc_ok;
10217
10218 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10219 contents, rel->r_offset,
10220 dynreloc_value, (bfd_vma) 0);
10221 }
10222 else switch (r_type)
10223 {
10224 case R_ARM_ABS12:
10225 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10226
10227 case R_ARM_XPC25: /* Arm BLX instruction. */
10228 case R_ARM_CALL:
10229 case R_ARM_JUMP24:
10230 case R_ARM_PC24: /* Arm B/BL instruction. */
10231 case R_ARM_PLT32:
10232 {
10233 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10234
10235 if (r_type == R_ARM_XPC25)
10236 {
10237 /* Check for Arm calling Arm function. */
10238 /* FIXME: Should we translate the instruction into a BL
10239 instruction instead ? */
10240 if (branch_type != ST_BRANCH_TO_THUMB)
10241 _bfd_error_handler
10242 (_("\%pB: Warning: Arm BLX instruction targets Arm function '%s'."),
10243 input_bfd,
10244 h ? h->root.root.string : "(local)");
10245 }
10246 else if (r_type == R_ARM_PC24)
10247 {
10248 /* Check for Arm calling Thumb function. */
10249 if (branch_type == ST_BRANCH_TO_THUMB)
10250 {
10251 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10252 output_bfd, input_section,
10253 hit_data, sym_sec, rel->r_offset,
10254 signed_addend, value,
10255 error_message))
10256 return bfd_reloc_ok;
10257 else
10258 return bfd_reloc_dangerous;
10259 }
10260 }
10261
10262 /* Check if a stub has to be inserted because the
10263 destination is too far or we are changing mode. */
10264 if ( r_type == R_ARM_CALL
10265 || r_type == R_ARM_JUMP24
10266 || r_type == R_ARM_PLT32)
10267 {
10268 enum elf32_arm_stub_type stub_type = arm_stub_none;
10269 struct elf32_arm_link_hash_entry *hash;
10270
10271 hash = (struct elf32_arm_link_hash_entry *) h;
10272 stub_type = arm_type_of_stub (info, input_section, rel,
10273 st_type, &branch_type,
10274 hash, value, sym_sec,
10275 input_bfd, sym_name);
10276
10277 if (stub_type != arm_stub_none)
10278 {
10279 /* The target is out of reach, so redirect the
10280 branch to the local stub for this function. */
10281 stub_entry = elf32_arm_get_stub_entry (input_section,
10282 sym_sec, h,
10283 rel, globals,
10284 stub_type);
10285 {
10286 if (stub_entry != NULL)
10287 value = (stub_entry->stub_offset
10288 + stub_entry->stub_sec->output_offset
10289 + stub_entry->stub_sec->output_section->vma);
10290
10291 if (plt_offset != (bfd_vma) -1)
10292 *unresolved_reloc_p = FALSE;
10293 }
10294 }
10295 else
10296 {
10297 /* If the call goes through a PLT entry, make sure to
10298 check distance to the right destination address. */
10299 if (plt_offset != (bfd_vma) -1)
10300 {
10301 value = (splt->output_section->vma
10302 + splt->output_offset
10303 + plt_offset);
10304 *unresolved_reloc_p = FALSE;
10305 /* The PLT entry is in ARM mode, regardless of the
10306 target function. */
10307 branch_type = ST_BRANCH_TO_ARM;
10308 }
10309 }
10310 }
10311
10312 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10313 where:
10314 S is the address of the symbol in the relocation.
10315 P is address of the instruction being relocated.
10316 A is the addend (extracted from the instruction) in bytes.
10317
10318 S is held in 'value'.
10319 P is the base address of the section containing the
10320 instruction plus the offset of the reloc into that
10321 section, ie:
10322 (input_section->output_section->vma +
10323 input_section->output_offset +
10324 rel->r_offset).
10325 A is the addend, converted into bytes, ie:
10326 (signed_addend * 4)
10327
10328 Note: None of these operations have knowledge of the pipeline
10329 size of the processor, thus it is up to the assembler to
10330 encode this information into the addend. */
10331 value -= (input_section->output_section->vma
10332 + input_section->output_offset);
10333 value -= rel->r_offset;
10334 if (globals->use_rel)
10335 value += (signed_addend << howto->size);
10336 else
10337 /* RELA addends do not have to be adjusted by howto->size. */
10338 value += signed_addend;
10339
10340 signed_addend = value;
10341 signed_addend >>= howto->rightshift;
10342
10343 /* A branch to an undefined weak symbol is turned into a jump to
10344 the next instruction unless a PLT entry will be created.
10345 Do the same for local undefined symbols (but not for STN_UNDEF).
10346 The jump to the next instruction is optimized as a NOP depending
10347 on the architecture. */
10348 if (h ? (h->root.type == bfd_link_hash_undefweak
10349 && plt_offset == (bfd_vma) -1)
10350 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10351 {
10352 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10353
10354 if (arch_has_arm_nop (globals))
10355 value |= 0x0320f000;
10356 else
10357 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10358 }
10359 else
10360 {
10361 /* Perform a signed range check. */
10362 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10363 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10364 return bfd_reloc_overflow;
10365
10366 addend = (value & 2);
10367
10368 value = (signed_addend & howto->dst_mask)
10369 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10370
10371 if (r_type == R_ARM_CALL)
10372 {
10373 /* Set the H bit in the BLX instruction. */
10374 if (branch_type == ST_BRANCH_TO_THUMB)
10375 {
10376 if (addend)
10377 value |= (1 << 24);
10378 else
10379 value &= ~(bfd_vma)(1 << 24);
10380 }
10381
10382 /* Select the correct instruction (BL or BLX). */
10383 /* Only if we are not handling a BL to a stub. In this
10384 case, mode switching is performed by the stub. */
10385 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10386 value |= (1 << 28);
10387 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10388 {
10389 value &= ~(bfd_vma)(1 << 28);
10390 value |= (1 << 24);
10391 }
10392 }
10393 }
10394 }
10395 break;
10396
10397 case R_ARM_ABS32:
10398 value += addend;
10399 if (branch_type == ST_BRANCH_TO_THUMB)
10400 value |= 1;
10401 break;
10402
10403 case R_ARM_ABS32_NOI:
10404 value += addend;
10405 break;
10406
10407 case R_ARM_REL32:
10408 value += addend;
10409 if (branch_type == ST_BRANCH_TO_THUMB)
10410 value |= 1;
10411 value -= (input_section->output_section->vma
10412 + input_section->output_offset + rel->r_offset);
10413 break;
10414
10415 case R_ARM_REL32_NOI:
10416 value += addend;
10417 value -= (input_section->output_section->vma
10418 + input_section->output_offset + rel->r_offset);
10419 break;
10420
10421 case R_ARM_PREL31:
10422 value -= (input_section->output_section->vma
10423 + input_section->output_offset + rel->r_offset);
10424 value += signed_addend;
10425 if (! h || h->root.type != bfd_link_hash_undefweak)
10426 {
10427 /* Check for overflow. */
10428 if ((value ^ (value >> 1)) & (1 << 30))
10429 return bfd_reloc_overflow;
10430 }
10431 value &= 0x7fffffff;
10432 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10433 if (branch_type == ST_BRANCH_TO_THUMB)
10434 value |= 1;
10435 break;
10436 }
10437
10438 bfd_put_32 (input_bfd, value, hit_data);
10439 return bfd_reloc_ok;
10440
10441 case R_ARM_ABS8:
10442 /* PR 16202: Refectch the addend using the correct size. */
10443 if (globals->use_rel)
10444 addend = bfd_get_8 (input_bfd, hit_data);
10445 value += addend;
10446
10447 /* There is no way to tell whether the user intended to use a signed or
10448 unsigned addend. When checking for overflow we accept either,
10449 as specified by the AAELF. */
10450 if ((long) value > 0xff || (long) value < -0x80)
10451 return bfd_reloc_overflow;
10452
10453 bfd_put_8 (input_bfd, value, hit_data);
10454 return bfd_reloc_ok;
10455
10456 case R_ARM_ABS16:
10457 /* PR 16202: Refectch the addend using the correct size. */
10458 if (globals->use_rel)
10459 addend = bfd_get_16 (input_bfd, hit_data);
10460 value += addend;
10461
10462 /* See comment for R_ARM_ABS8. */
10463 if ((long) value > 0xffff || (long) value < -0x8000)
10464 return bfd_reloc_overflow;
10465
10466 bfd_put_16 (input_bfd, value, hit_data);
10467 return bfd_reloc_ok;
10468
10469 case R_ARM_THM_ABS5:
10470 /* Support ldr and str instructions for the thumb. */
10471 if (globals->use_rel)
10472 {
10473 /* Need to refetch addend. */
10474 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10475 /* ??? Need to determine shift amount from operand size. */
10476 addend >>= howto->rightshift;
10477 }
10478 value += addend;
10479
10480 /* ??? Isn't value unsigned? */
10481 if ((long) value > 0x1f || (long) value < -0x10)
10482 return bfd_reloc_overflow;
10483
10484 /* ??? Value needs to be properly shifted into place first. */
10485 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10486 bfd_put_16 (input_bfd, value, hit_data);
10487 return bfd_reloc_ok;
10488
10489 case R_ARM_THM_ALU_PREL_11_0:
10490 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10491 {
10492 bfd_vma insn;
10493 bfd_signed_vma relocation;
10494
10495 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10496 | bfd_get_16 (input_bfd, hit_data + 2);
10497
10498 if (globals->use_rel)
10499 {
10500 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10501 | ((insn & (1 << 26)) >> 15);
10502 if (insn & 0xf00000)
10503 signed_addend = -signed_addend;
10504 }
10505
10506 relocation = value + signed_addend;
10507 relocation -= Pa (input_section->output_section->vma
10508 + input_section->output_offset
10509 + rel->r_offset);
10510
10511 /* PR 21523: Use an absolute value. The user of this reloc will
10512 have already selected an ADD or SUB insn appropriately. */
10513 value = labs (relocation);
10514
10515 if (value >= 0x1000)
10516 return bfd_reloc_overflow;
10517
10518 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10519 if (branch_type == ST_BRANCH_TO_THUMB)
10520 value |= 1;
10521
10522 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10523 | ((value & 0x700) << 4)
10524 | ((value & 0x800) << 15);
10525 if (relocation < 0)
10526 insn |= 0xa00000;
10527
10528 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10529 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10530
10531 return bfd_reloc_ok;
10532 }
10533
10534 case R_ARM_THM_PC8:
10535 /* PR 10073: This reloc is not generated by the GNU toolchain,
10536 but it is supported for compatibility with third party libraries
10537 generated by other compilers, specifically the ARM/IAR. */
10538 {
10539 bfd_vma insn;
10540 bfd_signed_vma relocation;
10541
10542 insn = bfd_get_16 (input_bfd, hit_data);
10543
10544 if (globals->use_rel)
10545 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10546
10547 relocation = value + addend;
10548 relocation -= Pa (input_section->output_section->vma
10549 + input_section->output_offset
10550 + rel->r_offset);
10551
10552 value = relocation;
10553
10554 /* We do not check for overflow of this reloc. Although strictly
10555 speaking this is incorrect, it appears to be necessary in order
10556 to work with IAR generated relocs. Since GCC and GAS do not
10557 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10558 a problem for them. */
10559 value &= 0x3fc;
10560
10561 insn = (insn & 0xff00) | (value >> 2);
10562
10563 bfd_put_16 (input_bfd, insn, hit_data);
10564
10565 return bfd_reloc_ok;
10566 }
10567
10568 case R_ARM_THM_PC12:
10569 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10570 {
10571 bfd_vma insn;
10572 bfd_signed_vma relocation;
10573
10574 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10575 | bfd_get_16 (input_bfd, hit_data + 2);
10576
10577 if (globals->use_rel)
10578 {
10579 signed_addend = insn & 0xfff;
10580 if (!(insn & (1 << 23)))
10581 signed_addend = -signed_addend;
10582 }
10583
10584 relocation = value + signed_addend;
10585 relocation -= Pa (input_section->output_section->vma
10586 + input_section->output_offset
10587 + rel->r_offset);
10588
10589 value = relocation;
10590
10591 if (value >= 0x1000)
10592 return bfd_reloc_overflow;
10593
10594 insn = (insn & 0xff7ff000) | value;
10595 if (relocation >= 0)
10596 insn |= (1 << 23);
10597
10598 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10599 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10600
10601 return bfd_reloc_ok;
10602 }
10603
10604 case R_ARM_THM_XPC22:
10605 case R_ARM_THM_CALL:
10606 case R_ARM_THM_JUMP24:
10607 /* Thumb BL (branch long instruction). */
10608 {
10609 bfd_vma relocation;
10610 bfd_vma reloc_sign;
10611 bfd_boolean overflow = FALSE;
10612 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10613 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10614 bfd_signed_vma reloc_signed_max;
10615 bfd_signed_vma reloc_signed_min;
10616 bfd_vma check;
10617 bfd_signed_vma signed_check;
10618 int bitsize;
10619 const int thumb2 = using_thumb2 (globals);
10620 const int thumb2_bl = using_thumb2_bl (globals);
10621
10622 /* A branch to an undefined weak symbol is turned into a jump to
10623 the next instruction unless a PLT entry will be created.
10624 The jump to the next instruction is optimized as a NOP.W for
10625 Thumb-2 enabled architectures. */
10626 if (h && h->root.type == bfd_link_hash_undefweak
10627 && plt_offset == (bfd_vma) -1)
10628 {
10629 if (thumb2)
10630 {
10631 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10632 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10633 }
10634 else
10635 {
10636 bfd_put_16 (input_bfd, 0xe000, hit_data);
10637 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10638 }
10639 return bfd_reloc_ok;
10640 }
10641
10642 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10643 with Thumb-1) involving the J1 and J2 bits. */
10644 if (globals->use_rel)
10645 {
10646 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10647 bfd_vma upper = upper_insn & 0x3ff;
10648 bfd_vma lower = lower_insn & 0x7ff;
10649 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10650 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10651 bfd_vma i1 = j1 ^ s ? 0 : 1;
10652 bfd_vma i2 = j2 ^ s ? 0 : 1;
10653
10654 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10655 /* Sign extend. */
10656 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10657
10658 signed_addend = addend;
10659 }
10660
10661 if (r_type == R_ARM_THM_XPC22)
10662 {
10663 /* Check for Thumb to Thumb call. */
10664 /* FIXME: Should we translate the instruction into a BL
10665 instruction instead ? */
10666 if (branch_type == ST_BRANCH_TO_THUMB)
10667 _bfd_error_handler
10668 (_("%pB: Warning: Thumb BLX instruction targets thumb function '%s'."),
10669 input_bfd,
10670 h ? h->root.root.string : "(local)");
10671 }
10672 else
10673 {
10674 /* If it is not a call to Thumb, assume call to Arm.
10675 If it is a call relative to a section name, then it is not a
10676 function call at all, but rather a long jump. Calls through
10677 the PLT do not require stubs. */
10678 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10679 {
10680 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10681 {
10682 /* Convert BL to BLX. */
10683 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10684 }
10685 else if (( r_type != R_ARM_THM_CALL)
10686 && (r_type != R_ARM_THM_JUMP24))
10687 {
10688 if (elf32_thumb_to_arm_stub
10689 (info, sym_name, input_bfd, output_bfd, input_section,
10690 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10691 error_message))
10692 return bfd_reloc_ok;
10693 else
10694 return bfd_reloc_dangerous;
10695 }
10696 }
10697 else if (branch_type == ST_BRANCH_TO_THUMB
10698 && globals->use_blx
10699 && r_type == R_ARM_THM_CALL)
10700 {
10701 /* Make sure this is a BL. */
10702 lower_insn |= 0x1800;
10703 }
10704 }
10705
10706 enum elf32_arm_stub_type stub_type = arm_stub_none;
10707 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10708 {
10709 /* Check if a stub has to be inserted because the destination
10710 is too far. */
10711 struct elf32_arm_stub_hash_entry *stub_entry;
10712 struct elf32_arm_link_hash_entry *hash;
10713
10714 hash = (struct elf32_arm_link_hash_entry *) h;
10715
10716 stub_type = arm_type_of_stub (info, input_section, rel,
10717 st_type, &branch_type,
10718 hash, value, sym_sec,
10719 input_bfd, sym_name);
10720
10721 if (stub_type != arm_stub_none)
10722 {
10723 /* The target is out of reach or we are changing modes, so
10724 redirect the branch to the local stub for this
10725 function. */
10726 stub_entry = elf32_arm_get_stub_entry (input_section,
10727 sym_sec, h,
10728 rel, globals,
10729 stub_type);
10730 if (stub_entry != NULL)
10731 {
10732 value = (stub_entry->stub_offset
10733 + stub_entry->stub_sec->output_offset
10734 + stub_entry->stub_sec->output_section->vma);
10735
10736 if (plt_offset != (bfd_vma) -1)
10737 *unresolved_reloc_p = FALSE;
10738 }
10739
10740 /* If this call becomes a call to Arm, force BLX. */
10741 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10742 {
10743 if ((stub_entry
10744 && !arm_stub_is_thumb (stub_entry->stub_type))
10745 || branch_type != ST_BRANCH_TO_THUMB)
10746 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10747 }
10748 }
10749 }
10750
10751 /* Handle calls via the PLT. */
10752 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10753 {
10754 value = (splt->output_section->vma
10755 + splt->output_offset
10756 + plt_offset);
10757
10758 if (globals->use_blx
10759 && r_type == R_ARM_THM_CALL
10760 && ! using_thumb_only (globals))
10761 {
10762 /* If the Thumb BLX instruction is available, convert
10763 the BL to a BLX instruction to call the ARM-mode
10764 PLT entry. */
10765 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10766 branch_type = ST_BRANCH_TO_ARM;
10767 }
10768 else
10769 {
10770 if (! using_thumb_only (globals))
10771 /* Target the Thumb stub before the ARM PLT entry. */
10772 value -= PLT_THUMB_STUB_SIZE;
10773 branch_type = ST_BRANCH_TO_THUMB;
10774 }
10775 *unresolved_reloc_p = FALSE;
10776 }
10777
10778 relocation = value + signed_addend;
10779
10780 relocation -= (input_section->output_section->vma
10781 + input_section->output_offset
10782 + rel->r_offset);
10783
10784 check = relocation >> howto->rightshift;
10785
10786 /* If this is a signed value, the rightshift just dropped
10787 leading 1 bits (assuming twos complement). */
10788 if ((bfd_signed_vma) relocation >= 0)
10789 signed_check = check;
10790 else
10791 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10792
10793 /* Calculate the permissable maximum and minimum values for
10794 this relocation according to whether we're relocating for
10795 Thumb-2 or not. */
10796 bitsize = howto->bitsize;
10797 if (!thumb2_bl)
10798 bitsize -= 2;
10799 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10800 reloc_signed_min = ~reloc_signed_max;
10801
10802 /* Assumes two's complement. */
10803 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10804 overflow = TRUE;
10805
10806 if ((lower_insn & 0x5000) == 0x4000)
10807 /* For a BLX instruction, make sure that the relocation is rounded up
10808 to a word boundary. This follows the semantics of the instruction
10809 which specifies that bit 1 of the target address will come from bit
10810 1 of the base address. */
10811 relocation = (relocation + 2) & ~ 3;
10812
10813 /* Put RELOCATION back into the insn. Assumes two's complement.
10814 We use the Thumb-2 encoding, which is safe even if dealing with
10815 a Thumb-1 instruction by virtue of our overflow check above. */
10816 reloc_sign = (signed_check < 0) ? 1 : 0;
10817 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10818 | ((relocation >> 12) & 0x3ff)
10819 | (reloc_sign << 10);
10820 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10821 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10822 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10823 | ((relocation >> 1) & 0x7ff);
10824
10825 /* Put the relocated value back in the object file: */
10826 bfd_put_16 (input_bfd, upper_insn, hit_data);
10827 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10828
10829 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10830 }
10831 break;
10832
10833 case R_ARM_THM_JUMP19:
10834 /* Thumb32 conditional branch instruction. */
10835 {
10836 bfd_vma relocation;
10837 bfd_boolean overflow = FALSE;
10838 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10839 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10840 bfd_signed_vma reloc_signed_max = 0xffffe;
10841 bfd_signed_vma reloc_signed_min = -0x100000;
10842 bfd_signed_vma signed_check;
10843 enum elf32_arm_stub_type stub_type = arm_stub_none;
10844 struct elf32_arm_stub_hash_entry *stub_entry;
10845 struct elf32_arm_link_hash_entry *hash;
10846
10847 /* Need to refetch the addend, reconstruct the top three bits,
10848 and squish the two 11 bit pieces together. */
10849 if (globals->use_rel)
10850 {
10851 bfd_vma S = (upper_insn & 0x0400) >> 10;
10852 bfd_vma upper = (upper_insn & 0x003f);
10853 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10854 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10855 bfd_vma lower = (lower_insn & 0x07ff);
10856
10857 upper |= J1 << 6;
10858 upper |= J2 << 7;
10859 upper |= (!S) << 8;
10860 upper -= 0x0100; /* Sign extend. */
10861
10862 addend = (upper << 12) | (lower << 1);
10863 signed_addend = addend;
10864 }
10865
10866 /* Handle calls via the PLT. */
10867 if (plt_offset != (bfd_vma) -1)
10868 {
10869 value = (splt->output_section->vma
10870 + splt->output_offset
10871 + plt_offset);
10872 /* Target the Thumb stub before the ARM PLT entry. */
10873 value -= PLT_THUMB_STUB_SIZE;
10874 *unresolved_reloc_p = FALSE;
10875 }
10876
10877 hash = (struct elf32_arm_link_hash_entry *)h;
10878
10879 stub_type = arm_type_of_stub (info, input_section, rel,
10880 st_type, &branch_type,
10881 hash, value, sym_sec,
10882 input_bfd, sym_name);
10883 if (stub_type != arm_stub_none)
10884 {
10885 stub_entry = elf32_arm_get_stub_entry (input_section,
10886 sym_sec, h,
10887 rel, globals,
10888 stub_type);
10889 if (stub_entry != NULL)
10890 {
10891 value = (stub_entry->stub_offset
10892 + stub_entry->stub_sec->output_offset
10893 + stub_entry->stub_sec->output_section->vma);
10894 }
10895 }
10896
10897 relocation = value + signed_addend;
10898 relocation -= (input_section->output_section->vma
10899 + input_section->output_offset
10900 + rel->r_offset);
10901 signed_check = (bfd_signed_vma) relocation;
10902
10903 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10904 overflow = TRUE;
10905
10906 /* Put RELOCATION back into the insn. */
10907 {
10908 bfd_vma S = (relocation & 0x00100000) >> 20;
10909 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10910 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10911 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10912 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10913
10914 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10915 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10916 }
10917
10918 /* Put the relocated value back in the object file: */
10919 bfd_put_16 (input_bfd, upper_insn, hit_data);
10920 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10921
10922 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10923 }
10924
10925 case R_ARM_THM_JUMP11:
10926 case R_ARM_THM_JUMP8:
10927 case R_ARM_THM_JUMP6:
10928 /* Thumb B (branch) instruction). */
10929 {
10930 bfd_signed_vma relocation;
10931 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10932 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10933 bfd_signed_vma signed_check;
10934
10935 /* CZB cannot jump backward. */
10936 if (r_type == R_ARM_THM_JUMP6)
10937 reloc_signed_min = 0;
10938
10939 if (globals->use_rel)
10940 {
10941 /* Need to refetch addend. */
10942 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10943 if (addend & ((howto->src_mask + 1) >> 1))
10944 {
10945 signed_addend = -1;
10946 signed_addend &= ~ howto->src_mask;
10947 signed_addend |= addend;
10948 }
10949 else
10950 signed_addend = addend;
10951 /* The value in the insn has been right shifted. We need to
10952 undo this, so that we can perform the address calculation
10953 in terms of bytes. */
10954 signed_addend <<= howto->rightshift;
10955 }
10956 relocation = value + signed_addend;
10957
10958 relocation -= (input_section->output_section->vma
10959 + input_section->output_offset
10960 + rel->r_offset);
10961
10962 relocation >>= howto->rightshift;
10963 signed_check = relocation;
10964
10965 if (r_type == R_ARM_THM_JUMP6)
10966 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10967 else
10968 relocation &= howto->dst_mask;
10969 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10970
10971 bfd_put_16 (input_bfd, relocation, hit_data);
10972
10973 /* Assumes two's complement. */
10974 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10975 return bfd_reloc_overflow;
10976
10977 return bfd_reloc_ok;
10978 }
10979
10980 case R_ARM_ALU_PCREL7_0:
10981 case R_ARM_ALU_PCREL15_8:
10982 case R_ARM_ALU_PCREL23_15:
10983 {
10984 bfd_vma insn;
10985 bfd_vma relocation;
10986
10987 insn = bfd_get_32 (input_bfd, hit_data);
10988 if (globals->use_rel)
10989 {
10990 /* Extract the addend. */
10991 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10992 signed_addend = addend;
10993 }
10994 relocation = value + signed_addend;
10995
10996 relocation -= (input_section->output_section->vma
10997 + input_section->output_offset
10998 + rel->r_offset);
10999 insn = (insn & ~0xfff)
11000 | ((howto->bitpos << 7) & 0xf00)
11001 | ((relocation >> howto->bitpos) & 0xff);
11002 bfd_put_32 (input_bfd, value, hit_data);
11003 }
11004 return bfd_reloc_ok;
11005
11006 case R_ARM_GNU_VTINHERIT:
11007 case R_ARM_GNU_VTENTRY:
11008 return bfd_reloc_ok;
11009
11010 case R_ARM_GOTOFF32:
11011 /* Relocation is relative to the start of the
11012 global offset table. */
11013
11014 BFD_ASSERT (sgot != NULL);
11015 if (sgot == NULL)
11016 return bfd_reloc_notsupported;
11017
11018 /* If we are addressing a Thumb function, we need to adjust the
11019 address by one, so that attempts to call the function pointer will
11020 correctly interpret it as Thumb code. */
11021 if (branch_type == ST_BRANCH_TO_THUMB)
11022 value += 1;
11023
11024 /* Note that sgot->output_offset is not involved in this
11025 calculation. We always want the start of .got. If we
11026 define _GLOBAL_OFFSET_TABLE in a different way, as is
11027 permitted by the ABI, we might have to change this
11028 calculation. */
11029 value -= sgot->output_section->vma;
11030 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11031 contents, rel->r_offset, value,
11032 rel->r_addend);
11033
11034 case R_ARM_GOTPC:
11035 /* Use global offset table as symbol value. */
11036 BFD_ASSERT (sgot != NULL);
11037
11038 if (sgot == NULL)
11039 return bfd_reloc_notsupported;
11040
11041 *unresolved_reloc_p = FALSE;
11042 value = sgot->output_section->vma;
11043 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11044 contents, rel->r_offset, value,
11045 rel->r_addend);
11046
11047 case R_ARM_GOT32:
11048 case R_ARM_GOT_PREL:
11049 /* Relocation is to the entry for this symbol in the
11050 global offset table. */
11051 if (sgot == NULL)
11052 return bfd_reloc_notsupported;
11053
11054 if (dynreloc_st_type == STT_GNU_IFUNC
11055 && plt_offset != (bfd_vma) -1
11056 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11057 {
11058 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11059 symbol, and the relocation resolves directly to the runtime
11060 target rather than to the .iplt entry. This means that any
11061 .got entry would be the same value as the .igot.plt entry,
11062 so there's no point creating both. */
11063 sgot = globals->root.igotplt;
11064 value = sgot->output_offset + gotplt_offset;
11065 }
11066 else if (h != NULL)
11067 {
11068 bfd_vma off;
11069
11070 off = h->got.offset;
11071 BFD_ASSERT (off != (bfd_vma) -1);
11072 if ((off & 1) != 0)
11073 {
11074 /* We have already processsed one GOT relocation against
11075 this symbol. */
11076 off &= ~1;
11077 if (globals->root.dynamic_sections_created
11078 && !SYMBOL_REFERENCES_LOCAL (info, h))
11079 *unresolved_reloc_p = FALSE;
11080 }
11081 else
11082 {
11083 Elf_Internal_Rela outrel;
11084
11085 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11086 {
11087 /* If the symbol doesn't resolve locally in a static
11088 object, we have an undefined reference. If the
11089 symbol doesn't resolve locally in a dynamic object,
11090 it should be resolved by the dynamic linker. */
11091 if (globals->root.dynamic_sections_created)
11092 {
11093 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11094 *unresolved_reloc_p = FALSE;
11095 }
11096 else
11097 outrel.r_info = 0;
11098 outrel.r_addend = 0;
11099 }
11100 else
11101 {
11102 if (dynreloc_st_type == STT_GNU_IFUNC)
11103 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11104 else if (bfd_link_pic (info)
11105 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11106 || h->root.type != bfd_link_hash_undefweak))
11107 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11108 else
11109 outrel.r_info = 0;
11110 outrel.r_addend = dynreloc_value;
11111 }
11112
11113 /* The GOT entry is initialized to zero by default.
11114 See if we should install a different value. */
11115 if (outrel.r_addend != 0
11116 && (outrel.r_info == 0 || globals->use_rel))
11117 {
11118 bfd_put_32 (output_bfd, outrel.r_addend,
11119 sgot->contents + off);
11120 outrel.r_addend = 0;
11121 }
11122
11123 if (outrel.r_info != 0)
11124 {
11125 outrel.r_offset = (sgot->output_section->vma
11126 + sgot->output_offset
11127 + off);
11128 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11129 }
11130 h->got.offset |= 1;
11131 }
11132 value = sgot->output_offset + off;
11133 }
11134 else
11135 {
11136 bfd_vma off;
11137
11138 BFD_ASSERT (local_got_offsets != NULL
11139 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11140
11141 off = local_got_offsets[r_symndx];
11142
11143 /* The offset must always be a multiple of 4. We use the
11144 least significant bit to record whether we have already
11145 generated the necessary reloc. */
11146 if ((off & 1) != 0)
11147 off &= ~1;
11148 else
11149 {
11150 if (globals->use_rel)
11151 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11152
11153 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11154 {
11155 Elf_Internal_Rela outrel;
11156
11157 outrel.r_addend = addend + dynreloc_value;
11158 outrel.r_offset = (sgot->output_section->vma
11159 + sgot->output_offset
11160 + off);
11161 if (dynreloc_st_type == STT_GNU_IFUNC)
11162 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11163 else
11164 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11165 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11166 }
11167
11168 local_got_offsets[r_symndx] |= 1;
11169 }
11170
11171 value = sgot->output_offset + off;
11172 }
11173 if (r_type != R_ARM_GOT32)
11174 value += sgot->output_section->vma;
11175
11176 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11177 contents, rel->r_offset, value,
11178 rel->r_addend);
11179
11180 case R_ARM_TLS_LDO32:
11181 value = value - dtpoff_base (info);
11182
11183 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11184 contents, rel->r_offset, value,
11185 rel->r_addend);
11186
11187 case R_ARM_TLS_LDM32:
11188 {
11189 bfd_vma off;
11190
11191 if (sgot == NULL)
11192 abort ();
11193
11194 off = globals->tls_ldm_got.offset;
11195
11196 if ((off & 1) != 0)
11197 off &= ~1;
11198 else
11199 {
11200 /* If we don't know the module number, create a relocation
11201 for it. */
11202 if (bfd_link_pic (info))
11203 {
11204 Elf_Internal_Rela outrel;
11205
11206 if (srelgot == NULL)
11207 abort ();
11208
11209 outrel.r_addend = 0;
11210 outrel.r_offset = (sgot->output_section->vma
11211 + sgot->output_offset + off);
11212 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11213
11214 if (globals->use_rel)
11215 bfd_put_32 (output_bfd, outrel.r_addend,
11216 sgot->contents + off);
11217
11218 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11219 }
11220 else
11221 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11222
11223 globals->tls_ldm_got.offset |= 1;
11224 }
11225
11226 value = sgot->output_section->vma + sgot->output_offset + off
11227 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11228
11229 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11230 contents, rel->r_offset, value,
11231 rel->r_addend);
11232 }
11233
11234 case R_ARM_TLS_CALL:
11235 case R_ARM_THM_TLS_CALL:
11236 case R_ARM_TLS_GD32:
11237 case R_ARM_TLS_IE32:
11238 case R_ARM_TLS_GOTDESC:
11239 case R_ARM_TLS_DESCSEQ:
11240 case R_ARM_THM_TLS_DESCSEQ:
11241 {
11242 bfd_vma off, offplt;
11243 int indx = 0;
11244 char tls_type;
11245
11246 BFD_ASSERT (sgot != NULL);
11247
11248 if (h != NULL)
11249 {
11250 bfd_boolean dyn;
11251 dyn = globals->root.dynamic_sections_created;
11252 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11253 bfd_link_pic (info),
11254 h)
11255 && (!bfd_link_pic (info)
11256 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11257 {
11258 *unresolved_reloc_p = FALSE;
11259 indx = h->dynindx;
11260 }
11261 off = h->got.offset;
11262 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11263 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11264 }
11265 else
11266 {
11267 BFD_ASSERT (local_got_offsets != NULL);
11268 off = local_got_offsets[r_symndx];
11269 offplt = local_tlsdesc_gotents[r_symndx];
11270 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11271 }
11272
11273 /* Linker relaxations happens from one of the
11274 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11275 if (ELF32_R_TYPE(rel->r_info) != r_type)
11276 tls_type = GOT_TLS_IE;
11277
11278 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11279
11280 if ((off & 1) != 0)
11281 off &= ~1;
11282 else
11283 {
11284 bfd_boolean need_relocs = FALSE;
11285 Elf_Internal_Rela outrel;
11286 int cur_off = off;
11287
11288 /* The GOT entries have not been initialized yet. Do it
11289 now, and emit any relocations. If both an IE GOT and a
11290 GD GOT are necessary, we emit the GD first. */
11291
11292 if ((bfd_link_pic (info) || indx != 0)
11293 && (h == NULL
11294 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11295 && !resolved_to_zero)
11296 || h->root.type != bfd_link_hash_undefweak))
11297 {
11298 need_relocs = TRUE;
11299 BFD_ASSERT (srelgot != NULL);
11300 }
11301
11302 if (tls_type & GOT_TLS_GDESC)
11303 {
11304 bfd_byte *loc;
11305
11306 /* We should have relaxed, unless this is an undefined
11307 weak symbol. */
11308 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11309 || bfd_link_pic (info));
11310 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11311 <= globals->root.sgotplt->size);
11312
11313 outrel.r_addend = 0;
11314 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11315 + globals->root.sgotplt->output_offset
11316 + offplt
11317 + globals->sgotplt_jump_table_size);
11318
11319 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11320 sreloc = globals->root.srelplt;
11321 loc = sreloc->contents;
11322 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11323 BFD_ASSERT (loc + RELOC_SIZE (globals)
11324 <= sreloc->contents + sreloc->size);
11325
11326 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11327
11328 /* For globals, the first word in the relocation gets
11329 the relocation index and the top bit set, or zero,
11330 if we're binding now. For locals, it gets the
11331 symbol's offset in the tls section. */
11332 bfd_put_32 (output_bfd,
11333 !h ? value - elf_hash_table (info)->tls_sec->vma
11334 : info->flags & DF_BIND_NOW ? 0
11335 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11336 globals->root.sgotplt->contents + offplt
11337 + globals->sgotplt_jump_table_size);
11338
11339 /* Second word in the relocation is always zero. */
11340 bfd_put_32 (output_bfd, 0,
11341 globals->root.sgotplt->contents + offplt
11342 + globals->sgotplt_jump_table_size + 4);
11343 }
11344 if (tls_type & GOT_TLS_GD)
11345 {
11346 if (need_relocs)
11347 {
11348 outrel.r_addend = 0;
11349 outrel.r_offset = (sgot->output_section->vma
11350 + sgot->output_offset
11351 + cur_off);
11352 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11353
11354 if (globals->use_rel)
11355 bfd_put_32 (output_bfd, outrel.r_addend,
11356 sgot->contents + cur_off);
11357
11358 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11359
11360 if (indx == 0)
11361 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11362 sgot->contents + cur_off + 4);
11363 else
11364 {
11365 outrel.r_addend = 0;
11366 outrel.r_info = ELF32_R_INFO (indx,
11367 R_ARM_TLS_DTPOFF32);
11368 outrel.r_offset += 4;
11369
11370 if (globals->use_rel)
11371 bfd_put_32 (output_bfd, outrel.r_addend,
11372 sgot->contents + cur_off + 4);
11373
11374 elf32_arm_add_dynreloc (output_bfd, info,
11375 srelgot, &outrel);
11376 }
11377 }
11378 else
11379 {
11380 /* If we are not emitting relocations for a
11381 general dynamic reference, then we must be in a
11382 static link or an executable link with the
11383 symbol binding locally. Mark it as belonging
11384 to module 1, the executable. */
11385 bfd_put_32 (output_bfd, 1,
11386 sgot->contents + cur_off);
11387 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11388 sgot->contents + cur_off + 4);
11389 }
11390
11391 cur_off += 8;
11392 }
11393
11394 if (tls_type & GOT_TLS_IE)
11395 {
11396 if (need_relocs)
11397 {
11398 if (indx == 0)
11399 outrel.r_addend = value - dtpoff_base (info);
11400 else
11401 outrel.r_addend = 0;
11402 outrel.r_offset = (sgot->output_section->vma
11403 + sgot->output_offset
11404 + cur_off);
11405 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11406
11407 if (globals->use_rel)
11408 bfd_put_32 (output_bfd, outrel.r_addend,
11409 sgot->contents + cur_off);
11410
11411 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11412 }
11413 else
11414 bfd_put_32 (output_bfd, tpoff (info, value),
11415 sgot->contents + cur_off);
11416 cur_off += 4;
11417 }
11418
11419 if (h != NULL)
11420 h->got.offset |= 1;
11421 else
11422 local_got_offsets[r_symndx] |= 1;
11423 }
11424
11425 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11426 off += 8;
11427 else if (tls_type & GOT_TLS_GDESC)
11428 off = offplt;
11429
11430 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11431 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11432 {
11433 bfd_signed_vma offset;
11434 /* TLS stubs are arm mode. The original symbol is a
11435 data object, so branch_type is bogus. */
11436 branch_type = ST_BRANCH_TO_ARM;
11437 enum elf32_arm_stub_type stub_type
11438 = arm_type_of_stub (info, input_section, rel,
11439 st_type, &branch_type,
11440 (struct elf32_arm_link_hash_entry *)h,
11441 globals->tls_trampoline, globals->root.splt,
11442 input_bfd, sym_name);
11443
11444 if (stub_type != arm_stub_none)
11445 {
11446 struct elf32_arm_stub_hash_entry *stub_entry
11447 = elf32_arm_get_stub_entry
11448 (input_section, globals->root.splt, 0, rel,
11449 globals, stub_type);
11450 offset = (stub_entry->stub_offset
11451 + stub_entry->stub_sec->output_offset
11452 + stub_entry->stub_sec->output_section->vma);
11453 }
11454 else
11455 offset = (globals->root.splt->output_section->vma
11456 + globals->root.splt->output_offset
11457 + globals->tls_trampoline);
11458
11459 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11460 {
11461 unsigned long inst;
11462
11463 offset -= (input_section->output_section->vma
11464 + input_section->output_offset
11465 + rel->r_offset + 8);
11466
11467 inst = offset >> 2;
11468 inst &= 0x00ffffff;
11469 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11470 }
11471 else
11472 {
11473 /* Thumb blx encodes the offset in a complicated
11474 fashion. */
11475 unsigned upper_insn, lower_insn;
11476 unsigned neg;
11477
11478 offset -= (input_section->output_section->vma
11479 + input_section->output_offset
11480 + rel->r_offset + 4);
11481
11482 if (stub_type != arm_stub_none
11483 && arm_stub_is_thumb (stub_type))
11484 {
11485 lower_insn = 0xd000;
11486 }
11487 else
11488 {
11489 lower_insn = 0xc000;
11490 /* Round up the offset to a word boundary. */
11491 offset = (offset + 2) & ~2;
11492 }
11493
11494 neg = offset < 0;
11495 upper_insn = (0xf000
11496 | ((offset >> 12) & 0x3ff)
11497 | (neg << 10));
11498 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11499 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11500 | ((offset >> 1) & 0x7ff);
11501 bfd_put_16 (input_bfd, upper_insn, hit_data);
11502 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11503 return bfd_reloc_ok;
11504 }
11505 }
11506 /* These relocations needs special care, as besides the fact
11507 they point somewhere in .gotplt, the addend must be
11508 adjusted accordingly depending on the type of instruction
11509 we refer to. */
11510 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11511 {
11512 unsigned long data, insn;
11513 unsigned thumb;
11514
11515 data = bfd_get_32 (input_bfd, hit_data);
11516 thumb = data & 1;
11517 data &= ~1u;
11518
11519 if (thumb)
11520 {
11521 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11522 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11523 insn = (insn << 16)
11524 | bfd_get_16 (input_bfd,
11525 contents + rel->r_offset - data + 2);
11526 if ((insn & 0xf800c000) == 0xf000c000)
11527 /* bl/blx */
11528 value = -6;
11529 else if ((insn & 0xffffff00) == 0x4400)
11530 /* add */
11531 value = -5;
11532 else
11533 {
11534 _bfd_error_handler
11535 /* xgettext:c-format */
11536 (_("%pB(%pA+%#" PRIx64 "): "
11537 "unexpected Thumb instruction '%#lx' "
11538 "referenced by TLS_GOTDESC"),
11539 input_bfd, input_section, (uint64_t) rel->r_offset,
11540 insn);
11541 return bfd_reloc_notsupported;
11542 }
11543 }
11544 else
11545 {
11546 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11547
11548 switch (insn >> 24)
11549 {
11550 case 0xeb: /* bl */
11551 case 0xfa: /* blx */
11552 value = -4;
11553 break;
11554
11555 case 0xe0: /* add */
11556 value = -8;
11557 break;
11558
11559 default:
11560 _bfd_error_handler
11561 /* xgettext:c-format */
11562 (_("%pB(%pA+%#" PRIx64 "): "
11563 "unexpected ARM instruction '%#lx' "
11564 "referenced by TLS_GOTDESC"),
11565 input_bfd, input_section, (uint64_t) rel->r_offset,
11566 insn);
11567 return bfd_reloc_notsupported;
11568 }
11569 }
11570
11571 value += ((globals->root.sgotplt->output_section->vma
11572 + globals->root.sgotplt->output_offset + off)
11573 - (input_section->output_section->vma
11574 + input_section->output_offset
11575 + rel->r_offset)
11576 + globals->sgotplt_jump_table_size);
11577 }
11578 else
11579 value = ((globals->root.sgot->output_section->vma
11580 + globals->root.sgot->output_offset + off)
11581 - (input_section->output_section->vma
11582 + input_section->output_offset + rel->r_offset));
11583
11584 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11585 contents, rel->r_offset, value,
11586 rel->r_addend);
11587 }
11588
11589 case R_ARM_TLS_LE32:
11590 if (bfd_link_dll (info))
11591 {
11592 _bfd_error_handler
11593 /* xgettext:c-format */
11594 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
11595 "in shared object"),
11596 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
11597 return bfd_reloc_notsupported;
11598 }
11599 else
11600 value = tpoff (info, value);
11601
11602 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11603 contents, rel->r_offset, value,
11604 rel->r_addend);
11605
11606 case R_ARM_V4BX:
11607 if (globals->fix_v4bx)
11608 {
11609 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11610
11611 /* Ensure that we have a BX instruction. */
11612 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11613
11614 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11615 {
11616 /* Branch to veneer. */
11617 bfd_vma glue_addr;
11618 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11619 glue_addr -= input_section->output_section->vma
11620 + input_section->output_offset
11621 + rel->r_offset + 8;
11622 insn = (insn & 0xf0000000) | 0x0a000000
11623 | ((glue_addr >> 2) & 0x00ffffff);
11624 }
11625 else
11626 {
11627 /* Preserve Rm (lowest four bits) and the condition code
11628 (highest four bits). Other bits encode MOV PC,Rm. */
11629 insn = (insn & 0xf000000f) | 0x01a0f000;
11630 }
11631
11632 bfd_put_32 (input_bfd, insn, hit_data);
11633 }
11634 return bfd_reloc_ok;
11635
11636 case R_ARM_MOVW_ABS_NC:
11637 case R_ARM_MOVT_ABS:
11638 case R_ARM_MOVW_PREL_NC:
11639 case R_ARM_MOVT_PREL:
11640 /* Until we properly support segment-base-relative addressing then
11641 we assume the segment base to be zero, as for the group relocations.
11642 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11643 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11644 case R_ARM_MOVW_BREL_NC:
11645 case R_ARM_MOVW_BREL:
11646 case R_ARM_MOVT_BREL:
11647 {
11648 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11649
11650 if (globals->use_rel)
11651 {
11652 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11653 signed_addend = (addend ^ 0x8000) - 0x8000;
11654 }
11655
11656 value += signed_addend;
11657
11658 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11659 value -= (input_section->output_section->vma
11660 + input_section->output_offset + rel->r_offset);
11661
11662 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11663 return bfd_reloc_overflow;
11664
11665 if (branch_type == ST_BRANCH_TO_THUMB)
11666 value |= 1;
11667
11668 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11669 || r_type == R_ARM_MOVT_BREL)
11670 value >>= 16;
11671
11672 insn &= 0xfff0f000;
11673 insn |= value & 0xfff;
11674 insn |= (value & 0xf000) << 4;
11675 bfd_put_32 (input_bfd, insn, hit_data);
11676 }
11677 return bfd_reloc_ok;
11678
11679 case R_ARM_THM_MOVW_ABS_NC:
11680 case R_ARM_THM_MOVT_ABS:
11681 case R_ARM_THM_MOVW_PREL_NC:
11682 case R_ARM_THM_MOVT_PREL:
11683 /* Until we properly support segment-base-relative addressing then
11684 we assume the segment base to be zero, as for the above relocations.
11685 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11686 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11687 as R_ARM_THM_MOVT_ABS. */
11688 case R_ARM_THM_MOVW_BREL_NC:
11689 case R_ARM_THM_MOVW_BREL:
11690 case R_ARM_THM_MOVT_BREL:
11691 {
11692 bfd_vma insn;
11693
11694 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11695 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11696
11697 if (globals->use_rel)
11698 {
11699 addend = ((insn >> 4) & 0xf000)
11700 | ((insn >> 15) & 0x0800)
11701 | ((insn >> 4) & 0x0700)
11702 | (insn & 0x00ff);
11703 signed_addend = (addend ^ 0x8000) - 0x8000;
11704 }
11705
11706 value += signed_addend;
11707
11708 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11709 value -= (input_section->output_section->vma
11710 + input_section->output_offset + rel->r_offset);
11711
11712 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11713 return bfd_reloc_overflow;
11714
11715 if (branch_type == ST_BRANCH_TO_THUMB)
11716 value |= 1;
11717
11718 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11719 || r_type == R_ARM_THM_MOVT_BREL)
11720 value >>= 16;
11721
11722 insn &= 0xfbf08f00;
11723 insn |= (value & 0xf000) << 4;
11724 insn |= (value & 0x0800) << 15;
11725 insn |= (value & 0x0700) << 4;
11726 insn |= (value & 0x00ff);
11727
11728 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11729 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11730 }
11731 return bfd_reloc_ok;
11732
11733 case R_ARM_ALU_PC_G0_NC:
11734 case R_ARM_ALU_PC_G1_NC:
11735 case R_ARM_ALU_PC_G0:
11736 case R_ARM_ALU_PC_G1:
11737 case R_ARM_ALU_PC_G2:
11738 case R_ARM_ALU_SB_G0_NC:
11739 case R_ARM_ALU_SB_G1_NC:
11740 case R_ARM_ALU_SB_G0:
11741 case R_ARM_ALU_SB_G1:
11742 case R_ARM_ALU_SB_G2:
11743 {
11744 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11745 bfd_vma pc = input_section->output_section->vma
11746 + input_section->output_offset + rel->r_offset;
11747 /* sb is the origin of the *segment* containing the symbol. */
11748 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11749 bfd_vma residual;
11750 bfd_vma g_n;
11751 bfd_signed_vma signed_value;
11752 int group = 0;
11753
11754 /* Determine which group of bits to select. */
11755 switch (r_type)
11756 {
11757 case R_ARM_ALU_PC_G0_NC:
11758 case R_ARM_ALU_PC_G0:
11759 case R_ARM_ALU_SB_G0_NC:
11760 case R_ARM_ALU_SB_G0:
11761 group = 0;
11762 break;
11763
11764 case R_ARM_ALU_PC_G1_NC:
11765 case R_ARM_ALU_PC_G1:
11766 case R_ARM_ALU_SB_G1_NC:
11767 case R_ARM_ALU_SB_G1:
11768 group = 1;
11769 break;
11770
11771 case R_ARM_ALU_PC_G2:
11772 case R_ARM_ALU_SB_G2:
11773 group = 2;
11774 break;
11775
11776 default:
11777 abort ();
11778 }
11779
11780 /* If REL, extract the addend from the insn. If RELA, it will
11781 have already been fetched for us. */
11782 if (globals->use_rel)
11783 {
11784 int negative;
11785 bfd_vma constant = insn & 0xff;
11786 bfd_vma rotation = (insn & 0xf00) >> 8;
11787
11788 if (rotation == 0)
11789 signed_addend = constant;
11790 else
11791 {
11792 /* Compensate for the fact that in the instruction, the
11793 rotation is stored in multiples of 2 bits. */
11794 rotation *= 2;
11795
11796 /* Rotate "constant" right by "rotation" bits. */
11797 signed_addend = (constant >> rotation) |
11798 (constant << (8 * sizeof (bfd_vma) - rotation));
11799 }
11800
11801 /* Determine if the instruction is an ADD or a SUB.
11802 (For REL, this determines the sign of the addend.) */
11803 negative = identify_add_or_sub (insn);
11804 if (negative == 0)
11805 {
11806 _bfd_error_handler
11807 /* xgettext:c-format */
11808 (_("%pB(%pA+%#" PRIx64 "): Only ADD or SUB instructions "
11809 "are allowed for ALU group relocations"),
11810 input_bfd, input_section, (uint64_t) rel->r_offset);
11811 return bfd_reloc_overflow;
11812 }
11813
11814 signed_addend *= negative;
11815 }
11816
11817 /* Compute the value (X) to go in the place. */
11818 if (r_type == R_ARM_ALU_PC_G0_NC
11819 || r_type == R_ARM_ALU_PC_G1_NC
11820 || r_type == R_ARM_ALU_PC_G0
11821 || r_type == R_ARM_ALU_PC_G1
11822 || r_type == R_ARM_ALU_PC_G2)
11823 /* PC relative. */
11824 signed_value = value - pc + signed_addend;
11825 else
11826 /* Section base relative. */
11827 signed_value = value - sb + signed_addend;
11828
11829 /* If the target symbol is a Thumb function, then set the
11830 Thumb bit in the address. */
11831 if (branch_type == ST_BRANCH_TO_THUMB)
11832 signed_value |= 1;
11833
11834 /* Calculate the value of the relevant G_n, in encoded
11835 constant-with-rotation format. */
11836 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11837 group, &residual);
11838
11839 /* Check for overflow if required. */
11840 if ((r_type == R_ARM_ALU_PC_G0
11841 || r_type == R_ARM_ALU_PC_G1
11842 || r_type == R_ARM_ALU_PC_G2
11843 || r_type == R_ARM_ALU_SB_G0
11844 || r_type == R_ARM_ALU_SB_G1
11845 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11846 {
11847 _bfd_error_handler
11848 /* xgettext:c-format */
11849 (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
11850 "splitting %#" PRIx64 " for group relocation %s"),
11851 input_bfd, input_section, (uint64_t) rel->r_offset,
11852 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
11853 howto->name);
11854 return bfd_reloc_overflow;
11855 }
11856
11857 /* Mask out the value and the ADD/SUB part of the opcode; take care
11858 not to destroy the S bit. */
11859 insn &= 0xff1ff000;
11860
11861 /* Set the opcode according to whether the value to go in the
11862 place is negative. */
11863 if (signed_value < 0)
11864 insn |= 1 << 22;
11865 else
11866 insn |= 1 << 23;
11867
11868 /* Encode the offset. */
11869 insn |= g_n;
11870
11871 bfd_put_32 (input_bfd, insn, hit_data);
11872 }
11873 return bfd_reloc_ok;
11874
11875 case R_ARM_LDR_PC_G0:
11876 case R_ARM_LDR_PC_G1:
11877 case R_ARM_LDR_PC_G2:
11878 case R_ARM_LDR_SB_G0:
11879 case R_ARM_LDR_SB_G1:
11880 case R_ARM_LDR_SB_G2:
11881 {
11882 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11883 bfd_vma pc = input_section->output_section->vma
11884 + input_section->output_offset + rel->r_offset;
11885 /* sb is the origin of the *segment* containing the symbol. */
11886 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11887 bfd_vma residual;
11888 bfd_signed_vma signed_value;
11889 int group = 0;
11890
11891 /* Determine which groups of bits to calculate. */
11892 switch (r_type)
11893 {
11894 case R_ARM_LDR_PC_G0:
11895 case R_ARM_LDR_SB_G0:
11896 group = 0;
11897 break;
11898
11899 case R_ARM_LDR_PC_G1:
11900 case R_ARM_LDR_SB_G1:
11901 group = 1;
11902 break;
11903
11904 case R_ARM_LDR_PC_G2:
11905 case R_ARM_LDR_SB_G2:
11906 group = 2;
11907 break;
11908
11909 default:
11910 abort ();
11911 }
11912
11913 /* If REL, extract the addend from the insn. If RELA, it will
11914 have already been fetched for us. */
11915 if (globals->use_rel)
11916 {
11917 int negative = (insn & (1 << 23)) ? 1 : -1;
11918 signed_addend = negative * (insn & 0xfff);
11919 }
11920
11921 /* Compute the value (X) to go in the place. */
11922 if (r_type == R_ARM_LDR_PC_G0
11923 || r_type == R_ARM_LDR_PC_G1
11924 || r_type == R_ARM_LDR_PC_G2)
11925 /* PC relative. */
11926 signed_value = value - pc + signed_addend;
11927 else
11928 /* Section base relative. */
11929 signed_value = value - sb + signed_addend;
11930
11931 /* Calculate the value of the relevant G_{n-1} to obtain
11932 the residual at that stage. */
11933 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11934 group - 1, &residual);
11935
11936 /* Check for overflow. */
11937 if (residual >= 0x1000)
11938 {
11939 _bfd_error_handler
11940 /* xgettext:c-format */
11941 (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
11942 "splitting %#" PRIx64 " for group relocation %s"),
11943 input_bfd, input_section, (uint64_t) rel->r_offset,
11944 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
11945 howto->name);
11946 return bfd_reloc_overflow;
11947 }
11948
11949 /* Mask out the value and U bit. */
11950 insn &= 0xff7ff000;
11951
11952 /* Set the U bit if the value to go in the place is non-negative. */
11953 if (signed_value >= 0)
11954 insn |= 1 << 23;
11955
11956 /* Encode the offset. */
11957 insn |= residual;
11958
11959 bfd_put_32 (input_bfd, insn, hit_data);
11960 }
11961 return bfd_reloc_ok;
11962
11963 case R_ARM_LDRS_PC_G0:
11964 case R_ARM_LDRS_PC_G1:
11965 case R_ARM_LDRS_PC_G2:
11966 case R_ARM_LDRS_SB_G0:
11967 case R_ARM_LDRS_SB_G1:
11968 case R_ARM_LDRS_SB_G2:
11969 {
11970 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11971 bfd_vma pc = input_section->output_section->vma
11972 + input_section->output_offset + rel->r_offset;
11973 /* sb is the origin of the *segment* containing the symbol. */
11974 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11975 bfd_vma residual;
11976 bfd_signed_vma signed_value;
11977 int group = 0;
11978
11979 /* Determine which groups of bits to calculate. */
11980 switch (r_type)
11981 {
11982 case R_ARM_LDRS_PC_G0:
11983 case R_ARM_LDRS_SB_G0:
11984 group = 0;
11985 break;
11986
11987 case R_ARM_LDRS_PC_G1:
11988 case R_ARM_LDRS_SB_G1:
11989 group = 1;
11990 break;
11991
11992 case R_ARM_LDRS_PC_G2:
11993 case R_ARM_LDRS_SB_G2:
11994 group = 2;
11995 break;
11996
11997 default:
11998 abort ();
11999 }
12000
12001 /* If REL, extract the addend from the insn. If RELA, it will
12002 have already been fetched for us. */
12003 if (globals->use_rel)
12004 {
12005 int negative = (insn & (1 << 23)) ? 1 : -1;
12006 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12007 }
12008
12009 /* Compute the value (X) to go in the place. */
12010 if (r_type == R_ARM_LDRS_PC_G0
12011 || r_type == R_ARM_LDRS_PC_G1
12012 || r_type == R_ARM_LDRS_PC_G2)
12013 /* PC relative. */
12014 signed_value = value - pc + signed_addend;
12015 else
12016 /* Section base relative. */
12017 signed_value = value - sb + signed_addend;
12018
12019 /* Calculate the value of the relevant G_{n-1} to obtain
12020 the residual at that stage. */
12021 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12022 group - 1, &residual);
12023
12024 /* Check for overflow. */
12025 if (residual >= 0x100)
12026 {
12027 _bfd_error_handler
12028 /* xgettext:c-format */
12029 (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
12030 "splitting %#" PRIx64 " for group relocation %s"),
12031 input_bfd, input_section, (uint64_t) rel->r_offset,
12032 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12033 howto->name);
12034 return bfd_reloc_overflow;
12035 }
12036
12037 /* Mask out the value and U bit. */
12038 insn &= 0xff7ff0f0;
12039
12040 /* Set the U bit if the value to go in the place is non-negative. */
12041 if (signed_value >= 0)
12042 insn |= 1 << 23;
12043
12044 /* Encode the offset. */
12045 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12046
12047 bfd_put_32 (input_bfd, insn, hit_data);
12048 }
12049 return bfd_reloc_ok;
12050
12051 case R_ARM_LDC_PC_G0:
12052 case R_ARM_LDC_PC_G1:
12053 case R_ARM_LDC_PC_G2:
12054 case R_ARM_LDC_SB_G0:
12055 case R_ARM_LDC_SB_G1:
12056 case R_ARM_LDC_SB_G2:
12057 {
12058 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12059 bfd_vma pc = input_section->output_section->vma
12060 + input_section->output_offset + rel->r_offset;
12061 /* sb is the origin of the *segment* containing the symbol. */
12062 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12063 bfd_vma residual;
12064 bfd_signed_vma signed_value;
12065 int group = 0;
12066
12067 /* Determine which groups of bits to calculate. */
12068 switch (r_type)
12069 {
12070 case R_ARM_LDC_PC_G0:
12071 case R_ARM_LDC_SB_G0:
12072 group = 0;
12073 break;
12074
12075 case R_ARM_LDC_PC_G1:
12076 case R_ARM_LDC_SB_G1:
12077 group = 1;
12078 break;
12079
12080 case R_ARM_LDC_PC_G2:
12081 case R_ARM_LDC_SB_G2:
12082 group = 2;
12083 break;
12084
12085 default:
12086 abort ();
12087 }
12088
12089 /* If REL, extract the addend from the insn. If RELA, it will
12090 have already been fetched for us. */
12091 if (globals->use_rel)
12092 {
12093 int negative = (insn & (1 << 23)) ? 1 : -1;
12094 signed_addend = negative * ((insn & 0xff) << 2);
12095 }
12096
12097 /* Compute the value (X) to go in the place. */
12098 if (r_type == R_ARM_LDC_PC_G0
12099 || r_type == R_ARM_LDC_PC_G1
12100 || r_type == R_ARM_LDC_PC_G2)
12101 /* PC relative. */
12102 signed_value = value - pc + signed_addend;
12103 else
12104 /* Section base relative. */
12105 signed_value = value - sb + signed_addend;
12106
12107 /* Calculate the value of the relevant G_{n-1} to obtain
12108 the residual at that stage. */
12109 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12110 group - 1, &residual);
12111
12112 /* Check for overflow. (The absolute value to go in the place must be
12113 divisible by four and, after having been divided by four, must
12114 fit in eight bits.) */
12115 if ((residual & 0x3) != 0 || residual >= 0x400)
12116 {
12117 _bfd_error_handler
12118 /* xgettext:c-format */
12119 (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
12120 "splitting %#" PRIx64 " for group relocation %s"),
12121 input_bfd, input_section, (uint64_t) rel->r_offset,
12122 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12123 howto->name);
12124 return bfd_reloc_overflow;
12125 }
12126
12127 /* Mask out the value and U bit. */
12128 insn &= 0xff7fff00;
12129
12130 /* Set the U bit if the value to go in the place is non-negative. */
12131 if (signed_value >= 0)
12132 insn |= 1 << 23;
12133
12134 /* Encode the offset. */
12135 insn |= residual >> 2;
12136
12137 bfd_put_32 (input_bfd, insn, hit_data);
12138 }
12139 return bfd_reloc_ok;
12140
12141 case R_ARM_THM_ALU_ABS_G0_NC:
12142 case R_ARM_THM_ALU_ABS_G1_NC:
12143 case R_ARM_THM_ALU_ABS_G2_NC:
12144 case R_ARM_THM_ALU_ABS_G3_NC:
12145 {
12146 const int shift_array[4] = {0, 8, 16, 24};
12147 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12148 bfd_vma addr = value;
12149 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12150
12151 /* Compute address. */
12152 if (globals->use_rel)
12153 signed_addend = insn & 0xff;
12154 addr += signed_addend;
12155 if (branch_type == ST_BRANCH_TO_THUMB)
12156 addr |= 1;
12157 /* Clean imm8 insn. */
12158 insn &= 0xff00;
12159 /* And update with correct part of address. */
12160 insn |= (addr >> shift) & 0xff;
12161 /* Update insn. */
12162 bfd_put_16 (input_bfd, insn, hit_data);
12163 }
12164
12165 *unresolved_reloc_p = FALSE;
12166 return bfd_reloc_ok;
12167
12168 default:
12169 return bfd_reloc_notsupported;
12170 }
12171 }
12172
12173 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12174 static void
12175 arm_add_to_rel (bfd * abfd,
12176 bfd_byte * address,
12177 reloc_howto_type * howto,
12178 bfd_signed_vma increment)
12179 {
12180 bfd_signed_vma addend;
12181
12182 if (howto->type == R_ARM_THM_CALL
12183 || howto->type == R_ARM_THM_JUMP24)
12184 {
12185 int upper_insn, lower_insn;
12186 int upper, lower;
12187
12188 upper_insn = bfd_get_16 (abfd, address);
12189 lower_insn = bfd_get_16 (abfd, address + 2);
12190 upper = upper_insn & 0x7ff;
12191 lower = lower_insn & 0x7ff;
12192
12193 addend = (upper << 12) | (lower << 1);
12194 addend += increment;
12195 addend >>= 1;
12196
12197 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12198 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12199
12200 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12201 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12202 }
12203 else
12204 {
12205 bfd_vma contents;
12206
12207 contents = bfd_get_32 (abfd, address);
12208
12209 /* Get the (signed) value from the instruction. */
12210 addend = contents & howto->src_mask;
12211 if (addend & ((howto->src_mask + 1) >> 1))
12212 {
12213 bfd_signed_vma mask;
12214
12215 mask = -1;
12216 mask &= ~ howto->src_mask;
12217 addend |= mask;
12218 }
12219
12220 /* Add in the increment, (which is a byte value). */
12221 switch (howto->type)
12222 {
12223 default:
12224 addend += increment;
12225 break;
12226
12227 case R_ARM_PC24:
12228 case R_ARM_PLT32:
12229 case R_ARM_CALL:
12230 case R_ARM_JUMP24:
12231 addend <<= howto->size;
12232 addend += increment;
12233
12234 /* Should we check for overflow here ? */
12235
12236 /* Drop any undesired bits. */
12237 addend >>= howto->rightshift;
12238 break;
12239 }
12240
12241 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12242
12243 bfd_put_32 (abfd, contents, address);
12244 }
12245 }
12246
12247 #define IS_ARM_TLS_RELOC(R_TYPE) \
12248 ((R_TYPE) == R_ARM_TLS_GD32 \
12249 || (R_TYPE) == R_ARM_TLS_LDO32 \
12250 || (R_TYPE) == R_ARM_TLS_LDM32 \
12251 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12252 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12253 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12254 || (R_TYPE) == R_ARM_TLS_LE32 \
12255 || (R_TYPE) == R_ARM_TLS_IE32 \
12256 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12257
12258 /* Specific set of relocations for the gnu tls dialect. */
12259 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12260 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12261 || (R_TYPE) == R_ARM_TLS_CALL \
12262 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12263 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12264 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12265
12266 /* Relocate an ARM ELF section. */
12267
12268 static bfd_boolean
12269 elf32_arm_relocate_section (bfd * output_bfd,
12270 struct bfd_link_info * info,
12271 bfd * input_bfd,
12272 asection * input_section,
12273 bfd_byte * contents,
12274 Elf_Internal_Rela * relocs,
12275 Elf_Internal_Sym * local_syms,
12276 asection ** local_sections)
12277 {
12278 Elf_Internal_Shdr *symtab_hdr;
12279 struct elf_link_hash_entry **sym_hashes;
12280 Elf_Internal_Rela *rel;
12281 Elf_Internal_Rela *relend;
12282 const char *name;
12283 struct elf32_arm_link_hash_table * globals;
12284
12285 globals = elf32_arm_hash_table (info);
12286 if (globals == NULL)
12287 return FALSE;
12288
12289 symtab_hdr = & elf_symtab_hdr (input_bfd);
12290 sym_hashes = elf_sym_hashes (input_bfd);
12291
12292 rel = relocs;
12293 relend = relocs + input_section->reloc_count;
12294 for (; rel < relend; rel++)
12295 {
12296 int r_type;
12297 reloc_howto_type * howto;
12298 unsigned long r_symndx;
12299 Elf_Internal_Sym * sym;
12300 asection * sec;
12301 struct elf_link_hash_entry * h;
12302 bfd_vma relocation;
12303 bfd_reloc_status_type r;
12304 arelent bfd_reloc;
12305 char sym_type;
12306 bfd_boolean unresolved_reloc = FALSE;
12307 char *error_message = NULL;
12308
12309 r_symndx = ELF32_R_SYM (rel->r_info);
12310 r_type = ELF32_R_TYPE (rel->r_info);
12311 r_type = arm_real_reloc_type (globals, r_type);
12312
12313 if ( r_type == R_ARM_GNU_VTENTRY
12314 || r_type == R_ARM_GNU_VTINHERIT)
12315 continue;
12316
12317 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12318
12319 if (howto == NULL)
12320 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
12321
12322 h = NULL;
12323 sym = NULL;
12324 sec = NULL;
12325
12326 if (r_symndx < symtab_hdr->sh_info)
12327 {
12328 sym = local_syms + r_symndx;
12329 sym_type = ELF32_ST_TYPE (sym->st_info);
12330 sec = local_sections[r_symndx];
12331
12332 /* An object file might have a reference to a local
12333 undefined symbol. This is a daft object file, but we
12334 should at least do something about it. V4BX & NONE
12335 relocations do not use the symbol and are explicitly
12336 allowed to use the undefined symbol, so allow those.
12337 Likewise for relocations against STN_UNDEF. */
12338 if (r_type != R_ARM_V4BX
12339 && r_type != R_ARM_NONE
12340 && r_symndx != STN_UNDEF
12341 && bfd_is_und_section (sec)
12342 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12343 (*info->callbacks->undefined_symbol)
12344 (info, bfd_elf_string_from_elf_section
12345 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12346 input_bfd, input_section,
12347 rel->r_offset, TRUE);
12348
12349 if (globals->use_rel)
12350 {
12351 relocation = (sec->output_section->vma
12352 + sec->output_offset
12353 + sym->st_value);
12354 if (!bfd_link_relocatable (info)
12355 && (sec->flags & SEC_MERGE)
12356 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12357 {
12358 asection *msec;
12359 bfd_vma addend, value;
12360
12361 switch (r_type)
12362 {
12363 case R_ARM_MOVW_ABS_NC:
12364 case R_ARM_MOVT_ABS:
12365 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12366 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12367 addend = (addend ^ 0x8000) - 0x8000;
12368 break;
12369
12370 case R_ARM_THM_MOVW_ABS_NC:
12371 case R_ARM_THM_MOVT_ABS:
12372 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12373 << 16;
12374 value |= bfd_get_16 (input_bfd,
12375 contents + rel->r_offset + 2);
12376 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12377 | ((value & 0x04000000) >> 15);
12378 addend = (addend ^ 0x8000) - 0x8000;
12379 break;
12380
12381 default:
12382 if (howto->rightshift
12383 || (howto->src_mask & (howto->src_mask + 1)))
12384 {
12385 _bfd_error_handler
12386 /* xgettext:c-format */
12387 (_("%pB(%pA+%#" PRIx64 "): "
12388 "%s relocation against SEC_MERGE section"),
12389 input_bfd, input_section,
12390 (uint64_t) rel->r_offset, howto->name);
12391 return FALSE;
12392 }
12393
12394 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12395
12396 /* Get the (signed) value from the instruction. */
12397 addend = value & howto->src_mask;
12398 if (addend & ((howto->src_mask + 1) >> 1))
12399 {
12400 bfd_signed_vma mask;
12401
12402 mask = -1;
12403 mask &= ~ howto->src_mask;
12404 addend |= mask;
12405 }
12406 break;
12407 }
12408
12409 msec = sec;
12410 addend =
12411 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12412 - relocation;
12413 addend += msec->output_section->vma + msec->output_offset;
12414
12415 /* Cases here must match those in the preceding
12416 switch statement. */
12417 switch (r_type)
12418 {
12419 case R_ARM_MOVW_ABS_NC:
12420 case R_ARM_MOVT_ABS:
12421 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12422 | (addend & 0xfff);
12423 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12424 break;
12425
12426 case R_ARM_THM_MOVW_ABS_NC:
12427 case R_ARM_THM_MOVT_ABS:
12428 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12429 | (addend & 0xff) | ((addend & 0x0800) << 15);
12430 bfd_put_16 (input_bfd, value >> 16,
12431 contents + rel->r_offset);
12432 bfd_put_16 (input_bfd, value,
12433 contents + rel->r_offset + 2);
12434 break;
12435
12436 default:
12437 value = (value & ~ howto->dst_mask)
12438 | (addend & howto->dst_mask);
12439 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12440 break;
12441 }
12442 }
12443 }
12444 else
12445 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12446 }
12447 else
12448 {
12449 bfd_boolean warned, ignored;
12450
12451 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12452 r_symndx, symtab_hdr, sym_hashes,
12453 h, sec, relocation,
12454 unresolved_reloc, warned, ignored);
12455
12456 sym_type = h->type;
12457 }
12458
12459 if (sec != NULL && discarded_section (sec))
12460 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12461 rel, 1, relend, howto, 0, contents);
12462
12463 if (bfd_link_relocatable (info))
12464 {
12465 /* This is a relocatable link. We don't have to change
12466 anything, unless the reloc is against a section symbol,
12467 in which case we have to adjust according to where the
12468 section symbol winds up in the output section. */
12469 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12470 {
12471 if (globals->use_rel)
12472 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12473 howto, (bfd_signed_vma) sec->output_offset);
12474 else
12475 rel->r_addend += sec->output_offset;
12476 }
12477 continue;
12478 }
12479
12480 if (h != NULL)
12481 name = h->root.root.string;
12482 else
12483 {
12484 name = (bfd_elf_string_from_elf_section
12485 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12486 if (name == NULL || *name == '\0')
12487 name = bfd_section_name (input_bfd, sec);
12488 }
12489
12490 if (r_symndx != STN_UNDEF
12491 && r_type != R_ARM_NONE
12492 && (h == NULL
12493 || h->root.type == bfd_link_hash_defined
12494 || h->root.type == bfd_link_hash_defweak)
12495 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12496 {
12497 _bfd_error_handler
12498 ((sym_type == STT_TLS
12499 /* xgettext:c-format */
12500 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
12501 /* xgettext:c-format */
12502 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
12503 input_bfd,
12504 input_section,
12505 (uint64_t) rel->r_offset,
12506 howto->name,
12507 name);
12508 }
12509
12510 /* We call elf32_arm_final_link_relocate unless we're completely
12511 done, i.e., the relaxation produced the final output we want,
12512 and we won't let anybody mess with it. Also, we have to do
12513 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12514 both in relaxed and non-relaxed cases. */
12515 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12516 || (IS_ARM_TLS_GNU_RELOC (r_type)
12517 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12518 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12519 & GOT_TLS_GDESC)))
12520 {
12521 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12522 contents, rel, h == NULL);
12523 /* This may have been marked unresolved because it came from
12524 a shared library. But we've just dealt with that. */
12525 unresolved_reloc = 0;
12526 }
12527 else
12528 r = bfd_reloc_continue;
12529
12530 if (r == bfd_reloc_continue)
12531 {
12532 unsigned char branch_type =
12533 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12534 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12535
12536 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12537 input_section, contents, rel,
12538 relocation, info, sec, name,
12539 sym_type, branch_type, h,
12540 &unresolved_reloc,
12541 &error_message);
12542 }
12543
12544 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12545 because such sections are not SEC_ALLOC and thus ld.so will
12546 not process them. */
12547 if (unresolved_reloc
12548 && !((input_section->flags & SEC_DEBUGGING) != 0
12549 && h->def_dynamic)
12550 && _bfd_elf_section_offset (output_bfd, info, input_section,
12551 rel->r_offset) != (bfd_vma) -1)
12552 {
12553 _bfd_error_handler
12554 /* xgettext:c-format */
12555 (_("%pB(%pA+%#" PRIx64 "): "
12556 "unresolvable %s relocation against symbol `%s'"),
12557 input_bfd,
12558 input_section,
12559 (uint64_t) rel->r_offset,
12560 howto->name,
12561 h->root.root.string);
12562 return FALSE;
12563 }
12564
12565 if (r != bfd_reloc_ok)
12566 {
12567 switch (r)
12568 {
12569 case bfd_reloc_overflow:
12570 /* If the overflowing reloc was to an undefined symbol,
12571 we have already printed one error message and there
12572 is no point complaining again. */
12573 if (!h || h->root.type != bfd_link_hash_undefined)
12574 (*info->callbacks->reloc_overflow)
12575 (info, (h ? &h->root : NULL), name, howto->name,
12576 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12577 break;
12578
12579 case bfd_reloc_undefined:
12580 (*info->callbacks->undefined_symbol)
12581 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12582 break;
12583
12584 case bfd_reloc_outofrange:
12585 error_message = _("out of range");
12586 goto common_error;
12587
12588 case bfd_reloc_notsupported:
12589 error_message = _("unsupported relocation");
12590 goto common_error;
12591
12592 case bfd_reloc_dangerous:
12593 /* error_message should already be set. */
12594 goto common_error;
12595
12596 default:
12597 error_message = _("unknown error");
12598 /* Fall through. */
12599
12600 common_error:
12601 BFD_ASSERT (error_message != NULL);
12602 (*info->callbacks->reloc_dangerous)
12603 (info, error_message, input_bfd, input_section, rel->r_offset);
12604 break;
12605 }
12606 }
12607 }
12608
12609 return TRUE;
12610 }
12611
12612 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12613 adds the edit to the start of the list. (The list must be built in order of
12614 ascending TINDEX: the function's callers are primarily responsible for
12615 maintaining that condition). */
12616
12617 static void
12618 add_unwind_table_edit (arm_unwind_table_edit **head,
12619 arm_unwind_table_edit **tail,
12620 arm_unwind_edit_type type,
12621 asection *linked_section,
12622 unsigned int tindex)
12623 {
12624 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12625 xmalloc (sizeof (arm_unwind_table_edit));
12626
12627 new_edit->type = type;
12628 new_edit->linked_section = linked_section;
12629 new_edit->index = tindex;
12630
12631 if (tindex > 0)
12632 {
12633 new_edit->next = NULL;
12634
12635 if (*tail)
12636 (*tail)->next = new_edit;
12637
12638 (*tail) = new_edit;
12639
12640 if (!*head)
12641 (*head) = new_edit;
12642 }
12643 else
12644 {
12645 new_edit->next = *head;
12646
12647 if (!*tail)
12648 *tail = new_edit;
12649
12650 *head = new_edit;
12651 }
12652 }
12653
12654 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12655
12656 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12657 static void
12658 adjust_exidx_size(asection *exidx_sec, int adjust)
12659 {
12660 asection *out_sec;
12661
12662 if (!exidx_sec->rawsize)
12663 exidx_sec->rawsize = exidx_sec->size;
12664
12665 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12666 out_sec = exidx_sec->output_section;
12667 /* Adjust size of output section. */
12668 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12669 }
12670
12671 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12672 static void
12673 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12674 {
12675 struct _arm_elf_section_data *exidx_arm_data;
12676
12677 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12678 add_unwind_table_edit (
12679 &exidx_arm_data->u.exidx.unwind_edit_list,
12680 &exidx_arm_data->u.exidx.unwind_edit_tail,
12681 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12682
12683 exidx_arm_data->additional_reloc_count++;
12684
12685 adjust_exidx_size(exidx_sec, 8);
12686 }
12687
12688 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12689 made to those tables, such that:
12690
12691 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12692 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12693 codes which have been inlined into the index).
12694
12695 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12696
12697 The edits are applied when the tables are written
12698 (in elf32_arm_write_section). */
12699
12700 bfd_boolean
12701 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12702 unsigned int num_text_sections,
12703 struct bfd_link_info *info,
12704 bfd_boolean merge_exidx_entries)
12705 {
12706 bfd *inp;
12707 unsigned int last_second_word = 0, i;
12708 asection *last_exidx_sec = NULL;
12709 asection *last_text_sec = NULL;
12710 int last_unwind_type = -1;
12711
12712 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12713 text sections. */
12714 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12715 {
12716 asection *sec;
12717
12718 for (sec = inp->sections; sec != NULL; sec = sec->next)
12719 {
12720 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12721 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12722
12723 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12724 continue;
12725
12726 if (elf_sec->linked_to)
12727 {
12728 Elf_Internal_Shdr *linked_hdr
12729 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12730 struct _arm_elf_section_data *linked_sec_arm_data
12731 = get_arm_elf_section_data (linked_hdr->bfd_section);
12732
12733 if (linked_sec_arm_data == NULL)
12734 continue;
12735
12736 /* Link this .ARM.exidx section back from the text section it
12737 describes. */
12738 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12739 }
12740 }
12741 }
12742
12743 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12744 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12745 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12746
12747 for (i = 0; i < num_text_sections; i++)
12748 {
12749 asection *sec = text_section_order[i];
12750 asection *exidx_sec;
12751 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12752 struct _arm_elf_section_data *exidx_arm_data;
12753 bfd_byte *contents = NULL;
12754 int deleted_exidx_bytes = 0;
12755 bfd_vma j;
12756 arm_unwind_table_edit *unwind_edit_head = NULL;
12757 arm_unwind_table_edit *unwind_edit_tail = NULL;
12758 Elf_Internal_Shdr *hdr;
12759 bfd *ibfd;
12760
12761 if (arm_data == NULL)
12762 continue;
12763
12764 exidx_sec = arm_data->u.text.arm_exidx_sec;
12765 if (exidx_sec == NULL)
12766 {
12767 /* Section has no unwind data. */
12768 if (last_unwind_type == 0 || !last_exidx_sec)
12769 continue;
12770
12771 /* Ignore zero sized sections. */
12772 if (sec->size == 0)
12773 continue;
12774
12775 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12776 last_unwind_type = 0;
12777 continue;
12778 }
12779
12780 /* Skip /DISCARD/ sections. */
12781 if (bfd_is_abs_section (exidx_sec->output_section))
12782 continue;
12783
12784 hdr = &elf_section_data (exidx_sec)->this_hdr;
12785 if (hdr->sh_type != SHT_ARM_EXIDX)
12786 continue;
12787
12788 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12789 if (exidx_arm_data == NULL)
12790 continue;
12791
12792 ibfd = exidx_sec->owner;
12793
12794 if (hdr->contents != NULL)
12795 contents = hdr->contents;
12796 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12797 /* An error? */
12798 continue;
12799
12800 if (last_unwind_type > 0)
12801 {
12802 unsigned int first_word = bfd_get_32 (ibfd, contents);
12803 /* Add cantunwind if first unwind item does not match section
12804 start. */
12805 if (first_word != sec->vma)
12806 {
12807 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12808 last_unwind_type = 0;
12809 }
12810 }
12811
12812 for (j = 0; j < hdr->sh_size; j += 8)
12813 {
12814 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12815 int unwind_type;
12816 int elide = 0;
12817
12818 /* An EXIDX_CANTUNWIND entry. */
12819 if (second_word == 1)
12820 {
12821 if (last_unwind_type == 0)
12822 elide = 1;
12823 unwind_type = 0;
12824 }
12825 /* Inlined unwinding data. Merge if equal to previous. */
12826 else if ((second_word & 0x80000000) != 0)
12827 {
12828 if (merge_exidx_entries
12829 && last_second_word == second_word && last_unwind_type == 1)
12830 elide = 1;
12831 unwind_type = 1;
12832 last_second_word = second_word;
12833 }
12834 /* Normal table entry. In theory we could merge these too,
12835 but duplicate entries are likely to be much less common. */
12836 else
12837 unwind_type = 2;
12838
12839 if (elide && !bfd_link_relocatable (info))
12840 {
12841 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12842 DELETE_EXIDX_ENTRY, NULL, j / 8);
12843
12844 deleted_exidx_bytes += 8;
12845 }
12846
12847 last_unwind_type = unwind_type;
12848 }
12849
12850 /* Free contents if we allocated it ourselves. */
12851 if (contents != hdr->contents)
12852 free (contents);
12853
12854 /* Record edits to be applied later (in elf32_arm_write_section). */
12855 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12856 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12857
12858 if (deleted_exidx_bytes > 0)
12859 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12860
12861 last_exidx_sec = exidx_sec;
12862 last_text_sec = sec;
12863 }
12864
12865 /* Add terminating CANTUNWIND entry. */
12866 if (!bfd_link_relocatable (info) && last_exidx_sec
12867 && last_unwind_type != 0)
12868 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12869
12870 return TRUE;
12871 }
12872
12873 static bfd_boolean
12874 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12875 bfd *ibfd, const char *name)
12876 {
12877 asection *sec, *osec;
12878
12879 sec = bfd_get_linker_section (ibfd, name);
12880 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12881 return TRUE;
12882
12883 osec = sec->output_section;
12884 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12885 return TRUE;
12886
12887 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12888 sec->output_offset, sec->size))
12889 return FALSE;
12890
12891 return TRUE;
12892 }
12893
12894 static bfd_boolean
12895 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12896 {
12897 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12898 asection *sec, *osec;
12899
12900 if (globals == NULL)
12901 return FALSE;
12902
12903 /* Invoke the regular ELF backend linker to do all the work. */
12904 if (!bfd_elf_final_link (abfd, info))
12905 return FALSE;
12906
12907 /* Process stub sections (eg BE8 encoding, ...). */
12908 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12909 unsigned int i;
12910 for (i=0; i<htab->top_id; i++)
12911 {
12912 sec = htab->stub_group[i].stub_sec;
12913 /* Only process it once, in its link_sec slot. */
12914 if (sec && i == htab->stub_group[i].link_sec->id)
12915 {
12916 osec = sec->output_section;
12917 elf32_arm_write_section (abfd, info, sec, sec->contents);
12918 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12919 sec->output_offset, sec->size))
12920 return FALSE;
12921 }
12922 }
12923
12924 /* Write out any glue sections now that we have created all the
12925 stubs. */
12926 if (globals->bfd_of_glue_owner != NULL)
12927 {
12928 if (! elf32_arm_output_glue_section (info, abfd,
12929 globals->bfd_of_glue_owner,
12930 ARM2THUMB_GLUE_SECTION_NAME))
12931 return FALSE;
12932
12933 if (! elf32_arm_output_glue_section (info, abfd,
12934 globals->bfd_of_glue_owner,
12935 THUMB2ARM_GLUE_SECTION_NAME))
12936 return FALSE;
12937
12938 if (! elf32_arm_output_glue_section (info, abfd,
12939 globals->bfd_of_glue_owner,
12940 VFP11_ERRATUM_VENEER_SECTION_NAME))
12941 return FALSE;
12942
12943 if (! elf32_arm_output_glue_section (info, abfd,
12944 globals->bfd_of_glue_owner,
12945 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12946 return FALSE;
12947
12948 if (! elf32_arm_output_glue_section (info, abfd,
12949 globals->bfd_of_glue_owner,
12950 ARM_BX_GLUE_SECTION_NAME))
12951 return FALSE;
12952 }
12953
12954 return TRUE;
12955 }
12956
12957 /* Return a best guess for the machine number based on the attributes. */
12958
12959 static unsigned int
12960 bfd_arm_get_mach_from_attributes (bfd * abfd)
12961 {
12962 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12963
12964 switch (arch)
12965 {
12966 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12967 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12968 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12969
12970 case TAG_CPU_ARCH_V5TE:
12971 {
12972 char * name;
12973
12974 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12975 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12976
12977 if (name)
12978 {
12979 if (strcmp (name, "IWMMXT2") == 0)
12980 return bfd_mach_arm_iWMMXt2;
12981
12982 if (strcmp (name, "IWMMXT") == 0)
12983 return bfd_mach_arm_iWMMXt;
12984
12985 if (strcmp (name, "XSCALE") == 0)
12986 {
12987 int wmmx;
12988
12989 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12990 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12991 switch (wmmx)
12992 {
12993 case 1: return bfd_mach_arm_iWMMXt;
12994 case 2: return bfd_mach_arm_iWMMXt2;
12995 default: return bfd_mach_arm_XScale;
12996 }
12997 }
12998 }
12999
13000 return bfd_mach_arm_5TE;
13001 }
13002
13003 default:
13004 return bfd_mach_arm_unknown;
13005 }
13006 }
13007
13008 /* Set the right machine number. */
13009
13010 static bfd_boolean
13011 elf32_arm_object_p (bfd *abfd)
13012 {
13013 unsigned int mach;
13014
13015 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13016
13017 if (mach == bfd_mach_arm_unknown)
13018 {
13019 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13020 mach = bfd_mach_arm_ep9312;
13021 else
13022 mach = bfd_arm_get_mach_from_attributes (abfd);
13023 }
13024
13025 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13026 return TRUE;
13027 }
13028
13029 /* Function to keep ARM specific flags in the ELF header. */
13030
13031 static bfd_boolean
13032 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13033 {
13034 if (elf_flags_init (abfd)
13035 && elf_elfheader (abfd)->e_flags != flags)
13036 {
13037 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13038 {
13039 if (flags & EF_ARM_INTERWORK)
13040 _bfd_error_handler
13041 (_("Warning: Not setting interworking flag of %pB since it has already been specified as non-interworking"),
13042 abfd);
13043 else
13044 _bfd_error_handler
13045 (_("Warning: Clearing the interworking flag of %pB due to outside request"),
13046 abfd);
13047 }
13048 }
13049 else
13050 {
13051 elf_elfheader (abfd)->e_flags = flags;
13052 elf_flags_init (abfd) = TRUE;
13053 }
13054
13055 return TRUE;
13056 }
13057
13058 /* Copy backend specific data from one object module to another. */
13059
13060 static bfd_boolean
13061 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13062 {
13063 flagword in_flags;
13064 flagword out_flags;
13065
13066 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13067 return TRUE;
13068
13069 in_flags = elf_elfheader (ibfd)->e_flags;
13070 out_flags = elf_elfheader (obfd)->e_flags;
13071
13072 if (elf_flags_init (obfd)
13073 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13074 && in_flags != out_flags)
13075 {
13076 /* Cannot mix APCS26 and APCS32 code. */
13077 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13078 return FALSE;
13079
13080 /* Cannot mix float APCS and non-float APCS code. */
13081 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13082 return FALSE;
13083
13084 /* If the src and dest have different interworking flags
13085 then turn off the interworking bit. */
13086 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13087 {
13088 if (out_flags & EF_ARM_INTERWORK)
13089 _bfd_error_handler
13090 (_("Warning: Clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13091 obfd, ibfd);
13092
13093 in_flags &= ~EF_ARM_INTERWORK;
13094 }
13095
13096 /* Likewise for PIC, though don't warn for this case. */
13097 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13098 in_flags &= ~EF_ARM_PIC;
13099 }
13100
13101 elf_elfheader (obfd)->e_flags = in_flags;
13102 elf_flags_init (obfd) = TRUE;
13103
13104 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13105 }
13106
13107 /* Values for Tag_ABI_PCS_R9_use. */
13108 enum
13109 {
13110 AEABI_R9_V6,
13111 AEABI_R9_SB,
13112 AEABI_R9_TLS,
13113 AEABI_R9_unused
13114 };
13115
13116 /* Values for Tag_ABI_PCS_RW_data. */
13117 enum
13118 {
13119 AEABI_PCS_RW_data_absolute,
13120 AEABI_PCS_RW_data_PCrel,
13121 AEABI_PCS_RW_data_SBrel,
13122 AEABI_PCS_RW_data_unused
13123 };
13124
13125 /* Values for Tag_ABI_enum_size. */
13126 enum
13127 {
13128 AEABI_enum_unused,
13129 AEABI_enum_short,
13130 AEABI_enum_wide,
13131 AEABI_enum_forced_wide
13132 };
13133
13134 /* Determine whether an object attribute tag takes an integer, a
13135 string or both. */
13136
13137 static int
13138 elf32_arm_obj_attrs_arg_type (int tag)
13139 {
13140 if (tag == Tag_compatibility)
13141 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13142 else if (tag == Tag_nodefaults)
13143 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13144 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13145 return ATTR_TYPE_FLAG_STR_VAL;
13146 else if (tag < 32)
13147 return ATTR_TYPE_FLAG_INT_VAL;
13148 else
13149 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13150 }
13151
13152 /* The ABI defines that Tag_conformance should be emitted first, and that
13153 Tag_nodefaults should be second (if either is defined). This sets those
13154 two positions, and bumps up the position of all the remaining tags to
13155 compensate. */
13156 static int
13157 elf32_arm_obj_attrs_order (int num)
13158 {
13159 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13160 return Tag_conformance;
13161 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13162 return Tag_nodefaults;
13163 if ((num - 2) < Tag_nodefaults)
13164 return num - 2;
13165 if ((num - 1) < Tag_conformance)
13166 return num - 1;
13167 return num;
13168 }
13169
13170 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13171 static bfd_boolean
13172 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13173 {
13174 if ((tag & 127) < 64)
13175 {
13176 _bfd_error_handler
13177 (_("%pB: Unknown mandatory EABI object attribute %d"),
13178 abfd, tag);
13179 bfd_set_error (bfd_error_bad_value);
13180 return FALSE;
13181 }
13182 else
13183 {
13184 _bfd_error_handler
13185 (_("Warning: %pB: Unknown EABI object attribute %d"),
13186 abfd, tag);
13187 return TRUE;
13188 }
13189 }
13190
13191 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13192 Returns -1 if no architecture could be read. */
13193
13194 static int
13195 get_secondary_compatible_arch (bfd *abfd)
13196 {
13197 obj_attribute *attr =
13198 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13199
13200 /* Note: the tag and its argument below are uleb128 values, though
13201 currently-defined values fit in one byte for each. */
13202 if (attr->s
13203 && attr->s[0] == Tag_CPU_arch
13204 && (attr->s[1] & 128) != 128
13205 && attr->s[2] == 0)
13206 return attr->s[1];
13207
13208 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13209 return -1;
13210 }
13211
13212 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13213 The tag is removed if ARCH is -1. */
13214
13215 static void
13216 set_secondary_compatible_arch (bfd *abfd, int arch)
13217 {
13218 obj_attribute *attr =
13219 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13220
13221 if (arch == -1)
13222 {
13223 attr->s = NULL;
13224 return;
13225 }
13226
13227 /* Note: the tag and its argument below are uleb128 values, though
13228 currently-defined values fit in one byte for each. */
13229 if (!attr->s)
13230 attr->s = (char *) bfd_alloc (abfd, 3);
13231 attr->s[0] = Tag_CPU_arch;
13232 attr->s[1] = arch;
13233 attr->s[2] = '\0';
13234 }
13235
13236 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13237 into account. */
13238
13239 static int
13240 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13241 int newtag, int secondary_compat)
13242 {
13243 #define T(X) TAG_CPU_ARCH_##X
13244 int tagl, tagh, result;
13245 const int v6t2[] =
13246 {
13247 T(V6T2), /* PRE_V4. */
13248 T(V6T2), /* V4. */
13249 T(V6T2), /* V4T. */
13250 T(V6T2), /* V5T. */
13251 T(V6T2), /* V5TE. */
13252 T(V6T2), /* V5TEJ. */
13253 T(V6T2), /* V6. */
13254 T(V7), /* V6KZ. */
13255 T(V6T2) /* V6T2. */
13256 };
13257 const int v6k[] =
13258 {
13259 T(V6K), /* PRE_V4. */
13260 T(V6K), /* V4. */
13261 T(V6K), /* V4T. */
13262 T(V6K), /* V5T. */
13263 T(V6K), /* V5TE. */
13264 T(V6K), /* V5TEJ. */
13265 T(V6K), /* V6. */
13266 T(V6KZ), /* V6KZ. */
13267 T(V7), /* V6T2. */
13268 T(V6K) /* V6K. */
13269 };
13270 const int v7[] =
13271 {
13272 T(V7), /* PRE_V4. */
13273 T(V7), /* V4. */
13274 T(V7), /* V4T. */
13275 T(V7), /* V5T. */
13276 T(V7), /* V5TE. */
13277 T(V7), /* V5TEJ. */
13278 T(V7), /* V6. */
13279 T(V7), /* V6KZ. */
13280 T(V7), /* V6T2. */
13281 T(V7), /* V6K. */
13282 T(V7) /* V7. */
13283 };
13284 const int v6_m[] =
13285 {
13286 -1, /* PRE_V4. */
13287 -1, /* V4. */
13288 T(V6K), /* V4T. */
13289 T(V6K), /* V5T. */
13290 T(V6K), /* V5TE. */
13291 T(V6K), /* V5TEJ. */
13292 T(V6K), /* V6. */
13293 T(V6KZ), /* V6KZ. */
13294 T(V7), /* V6T2. */
13295 T(V6K), /* V6K. */
13296 T(V7), /* V7. */
13297 T(V6_M) /* V6_M. */
13298 };
13299 const int v6s_m[] =
13300 {
13301 -1, /* PRE_V4. */
13302 -1, /* V4. */
13303 T(V6K), /* V4T. */
13304 T(V6K), /* V5T. */
13305 T(V6K), /* V5TE. */
13306 T(V6K), /* V5TEJ. */
13307 T(V6K), /* V6. */
13308 T(V6KZ), /* V6KZ. */
13309 T(V7), /* V6T2. */
13310 T(V6K), /* V6K. */
13311 T(V7), /* V7. */
13312 T(V6S_M), /* V6_M. */
13313 T(V6S_M) /* V6S_M. */
13314 };
13315 const int v7e_m[] =
13316 {
13317 -1, /* PRE_V4. */
13318 -1, /* V4. */
13319 T(V7E_M), /* V4T. */
13320 T(V7E_M), /* V5T. */
13321 T(V7E_M), /* V5TE. */
13322 T(V7E_M), /* V5TEJ. */
13323 T(V7E_M), /* V6. */
13324 T(V7E_M), /* V6KZ. */
13325 T(V7E_M), /* V6T2. */
13326 T(V7E_M), /* V6K. */
13327 T(V7E_M), /* V7. */
13328 T(V7E_M), /* V6_M. */
13329 T(V7E_M), /* V6S_M. */
13330 T(V7E_M) /* V7E_M. */
13331 };
13332 const int v8[] =
13333 {
13334 T(V8), /* PRE_V4. */
13335 T(V8), /* V4. */
13336 T(V8), /* V4T. */
13337 T(V8), /* V5T. */
13338 T(V8), /* V5TE. */
13339 T(V8), /* V5TEJ. */
13340 T(V8), /* V6. */
13341 T(V8), /* V6KZ. */
13342 T(V8), /* V6T2. */
13343 T(V8), /* V6K. */
13344 T(V8), /* V7. */
13345 T(V8), /* V6_M. */
13346 T(V8), /* V6S_M. */
13347 T(V8), /* V7E_M. */
13348 T(V8) /* V8. */
13349 };
13350 const int v8r[] =
13351 {
13352 T(V8R), /* PRE_V4. */
13353 T(V8R), /* V4. */
13354 T(V8R), /* V4T. */
13355 T(V8R), /* V5T. */
13356 T(V8R), /* V5TE. */
13357 T(V8R), /* V5TEJ. */
13358 T(V8R), /* V6. */
13359 T(V8R), /* V6KZ. */
13360 T(V8R), /* V6T2. */
13361 T(V8R), /* V6K. */
13362 T(V8R), /* V7. */
13363 T(V8R), /* V6_M. */
13364 T(V8R), /* V6S_M. */
13365 T(V8R), /* V7E_M. */
13366 T(V8), /* V8. */
13367 T(V8R), /* V8R. */
13368 };
13369 const int v8m_baseline[] =
13370 {
13371 -1, /* PRE_V4. */
13372 -1, /* V4. */
13373 -1, /* V4T. */
13374 -1, /* V5T. */
13375 -1, /* V5TE. */
13376 -1, /* V5TEJ. */
13377 -1, /* V6. */
13378 -1, /* V6KZ. */
13379 -1, /* V6T2. */
13380 -1, /* V6K. */
13381 -1, /* V7. */
13382 T(V8M_BASE), /* V6_M. */
13383 T(V8M_BASE), /* V6S_M. */
13384 -1, /* V7E_M. */
13385 -1, /* V8. */
13386 -1, /* V8R. */
13387 T(V8M_BASE) /* V8-M BASELINE. */
13388 };
13389 const int v8m_mainline[] =
13390 {
13391 -1, /* PRE_V4. */
13392 -1, /* V4. */
13393 -1, /* V4T. */
13394 -1, /* V5T. */
13395 -1, /* V5TE. */
13396 -1, /* V5TEJ. */
13397 -1, /* V6. */
13398 -1, /* V6KZ. */
13399 -1, /* V6T2. */
13400 -1, /* V6K. */
13401 T(V8M_MAIN), /* V7. */
13402 T(V8M_MAIN), /* V6_M. */
13403 T(V8M_MAIN), /* V6S_M. */
13404 T(V8M_MAIN), /* V7E_M. */
13405 -1, /* V8. */
13406 -1, /* V8R. */
13407 T(V8M_MAIN), /* V8-M BASELINE. */
13408 T(V8M_MAIN) /* V8-M MAINLINE. */
13409 };
13410 const int v4t_plus_v6_m[] =
13411 {
13412 -1, /* PRE_V4. */
13413 -1, /* V4. */
13414 T(V4T), /* V4T. */
13415 T(V5T), /* V5T. */
13416 T(V5TE), /* V5TE. */
13417 T(V5TEJ), /* V5TEJ. */
13418 T(V6), /* V6. */
13419 T(V6KZ), /* V6KZ. */
13420 T(V6T2), /* V6T2. */
13421 T(V6K), /* V6K. */
13422 T(V7), /* V7. */
13423 T(V6_M), /* V6_M. */
13424 T(V6S_M), /* V6S_M. */
13425 T(V7E_M), /* V7E_M. */
13426 T(V8), /* V8. */
13427 -1, /* V8R. */
13428 T(V8M_BASE), /* V8-M BASELINE. */
13429 T(V8M_MAIN), /* V8-M MAINLINE. */
13430 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13431 };
13432 const int *comb[] =
13433 {
13434 v6t2,
13435 v6k,
13436 v7,
13437 v6_m,
13438 v6s_m,
13439 v7e_m,
13440 v8,
13441 v8r,
13442 v8m_baseline,
13443 v8m_mainline,
13444 /* Pseudo-architecture. */
13445 v4t_plus_v6_m
13446 };
13447
13448 /* Check we've not got a higher architecture than we know about. */
13449
13450 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13451 {
13452 _bfd_error_handler (_("error: %pB: Unknown CPU architecture"), ibfd);
13453 return -1;
13454 }
13455
13456 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13457
13458 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13459 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13460 oldtag = T(V4T_PLUS_V6_M);
13461
13462 /* And override the new tag if we have a Tag_also_compatible_with on the
13463 input. */
13464
13465 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13466 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13467 newtag = T(V4T_PLUS_V6_M);
13468
13469 tagl = (oldtag < newtag) ? oldtag : newtag;
13470 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13471
13472 /* Architectures before V6KZ add features monotonically. */
13473 if (tagh <= TAG_CPU_ARCH_V6KZ)
13474 return result;
13475
13476 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13477
13478 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13479 as the canonical version. */
13480 if (result == T(V4T_PLUS_V6_M))
13481 {
13482 result = T(V4T);
13483 *secondary_compat_out = T(V6_M);
13484 }
13485 else
13486 *secondary_compat_out = -1;
13487
13488 if (result == -1)
13489 {
13490 _bfd_error_handler (_("error: %pB: Conflicting CPU architectures %d/%d"),
13491 ibfd, oldtag, newtag);
13492 return -1;
13493 }
13494
13495 return result;
13496 #undef T
13497 }
13498
13499 /* Query attributes object to see if integer divide instructions may be
13500 present in an object. */
13501 static bfd_boolean
13502 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13503 {
13504 int arch = attr[Tag_CPU_arch].i;
13505 int profile = attr[Tag_CPU_arch_profile].i;
13506
13507 switch (attr[Tag_DIV_use].i)
13508 {
13509 case 0:
13510 /* Integer divide allowed if instruction contained in archetecture. */
13511 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13512 return TRUE;
13513 else if (arch >= TAG_CPU_ARCH_V7E_M)
13514 return TRUE;
13515 else
13516 return FALSE;
13517
13518 case 1:
13519 /* Integer divide explicitly prohibited. */
13520 return FALSE;
13521
13522 default:
13523 /* Unrecognised case - treat as allowing divide everywhere. */
13524 case 2:
13525 /* Integer divide allowed in ARM state. */
13526 return TRUE;
13527 }
13528 }
13529
13530 /* Query attributes object to see if integer divide instructions are
13531 forbidden to be in the object. This is not the inverse of
13532 elf32_arm_attributes_accept_div. */
13533 static bfd_boolean
13534 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13535 {
13536 return attr[Tag_DIV_use].i == 1;
13537 }
13538
13539 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13540 are conflicting attributes. */
13541
13542 static bfd_boolean
13543 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13544 {
13545 bfd *obfd = info->output_bfd;
13546 obj_attribute *in_attr;
13547 obj_attribute *out_attr;
13548 /* Some tags have 0 = don't care, 1 = strong requirement,
13549 2 = weak requirement. */
13550 static const int order_021[3] = {0, 2, 1};
13551 int i;
13552 bfd_boolean result = TRUE;
13553 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13554
13555 /* Skip the linker stubs file. This preserves previous behavior
13556 of accepting unknown attributes in the first input file - but
13557 is that a bug? */
13558 if (ibfd->flags & BFD_LINKER_CREATED)
13559 return TRUE;
13560
13561 /* Skip any input that hasn't attribute section.
13562 This enables to link object files without attribute section with
13563 any others. */
13564 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13565 return TRUE;
13566
13567 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13568 {
13569 /* This is the first object. Copy the attributes. */
13570 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13571
13572 out_attr = elf_known_obj_attributes_proc (obfd);
13573
13574 /* Use the Tag_null value to indicate the attributes have been
13575 initialized. */
13576 out_attr[0].i = 1;
13577
13578 /* We do not output objects with Tag_MPextension_use_legacy - we move
13579 the attribute's value to Tag_MPextension_use. */
13580 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13581 {
13582 if (out_attr[Tag_MPextension_use].i != 0
13583 && out_attr[Tag_MPextension_use_legacy].i
13584 != out_attr[Tag_MPextension_use].i)
13585 {
13586 _bfd_error_handler
13587 (_("Error: %pB has both the current and legacy "
13588 "Tag_MPextension_use attributes"), ibfd);
13589 result = FALSE;
13590 }
13591
13592 out_attr[Tag_MPextension_use] =
13593 out_attr[Tag_MPextension_use_legacy];
13594 out_attr[Tag_MPextension_use_legacy].type = 0;
13595 out_attr[Tag_MPextension_use_legacy].i = 0;
13596 }
13597
13598 return result;
13599 }
13600
13601 in_attr = elf_known_obj_attributes_proc (ibfd);
13602 out_attr = elf_known_obj_attributes_proc (obfd);
13603 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13604 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13605 {
13606 /* Ignore mismatches if the object doesn't use floating point or is
13607 floating point ABI independent. */
13608 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13609 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13610 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13611 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13612 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13613 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13614 {
13615 _bfd_error_handler
13616 (_("error: %pB uses VFP register arguments, %pB does not"),
13617 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13618 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13619 result = FALSE;
13620 }
13621 }
13622
13623 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13624 {
13625 /* Merge this attribute with existing attributes. */
13626 switch (i)
13627 {
13628 case Tag_CPU_raw_name:
13629 case Tag_CPU_name:
13630 /* These are merged after Tag_CPU_arch. */
13631 break;
13632
13633 case Tag_ABI_optimization_goals:
13634 case Tag_ABI_FP_optimization_goals:
13635 /* Use the first value seen. */
13636 break;
13637
13638 case Tag_CPU_arch:
13639 {
13640 int secondary_compat = -1, secondary_compat_out = -1;
13641 unsigned int saved_out_attr = out_attr[i].i;
13642 int arch_attr;
13643 static const char *name_table[] =
13644 {
13645 /* These aren't real CPU names, but we can't guess
13646 that from the architecture version alone. */
13647 "Pre v4",
13648 "ARM v4",
13649 "ARM v4T",
13650 "ARM v5T",
13651 "ARM v5TE",
13652 "ARM v5TEJ",
13653 "ARM v6",
13654 "ARM v6KZ",
13655 "ARM v6T2",
13656 "ARM v6K",
13657 "ARM v7",
13658 "ARM v6-M",
13659 "ARM v6S-M",
13660 "ARM v8",
13661 "",
13662 "ARM v8-M.baseline",
13663 "ARM v8-M.mainline",
13664 };
13665
13666 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13667 secondary_compat = get_secondary_compatible_arch (ibfd);
13668 secondary_compat_out = get_secondary_compatible_arch (obfd);
13669 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13670 &secondary_compat_out,
13671 in_attr[i].i,
13672 secondary_compat);
13673
13674 /* Return with error if failed to merge. */
13675 if (arch_attr == -1)
13676 return FALSE;
13677
13678 out_attr[i].i = arch_attr;
13679
13680 set_secondary_compatible_arch (obfd, secondary_compat_out);
13681
13682 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13683 if (out_attr[i].i == saved_out_attr)
13684 ; /* Leave the names alone. */
13685 else if (out_attr[i].i == in_attr[i].i)
13686 {
13687 /* The output architecture has been changed to match the
13688 input architecture. Use the input names. */
13689 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13690 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13691 : NULL;
13692 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13693 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13694 : NULL;
13695 }
13696 else
13697 {
13698 out_attr[Tag_CPU_name].s = NULL;
13699 out_attr[Tag_CPU_raw_name].s = NULL;
13700 }
13701
13702 /* If we still don't have a value for Tag_CPU_name,
13703 make one up now. Tag_CPU_raw_name remains blank. */
13704 if (out_attr[Tag_CPU_name].s == NULL
13705 && out_attr[i].i < ARRAY_SIZE (name_table))
13706 out_attr[Tag_CPU_name].s =
13707 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13708 }
13709 break;
13710
13711 case Tag_ARM_ISA_use:
13712 case Tag_THUMB_ISA_use:
13713 case Tag_WMMX_arch:
13714 case Tag_Advanced_SIMD_arch:
13715 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13716 case Tag_ABI_FP_rounding:
13717 case Tag_ABI_FP_exceptions:
13718 case Tag_ABI_FP_user_exceptions:
13719 case Tag_ABI_FP_number_model:
13720 case Tag_FP_HP_extension:
13721 case Tag_CPU_unaligned_access:
13722 case Tag_T2EE_use:
13723 case Tag_MPextension_use:
13724 /* Use the largest value specified. */
13725 if (in_attr[i].i > out_attr[i].i)
13726 out_attr[i].i = in_attr[i].i;
13727 break;
13728
13729 case Tag_ABI_align_preserved:
13730 case Tag_ABI_PCS_RO_data:
13731 /* Use the smallest value specified. */
13732 if (in_attr[i].i < out_attr[i].i)
13733 out_attr[i].i = in_attr[i].i;
13734 break;
13735
13736 case Tag_ABI_align_needed:
13737 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13738 && (in_attr[Tag_ABI_align_preserved].i == 0
13739 || out_attr[Tag_ABI_align_preserved].i == 0))
13740 {
13741 /* This error message should be enabled once all non-conformant
13742 binaries in the toolchain have had the attributes set
13743 properly.
13744 _bfd_error_handler
13745 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
13746 obfd, ibfd);
13747 result = FALSE; */
13748 }
13749 /* Fall through. */
13750 case Tag_ABI_FP_denormal:
13751 case Tag_ABI_PCS_GOT_use:
13752 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13753 value if greater than 2 (for future-proofing). */
13754 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13755 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13756 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13757 out_attr[i].i = in_attr[i].i;
13758 break;
13759
13760 case Tag_Virtualization_use:
13761 /* The virtualization tag effectively stores two bits of
13762 information: the intended use of TrustZone (in bit 0), and the
13763 intended use of Virtualization (in bit 1). */
13764 if (out_attr[i].i == 0)
13765 out_attr[i].i = in_attr[i].i;
13766 else if (in_attr[i].i != 0
13767 && in_attr[i].i != out_attr[i].i)
13768 {
13769 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13770 out_attr[i].i = 3;
13771 else
13772 {
13773 _bfd_error_handler
13774 (_("error: %pB: unable to merge virtualization attributes "
13775 "with %pB"),
13776 obfd, ibfd);
13777 result = FALSE;
13778 }
13779 }
13780 break;
13781
13782 case Tag_CPU_arch_profile:
13783 if (out_attr[i].i != in_attr[i].i)
13784 {
13785 /* 0 will merge with anything.
13786 'A' and 'S' merge to 'A'.
13787 'R' and 'S' merge to 'R'.
13788 'M' and 'A|R|S' is an error. */
13789 if (out_attr[i].i == 0
13790 || (out_attr[i].i == 'S'
13791 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13792 out_attr[i].i = in_attr[i].i;
13793 else if (in_attr[i].i == 0
13794 || (in_attr[i].i == 'S'
13795 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13796 ; /* Do nothing. */
13797 else
13798 {
13799 _bfd_error_handler
13800 (_("error: %pB: Conflicting architecture profiles %c/%c"),
13801 ibfd,
13802 in_attr[i].i ? in_attr[i].i : '0',
13803 out_attr[i].i ? out_attr[i].i : '0');
13804 result = FALSE;
13805 }
13806 }
13807 break;
13808
13809 case Tag_DSP_extension:
13810 /* No need to change output value if any of:
13811 - pre (<=) ARMv5T input architecture (do not have DSP)
13812 - M input profile not ARMv7E-M and do not have DSP. */
13813 if (in_attr[Tag_CPU_arch].i <= 3
13814 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13815 && in_attr[Tag_CPU_arch].i != 13
13816 && in_attr[i].i == 0))
13817 ; /* Do nothing. */
13818 /* Output value should be 0 if DSP part of architecture, ie.
13819 - post (>=) ARMv5te architecture output
13820 - A, R or S profile output or ARMv7E-M output architecture. */
13821 else if (out_attr[Tag_CPU_arch].i >= 4
13822 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13823 || out_attr[Tag_CPU_arch_profile].i == 'R'
13824 || out_attr[Tag_CPU_arch_profile].i == 'S'
13825 || out_attr[Tag_CPU_arch].i == 13))
13826 out_attr[i].i = 0;
13827 /* Otherwise, DSP instructions are added and not part of output
13828 architecture. */
13829 else
13830 out_attr[i].i = 1;
13831 break;
13832
13833 case Tag_FP_arch:
13834 {
13835 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13836 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13837 when it's 0. It might mean absence of FP hardware if
13838 Tag_FP_arch is zero. */
13839
13840 #define VFP_VERSION_COUNT 9
13841 static const struct
13842 {
13843 int ver;
13844 int regs;
13845 } vfp_versions[VFP_VERSION_COUNT] =
13846 {
13847 {0, 0},
13848 {1, 16},
13849 {2, 16},
13850 {3, 32},
13851 {3, 16},
13852 {4, 32},
13853 {4, 16},
13854 {8, 32},
13855 {8, 16}
13856 };
13857 int ver;
13858 int regs;
13859 int newval;
13860
13861 /* If the output has no requirement about FP hardware,
13862 follow the requirement of the input. */
13863 if (out_attr[i].i == 0)
13864 {
13865 /* This assert is still reasonable, we shouldn't
13866 produce the suspicious build attribute
13867 combination (See below for in_attr). */
13868 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13869 out_attr[i].i = in_attr[i].i;
13870 out_attr[Tag_ABI_HardFP_use].i
13871 = in_attr[Tag_ABI_HardFP_use].i;
13872 break;
13873 }
13874 /* If the input has no requirement about FP hardware, do
13875 nothing. */
13876 else if (in_attr[i].i == 0)
13877 {
13878 /* We used to assert that Tag_ABI_HardFP_use was
13879 zero here, but we should never assert when
13880 consuming an object file that has suspicious
13881 build attributes. The single precision variant
13882 of 'no FP architecture' is still 'no FP
13883 architecture', so we just ignore the tag in this
13884 case. */
13885 break;
13886 }
13887
13888 /* Both the input and the output have nonzero Tag_FP_arch.
13889 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13890
13891 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13892 do nothing. */
13893 if (in_attr[Tag_ABI_HardFP_use].i == 0
13894 && out_attr[Tag_ABI_HardFP_use].i == 0)
13895 ;
13896 /* If the input and the output have different Tag_ABI_HardFP_use,
13897 the combination of them is 0 (implied by Tag_FP_arch). */
13898 else if (in_attr[Tag_ABI_HardFP_use].i
13899 != out_attr[Tag_ABI_HardFP_use].i)
13900 out_attr[Tag_ABI_HardFP_use].i = 0;
13901
13902 /* Now we can handle Tag_FP_arch. */
13903
13904 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13905 pick the biggest. */
13906 if (in_attr[i].i >= VFP_VERSION_COUNT
13907 && in_attr[i].i > out_attr[i].i)
13908 {
13909 out_attr[i] = in_attr[i];
13910 break;
13911 }
13912 /* The output uses the superset of input features
13913 (ISA version) and registers. */
13914 ver = vfp_versions[in_attr[i].i].ver;
13915 if (ver < vfp_versions[out_attr[i].i].ver)
13916 ver = vfp_versions[out_attr[i].i].ver;
13917 regs = vfp_versions[in_attr[i].i].regs;
13918 if (regs < vfp_versions[out_attr[i].i].regs)
13919 regs = vfp_versions[out_attr[i].i].regs;
13920 /* This assumes all possible supersets are also a valid
13921 options. */
13922 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13923 {
13924 if (regs == vfp_versions[newval].regs
13925 && ver == vfp_versions[newval].ver)
13926 break;
13927 }
13928 out_attr[i].i = newval;
13929 }
13930 break;
13931 case Tag_PCS_config:
13932 if (out_attr[i].i == 0)
13933 out_attr[i].i = in_attr[i].i;
13934 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13935 {
13936 /* It's sometimes ok to mix different configs, so this is only
13937 a warning. */
13938 _bfd_error_handler
13939 (_("Warning: %pB: Conflicting platform configuration"), ibfd);
13940 }
13941 break;
13942 case Tag_ABI_PCS_R9_use:
13943 if (in_attr[i].i != out_attr[i].i
13944 && out_attr[i].i != AEABI_R9_unused
13945 && in_attr[i].i != AEABI_R9_unused)
13946 {
13947 _bfd_error_handler
13948 (_("error: %pB: Conflicting use of R9"), ibfd);
13949 result = FALSE;
13950 }
13951 if (out_attr[i].i == AEABI_R9_unused)
13952 out_attr[i].i = in_attr[i].i;
13953 break;
13954 case Tag_ABI_PCS_RW_data:
13955 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13956 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13957 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13958 {
13959 _bfd_error_handler
13960 (_("error: %pB: SB relative addressing conflicts with use of R9"),
13961 ibfd);
13962 result = FALSE;
13963 }
13964 /* Use the smallest value specified. */
13965 if (in_attr[i].i < out_attr[i].i)
13966 out_attr[i].i = in_attr[i].i;
13967 break;
13968 case Tag_ABI_PCS_wchar_t:
13969 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13970 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13971 {
13972 _bfd_error_handler
13973 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13974 ibfd, in_attr[i].i, out_attr[i].i);
13975 }
13976 else if (in_attr[i].i && !out_attr[i].i)
13977 out_attr[i].i = in_attr[i].i;
13978 break;
13979 case Tag_ABI_enum_size:
13980 if (in_attr[i].i != AEABI_enum_unused)
13981 {
13982 if (out_attr[i].i == AEABI_enum_unused
13983 || out_attr[i].i == AEABI_enum_forced_wide)
13984 {
13985 /* The existing object is compatible with anything.
13986 Use whatever requirements the new object has. */
13987 out_attr[i].i = in_attr[i].i;
13988 }
13989 else if (in_attr[i].i != AEABI_enum_forced_wide
13990 && out_attr[i].i != in_attr[i].i
13991 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13992 {
13993 static const char *aeabi_enum_names[] =
13994 { "", "variable-size", "32-bit", "" };
13995 const char *in_name =
13996 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13997 ? aeabi_enum_names[in_attr[i].i]
13998 : "<unknown>";
13999 const char *out_name =
14000 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14001 ? aeabi_enum_names[out_attr[i].i]
14002 : "<unknown>";
14003 _bfd_error_handler
14004 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14005 ibfd, in_name, out_name);
14006 }
14007 }
14008 break;
14009 case Tag_ABI_VFP_args:
14010 /* Aready done. */
14011 break;
14012 case Tag_ABI_WMMX_args:
14013 if (in_attr[i].i != out_attr[i].i)
14014 {
14015 _bfd_error_handler
14016 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14017 ibfd, obfd);
14018 result = FALSE;
14019 }
14020 break;
14021 case Tag_compatibility:
14022 /* Merged in target-independent code. */
14023 break;
14024 case Tag_ABI_HardFP_use:
14025 /* This is handled along with Tag_FP_arch. */
14026 break;
14027 case Tag_ABI_FP_16bit_format:
14028 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14029 {
14030 if (in_attr[i].i != out_attr[i].i)
14031 {
14032 _bfd_error_handler
14033 (_("error: fp16 format mismatch between %pB and %pB"),
14034 ibfd, obfd);
14035 result = FALSE;
14036 }
14037 }
14038 if (in_attr[i].i != 0)
14039 out_attr[i].i = in_attr[i].i;
14040 break;
14041
14042 case Tag_DIV_use:
14043 /* A value of zero on input means that the divide instruction may
14044 be used if available in the base architecture as specified via
14045 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14046 the user did not want divide instructions. A value of 2
14047 explicitly means that divide instructions were allowed in ARM
14048 and Thumb state. */
14049 if (in_attr[i].i == out_attr[i].i)
14050 /* Do nothing. */ ;
14051 else if (elf32_arm_attributes_forbid_div (in_attr)
14052 && !elf32_arm_attributes_accept_div (out_attr))
14053 out_attr[i].i = 1;
14054 else if (elf32_arm_attributes_forbid_div (out_attr)
14055 && elf32_arm_attributes_accept_div (in_attr))
14056 out_attr[i].i = in_attr[i].i;
14057 else if (in_attr[i].i == 2)
14058 out_attr[i].i = in_attr[i].i;
14059 break;
14060
14061 case Tag_MPextension_use_legacy:
14062 /* We don't output objects with Tag_MPextension_use_legacy - we
14063 move the value to Tag_MPextension_use. */
14064 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14065 {
14066 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14067 {
14068 _bfd_error_handler
14069 (_("%pB has both the current and legacy "
14070 "Tag_MPextension_use attributes"),
14071 ibfd);
14072 result = FALSE;
14073 }
14074 }
14075
14076 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14077 out_attr[Tag_MPextension_use] = in_attr[i];
14078
14079 break;
14080
14081 case Tag_nodefaults:
14082 /* This tag is set if it exists, but the value is unused (and is
14083 typically zero). We don't actually need to do anything here -
14084 the merge happens automatically when the type flags are merged
14085 below. */
14086 break;
14087 case Tag_also_compatible_with:
14088 /* Already done in Tag_CPU_arch. */
14089 break;
14090 case Tag_conformance:
14091 /* Keep the attribute if it matches. Throw it away otherwise.
14092 No attribute means no claim to conform. */
14093 if (!in_attr[i].s || !out_attr[i].s
14094 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14095 out_attr[i].s = NULL;
14096 break;
14097
14098 default:
14099 result
14100 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14101 }
14102
14103 /* If out_attr was copied from in_attr then it won't have a type yet. */
14104 if (in_attr[i].type && !out_attr[i].type)
14105 out_attr[i].type = in_attr[i].type;
14106 }
14107
14108 /* Merge Tag_compatibility attributes and any common GNU ones. */
14109 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14110 return FALSE;
14111
14112 /* Check for any attributes not known on ARM. */
14113 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14114
14115 return result;
14116 }
14117
14118
14119 /* Return TRUE if the two EABI versions are incompatible. */
14120
14121 static bfd_boolean
14122 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14123 {
14124 /* v4 and v5 are the same spec before and after it was released,
14125 so allow mixing them. */
14126 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14127 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14128 return TRUE;
14129
14130 return (iver == over);
14131 }
14132
14133 /* Merge backend specific data from an object file to the output
14134 object file when linking. */
14135
14136 static bfd_boolean
14137 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14138
14139 /* Display the flags field. */
14140
14141 static bfd_boolean
14142 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14143 {
14144 FILE * file = (FILE *) ptr;
14145 unsigned long flags;
14146
14147 BFD_ASSERT (abfd != NULL && ptr != NULL);
14148
14149 /* Print normal ELF private data. */
14150 _bfd_elf_print_private_bfd_data (abfd, ptr);
14151
14152 flags = elf_elfheader (abfd)->e_flags;
14153 /* Ignore init flag - it may not be set, despite the flags field
14154 containing valid data. */
14155
14156 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14157
14158 switch (EF_ARM_EABI_VERSION (flags))
14159 {
14160 case EF_ARM_EABI_UNKNOWN:
14161 /* The following flag bits are GNU extensions and not part of the
14162 official ARM ELF extended ABI. Hence they are only decoded if
14163 the EABI version is not set. */
14164 if (flags & EF_ARM_INTERWORK)
14165 fprintf (file, _(" [interworking enabled]"));
14166
14167 if (flags & EF_ARM_APCS_26)
14168 fprintf (file, " [APCS-26]");
14169 else
14170 fprintf (file, " [APCS-32]");
14171
14172 if (flags & EF_ARM_VFP_FLOAT)
14173 fprintf (file, _(" [VFP float format]"));
14174 else if (flags & EF_ARM_MAVERICK_FLOAT)
14175 fprintf (file, _(" [Maverick float format]"));
14176 else
14177 fprintf (file, _(" [FPA float format]"));
14178
14179 if (flags & EF_ARM_APCS_FLOAT)
14180 fprintf (file, _(" [floats passed in float registers]"));
14181
14182 if (flags & EF_ARM_PIC)
14183 fprintf (file, _(" [position independent]"));
14184
14185 if (flags & EF_ARM_NEW_ABI)
14186 fprintf (file, _(" [new ABI]"));
14187
14188 if (flags & EF_ARM_OLD_ABI)
14189 fprintf (file, _(" [old ABI]"));
14190
14191 if (flags & EF_ARM_SOFT_FLOAT)
14192 fprintf (file, _(" [software FP]"));
14193
14194 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14195 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14196 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14197 | EF_ARM_MAVERICK_FLOAT);
14198 break;
14199
14200 case EF_ARM_EABI_VER1:
14201 fprintf (file, _(" [Version1 EABI]"));
14202
14203 if (flags & EF_ARM_SYMSARESORTED)
14204 fprintf (file, _(" [sorted symbol table]"));
14205 else
14206 fprintf (file, _(" [unsorted symbol table]"));
14207
14208 flags &= ~ EF_ARM_SYMSARESORTED;
14209 break;
14210
14211 case EF_ARM_EABI_VER2:
14212 fprintf (file, _(" [Version2 EABI]"));
14213
14214 if (flags & EF_ARM_SYMSARESORTED)
14215 fprintf (file, _(" [sorted symbol table]"));
14216 else
14217 fprintf (file, _(" [unsorted symbol table]"));
14218
14219 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14220 fprintf (file, _(" [dynamic symbols use segment index]"));
14221
14222 if (flags & EF_ARM_MAPSYMSFIRST)
14223 fprintf (file, _(" [mapping symbols precede others]"));
14224
14225 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14226 | EF_ARM_MAPSYMSFIRST);
14227 break;
14228
14229 case EF_ARM_EABI_VER3:
14230 fprintf (file, _(" [Version3 EABI]"));
14231 break;
14232
14233 case EF_ARM_EABI_VER4:
14234 fprintf (file, _(" [Version4 EABI]"));
14235 goto eabi;
14236
14237 case EF_ARM_EABI_VER5:
14238 fprintf (file, _(" [Version5 EABI]"));
14239
14240 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14241 fprintf (file, _(" [soft-float ABI]"));
14242
14243 if (flags & EF_ARM_ABI_FLOAT_HARD)
14244 fprintf (file, _(" [hard-float ABI]"));
14245
14246 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14247
14248 eabi:
14249 if (flags & EF_ARM_BE8)
14250 fprintf (file, _(" [BE8]"));
14251
14252 if (flags & EF_ARM_LE8)
14253 fprintf (file, _(" [LE8]"));
14254
14255 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14256 break;
14257
14258 default:
14259 fprintf (file, _(" <EABI version unrecognised>"));
14260 break;
14261 }
14262
14263 flags &= ~ EF_ARM_EABIMASK;
14264
14265 if (flags & EF_ARM_RELEXEC)
14266 fprintf (file, _(" [relocatable executable]"));
14267
14268 flags &= ~EF_ARM_RELEXEC;
14269
14270 if (flags)
14271 fprintf (file, _("<Unrecognised flag bits set>"));
14272
14273 fputc ('\n', file);
14274
14275 return TRUE;
14276 }
14277
14278 static int
14279 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14280 {
14281 switch (ELF_ST_TYPE (elf_sym->st_info))
14282 {
14283 case STT_ARM_TFUNC:
14284 return ELF_ST_TYPE (elf_sym->st_info);
14285
14286 case STT_ARM_16BIT:
14287 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14288 This allows us to distinguish between data used by Thumb instructions
14289 and non-data (which is probably code) inside Thumb regions of an
14290 executable. */
14291 if (type != STT_OBJECT && type != STT_TLS)
14292 return ELF_ST_TYPE (elf_sym->st_info);
14293 break;
14294
14295 default:
14296 break;
14297 }
14298
14299 return type;
14300 }
14301
14302 static asection *
14303 elf32_arm_gc_mark_hook (asection *sec,
14304 struct bfd_link_info *info,
14305 Elf_Internal_Rela *rel,
14306 struct elf_link_hash_entry *h,
14307 Elf_Internal_Sym *sym)
14308 {
14309 if (h != NULL)
14310 switch (ELF32_R_TYPE (rel->r_info))
14311 {
14312 case R_ARM_GNU_VTINHERIT:
14313 case R_ARM_GNU_VTENTRY:
14314 return NULL;
14315 }
14316
14317 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14318 }
14319
14320 /* Look through the relocs for a section during the first phase. */
14321
14322 static bfd_boolean
14323 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14324 asection *sec, const Elf_Internal_Rela *relocs)
14325 {
14326 Elf_Internal_Shdr *symtab_hdr;
14327 struct elf_link_hash_entry **sym_hashes;
14328 const Elf_Internal_Rela *rel;
14329 const Elf_Internal_Rela *rel_end;
14330 bfd *dynobj;
14331 asection *sreloc;
14332 struct elf32_arm_link_hash_table *htab;
14333 bfd_boolean call_reloc_p;
14334 bfd_boolean may_become_dynamic_p;
14335 bfd_boolean may_need_local_target_p;
14336 unsigned long nsyms;
14337
14338 if (bfd_link_relocatable (info))
14339 return TRUE;
14340
14341 BFD_ASSERT (is_arm_elf (abfd));
14342
14343 htab = elf32_arm_hash_table (info);
14344 if (htab == NULL)
14345 return FALSE;
14346
14347 sreloc = NULL;
14348
14349 /* Create dynamic sections for relocatable executables so that we can
14350 copy relocations. */
14351 if (htab->root.is_relocatable_executable
14352 && ! htab->root.dynamic_sections_created)
14353 {
14354 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14355 return FALSE;
14356 }
14357
14358 if (htab->root.dynobj == NULL)
14359 htab->root.dynobj = abfd;
14360 if (!create_ifunc_sections (info))
14361 return FALSE;
14362
14363 dynobj = htab->root.dynobj;
14364
14365 symtab_hdr = & elf_symtab_hdr (abfd);
14366 sym_hashes = elf_sym_hashes (abfd);
14367 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14368
14369 rel_end = relocs + sec->reloc_count;
14370 for (rel = relocs; rel < rel_end; rel++)
14371 {
14372 Elf_Internal_Sym *isym;
14373 struct elf_link_hash_entry *h;
14374 struct elf32_arm_link_hash_entry *eh;
14375 unsigned int r_symndx;
14376 int r_type;
14377
14378 r_symndx = ELF32_R_SYM (rel->r_info);
14379 r_type = ELF32_R_TYPE (rel->r_info);
14380 r_type = arm_real_reloc_type (htab, r_type);
14381
14382 if (r_symndx >= nsyms
14383 /* PR 9934: It is possible to have relocations that do not
14384 refer to symbols, thus it is also possible to have an
14385 object file containing relocations but no symbol table. */
14386 && (r_symndx > STN_UNDEF || nsyms > 0))
14387 {
14388 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
14389 r_symndx);
14390 return FALSE;
14391 }
14392
14393 h = NULL;
14394 isym = NULL;
14395 if (nsyms > 0)
14396 {
14397 if (r_symndx < symtab_hdr->sh_info)
14398 {
14399 /* A local symbol. */
14400 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14401 abfd, r_symndx);
14402 if (isym == NULL)
14403 return FALSE;
14404 }
14405 else
14406 {
14407 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14408 while (h->root.type == bfd_link_hash_indirect
14409 || h->root.type == bfd_link_hash_warning)
14410 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14411 }
14412 }
14413
14414 eh = (struct elf32_arm_link_hash_entry *) h;
14415
14416 call_reloc_p = FALSE;
14417 may_become_dynamic_p = FALSE;
14418 may_need_local_target_p = FALSE;
14419
14420 /* Could be done earlier, if h were already available. */
14421 r_type = elf32_arm_tls_transition (info, r_type, h);
14422 switch (r_type)
14423 {
14424 case R_ARM_GOT32:
14425 case R_ARM_GOT_PREL:
14426 case R_ARM_TLS_GD32:
14427 case R_ARM_TLS_IE32:
14428 case R_ARM_TLS_GOTDESC:
14429 case R_ARM_TLS_DESCSEQ:
14430 case R_ARM_THM_TLS_DESCSEQ:
14431 case R_ARM_TLS_CALL:
14432 case R_ARM_THM_TLS_CALL:
14433 /* This symbol requires a global offset table entry. */
14434 {
14435 int tls_type, old_tls_type;
14436
14437 switch (r_type)
14438 {
14439 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14440
14441 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14442
14443 case R_ARM_TLS_GOTDESC:
14444 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14445 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14446 tls_type = GOT_TLS_GDESC; break;
14447
14448 default: tls_type = GOT_NORMAL; break;
14449 }
14450
14451 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14452 info->flags |= DF_STATIC_TLS;
14453
14454 if (h != NULL)
14455 {
14456 h->got.refcount++;
14457 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14458 }
14459 else
14460 {
14461 /* This is a global offset table entry for a local symbol. */
14462 if (!elf32_arm_allocate_local_sym_info (abfd))
14463 return FALSE;
14464 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14465 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14466 }
14467
14468 /* If a variable is accessed with both tls methods, two
14469 slots may be created. */
14470 if (GOT_TLS_GD_ANY_P (old_tls_type)
14471 && GOT_TLS_GD_ANY_P (tls_type))
14472 tls_type |= old_tls_type;
14473
14474 /* We will already have issued an error message if there
14475 is a TLS/non-TLS mismatch, based on the symbol
14476 type. So just combine any TLS types needed. */
14477 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14478 && tls_type != GOT_NORMAL)
14479 tls_type |= old_tls_type;
14480
14481 /* If the symbol is accessed in both IE and GDESC
14482 method, we're able to relax. Turn off the GDESC flag,
14483 without messing up with any other kind of tls types
14484 that may be involved. */
14485 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14486 tls_type &= ~GOT_TLS_GDESC;
14487
14488 if (old_tls_type != tls_type)
14489 {
14490 if (h != NULL)
14491 elf32_arm_hash_entry (h)->tls_type = tls_type;
14492 else
14493 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14494 }
14495 }
14496 /* Fall through. */
14497
14498 case R_ARM_TLS_LDM32:
14499 if (r_type == R_ARM_TLS_LDM32)
14500 htab->tls_ldm_got.refcount++;
14501 /* Fall through. */
14502
14503 case R_ARM_GOTOFF32:
14504 case R_ARM_GOTPC:
14505 if (htab->root.sgot == NULL
14506 && !create_got_section (htab->root.dynobj, info))
14507 return FALSE;
14508 break;
14509
14510 case R_ARM_PC24:
14511 case R_ARM_PLT32:
14512 case R_ARM_CALL:
14513 case R_ARM_JUMP24:
14514 case R_ARM_PREL31:
14515 case R_ARM_THM_CALL:
14516 case R_ARM_THM_JUMP24:
14517 case R_ARM_THM_JUMP19:
14518 call_reloc_p = TRUE;
14519 may_need_local_target_p = TRUE;
14520 break;
14521
14522 case R_ARM_ABS12:
14523 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14524 ldr __GOTT_INDEX__ offsets. */
14525 if (!htab->vxworks_p)
14526 {
14527 may_need_local_target_p = TRUE;
14528 break;
14529 }
14530 else goto jump_over;
14531
14532 /* Fall through. */
14533
14534 case R_ARM_MOVW_ABS_NC:
14535 case R_ARM_MOVT_ABS:
14536 case R_ARM_THM_MOVW_ABS_NC:
14537 case R_ARM_THM_MOVT_ABS:
14538 if (bfd_link_pic (info))
14539 {
14540 _bfd_error_handler
14541 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14542 abfd, elf32_arm_howto_table_1[r_type].name,
14543 (h) ? h->root.root.string : "a local symbol");
14544 bfd_set_error (bfd_error_bad_value);
14545 return FALSE;
14546 }
14547
14548 /* Fall through. */
14549 case R_ARM_ABS32:
14550 case R_ARM_ABS32_NOI:
14551 jump_over:
14552 if (h != NULL && bfd_link_executable (info))
14553 {
14554 h->pointer_equality_needed = 1;
14555 }
14556 /* Fall through. */
14557 case R_ARM_REL32:
14558 case R_ARM_REL32_NOI:
14559 case R_ARM_MOVW_PREL_NC:
14560 case R_ARM_MOVT_PREL:
14561 case R_ARM_THM_MOVW_PREL_NC:
14562 case R_ARM_THM_MOVT_PREL:
14563
14564 /* Should the interworking branches be listed here? */
14565 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14566 && (sec->flags & SEC_ALLOC) != 0)
14567 {
14568 if (h == NULL
14569 && elf32_arm_howto_from_type (r_type)->pc_relative)
14570 {
14571 /* In shared libraries and relocatable executables,
14572 we treat local relative references as calls;
14573 see the related SYMBOL_CALLS_LOCAL code in
14574 allocate_dynrelocs. */
14575 call_reloc_p = TRUE;
14576 may_need_local_target_p = TRUE;
14577 }
14578 else
14579 /* We are creating a shared library or relocatable
14580 executable, and this is a reloc against a global symbol,
14581 or a non-PC-relative reloc against a local symbol.
14582 We may need to copy the reloc into the output. */
14583 may_become_dynamic_p = TRUE;
14584 }
14585 else
14586 may_need_local_target_p = TRUE;
14587 break;
14588
14589 /* This relocation describes the C++ object vtable hierarchy.
14590 Reconstruct it for later use during GC. */
14591 case R_ARM_GNU_VTINHERIT:
14592 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14593 return FALSE;
14594 break;
14595
14596 /* This relocation describes which C++ vtable entries are actually
14597 used. Record for later use during GC. */
14598 case R_ARM_GNU_VTENTRY:
14599 BFD_ASSERT (h != NULL);
14600 if (h != NULL
14601 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14602 return FALSE;
14603 break;
14604 }
14605
14606 if (h != NULL)
14607 {
14608 if (call_reloc_p)
14609 /* We may need a .plt entry if the function this reloc
14610 refers to is in a different object, regardless of the
14611 symbol's type. We can't tell for sure yet, because
14612 something later might force the symbol local. */
14613 h->needs_plt = 1;
14614 else if (may_need_local_target_p)
14615 /* If this reloc is in a read-only section, we might
14616 need a copy reloc. We can't check reliably at this
14617 stage whether the section is read-only, as input
14618 sections have not yet been mapped to output sections.
14619 Tentatively set the flag for now, and correct in
14620 adjust_dynamic_symbol. */
14621 h->non_got_ref = 1;
14622 }
14623
14624 if (may_need_local_target_p
14625 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14626 {
14627 union gotplt_union *root_plt;
14628 struct arm_plt_info *arm_plt;
14629 struct arm_local_iplt_info *local_iplt;
14630
14631 if (h != NULL)
14632 {
14633 root_plt = &h->plt;
14634 arm_plt = &eh->plt;
14635 }
14636 else
14637 {
14638 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14639 if (local_iplt == NULL)
14640 return FALSE;
14641 root_plt = &local_iplt->root;
14642 arm_plt = &local_iplt->arm;
14643 }
14644
14645 /* If the symbol is a function that doesn't bind locally,
14646 this relocation will need a PLT entry. */
14647 if (root_plt->refcount != -1)
14648 root_plt->refcount += 1;
14649
14650 if (!call_reloc_p)
14651 arm_plt->noncall_refcount++;
14652
14653 /* It's too early to use htab->use_blx here, so we have to
14654 record possible blx references separately from
14655 relocs that definitely need a thumb stub. */
14656
14657 if (r_type == R_ARM_THM_CALL)
14658 arm_plt->maybe_thumb_refcount += 1;
14659
14660 if (r_type == R_ARM_THM_JUMP24
14661 || r_type == R_ARM_THM_JUMP19)
14662 arm_plt->thumb_refcount += 1;
14663 }
14664
14665 if (may_become_dynamic_p)
14666 {
14667 struct elf_dyn_relocs *p, **head;
14668
14669 /* Create a reloc section in dynobj. */
14670 if (sreloc == NULL)
14671 {
14672 sreloc = _bfd_elf_make_dynamic_reloc_section
14673 (sec, dynobj, 2, abfd, ! htab->use_rel);
14674
14675 if (sreloc == NULL)
14676 return FALSE;
14677
14678 /* BPABI objects never have dynamic relocations mapped. */
14679 if (htab->symbian_p)
14680 {
14681 flagword flags;
14682
14683 flags = bfd_get_section_flags (dynobj, sreloc);
14684 flags &= ~(SEC_LOAD | SEC_ALLOC);
14685 bfd_set_section_flags (dynobj, sreloc, flags);
14686 }
14687 }
14688
14689 /* If this is a global symbol, count the number of
14690 relocations we need for this symbol. */
14691 if (h != NULL)
14692 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14693 else
14694 {
14695 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14696 if (head == NULL)
14697 return FALSE;
14698 }
14699
14700 p = *head;
14701 if (p == NULL || p->sec != sec)
14702 {
14703 bfd_size_type amt = sizeof *p;
14704
14705 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14706 if (p == NULL)
14707 return FALSE;
14708 p->next = *head;
14709 *head = p;
14710 p->sec = sec;
14711 p->count = 0;
14712 p->pc_count = 0;
14713 }
14714
14715 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14716 p->pc_count += 1;
14717 p->count += 1;
14718 }
14719 }
14720
14721 return TRUE;
14722 }
14723
14724 static void
14725 elf32_arm_update_relocs (asection *o,
14726 struct bfd_elf_section_reloc_data *reldata)
14727 {
14728 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14729 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14730 const struct elf_backend_data *bed;
14731 _arm_elf_section_data *eado;
14732 struct bfd_link_order *p;
14733 bfd_byte *erela_head, *erela;
14734 Elf_Internal_Rela *irela_head, *irela;
14735 Elf_Internal_Shdr *rel_hdr;
14736 bfd *abfd;
14737 unsigned int count;
14738
14739 eado = get_arm_elf_section_data (o);
14740
14741 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14742 return;
14743
14744 abfd = o->owner;
14745 bed = get_elf_backend_data (abfd);
14746 rel_hdr = reldata->hdr;
14747
14748 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14749 {
14750 swap_in = bed->s->swap_reloc_in;
14751 swap_out = bed->s->swap_reloc_out;
14752 }
14753 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14754 {
14755 swap_in = bed->s->swap_reloca_in;
14756 swap_out = bed->s->swap_reloca_out;
14757 }
14758 else
14759 abort ();
14760
14761 erela_head = rel_hdr->contents;
14762 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14763 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14764
14765 erela = erela_head;
14766 irela = irela_head;
14767 count = 0;
14768
14769 for (p = o->map_head.link_order; p; p = p->next)
14770 {
14771 if (p->type == bfd_section_reloc_link_order
14772 || p->type == bfd_symbol_reloc_link_order)
14773 {
14774 (*swap_in) (abfd, erela, irela);
14775 erela += rel_hdr->sh_entsize;
14776 irela++;
14777 count++;
14778 }
14779 else if (p->type == bfd_indirect_link_order)
14780 {
14781 struct bfd_elf_section_reloc_data *input_reldata;
14782 arm_unwind_table_edit *edit_list, *edit_tail;
14783 _arm_elf_section_data *eadi;
14784 bfd_size_type j;
14785 bfd_vma offset;
14786 asection *i;
14787
14788 i = p->u.indirect.section;
14789
14790 eadi = get_arm_elf_section_data (i);
14791 edit_list = eadi->u.exidx.unwind_edit_list;
14792 edit_tail = eadi->u.exidx.unwind_edit_tail;
14793 offset = o->vma + i->output_offset;
14794
14795 if (eadi->elf.rel.hdr &&
14796 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14797 input_reldata = &eadi->elf.rel;
14798 else if (eadi->elf.rela.hdr &&
14799 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14800 input_reldata = &eadi->elf.rela;
14801 else
14802 abort ();
14803
14804 if (edit_list)
14805 {
14806 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14807 {
14808 arm_unwind_table_edit *edit_node, *edit_next;
14809 bfd_vma bias;
14810 bfd_vma reloc_index;
14811
14812 (*swap_in) (abfd, erela, irela);
14813 reloc_index = (irela->r_offset - offset) / 8;
14814
14815 bias = 0;
14816 edit_node = edit_list;
14817 for (edit_next = edit_list;
14818 edit_next && edit_next->index <= reloc_index;
14819 edit_next = edit_node->next)
14820 {
14821 bias++;
14822 edit_node = edit_next;
14823 }
14824
14825 if (edit_node->type != DELETE_EXIDX_ENTRY
14826 || edit_node->index != reloc_index)
14827 {
14828 irela->r_offset -= bias * 8;
14829 irela++;
14830 count++;
14831 }
14832
14833 erela += rel_hdr->sh_entsize;
14834 }
14835
14836 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14837 {
14838 /* New relocation entity. */
14839 asection *text_sec = edit_tail->linked_section;
14840 asection *text_out = text_sec->output_section;
14841 bfd_vma exidx_offset = offset + i->size - 8;
14842
14843 irela->r_addend = 0;
14844 irela->r_offset = exidx_offset;
14845 irela->r_info = ELF32_R_INFO
14846 (text_out->target_index, R_ARM_PREL31);
14847 irela++;
14848 count++;
14849 }
14850 }
14851 else
14852 {
14853 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14854 {
14855 (*swap_in) (abfd, erela, irela);
14856 erela += rel_hdr->sh_entsize;
14857 irela++;
14858 }
14859
14860 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
14861 }
14862 }
14863 }
14864
14865 reldata->count = count;
14866 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
14867
14868 erela = erela_head;
14869 irela = irela_head;
14870 while (count > 0)
14871 {
14872 (*swap_out) (abfd, irela, erela);
14873 erela += rel_hdr->sh_entsize;
14874 irela++;
14875 count--;
14876 }
14877
14878 free (irela_head);
14879
14880 /* Hashes are no longer valid. */
14881 free (reldata->hashes);
14882 reldata->hashes = NULL;
14883 }
14884
14885 /* Unwinding tables are not referenced directly. This pass marks them as
14886 required if the corresponding code section is marked. Similarly, ARMv8-M
14887 secure entry functions can only be referenced by SG veneers which are
14888 created after the GC process. They need to be marked in case they reside in
14889 their own section (as would be the case if code was compiled with
14890 -ffunction-sections). */
14891
14892 static bfd_boolean
14893 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
14894 elf_gc_mark_hook_fn gc_mark_hook)
14895 {
14896 bfd *sub;
14897 Elf_Internal_Shdr **elf_shdrp;
14898 asection *cmse_sec;
14899 obj_attribute *out_attr;
14900 Elf_Internal_Shdr *symtab_hdr;
14901 unsigned i, sym_count, ext_start;
14902 const struct elf_backend_data *bed;
14903 struct elf_link_hash_entry **sym_hashes;
14904 struct elf32_arm_link_hash_entry *cmse_hash;
14905 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
14906
14907 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
14908
14909 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
14910 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
14911 && out_attr[Tag_CPU_arch_profile].i == 'M';
14912
14913 /* Marking EH data may cause additional code sections to be marked,
14914 requiring multiple passes. */
14915 again = TRUE;
14916 while (again)
14917 {
14918 again = FALSE;
14919 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
14920 {
14921 asection *o;
14922
14923 if (! is_arm_elf (sub))
14924 continue;
14925
14926 elf_shdrp = elf_elfsections (sub);
14927 for (o = sub->sections; o != NULL; o = o->next)
14928 {
14929 Elf_Internal_Shdr *hdr;
14930
14931 hdr = &elf_section_data (o)->this_hdr;
14932 if (hdr->sh_type == SHT_ARM_EXIDX
14933 && hdr->sh_link
14934 && hdr->sh_link < elf_numsections (sub)
14935 && !o->gc_mark
14936 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
14937 {
14938 again = TRUE;
14939 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
14940 return FALSE;
14941 }
14942 }
14943
14944 /* Mark section holding ARMv8-M secure entry functions. We mark all
14945 of them so no need for a second browsing. */
14946 if (is_v8m && first_bfd_browse)
14947 {
14948 sym_hashes = elf_sym_hashes (sub);
14949 bed = get_elf_backend_data (sub);
14950 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
14951 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
14952 ext_start = symtab_hdr->sh_info;
14953
14954 /* Scan symbols. */
14955 for (i = ext_start; i < sym_count; i++)
14956 {
14957 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
14958
14959 /* Assume it is a special symbol. If not, cmse_scan will
14960 warn about it and user can do something about it. */
14961 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
14962 {
14963 cmse_sec = cmse_hash->root.root.u.def.section;
14964 if (!cmse_sec->gc_mark
14965 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
14966 return FALSE;
14967 }
14968 }
14969 }
14970 }
14971 first_bfd_browse = FALSE;
14972 }
14973
14974 return TRUE;
14975 }
14976
14977 /* Treat mapping symbols as special target symbols. */
14978
14979 static bfd_boolean
14980 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
14981 {
14982 return bfd_is_arm_special_symbol_name (sym->name,
14983 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
14984 }
14985
14986 /* This is a copy of elf_find_function() from elf.c except that
14987 ARM mapping symbols are ignored when looking for function names
14988 and STT_ARM_TFUNC is considered to a function type. */
14989
14990 static bfd_boolean
14991 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
14992 asymbol ** symbols,
14993 asection * section,
14994 bfd_vma offset,
14995 const char ** filename_ptr,
14996 const char ** functionname_ptr)
14997 {
14998 const char * filename = NULL;
14999 asymbol * func = NULL;
15000 bfd_vma low_func = 0;
15001 asymbol ** p;
15002
15003 for (p = symbols; *p != NULL; p++)
15004 {
15005 elf_symbol_type *q;
15006
15007 q = (elf_symbol_type *) *p;
15008
15009 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15010 {
15011 default:
15012 break;
15013 case STT_FILE:
15014 filename = bfd_asymbol_name (&q->symbol);
15015 break;
15016 case STT_FUNC:
15017 case STT_ARM_TFUNC:
15018 case STT_NOTYPE:
15019 /* Skip mapping symbols. */
15020 if ((q->symbol.flags & BSF_LOCAL)
15021 && bfd_is_arm_special_symbol_name (q->symbol.name,
15022 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15023 continue;
15024 /* Fall through. */
15025 if (bfd_get_section (&q->symbol) == section
15026 && q->symbol.value >= low_func
15027 && q->symbol.value <= offset)
15028 {
15029 func = (asymbol *) q;
15030 low_func = q->symbol.value;
15031 }
15032 break;
15033 }
15034 }
15035
15036 if (func == NULL)
15037 return FALSE;
15038
15039 if (filename_ptr)
15040 *filename_ptr = filename;
15041 if (functionname_ptr)
15042 *functionname_ptr = bfd_asymbol_name (func);
15043
15044 return TRUE;
15045 }
15046
15047
15048 /* Find the nearest line to a particular section and offset, for error
15049 reporting. This code is a duplicate of the code in elf.c, except
15050 that it uses arm_elf_find_function. */
15051
15052 static bfd_boolean
15053 elf32_arm_find_nearest_line (bfd * abfd,
15054 asymbol ** symbols,
15055 asection * section,
15056 bfd_vma offset,
15057 const char ** filename_ptr,
15058 const char ** functionname_ptr,
15059 unsigned int * line_ptr,
15060 unsigned int * discriminator_ptr)
15061 {
15062 bfd_boolean found = FALSE;
15063
15064 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15065 filename_ptr, functionname_ptr,
15066 line_ptr, discriminator_ptr,
15067 dwarf_debug_sections, 0,
15068 & elf_tdata (abfd)->dwarf2_find_line_info))
15069 {
15070 if (!*functionname_ptr)
15071 arm_elf_find_function (abfd, symbols, section, offset,
15072 *filename_ptr ? NULL : filename_ptr,
15073 functionname_ptr);
15074
15075 return TRUE;
15076 }
15077
15078 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15079 uses DWARF1. */
15080
15081 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15082 & found, filename_ptr,
15083 functionname_ptr, line_ptr,
15084 & elf_tdata (abfd)->line_info))
15085 return FALSE;
15086
15087 if (found && (*functionname_ptr || *line_ptr))
15088 return TRUE;
15089
15090 if (symbols == NULL)
15091 return FALSE;
15092
15093 if (! arm_elf_find_function (abfd, symbols, section, offset,
15094 filename_ptr, functionname_ptr))
15095 return FALSE;
15096
15097 *line_ptr = 0;
15098 return TRUE;
15099 }
15100
15101 static bfd_boolean
15102 elf32_arm_find_inliner_info (bfd * abfd,
15103 const char ** filename_ptr,
15104 const char ** functionname_ptr,
15105 unsigned int * line_ptr)
15106 {
15107 bfd_boolean found;
15108 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15109 functionname_ptr, line_ptr,
15110 & elf_tdata (abfd)->dwarf2_find_line_info);
15111 return found;
15112 }
15113
15114 /* Find dynamic relocs for H that apply to read-only sections. */
15115
15116 static asection *
15117 readonly_dynrelocs (struct elf_link_hash_entry *h)
15118 {
15119 struct elf_dyn_relocs *p;
15120
15121 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
15122 {
15123 asection *s = p->sec->output_section;
15124
15125 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15126 return p->sec;
15127 }
15128 return NULL;
15129 }
15130
15131 /* Adjust a symbol defined by a dynamic object and referenced by a
15132 regular object. The current definition is in some section of the
15133 dynamic object, but we're not including those sections. We have to
15134 change the definition to something the rest of the link can
15135 understand. */
15136
15137 static bfd_boolean
15138 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15139 struct elf_link_hash_entry * h)
15140 {
15141 bfd * dynobj;
15142 asection *s, *srel;
15143 struct elf32_arm_link_hash_entry * eh;
15144 struct elf32_arm_link_hash_table *globals;
15145
15146 globals = elf32_arm_hash_table (info);
15147 if (globals == NULL)
15148 return FALSE;
15149
15150 dynobj = elf_hash_table (info)->dynobj;
15151
15152 /* Make sure we know what is going on here. */
15153 BFD_ASSERT (dynobj != NULL
15154 && (h->needs_plt
15155 || h->type == STT_GNU_IFUNC
15156 || h->is_weakalias
15157 || (h->def_dynamic
15158 && h->ref_regular
15159 && !h->def_regular)));
15160
15161 eh = (struct elf32_arm_link_hash_entry *) h;
15162
15163 /* If this is a function, put it in the procedure linkage table. We
15164 will fill in the contents of the procedure linkage table later,
15165 when we know the address of the .got section. */
15166 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15167 {
15168 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15169 symbol binds locally. */
15170 if (h->plt.refcount <= 0
15171 || (h->type != STT_GNU_IFUNC
15172 && (SYMBOL_CALLS_LOCAL (info, h)
15173 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15174 && h->root.type == bfd_link_hash_undefweak))))
15175 {
15176 /* This case can occur if we saw a PLT32 reloc in an input
15177 file, but the symbol was never referred to by a dynamic
15178 object, or if all references were garbage collected. In
15179 such a case, we don't actually need to build a procedure
15180 linkage table, and we can just do a PC24 reloc instead. */
15181 h->plt.offset = (bfd_vma) -1;
15182 eh->plt.thumb_refcount = 0;
15183 eh->plt.maybe_thumb_refcount = 0;
15184 eh->plt.noncall_refcount = 0;
15185 h->needs_plt = 0;
15186 }
15187
15188 return TRUE;
15189 }
15190 else
15191 {
15192 /* It's possible that we incorrectly decided a .plt reloc was
15193 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15194 in check_relocs. We can't decide accurately between function
15195 and non-function syms in check-relocs; Objects loaded later in
15196 the link may change h->type. So fix it now. */
15197 h->plt.offset = (bfd_vma) -1;
15198 eh->plt.thumb_refcount = 0;
15199 eh->plt.maybe_thumb_refcount = 0;
15200 eh->plt.noncall_refcount = 0;
15201 }
15202
15203 /* If this is a weak symbol, and there is a real definition, the
15204 processor independent code will have arranged for us to see the
15205 real definition first, and we can just use the same value. */
15206 if (h->is_weakalias)
15207 {
15208 struct elf_link_hash_entry *def = weakdef (h);
15209 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
15210 h->root.u.def.section = def->root.u.def.section;
15211 h->root.u.def.value = def->root.u.def.value;
15212 return TRUE;
15213 }
15214
15215 /* If there are no non-GOT references, we do not need a copy
15216 relocation. */
15217 if (!h->non_got_ref)
15218 return TRUE;
15219
15220 /* This is a reference to a symbol defined by a dynamic object which
15221 is not a function. */
15222
15223 /* If we are creating a shared library, we must presume that the
15224 only references to the symbol are via the global offset table.
15225 For such cases we need not do anything here; the relocations will
15226 be handled correctly by relocate_section. Relocatable executables
15227 can reference data in shared objects directly, so we don't need to
15228 do anything here. */
15229 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15230 return TRUE;
15231
15232 /* We must allocate the symbol in our .dynbss section, which will
15233 become part of the .bss section of the executable. There will be
15234 an entry for this symbol in the .dynsym section. The dynamic
15235 object will contain position independent code, so all references
15236 from the dynamic object to this symbol will go through the global
15237 offset table. The dynamic linker will use the .dynsym entry to
15238 determine the address it must put in the global offset table, so
15239 both the dynamic object and the regular object will refer to the
15240 same memory location for the variable. */
15241 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15242 linker to copy the initial value out of the dynamic object and into
15243 the runtime process image. We need to remember the offset into the
15244 .rel(a).bss section we are going to use. */
15245 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15246 {
15247 s = globals->root.sdynrelro;
15248 srel = globals->root.sreldynrelro;
15249 }
15250 else
15251 {
15252 s = globals->root.sdynbss;
15253 srel = globals->root.srelbss;
15254 }
15255 if (info->nocopyreloc == 0
15256 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15257 && h->size != 0)
15258 {
15259 elf32_arm_allocate_dynrelocs (info, srel, 1);
15260 h->needs_copy = 1;
15261 }
15262
15263 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15264 }
15265
15266 /* Allocate space in .plt, .got and associated reloc sections for
15267 dynamic relocs. */
15268
15269 static bfd_boolean
15270 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15271 {
15272 struct bfd_link_info *info;
15273 struct elf32_arm_link_hash_table *htab;
15274 struct elf32_arm_link_hash_entry *eh;
15275 struct elf_dyn_relocs *p;
15276
15277 if (h->root.type == bfd_link_hash_indirect)
15278 return TRUE;
15279
15280 eh = (struct elf32_arm_link_hash_entry *) h;
15281
15282 info = (struct bfd_link_info *) inf;
15283 htab = elf32_arm_hash_table (info);
15284 if (htab == NULL)
15285 return FALSE;
15286
15287 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15288 && h->plt.refcount > 0)
15289 {
15290 /* Make sure this symbol is output as a dynamic symbol.
15291 Undefined weak syms won't yet be marked as dynamic. */
15292 if (h->dynindx == -1 && !h->forced_local
15293 && h->root.type == bfd_link_hash_undefweak)
15294 {
15295 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15296 return FALSE;
15297 }
15298
15299 /* If the call in the PLT entry binds locally, the associated
15300 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15301 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15302 than the .plt section. */
15303 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15304 {
15305 eh->is_iplt = 1;
15306 if (eh->plt.noncall_refcount == 0
15307 && SYMBOL_REFERENCES_LOCAL (info, h))
15308 /* All non-call references can be resolved directly.
15309 This means that they can (and in some cases, must)
15310 resolve directly to the run-time target, rather than
15311 to the PLT. That in turns means that any .got entry
15312 would be equal to the .igot.plt entry, so there's
15313 no point having both. */
15314 h->got.refcount = 0;
15315 }
15316
15317 if (bfd_link_pic (info)
15318 || eh->is_iplt
15319 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15320 {
15321 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15322
15323 /* If this symbol is not defined in a regular file, and we are
15324 not generating a shared library, then set the symbol to this
15325 location in the .plt. This is required to make function
15326 pointers compare as equal between the normal executable and
15327 the shared library. */
15328 if (! bfd_link_pic (info)
15329 && !h->def_regular)
15330 {
15331 h->root.u.def.section = htab->root.splt;
15332 h->root.u.def.value = h->plt.offset;
15333
15334 /* Make sure the function is not marked as Thumb, in case
15335 it is the target of an ABS32 relocation, which will
15336 point to the PLT entry. */
15337 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15338 }
15339
15340 /* VxWorks executables have a second set of relocations for
15341 each PLT entry. They go in a separate relocation section,
15342 which is processed by the kernel loader. */
15343 if (htab->vxworks_p && !bfd_link_pic (info))
15344 {
15345 /* There is a relocation for the initial PLT entry:
15346 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15347 if (h->plt.offset == htab->plt_header_size)
15348 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15349
15350 /* There are two extra relocations for each subsequent
15351 PLT entry: an R_ARM_32 relocation for the GOT entry,
15352 and an R_ARM_32 relocation for the PLT entry. */
15353 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15354 }
15355 }
15356 else
15357 {
15358 h->plt.offset = (bfd_vma) -1;
15359 h->needs_plt = 0;
15360 }
15361 }
15362 else
15363 {
15364 h->plt.offset = (bfd_vma) -1;
15365 h->needs_plt = 0;
15366 }
15367
15368 eh = (struct elf32_arm_link_hash_entry *) h;
15369 eh->tlsdesc_got = (bfd_vma) -1;
15370
15371 if (h->got.refcount > 0)
15372 {
15373 asection *s;
15374 bfd_boolean dyn;
15375 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15376 int indx;
15377
15378 /* Make sure this symbol is output as a dynamic symbol.
15379 Undefined weak syms won't yet be marked as dynamic. */
15380 if (h->dynindx == -1 && !h->forced_local
15381 && h->root.type == bfd_link_hash_undefweak)
15382 {
15383 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15384 return FALSE;
15385 }
15386
15387 if (!htab->symbian_p)
15388 {
15389 s = htab->root.sgot;
15390 h->got.offset = s->size;
15391
15392 if (tls_type == GOT_UNKNOWN)
15393 abort ();
15394
15395 if (tls_type == GOT_NORMAL)
15396 /* Non-TLS symbols need one GOT slot. */
15397 s->size += 4;
15398 else
15399 {
15400 if (tls_type & GOT_TLS_GDESC)
15401 {
15402 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15403 eh->tlsdesc_got
15404 = (htab->root.sgotplt->size
15405 - elf32_arm_compute_jump_table_size (htab));
15406 htab->root.sgotplt->size += 8;
15407 h->got.offset = (bfd_vma) -2;
15408 /* plt.got_offset needs to know there's a TLS_DESC
15409 reloc in the middle of .got.plt. */
15410 htab->num_tls_desc++;
15411 }
15412
15413 if (tls_type & GOT_TLS_GD)
15414 {
15415 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15416 the symbol is both GD and GDESC, got.offset may
15417 have been overwritten. */
15418 h->got.offset = s->size;
15419 s->size += 8;
15420 }
15421
15422 if (tls_type & GOT_TLS_IE)
15423 /* R_ARM_TLS_IE32 needs one GOT slot. */
15424 s->size += 4;
15425 }
15426
15427 dyn = htab->root.dynamic_sections_created;
15428
15429 indx = 0;
15430 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15431 bfd_link_pic (info),
15432 h)
15433 && (!bfd_link_pic (info)
15434 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15435 indx = h->dynindx;
15436
15437 if (tls_type != GOT_NORMAL
15438 && (bfd_link_pic (info) || indx != 0)
15439 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15440 || h->root.type != bfd_link_hash_undefweak))
15441 {
15442 if (tls_type & GOT_TLS_IE)
15443 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15444
15445 if (tls_type & GOT_TLS_GD)
15446 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15447
15448 if (tls_type & GOT_TLS_GDESC)
15449 {
15450 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15451 /* GDESC needs a trampoline to jump to. */
15452 htab->tls_trampoline = -1;
15453 }
15454
15455 /* Only GD needs it. GDESC just emits one relocation per
15456 2 entries. */
15457 if ((tls_type & GOT_TLS_GD) && indx != 0)
15458 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15459 }
15460 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15461 {
15462 if (htab->root.dynamic_sections_created)
15463 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15464 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15465 }
15466 else if (h->type == STT_GNU_IFUNC
15467 && eh->plt.noncall_refcount == 0)
15468 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15469 they all resolve dynamically instead. Reserve room for the
15470 GOT entry's R_ARM_IRELATIVE relocation. */
15471 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15472 else if (bfd_link_pic (info)
15473 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15474 || h->root.type != bfd_link_hash_undefweak))
15475 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15476 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15477 }
15478 }
15479 else
15480 h->got.offset = (bfd_vma) -1;
15481
15482 /* Allocate stubs for exported Thumb functions on v4t. */
15483 if (!htab->use_blx && h->dynindx != -1
15484 && h->def_regular
15485 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15486 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15487 {
15488 struct elf_link_hash_entry * th;
15489 struct bfd_link_hash_entry * bh;
15490 struct elf_link_hash_entry * myh;
15491 char name[1024];
15492 asection *s;
15493 bh = NULL;
15494 /* Create a new symbol to regist the real location of the function. */
15495 s = h->root.u.def.section;
15496 sprintf (name, "__real_%s", h->root.root.string);
15497 _bfd_generic_link_add_one_symbol (info, s->owner,
15498 name, BSF_GLOBAL, s,
15499 h->root.u.def.value,
15500 NULL, TRUE, FALSE, &bh);
15501
15502 myh = (struct elf_link_hash_entry *) bh;
15503 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15504 myh->forced_local = 1;
15505 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15506 eh->export_glue = myh;
15507 th = record_arm_to_thumb_glue (info, h);
15508 /* Point the symbol at the stub. */
15509 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15510 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15511 h->root.u.def.section = th->root.u.def.section;
15512 h->root.u.def.value = th->root.u.def.value & ~1;
15513 }
15514
15515 if (eh->dyn_relocs == NULL)
15516 return TRUE;
15517
15518 /* In the shared -Bsymbolic case, discard space allocated for
15519 dynamic pc-relative relocs against symbols which turn out to be
15520 defined in regular objects. For the normal shared case, discard
15521 space for pc-relative relocs that have become local due to symbol
15522 visibility changes. */
15523
15524 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15525 {
15526 /* Relocs that use pc_count are PC-relative forms, which will appear
15527 on something like ".long foo - ." or "movw REG, foo - .". We want
15528 calls to protected symbols to resolve directly to the function
15529 rather than going via the plt. If people want function pointer
15530 comparisons to work as expected then they should avoid writing
15531 assembly like ".long foo - .". */
15532 if (SYMBOL_CALLS_LOCAL (info, h))
15533 {
15534 struct elf_dyn_relocs **pp;
15535
15536 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15537 {
15538 p->count -= p->pc_count;
15539 p->pc_count = 0;
15540 if (p->count == 0)
15541 *pp = p->next;
15542 else
15543 pp = &p->next;
15544 }
15545 }
15546
15547 if (htab->vxworks_p)
15548 {
15549 struct elf_dyn_relocs **pp;
15550
15551 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15552 {
15553 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15554 *pp = p->next;
15555 else
15556 pp = &p->next;
15557 }
15558 }
15559
15560 /* Also discard relocs on undefined weak syms with non-default
15561 visibility. */
15562 if (eh->dyn_relocs != NULL
15563 && h->root.type == bfd_link_hash_undefweak)
15564 {
15565 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15566 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
15567 eh->dyn_relocs = NULL;
15568
15569 /* Make sure undefined weak symbols are output as a dynamic
15570 symbol in PIEs. */
15571 else if (h->dynindx == -1
15572 && !h->forced_local)
15573 {
15574 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15575 return FALSE;
15576 }
15577 }
15578
15579 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15580 && h->root.type == bfd_link_hash_new)
15581 {
15582 /* Output absolute symbols so that we can create relocations
15583 against them. For normal symbols we output a relocation
15584 against the section that contains them. */
15585 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15586 return FALSE;
15587 }
15588
15589 }
15590 else
15591 {
15592 /* For the non-shared case, discard space for relocs against
15593 symbols which turn out to need copy relocs or are not
15594 dynamic. */
15595
15596 if (!h->non_got_ref
15597 && ((h->def_dynamic
15598 && !h->def_regular)
15599 || (htab->root.dynamic_sections_created
15600 && (h->root.type == bfd_link_hash_undefweak
15601 || h->root.type == bfd_link_hash_undefined))))
15602 {
15603 /* Make sure this symbol is output as a dynamic symbol.
15604 Undefined weak syms won't yet be marked as dynamic. */
15605 if (h->dynindx == -1 && !h->forced_local
15606 && h->root.type == bfd_link_hash_undefweak)
15607 {
15608 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15609 return FALSE;
15610 }
15611
15612 /* If that succeeded, we know we'll be keeping all the
15613 relocs. */
15614 if (h->dynindx != -1)
15615 goto keep;
15616 }
15617
15618 eh->dyn_relocs = NULL;
15619
15620 keep: ;
15621 }
15622
15623 /* Finally, allocate space. */
15624 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15625 {
15626 asection *sreloc = elf_section_data (p->sec)->sreloc;
15627 if (h->type == STT_GNU_IFUNC
15628 && eh->plt.noncall_refcount == 0
15629 && SYMBOL_REFERENCES_LOCAL (info, h))
15630 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15631 else
15632 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15633 }
15634
15635 return TRUE;
15636 }
15637
15638 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
15639 read-only sections. */
15640
15641 static bfd_boolean
15642 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
15643 {
15644 asection *sec;
15645
15646 if (h->root.type == bfd_link_hash_indirect)
15647 return TRUE;
15648
15649 sec = readonly_dynrelocs (h);
15650 if (sec != NULL)
15651 {
15652 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
15653
15654 info->flags |= DF_TEXTREL;
15655 info->callbacks->minfo
15656 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
15657 sec->owner, h->root.root.string, sec);
15658
15659 /* Not an error, just cut short the traversal. */
15660 return FALSE;
15661 }
15662 return TRUE;
15663 }
15664
15665 void
15666 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15667 int byteswap_code)
15668 {
15669 struct elf32_arm_link_hash_table *globals;
15670
15671 globals = elf32_arm_hash_table (info);
15672 if (globals == NULL)
15673 return;
15674
15675 globals->byteswap_code = byteswap_code;
15676 }
15677
15678 /* Set the sizes of the dynamic sections. */
15679
15680 static bfd_boolean
15681 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15682 struct bfd_link_info * info)
15683 {
15684 bfd * dynobj;
15685 asection * s;
15686 bfd_boolean plt;
15687 bfd_boolean relocs;
15688 bfd *ibfd;
15689 struct elf32_arm_link_hash_table *htab;
15690
15691 htab = elf32_arm_hash_table (info);
15692 if (htab == NULL)
15693 return FALSE;
15694
15695 dynobj = elf_hash_table (info)->dynobj;
15696 BFD_ASSERT (dynobj != NULL);
15697 check_use_blx (htab);
15698
15699 if (elf_hash_table (info)->dynamic_sections_created)
15700 {
15701 /* Set the contents of the .interp section to the interpreter. */
15702 if (bfd_link_executable (info) && !info->nointerp)
15703 {
15704 s = bfd_get_linker_section (dynobj, ".interp");
15705 BFD_ASSERT (s != NULL);
15706 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15707 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15708 }
15709 }
15710
15711 /* Set up .got offsets for local syms, and space for local dynamic
15712 relocs. */
15713 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15714 {
15715 bfd_signed_vma *local_got;
15716 bfd_signed_vma *end_local_got;
15717 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15718 char *local_tls_type;
15719 bfd_vma *local_tlsdesc_gotent;
15720 bfd_size_type locsymcount;
15721 Elf_Internal_Shdr *symtab_hdr;
15722 asection *srel;
15723 bfd_boolean is_vxworks = htab->vxworks_p;
15724 unsigned int symndx;
15725
15726 if (! is_arm_elf (ibfd))
15727 continue;
15728
15729 for (s = ibfd->sections; s != NULL; s = s->next)
15730 {
15731 struct elf_dyn_relocs *p;
15732
15733 for (p = (struct elf_dyn_relocs *)
15734 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15735 {
15736 if (!bfd_is_abs_section (p->sec)
15737 && bfd_is_abs_section (p->sec->output_section))
15738 {
15739 /* Input section has been discarded, either because
15740 it is a copy of a linkonce section or due to
15741 linker script /DISCARD/, so we'll be discarding
15742 the relocs too. */
15743 }
15744 else if (is_vxworks
15745 && strcmp (p->sec->output_section->name,
15746 ".tls_vars") == 0)
15747 {
15748 /* Relocations in vxworks .tls_vars sections are
15749 handled specially by the loader. */
15750 }
15751 else if (p->count != 0)
15752 {
15753 srel = elf_section_data (p->sec)->sreloc;
15754 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15755 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15756 info->flags |= DF_TEXTREL;
15757 }
15758 }
15759 }
15760
15761 local_got = elf_local_got_refcounts (ibfd);
15762 if (!local_got)
15763 continue;
15764
15765 symtab_hdr = & elf_symtab_hdr (ibfd);
15766 locsymcount = symtab_hdr->sh_info;
15767 end_local_got = local_got + locsymcount;
15768 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15769 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15770 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15771 symndx = 0;
15772 s = htab->root.sgot;
15773 srel = htab->root.srelgot;
15774 for (; local_got < end_local_got;
15775 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15776 ++local_tlsdesc_gotent, ++symndx)
15777 {
15778 *local_tlsdesc_gotent = (bfd_vma) -1;
15779 local_iplt = *local_iplt_ptr;
15780 if (local_iplt != NULL)
15781 {
15782 struct elf_dyn_relocs *p;
15783
15784 if (local_iplt->root.refcount > 0)
15785 {
15786 elf32_arm_allocate_plt_entry (info, TRUE,
15787 &local_iplt->root,
15788 &local_iplt->arm);
15789 if (local_iplt->arm.noncall_refcount == 0)
15790 /* All references to the PLT are calls, so all
15791 non-call references can resolve directly to the
15792 run-time target. This means that the .got entry
15793 would be the same as the .igot.plt entry, so there's
15794 no point creating both. */
15795 *local_got = 0;
15796 }
15797 else
15798 {
15799 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15800 local_iplt->root.offset = (bfd_vma) -1;
15801 }
15802
15803 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15804 {
15805 asection *psrel;
15806
15807 psrel = elf_section_data (p->sec)->sreloc;
15808 if (local_iplt->arm.noncall_refcount == 0)
15809 elf32_arm_allocate_irelocs (info, psrel, p->count);
15810 else
15811 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15812 }
15813 }
15814 if (*local_got > 0)
15815 {
15816 Elf_Internal_Sym *isym;
15817
15818 *local_got = s->size;
15819 if (*local_tls_type & GOT_TLS_GD)
15820 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15821 s->size += 8;
15822 if (*local_tls_type & GOT_TLS_GDESC)
15823 {
15824 *local_tlsdesc_gotent = htab->root.sgotplt->size
15825 - elf32_arm_compute_jump_table_size (htab);
15826 htab->root.sgotplt->size += 8;
15827 *local_got = (bfd_vma) -2;
15828 /* plt.got_offset needs to know there's a TLS_DESC
15829 reloc in the middle of .got.plt. */
15830 htab->num_tls_desc++;
15831 }
15832 if (*local_tls_type & GOT_TLS_IE)
15833 s->size += 4;
15834
15835 if (*local_tls_type & GOT_NORMAL)
15836 {
15837 /* If the symbol is both GD and GDESC, *local_got
15838 may have been overwritten. */
15839 *local_got = s->size;
15840 s->size += 4;
15841 }
15842
15843 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15844 if (isym == NULL)
15845 return FALSE;
15846
15847 /* If all references to an STT_GNU_IFUNC PLT are calls,
15848 then all non-call references, including this GOT entry,
15849 resolve directly to the run-time target. */
15850 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15851 && (local_iplt == NULL
15852 || local_iplt->arm.noncall_refcount == 0))
15853 elf32_arm_allocate_irelocs (info, srel, 1);
15854 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15855 {
15856 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15857 || *local_tls_type & GOT_TLS_GD)
15858 elf32_arm_allocate_dynrelocs (info, srel, 1);
15859
15860 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15861 {
15862 elf32_arm_allocate_dynrelocs (info,
15863 htab->root.srelplt, 1);
15864 htab->tls_trampoline = -1;
15865 }
15866 }
15867 }
15868 else
15869 *local_got = (bfd_vma) -1;
15870 }
15871 }
15872
15873 if (htab->tls_ldm_got.refcount > 0)
15874 {
15875 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15876 for R_ARM_TLS_LDM32 relocations. */
15877 htab->tls_ldm_got.offset = htab->root.sgot->size;
15878 htab->root.sgot->size += 8;
15879 if (bfd_link_pic (info))
15880 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15881 }
15882 else
15883 htab->tls_ldm_got.offset = -1;
15884
15885 /* Allocate global sym .plt and .got entries, and space for global
15886 sym dynamic relocs. */
15887 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
15888
15889 /* Here we rummage through the found bfds to collect glue information. */
15890 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15891 {
15892 if (! is_arm_elf (ibfd))
15893 continue;
15894
15895 /* Initialise mapping tables for code/data. */
15896 bfd_elf32_arm_init_maps (ibfd);
15897
15898 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
15899 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
15900 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
15901 _bfd_error_handler (_("Errors encountered processing file %pB"), ibfd);
15902 }
15903
15904 /* Allocate space for the glue sections now that we've sized them. */
15905 bfd_elf32_arm_allocate_interworking_sections (info);
15906
15907 /* For every jump slot reserved in the sgotplt, reloc_count is
15908 incremented. However, when we reserve space for TLS descriptors,
15909 it's not incremented, so in order to compute the space reserved
15910 for them, it suffices to multiply the reloc count by the jump
15911 slot size. */
15912 if (htab->root.srelplt)
15913 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
15914
15915 if (htab->tls_trampoline)
15916 {
15917 if (htab->root.splt->size == 0)
15918 htab->root.splt->size += htab->plt_header_size;
15919
15920 htab->tls_trampoline = htab->root.splt->size;
15921 htab->root.splt->size += htab->plt_entry_size;
15922
15923 /* If we're not using lazy TLS relocations, don't generate the
15924 PLT and GOT entries they require. */
15925 if (!(info->flags & DF_BIND_NOW))
15926 {
15927 htab->dt_tlsdesc_got = htab->root.sgot->size;
15928 htab->root.sgot->size += 4;
15929
15930 htab->dt_tlsdesc_plt = htab->root.splt->size;
15931 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
15932 }
15933 }
15934
15935 /* The check_relocs and adjust_dynamic_symbol entry points have
15936 determined the sizes of the various dynamic sections. Allocate
15937 memory for them. */
15938 plt = FALSE;
15939 relocs = FALSE;
15940 for (s = dynobj->sections; s != NULL; s = s->next)
15941 {
15942 const char * name;
15943
15944 if ((s->flags & SEC_LINKER_CREATED) == 0)
15945 continue;
15946
15947 /* It's OK to base decisions on the section name, because none
15948 of the dynobj section names depend upon the input files. */
15949 name = bfd_get_section_name (dynobj, s);
15950
15951 if (s == htab->root.splt)
15952 {
15953 /* Remember whether there is a PLT. */
15954 plt = s->size != 0;
15955 }
15956 else if (CONST_STRNEQ (name, ".rel"))
15957 {
15958 if (s->size != 0)
15959 {
15960 /* Remember whether there are any reloc sections other
15961 than .rel(a).plt and .rela.plt.unloaded. */
15962 if (s != htab->root.srelplt && s != htab->srelplt2)
15963 relocs = TRUE;
15964
15965 /* We use the reloc_count field as a counter if we need
15966 to copy relocs into the output file. */
15967 s->reloc_count = 0;
15968 }
15969 }
15970 else if (s != htab->root.sgot
15971 && s != htab->root.sgotplt
15972 && s != htab->root.iplt
15973 && s != htab->root.igotplt
15974 && s != htab->root.sdynbss
15975 && s != htab->root.sdynrelro)
15976 {
15977 /* It's not one of our sections, so don't allocate space. */
15978 continue;
15979 }
15980
15981 if (s->size == 0)
15982 {
15983 /* If we don't need this section, strip it from the
15984 output file. This is mostly to handle .rel(a).bss and
15985 .rel(a).plt. We must create both sections in
15986 create_dynamic_sections, because they must be created
15987 before the linker maps input sections to output
15988 sections. The linker does that before
15989 adjust_dynamic_symbol is called, and it is that
15990 function which decides whether anything needs to go
15991 into these sections. */
15992 s->flags |= SEC_EXCLUDE;
15993 continue;
15994 }
15995
15996 if ((s->flags & SEC_HAS_CONTENTS) == 0)
15997 continue;
15998
15999 /* Allocate memory for the section contents. */
16000 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16001 if (s->contents == NULL)
16002 return FALSE;
16003 }
16004
16005 if (elf_hash_table (info)->dynamic_sections_created)
16006 {
16007 /* Add some entries to the .dynamic section. We fill in the
16008 values later, in elf32_arm_finish_dynamic_sections, but we
16009 must add the entries now so that we get the correct size for
16010 the .dynamic section. The DT_DEBUG entry is filled in by the
16011 dynamic linker and used by the debugger. */
16012 #define add_dynamic_entry(TAG, VAL) \
16013 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16014
16015 if (bfd_link_executable (info))
16016 {
16017 if (!add_dynamic_entry (DT_DEBUG, 0))
16018 return FALSE;
16019 }
16020
16021 if (plt)
16022 {
16023 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16024 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16025 || !add_dynamic_entry (DT_PLTREL,
16026 htab->use_rel ? DT_REL : DT_RELA)
16027 || !add_dynamic_entry (DT_JMPREL, 0))
16028 return FALSE;
16029
16030 if (htab->dt_tlsdesc_plt
16031 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16032 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16033 return FALSE;
16034 }
16035
16036 if (relocs)
16037 {
16038 if (htab->use_rel)
16039 {
16040 if (!add_dynamic_entry (DT_REL, 0)
16041 || !add_dynamic_entry (DT_RELSZ, 0)
16042 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16043 return FALSE;
16044 }
16045 else
16046 {
16047 if (!add_dynamic_entry (DT_RELA, 0)
16048 || !add_dynamic_entry (DT_RELASZ, 0)
16049 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16050 return FALSE;
16051 }
16052 }
16053
16054 /* If any dynamic relocs apply to a read-only section,
16055 then we need a DT_TEXTREL entry. */
16056 if ((info->flags & DF_TEXTREL) == 0)
16057 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
16058
16059 if ((info->flags & DF_TEXTREL) != 0)
16060 {
16061 if (!add_dynamic_entry (DT_TEXTREL, 0))
16062 return FALSE;
16063 }
16064 if (htab->vxworks_p
16065 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16066 return FALSE;
16067 }
16068 #undef add_dynamic_entry
16069
16070 return TRUE;
16071 }
16072
16073 /* Size sections even though they're not dynamic. We use it to setup
16074 _TLS_MODULE_BASE_, if needed. */
16075
16076 static bfd_boolean
16077 elf32_arm_always_size_sections (bfd *output_bfd,
16078 struct bfd_link_info *info)
16079 {
16080 asection *tls_sec;
16081
16082 if (bfd_link_relocatable (info))
16083 return TRUE;
16084
16085 tls_sec = elf_hash_table (info)->tls_sec;
16086
16087 if (tls_sec)
16088 {
16089 struct elf_link_hash_entry *tlsbase;
16090
16091 tlsbase = elf_link_hash_lookup
16092 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16093
16094 if (tlsbase)
16095 {
16096 struct bfd_link_hash_entry *bh = NULL;
16097 const struct elf_backend_data *bed
16098 = get_elf_backend_data (output_bfd);
16099
16100 if (!(_bfd_generic_link_add_one_symbol
16101 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16102 tls_sec, 0, NULL, FALSE,
16103 bed->collect, &bh)))
16104 return FALSE;
16105
16106 tlsbase->type = STT_TLS;
16107 tlsbase = (struct elf_link_hash_entry *)bh;
16108 tlsbase->def_regular = 1;
16109 tlsbase->other = STV_HIDDEN;
16110 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16111 }
16112 }
16113 return TRUE;
16114 }
16115
16116 /* Finish up dynamic symbol handling. We set the contents of various
16117 dynamic sections here. */
16118
16119 static bfd_boolean
16120 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16121 struct bfd_link_info * info,
16122 struct elf_link_hash_entry * h,
16123 Elf_Internal_Sym * sym)
16124 {
16125 struct elf32_arm_link_hash_table *htab;
16126 struct elf32_arm_link_hash_entry *eh;
16127
16128 htab = elf32_arm_hash_table (info);
16129 if (htab == NULL)
16130 return FALSE;
16131
16132 eh = (struct elf32_arm_link_hash_entry *) h;
16133
16134 if (h->plt.offset != (bfd_vma) -1)
16135 {
16136 if (!eh->is_iplt)
16137 {
16138 BFD_ASSERT (h->dynindx != -1);
16139 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16140 h->dynindx, 0))
16141 return FALSE;
16142 }
16143
16144 if (!h->def_regular)
16145 {
16146 /* Mark the symbol as undefined, rather than as defined in
16147 the .plt section. */
16148 sym->st_shndx = SHN_UNDEF;
16149 /* If the symbol is weak we need to clear the value.
16150 Otherwise, the PLT entry would provide a definition for
16151 the symbol even if the symbol wasn't defined anywhere,
16152 and so the symbol would never be NULL. Leave the value if
16153 there were any relocations where pointer equality matters
16154 (this is a clue for the dynamic linker, to make function
16155 pointer comparisons work between an application and shared
16156 library). */
16157 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16158 sym->st_value = 0;
16159 }
16160 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16161 {
16162 /* At least one non-call relocation references this .iplt entry,
16163 so the .iplt entry is the function's canonical address. */
16164 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16165 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16166 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16167 (output_bfd, htab->root.iplt->output_section));
16168 sym->st_value = (h->plt.offset
16169 + htab->root.iplt->output_section->vma
16170 + htab->root.iplt->output_offset);
16171 }
16172 }
16173
16174 if (h->needs_copy)
16175 {
16176 asection * s;
16177 Elf_Internal_Rela rel;
16178
16179 /* This symbol needs a copy reloc. Set it up. */
16180 BFD_ASSERT (h->dynindx != -1
16181 && (h->root.type == bfd_link_hash_defined
16182 || h->root.type == bfd_link_hash_defweak));
16183
16184 rel.r_addend = 0;
16185 rel.r_offset = (h->root.u.def.value
16186 + h->root.u.def.section->output_section->vma
16187 + h->root.u.def.section->output_offset);
16188 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16189 if (h->root.u.def.section == htab->root.sdynrelro)
16190 s = htab->root.sreldynrelro;
16191 else
16192 s = htab->root.srelbss;
16193 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16194 }
16195
16196 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16197 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16198 to the ".got" section. */
16199 if (h == htab->root.hdynamic
16200 || (!htab->vxworks_p && h == htab->root.hgot))
16201 sym->st_shndx = SHN_ABS;
16202
16203 return TRUE;
16204 }
16205
16206 static void
16207 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16208 void *contents,
16209 const unsigned long *template, unsigned count)
16210 {
16211 unsigned ix;
16212
16213 for (ix = 0; ix != count; ix++)
16214 {
16215 unsigned long insn = template[ix];
16216
16217 /* Emit mov pc,rx if bx is not permitted. */
16218 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16219 insn = (insn & 0xf000000f) | 0x01a0f000;
16220 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16221 }
16222 }
16223
16224 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16225 other variants, NaCl needs this entry in a static executable's
16226 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16227 zero. For .iplt really only the last bundle is useful, and .iplt
16228 could have a shorter first entry, with each individual PLT entry's
16229 relative branch calculated differently so it targets the last
16230 bundle instead of the instruction before it (labelled .Lplt_tail
16231 above). But it's simpler to keep the size and layout of PLT0
16232 consistent with the dynamic case, at the cost of some dead code at
16233 the start of .iplt and the one dead store to the stack at the start
16234 of .Lplt_tail. */
16235 static void
16236 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16237 asection *plt, bfd_vma got_displacement)
16238 {
16239 unsigned int i;
16240
16241 put_arm_insn (htab, output_bfd,
16242 elf32_arm_nacl_plt0_entry[0]
16243 | arm_movw_immediate (got_displacement),
16244 plt->contents + 0);
16245 put_arm_insn (htab, output_bfd,
16246 elf32_arm_nacl_plt0_entry[1]
16247 | arm_movt_immediate (got_displacement),
16248 plt->contents + 4);
16249
16250 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16251 put_arm_insn (htab, output_bfd,
16252 elf32_arm_nacl_plt0_entry[i],
16253 plt->contents + (i * 4));
16254 }
16255
16256 /* Finish up the dynamic sections. */
16257
16258 static bfd_boolean
16259 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16260 {
16261 bfd * dynobj;
16262 asection * sgot;
16263 asection * sdyn;
16264 struct elf32_arm_link_hash_table *htab;
16265
16266 htab = elf32_arm_hash_table (info);
16267 if (htab == NULL)
16268 return FALSE;
16269
16270 dynobj = elf_hash_table (info)->dynobj;
16271
16272 sgot = htab->root.sgotplt;
16273 /* A broken linker script might have discarded the dynamic sections.
16274 Catch this here so that we do not seg-fault later on. */
16275 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16276 return FALSE;
16277 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16278
16279 if (elf_hash_table (info)->dynamic_sections_created)
16280 {
16281 asection *splt;
16282 Elf32_External_Dyn *dyncon, *dynconend;
16283
16284 splt = htab->root.splt;
16285 BFD_ASSERT (splt != NULL && sdyn != NULL);
16286 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16287
16288 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16289 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16290
16291 for (; dyncon < dynconend; dyncon++)
16292 {
16293 Elf_Internal_Dyn dyn;
16294 const char * name;
16295 asection * s;
16296
16297 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16298
16299 switch (dyn.d_tag)
16300 {
16301 unsigned int type;
16302
16303 default:
16304 if (htab->vxworks_p
16305 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16306 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16307 break;
16308
16309 case DT_HASH:
16310 name = ".hash";
16311 goto get_vma_if_bpabi;
16312 case DT_STRTAB:
16313 name = ".dynstr";
16314 goto get_vma_if_bpabi;
16315 case DT_SYMTAB:
16316 name = ".dynsym";
16317 goto get_vma_if_bpabi;
16318 case DT_VERSYM:
16319 name = ".gnu.version";
16320 goto get_vma_if_bpabi;
16321 case DT_VERDEF:
16322 name = ".gnu.version_d";
16323 goto get_vma_if_bpabi;
16324 case DT_VERNEED:
16325 name = ".gnu.version_r";
16326 goto get_vma_if_bpabi;
16327
16328 case DT_PLTGOT:
16329 name = htab->symbian_p ? ".got" : ".got.plt";
16330 goto get_vma;
16331 case DT_JMPREL:
16332 name = RELOC_SECTION (htab, ".plt");
16333 get_vma:
16334 s = bfd_get_linker_section (dynobj, name);
16335 if (s == NULL)
16336 {
16337 _bfd_error_handler
16338 (_("could not find section %s"), name);
16339 bfd_set_error (bfd_error_invalid_operation);
16340 return FALSE;
16341 }
16342 if (!htab->symbian_p)
16343 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16344 else
16345 /* In the BPABI, tags in the PT_DYNAMIC section point
16346 at the file offset, not the memory address, for the
16347 convenience of the post linker. */
16348 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16349 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16350 break;
16351
16352 get_vma_if_bpabi:
16353 if (htab->symbian_p)
16354 goto get_vma;
16355 break;
16356
16357 case DT_PLTRELSZ:
16358 s = htab->root.srelplt;
16359 BFD_ASSERT (s != NULL);
16360 dyn.d_un.d_val = s->size;
16361 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16362 break;
16363
16364 case DT_RELSZ:
16365 case DT_RELASZ:
16366 case DT_REL:
16367 case DT_RELA:
16368 /* In the BPABI, the DT_REL tag must point at the file
16369 offset, not the VMA, of the first relocation
16370 section. So, we use code similar to that in
16371 elflink.c, but do not check for SHF_ALLOC on the
16372 relocation section, since relocation sections are
16373 never allocated under the BPABI. PLT relocs are also
16374 included. */
16375 if (htab->symbian_p)
16376 {
16377 unsigned int i;
16378 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16379 ? SHT_REL : SHT_RELA);
16380 dyn.d_un.d_val = 0;
16381 for (i = 1; i < elf_numsections (output_bfd); i++)
16382 {
16383 Elf_Internal_Shdr *hdr
16384 = elf_elfsections (output_bfd)[i];
16385 if (hdr->sh_type == type)
16386 {
16387 if (dyn.d_tag == DT_RELSZ
16388 || dyn.d_tag == DT_RELASZ)
16389 dyn.d_un.d_val += hdr->sh_size;
16390 else if ((ufile_ptr) hdr->sh_offset
16391 <= dyn.d_un.d_val - 1)
16392 dyn.d_un.d_val = hdr->sh_offset;
16393 }
16394 }
16395 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16396 }
16397 break;
16398
16399 case DT_TLSDESC_PLT:
16400 s = htab->root.splt;
16401 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16402 + htab->dt_tlsdesc_plt);
16403 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16404 break;
16405
16406 case DT_TLSDESC_GOT:
16407 s = htab->root.sgot;
16408 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16409 + htab->dt_tlsdesc_got);
16410 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16411 break;
16412
16413 /* Set the bottom bit of DT_INIT/FINI if the
16414 corresponding function is Thumb. */
16415 case DT_INIT:
16416 name = info->init_function;
16417 goto get_sym;
16418 case DT_FINI:
16419 name = info->fini_function;
16420 get_sym:
16421 /* If it wasn't set by elf_bfd_final_link
16422 then there is nothing to adjust. */
16423 if (dyn.d_un.d_val != 0)
16424 {
16425 struct elf_link_hash_entry * eh;
16426
16427 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16428 FALSE, FALSE, TRUE);
16429 if (eh != NULL
16430 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16431 == ST_BRANCH_TO_THUMB)
16432 {
16433 dyn.d_un.d_val |= 1;
16434 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16435 }
16436 }
16437 break;
16438 }
16439 }
16440
16441 /* Fill in the first entry in the procedure linkage table. */
16442 if (splt->size > 0 && htab->plt_header_size)
16443 {
16444 const bfd_vma *plt0_entry;
16445 bfd_vma got_address, plt_address, got_displacement;
16446
16447 /* Calculate the addresses of the GOT and PLT. */
16448 got_address = sgot->output_section->vma + sgot->output_offset;
16449 plt_address = splt->output_section->vma + splt->output_offset;
16450
16451 if (htab->vxworks_p)
16452 {
16453 /* The VxWorks GOT is relocated by the dynamic linker.
16454 Therefore, we must emit relocations rather than simply
16455 computing the values now. */
16456 Elf_Internal_Rela rel;
16457
16458 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16459 put_arm_insn (htab, output_bfd, plt0_entry[0],
16460 splt->contents + 0);
16461 put_arm_insn (htab, output_bfd, plt0_entry[1],
16462 splt->contents + 4);
16463 put_arm_insn (htab, output_bfd, plt0_entry[2],
16464 splt->contents + 8);
16465 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16466
16467 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16468 rel.r_offset = plt_address + 12;
16469 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16470 rel.r_addend = 0;
16471 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16472 htab->srelplt2->contents);
16473 }
16474 else if (htab->nacl_p)
16475 arm_nacl_put_plt0 (htab, output_bfd, splt,
16476 got_address + 8 - (plt_address + 16));
16477 else if (using_thumb_only (htab))
16478 {
16479 got_displacement = got_address - (plt_address + 12);
16480
16481 plt0_entry = elf32_thumb2_plt0_entry;
16482 put_arm_insn (htab, output_bfd, plt0_entry[0],
16483 splt->contents + 0);
16484 put_arm_insn (htab, output_bfd, plt0_entry[1],
16485 splt->contents + 4);
16486 put_arm_insn (htab, output_bfd, plt0_entry[2],
16487 splt->contents + 8);
16488
16489 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16490 }
16491 else
16492 {
16493 got_displacement = got_address - (plt_address + 16);
16494
16495 plt0_entry = elf32_arm_plt0_entry;
16496 put_arm_insn (htab, output_bfd, plt0_entry[0],
16497 splt->contents + 0);
16498 put_arm_insn (htab, output_bfd, plt0_entry[1],
16499 splt->contents + 4);
16500 put_arm_insn (htab, output_bfd, plt0_entry[2],
16501 splt->contents + 8);
16502 put_arm_insn (htab, output_bfd, plt0_entry[3],
16503 splt->contents + 12);
16504
16505 #ifdef FOUR_WORD_PLT
16506 /* The displacement value goes in the otherwise-unused
16507 last word of the second entry. */
16508 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16509 #else
16510 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16511 #endif
16512 }
16513 }
16514
16515 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16516 really seem like the right value. */
16517 if (splt->output_section->owner == output_bfd)
16518 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16519
16520 if (htab->dt_tlsdesc_plt)
16521 {
16522 bfd_vma got_address
16523 = sgot->output_section->vma + sgot->output_offset;
16524 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16525 + htab->root.sgot->output_offset);
16526 bfd_vma plt_address
16527 = splt->output_section->vma + splt->output_offset;
16528
16529 arm_put_trampoline (htab, output_bfd,
16530 splt->contents + htab->dt_tlsdesc_plt,
16531 dl_tlsdesc_lazy_trampoline, 6);
16532
16533 bfd_put_32 (output_bfd,
16534 gotplt_address + htab->dt_tlsdesc_got
16535 - (plt_address + htab->dt_tlsdesc_plt)
16536 - dl_tlsdesc_lazy_trampoline[6],
16537 splt->contents + htab->dt_tlsdesc_plt + 24);
16538 bfd_put_32 (output_bfd,
16539 got_address - (plt_address + htab->dt_tlsdesc_plt)
16540 - dl_tlsdesc_lazy_trampoline[7],
16541 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16542 }
16543
16544 if (htab->tls_trampoline)
16545 {
16546 arm_put_trampoline (htab, output_bfd,
16547 splt->contents + htab->tls_trampoline,
16548 tls_trampoline, 3);
16549 #ifdef FOUR_WORD_PLT
16550 bfd_put_32 (output_bfd, 0x00000000,
16551 splt->contents + htab->tls_trampoline + 12);
16552 #endif
16553 }
16554
16555 if (htab->vxworks_p
16556 && !bfd_link_pic (info)
16557 && htab->root.splt->size > 0)
16558 {
16559 /* Correct the .rel(a).plt.unloaded relocations. They will have
16560 incorrect symbol indexes. */
16561 int num_plts;
16562 unsigned char *p;
16563
16564 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16565 / htab->plt_entry_size);
16566 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16567
16568 for (; num_plts; num_plts--)
16569 {
16570 Elf_Internal_Rela rel;
16571
16572 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16573 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16574 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16575 p += RELOC_SIZE (htab);
16576
16577 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16578 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16579 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16580 p += RELOC_SIZE (htab);
16581 }
16582 }
16583 }
16584
16585 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16586 /* NaCl uses a special first entry in .iplt too. */
16587 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16588
16589 /* Fill in the first three entries in the global offset table. */
16590 if (sgot)
16591 {
16592 if (sgot->size > 0)
16593 {
16594 if (sdyn == NULL)
16595 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16596 else
16597 bfd_put_32 (output_bfd,
16598 sdyn->output_section->vma + sdyn->output_offset,
16599 sgot->contents);
16600 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16601 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16602 }
16603
16604 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16605 }
16606
16607 return TRUE;
16608 }
16609
16610 static void
16611 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16612 {
16613 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16614 struct elf32_arm_link_hash_table *globals;
16615 struct elf_segment_map *m;
16616
16617 i_ehdrp = elf_elfheader (abfd);
16618
16619 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16620 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16621 else
16622 _bfd_elf_post_process_headers (abfd, link_info);
16623 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16624
16625 if (link_info)
16626 {
16627 globals = elf32_arm_hash_table (link_info);
16628 if (globals != NULL && globals->byteswap_code)
16629 i_ehdrp->e_flags |= EF_ARM_BE8;
16630 }
16631
16632 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16633 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16634 {
16635 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16636 if (abi == AEABI_VFP_args_vfp)
16637 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16638 else
16639 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16640 }
16641
16642 /* Scan segment to set p_flags attribute if it contains only sections with
16643 SHF_ARM_PURECODE flag. */
16644 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16645 {
16646 unsigned int j;
16647
16648 if (m->count == 0)
16649 continue;
16650 for (j = 0; j < m->count; j++)
16651 {
16652 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16653 break;
16654 }
16655 if (j == m->count)
16656 {
16657 m->p_flags = PF_X;
16658 m->p_flags_valid = 1;
16659 }
16660 }
16661 }
16662
16663 static enum elf_reloc_type_class
16664 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16665 const asection *rel_sec ATTRIBUTE_UNUSED,
16666 const Elf_Internal_Rela *rela)
16667 {
16668 switch ((int) ELF32_R_TYPE (rela->r_info))
16669 {
16670 case R_ARM_RELATIVE:
16671 return reloc_class_relative;
16672 case R_ARM_JUMP_SLOT:
16673 return reloc_class_plt;
16674 case R_ARM_COPY:
16675 return reloc_class_copy;
16676 case R_ARM_IRELATIVE:
16677 return reloc_class_ifunc;
16678 default:
16679 return reloc_class_normal;
16680 }
16681 }
16682
16683 static void
16684 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16685 {
16686 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16687 }
16688
16689 /* Return TRUE if this is an unwinding table entry. */
16690
16691 static bfd_boolean
16692 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16693 {
16694 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16695 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16696 }
16697
16698
16699 /* Set the type and flags for an ARM section. We do this by
16700 the section name, which is a hack, but ought to work. */
16701
16702 static bfd_boolean
16703 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16704 {
16705 const char * name;
16706
16707 name = bfd_get_section_name (abfd, sec);
16708
16709 if (is_arm_elf_unwind_section_name (abfd, name))
16710 {
16711 hdr->sh_type = SHT_ARM_EXIDX;
16712 hdr->sh_flags |= SHF_LINK_ORDER;
16713 }
16714
16715 if (sec->flags & SEC_ELF_PURECODE)
16716 hdr->sh_flags |= SHF_ARM_PURECODE;
16717
16718 return TRUE;
16719 }
16720
16721 /* Handle an ARM specific section when reading an object file. This is
16722 called when bfd_section_from_shdr finds a section with an unknown
16723 type. */
16724
16725 static bfd_boolean
16726 elf32_arm_section_from_shdr (bfd *abfd,
16727 Elf_Internal_Shdr * hdr,
16728 const char *name,
16729 int shindex)
16730 {
16731 /* There ought to be a place to keep ELF backend specific flags, but
16732 at the moment there isn't one. We just keep track of the
16733 sections by their name, instead. Fortunately, the ABI gives
16734 names for all the ARM specific sections, so we will probably get
16735 away with this. */
16736 switch (hdr->sh_type)
16737 {
16738 case SHT_ARM_EXIDX:
16739 case SHT_ARM_PREEMPTMAP:
16740 case SHT_ARM_ATTRIBUTES:
16741 break;
16742
16743 default:
16744 return FALSE;
16745 }
16746
16747 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16748 return FALSE;
16749
16750 return TRUE;
16751 }
16752
16753 static _arm_elf_section_data *
16754 get_arm_elf_section_data (asection * sec)
16755 {
16756 if (sec && sec->owner && is_arm_elf (sec->owner))
16757 return elf32_arm_section_data (sec);
16758 else
16759 return NULL;
16760 }
16761
16762 typedef struct
16763 {
16764 void *flaginfo;
16765 struct bfd_link_info *info;
16766 asection *sec;
16767 int sec_shndx;
16768 int (*func) (void *, const char *, Elf_Internal_Sym *,
16769 asection *, struct elf_link_hash_entry *);
16770 } output_arch_syminfo;
16771
16772 enum map_symbol_type
16773 {
16774 ARM_MAP_ARM,
16775 ARM_MAP_THUMB,
16776 ARM_MAP_DATA
16777 };
16778
16779
16780 /* Output a single mapping symbol. */
16781
16782 static bfd_boolean
16783 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16784 enum map_symbol_type type,
16785 bfd_vma offset)
16786 {
16787 static const char *names[3] = {"$a", "$t", "$d"};
16788 Elf_Internal_Sym sym;
16789
16790 sym.st_value = osi->sec->output_section->vma
16791 + osi->sec->output_offset
16792 + offset;
16793 sym.st_size = 0;
16794 sym.st_other = 0;
16795 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16796 sym.st_shndx = osi->sec_shndx;
16797 sym.st_target_internal = 0;
16798 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16799 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16800 }
16801
16802 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16803 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16804
16805 static bfd_boolean
16806 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16807 bfd_boolean is_iplt_entry_p,
16808 union gotplt_union *root_plt,
16809 struct arm_plt_info *arm_plt)
16810 {
16811 struct elf32_arm_link_hash_table *htab;
16812 bfd_vma addr, plt_header_size;
16813
16814 if (root_plt->offset == (bfd_vma) -1)
16815 return TRUE;
16816
16817 htab = elf32_arm_hash_table (osi->info);
16818 if (htab == NULL)
16819 return FALSE;
16820
16821 if (is_iplt_entry_p)
16822 {
16823 osi->sec = htab->root.iplt;
16824 plt_header_size = 0;
16825 }
16826 else
16827 {
16828 osi->sec = htab->root.splt;
16829 plt_header_size = htab->plt_header_size;
16830 }
16831 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16832 (osi->info->output_bfd, osi->sec->output_section));
16833
16834 addr = root_plt->offset & -2;
16835 if (htab->symbian_p)
16836 {
16837 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16838 return FALSE;
16839 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16840 return FALSE;
16841 }
16842 else if (htab->vxworks_p)
16843 {
16844 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16845 return FALSE;
16846 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16847 return FALSE;
16848 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16849 return FALSE;
16850 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16851 return FALSE;
16852 }
16853 else if (htab->nacl_p)
16854 {
16855 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16856 return FALSE;
16857 }
16858 else if (using_thumb_only (htab))
16859 {
16860 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16861 return FALSE;
16862 }
16863 else
16864 {
16865 bfd_boolean thumb_stub_p;
16866
16867 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
16868 if (thumb_stub_p)
16869 {
16870 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
16871 return FALSE;
16872 }
16873 #ifdef FOUR_WORD_PLT
16874 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16875 return FALSE;
16876 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
16877 return FALSE;
16878 #else
16879 /* A three-word PLT with no Thumb thunk contains only Arm code,
16880 so only need to output a mapping symbol for the first PLT entry and
16881 entries with thumb thunks. */
16882 if (thumb_stub_p || addr == plt_header_size)
16883 {
16884 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16885 return FALSE;
16886 }
16887 #endif
16888 }
16889
16890 return TRUE;
16891 }
16892
16893 /* Output mapping symbols for PLT entries associated with H. */
16894
16895 static bfd_boolean
16896 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
16897 {
16898 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
16899 struct elf32_arm_link_hash_entry *eh;
16900
16901 if (h->root.type == bfd_link_hash_indirect)
16902 return TRUE;
16903
16904 if (h->root.type == bfd_link_hash_warning)
16905 /* When warning symbols are created, they **replace** the "real"
16906 entry in the hash table, thus we never get to see the real
16907 symbol in a hash traversal. So look at it now. */
16908 h = (struct elf_link_hash_entry *) h->root.u.i.link;
16909
16910 eh = (struct elf32_arm_link_hash_entry *) h;
16911 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
16912 &h->plt, &eh->plt);
16913 }
16914
16915 /* Bind a veneered symbol to its veneer identified by its hash entry
16916 STUB_ENTRY. The veneered location thus loose its symbol. */
16917
16918 static void
16919 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
16920 {
16921 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
16922
16923 BFD_ASSERT (hash);
16924 hash->root.root.u.def.section = stub_entry->stub_sec;
16925 hash->root.root.u.def.value = stub_entry->stub_offset;
16926 hash->root.size = stub_entry->stub_size;
16927 }
16928
16929 /* Output a single local symbol for a generated stub. */
16930
16931 static bfd_boolean
16932 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
16933 bfd_vma offset, bfd_vma size)
16934 {
16935 Elf_Internal_Sym sym;
16936
16937 sym.st_value = osi->sec->output_section->vma
16938 + osi->sec->output_offset
16939 + offset;
16940 sym.st_size = size;
16941 sym.st_other = 0;
16942 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16943 sym.st_shndx = osi->sec_shndx;
16944 sym.st_target_internal = 0;
16945 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
16946 }
16947
16948 static bfd_boolean
16949 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
16950 void * in_arg)
16951 {
16952 struct elf32_arm_stub_hash_entry *stub_entry;
16953 asection *stub_sec;
16954 bfd_vma addr;
16955 char *stub_name;
16956 output_arch_syminfo *osi;
16957 const insn_sequence *template_sequence;
16958 enum stub_insn_type prev_type;
16959 int size;
16960 int i;
16961 enum map_symbol_type sym_type;
16962
16963 /* Massage our args to the form they really have. */
16964 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16965 osi = (output_arch_syminfo *) in_arg;
16966
16967 stub_sec = stub_entry->stub_sec;
16968
16969 /* Ensure this stub is attached to the current section being
16970 processed. */
16971 if (stub_sec != osi->sec)
16972 return TRUE;
16973
16974 addr = (bfd_vma) stub_entry->stub_offset;
16975 template_sequence = stub_entry->stub_template;
16976
16977 if (arm_stub_sym_claimed (stub_entry->stub_type))
16978 arm_stub_claim_sym (stub_entry);
16979 else
16980 {
16981 stub_name = stub_entry->output_name;
16982 switch (template_sequence[0].type)
16983 {
16984 case ARM_TYPE:
16985 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
16986 stub_entry->stub_size))
16987 return FALSE;
16988 break;
16989 case THUMB16_TYPE:
16990 case THUMB32_TYPE:
16991 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
16992 stub_entry->stub_size))
16993 return FALSE;
16994 break;
16995 default:
16996 BFD_FAIL ();
16997 return 0;
16998 }
16999 }
17000
17001 prev_type = DATA_TYPE;
17002 size = 0;
17003 for (i = 0; i < stub_entry->stub_template_size; i++)
17004 {
17005 switch (template_sequence[i].type)
17006 {
17007 case ARM_TYPE:
17008 sym_type = ARM_MAP_ARM;
17009 break;
17010
17011 case THUMB16_TYPE:
17012 case THUMB32_TYPE:
17013 sym_type = ARM_MAP_THUMB;
17014 break;
17015
17016 case DATA_TYPE:
17017 sym_type = ARM_MAP_DATA;
17018 break;
17019
17020 default:
17021 BFD_FAIL ();
17022 return FALSE;
17023 }
17024
17025 if (template_sequence[i].type != prev_type)
17026 {
17027 prev_type = template_sequence[i].type;
17028 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17029 return FALSE;
17030 }
17031
17032 switch (template_sequence[i].type)
17033 {
17034 case ARM_TYPE:
17035 case THUMB32_TYPE:
17036 size += 4;
17037 break;
17038
17039 case THUMB16_TYPE:
17040 size += 2;
17041 break;
17042
17043 case DATA_TYPE:
17044 size += 4;
17045 break;
17046
17047 default:
17048 BFD_FAIL ();
17049 return FALSE;
17050 }
17051 }
17052
17053 return TRUE;
17054 }
17055
17056 /* Output mapping symbols for linker generated sections,
17057 and for those data-only sections that do not have a
17058 $d. */
17059
17060 static bfd_boolean
17061 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17062 struct bfd_link_info *info,
17063 void *flaginfo,
17064 int (*func) (void *, const char *,
17065 Elf_Internal_Sym *,
17066 asection *,
17067 struct elf_link_hash_entry *))
17068 {
17069 output_arch_syminfo osi;
17070 struct elf32_arm_link_hash_table *htab;
17071 bfd_vma offset;
17072 bfd_size_type size;
17073 bfd *input_bfd;
17074
17075 htab = elf32_arm_hash_table (info);
17076 if (htab == NULL)
17077 return FALSE;
17078
17079 check_use_blx (htab);
17080
17081 osi.flaginfo = flaginfo;
17082 osi.info = info;
17083 osi.func = func;
17084
17085 /* Add a $d mapping symbol to data-only sections that
17086 don't have any mapping symbol. This may result in (harmless) redundant
17087 mapping symbols. */
17088 for (input_bfd = info->input_bfds;
17089 input_bfd != NULL;
17090 input_bfd = input_bfd->link.next)
17091 {
17092 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17093 for (osi.sec = input_bfd->sections;
17094 osi.sec != NULL;
17095 osi.sec = osi.sec->next)
17096 {
17097 if (osi.sec->output_section != NULL
17098 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17099 != 0)
17100 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17101 == SEC_HAS_CONTENTS
17102 && get_arm_elf_section_data (osi.sec) != NULL
17103 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17104 && osi.sec->size > 0
17105 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17106 {
17107 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17108 (output_bfd, osi.sec->output_section);
17109 if (osi.sec_shndx != (int)SHN_BAD)
17110 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17111 }
17112 }
17113 }
17114
17115 /* ARM->Thumb glue. */
17116 if (htab->arm_glue_size > 0)
17117 {
17118 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17119 ARM2THUMB_GLUE_SECTION_NAME);
17120
17121 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17122 (output_bfd, osi.sec->output_section);
17123 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17124 || htab->pic_veneer)
17125 size = ARM2THUMB_PIC_GLUE_SIZE;
17126 else if (htab->use_blx)
17127 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17128 else
17129 size = ARM2THUMB_STATIC_GLUE_SIZE;
17130
17131 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17132 {
17133 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17134 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17135 }
17136 }
17137
17138 /* Thumb->ARM glue. */
17139 if (htab->thumb_glue_size > 0)
17140 {
17141 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17142 THUMB2ARM_GLUE_SECTION_NAME);
17143
17144 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17145 (output_bfd, osi.sec->output_section);
17146 size = THUMB2ARM_GLUE_SIZE;
17147
17148 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17149 {
17150 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17151 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17152 }
17153 }
17154
17155 /* ARMv4 BX veneers. */
17156 if (htab->bx_glue_size > 0)
17157 {
17158 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17159 ARM_BX_GLUE_SECTION_NAME);
17160
17161 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17162 (output_bfd, osi.sec->output_section);
17163
17164 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17165 }
17166
17167 /* Long calls stubs. */
17168 if (htab->stub_bfd && htab->stub_bfd->sections)
17169 {
17170 asection* stub_sec;
17171
17172 for (stub_sec = htab->stub_bfd->sections;
17173 stub_sec != NULL;
17174 stub_sec = stub_sec->next)
17175 {
17176 /* Ignore non-stub sections. */
17177 if (!strstr (stub_sec->name, STUB_SUFFIX))
17178 continue;
17179
17180 osi.sec = stub_sec;
17181
17182 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17183 (output_bfd, osi.sec->output_section);
17184
17185 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17186 }
17187 }
17188
17189 /* Finally, output mapping symbols for the PLT. */
17190 if (htab->root.splt && htab->root.splt->size > 0)
17191 {
17192 osi.sec = htab->root.splt;
17193 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17194 (output_bfd, osi.sec->output_section));
17195
17196 /* Output mapping symbols for the plt header. SymbianOS does not have a
17197 plt header. */
17198 if (htab->vxworks_p)
17199 {
17200 /* VxWorks shared libraries have no PLT header. */
17201 if (!bfd_link_pic (info))
17202 {
17203 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17204 return FALSE;
17205 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17206 return FALSE;
17207 }
17208 }
17209 else if (htab->nacl_p)
17210 {
17211 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17212 return FALSE;
17213 }
17214 else if (using_thumb_only (htab))
17215 {
17216 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17217 return FALSE;
17218 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17219 return FALSE;
17220 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17221 return FALSE;
17222 }
17223 else if (!htab->symbian_p)
17224 {
17225 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17226 return FALSE;
17227 #ifndef FOUR_WORD_PLT
17228 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17229 return FALSE;
17230 #endif
17231 }
17232 }
17233 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17234 {
17235 /* NaCl uses a special first entry in .iplt too. */
17236 osi.sec = htab->root.iplt;
17237 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17238 (output_bfd, osi.sec->output_section));
17239 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17240 return FALSE;
17241 }
17242 if ((htab->root.splt && htab->root.splt->size > 0)
17243 || (htab->root.iplt && htab->root.iplt->size > 0))
17244 {
17245 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17246 for (input_bfd = info->input_bfds;
17247 input_bfd != NULL;
17248 input_bfd = input_bfd->link.next)
17249 {
17250 struct arm_local_iplt_info **local_iplt;
17251 unsigned int i, num_syms;
17252
17253 local_iplt = elf32_arm_local_iplt (input_bfd);
17254 if (local_iplt != NULL)
17255 {
17256 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17257 for (i = 0; i < num_syms; i++)
17258 if (local_iplt[i] != NULL
17259 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17260 &local_iplt[i]->root,
17261 &local_iplt[i]->arm))
17262 return FALSE;
17263 }
17264 }
17265 }
17266 if (htab->dt_tlsdesc_plt != 0)
17267 {
17268 /* Mapping symbols for the lazy tls trampoline. */
17269 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17270 return FALSE;
17271
17272 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17273 htab->dt_tlsdesc_plt + 24))
17274 return FALSE;
17275 }
17276 if (htab->tls_trampoline != 0)
17277 {
17278 /* Mapping symbols for the tls trampoline. */
17279 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17280 return FALSE;
17281 #ifdef FOUR_WORD_PLT
17282 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17283 htab->tls_trampoline + 12))
17284 return FALSE;
17285 #endif
17286 }
17287
17288 return TRUE;
17289 }
17290
17291 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17292 the import library. All SYMCOUNT symbols of ABFD can be examined
17293 from their pointers in SYMS. Pointers of symbols to keep should be
17294 stored continuously at the beginning of that array.
17295
17296 Returns the number of symbols to keep. */
17297
17298 static unsigned int
17299 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17300 struct bfd_link_info *info,
17301 asymbol **syms, long symcount)
17302 {
17303 size_t maxnamelen;
17304 char *cmse_name;
17305 long src_count, dst_count = 0;
17306 struct elf32_arm_link_hash_table *htab;
17307
17308 htab = elf32_arm_hash_table (info);
17309 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17310 symcount = 0;
17311
17312 maxnamelen = 128;
17313 cmse_name = (char *) bfd_malloc (maxnamelen);
17314 for (src_count = 0; src_count < symcount; src_count++)
17315 {
17316 struct elf32_arm_link_hash_entry *cmse_hash;
17317 asymbol *sym;
17318 flagword flags;
17319 char *name;
17320 size_t namelen;
17321
17322 sym = syms[src_count];
17323 flags = sym->flags;
17324 name = (char *) bfd_asymbol_name (sym);
17325
17326 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17327 continue;
17328 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17329 continue;
17330
17331 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17332 if (namelen > maxnamelen)
17333 {
17334 cmse_name = (char *)
17335 bfd_realloc (cmse_name, namelen);
17336 maxnamelen = namelen;
17337 }
17338 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17339 cmse_hash = (struct elf32_arm_link_hash_entry *)
17340 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17341
17342 if (!cmse_hash
17343 || (cmse_hash->root.root.type != bfd_link_hash_defined
17344 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17345 || cmse_hash->root.type != STT_FUNC)
17346 continue;
17347
17348 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17349 continue;
17350
17351 syms[dst_count++] = sym;
17352 }
17353 free (cmse_name);
17354
17355 syms[dst_count] = NULL;
17356
17357 return dst_count;
17358 }
17359
17360 /* Filter symbols of ABFD to include in the import library. All
17361 SYMCOUNT symbols of ABFD can be examined from their pointers in
17362 SYMS. Pointers of symbols to keep should be stored continuously at
17363 the beginning of that array.
17364
17365 Returns the number of symbols to keep. */
17366
17367 static unsigned int
17368 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17369 struct bfd_link_info *info,
17370 asymbol **syms, long symcount)
17371 {
17372 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17373
17374 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17375 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17376 library to be a relocatable object file. */
17377 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
17378 if (globals->cmse_implib)
17379 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17380 else
17381 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17382 }
17383
17384 /* Allocate target specific section data. */
17385
17386 static bfd_boolean
17387 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17388 {
17389 if (!sec->used_by_bfd)
17390 {
17391 _arm_elf_section_data *sdata;
17392 bfd_size_type amt = sizeof (*sdata);
17393
17394 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17395 if (sdata == NULL)
17396 return FALSE;
17397 sec->used_by_bfd = sdata;
17398 }
17399
17400 return _bfd_elf_new_section_hook (abfd, sec);
17401 }
17402
17403
17404 /* Used to order a list of mapping symbols by address. */
17405
17406 static int
17407 elf32_arm_compare_mapping (const void * a, const void * b)
17408 {
17409 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17410 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17411
17412 if (amap->vma > bmap->vma)
17413 return 1;
17414 else if (amap->vma < bmap->vma)
17415 return -1;
17416 else if (amap->type > bmap->type)
17417 /* Ensure results do not depend on the host qsort for objects with
17418 multiple mapping symbols at the same address by sorting on type
17419 after vma. */
17420 return 1;
17421 else if (amap->type < bmap->type)
17422 return -1;
17423 else
17424 return 0;
17425 }
17426
17427 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17428
17429 static unsigned long
17430 offset_prel31 (unsigned long addr, bfd_vma offset)
17431 {
17432 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17433 }
17434
17435 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17436 relocations. */
17437
17438 static void
17439 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17440 {
17441 unsigned long first_word = bfd_get_32 (output_bfd, from);
17442 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17443
17444 /* High bit of first word is supposed to be zero. */
17445 if ((first_word & 0x80000000ul) == 0)
17446 first_word = offset_prel31 (first_word, offset);
17447
17448 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17449 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17450 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17451 second_word = offset_prel31 (second_word, offset);
17452
17453 bfd_put_32 (output_bfd, first_word, to);
17454 bfd_put_32 (output_bfd, second_word, to + 4);
17455 }
17456
17457 /* Data for make_branch_to_a8_stub(). */
17458
17459 struct a8_branch_to_stub_data
17460 {
17461 asection *writing_section;
17462 bfd_byte *contents;
17463 };
17464
17465
17466 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17467 places for a particular section. */
17468
17469 static bfd_boolean
17470 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17471 void *in_arg)
17472 {
17473 struct elf32_arm_stub_hash_entry *stub_entry;
17474 struct a8_branch_to_stub_data *data;
17475 bfd_byte *contents;
17476 unsigned long branch_insn;
17477 bfd_vma veneered_insn_loc, veneer_entry_loc;
17478 bfd_signed_vma branch_offset;
17479 bfd *abfd;
17480 unsigned int loc;
17481
17482 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17483 data = (struct a8_branch_to_stub_data *) in_arg;
17484
17485 if (stub_entry->target_section != data->writing_section
17486 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17487 return TRUE;
17488
17489 contents = data->contents;
17490
17491 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17492 generated when both source and target are in the same section. */
17493 veneered_insn_loc = stub_entry->target_section->output_section->vma
17494 + stub_entry->target_section->output_offset
17495 + stub_entry->source_value;
17496
17497 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17498 + stub_entry->stub_sec->output_offset
17499 + stub_entry->stub_offset;
17500
17501 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17502 veneered_insn_loc &= ~3u;
17503
17504 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17505
17506 abfd = stub_entry->target_section->owner;
17507 loc = stub_entry->source_value;
17508
17509 /* We attempt to avoid this condition by setting stubs_always_after_branch
17510 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17511 This check is just to be on the safe side... */
17512 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17513 {
17514 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
17515 "allocated in unsafe location"), abfd);
17516 return FALSE;
17517 }
17518
17519 switch (stub_entry->stub_type)
17520 {
17521 case arm_stub_a8_veneer_b:
17522 case arm_stub_a8_veneer_b_cond:
17523 branch_insn = 0xf0009000;
17524 goto jump24;
17525
17526 case arm_stub_a8_veneer_blx:
17527 branch_insn = 0xf000e800;
17528 goto jump24;
17529
17530 case arm_stub_a8_veneer_bl:
17531 {
17532 unsigned int i1, j1, i2, j2, s;
17533
17534 branch_insn = 0xf000d000;
17535
17536 jump24:
17537 if (branch_offset < -16777216 || branch_offset > 16777214)
17538 {
17539 /* There's not much we can do apart from complain if this
17540 happens. */
17541 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
17542 "of range (input file too large)"), abfd);
17543 return FALSE;
17544 }
17545
17546 /* i1 = not(j1 eor s), so:
17547 not i1 = j1 eor s
17548 j1 = (not i1) eor s. */
17549
17550 branch_insn |= (branch_offset >> 1) & 0x7ff;
17551 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17552 i2 = (branch_offset >> 22) & 1;
17553 i1 = (branch_offset >> 23) & 1;
17554 s = (branch_offset >> 24) & 1;
17555 j1 = (!i1) ^ s;
17556 j2 = (!i2) ^ s;
17557 branch_insn |= j2 << 11;
17558 branch_insn |= j1 << 13;
17559 branch_insn |= s << 26;
17560 }
17561 break;
17562
17563 default:
17564 BFD_FAIL ();
17565 return FALSE;
17566 }
17567
17568 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17569 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17570
17571 return TRUE;
17572 }
17573
17574 /* Beginning of stm32l4xx work-around. */
17575
17576 /* Functions encoding instructions necessary for the emission of the
17577 fix-stm32l4xx-629360.
17578 Encoding is extracted from the
17579 ARM (C) Architecture Reference Manual
17580 ARMv7-A and ARMv7-R edition
17581 ARM DDI 0406C.b (ID072512). */
17582
17583 static inline bfd_vma
17584 create_instruction_branch_absolute (int branch_offset)
17585 {
17586 /* A8.8.18 B (A8-334)
17587 B target_address (Encoding T4). */
17588 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17589 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17590 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17591
17592 int s = ((branch_offset & 0x1000000) >> 24);
17593 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17594 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17595
17596 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17597 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17598
17599 bfd_vma patched_inst = 0xf0009000
17600 | s << 26 /* S. */
17601 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17602 | j1 << 13 /* J1. */
17603 | j2 << 11 /* J2. */
17604 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17605
17606 return patched_inst;
17607 }
17608
17609 static inline bfd_vma
17610 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17611 {
17612 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17613 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17614 bfd_vma patched_inst = 0xe8900000
17615 | (/*W=*/wback << 21)
17616 | (base_reg << 16)
17617 | (reg_mask & 0x0000ffff);
17618
17619 return patched_inst;
17620 }
17621
17622 static inline bfd_vma
17623 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17624 {
17625 /* A8.8.60 LDMDB/LDMEA (A8-402)
17626 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17627 bfd_vma patched_inst = 0xe9100000
17628 | (/*W=*/wback << 21)
17629 | (base_reg << 16)
17630 | (reg_mask & 0x0000ffff);
17631
17632 return patched_inst;
17633 }
17634
17635 static inline bfd_vma
17636 create_instruction_mov (int target_reg, int source_reg)
17637 {
17638 /* A8.8.103 MOV (register) (A8-486)
17639 MOV Rd, Rm (Encoding T1). */
17640 bfd_vma patched_inst = 0x4600
17641 | (target_reg & 0x7)
17642 | ((target_reg & 0x8) >> 3) << 7
17643 | (source_reg << 3);
17644
17645 return patched_inst;
17646 }
17647
17648 static inline bfd_vma
17649 create_instruction_sub (int target_reg, int source_reg, int value)
17650 {
17651 /* A8.8.221 SUB (immediate) (A8-708)
17652 SUB Rd, Rn, #value (Encoding T3). */
17653 bfd_vma patched_inst = 0xf1a00000
17654 | (target_reg << 8)
17655 | (source_reg << 16)
17656 | (/*S=*/0 << 20)
17657 | ((value & 0x800) >> 11) << 26
17658 | ((value & 0x700) >> 8) << 12
17659 | (value & 0x0ff);
17660
17661 return patched_inst;
17662 }
17663
17664 static inline bfd_vma
17665 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17666 int first_reg)
17667 {
17668 /* A8.8.332 VLDM (A8-922)
17669 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17670 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17671 | (/*W=*/wback << 21)
17672 | (base_reg << 16)
17673 | (num_words & 0x000000ff)
17674 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17675 | (first_reg & 0x00000001) << 22;
17676
17677 return patched_inst;
17678 }
17679
17680 static inline bfd_vma
17681 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17682 int first_reg)
17683 {
17684 /* A8.8.332 VLDM (A8-922)
17685 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17686 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17687 | (base_reg << 16)
17688 | (num_words & 0x000000ff)
17689 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17690 | (first_reg & 0x00000001) << 22;
17691
17692 return patched_inst;
17693 }
17694
17695 static inline bfd_vma
17696 create_instruction_udf_w (int value)
17697 {
17698 /* A8.8.247 UDF (A8-758)
17699 Undefined (Encoding T2). */
17700 bfd_vma patched_inst = 0xf7f0a000
17701 | (value & 0x00000fff)
17702 | (value & 0x000f0000) << 16;
17703
17704 return patched_inst;
17705 }
17706
17707 static inline bfd_vma
17708 create_instruction_udf (int value)
17709 {
17710 /* A8.8.247 UDF (A8-758)
17711 Undefined (Encoding T1). */
17712 bfd_vma patched_inst = 0xde00
17713 | (value & 0xff);
17714
17715 return patched_inst;
17716 }
17717
17718 /* Functions writing an instruction in memory, returning the next
17719 memory position to write to. */
17720
17721 static inline bfd_byte *
17722 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17723 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17724 {
17725 put_thumb2_insn (htab, output_bfd, insn, pt);
17726 return pt + 4;
17727 }
17728
17729 static inline bfd_byte *
17730 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17731 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17732 {
17733 put_thumb_insn (htab, output_bfd, insn, pt);
17734 return pt + 2;
17735 }
17736
17737 /* Function filling up a region in memory with T1 and T2 UDFs taking
17738 care of alignment. */
17739
17740 static bfd_byte *
17741 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17742 bfd * output_bfd,
17743 const bfd_byte * const base_stub_contents,
17744 bfd_byte * const from_stub_contents,
17745 const bfd_byte * const end_stub_contents)
17746 {
17747 bfd_byte *current_stub_contents = from_stub_contents;
17748
17749 /* Fill the remaining of the stub with deterministic contents : UDF
17750 instructions.
17751 Check if realignment is needed on modulo 4 frontier using T1, to
17752 further use T2. */
17753 if ((current_stub_contents < end_stub_contents)
17754 && !((current_stub_contents - base_stub_contents) % 2)
17755 && ((current_stub_contents - base_stub_contents) % 4))
17756 current_stub_contents =
17757 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17758 create_instruction_udf (0));
17759
17760 for (; current_stub_contents < end_stub_contents;)
17761 current_stub_contents =
17762 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17763 create_instruction_udf_w (0));
17764
17765 return current_stub_contents;
17766 }
17767
17768 /* Functions writing the stream of instructions equivalent to the
17769 derived sequence for ldmia, ldmdb, vldm respectively. */
17770
17771 static void
17772 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17773 bfd * output_bfd,
17774 const insn32 initial_insn,
17775 const bfd_byte *const initial_insn_addr,
17776 bfd_byte *const base_stub_contents)
17777 {
17778 int wback = (initial_insn & 0x00200000) >> 21;
17779 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17780 int insn_all_registers = initial_insn & 0x0000ffff;
17781 int insn_low_registers, insn_high_registers;
17782 int usable_register_mask;
17783 int nb_registers = elf32_arm_popcount (insn_all_registers);
17784 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17785 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17786 bfd_byte *current_stub_contents = base_stub_contents;
17787
17788 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17789
17790 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17791 smaller than 8 registers load sequences that do not cause the
17792 hardware issue. */
17793 if (nb_registers <= 8)
17794 {
17795 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17796 current_stub_contents =
17797 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17798 initial_insn);
17799
17800 /* B initial_insn_addr+4. */
17801 if (!restore_pc)
17802 current_stub_contents =
17803 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17804 create_instruction_branch_absolute
17805 (initial_insn_addr - current_stub_contents));
17806
17807 /* Fill the remaining of the stub with deterministic contents. */
17808 current_stub_contents =
17809 stm32l4xx_fill_stub_udf (htab, output_bfd,
17810 base_stub_contents, current_stub_contents,
17811 base_stub_contents +
17812 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17813
17814 return;
17815 }
17816
17817 /* - reg_list[13] == 0. */
17818 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17819
17820 /* - reg_list[14] & reg_list[15] != 1. */
17821 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17822
17823 /* - if (wback==1) reg_list[rn] == 0. */
17824 BFD_ASSERT (!wback || !restore_rn);
17825
17826 /* - nb_registers > 8. */
17827 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
17828
17829 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17830
17831 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17832 - One with the 7 lowest registers (register mask 0x007F)
17833 This LDM will finally contain between 2 and 7 registers
17834 - One with the 7 highest registers (register mask 0xDF80)
17835 This ldm will finally contain between 2 and 7 registers. */
17836 insn_low_registers = insn_all_registers & 0x007F;
17837 insn_high_registers = insn_all_registers & 0xDF80;
17838
17839 /* A spare register may be needed during this veneer to temporarily
17840 handle the base register. This register will be restored with the
17841 last LDM operation.
17842 The usable register may be any general purpose register (that
17843 excludes PC, SP, LR : register mask is 0x1FFF). */
17844 usable_register_mask = 0x1FFF;
17845
17846 /* Generate the stub function. */
17847 if (wback)
17848 {
17849 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17850 current_stub_contents =
17851 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17852 create_instruction_ldmia
17853 (rn, /*wback=*/1, insn_low_registers));
17854
17855 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17856 current_stub_contents =
17857 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17858 create_instruction_ldmia
17859 (rn, /*wback=*/1, insn_high_registers));
17860 if (!restore_pc)
17861 {
17862 /* B initial_insn_addr+4. */
17863 current_stub_contents =
17864 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17865 create_instruction_branch_absolute
17866 (initial_insn_addr - current_stub_contents));
17867 }
17868 }
17869 else /* if (!wback). */
17870 {
17871 ri = rn;
17872
17873 /* If Rn is not part of the high-register-list, move it there. */
17874 if (!(insn_high_registers & (1 << rn)))
17875 {
17876 /* Choose a Ri in the high-register-list that will be restored. */
17877 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
17878
17879 /* MOV Ri, Rn. */
17880 current_stub_contents =
17881 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17882 create_instruction_mov (ri, rn));
17883 }
17884
17885 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17886 current_stub_contents =
17887 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17888 create_instruction_ldmia
17889 (ri, /*wback=*/1, insn_low_registers));
17890
17891 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17892 current_stub_contents =
17893 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17894 create_instruction_ldmia
17895 (ri, /*wback=*/0, insn_high_registers));
17896
17897 if (!restore_pc)
17898 {
17899 /* B initial_insn_addr+4. */
17900 current_stub_contents =
17901 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17902 create_instruction_branch_absolute
17903 (initial_insn_addr - current_stub_contents));
17904 }
17905 }
17906
17907 /* Fill the remaining of the stub with deterministic contents. */
17908 current_stub_contents =
17909 stm32l4xx_fill_stub_udf (htab, output_bfd,
17910 base_stub_contents, current_stub_contents,
17911 base_stub_contents +
17912 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17913 }
17914
17915 static void
17916 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
17917 bfd * output_bfd,
17918 const insn32 initial_insn,
17919 const bfd_byte *const initial_insn_addr,
17920 bfd_byte *const base_stub_contents)
17921 {
17922 int wback = (initial_insn & 0x00200000) >> 21;
17923 int ri, rn = (initial_insn & 0x000f0000) >> 16;
17924 int insn_all_registers = initial_insn & 0x0000ffff;
17925 int insn_low_registers, insn_high_registers;
17926 int usable_register_mask;
17927 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17928 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17929 int nb_registers = elf32_arm_popcount (insn_all_registers);
17930 bfd_byte *current_stub_contents = base_stub_contents;
17931
17932 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
17933
17934 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17935 smaller than 8 registers load sequences that do not cause the
17936 hardware issue. */
17937 if (nb_registers <= 8)
17938 {
17939 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17940 current_stub_contents =
17941 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17942 initial_insn);
17943
17944 /* B initial_insn_addr+4. */
17945 current_stub_contents =
17946 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17947 create_instruction_branch_absolute
17948 (initial_insn_addr - current_stub_contents));
17949
17950 /* Fill the remaining of the stub with deterministic contents. */
17951 current_stub_contents =
17952 stm32l4xx_fill_stub_udf (htab, output_bfd,
17953 base_stub_contents, current_stub_contents,
17954 base_stub_contents +
17955 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17956
17957 return;
17958 }
17959
17960 /* - reg_list[13] == 0. */
17961 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
17962
17963 /* - reg_list[14] & reg_list[15] != 1. */
17964 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17965
17966 /* - if (wback==1) reg_list[rn] == 0. */
17967 BFD_ASSERT (!wback || !restore_rn);
17968
17969 /* - nb_registers > 8. */
17970 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
17971
17972 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17973
17974 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
17975 - One with the 7 lowest registers (register mask 0x007F)
17976 This LDM will finally contain between 2 and 7 registers
17977 - One with the 7 highest registers (register mask 0xDF80)
17978 This ldm will finally contain between 2 and 7 registers. */
17979 insn_low_registers = insn_all_registers & 0x007F;
17980 insn_high_registers = insn_all_registers & 0xDF80;
17981
17982 /* A spare register may be needed during this veneer to temporarily
17983 handle the base register. This register will be restored with
17984 the last LDM operation.
17985 The usable register may be any general purpose register (that excludes
17986 PC, SP, LR : register mask is 0x1FFF). */
17987 usable_register_mask = 0x1FFF;
17988
17989 /* Generate the stub function. */
17990 if (!wback && !restore_pc && !restore_rn)
17991 {
17992 /* Choose a Ri in the low-register-list that will be restored. */
17993 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
17994
17995 /* MOV Ri, Rn. */
17996 current_stub_contents =
17997 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17998 create_instruction_mov (ri, rn));
17999
18000 /* LDMDB Ri!, {R-high-register-list}. */
18001 current_stub_contents =
18002 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18003 create_instruction_ldmdb
18004 (ri, /*wback=*/1, insn_high_registers));
18005
18006 /* LDMDB Ri, {R-low-register-list}. */
18007 current_stub_contents =
18008 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18009 create_instruction_ldmdb
18010 (ri, /*wback=*/0, insn_low_registers));
18011
18012 /* B initial_insn_addr+4. */
18013 current_stub_contents =
18014 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18015 create_instruction_branch_absolute
18016 (initial_insn_addr - current_stub_contents));
18017 }
18018 else if (wback && !restore_pc && !restore_rn)
18019 {
18020 /* LDMDB Rn!, {R-high-register-list}. */
18021 current_stub_contents =
18022 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18023 create_instruction_ldmdb
18024 (rn, /*wback=*/1, insn_high_registers));
18025
18026 /* LDMDB Rn!, {R-low-register-list}. */
18027 current_stub_contents =
18028 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18029 create_instruction_ldmdb
18030 (rn, /*wback=*/1, insn_low_registers));
18031
18032 /* B initial_insn_addr+4. */
18033 current_stub_contents =
18034 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18035 create_instruction_branch_absolute
18036 (initial_insn_addr - current_stub_contents));
18037 }
18038 else if (!wback && restore_pc && !restore_rn)
18039 {
18040 /* Choose a Ri in the high-register-list that will be restored. */
18041 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18042
18043 /* SUB Ri, Rn, #(4*nb_registers). */
18044 current_stub_contents =
18045 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18046 create_instruction_sub (ri, rn, (4 * nb_registers)));
18047
18048 /* LDMIA Ri!, {R-low-register-list}. */
18049 current_stub_contents =
18050 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18051 create_instruction_ldmia
18052 (ri, /*wback=*/1, insn_low_registers));
18053
18054 /* LDMIA Ri, {R-high-register-list}. */
18055 current_stub_contents =
18056 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18057 create_instruction_ldmia
18058 (ri, /*wback=*/0, insn_high_registers));
18059 }
18060 else if (wback && restore_pc && !restore_rn)
18061 {
18062 /* Choose a Ri in the high-register-list that will be restored. */
18063 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18064
18065 /* SUB Rn, Rn, #(4*nb_registers) */
18066 current_stub_contents =
18067 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18068 create_instruction_sub (rn, rn, (4 * nb_registers)));
18069
18070 /* MOV Ri, Rn. */
18071 current_stub_contents =
18072 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18073 create_instruction_mov (ri, rn));
18074
18075 /* LDMIA Ri!, {R-low-register-list}. */
18076 current_stub_contents =
18077 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18078 create_instruction_ldmia
18079 (ri, /*wback=*/1, insn_low_registers));
18080
18081 /* LDMIA Ri, {R-high-register-list}. */
18082 current_stub_contents =
18083 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18084 create_instruction_ldmia
18085 (ri, /*wback=*/0, insn_high_registers));
18086 }
18087 else if (!wback && !restore_pc && restore_rn)
18088 {
18089 ri = rn;
18090 if (!(insn_low_registers & (1 << rn)))
18091 {
18092 /* Choose a Ri in the low-register-list that will be restored. */
18093 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18094
18095 /* MOV Ri, Rn. */
18096 current_stub_contents =
18097 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18098 create_instruction_mov (ri, rn));
18099 }
18100
18101 /* LDMDB Ri!, {R-high-register-list}. */
18102 current_stub_contents =
18103 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18104 create_instruction_ldmdb
18105 (ri, /*wback=*/1, insn_high_registers));
18106
18107 /* LDMDB Ri, {R-low-register-list}. */
18108 current_stub_contents =
18109 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18110 create_instruction_ldmdb
18111 (ri, /*wback=*/0, insn_low_registers));
18112
18113 /* B initial_insn_addr+4. */
18114 current_stub_contents =
18115 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18116 create_instruction_branch_absolute
18117 (initial_insn_addr - current_stub_contents));
18118 }
18119 else if (!wback && restore_pc && restore_rn)
18120 {
18121 ri = rn;
18122 if (!(insn_high_registers & (1 << rn)))
18123 {
18124 /* Choose a Ri in the high-register-list that will be restored. */
18125 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18126 }
18127
18128 /* SUB Ri, Rn, #(4*nb_registers). */
18129 current_stub_contents =
18130 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18131 create_instruction_sub (ri, rn, (4 * nb_registers)));
18132
18133 /* LDMIA Ri!, {R-low-register-list}. */
18134 current_stub_contents =
18135 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18136 create_instruction_ldmia
18137 (ri, /*wback=*/1, insn_low_registers));
18138
18139 /* LDMIA Ri, {R-high-register-list}. */
18140 current_stub_contents =
18141 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18142 create_instruction_ldmia
18143 (ri, /*wback=*/0, insn_high_registers));
18144 }
18145 else if (wback && restore_rn)
18146 {
18147 /* The assembler should not have accepted to encode this. */
18148 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18149 "undefined behavior.\n");
18150 }
18151
18152 /* Fill the remaining of the stub with deterministic contents. */
18153 current_stub_contents =
18154 stm32l4xx_fill_stub_udf (htab, output_bfd,
18155 base_stub_contents, current_stub_contents,
18156 base_stub_contents +
18157 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18158
18159 }
18160
18161 static void
18162 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18163 bfd * output_bfd,
18164 const insn32 initial_insn,
18165 const bfd_byte *const initial_insn_addr,
18166 bfd_byte *const base_stub_contents)
18167 {
18168 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18169 bfd_byte *current_stub_contents = base_stub_contents;
18170
18171 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18172
18173 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18174 smaller than 8 words load sequences that do not cause the
18175 hardware issue. */
18176 if (num_words <= 8)
18177 {
18178 /* Untouched instruction. */
18179 current_stub_contents =
18180 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18181 initial_insn);
18182
18183 /* B initial_insn_addr+4. */
18184 current_stub_contents =
18185 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18186 create_instruction_branch_absolute
18187 (initial_insn_addr - current_stub_contents));
18188 }
18189 else
18190 {
18191 bfd_boolean is_dp = /* DP encoding. */
18192 (initial_insn & 0xfe100f00) == 0xec100b00;
18193 bfd_boolean is_ia_nobang = /* (IA without !). */
18194 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18195 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18196 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18197 bfd_boolean is_db_bang = /* (DB with !). */
18198 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18199 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18200 /* d = UInt (Vd:D);. */
18201 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18202 | (((unsigned int)initial_insn << 9) >> 31);
18203
18204 /* Compute the number of 8-words chunks needed to split. */
18205 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18206 int chunk;
18207
18208 /* The test coverage has been done assuming the following
18209 hypothesis that exactly one of the previous is_ predicates is
18210 true. */
18211 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18212 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18213
18214 /* We treat the cutting of the words in one pass for all
18215 cases, then we emit the adjustments:
18216
18217 vldm rx, {...}
18218 -> vldm rx!, {8_words_or_less} for each needed 8_word
18219 -> sub rx, rx, #size (list)
18220
18221 vldm rx!, {...}
18222 -> vldm rx!, {8_words_or_less} for each needed 8_word
18223 This also handles vpop instruction (when rx is sp)
18224
18225 vldmd rx!, {...}
18226 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18227 for (chunk = 0; chunk < chunks; ++chunk)
18228 {
18229 bfd_vma new_insn = 0;
18230
18231 if (is_ia_nobang || is_ia_bang)
18232 {
18233 new_insn = create_instruction_vldmia
18234 (base_reg,
18235 is_dp,
18236 /*wback= . */1,
18237 chunks - (chunk + 1) ?
18238 8 : num_words - chunk * 8,
18239 first_reg + chunk * 8);
18240 }
18241 else if (is_db_bang)
18242 {
18243 new_insn = create_instruction_vldmdb
18244 (base_reg,
18245 is_dp,
18246 chunks - (chunk + 1) ?
18247 8 : num_words - chunk * 8,
18248 first_reg + chunk * 8);
18249 }
18250
18251 if (new_insn)
18252 current_stub_contents =
18253 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18254 new_insn);
18255 }
18256
18257 /* Only this case requires the base register compensation
18258 subtract. */
18259 if (is_ia_nobang)
18260 {
18261 current_stub_contents =
18262 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18263 create_instruction_sub
18264 (base_reg, base_reg, 4*num_words));
18265 }
18266
18267 /* B initial_insn_addr+4. */
18268 current_stub_contents =
18269 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18270 create_instruction_branch_absolute
18271 (initial_insn_addr - current_stub_contents));
18272 }
18273
18274 /* Fill the remaining of the stub with deterministic contents. */
18275 current_stub_contents =
18276 stm32l4xx_fill_stub_udf (htab, output_bfd,
18277 base_stub_contents, current_stub_contents,
18278 base_stub_contents +
18279 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18280 }
18281
18282 static void
18283 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18284 bfd * output_bfd,
18285 const insn32 wrong_insn,
18286 const bfd_byte *const wrong_insn_addr,
18287 bfd_byte *const stub_contents)
18288 {
18289 if (is_thumb2_ldmia (wrong_insn))
18290 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18291 wrong_insn, wrong_insn_addr,
18292 stub_contents);
18293 else if (is_thumb2_ldmdb (wrong_insn))
18294 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18295 wrong_insn, wrong_insn_addr,
18296 stub_contents);
18297 else if (is_thumb2_vldm (wrong_insn))
18298 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18299 wrong_insn, wrong_insn_addr,
18300 stub_contents);
18301 }
18302
18303 /* End of stm32l4xx work-around. */
18304
18305
18306 /* Do code byteswapping. Return FALSE afterwards so that the section is
18307 written out as normal. */
18308
18309 static bfd_boolean
18310 elf32_arm_write_section (bfd *output_bfd,
18311 struct bfd_link_info *link_info,
18312 asection *sec,
18313 bfd_byte *contents)
18314 {
18315 unsigned int mapcount, errcount;
18316 _arm_elf_section_data *arm_data;
18317 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18318 elf32_arm_section_map *map;
18319 elf32_vfp11_erratum_list *errnode;
18320 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18321 bfd_vma ptr;
18322 bfd_vma end;
18323 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18324 bfd_byte tmp;
18325 unsigned int i;
18326
18327 if (globals == NULL)
18328 return FALSE;
18329
18330 /* If this section has not been allocated an _arm_elf_section_data
18331 structure then we cannot record anything. */
18332 arm_data = get_arm_elf_section_data (sec);
18333 if (arm_data == NULL)
18334 return FALSE;
18335
18336 mapcount = arm_data->mapcount;
18337 map = arm_data->map;
18338 errcount = arm_data->erratumcount;
18339
18340 if (errcount != 0)
18341 {
18342 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18343
18344 for (errnode = arm_data->erratumlist; errnode != 0;
18345 errnode = errnode->next)
18346 {
18347 bfd_vma target = errnode->vma - offset;
18348
18349 switch (errnode->type)
18350 {
18351 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18352 {
18353 bfd_vma branch_to_veneer;
18354 /* Original condition code of instruction, plus bit mask for
18355 ARM B instruction. */
18356 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18357 | 0x0a000000;
18358
18359 /* The instruction is before the label. */
18360 target -= 4;
18361
18362 /* Above offset included in -4 below. */
18363 branch_to_veneer = errnode->u.b.veneer->vma
18364 - errnode->vma - 4;
18365
18366 if ((signed) branch_to_veneer < -(1 << 25)
18367 || (signed) branch_to_veneer >= (1 << 25))
18368 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18369 "range"), output_bfd);
18370
18371 insn |= (branch_to_veneer >> 2) & 0xffffff;
18372 contents[endianflip ^ target] = insn & 0xff;
18373 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18374 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18375 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18376 }
18377 break;
18378
18379 case VFP11_ERRATUM_ARM_VENEER:
18380 {
18381 bfd_vma branch_from_veneer;
18382 unsigned int insn;
18383
18384 /* Take size of veneer into account. */
18385 branch_from_veneer = errnode->u.v.branch->vma
18386 - errnode->vma - 12;
18387
18388 if ((signed) branch_from_veneer < -(1 << 25)
18389 || (signed) branch_from_veneer >= (1 << 25))
18390 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18391 "range"), output_bfd);
18392
18393 /* Original instruction. */
18394 insn = errnode->u.v.branch->u.b.vfp_insn;
18395 contents[endianflip ^ target] = insn & 0xff;
18396 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18397 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18398 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18399
18400 /* Branch back to insn after original insn. */
18401 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18402 contents[endianflip ^ (target + 4)] = insn & 0xff;
18403 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18404 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18405 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18406 }
18407 break;
18408
18409 default:
18410 abort ();
18411 }
18412 }
18413 }
18414
18415 if (arm_data->stm32l4xx_erratumcount != 0)
18416 {
18417 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18418 stm32l4xx_errnode != 0;
18419 stm32l4xx_errnode = stm32l4xx_errnode->next)
18420 {
18421 bfd_vma target = stm32l4xx_errnode->vma - offset;
18422
18423 switch (stm32l4xx_errnode->type)
18424 {
18425 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18426 {
18427 unsigned int insn;
18428 bfd_vma branch_to_veneer =
18429 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18430
18431 if ((signed) branch_to_veneer < -(1 << 24)
18432 || (signed) branch_to_veneer >= (1 << 24))
18433 {
18434 bfd_vma out_of_range =
18435 ((signed) branch_to_veneer < -(1 << 24)) ?
18436 - branch_to_veneer - (1 << 24) :
18437 ((signed) branch_to_veneer >= (1 << 24)) ?
18438 branch_to_veneer - (1 << 24) : 0;
18439
18440 _bfd_error_handler
18441 (_("%pB(%#" PRIx64 "): error: "
18442 "Cannot create STM32L4XX veneer. "
18443 "Jump out of range by %" PRId64 " bytes. "
18444 "Cannot encode branch instruction. "),
18445 output_bfd,
18446 (uint64_t) (stm32l4xx_errnode->vma - 4),
18447 (int64_t) out_of_range);
18448 continue;
18449 }
18450
18451 insn = create_instruction_branch_absolute
18452 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18453
18454 /* The instruction is before the label. */
18455 target -= 4;
18456
18457 put_thumb2_insn (globals, output_bfd,
18458 (bfd_vma) insn, contents + target);
18459 }
18460 break;
18461
18462 case STM32L4XX_ERRATUM_VENEER:
18463 {
18464 bfd_byte * veneer;
18465 bfd_byte * veneer_r;
18466 unsigned int insn;
18467
18468 veneer = contents + target;
18469 veneer_r = veneer
18470 + stm32l4xx_errnode->u.b.veneer->vma
18471 - stm32l4xx_errnode->vma - 4;
18472
18473 if ((signed) (veneer_r - veneer -
18474 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18475 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18476 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18477 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18478 || (signed) (veneer_r - veneer) >= (1 << 24))
18479 {
18480 _bfd_error_handler (_("%pB: error: Cannot create STM32L4XX "
18481 "veneer."), output_bfd);
18482 continue;
18483 }
18484
18485 /* Original instruction. */
18486 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18487
18488 stm32l4xx_create_replacing_stub
18489 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18490 }
18491 break;
18492
18493 default:
18494 abort ();
18495 }
18496 }
18497 }
18498
18499 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18500 {
18501 arm_unwind_table_edit *edit_node
18502 = arm_data->u.exidx.unwind_edit_list;
18503 /* Now, sec->size is the size of the section we will write. The original
18504 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18505 markers) was sec->rawsize. (This isn't the case if we perform no
18506 edits, then rawsize will be zero and we should use size). */
18507 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18508 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18509 unsigned int in_index, out_index;
18510 bfd_vma add_to_offsets = 0;
18511
18512 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18513 {
18514 if (edit_node)
18515 {
18516 unsigned int edit_index = edit_node->index;
18517
18518 if (in_index < edit_index && in_index * 8 < input_size)
18519 {
18520 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18521 contents + in_index * 8, add_to_offsets);
18522 out_index++;
18523 in_index++;
18524 }
18525 else if (in_index == edit_index
18526 || (in_index * 8 >= input_size
18527 && edit_index == UINT_MAX))
18528 {
18529 switch (edit_node->type)
18530 {
18531 case DELETE_EXIDX_ENTRY:
18532 in_index++;
18533 add_to_offsets += 8;
18534 break;
18535
18536 case INSERT_EXIDX_CANTUNWIND_AT_END:
18537 {
18538 asection *text_sec = edit_node->linked_section;
18539 bfd_vma text_offset = text_sec->output_section->vma
18540 + text_sec->output_offset
18541 + text_sec->size;
18542 bfd_vma exidx_offset = offset + out_index * 8;
18543 unsigned long prel31_offset;
18544
18545 /* Note: this is meant to be equivalent to an
18546 R_ARM_PREL31 relocation. These synthetic
18547 EXIDX_CANTUNWIND markers are not relocated by the
18548 usual BFD method. */
18549 prel31_offset = (text_offset - exidx_offset)
18550 & 0x7ffffffful;
18551 if (bfd_link_relocatable (link_info))
18552 {
18553 /* Here relocation for new EXIDX_CANTUNWIND is
18554 created, so there is no need to
18555 adjust offset by hand. */
18556 prel31_offset = text_sec->output_offset
18557 + text_sec->size;
18558 }
18559
18560 /* First address we can't unwind. */
18561 bfd_put_32 (output_bfd, prel31_offset,
18562 &edited_contents[out_index * 8]);
18563
18564 /* Code for EXIDX_CANTUNWIND. */
18565 bfd_put_32 (output_bfd, 0x1,
18566 &edited_contents[out_index * 8 + 4]);
18567
18568 out_index++;
18569 add_to_offsets -= 8;
18570 }
18571 break;
18572 }
18573
18574 edit_node = edit_node->next;
18575 }
18576 }
18577 else
18578 {
18579 /* No more edits, copy remaining entries verbatim. */
18580 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18581 contents + in_index * 8, add_to_offsets);
18582 out_index++;
18583 in_index++;
18584 }
18585 }
18586
18587 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18588 bfd_set_section_contents (output_bfd, sec->output_section,
18589 edited_contents,
18590 (file_ptr) sec->output_offset, sec->size);
18591
18592 return TRUE;
18593 }
18594
18595 /* Fix code to point to Cortex-A8 erratum stubs. */
18596 if (globals->fix_cortex_a8)
18597 {
18598 struct a8_branch_to_stub_data data;
18599
18600 data.writing_section = sec;
18601 data.contents = contents;
18602
18603 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18604 & data);
18605 }
18606
18607 if (mapcount == 0)
18608 return FALSE;
18609
18610 if (globals->byteswap_code)
18611 {
18612 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18613
18614 ptr = map[0].vma;
18615 for (i = 0; i < mapcount; i++)
18616 {
18617 if (i == mapcount - 1)
18618 end = sec->size;
18619 else
18620 end = map[i + 1].vma;
18621
18622 switch (map[i].type)
18623 {
18624 case 'a':
18625 /* Byte swap code words. */
18626 while (ptr + 3 < end)
18627 {
18628 tmp = contents[ptr];
18629 contents[ptr] = contents[ptr + 3];
18630 contents[ptr + 3] = tmp;
18631 tmp = contents[ptr + 1];
18632 contents[ptr + 1] = contents[ptr + 2];
18633 contents[ptr + 2] = tmp;
18634 ptr += 4;
18635 }
18636 break;
18637
18638 case 't':
18639 /* Byte swap code halfwords. */
18640 while (ptr + 1 < end)
18641 {
18642 tmp = contents[ptr];
18643 contents[ptr] = contents[ptr + 1];
18644 contents[ptr + 1] = tmp;
18645 ptr += 2;
18646 }
18647 break;
18648
18649 case 'd':
18650 /* Leave data alone. */
18651 break;
18652 }
18653 ptr = end;
18654 }
18655 }
18656
18657 free (map);
18658 arm_data->mapcount = -1;
18659 arm_data->mapsize = 0;
18660 arm_data->map = NULL;
18661
18662 return FALSE;
18663 }
18664
18665 /* Mangle thumb function symbols as we read them in. */
18666
18667 static bfd_boolean
18668 elf32_arm_swap_symbol_in (bfd * abfd,
18669 const void *psrc,
18670 const void *pshn,
18671 Elf_Internal_Sym *dst)
18672 {
18673 Elf_Internal_Shdr *symtab_hdr;
18674 const char *name = NULL;
18675
18676 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18677 return FALSE;
18678 dst->st_target_internal = 0;
18679
18680 /* New EABI objects mark thumb function symbols by setting the low bit of
18681 the address. */
18682 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18683 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18684 {
18685 if (dst->st_value & 1)
18686 {
18687 dst->st_value &= ~(bfd_vma) 1;
18688 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18689 ST_BRANCH_TO_THUMB);
18690 }
18691 else
18692 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18693 }
18694 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18695 {
18696 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18697 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18698 }
18699 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18700 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18701 else
18702 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18703
18704 /* Mark CMSE special symbols. */
18705 symtab_hdr = & elf_symtab_hdr (abfd);
18706 if (symtab_hdr->sh_size)
18707 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18708 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18709 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18710
18711 return TRUE;
18712 }
18713
18714
18715 /* Mangle thumb function symbols as we write them out. */
18716
18717 static void
18718 elf32_arm_swap_symbol_out (bfd *abfd,
18719 const Elf_Internal_Sym *src,
18720 void *cdst,
18721 void *shndx)
18722 {
18723 Elf_Internal_Sym newsym;
18724
18725 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18726 of the address set, as per the new EABI. We do this unconditionally
18727 because objcopy does not set the elf header flags until after
18728 it writes out the symbol table. */
18729 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18730 {
18731 newsym = *src;
18732 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18733 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18734 if (newsym.st_shndx != SHN_UNDEF)
18735 {
18736 /* Do this only for defined symbols. At link type, the static
18737 linker will simulate the work of dynamic linker of resolving
18738 symbols and will carry over the thumbness of found symbols to
18739 the output symbol table. It's not clear how it happens, but
18740 the thumbness of undefined symbols can well be different at
18741 runtime, and writing '1' for them will be confusing for users
18742 and possibly for dynamic linker itself.
18743 */
18744 newsym.st_value |= 1;
18745 }
18746
18747 src = &newsym;
18748 }
18749 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18750 }
18751
18752 /* Add the PT_ARM_EXIDX program header. */
18753
18754 static bfd_boolean
18755 elf32_arm_modify_segment_map (bfd *abfd,
18756 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18757 {
18758 struct elf_segment_map *m;
18759 asection *sec;
18760
18761 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18762 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18763 {
18764 /* If there is already a PT_ARM_EXIDX header, then we do not
18765 want to add another one. This situation arises when running
18766 "strip"; the input binary already has the header. */
18767 m = elf_seg_map (abfd);
18768 while (m && m->p_type != PT_ARM_EXIDX)
18769 m = m->next;
18770 if (!m)
18771 {
18772 m = (struct elf_segment_map *)
18773 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18774 if (m == NULL)
18775 return FALSE;
18776 m->p_type = PT_ARM_EXIDX;
18777 m->count = 1;
18778 m->sections[0] = sec;
18779
18780 m->next = elf_seg_map (abfd);
18781 elf_seg_map (abfd) = m;
18782 }
18783 }
18784
18785 return TRUE;
18786 }
18787
18788 /* We may add a PT_ARM_EXIDX program header. */
18789
18790 static int
18791 elf32_arm_additional_program_headers (bfd *abfd,
18792 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18793 {
18794 asection *sec;
18795
18796 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18797 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18798 return 1;
18799 else
18800 return 0;
18801 }
18802
18803 /* Hook called by the linker routine which adds symbols from an object
18804 file. */
18805
18806 static bfd_boolean
18807 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18808 Elf_Internal_Sym *sym, const char **namep,
18809 flagword *flagsp, asection **secp, bfd_vma *valp)
18810 {
18811 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18812 && (abfd->flags & DYNAMIC) == 0
18813 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18814 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18815
18816 if (elf32_arm_hash_table (info) == NULL)
18817 return FALSE;
18818
18819 if (elf32_arm_hash_table (info)->vxworks_p
18820 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18821 flagsp, secp, valp))
18822 return FALSE;
18823
18824 return TRUE;
18825 }
18826
18827 /* We use this to override swap_symbol_in and swap_symbol_out. */
18828 const struct elf_size_info elf32_arm_size_info =
18829 {
18830 sizeof (Elf32_External_Ehdr),
18831 sizeof (Elf32_External_Phdr),
18832 sizeof (Elf32_External_Shdr),
18833 sizeof (Elf32_External_Rel),
18834 sizeof (Elf32_External_Rela),
18835 sizeof (Elf32_External_Sym),
18836 sizeof (Elf32_External_Dyn),
18837 sizeof (Elf_External_Note),
18838 4,
18839 1,
18840 32, 2,
18841 ELFCLASS32, EV_CURRENT,
18842 bfd_elf32_write_out_phdrs,
18843 bfd_elf32_write_shdrs_and_ehdr,
18844 bfd_elf32_checksum_contents,
18845 bfd_elf32_write_relocs,
18846 elf32_arm_swap_symbol_in,
18847 elf32_arm_swap_symbol_out,
18848 bfd_elf32_slurp_reloc_table,
18849 bfd_elf32_slurp_symbol_table,
18850 bfd_elf32_swap_dyn_in,
18851 bfd_elf32_swap_dyn_out,
18852 bfd_elf32_swap_reloc_in,
18853 bfd_elf32_swap_reloc_out,
18854 bfd_elf32_swap_reloca_in,
18855 bfd_elf32_swap_reloca_out
18856 };
18857
18858 static bfd_vma
18859 read_code32 (const bfd *abfd, const bfd_byte *addr)
18860 {
18861 /* V7 BE8 code is always little endian. */
18862 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18863 return bfd_getl32 (addr);
18864
18865 return bfd_get_32 (abfd, addr);
18866 }
18867
18868 static bfd_vma
18869 read_code16 (const bfd *abfd, const bfd_byte *addr)
18870 {
18871 /* V7 BE8 code is always little endian. */
18872 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18873 return bfd_getl16 (addr);
18874
18875 return bfd_get_16 (abfd, addr);
18876 }
18877
18878 /* Return size of plt0 entry starting at ADDR
18879 or (bfd_vma) -1 if size can not be determined. */
18880
18881 static bfd_vma
18882 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
18883 {
18884 bfd_vma first_word;
18885 bfd_vma plt0_size;
18886
18887 first_word = read_code32 (abfd, addr);
18888
18889 if (first_word == elf32_arm_plt0_entry[0])
18890 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
18891 else if (first_word == elf32_thumb2_plt0_entry[0])
18892 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
18893 else
18894 /* We don't yet handle this PLT format. */
18895 return (bfd_vma) -1;
18896
18897 return plt0_size;
18898 }
18899
18900 /* Return size of plt entry starting at offset OFFSET
18901 of plt section located at address START
18902 or (bfd_vma) -1 if size can not be determined. */
18903
18904 static bfd_vma
18905 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
18906 {
18907 bfd_vma first_insn;
18908 bfd_vma plt_size = 0;
18909 const bfd_byte *addr = start + offset;
18910
18911 /* PLT entry size if fixed on Thumb-only platforms. */
18912 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
18913 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
18914
18915 /* Respect Thumb stub if necessary. */
18916 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
18917 {
18918 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
18919 }
18920
18921 /* Strip immediate from first add. */
18922 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
18923
18924 #ifdef FOUR_WORD_PLT
18925 if (first_insn == elf32_arm_plt_entry[0])
18926 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
18927 #else
18928 if (first_insn == elf32_arm_plt_entry_long[0])
18929 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
18930 else if (first_insn == elf32_arm_plt_entry_short[0])
18931 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
18932 #endif
18933 else
18934 /* We don't yet handle this PLT format. */
18935 return (bfd_vma) -1;
18936
18937 return plt_size;
18938 }
18939
18940 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
18941
18942 static long
18943 elf32_arm_get_synthetic_symtab (bfd *abfd,
18944 long symcount ATTRIBUTE_UNUSED,
18945 asymbol **syms ATTRIBUTE_UNUSED,
18946 long dynsymcount,
18947 asymbol **dynsyms,
18948 asymbol **ret)
18949 {
18950 asection *relplt;
18951 asymbol *s;
18952 arelent *p;
18953 long count, i, n;
18954 size_t size;
18955 Elf_Internal_Shdr *hdr;
18956 char *names;
18957 asection *plt;
18958 bfd_vma offset;
18959 bfd_byte *data;
18960
18961 *ret = NULL;
18962
18963 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
18964 return 0;
18965
18966 if (dynsymcount <= 0)
18967 return 0;
18968
18969 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
18970 if (relplt == NULL)
18971 return 0;
18972
18973 hdr = &elf_section_data (relplt)->this_hdr;
18974 if (hdr->sh_link != elf_dynsymtab (abfd)
18975 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
18976 return 0;
18977
18978 plt = bfd_get_section_by_name (abfd, ".plt");
18979 if (plt == NULL)
18980 return 0;
18981
18982 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
18983 return -1;
18984
18985 data = plt->contents;
18986 if (data == NULL)
18987 {
18988 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
18989 return -1;
18990 bfd_cache_section_contents((asection *) plt, data);
18991 }
18992
18993 count = relplt->size / hdr->sh_entsize;
18994 size = count * sizeof (asymbol);
18995 p = relplt->relocation;
18996 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
18997 {
18998 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
18999 if (p->addend != 0)
19000 size += sizeof ("+0x") - 1 + 8;
19001 }
19002
19003 s = *ret = (asymbol *) bfd_malloc (size);
19004 if (s == NULL)
19005 return -1;
19006
19007 offset = elf32_arm_plt0_size (abfd, data);
19008 if (offset == (bfd_vma) -1)
19009 return -1;
19010
19011 names = (char *) (s + count);
19012 p = relplt->relocation;
19013 n = 0;
19014 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19015 {
19016 size_t len;
19017
19018 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19019 if (plt_size == (bfd_vma) -1)
19020 break;
19021
19022 *s = **p->sym_ptr_ptr;
19023 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19024 we are defining a symbol, ensure one of them is set. */
19025 if ((s->flags & BSF_LOCAL) == 0)
19026 s->flags |= BSF_GLOBAL;
19027 s->flags |= BSF_SYNTHETIC;
19028 s->section = plt;
19029 s->value = offset;
19030 s->name = names;
19031 s->udata.p = NULL;
19032 len = strlen ((*p->sym_ptr_ptr)->name);
19033 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19034 names += len;
19035 if (p->addend != 0)
19036 {
19037 char buf[30], *a;
19038
19039 memcpy (names, "+0x", sizeof ("+0x") - 1);
19040 names += sizeof ("+0x") - 1;
19041 bfd_sprintf_vma (abfd, buf, p->addend);
19042 for (a = buf; *a == '0'; ++a)
19043 ;
19044 len = strlen (a);
19045 memcpy (names, a, len);
19046 names += len;
19047 }
19048 memcpy (names, "@plt", sizeof ("@plt"));
19049 names += sizeof ("@plt");
19050 ++s, ++n;
19051 offset += plt_size;
19052 }
19053
19054 return n;
19055 }
19056
19057 static bfd_boolean
19058 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19059 {
19060 if (hdr->sh_flags & SHF_ARM_PURECODE)
19061 *flags |= SEC_ELF_PURECODE;
19062 return TRUE;
19063 }
19064
19065 static flagword
19066 elf32_arm_lookup_section_flags (char *flag_name)
19067 {
19068 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19069 return SHF_ARM_PURECODE;
19070
19071 return SEC_NO_FLAGS;
19072 }
19073
19074 static unsigned int
19075 elf32_arm_count_additional_relocs (asection *sec)
19076 {
19077 struct _arm_elf_section_data *arm_data;
19078 arm_data = get_arm_elf_section_data (sec);
19079
19080 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19081 }
19082
19083 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19084 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19085 FALSE otherwise. ISECTION is the best guess matching section from the
19086 input bfd IBFD, but it might be NULL. */
19087
19088 static bfd_boolean
19089 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19090 bfd *obfd ATTRIBUTE_UNUSED,
19091 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19092 Elf_Internal_Shdr *osection)
19093 {
19094 switch (osection->sh_type)
19095 {
19096 case SHT_ARM_EXIDX:
19097 {
19098 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19099 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19100 unsigned i = 0;
19101
19102 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19103 osection->sh_info = 0;
19104
19105 /* The sh_link field must be set to the text section associated with
19106 this index section. Unfortunately the ARM EHABI does not specify
19107 exactly how to determine this association. Our caller does try
19108 to match up OSECTION with its corresponding input section however
19109 so that is a good first guess. */
19110 if (isection != NULL
19111 && osection->bfd_section != NULL
19112 && isection->bfd_section != NULL
19113 && isection->bfd_section->output_section != NULL
19114 && isection->bfd_section->output_section == osection->bfd_section
19115 && iheaders != NULL
19116 && isection->sh_link > 0
19117 && isection->sh_link < elf_numsections (ibfd)
19118 && iheaders[isection->sh_link]->bfd_section != NULL
19119 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19120 )
19121 {
19122 for (i = elf_numsections (obfd); i-- > 0;)
19123 if (oheaders[i]->bfd_section
19124 == iheaders[isection->sh_link]->bfd_section->output_section)
19125 break;
19126 }
19127
19128 if (i == 0)
19129 {
19130 /* Failing that we have to find a matching section ourselves. If
19131 we had the output section name available we could compare that
19132 with input section names. Unfortunately we don't. So instead
19133 we use a simple heuristic and look for the nearest executable
19134 section before this one. */
19135 for (i = elf_numsections (obfd); i-- > 0;)
19136 if (oheaders[i] == osection)
19137 break;
19138 if (i == 0)
19139 break;
19140
19141 while (i-- > 0)
19142 if (oheaders[i]->sh_type == SHT_PROGBITS
19143 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19144 == (SHF_ALLOC | SHF_EXECINSTR))
19145 break;
19146 }
19147
19148 if (i)
19149 {
19150 osection->sh_link = i;
19151 /* If the text section was part of a group
19152 then the index section should be too. */
19153 if (oheaders[i]->sh_flags & SHF_GROUP)
19154 osection->sh_flags |= SHF_GROUP;
19155 return TRUE;
19156 }
19157 }
19158 break;
19159
19160 case SHT_ARM_PREEMPTMAP:
19161 osection->sh_flags = SHF_ALLOC;
19162 break;
19163
19164 case SHT_ARM_ATTRIBUTES:
19165 case SHT_ARM_DEBUGOVERLAY:
19166 case SHT_ARM_OVERLAYSECTION:
19167 default:
19168 break;
19169 }
19170
19171 return FALSE;
19172 }
19173
19174 /* Returns TRUE if NAME is an ARM mapping symbol.
19175 Traditionally the symbols $a, $d and $t have been used.
19176 The ARM ELF standard also defines $x (for A64 code). It also allows a
19177 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19178 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19179 not support them here. $t.x indicates the start of ThumbEE instructions. */
19180
19181 static bfd_boolean
19182 is_arm_mapping_symbol (const char * name)
19183 {
19184 return name != NULL /* Paranoia. */
19185 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19186 the mapping symbols could have acquired a prefix.
19187 We do not support this here, since such symbols no
19188 longer conform to the ARM ELF ABI. */
19189 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19190 && (name[2] == 0 || name[2] == '.');
19191 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19192 any characters that follow the period are legal characters for the body
19193 of a symbol's name. For now we just assume that this is the case. */
19194 }
19195
19196 /* Make sure that mapping symbols in object files are not removed via the
19197 "strip --strip-unneeded" tool. These symbols are needed in order to
19198 correctly generate interworking veneers, and for byte swapping code
19199 regions. Once an object file has been linked, it is safe to remove the
19200 symbols as they will no longer be needed. */
19201
19202 static void
19203 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19204 {
19205 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19206 && sym->section != bfd_abs_section_ptr
19207 && is_arm_mapping_symbol (sym->name))
19208 sym->flags |= BSF_KEEP;
19209 }
19210
19211 #undef elf_backend_copy_special_section_fields
19212 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19213
19214 #define ELF_ARCH bfd_arch_arm
19215 #define ELF_TARGET_ID ARM_ELF_DATA
19216 #define ELF_MACHINE_CODE EM_ARM
19217 #ifdef __QNXTARGET__
19218 #define ELF_MAXPAGESIZE 0x1000
19219 #else
19220 #define ELF_MAXPAGESIZE 0x10000
19221 #endif
19222 #define ELF_MINPAGESIZE 0x1000
19223 #define ELF_COMMONPAGESIZE 0x1000
19224
19225 #define bfd_elf32_mkobject elf32_arm_mkobject
19226
19227 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19228 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19229 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19230 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19231 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19232 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19233 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19234 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19235 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19236 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19237 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19238 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19239 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19240
19241 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19242 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19243 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19244 #define elf_backend_check_relocs elf32_arm_check_relocs
19245 #define elf_backend_update_relocs elf32_arm_update_relocs
19246 #define elf_backend_relocate_section elf32_arm_relocate_section
19247 #define elf_backend_write_section elf32_arm_write_section
19248 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19249 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19250 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19251 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19252 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19253 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19254 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19255 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19256 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19257 #define elf_backend_object_p elf32_arm_object_p
19258 #define elf_backend_fake_sections elf32_arm_fake_sections
19259 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19260 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19261 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19262 #define elf_backend_size_info elf32_arm_size_info
19263 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19264 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19265 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19266 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19267 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19268 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19269 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19270 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19271
19272 #define elf_backend_can_refcount 1
19273 #define elf_backend_can_gc_sections 1
19274 #define elf_backend_plt_readonly 1
19275 #define elf_backend_want_got_plt 1
19276 #define elf_backend_want_plt_sym 0
19277 #define elf_backend_want_dynrelro 1
19278 #define elf_backend_may_use_rel_p 1
19279 #define elf_backend_may_use_rela_p 0
19280 #define elf_backend_default_use_rela_p 0
19281 #define elf_backend_dtrel_excludes_plt 1
19282
19283 #define elf_backend_got_header_size 12
19284 #define elf_backend_extern_protected_data 1
19285
19286 #undef elf_backend_obj_attrs_vendor
19287 #define elf_backend_obj_attrs_vendor "aeabi"
19288 #undef elf_backend_obj_attrs_section
19289 #define elf_backend_obj_attrs_section ".ARM.attributes"
19290 #undef elf_backend_obj_attrs_arg_type
19291 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19292 #undef elf_backend_obj_attrs_section_type
19293 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19294 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19295 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19296
19297 #undef elf_backend_section_flags
19298 #define elf_backend_section_flags elf32_arm_section_flags
19299 #undef elf_backend_lookup_section_flags_hook
19300 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19301
19302 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
19303
19304 #include "elf32-target.h"
19305
19306 /* Native Client targets. */
19307
19308 #undef TARGET_LITTLE_SYM
19309 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19310 #undef TARGET_LITTLE_NAME
19311 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19312 #undef TARGET_BIG_SYM
19313 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19314 #undef TARGET_BIG_NAME
19315 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19316
19317 /* Like elf32_arm_link_hash_table_create -- but overrides
19318 appropriately for NaCl. */
19319
19320 static struct bfd_link_hash_table *
19321 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19322 {
19323 struct bfd_link_hash_table *ret;
19324
19325 ret = elf32_arm_link_hash_table_create (abfd);
19326 if (ret)
19327 {
19328 struct elf32_arm_link_hash_table *htab
19329 = (struct elf32_arm_link_hash_table *) ret;
19330
19331 htab->nacl_p = 1;
19332
19333 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19334 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19335 }
19336 return ret;
19337 }
19338
19339 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19340 really need to use elf32_arm_modify_segment_map. But we do it
19341 anyway just to reduce gratuitous differences with the stock ARM backend. */
19342
19343 static bfd_boolean
19344 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19345 {
19346 return (elf32_arm_modify_segment_map (abfd, info)
19347 && nacl_modify_segment_map (abfd, info));
19348 }
19349
19350 static void
19351 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19352 {
19353 elf32_arm_final_write_processing (abfd, linker);
19354 nacl_final_write_processing (abfd, linker);
19355 }
19356
19357 static bfd_vma
19358 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19359 const arelent *rel ATTRIBUTE_UNUSED)
19360 {
19361 return plt->vma
19362 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19363 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19364 }
19365
19366 #undef elf32_bed
19367 #define elf32_bed elf32_arm_nacl_bed
19368 #undef bfd_elf32_bfd_link_hash_table_create
19369 #define bfd_elf32_bfd_link_hash_table_create \
19370 elf32_arm_nacl_link_hash_table_create
19371 #undef elf_backend_plt_alignment
19372 #define elf_backend_plt_alignment 4
19373 #undef elf_backend_modify_segment_map
19374 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19375 #undef elf_backend_modify_program_headers
19376 #define elf_backend_modify_program_headers nacl_modify_program_headers
19377 #undef elf_backend_final_write_processing
19378 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19379 #undef bfd_elf32_get_synthetic_symtab
19380 #undef elf_backend_plt_sym_val
19381 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19382 #undef elf_backend_copy_special_section_fields
19383
19384 #undef ELF_MINPAGESIZE
19385 #undef ELF_COMMONPAGESIZE
19386
19387
19388 #include "elf32-target.h"
19389
19390 /* Reset to defaults. */
19391 #undef elf_backend_plt_alignment
19392 #undef elf_backend_modify_segment_map
19393 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19394 #undef elf_backend_modify_program_headers
19395 #undef elf_backend_final_write_processing
19396 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19397 #undef ELF_MINPAGESIZE
19398 #define ELF_MINPAGESIZE 0x1000
19399 #undef ELF_COMMONPAGESIZE
19400 #define ELF_COMMONPAGESIZE 0x1000
19401
19402
19403 /* VxWorks Targets. */
19404
19405 #undef TARGET_LITTLE_SYM
19406 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19407 #undef TARGET_LITTLE_NAME
19408 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19409 #undef TARGET_BIG_SYM
19410 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19411 #undef TARGET_BIG_NAME
19412 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19413
19414 /* Like elf32_arm_link_hash_table_create -- but overrides
19415 appropriately for VxWorks. */
19416
19417 static struct bfd_link_hash_table *
19418 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19419 {
19420 struct bfd_link_hash_table *ret;
19421
19422 ret = elf32_arm_link_hash_table_create (abfd);
19423 if (ret)
19424 {
19425 struct elf32_arm_link_hash_table *htab
19426 = (struct elf32_arm_link_hash_table *) ret;
19427 htab->use_rel = 0;
19428 htab->vxworks_p = 1;
19429 }
19430 return ret;
19431 }
19432
19433 static void
19434 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19435 {
19436 elf32_arm_final_write_processing (abfd, linker);
19437 elf_vxworks_final_write_processing (abfd, linker);
19438 }
19439
19440 #undef elf32_bed
19441 #define elf32_bed elf32_arm_vxworks_bed
19442
19443 #undef bfd_elf32_bfd_link_hash_table_create
19444 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19445 #undef elf_backend_final_write_processing
19446 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19447 #undef elf_backend_emit_relocs
19448 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19449
19450 #undef elf_backend_may_use_rel_p
19451 #define elf_backend_may_use_rel_p 0
19452 #undef elf_backend_may_use_rela_p
19453 #define elf_backend_may_use_rela_p 1
19454 #undef elf_backend_default_use_rela_p
19455 #define elf_backend_default_use_rela_p 1
19456 #undef elf_backend_want_plt_sym
19457 #define elf_backend_want_plt_sym 1
19458 #undef ELF_MAXPAGESIZE
19459 #define ELF_MAXPAGESIZE 0x1000
19460
19461 #include "elf32-target.h"
19462
19463
19464 /* Merge backend specific data from an object file to the output
19465 object file when linking. */
19466
19467 static bfd_boolean
19468 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19469 {
19470 bfd *obfd = info->output_bfd;
19471 flagword out_flags;
19472 flagword in_flags;
19473 bfd_boolean flags_compatible = TRUE;
19474 asection *sec;
19475
19476 /* Check if we have the same endianness. */
19477 if (! _bfd_generic_verify_endian_match (ibfd, info))
19478 return FALSE;
19479
19480 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19481 return TRUE;
19482
19483 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19484 return FALSE;
19485
19486 /* The input BFD must have had its flags initialised. */
19487 /* The following seems bogus to me -- The flags are initialized in
19488 the assembler but I don't think an elf_flags_init field is
19489 written into the object. */
19490 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19491
19492 in_flags = elf_elfheader (ibfd)->e_flags;
19493 out_flags = elf_elfheader (obfd)->e_flags;
19494
19495 /* In theory there is no reason why we couldn't handle this. However
19496 in practice it isn't even close to working and there is no real
19497 reason to want it. */
19498 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19499 && !(ibfd->flags & DYNAMIC)
19500 && (in_flags & EF_ARM_BE8))
19501 {
19502 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
19503 ibfd);
19504 return FALSE;
19505 }
19506
19507 if (!elf_flags_init (obfd))
19508 {
19509 /* If the input is the default architecture and had the default
19510 flags then do not bother setting the flags for the output
19511 architecture, instead allow future merges to do this. If no
19512 future merges ever set these flags then they will retain their
19513 uninitialised values, which surprise surprise, correspond
19514 to the default values. */
19515 if (bfd_get_arch_info (ibfd)->the_default
19516 && elf_elfheader (ibfd)->e_flags == 0)
19517 return TRUE;
19518
19519 elf_flags_init (obfd) = TRUE;
19520 elf_elfheader (obfd)->e_flags = in_flags;
19521
19522 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19523 && bfd_get_arch_info (obfd)->the_default)
19524 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19525
19526 return TRUE;
19527 }
19528
19529 /* Determine what should happen if the input ARM architecture
19530 does not match the output ARM architecture. */
19531 if (! bfd_arm_merge_machines (ibfd, obfd))
19532 return FALSE;
19533
19534 /* Identical flags must be compatible. */
19535 if (in_flags == out_flags)
19536 return TRUE;
19537
19538 /* Check to see if the input BFD actually contains any sections. If
19539 not, its flags may not have been initialised either, but it
19540 cannot actually cause any incompatiblity. Do not short-circuit
19541 dynamic objects; their section list may be emptied by
19542 elf_link_add_object_symbols.
19543
19544 Also check to see if there are no code sections in the input.
19545 In this case there is no need to check for code specific flags.
19546 XXX - do we need to worry about floating-point format compatability
19547 in data sections ? */
19548 if (!(ibfd->flags & DYNAMIC))
19549 {
19550 bfd_boolean null_input_bfd = TRUE;
19551 bfd_boolean only_data_sections = TRUE;
19552
19553 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19554 {
19555 /* Ignore synthetic glue sections. */
19556 if (strcmp (sec->name, ".glue_7")
19557 && strcmp (sec->name, ".glue_7t"))
19558 {
19559 if ((bfd_get_section_flags (ibfd, sec)
19560 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19561 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19562 only_data_sections = FALSE;
19563
19564 null_input_bfd = FALSE;
19565 break;
19566 }
19567 }
19568
19569 if (null_input_bfd || only_data_sections)
19570 return TRUE;
19571 }
19572
19573 /* Complain about various flag mismatches. */
19574 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19575 EF_ARM_EABI_VERSION (out_flags)))
19576 {
19577 _bfd_error_handler
19578 (_("error: Source object %pB has EABI version %d, but target %pB has EABI version %d"),
19579 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
19580 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
19581 return FALSE;
19582 }
19583
19584 /* Not sure what needs to be checked for EABI versions >= 1. */
19585 /* VxWorks libraries do not use these flags. */
19586 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19587 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19588 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19589 {
19590 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19591 {
19592 _bfd_error_handler
19593 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
19594 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
19595 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
19596 flags_compatible = FALSE;
19597 }
19598
19599 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19600 {
19601 if (in_flags & EF_ARM_APCS_FLOAT)
19602 _bfd_error_handler
19603 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
19604 ibfd, obfd);
19605 else
19606 _bfd_error_handler
19607 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
19608 ibfd, obfd);
19609
19610 flags_compatible = FALSE;
19611 }
19612
19613 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19614 {
19615 if (in_flags & EF_ARM_VFP_FLOAT)
19616 _bfd_error_handler
19617 (_("error: %pB uses VFP instructions, whereas %pB does not"),
19618 ibfd, obfd);
19619 else
19620 _bfd_error_handler
19621 (_("error: %pB uses FPA instructions, whereas %pB does not"),
19622 ibfd, obfd);
19623
19624 flags_compatible = FALSE;
19625 }
19626
19627 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19628 {
19629 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19630 _bfd_error_handler
19631 (_("error: %pB uses Maverick instructions, whereas %pB does not"),
19632 ibfd, obfd);
19633 else
19634 _bfd_error_handler
19635 (_("error: %pB does not use Maverick instructions, whereas %pB does"),
19636 ibfd, obfd);
19637
19638 flags_compatible = FALSE;
19639 }
19640
19641 #ifdef EF_ARM_SOFT_FLOAT
19642 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19643 {
19644 /* We can allow interworking between code that is VFP format
19645 layout, and uses either soft float or integer regs for
19646 passing floating point arguments and results. We already
19647 know that the APCS_FLOAT flags match; similarly for VFP
19648 flags. */
19649 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19650 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19651 {
19652 if (in_flags & EF_ARM_SOFT_FLOAT)
19653 _bfd_error_handler
19654 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
19655 ibfd, obfd);
19656 else
19657 _bfd_error_handler
19658 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
19659 ibfd, obfd);
19660
19661 flags_compatible = FALSE;
19662 }
19663 }
19664 #endif
19665
19666 /* Interworking mismatch is only a warning. */
19667 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19668 {
19669 if (in_flags & EF_ARM_INTERWORK)
19670 {
19671 _bfd_error_handler
19672 (_("Warning: %pB supports interworking, whereas %pB does not"),
19673 ibfd, obfd);
19674 }
19675 else
19676 {
19677 _bfd_error_handler
19678 (_("Warning: %pB does not support interworking, whereas %pB does"),
19679 ibfd, obfd);
19680 }
19681 }
19682 }
19683
19684 return flags_compatible;
19685 }
19686
19687
19688 /* Symbian OS Targets. */
19689
19690 #undef TARGET_LITTLE_SYM
19691 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19692 #undef TARGET_LITTLE_NAME
19693 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19694 #undef TARGET_BIG_SYM
19695 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19696 #undef TARGET_BIG_NAME
19697 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19698
19699 /* Like elf32_arm_link_hash_table_create -- but overrides
19700 appropriately for Symbian OS. */
19701
19702 static struct bfd_link_hash_table *
19703 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19704 {
19705 struct bfd_link_hash_table *ret;
19706
19707 ret = elf32_arm_link_hash_table_create (abfd);
19708 if (ret)
19709 {
19710 struct elf32_arm_link_hash_table *htab
19711 = (struct elf32_arm_link_hash_table *)ret;
19712 /* There is no PLT header for Symbian OS. */
19713 htab->plt_header_size = 0;
19714 /* The PLT entries are each one instruction and one word. */
19715 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19716 htab->symbian_p = 1;
19717 /* Symbian uses armv5t or above, so use_blx is always true. */
19718 htab->use_blx = 1;
19719 htab->root.is_relocatable_executable = 1;
19720 }
19721 return ret;
19722 }
19723
19724 static const struct bfd_elf_special_section
19725 elf32_arm_symbian_special_sections[] =
19726 {
19727 /* In a BPABI executable, the dynamic linking sections do not go in
19728 the loadable read-only segment. The post-linker may wish to
19729 refer to these sections, but they are not part of the final
19730 program image. */
19731 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19732 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19733 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19734 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19735 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19736 /* These sections do not need to be writable as the SymbianOS
19737 postlinker will arrange things so that no dynamic relocation is
19738 required. */
19739 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19740 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19741 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19742 { NULL, 0, 0, 0, 0 }
19743 };
19744
19745 static void
19746 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19747 struct bfd_link_info *link_info)
19748 {
19749 /* BPABI objects are never loaded directly by an OS kernel; they are
19750 processed by a postlinker first, into an OS-specific format. If
19751 the D_PAGED bit is set on the file, BFD will align segments on
19752 page boundaries, so that an OS can directly map the file. With
19753 BPABI objects, that just results in wasted space. In addition,
19754 because we clear the D_PAGED bit, map_sections_to_segments will
19755 recognize that the program headers should not be mapped into any
19756 loadable segment. */
19757 abfd->flags &= ~D_PAGED;
19758 elf32_arm_begin_write_processing (abfd, link_info);
19759 }
19760
19761 static bfd_boolean
19762 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19763 struct bfd_link_info *info)
19764 {
19765 struct elf_segment_map *m;
19766 asection *dynsec;
19767
19768 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19769 segment. However, because the .dynamic section is not marked
19770 with SEC_LOAD, the generic ELF code will not create such a
19771 segment. */
19772 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19773 if (dynsec)
19774 {
19775 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19776 if (m->p_type == PT_DYNAMIC)
19777 break;
19778
19779 if (m == NULL)
19780 {
19781 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19782 m->next = elf_seg_map (abfd);
19783 elf_seg_map (abfd) = m;
19784 }
19785 }
19786
19787 /* Also call the generic arm routine. */
19788 return elf32_arm_modify_segment_map (abfd, info);
19789 }
19790
19791 /* Return address for Ith PLT stub in section PLT, for relocation REL
19792 or (bfd_vma) -1 if it should not be included. */
19793
19794 static bfd_vma
19795 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19796 const arelent *rel ATTRIBUTE_UNUSED)
19797 {
19798 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19799 }
19800
19801 #undef elf32_bed
19802 #define elf32_bed elf32_arm_symbian_bed
19803
19804 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19805 will process them and then discard them. */
19806 #undef ELF_DYNAMIC_SEC_FLAGS
19807 #define ELF_DYNAMIC_SEC_FLAGS \
19808 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19809
19810 #undef elf_backend_emit_relocs
19811
19812 #undef bfd_elf32_bfd_link_hash_table_create
19813 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19814 #undef elf_backend_special_sections
19815 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19816 #undef elf_backend_begin_write_processing
19817 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19818 #undef elf_backend_final_write_processing
19819 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19820
19821 #undef elf_backend_modify_segment_map
19822 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19823
19824 /* There is no .got section for BPABI objects, and hence no header. */
19825 #undef elf_backend_got_header_size
19826 #define elf_backend_got_header_size 0
19827
19828 /* Similarly, there is no .got.plt section. */
19829 #undef elf_backend_want_got_plt
19830 #define elf_backend_want_got_plt 0
19831
19832 #undef elf_backend_plt_sym_val
19833 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19834
19835 #undef elf_backend_may_use_rel_p
19836 #define elf_backend_may_use_rel_p 1
19837 #undef elf_backend_may_use_rela_p
19838 #define elf_backend_may_use_rela_p 0
19839 #undef elf_backend_default_use_rela_p
19840 #define elf_backend_default_use_rela_p 0
19841 #undef elf_backend_want_plt_sym
19842 #define elf_backend_want_plt_sym 0
19843 #undef elf_backend_dtrel_excludes_plt
19844 #define elf_backend_dtrel_excludes_plt 0
19845 #undef ELF_MAXPAGESIZE
19846 #define ELF_MAXPAGESIZE 0x8000
19847
19848 #include "elf32-target.h"
GDB Binutils - Deliverables
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