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Pass link_info to _bfd_merge_private_bfd_data
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "bfdlink.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "libiberty.h"
30 #include "bfd_stdint.h"
31 #include "elf/nds32.h"
32 #include "opcode/nds32.h"
33 #include "elf32-nds32.h"
34 #include "opcode/cgen.h"
35 #include "../opcodes/nds32-opc.h"
36
37 /* Relocation HOWTO functions. */
38 static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42 static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45 static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48 static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51 static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55 /* Helper functions for HOWTO. */
56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59 static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61 static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66 /* Target hooks. */
67 static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69 static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71 static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74 static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77 static bfd_boolean nds32_elf_object_p (bfd *);
78 static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79 static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80 static bfd_boolean nds32_elf_merge_private_bfd_data
81 (bfd *, struct bfd_link_info *);
82 static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
83 static bfd_boolean nds32_elf_gc_sweep_hook
84 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
85 static bfd_boolean nds32_elf_check_relocs
86 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
87 static asection *nds32_elf_gc_mark_hook
88 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
89 struct elf_link_hash_entry *, Elf_Internal_Sym *);
90 static bfd_boolean nds32_elf_adjust_dynamic_symbol
91 (struct bfd_link_info *, struct elf_link_hash_entry *);
92 static bfd_boolean nds32_elf_size_dynamic_sections
93 (bfd *, struct bfd_link_info *);
94 static bfd_boolean nds32_elf_create_dynamic_sections
95 (bfd *, struct bfd_link_info *);
96 static bfd_boolean nds32_elf_finish_dynamic_sections
97 (bfd *, struct bfd_link_info *info);
98 static bfd_boolean nds32_elf_finish_dynamic_symbol
99 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
100 Elf_Internal_Sym *);
101 static bfd_boolean nds32_elf_mkobject (bfd *);
102
103 /* Nds32 helper functions. */
104 static bfd_reloc_status_type nds32_elf_final_sda_base
105 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
106 static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
107 static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
108 static Elf_Internal_Rela *find_relocs_at_address
109 (Elf_Internal_Rela *, Elf_Internal_Rela *,
110 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
111 static bfd_vma calculate_memory_address
112 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
113 static int nds32_get_section_contents (bfd *, asection *,
114 bfd_byte **, bfd_boolean);
115 static bfd_boolean nds32_elf_ex9_build_hash_table
116 (bfd *, asection *, struct bfd_link_info *);
117 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
118 static void nds32_elf_ex9_import_table (struct bfd_link_info *);
119 static void nds32_elf_ex9_finish (struct bfd_link_info *);
120 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
121 static void nds32_elf_get_insn_with_reg
122 (Elf_Internal_Rela *, uint32_t, uint32_t *);
123 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
124 Elf_Internal_Sym **);
125 static bfd_boolean nds32_elf_ex9_replace_instruction
126 (struct bfd_link_info *, bfd *, asection *);
127 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
128 asection *);
129 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
130 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
131 static bfd_boolean nds32_elf_ifc_reloc (void);
132 static bfd_boolean nds32_relax_fp_as_gp
133 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
134 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
135 Elf_Internal_Sym *isymbuf);
136 static bfd_boolean nds32_fag_remove_unused_fpbase
137 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
138 Elf_Internal_Rela *irelend);
139 static bfd_byte *
140 nds32_elf_get_relocated_section_contents (bfd *abfd,
141 struct bfd_link_info *link_info,
142 struct bfd_link_order *link_order,
143 bfd_byte *data,
144 bfd_boolean relocatable,
145 asymbol **symbols);
146
147 enum
148 {
149 MACH_V1 = bfd_mach_n1h,
150 MACH_V2 = bfd_mach_n1h_v2,
151 MACH_V3 = bfd_mach_n1h_v3,
152 MACH_V3M = bfd_mach_n1h_v3m
153 };
154
155 #define MIN(a, b) ((a) > (b) ? (b) : (a))
156 #define MAX(a, b) ((a) > (b) ? (a) : (b))
157
158 /* The name of the dynamic interpreter. This is put in the .interp
159 section. */
160 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
161
162 /* The nop opcode we use. */
163 #define NDS32_NOP32 0x40000009
164 #define NDS32_NOP16 0x9200
165
166 /* The size in bytes of an entry in the procedure linkage table. */
167 #define PLT_ENTRY_SIZE 24
168 #define PLT_HEADER_SIZE 24
169
170 /* The first entry in a procedure linkage table are reserved,
171 and the initial contents are unimportant (we zero them out).
172 Subsequent entries look like this. */
173 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
174 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
175 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
176 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
177 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
178
179 /* $ta is change to $r15 (from $r25). */
180 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
181 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
182 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
183 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
184 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
185 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
186
187 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
188 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
189 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
190 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
191 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
192
193 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
194 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
195 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
196 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
197 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
198 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
199
200 /* These are macros used to get the relocation accurate value. */
201 #define ACCURATE_8BIT_S1 (0x100)
202 #define ACCURATE_U9BIT_S1 (0x400)
203 #define ACCURATE_12BIT_S1 (0x2000)
204 #define ACCURATE_14BIT_S1 (0x4000)
205 #define ACCURATE_19BIT (0x40000)
206
207 /* These are macros used to get the relocation conservative value. */
208 #define CONSERVATIVE_8BIT_S1 (0x100 - 4)
209 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
210 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
211 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
212 /* These must be more conservative because the address may be in
213 different segment. */
214 #define CONSERVATIVE_15BIT (0x4000 - 0x1000)
215 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
216 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
217 #define CONSERVATIVE_19BIT (0x40000 - 0x1000)
218 #define CONSERVATIVE_20BIT (0x80000 - 0x1000)
219
220 /* Size of small data/bss sections, used to calculate SDA_BASE. */
221 static long got_size = 0;
222 static int is_SDA_BASE_set = 0;
223 static int is_ITB_BASE_set = 0;
224
225 /* Convert ELF-VER in eflags to string for debugging purpose. */
226 static const char *const nds32_elfver_strtab[] =
227 {
228 "ELF-1.2",
229 "ELF-1.3",
230 "ELF-1.4",
231 };
232
233 /* The nds32 linker needs to keep track of the number of relocs that it
234 decides to copy in check_relocs for each symbol. This is so that
235 it can discard PC relative relocs if it doesn't need them when
236 linking with -Bsymbolic. We store the information in a field
237 extending the regular ELF linker hash table. */
238
239 /* This structure keeps track of the number of PC relative relocs we
240 have copied for a given symbol. */
241
242 struct elf_nds32_pcrel_relocs_copied
243 {
244 /* Next section. */
245 struct elf_nds32_pcrel_relocs_copied *next;
246 /* A section in dynobj. */
247 asection *section;
248 /* Number of relocs copied in this section. */
249 bfd_size_type count;
250 };
251
252 /* The sh linker needs to keep track of the number of relocs that it
253 decides to copy as dynamic relocs in check_relocs for each symbol.
254 This is so that it can later discard them if they are found to be
255 unnecessary. We store the information in a field extending the
256 regular ELF linker hash table. */
257
258 struct elf_nds32_dyn_relocs
259 {
260 struct elf_nds32_dyn_relocs *next;
261
262 /* The input section of the reloc. */
263 asection *sec;
264
265 /* Total number of relocs copied for the input section. */
266 bfd_size_type count;
267
268 /* Number of pc-relative relocs copied for the input section. */
269 bfd_size_type pc_count;
270 };
271
272 /* Nds32 ELF linker hash entry. */
273
274 struct elf_nds32_link_hash_entry
275 {
276 struct elf_link_hash_entry root;
277
278 /* Track dynamic relocs copied for this symbol. */
279 struct elf_nds32_dyn_relocs *dyn_relocs;
280
281 /* For checking relocation type. */
282 #define GOT_UNKNOWN 0
283 #define GOT_NORMAL 1
284 #define GOT_TLS_IE 2
285 unsigned int tls_type;
286 };
287
288 /* Get the nds32 ELF linker hash table from a link_info structure. */
289
290 #define FP_BASE_NAME "_FP_BASE_"
291 static int check_start_export_sym = 0;
292 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
293
294 /* The offset for executable tls relaxation. */
295 #define TP_OFFSET 0x0
296
297 struct elf_nds32_obj_tdata
298 {
299 struct elf_obj_tdata root;
300
301 /* tls_type for each local got entry. */
302 char *local_got_tls_type;
303 };
304
305 #define elf_nds32_tdata(bfd) \
306 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
307
308 #define elf32_nds32_local_got_tls_type(bfd) \
309 (elf_nds32_tdata (bfd)->local_got_tls_type)
310
311 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
312
313 static bfd_boolean
314 nds32_elf_mkobject (bfd *abfd)
315 {
316 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
317 NDS32_ELF_DATA);
318 }
319
320 /* Relocations used for relocation. */
321 static reloc_howto_type nds32_elf_howto_table[] =
322 {
323 /* This reloc does nothing. */
324 HOWTO (R_NDS32_NONE, /* type */
325 0, /* rightshift */
326 3, /* size (0 = byte, 1 = short, 2 = long) */
327 0, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_dont, /* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_NDS32_NONE", /* name */
333 FALSE, /* partial_inplace */
334 0, /* src_mask */
335 0, /* dst_mask */
336 FALSE), /* pcrel_offset */
337
338 /* A 16 bit absolute relocation. */
339 HOWTO (R_NDS32_16, /* type */
340 0, /* rightshift */
341 1, /* size (0 = byte, 1 = short, 2 = long) */
342 16, /* bitsize */
343 FALSE, /* pc_relative */
344 0, /* bitpos */
345 complain_overflow_bitfield, /* complain_on_overflow */
346 nds32_elf_generic_reloc, /* special_function */
347 "R_NDS32_16", /* name */
348 FALSE, /* partial_inplace */
349 0xffff, /* src_mask */
350 0xffff, /* dst_mask */
351 FALSE), /* pcrel_offset */
352
353 /* A 32 bit absolute relocation. */
354 HOWTO (R_NDS32_32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield, /* complain_on_overflow */
361 nds32_elf_generic_reloc, /* special_function */
362 "R_NDS32_32", /* name */
363 FALSE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
367
368 /* A 20 bit address. */
369 HOWTO (R_NDS32_20, /* type */
370 0, /* rightshift */
371 2, /* size (0 = byte, 1 = short, 2 = long) */
372 20, /* bitsize */
373 FALSE, /* pc_relative */
374 0, /* bitpos */
375 complain_overflow_unsigned, /* complain_on_overflow */
376 nds32_elf_generic_reloc, /* special_function */
377 "R_NDS32_20", /* name */
378 FALSE, /* partial_inplace */
379 0xfffff, /* src_mask */
380 0xfffff, /* dst_mask */
381 FALSE), /* pcrel_offset */
382
383 /* An PC Relative 9-bit relocation, shifted by 2.
384 This reloc is complicated because relocations are relative to pc & -4.
385 i.e. branches in the right insn slot use the address of the left insn
386 slot for pc. */
387 /* ??? It's not clear whether this should have partial_inplace set or not.
388 Branch relaxing in the assembler can store the addend in the insn,
389 and if bfd_install_relocation gets called the addend may get added
390 again. */
391 HOWTO (R_NDS32_9_PCREL, /* type */
392 1, /* rightshift */
393 1, /* size (0 = byte, 1 = short, 2 = long) */
394 8, /* bitsize */
395 TRUE, /* pc_relative */
396 0, /* bitpos */
397 complain_overflow_signed, /* complain_on_overflow */
398 nds32_elf_9_pcrel_reloc, /* special_function */
399 "R_NDS32_9_PCREL", /* name */
400 FALSE, /* partial_inplace */
401 0xff, /* src_mask */
402 0xff, /* dst_mask */
403 TRUE), /* pcrel_offset */
404
405 /* A relative 15 bit relocation, right shifted by 1. */
406 HOWTO (R_NDS32_15_PCREL, /* type */
407 1, /* rightshift */
408 2, /* size (0 = byte, 1 = short, 2 = long) */
409 14, /* bitsize */
410 TRUE, /* pc_relative */
411 0, /* bitpos */
412 complain_overflow_signed, /* complain_on_overflow */
413 bfd_elf_generic_reloc, /* special_function */
414 "R_NDS32_15_PCREL", /* name */
415 FALSE, /* partial_inplace */
416 0x3fff, /* src_mask */
417 0x3fff, /* dst_mask */
418 TRUE), /* pcrel_offset */
419
420 /* A relative 17 bit relocation, right shifted by 1. */
421 HOWTO (R_NDS32_17_PCREL, /* type */
422 1, /* rightshift */
423 2, /* size (0 = byte, 1 = short, 2 = long) */
424 16, /* bitsize */
425 TRUE, /* pc_relative */
426 0, /* bitpos */
427 complain_overflow_signed, /* complain_on_overflow */
428 bfd_elf_generic_reloc, /* special_function */
429 "R_NDS32_17_PCREL", /* name */
430 FALSE, /* partial_inplace */
431 0xffff, /* src_mask */
432 0xffff, /* dst_mask */
433 TRUE), /* pcrel_offset */
434
435 /* A relative 25 bit relocation, right shifted by 1. */
436 /* ??? It's not clear whether this should have partial_inplace set or not.
437 Branch relaxing in the assembler can store the addend in the insn,
438 and if bfd_install_relocation gets called the addend may get added
439 again. */
440 HOWTO (R_NDS32_25_PCREL, /* type */
441 1, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 24, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_signed, /* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_NDS32_25_PCREL", /* name */
449 FALSE, /* partial_inplace */
450 0xffffff, /* src_mask */
451 0xffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 /* High 20 bits of address when lower 12 is or'd in. */
455 HOWTO (R_NDS32_HI20, /* type */
456 12, /* rightshift */
457 2, /* size (0 = byte, 1 = short, 2 = long) */
458 20, /* bitsize */
459 FALSE, /* pc_relative */
460 0, /* bitpos */
461 complain_overflow_dont,/* complain_on_overflow */
462 nds32_elf_hi20_reloc, /* special_function */
463 "R_NDS32_HI20", /* name */
464 FALSE, /* partial_inplace */
465 0x000fffff, /* src_mask */
466 0x000fffff, /* dst_mask */
467 FALSE), /* pcrel_offset */
468
469 /* Lower 12 bits of address. */
470 HOWTO (R_NDS32_LO12S3, /* type */
471 3, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 9, /* bitsize */
474 FALSE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_dont,/* complain_on_overflow */
477 nds32_elf_lo12_reloc, /* special_function */
478 "R_NDS32_LO12S3", /* name */
479 FALSE, /* partial_inplace */
480 0x000001ff, /* src_mask */
481 0x000001ff, /* dst_mask */
482 FALSE), /* pcrel_offset */
483
484 /* Lower 12 bits of address. */
485 HOWTO (R_NDS32_LO12S2, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 10, /* bitsize */
489 FALSE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_dont,/* complain_on_overflow */
492 nds32_elf_lo12_reloc, /* special_function */
493 "R_NDS32_LO12S2", /* name */
494 FALSE, /* partial_inplace */
495 0x000003ff, /* src_mask */
496 0x000003ff, /* dst_mask */
497 FALSE), /* pcrel_offset */
498
499 /* Lower 12 bits of address. */
500 HOWTO (R_NDS32_LO12S1, /* type */
501 1, /* rightshift */
502 2, /* size (0 = byte, 1 = short, 2 = long) */
503 11, /* bitsize */
504 FALSE, /* pc_relative */
505 0, /* bitpos */
506 complain_overflow_dont,/* complain_on_overflow */
507 nds32_elf_lo12_reloc, /* special_function */
508 "R_NDS32_LO12S1", /* name */
509 FALSE, /* partial_inplace */
510 0x000007ff, /* src_mask */
511 0x000007ff, /* dst_mask */
512 FALSE), /* pcrel_offset */
513
514 /* Lower 12 bits of address. */
515 HOWTO (R_NDS32_LO12S0, /* type */
516 0, /* rightshift */
517 2, /* size (0 = byte, 1 = short, 2 = long) */
518 12, /* bitsize */
519 FALSE, /* pc_relative */
520 0, /* bitpos */
521 complain_overflow_dont,/* complain_on_overflow */
522 nds32_elf_lo12_reloc, /* special_function */
523 "R_NDS32_LO12S0", /* name */
524 FALSE, /* partial_inplace */
525 0x00000fff, /* src_mask */
526 0x00000fff, /* dst_mask */
527 FALSE), /* pcrel_offset */
528
529 /* Small data area 15 bits offset. */
530 HOWTO (R_NDS32_SDA15S3, /* type */
531 3, /* rightshift */
532 2, /* size (0 = byte, 1 = short, 2 = long) */
533 15, /* bitsize */
534 FALSE, /* pc_relative */
535 0, /* bitpos */
536 complain_overflow_signed, /* complain_on_overflow */
537 nds32_elf_sda15_reloc, /* special_function */
538 "R_NDS32_SDA15S3", /* name */
539 FALSE, /* partial_inplace */
540 0x00007fff, /* src_mask */
541 0x00007fff, /* dst_mask */
542 FALSE), /* pcrel_offset */
543
544 /* Small data area 15 bits offset. */
545 HOWTO (R_NDS32_SDA15S2, /* type */
546 2, /* rightshift */
547 2, /* size (0 = byte, 1 = short, 2 = long) */
548 15, /* bitsize */
549 FALSE, /* pc_relative */
550 0, /* bitpos */
551 complain_overflow_signed, /* complain_on_overflow */
552 nds32_elf_sda15_reloc, /* special_function */
553 "R_NDS32_SDA15S2", /* name */
554 FALSE, /* partial_inplace */
555 0x00007fff, /* src_mask */
556 0x00007fff, /* dst_mask */
557 FALSE), /* pcrel_offset */
558
559 /* Small data area 15 bits offset. */
560 HOWTO (R_NDS32_SDA15S1, /* type */
561 1, /* rightshift */
562 2, /* size (0 = byte, 1 = short, 2 = long) */
563 15, /* bitsize */
564 FALSE, /* pc_relative */
565 0, /* bitpos */
566 complain_overflow_signed, /* complain_on_overflow */
567 nds32_elf_sda15_reloc, /* special_function */
568 "R_NDS32_SDA15S1", /* name */
569 FALSE, /* partial_inplace */
570 0x00007fff, /* src_mask */
571 0x00007fff, /* dst_mask */
572 FALSE), /* pcrel_offset */
573
574 /* Small data area 15 bits offset. */
575 HOWTO (R_NDS32_SDA15S0, /* type */
576 0, /* rightshift */
577 2, /* size (0 = byte, 1 = short, 2 = long) */
578 15, /* bitsize */
579 FALSE, /* pc_relative */
580 0, /* bitpos */
581 complain_overflow_signed, /* complain_on_overflow */
582 nds32_elf_sda15_reloc, /* special_function */
583 "R_NDS32_SDA15S0", /* name */
584 FALSE, /* partial_inplace */
585 0x00007fff, /* src_mask */
586 0x00007fff, /* dst_mask */
587 FALSE), /* pcrel_offset */
588
589 /* GNU extension to record C++ vtable hierarchy */
590 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
591 0, /* rightshift */
592 2, /* size (0 = byte, 1 = short, 2 = long) */
593 0, /* bitsize */
594 FALSE, /* pc_relative */
595 0, /* bitpos */
596 complain_overflow_dont,/* complain_on_overflow */
597 NULL, /* special_function */
598 "R_NDS32_GNU_VTINHERIT", /* name */
599 FALSE, /* partial_inplace */
600 0, /* src_mask */
601 0, /* dst_mask */
602 FALSE), /* pcrel_offset */
603
604 /* GNU extension to record C++ vtable member usage */
605 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 0, /* bitsize */
609 FALSE, /* pc_relative */
610 0, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
613 "R_NDS32_GNU_VTENTRY", /* name */
614 FALSE, /* partial_inplace */
615 0, /* src_mask */
616 0, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 /* A 16 bit absolute relocation. */
620 HOWTO (R_NDS32_16_RELA, /* type */
621 0, /* rightshift */
622 1, /* size (0 = byte, 1 = short, 2 = long) */
623 16, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_bitfield, /* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_NDS32_16_RELA", /* name */
629 FALSE, /* partial_inplace */
630 0xffff, /* src_mask */
631 0xffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 /* A 32 bit absolute relocation. */
635 HOWTO (R_NDS32_32_RELA, /* type */
636 0, /* rightshift */
637 2, /* size (0 = byte, 1 = short, 2 = long) */
638 32, /* bitsize */
639 FALSE, /* pc_relative */
640 0, /* bitpos */
641 complain_overflow_bitfield, /* complain_on_overflow */
642 bfd_elf_generic_reloc, /* special_function */
643 "R_NDS32_32_RELA", /* name */
644 FALSE, /* partial_inplace */
645 0xffffffff, /* src_mask */
646 0xffffffff, /* dst_mask */
647 FALSE), /* pcrel_offset */
648
649 /* A 20 bit address. */
650 HOWTO (R_NDS32_20_RELA, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 20, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_signed, /* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_NDS32_20_RELA", /* name */
659 FALSE, /* partial_inplace */
660 0xfffff, /* src_mask */
661 0xfffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
665 1, /* rightshift */
666 1, /* size (0 = byte, 1 = short, 2 = long) */
667 8, /* bitsize */
668 TRUE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed, /* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_NDS32_9_PCREL_RELA",/* name */
673 FALSE, /* partial_inplace */
674 0xff, /* src_mask */
675 0xff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 /* A relative 15 bit relocation, right shifted by 1. */
679 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
680 1, /* rightshift */
681 2, /* size (0 = byte, 1 = short, 2 = long) */
682 14, /* bitsize */
683 TRUE, /* pc_relative */
684 0, /* bitpos */
685 complain_overflow_signed, /* complain_on_overflow */
686 bfd_elf_generic_reloc, /* special_function */
687 "R_NDS32_15_PCREL_RELA", /* name */
688 FALSE, /* partial_inplace */
689 0x3fff, /* src_mask */
690 0x3fff, /* dst_mask */
691 TRUE), /* pcrel_offset */
692
693 /* A relative 17 bit relocation, right shifted by 1. */
694 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
695 1, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 TRUE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_signed, /* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_NDS32_17_PCREL_RELA", /* name */
703 FALSE, /* partial_inplace */
704 0xffff, /* src_mask */
705 0xffff, /* dst_mask */
706 TRUE), /* pcrel_offset */
707
708 /* A relative 25 bit relocation, right shifted by 2. */
709 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
710 1, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 24, /* bitsize */
713 TRUE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_signed, /* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_NDS32_25_PCREL_RELA", /* name */
718 FALSE, /* partial_inplace */
719 0xffffff, /* src_mask */
720 0xffffff, /* dst_mask */
721 TRUE), /* pcrel_offset */
722
723 /* High 20 bits of address when lower 16 is or'd in. */
724 HOWTO (R_NDS32_HI20_RELA, /* type */
725 12, /* rightshift */
726 2, /* size (0 = byte, 1 = short, 2 = long) */
727 20, /* bitsize */
728 FALSE, /* pc_relative */
729 0, /* bitpos */
730 complain_overflow_dont,/* complain_on_overflow */
731 bfd_elf_generic_reloc, /* special_function */
732 "R_NDS32_HI20_RELA", /* name */
733 FALSE, /* partial_inplace */
734 0x000fffff, /* src_mask */
735 0x000fffff, /* dst_mask */
736 FALSE), /* pcrel_offset */
737
738 /* Lower 12 bits of address. */
739 HOWTO (R_NDS32_LO12S3_RELA, /* type */
740 3, /* rightshift */
741 2, /* size (0 = byte, 1 = short, 2 = long) */
742 9, /* bitsize */
743 FALSE, /* pc_relative */
744 0, /* bitpos */
745 complain_overflow_dont,/* complain_on_overflow */
746 bfd_elf_generic_reloc, /* special_function */
747 "R_NDS32_LO12S3_RELA", /* name */
748 FALSE, /* partial_inplace */
749 0x000001ff, /* src_mask */
750 0x000001ff, /* dst_mask */
751 FALSE), /* pcrel_offset */
752
753 /* Lower 12 bits of address. */
754 HOWTO (R_NDS32_LO12S2_RELA, /* type */
755 2, /* rightshift */
756 2, /* size (0 = byte, 1 = short, 2 = long) */
757 10, /* bitsize */
758 FALSE, /* pc_relative */
759 0, /* bitpos */
760 complain_overflow_dont,/* complain_on_overflow */
761 bfd_elf_generic_reloc, /* special_function */
762 "R_NDS32_LO12S2_RELA", /* name */
763 FALSE, /* partial_inplace */
764 0x000003ff, /* src_mask */
765 0x000003ff, /* dst_mask */
766 FALSE), /* pcrel_offset */
767
768 /* Lower 12 bits of address. */
769 HOWTO (R_NDS32_LO12S1_RELA, /* type */
770 1, /* rightshift */
771 2, /* size (0 = byte, 1 = short, 2 = long) */
772 11, /* bitsize */
773 FALSE, /* pc_relative */
774 0, /* bitpos */
775 complain_overflow_dont,/* complain_on_overflow */
776 bfd_elf_generic_reloc, /* special_function */
777 "R_NDS32_LO12S1_RELA", /* name */
778 FALSE, /* partial_inplace */
779 0x000007ff, /* src_mask */
780 0x000007ff, /* dst_mask */
781 FALSE), /* pcrel_offset */
782
783 /* Lower 12 bits of address. */
784 HOWTO (R_NDS32_LO12S0_RELA, /* type */
785 0, /* rightshift */
786 2, /* size (0 = byte, 1 = short, 2 = long) */
787 12, /* bitsize */
788 FALSE, /* pc_relative */
789 0, /* bitpos */
790 complain_overflow_dont,/* complain_on_overflow */
791 bfd_elf_generic_reloc, /* special_function */
792 "R_NDS32_LO12S0_RELA", /* name */
793 FALSE, /* partial_inplace */
794 0x00000fff, /* src_mask */
795 0x00000fff, /* dst_mask */
796 FALSE), /* pcrel_offset */
797
798 /* Small data area 15 bits offset. */
799 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
800 3, /* rightshift */
801 2, /* size (0 = byte, 1 = short, 2 = long) */
802 15, /* bitsize */
803 FALSE, /* pc_relative */
804 0, /* bitpos */
805 complain_overflow_signed, /* complain_on_overflow */
806 bfd_elf_generic_reloc, /* special_function */
807 "R_NDS32_SDA15S3_RELA",/* name */
808 FALSE, /* partial_inplace */
809 0x00007fff, /* src_mask */
810 0x00007fff, /* dst_mask */
811 FALSE), /* pcrel_offset */
812
813 /* Small data area 15 bits offset. */
814 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
815 2, /* rightshift */
816 2, /* size (0 = byte, 1 = short, 2 = long) */
817 15, /* bitsize */
818 FALSE, /* pc_relative */
819 0, /* bitpos */
820 complain_overflow_signed, /* complain_on_overflow */
821 bfd_elf_generic_reloc, /* special_function */
822 "R_NDS32_SDA15S2_RELA",/* name */
823 FALSE, /* partial_inplace */
824 0x00007fff, /* src_mask */
825 0x00007fff, /* dst_mask */
826 FALSE), /* pcrel_offset */
827
828 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
829 1, /* rightshift */
830 2, /* size (0 = byte, 1 = short, 2 = long) */
831 15, /* bitsize */
832 FALSE, /* pc_relative */
833 0, /* bitpos */
834 complain_overflow_signed, /* complain_on_overflow */
835 bfd_elf_generic_reloc, /* special_function */
836 "R_NDS32_SDA15S1_RELA",/* name */
837 FALSE, /* partial_inplace */
838 0x00007fff, /* src_mask */
839 0x00007fff, /* dst_mask */
840 FALSE), /* pcrel_offset */
841
842 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
843 0, /* rightshift */
844 2, /* size (0 = byte, 1 = short, 2 = long) */
845 15, /* bitsize */
846 FALSE, /* pc_relative */
847 0, /* bitpos */
848 complain_overflow_signed, /* complain_on_overflow */
849 bfd_elf_generic_reloc, /* special_function */
850 "R_NDS32_SDA15S0_RELA",/* name */
851 FALSE, /* partial_inplace */
852 0x00007fff, /* src_mask */
853 0x00007fff, /* dst_mask */
854 FALSE), /* pcrel_offset */
855
856 /* GNU extension to record C++ vtable hierarchy */
857 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
858 0, /* rightshift */
859 2, /* size (0 = byte, 1 = short, 2 = long) */
860 0, /* bitsize */
861 FALSE, /* pc_relative */
862 0, /* bitpos */
863 complain_overflow_dont,/* complain_on_overflow */
864 NULL, /* special_function */
865 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
866 FALSE, /* partial_inplace */
867 0, /* src_mask */
868 0, /* dst_mask */
869 FALSE), /* pcrel_offset */
870
871 /* GNU extension to record C++ vtable member usage */
872 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
873 0, /* rightshift */
874 2, /* size (0 = byte, 1 = short, 2 = long) */
875 0, /* bitsize */
876 FALSE, /* pc_relative */
877 0, /* bitpos */
878 complain_overflow_dont,/* complain_on_overflow */
879 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
880 "R_NDS32_RELA_GNU_VTENTRY", /* name */
881 FALSE, /* partial_inplace */
882 0, /* src_mask */
883 0, /* dst_mask */
884 FALSE), /* pcrel_offset */
885
886 /* Like R_NDS32_20, but referring to the GOT table entry for
887 the symbol. */
888 HOWTO (R_NDS32_GOT20, /* type */
889 0, /* rightshift */
890 2, /* size (0 = byte, 1 = short, 2 = long) */
891 20, /* bitsize */
892 FALSE, /* pc_relative */
893 0, /* bitpos */
894 complain_overflow_signed, /* complain_on_overflow */
895 bfd_elf_generic_reloc, /* special_function */
896 "R_NDS32_GOT20", /* name */
897 FALSE, /* partial_inplace */
898 0xfffff, /* src_mask */
899 0xfffff, /* dst_mask */
900 FALSE), /* pcrel_offset */
901
902 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
903 entry for the symbol. */
904 HOWTO (R_NDS32_25_PLTREL, /* type */
905 1, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 24, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_signed, /* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_NDS32_25_PLTREL", /* name */
913 FALSE, /* partial_inplace */
914 0xffffff, /* src_mask */
915 0xffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 /* This is used only by the dynamic linker. The symbol should exist
919 both in the object being run and in some shared library. The
920 dynamic linker copies the data addressed by the symbol from the
921 shared library into the object, because the object being
922 run has to have the data at some particular address. */
923 HOWTO (R_NDS32_COPY, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 FALSE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_bitfield, /* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_NDS32_COPY", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 FALSE), /* pcrel_offset */
936
937 /* Like R_NDS32_20, but used when setting global offset table
938 entries. */
939 HOWTO (R_NDS32_GLOB_DAT, /* type */
940 0, /* rightshift */
941 2, /* size (0 = byte, 1 = short, 2 = long) */
942 32, /* bitsize */
943 FALSE, /* pc_relative */
944 0, /* bitpos */
945 complain_overflow_bitfield, /* complain_on_overflow */
946 bfd_elf_generic_reloc, /* special_function */
947 "R_NDS32_GLOB_DAT", /* name */
948 FALSE, /* partial_inplace */
949 0xffffffff, /* src_mask */
950 0xffffffff, /* dst_mask */
951 FALSE), /* pcrel_offset */
952
953 /* Marks a procedure linkage table entry for a symbol. */
954 HOWTO (R_NDS32_JMP_SLOT, /* type */
955 0, /* rightshift */
956 2, /* size (0 = byte, 1 = short, 2 = long) */
957 32, /* bitsize */
958 FALSE, /* pc_relative */
959 0, /* bitpos */
960 complain_overflow_bitfield, /* complain_on_overflow */
961 bfd_elf_generic_reloc, /* special_function */
962 "R_NDS32_JMP_SLOT", /* name */
963 FALSE, /* partial_inplace */
964 0xffffffff, /* src_mask */
965 0xffffffff, /* dst_mask */
966 FALSE), /* pcrel_offset */
967
968 /* Used only by the dynamic linker. When the object is run, this
969 longword is set to the load address of the object, plus the
970 addend. */
971 HOWTO (R_NDS32_RELATIVE, /* type */
972 0, /* rightshift */
973 2, /* size (0 = byte, 1 = short, 2 = long) */
974 32, /* bitsize */
975 FALSE, /* pc_relative */
976 0, /* bitpos */
977 complain_overflow_bitfield, /* complain_on_overflow */
978 bfd_elf_generic_reloc, /* special_function */
979 "R_NDS32_RELATIVE", /* name */
980 FALSE, /* partial_inplace */
981 0xffffffff, /* src_mask */
982 0xffffffff, /* dst_mask */
983 FALSE), /* pcrel_offset */
984
985 HOWTO (R_NDS32_GOTOFF, /* type */
986 0, /* rightshift */
987 2, /* size (0 = byte, 1 = short, 2 = long) */
988 20, /* bitsize */
989 FALSE, /* pc_relative */
990 0, /* bitpos */
991 complain_overflow_signed, /* complain_on_overflow */
992 bfd_elf_generic_reloc, /* special_function */
993 "R_NDS32_GOTOFF", /* name */
994 FALSE, /* partial_inplace */
995 0xfffff, /* src_mask */
996 0xfffff, /* dst_mask */
997 FALSE), /* pcrel_offset */
998
999 /* An PC Relative 20-bit relocation used when setting PIC offset
1000 table register. */
1001 HOWTO (R_NDS32_GOTPC20, /* type */
1002 0, /* rightshift */
1003 2, /* size (0 = byte, 1 = short, 2 = long) */
1004 20, /* bitsize */
1005 TRUE, /* pc_relative */
1006 0, /* bitpos */
1007 complain_overflow_signed, /* complain_on_overflow */
1008 bfd_elf_generic_reloc, /* special_function */
1009 "R_NDS32_GOTPC20", /* name */
1010 FALSE, /* partial_inplace */
1011 0xfffff, /* src_mask */
1012 0xfffff, /* dst_mask */
1013 TRUE), /* pcrel_offset */
1014
1015 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1016 the symbol. */
1017 HOWTO (R_NDS32_GOT_HI20, /* type */
1018 12, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 20, /* bitsize */
1021 FALSE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_NDS32_GOT_HI20", /* name */
1026 FALSE, /* partial_inplace */
1027 0x000fffff, /* src_mask */
1028 0x000fffff, /* dst_mask */
1029 FALSE), /* pcrel_offset */
1030 HOWTO (R_NDS32_GOT_LO12, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 12, /* bitsize */
1034 FALSE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_NDS32_GOT_LO12", /* name */
1039 FALSE, /* partial_inplace */
1040 0x00000fff, /* src_mask */
1041 0x00000fff, /* dst_mask */
1042 FALSE), /* pcrel_offset */
1043
1044 /* An PC Relative relocation used when setting PIC offset table register.
1045 Like R_NDS32_HI20, but referring to the GOT table entry for
1046 the symbol. */
1047 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1048 12, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 20, /* bitsize */
1051 FALSE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_NDS32_GOTPC_HI20", /* name */
1056 FALSE, /* partial_inplace */
1057 0x000fffff, /* src_mask */
1058 0x000fffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1061 0, /* rightshift */
1062 2, /* size (0 = byte, 1 = short, 2 = long) */
1063 12, /* bitsize */
1064 FALSE, /* pc_relative */
1065 0, /* bitpos */
1066 complain_overflow_dont, /* complain_on_overflow */
1067 bfd_elf_generic_reloc, /* special_function */
1068 "R_NDS32_GOTPC_LO12", /* name */
1069 FALSE, /* partial_inplace */
1070 0x00000fff, /* src_mask */
1071 0x00000fff, /* dst_mask */
1072 TRUE), /* pcrel_offset */
1073
1074 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1075 12, /* rightshift */
1076 2, /* size (0 = byte, 1 = short, 2 = long) */
1077 20, /* bitsize */
1078 FALSE, /* pc_relative */
1079 0, /* bitpos */
1080 complain_overflow_dont,/* complain_on_overflow */
1081 bfd_elf_generic_reloc, /* special_function */
1082 "R_NDS32_GOTOFF_HI20", /* name */
1083 FALSE, /* partial_inplace */
1084 0x000fffff, /* src_mask */
1085 0x000fffff, /* dst_mask */
1086 FALSE), /* pcrel_offset */
1087 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 12, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_NDS32_GOTOFF_LO12", /* name */
1096 FALSE, /* partial_inplace */
1097 0x00000fff, /* src_mask */
1098 0x00000fff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Alignment hint for relaxable instruction. This is used with
1102 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1103 in order to make next label aligned on word boundary. */
1104 HOWTO (R_NDS32_INSN16, /* type */
1105 0, /* rightshift */
1106 2, /* size (0 = byte, 1 = short, 2 = long) */
1107 32, /* bitsize */
1108 FALSE, /* pc_relative */
1109 0, /* bitpos */
1110 complain_overflow_dont,/* complain_on_overflow */
1111 nds32_elf_ignore_reloc,/* special_function */
1112 "R_NDS32_INSN16", /* name */
1113 FALSE, /* partial_inplace */
1114 0x00000fff, /* src_mask */
1115 0x00000fff, /* dst_mask */
1116 FALSE), /* pcrel_offset */
1117
1118 /* Alignment hint for label. */
1119 HOWTO (R_NDS32_LABEL, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 FALSE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 nds32_elf_ignore_reloc,/* special_function */
1127 "R_NDS32_LABEL", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 FALSE), /* pcrel_offset */
1132
1133 /* Relax hint for unconditional call sequence */
1134 HOWTO (R_NDS32_LONGCALL1, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 FALSE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 nds32_elf_ignore_reloc,/* special_function */
1142 "R_NDS32_LONGCALL1", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 FALSE), /* pcrel_offset */
1147
1148 /* Relax hint for conditional call sequence. */
1149 HOWTO (R_NDS32_LONGCALL2, /* type */
1150 0, /* rightshift */
1151 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 32, /* bitsize */
1153 FALSE, /* pc_relative */
1154 0, /* bitpos */
1155 complain_overflow_dont,/* complain_on_overflow */
1156 nds32_elf_ignore_reloc,/* special_function */
1157 "R_NDS32_LONGCALL2", /* name */
1158 FALSE, /* partial_inplace */
1159 0xffffffff, /* src_mask */
1160 0xffffffff, /* dst_mask */
1161 FALSE), /* pcrel_offset */
1162
1163 /* Relax hint for conditional call sequence. */
1164 HOWTO (R_NDS32_LONGCALL3, /* type */
1165 0, /* rightshift */
1166 2, /* size (0 = byte, 1 = short, 2 = long) */
1167 32, /* bitsize */
1168 FALSE, /* pc_relative */
1169 0, /* bitpos */
1170 complain_overflow_dont,/* complain_on_overflow */
1171 nds32_elf_ignore_reloc,/* special_function */
1172 "R_NDS32_LONGCALL3", /* name */
1173 FALSE, /* partial_inplace */
1174 0xffffffff, /* src_mask */
1175 0xffffffff, /* dst_mask */
1176 FALSE), /* pcrel_offset */
1177
1178 /* Relax hint for unconditional branch sequence. */
1179 HOWTO (R_NDS32_LONGJUMP1, /* type */
1180 0, /* rightshift */
1181 2, /* size (0 = byte, 1 = short, 2 = long) */
1182 32, /* bitsize */
1183 FALSE, /* pc_relative */
1184 0, /* bitpos */
1185 complain_overflow_dont,/* complain_on_overflow */
1186 nds32_elf_ignore_reloc,/* special_function */
1187 "R_NDS32_LONGJUMP1", /* name */
1188 FALSE, /* partial_inplace */
1189 0xffffffff, /* src_mask */
1190 0xffffffff, /* dst_mask */
1191 FALSE), /* pcrel_offset */
1192
1193 /* Relax hint for conditional branch sequence. */
1194 HOWTO (R_NDS32_LONGJUMP2, /* type */
1195 0, /* rightshift */
1196 2, /* size (0 = byte, 1 = short, 2 = long) */
1197 32, /* bitsize */
1198 FALSE, /* pc_relative */
1199 0, /* bitpos */
1200 complain_overflow_dont,/* complain_on_overflow */
1201 nds32_elf_ignore_reloc,/* special_function */
1202 "R_NDS32_LONGJUMP2", /* name */
1203 FALSE, /* partial_inplace */
1204 0xffffffff, /* src_mask */
1205 0xffffffff, /* dst_mask */
1206 FALSE), /* pcrel_offset */
1207
1208 /* Relax hint for conditional branch sequence. */
1209 HOWTO (R_NDS32_LONGJUMP3, /* type */
1210 0, /* rightshift */
1211 2, /* size (0 = byte, 1 = short, 2 = long) */
1212 32, /* bitsize */
1213 FALSE, /* pc_relative */
1214 0, /* bitpos */
1215 complain_overflow_dont,/* complain_on_overflow */
1216 nds32_elf_ignore_reloc,/* special_function */
1217 "R_NDS32_LONGJUMP3", /* name */
1218 FALSE, /* partial_inplace */
1219 0xffffffff, /* src_mask */
1220 0xffffffff, /* dst_mask */
1221 FALSE), /* pcrel_offset */
1222
1223 /* Relax hint for load/store sequence. */
1224 HOWTO (R_NDS32_LOADSTORE, /* type */
1225 0, /* rightshift */
1226 2, /* size (0 = byte, 1 = short, 2 = long) */
1227 32, /* bitsize */
1228 FALSE, /* pc_relative */
1229 0, /* bitpos */
1230 complain_overflow_dont,/* complain_on_overflow */
1231 nds32_elf_ignore_reloc,/* special_function */
1232 "R_NDS32_LOADSTORE", /* name */
1233 FALSE, /* partial_inplace */
1234 0xffffffff, /* src_mask */
1235 0xffffffff, /* dst_mask */
1236 FALSE), /* pcrel_offset */
1237
1238 /* Relax hint for load/store sequence. */
1239 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1240 0, /* rightshift */
1241 1, /* size (0 = byte, 1 = short, 2 = long) */
1242 16, /* bitsize */
1243 FALSE, /* pc_relative */
1244 0, /* bitpos */
1245 complain_overflow_dont,/* complain_on_overflow */
1246 nds32_elf_ignore_reloc,/* special_function */
1247 "R_NDS32_9_FIXED_RELA",/* name */
1248 FALSE, /* partial_inplace */
1249 0x000000ff, /* src_mask */
1250 0x000000ff, /* dst_mask */
1251 FALSE), /* pcrel_offset */
1252
1253 /* Relax hint for load/store sequence. */
1254 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 FALSE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 nds32_elf_ignore_reloc,/* special_function */
1262 "R_NDS32_15_FIXED_RELA", /* name */
1263 FALSE, /* partial_inplace */
1264 0x00003fff, /* src_mask */
1265 0x00003fff, /* dst_mask */
1266 FALSE), /* pcrel_offset */
1267
1268 /* Relax hint for load/store sequence. */
1269 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1270 0, /* rightshift */
1271 2, /* size (0 = byte, 1 = short, 2 = long) */
1272 32, /* bitsize */
1273 FALSE, /* pc_relative */
1274 0, /* bitpos */
1275 complain_overflow_dont,/* complain_on_overflow */
1276 nds32_elf_ignore_reloc,/* special_function */
1277 "R_NDS32_17_FIXED_RELA", /* name */
1278 FALSE, /* partial_inplace */
1279 0x0000ffff, /* src_mask */
1280 0x0000ffff, /* dst_mask */
1281 FALSE), /* pcrel_offset */
1282
1283 /* Relax hint for load/store sequence. */
1284 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 32, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_dont,/* complain_on_overflow */
1291 nds32_elf_ignore_reloc,/* special_function */
1292 "R_NDS32_25_FIXED_RELA", /* name */
1293 FALSE, /* partial_inplace */
1294 0x00ffffff, /* src_mask */
1295 0x00ffffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 /* High 20 bits of PLT symbol offset relative to PC. */
1299 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1300 12, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 20, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_NDS32_PLTREL_HI20", /* name */
1308 FALSE, /* partial_inplace */
1309 0x000fffff, /* src_mask */
1310 0x000fffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 /* Low 12 bits of PLT symbol offset relative to PC. */
1314 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1315 0, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 12, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_dont,/* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 "R_NDS32_PLTREL_LO12", /* name */
1323 FALSE, /* partial_inplace */
1324 0x00000fff, /* src_mask */
1325 0x00000fff, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
1328 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1329 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1330 12, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 20, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_dont,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_NDS32_PLT_GOTREL_HI20", /* name */
1338 FALSE, /* partial_inplace */
1339 0x000fffff, /* src_mask */
1340 0x000fffff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1344 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1345 0, /* rightshift */
1346 2, /* size (0 = byte, 1 = short, 2 = long) */
1347 12, /* bitsize */
1348 FALSE, /* pc_relative */
1349 0, /* bitpos */
1350 complain_overflow_dont,/* complain_on_overflow */
1351 bfd_elf_generic_reloc, /* special_function */
1352 "R_NDS32_PLT_GOTREL_LO12", /* name */
1353 FALSE, /* partial_inplace */
1354 0x00000fff, /* src_mask */
1355 0x00000fff, /* dst_mask */
1356 FALSE), /* pcrel_offset */
1357
1358 /* Small data area 12 bits offset. */
1359 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1360 2, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 12, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_signed, /* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_NDS32_SDA12S2_DP_RELA", /* name */
1368 FALSE, /* partial_inplace */
1369 0x00000fff, /* src_mask */
1370 0x00000fff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 /* Small data area 12 bits offset. */
1374 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1375 2, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 12, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_signed, /* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_NDS32_SDA12S2_SP_RELA", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00000fff, /* src_mask */
1385 0x00000fff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387 /* Lower 12 bits of address. */
1388
1389 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1390 2, /* rightshift */
1391 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 10, /* bitsize */
1393 FALSE, /* pc_relative */
1394 0, /* bitpos */
1395 complain_overflow_dont,/* complain_on_overflow */
1396 bfd_elf_generic_reloc, /* special_function */
1397 "R_NDS32_LO12S2_DP_RELA", /* name */
1398 FALSE, /* partial_inplace */
1399 0x000003ff, /* src_mask */
1400 0x000003ff, /* dst_mask */
1401 FALSE), /* pcrel_offset */
1402
1403 /* Lower 12 bits of address. */
1404 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1405 2, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 10, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_dont,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_NDS32_LO12S2_SP_RELA", /* name */
1413 FALSE, /* partial_inplace */
1414 0x000003ff, /* src_mask */
1415 0x000003ff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417 /* Lower 12 bits of address. Special identity for or case. */
1418 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_dont,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_NDS32_LO12S0_ORI_RELA", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431 /* Small data area 19 bits offset. */
1432 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1433 3, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
1435 16, /* bitsize */
1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
1438 complain_overflow_signed, /* complain_on_overflow */
1439 bfd_elf_generic_reloc, /* special_function */
1440 "R_NDS32_SDA16S3_RELA",/* name */
1441 FALSE, /* partial_inplace */
1442 0x0000ffff, /* src_mask */
1443 0x0000ffff, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* Small data area 15 bits offset. */
1447 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1448 2, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 17, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_signed, /* complain_on_overflow */
1454 bfd_elf_generic_reloc, /* special_function */
1455 "R_NDS32_SDA17S2_RELA",/* name */
1456 FALSE, /* partial_inplace */
1457 0x0001ffff, /* src_mask */
1458 0x0001ffff, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1462 1, /* rightshift */
1463 2, /* size (0 = byte, 1 = short, 2 = long) */
1464 18, /* bitsize */
1465 FALSE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_NDS32_SDA18S1_RELA",/* name */
1470 FALSE, /* partial_inplace */
1471 0x0003ffff, /* src_mask */
1472 0x0003ffff, /* dst_mask */
1473 FALSE), /* pcrel_offset */
1474
1475 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1476 0, /* rightshift */
1477 2, /* size (0 = byte, 1 = short, 2 = long) */
1478 19, /* bitsize */
1479 FALSE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_NDS32_SDA19S0_RELA",/* name */
1484 FALSE, /* partial_inplace */
1485 0x0007ffff, /* src_mask */
1486 0x0007ffff, /* dst_mask */
1487 FALSE), /* pcrel_offset */
1488 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1489 0, /* rightshift */
1490 0, /* size (0 = byte, 1 = short, 2 = long) */
1491 8, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont,/* complain_on_overflow */
1495 nds32_elf_ignore_reloc,/* special_function */
1496 "R_NDS32_DWARF2_OP1_RELA", /* name */
1497 FALSE, /* partial_inplace */
1498 0xff, /* src_mask */
1499 0xff, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1502 0, /* rightshift */
1503 1, /* size (0 = byte, 1 = short, 2 = long) */
1504 16, /* bitsize */
1505 FALSE, /* pc_relative */
1506 0, /* bitpos */
1507 complain_overflow_dont,/* complain_on_overflow */
1508 nds32_elf_ignore_reloc,/* special_function */
1509 "R_NDS32_DWARF2_OP2_RELA", /* name */
1510 FALSE, /* partial_inplace */
1511 0xffff, /* src_mask */
1512 0xffff, /* dst_mask */
1513 FALSE), /* pcrel_offset */
1514 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1515 0, /* rightshift */
1516 2, /* size (0 = byte, 1 = short, 2 = long) */
1517 32, /* bitsize */
1518 FALSE, /* pc_relative */
1519 0, /* bitpos */
1520 complain_overflow_dont,/* complain_on_overflow */
1521 nds32_elf_ignore_reloc,/* special_function */
1522 "R_NDS32_DWARF2_LEB_RELA", /* name */
1523 FALSE, /* partial_inplace */
1524 0xffffffff, /* src_mask */
1525 0xffffffff, /* dst_mask */
1526 FALSE), /* pcrel_offset */
1527 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1528 0, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 16, /* bitsize */
1531 FALSE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_dont,/* complain_on_overflow */
1534 nds32_elf_ignore_reloc,/* special_function */
1535 "R_NDS32_UPDATE_TA_RELA", /* name */
1536 FALSE, /* partial_inplace */
1537 0xffff, /* src_mask */
1538 0xffff, /* dst_mask */
1539 FALSE), /* pcrel_offset */
1540 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1541 entry for the symbol. */
1542 HOWTO (R_NDS32_9_PLTREL, /* type */
1543 1, /* rightshift */
1544 1, /* size (0 = byte, 1 = short, 2 = long) */
1545 8, /* bitsize */
1546 TRUE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_signed, /* complain_on_overflow */
1549 bfd_elf_generic_reloc, /* special_function */
1550 "R_NDS32_9_PLTREL", /* name */
1551 FALSE, /* partial_inplace */
1552 0xff, /* src_mask */
1553 0xff, /* dst_mask */
1554 TRUE), /* pcrel_offset */
1555 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1556 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 20, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_dont,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_NDS32_PLT_GOTREL_LO20", /* name */
1565 FALSE, /* partial_inplace */
1566 0x000fffff, /* src_mask */
1567 0x000fffff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1570 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 15, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_dont,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_NDS32_PLT_GOTREL_LO15", /* name */
1579 FALSE, /* partial_inplace */
1580 0x00007fff, /* src_mask */
1581 0x00007fff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1584 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 19, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_dont,/* complain_on_overflow */
1591 bfd_elf_generic_reloc, /* special_function */
1592 "R_NDS32_PLT_GOTREL_LO19", /* name */
1593 FALSE, /* partial_inplace */
1594 0x0007ffff, /* src_mask */
1595 0x0007ffff, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597 HOWTO (R_NDS32_GOT_LO15, /* type */
1598 0, /* rightshift */
1599 2, /* size (0 = byte, 1 = short, 2 = long) */
1600 15, /* bitsize */
1601 FALSE, /* pc_relative */
1602 0, /* bitpos */
1603 complain_overflow_dont,/* complain_on_overflow */
1604 bfd_elf_generic_reloc, /* special_function */
1605 "R_NDS32_GOT_LO15", /* name */
1606 FALSE, /* partial_inplace */
1607 0x00007fff, /* src_mask */
1608 0x00007fff, /* dst_mask */
1609 FALSE), /* pcrel_offset */
1610 HOWTO (R_NDS32_GOT_LO19, /* type */
1611 0, /* rightshift */
1612 2, /* size (0 = byte, 1 = short, 2 = long) */
1613 19, /* bitsize */
1614 FALSE, /* pc_relative */
1615 0, /* bitpos */
1616 complain_overflow_dont,/* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 "R_NDS32_GOT_LO19", /* name */
1619 FALSE, /* partial_inplace */
1620 0x0007ffff, /* src_mask */
1621 0x0007ffff, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1624 0, /* rightshift */
1625 2, /* size (0 = byte, 1 = short, 2 = long) */
1626 15, /* bitsize */
1627 FALSE, /* pc_relative */
1628 0, /* bitpos */
1629 complain_overflow_dont,/* complain_on_overflow */
1630 bfd_elf_generic_reloc, /* special_function */
1631 "R_NDS32_GOTOFF_LO15", /* name */
1632 FALSE, /* partial_inplace */
1633 0x00007fff, /* src_mask */
1634 0x00007fff, /* dst_mask */
1635 FALSE), /* pcrel_offset */
1636 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1637 0, /* rightshift */
1638 2, /* size (0 = byte, 1 = short, 2 = long) */
1639 19, /* bitsize */
1640 FALSE, /* pc_relative */
1641 0, /* bitpos */
1642 complain_overflow_dont,/* complain_on_overflow */
1643 bfd_elf_generic_reloc, /* special_function */
1644 "R_NDS32_GOTOFF_LO19", /* name */
1645 FALSE, /* partial_inplace */
1646 0x0007ffff, /* src_mask */
1647 0x0007ffff, /* dst_mask */
1648 FALSE), /* pcrel_offset */
1649 /* GOT 15 bits offset. */
1650 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1651 2, /* rightshift */
1652 2, /* size (0 = byte, 1 = short, 2 = long) */
1653 15, /* bitsize */
1654 FALSE, /* pc_relative */
1655 0, /* bitpos */
1656 complain_overflow_signed, /* complain_on_overflow */
1657 bfd_elf_generic_reloc, /* special_function */
1658 "R_NDS32_GOT15S2_RELA",/* name */
1659 FALSE, /* partial_inplace */
1660 0x00007fff, /* src_mask */
1661 0x00007fff, /* dst_mask */
1662 FALSE), /* pcrel_offset */
1663 /* GOT 17 bits offset. */
1664 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1665 2, /* rightshift */
1666 2, /* size (0 = byte, 1 = short, 2 = long) */
1667 17, /* bitsize */
1668 FALSE, /* pc_relative */
1669 0, /* bitpos */
1670 complain_overflow_signed, /* complain_on_overflow */
1671 bfd_elf_generic_reloc, /* special_function */
1672 "R_NDS32_GOT17S2_RELA",/* name */
1673 FALSE, /* partial_inplace */
1674 0x0001ffff, /* src_mask */
1675 0x0001ffff, /* dst_mask */
1676 FALSE), /* pcrel_offset */
1677 /* A 5 bit address. */
1678 HOWTO (R_NDS32_5_RELA, /* type */
1679 0, /* rightshift */
1680 1, /* size (0 = byte, 1 = short, 2 = long) */
1681 5, /* bitsize */
1682 FALSE, /* pc_relative */
1683 0, /* bitpos */
1684 complain_overflow_signed, /* complain_on_overflow */
1685 bfd_elf_generic_reloc, /* special_function */
1686 "R_NDS32_5_RELA", /* name */
1687 FALSE, /* partial_inplace */
1688 0x1f, /* src_mask */
1689 0x1f, /* dst_mask */
1690 FALSE), /* pcrel_offset */
1691 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1692 1, /* rightshift */
1693 1, /* size (0 = byte, 1 = short, 2 = long) */
1694 9, /* bitsize */
1695 TRUE, /* pc_relative */
1696 0, /* bitpos */
1697 complain_overflow_unsigned, /* complain_on_overflow */
1698 bfd_elf_generic_reloc, /* special_function */
1699 "R_NDS32_10_UPCREL_RELA", /* name */
1700 FALSE, /* partial_inplace */
1701 0x1ff, /* src_mask */
1702 0x1ff, /* dst_mask */
1703 TRUE), /* pcrel_offset */
1704 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1705 2, /* rightshift */
1706 1, /* size (0 = byte, 1 = short, 2 = long) */
1707 7, /* bitsize */
1708 FALSE, /* pc_relative */
1709 0, /* bitpos */
1710 complain_overflow_unsigned, /* complain_on_overflow */
1711 bfd_elf_generic_reloc, /* special_function */
1712 "R_NDS32_SDA_FP7U2_RELA", /* name */
1713 FALSE, /* partial_inplace */
1714 0x0000007f, /* src_mask */
1715 0x0000007f, /* dst_mask */
1716 FALSE), /* pcrel_offset */
1717 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1718 1, /* rightshift */
1719 2, /* size (0 = byte, 1 = short, 2 = long) */
1720 8, /* bitsize */
1721 TRUE, /* pc_relative */
1722 0, /* bitpos */
1723 complain_overflow_signed, /* complain_on_overflow */
1724 bfd_elf_generic_reloc, /* special_function */
1725 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1726 FALSE, /* partial_inplace */
1727 0xff, /* src_mask */
1728 0xff, /* dst_mask */
1729 TRUE), /* pcrel_offset */
1730 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1731 1, /* rightshift */
1732 2, /* size (0 = byte, 1 = short, 2 = long) */
1733 24, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_dont,/* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 "R_NDS32_25_ABS_RELA", /* name */
1739 FALSE, /* partial_inplace */
1740 0xffffff, /* src_mask */
1741 0xffffff, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1745 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1746 1, /* rightshift */
1747 2, /* size (0 = byte, 1 = short, 2 = long) */
1748 16, /* bitsize */
1749 TRUE, /* pc_relative */
1750 0, /* bitpos */
1751 complain_overflow_signed, /* complain_on_overflow */
1752 bfd_elf_generic_reloc, /* special_function */
1753 "R_NDS32_17IFC_PCREL_RELA", /* name */
1754 FALSE, /* partial_inplace */
1755 0xffff, /* src_mask */
1756 0xffff, /* dst_mask */
1757 TRUE), /* pcrel_offset */
1758
1759 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1760 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1761 1, /* rightshift */
1762 1, /* size (0 = byte, 1 = short, 2 = long) */
1763 9, /* bitsize */
1764 TRUE, /* pc_relative */
1765 0, /* bitpos */
1766 complain_overflow_unsigned, /* complain_on_overflow */
1767 bfd_elf_generic_reloc, /* special_function */
1768 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1769 FALSE, /* partial_inplace */
1770 0x1ff, /* src_mask */
1771 0x1ff, /* dst_mask */
1772 TRUE), /* pcrel_offset */
1773
1774 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1775 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1776 12, /* rightshift */
1777 2, /* size (0 = byte, 1 = short, 2 = long) */
1778 20, /* bitsize */
1779 FALSE, /* pc_relative */
1780 0, /* bitpos */
1781 complain_overflow_dont, /* complain_on_overflow */
1782 bfd_elf_generic_reloc, /* special_function */
1783 "R_NDS32_TLS_LE_HI20", /* name */
1784 FALSE, /* partial_inplace */
1785 0x000fffff, /* src_mask */
1786 0x000fffff, /* dst_mask */
1787 FALSE), /* pcrel_offset */
1788 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1789 0, /* rightshift */
1790 2, /* size (0 = byte, 1 = short, 2 = long) */
1791 12, /* bitsize */
1792 FALSE, /* pc_relative */
1793 0, /* bitpos */
1794 complain_overflow_dont, /* complain_on_overflow */
1795 bfd_elf_generic_reloc, /* special_function */
1796 "R_NDS32_TLS_LE_LO12", /* name */
1797 FALSE, /* partial_inplace */
1798 0x00000fff, /* src_mask */
1799 0x00000fff, /* dst_mask */
1800 FALSE), /* pcrel_offset */
1801
1802 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1803 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1804 12, /* rightshift */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1806 20, /* bitsize */
1807 FALSE, /* pc_relative */
1808 0, /* bitpos */
1809 complain_overflow_dont, /* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_NDS32_TLS_IE_HI20", /* name */
1812 FALSE, /* partial_inplace */
1813 0x000fffff, /* src_mask */
1814 0x000fffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1817 2, /* rightshift */
1818 2, /* size (0 = byte, 1 = short, 2 = long) */
1819 10, /* bitsize */
1820 FALSE, /* pc_relative */
1821 0, /* bitpos */
1822 complain_overflow_dont, /* complain_on_overflow */
1823 bfd_elf_generic_reloc, /* special_function */
1824 "R_NDS32_TLS_IE_LO12S2", /* name */
1825 FALSE, /* partial_inplace */
1826 0x000003ff, /* src_mask */
1827 0x000003ff, /* dst_mask */
1828 FALSE), /* pcrel_offset */
1829 /* Mark a TLS IE entry in GOT. */
1830 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1831 0, /* rightshift */
1832 2, /* size (0 = byte, 1 = short, 2 = long) */
1833 32, /* bitsize */
1834 FALSE, /* pc_relative */
1835 0, /* bitpos */
1836 complain_overflow_bitfield, /* complain_on_overflow */
1837 bfd_elf_generic_reloc, /* special_function */
1838 "R_NDS32_TLS_TPOFF", /* name */
1839 FALSE, /* partial_inplace */
1840 0xffffffff, /* src_mask */
1841 0xffffffff, /* dst_mask */
1842 FALSE), /* pcrel_offset */
1843 /* A 20 bit address. */
1844 HOWTO (R_NDS32_TLS_LE_20, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 20, /* bitsize */
1848 FALSE, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_signed, /* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_NDS32_TLS_LE_20", /* name */
1853 FALSE, /* partial_inplace */
1854 0xfffff, /* src_mask */
1855 0xfffff, /* dst_mask */
1856 FALSE), /* pcrel_offset */
1857 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 15, /* bitsize */
1861 FALSE, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_signed, /* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_NDS32_TLS_LE_15S0", /* name */
1866 FALSE, /* partial_inplace */
1867 0x7fff, /* src_mask */
1868 0x7fff, /* dst_mask */
1869 FALSE), /* pcrel_offset */
1870 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1871 1, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 15, /* bitsize */
1874 FALSE, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_signed, /* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_NDS32_TLS_LE_15S1", /* name */
1879 FALSE, /* partial_inplace */
1880 0x7fff, /* src_mask */
1881 0x7fff, /* dst_mask */
1882 FALSE), /* pcrel_offset */
1883 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1884 2, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 15, /* bitsize */
1887 FALSE, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_signed, /* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_NDS32_TLS_LE_15S2", /* name */
1892 FALSE, /* partial_inplace */
1893 0x7fff, /* src_mask */
1894 0x7fff, /* dst_mask */
1895 FALSE), /* pcrel_offset */
1896
1897 /* Relax hint for unconditional call sequence */
1898 HOWTO (R_NDS32_LONGCALL4, /* type */
1899 0, /* rightshift */
1900 2, /* size (0 = byte, 1 = short, 2 = long) */
1901 32, /* bitsize */
1902 FALSE, /* pc_relative */
1903 0, /* bitpos */
1904 complain_overflow_dont, /* complain_on_overflow */
1905 nds32_elf_ignore_reloc, /* special_function */
1906 "R_NDS32_LONGCALL4", /* name */
1907 FALSE, /* partial_inplace */
1908 0xffffffff, /* src_mask */
1909 0xffffffff, /* dst_mask */
1910 FALSE), /* pcrel_offset */
1911
1912 /* Relax hint for conditional call sequence. */
1913 HOWTO (R_NDS32_LONGCALL5, /* type */
1914 0, /* rightshift */
1915 2, /* size (0 = byte, 1 = short, 2 = long) */
1916 32, /* bitsize */
1917 FALSE, /* pc_relative */
1918 0, /* bitpos */
1919 complain_overflow_dont, /* complain_on_overflow */
1920 nds32_elf_ignore_reloc, /* special_function */
1921 "R_NDS32_LONGCALL5", /* name */
1922 FALSE, /* partial_inplace */
1923 0xffffffff, /* src_mask */
1924 0xffffffff, /* dst_mask */
1925 FALSE), /* pcrel_offset */
1926
1927 /* Relax hint for conditional call sequence. */
1928 HOWTO (R_NDS32_LONGCALL6, /* type */
1929 0, /* rightshift */
1930 2, /* size (0 = byte, 1 = short, 2 = long) */
1931 32, /* bitsize */
1932 FALSE, /* pc_relative */
1933 0, /* bitpos */
1934 complain_overflow_dont, /* complain_on_overflow */
1935 nds32_elf_ignore_reloc, /* special_function */
1936 "R_NDS32_LONGCALL6", /* name */
1937 FALSE, /* partial_inplace */
1938 0xffffffff, /* src_mask */
1939 0xffffffff, /* dst_mask */
1940 FALSE), /* pcrel_offset */
1941
1942 /* Relax hint for unconditional branch sequence. */
1943 HOWTO (R_NDS32_LONGJUMP4, /* type */
1944 0, /* rightshift */
1945 2, /* size (0 = byte, 1 = short, 2 = long) */
1946 32, /* bitsize */
1947 FALSE, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont, /* complain_on_overflow */
1950 nds32_elf_ignore_reloc, /* special_function */
1951 "R_NDS32_LONGJUMP4", /* name */
1952 FALSE, /* partial_inplace */
1953 0xffffffff, /* src_mask */
1954 0xffffffff, /* dst_mask */
1955 FALSE), /* pcrel_offset */
1956
1957 /* Relax hint for conditional branch sequence. */
1958 HOWTO (R_NDS32_LONGJUMP5, /* type */
1959 0, /* rightshift */
1960 2, /* size (0 = byte, 1 = short, 2 = long) */
1961 32, /* bitsize */
1962 FALSE, /* pc_relative */
1963 0, /* bitpos */
1964 complain_overflow_dont, /* complain_on_overflow */
1965 nds32_elf_ignore_reloc, /* special_function */
1966 "R_NDS32_LONGJUMP5", /* name */
1967 FALSE, /* partial_inplace */
1968 0xffffffff, /* src_mask */
1969 0xffffffff, /* dst_mask */
1970 FALSE), /* pcrel_offset */
1971
1972 /* Relax hint for conditional branch sequence. */
1973 HOWTO (R_NDS32_LONGJUMP6, /* type */
1974 0, /* rightshift */
1975 2, /* size (0 = byte, 1 = short, 2 = long) */
1976 32, /* bitsize */
1977 FALSE, /* pc_relative */
1978 0, /* bitpos */
1979 complain_overflow_dont, /* complain_on_overflow */
1980 nds32_elf_ignore_reloc, /* special_function */
1981 "R_NDS32_LONGJUMP6", /* name */
1982 FALSE, /* partial_inplace */
1983 0xffffffff, /* src_mask */
1984 0xffffffff, /* dst_mask */
1985 FALSE), /* pcrel_offset */
1986
1987 /* Relax hint for conditional branch sequence. */
1988 HOWTO (R_NDS32_LONGJUMP7, /* type */
1989 0, /* rightshift */
1990 2, /* size (0 = byte, 1 = short, 2 = long) */
1991 32, /* bitsize */
1992 FALSE, /* pc_relative */
1993 0, /* bitpos */
1994 complain_overflow_dont, /* complain_on_overflow */
1995 nds32_elf_ignore_reloc, /* special_function */
1996 "R_NDS32_LONGJUMP7", /* name */
1997 FALSE, /* partial_inplace */
1998 0xffffffff, /* src_mask */
1999 0xffffffff, /* dst_mask */
2000 FALSE), /* pcrel_offset */
2001 };
2002
2003 /* Relocations used for relaxation. */
2004 static reloc_howto_type nds32_elf_relax_howto_table[] =
2005 {
2006 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2007 0, /* rightshift */
2008 2, /* size (0 = byte, 1 = short, 2 = long) */
2009 32, /* bitsize */
2010 FALSE, /* pc_relative */
2011 0, /* bitpos */
2012 complain_overflow_dont,/* complain_on_overflow */
2013 nds32_elf_ignore_reloc,/* special_function */
2014 "R_NDS32_RELAX_ENTRY", /* name */
2015 FALSE, /* partial_inplace */
2016 0xffffffff, /* src_mask */
2017 0xffffffff, /* dst_mask */
2018 FALSE), /* pcrel_offset */
2019 HOWTO (R_NDS32_GOT_SUFF, /* type */
2020 0, /* rightshift */
2021 2, /* size (0 = byte, 1 = short, 2 = long) */
2022 32, /* bitsize */
2023 FALSE, /* pc_relative */
2024 0, /* bitpos */
2025 complain_overflow_dont,/* complain_on_overflow */
2026 nds32_elf_ignore_reloc,/* special_function */
2027 "R_NDS32_GOT_SUFF", /* name */
2028 FALSE, /* partial_inplace */
2029 0xffffffff, /* src_mask */
2030 0xffffffff, /* dst_mask */
2031 FALSE), /* pcrel_offset */
2032 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2033 0, /* rightshift */
2034 2, /* size (0 = byte, 1 = short, 2 = long) */
2035 32, /* bitsize */
2036 FALSE, /* pc_relative */
2037 0, /* bitpos */
2038 complain_overflow_bitfield, /* complain_on_overflow */
2039 nds32_elf_ignore_reloc,/* special_function */
2040 "R_NDS32_GOTOFF_SUFF", /* name */
2041 FALSE, /* partial_inplace */
2042 0xffffffff, /* src_mask */
2043 0xffffffff, /* dst_mask */
2044 FALSE), /* pcrel_offset */
2045 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2046 0, /* rightshift */
2047 2, /* size (0 = byte, 1 = short, 2 = long) */
2048 32, /* bitsize */
2049 FALSE, /* pc_relative */
2050 0, /* bitpos */
2051 complain_overflow_dont,/* complain_on_overflow */
2052 nds32_elf_ignore_reloc,/* special_function */
2053 "R_NDS32_PLT_GOT_SUFF",/* name */
2054 FALSE, /* partial_inplace */
2055 0xffffffff, /* src_mask */
2056 0xffffffff, /* dst_mask */
2057 FALSE), /* pcrel_offset */
2058 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2059 0, /* rightshift */
2060 2, /* size (0 = byte, 1 = short, 2 = long) */
2061 32, /* bitsize */
2062 FALSE, /* pc_relative */
2063 0, /* bitpos */
2064 complain_overflow_dont,/* complain_on_overflow */
2065 nds32_elf_ignore_reloc,/* special_function */
2066 "R_NDS32_MULCALL_SUFF",/* name */
2067 FALSE, /* partial_inplace */
2068 0xffffffff, /* src_mask */
2069 0xffffffff, /* dst_mask */
2070 FALSE), /* pcrel_offset */
2071 HOWTO (R_NDS32_PTR, /* type */
2072 0, /* rightshift */
2073 2, /* size (0 = byte, 1 = short, 2 = long) */
2074 32, /* bitsize */
2075 FALSE, /* pc_relative */
2076 0, /* bitpos */
2077 complain_overflow_dont,/* complain_on_overflow */
2078 nds32_elf_ignore_reloc,/* special_function */
2079 "R_NDS32_PTR", /* name */
2080 FALSE, /* partial_inplace */
2081 0xffffffff, /* src_mask */
2082 0xffffffff, /* dst_mask */
2083 FALSE), /* pcrel_offset */
2084 HOWTO (R_NDS32_PTR_COUNT, /* type */
2085 0, /* rightshift */
2086 2, /* size (0 = byte, 1 = short, 2 = long) */
2087 32, /* bitsize */
2088 FALSE, /* pc_relative */
2089 0, /* bitpos */
2090 complain_overflow_dont,/* complain_on_overflow */
2091 nds32_elf_ignore_reloc,/* special_function */
2092 "R_NDS32_PTR_COUNT", /* name */
2093 FALSE, /* partial_inplace */
2094 0xffffffff, /* src_mask */
2095 0xffffffff, /* dst_mask */
2096 FALSE), /* pcrel_offset */
2097 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2098 0, /* rightshift */
2099 2, /* size (0 = byte, 1 = short, 2 = long) */
2100 32, /* bitsize */
2101 FALSE, /* pc_relative */
2102 0, /* bitpos */
2103 complain_overflow_dont,/* complain_on_overflow */
2104 nds32_elf_ignore_reloc,/* special_function */
2105 "R_NDS32_PTR_RESOLVED",/* name */
2106 FALSE, /* partial_inplace */
2107 0xffffffff, /* src_mask */
2108 0xffffffff, /* dst_mask */
2109 FALSE), /* pcrel_offset */
2110 HOWTO (R_NDS32_PLTBLOCK, /* type */
2111 0, /* rightshift */
2112 2, /* size (0 = byte, 1 = short, 2 = long) */
2113 32, /* bitsize */
2114 FALSE, /* pc_relative */
2115 0, /* bitpos */
2116 complain_overflow_dont,/* complain_on_overflow */
2117 nds32_elf_ignore_reloc,/* special_function */
2118 "R_NDS32_PLTBLOCK", /* name */
2119 FALSE, /* partial_inplace */
2120 0xffffffff, /* src_mask */
2121 0xffffffff, /* dst_mask */
2122 FALSE), /* pcrel_offset */
2123 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2124 0, /* rightshift */
2125 2, /* size (0 = byte, 1 = short, 2 = long) */
2126 32, /* bitsize */
2127 FALSE, /* pc_relative */
2128 0, /* bitpos */
2129 complain_overflow_dont,/* complain_on_overflow */
2130 nds32_elf_ignore_reloc,/* special_function */
2131 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2132 FALSE, /* partial_inplace */
2133 0xffffffff, /* src_mask */
2134 0xffffffff, /* dst_mask */
2135 FALSE), /* pcrel_offset */
2136 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2137 0, /* rightshift */
2138 2, /* size (0 = byte, 1 = short, 2 = long) */
2139 32, /* bitsize */
2140 FALSE, /* pc_relative */
2141 0, /* bitpos */
2142 complain_overflow_dont,/* complain_on_overflow */
2143 nds32_elf_ignore_reloc,/* special_function */
2144 "R_NDS32_RELAX_REGION_END", /* name */
2145 FALSE, /* partial_inplace */
2146 0xffffffff, /* src_mask */
2147 0xffffffff, /* dst_mask */
2148 FALSE), /* pcrel_offset */
2149 HOWTO (R_NDS32_MINUEND, /* type */
2150 0, /* rightshift */
2151 2, /* size (0 = byte, 1 = short, 2 = long) */
2152 32, /* bitsize */
2153 FALSE, /* pc_relative */
2154 0, /* bitpos */
2155 complain_overflow_dont,/* complain_on_overflow */
2156 nds32_elf_ignore_reloc,/* special_function */
2157 "R_NDS32_MINUEND", /* name */
2158 FALSE, /* partial_inplace */
2159 0xffffffff, /* src_mask */
2160 0xffffffff, /* dst_mask */
2161 FALSE), /* pcrel_offset */
2162 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2163 0, /* rightshift */
2164 2, /* size (0 = byte, 1 = short, 2 = long) */
2165 32, /* bitsize */
2166 FALSE, /* pc_relative */
2167 0, /* bitpos */
2168 complain_overflow_dont,/* complain_on_overflow */
2169 nds32_elf_ignore_reloc,/* special_function */
2170 "R_NDS32_SUBTRAHEND", /* name */
2171 FALSE, /* partial_inplace */
2172 0xffffffff, /* src_mask */
2173 0xffffffff, /* dst_mask */
2174 FALSE), /* pcrel_offset */
2175 HOWTO (R_NDS32_DIFF8, /* type */
2176 0, /* rightshift */
2177 0, /* size (0 = byte, 1 = short, 2 = long) */
2178 8, /* bitsize */
2179 FALSE, /* pc_relative */
2180 0, /* bitpos */
2181 complain_overflow_dont,/* complain_on_overflow */
2182 nds32_elf_ignore_reloc,/* special_function */
2183 "R_NDS32_DIFF8", /* name */
2184 FALSE, /* partial_inplace */
2185 0x000000ff, /* src_mask */
2186 0x000000ff, /* dst_mask */
2187 FALSE), /* pcrel_offset */
2188 HOWTO (R_NDS32_DIFF16, /* type */
2189 0, /* rightshift */
2190 1, /* size (0 = byte, 1 = short, 2 = long) */
2191 16, /* bitsize */
2192 FALSE, /* pc_relative */
2193 0, /* bitpos */
2194 complain_overflow_dont,/* complain_on_overflow */
2195 nds32_elf_ignore_reloc,/* special_function */
2196 "R_NDS32_DIFF16", /* name */
2197 FALSE, /* partial_inplace */
2198 0x0000ffff, /* src_mask */
2199 0x0000ffff, /* dst_mask */
2200 FALSE), /* pcrel_offset */
2201 HOWTO (R_NDS32_DIFF32, /* type */
2202 0, /* rightshift */
2203 2, /* size (0 = byte, 1 = short, 2 = long) */
2204 32, /* bitsize */
2205 FALSE, /* pc_relative */
2206 0, /* bitpos */
2207 complain_overflow_dont,/* complain_on_overflow */
2208 nds32_elf_ignore_reloc,/* special_function */
2209 "R_NDS32_DIFF32", /* name */
2210 FALSE, /* partial_inplace */
2211 0xffffffff, /* src_mask */
2212 0xffffffff, /* dst_mask */
2213 FALSE), /* pcrel_offset */
2214 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2215 0, /* rightshift */
2216 0, /* size (0 = byte, 1 = short, 2 = long) */
2217 0, /* bitsize */
2218 FALSE, /* pc_relative */
2219 0, /* bitpos */
2220 complain_overflow_dont,/* complain_on_overflow */
2221 nds32_elf_ignore_reloc,/* special_function */
2222 "R_NDS32_DIFF_ULEB128",/* name */
2223 FALSE, /* partial_inplace */
2224 0xffffffff, /* src_mask */
2225 0xffffffff, /* dst_mask */
2226 FALSE), /* pcrel_offset */
2227 HOWTO (R_NDS32_DATA, /* type */
2228 0, /* rightshift */
2229 2, /* size (0 = byte, 1 = short, 2 = long) */
2230 32, /* bitsize */
2231 FALSE, /* pc_relative */
2232 0, /* bitpos */
2233 complain_overflow_dont,/* complain_on_overflow */
2234 nds32_elf_ignore_reloc,/* special_function */
2235 "R_NDS32_DATA", /* name */
2236 FALSE, /* partial_inplace */
2237 0xffffffff, /* src_mask */
2238 0xffffffff, /* dst_mask */
2239 FALSE), /* pcrel_offset */
2240 HOWTO (R_NDS32_TRAN, /* type */
2241 0, /* rightshift */
2242 2, /* size (0 = byte, 1 = short, 2 = long) */
2243 32, /* bitsize */
2244 FALSE, /* pc_relative */
2245 0, /* bitpos */
2246 complain_overflow_dont,/* complain_on_overflow */
2247 nds32_elf_ignore_reloc,/* special_function */
2248 "R_NDS32_TRAN", /* name */
2249 FALSE, /* partial_inplace */
2250 0xffffffff, /* src_mask */
2251 0xffffffff, /* dst_mask */
2252 FALSE), /* pcrel_offset */
2253 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2254 0, /* rightshift */
2255 2, /* size (0 = byte, 1 = short, 2 = long) */
2256 32, /* bitsize */
2257 FALSE, /* pc_relative */
2258 0, /* bitpos */
2259 complain_overflow_dont, /* complain_on_overflow */
2260 nds32_elf_ignore_reloc, /* special_function */
2261 "R_NDS32_TLS_LE_ADD", /* name */
2262 FALSE, /* partial_inplace */
2263 0xffffffff, /* src_mask */
2264 0xffffffff, /* dst_mask */
2265 FALSE), /* pcrel_offset */
2266 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2267 0, /* rightshift */
2268 2, /* size (0 = byte, 1 = short, 2 = long) */
2269 32, /* bitsize */
2270 FALSE, /* pc_relative */
2271 0, /* bitpos */
2272 complain_overflow_dont, /* complain_on_overflow */
2273 nds32_elf_ignore_reloc, /* special_function */
2274 "R_NDS32_TLS_LE_LS", /* name */
2275 FALSE, /* partial_inplace */
2276 0xffffffff, /* src_mask */
2277 0xffffffff, /* dst_mask */
2278 FALSE), /* pcrel_offset */
2279 HOWTO (R_NDS32_EMPTY, /* type */
2280 0, /* rightshift */
2281 2, /* size (0 = byte, 1 = short, 2 = long) */
2282 32, /* bitsize */
2283 FALSE, /* pc_relative */
2284 0, /* bitpos */
2285 complain_overflow_dont, /* complain_on_overflow */
2286 nds32_elf_ignore_reloc, /* special_function */
2287 "R_NDS32_EMPTY", /* name */
2288 FALSE, /* partial_inplace */
2289 0xffffffff, /* src_mask */
2290 0xffffffff, /* dst_mask */
2291 FALSE), /* pcrel_offset */
2292 };
2293
2294 \f
2295 /* nds32_insertion_sort sorts an array with nmemb elements of size size.
2296 This prototype is the same as qsort (). */
2297
2298 void
2299 nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2300 int (*compar) (const void *lhs, const void *rhs))
2301 {
2302 char *ptr = (char *) base;
2303 int i, j;
2304 char *tmp = xmalloc (size);
2305
2306 /* If i is less than j, i is inserted before j.
2307
2308 |---- j ----- i --------------|
2309 \ / \ /
2310 sorted unsorted
2311 */
2312
2313 for (i = 1; i < (int) nmemb; i++)
2314 {
2315 for (j = (i - 1); j >= 0; j--)
2316 if (compar (ptr + i * size, ptr + j * size) >= 0)
2317 break;
2318
2319 j++;
2320
2321 if (i == j)
2322 continue; /* i is in order. */
2323
2324 memcpy (tmp, ptr + i * size, size);
2325 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2326 memcpy (ptr + j * size, tmp, size);
2327 }
2328 free (tmp);
2329 }
2330
2331 /* Sort relocation by r_offset.
2332
2333 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2334 algorithm. Relocations at the same r_offset must keep their order.
2335 For example, RELAX_ENTRY must be the very first relocation entry.
2336
2337 Currently, this function implements insertion-sort.
2338
2339 FIXME: If we already sort them in assembler, why bother sort them
2340 here again? */
2341
2342 static int
2343 compar_reloc (const void *lhs, const void *rhs)
2344 {
2345 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2346 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2347
2348 if (l->r_offset > r->r_offset)
2349 return 1;
2350 else if (l->r_offset == r->r_offset)
2351 return 0;
2352 else
2353 return -1;
2354 }
2355
2356 /* Functions listed below are only used for old relocs.
2357 * nds32_elf_9_pcrel_reloc
2358 * nds32_elf_do_9_pcrel_reloc
2359 * nds32_elf_hi20_reloc
2360 * nds32_elf_relocate_hi20
2361 * nds32_elf_lo12_reloc
2362 * nds32_elf_sda15_reloc
2363 * nds32_elf_generic_reloc
2364 */
2365
2366 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2367
2368 static bfd_reloc_status_type
2369 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2370 void *data, asection *input_section, bfd *output_bfd,
2371 char **error_message ATTRIBUTE_UNUSED)
2372 {
2373 /* This part is from bfd_elf_generic_reloc. */
2374 if (output_bfd != (bfd *) NULL
2375 && (symbol->flags & BSF_SECTION_SYM) == 0
2376 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2377 {
2378 reloc_entry->address += input_section->output_offset;
2379 return bfd_reloc_ok;
2380 }
2381
2382 if (output_bfd != NULL)
2383 {
2384 /* FIXME: See bfd_perform_relocation. Is this right? */
2385 return bfd_reloc_continue;
2386 }
2387
2388 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2389 input_section,
2390 data, reloc_entry->address,
2391 symbol->section,
2392 (symbol->value
2393 + symbol->section->output_section->vma
2394 + symbol->section->output_offset),
2395 reloc_entry->addend);
2396 }
2397
2398 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2399 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2400
2401 static bfd_reloc_status_type
2402 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2403 asection *input_section, bfd_byte *data,
2404 bfd_vma offset,
2405 asection *symbol_section ATTRIBUTE_UNUSED,
2406 bfd_vma symbol_value, bfd_vma addend)
2407 {
2408 bfd_signed_vma relocation;
2409 unsigned short x;
2410 bfd_reloc_status_type status;
2411
2412 /* Sanity check the address (offset in section). */
2413 if (offset > bfd_get_section_limit (abfd, input_section))
2414 return bfd_reloc_outofrange;
2415
2416 relocation = symbol_value + addend;
2417 /* Make it pc relative. */
2418 relocation -= (input_section->output_section->vma
2419 + input_section->output_offset);
2420 /* These jumps mask off the lower two bits of the current address
2421 before doing pcrel calculations. */
2422 relocation -= (offset & -(bfd_vma) 2);
2423
2424 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
2425 status = bfd_reloc_overflow;
2426 else
2427 status = bfd_reloc_ok;
2428
2429 x = bfd_getb16 (data + offset);
2430
2431 relocation >>= howto->rightshift;
2432 relocation <<= howto->bitpos;
2433 x = (x & ~howto->dst_mask)
2434 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2435
2436 bfd_putb16 ((bfd_vma) x, data + offset);
2437
2438 return status;
2439 }
2440
2441 /* Handle the R_NDS32_HI20_[SU]LO relocs.
2442 HI20_SLO is for the add3 and load/store with displacement instructions.
2443 HI20 is for the or3 instruction.
2444 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2445 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2446 we must add one to the high 16 bytes (which will get subtracted off when
2447 the low 16 bits are added).
2448 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2449 because there is a carry from the LO12 to the HI20. Here we just save
2450 the information we need; we do the actual relocation when we see the LO12.
2451 This code is copied from the elf32-mips.c. We also support an arbitrary
2452 number of HI20 relocs to be associated with a single LO12 reloc. The
2453 assembler sorts the relocs to ensure each HI20 immediately precedes its
2454 LO12. However if there are multiple copies, the assembler may not find
2455 the real LO12 so it picks the first one it finds. */
2456
2457 struct nds32_hi20
2458 {
2459 struct nds32_hi20 *next;
2460 bfd_byte *addr;
2461 bfd_vma addend;
2462 };
2463
2464 static struct nds32_hi20 *nds32_hi20_list;
2465
2466 static bfd_reloc_status_type
2467 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2468 asymbol *symbol, void *data, asection *input_section,
2469 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2470 {
2471 bfd_reloc_status_type ret;
2472 bfd_vma relocation;
2473 struct nds32_hi20 *n;
2474
2475 /* This part is from bfd_elf_generic_reloc.
2476 If we're relocating, and this an external symbol, we don't want
2477 to change anything. */
2478 if (output_bfd != (bfd *) NULL
2479 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2480 {
2481 reloc_entry->address += input_section->output_offset;
2482 return bfd_reloc_ok;
2483 }
2484
2485 /* Sanity check the address (offset in section). */
2486 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2487 return bfd_reloc_outofrange;
2488
2489 ret = bfd_reloc_ok;
2490 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2491 ret = bfd_reloc_undefined;
2492
2493 if (bfd_is_com_section (symbol->section))
2494 relocation = 0;
2495 else
2496 relocation = symbol->value;
2497
2498 relocation += symbol->section->output_section->vma;
2499 relocation += symbol->section->output_offset;
2500 relocation += reloc_entry->addend;
2501
2502 /* Save the information, and let LO12 do the actual relocation. */
2503 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2504 if (n == NULL)
2505 return bfd_reloc_outofrange;
2506
2507 n->addr = (bfd_byte *) data + reloc_entry->address;
2508 n->addend = relocation;
2509 n->next = nds32_hi20_list;
2510 nds32_hi20_list = n;
2511
2512 if (output_bfd != (bfd *) NULL)
2513 reloc_entry->address += input_section->output_offset;
2514
2515 return ret;
2516 }
2517
2518 /* Handle an NDS32 ELF HI20 reloc. */
2519
2520 static void
2521 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2522 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2523 Elf_Internal_Rela *rello, bfd_byte *contents,
2524 bfd_vma addend)
2525 {
2526 unsigned long insn;
2527 bfd_vma addlo;
2528
2529 insn = bfd_getb32 (contents + relhi->r_offset);
2530
2531 addlo = bfd_getb32 (contents + rello->r_offset);
2532 addlo &= 0xfff;
2533
2534 addend += ((insn & 0xfffff) << 20) + addlo;
2535
2536 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2537 bfd_putb32 (insn, contents + relhi->r_offset);
2538 }
2539
2540 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2541 inplace relocation; this function exists in order to do the
2542 R_NDS32_HI20_[SU]LO relocation described above. */
2543
2544 static bfd_reloc_status_type
2545 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2546 void *data, asection *input_section, bfd *output_bfd,
2547 char **error_message)
2548 {
2549 /* This part is from bfd_elf_generic_reloc.
2550 If we're relocating, and this an external symbol, we don't want
2551 to change anything. */
2552 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2553 && reloc_entry->addend == 0)
2554 {
2555 reloc_entry->address += input_section->output_offset;
2556 return bfd_reloc_ok;
2557 }
2558
2559 if (nds32_hi20_list != NULL)
2560 {
2561 struct nds32_hi20 *l;
2562
2563 l = nds32_hi20_list;
2564 while (l != NULL)
2565 {
2566 unsigned long insn;
2567 unsigned long val;
2568 unsigned long vallo;
2569 struct nds32_hi20 *next;
2570
2571 /* Do the HI20 relocation. Note that we actually don't need
2572 to know anything about the LO12 itself, except where to
2573 find the low 12 bits of the addend needed by the LO12. */
2574 insn = bfd_getb32 (l->addr);
2575 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2576 vallo &= 0xfff;
2577 switch (reloc_entry->howto->type)
2578 {
2579 case R_NDS32_LO12S3:
2580 vallo <<= 3;
2581 break;
2582
2583 case R_NDS32_LO12S2:
2584 vallo <<= 2;
2585 break;
2586
2587 case R_NDS32_LO12S1:
2588 vallo <<= 1;
2589 break;
2590
2591 case R_NDS32_LO12S0:
2592 vallo <<= 0;
2593 break;
2594 }
2595
2596 val = ((insn & 0xfffff) << 12) + vallo;
2597 val += l->addend;
2598
2599 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2600 bfd_putb32 ((bfd_vma) insn, l->addr);
2601
2602 next = l->next;
2603 free (l);
2604 l = next;
2605 }
2606
2607 nds32_hi20_list = NULL;
2608 }
2609
2610 /* Now do the LO12 reloc in the usual way.
2611 ??? It would be nice to call bfd_elf_generic_reloc here,
2612 but we have partial_inplace set. bfd_elf_generic_reloc will
2613 pass the handling back to bfd_install_relocation which will install
2614 a section relative addend which is wrong. */
2615 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2616 input_section, output_bfd, error_message);
2617 }
2618
2619 /* Do generic partial_inplace relocation.
2620 This is a local replacement for bfd_elf_generic_reloc. */
2621
2622 static bfd_reloc_status_type
2623 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2624 asymbol *symbol, void *data, asection *input_section,
2625 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2626 {
2627 bfd_reloc_status_type ret;
2628 bfd_vma relocation;
2629 bfd_byte *inplace_address;
2630
2631 /* This part is from bfd_elf_generic_reloc.
2632 If we're relocating, and this an external symbol, we don't want
2633 to change anything. */
2634 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2635 && reloc_entry->addend == 0)
2636 {
2637 reloc_entry->address += input_section->output_offset;
2638 return bfd_reloc_ok;
2639 }
2640
2641 /* Now do the reloc in the usual way.
2642 ??? It would be nice to call bfd_elf_generic_reloc here,
2643 but we have partial_inplace set. bfd_elf_generic_reloc will
2644 pass the handling back to bfd_install_relocation which will install
2645 a section relative addend which is wrong. */
2646
2647 /* Sanity check the address (offset in section). */
2648 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2649 return bfd_reloc_outofrange;
2650
2651 ret = bfd_reloc_ok;
2652 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2653 ret = bfd_reloc_undefined;
2654
2655 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2656 relocation = 0;
2657 else
2658 relocation = symbol->value;
2659
2660 /* Only do this for a final link. */
2661 if (output_bfd == (bfd *) NULL)
2662 {
2663 relocation += symbol->section->output_section->vma;
2664 relocation += symbol->section->output_offset;
2665 }
2666
2667 relocation += reloc_entry->addend;
2668 switch (reloc_entry->howto->type)
2669 {
2670 case R_NDS32_LO12S3:
2671 relocation >>= 3;
2672 break;
2673
2674 case R_NDS32_LO12S2:
2675 relocation >>= 2;
2676 break;
2677
2678 case R_NDS32_LO12S1:
2679 relocation >>= 1;
2680 break;
2681
2682 case R_NDS32_LO12S0:
2683 default:
2684 relocation >>= 0;
2685 break;
2686 }
2687
2688 inplace_address = (bfd_byte *) data + reloc_entry->address;
2689
2690 #define DOIT(x) \
2691 x = ((x & ~reloc_entry->howto->dst_mask) | \
2692 (((x & reloc_entry->howto->src_mask) + relocation) & \
2693 reloc_entry->howto->dst_mask))
2694
2695 switch (reloc_entry->howto->size)
2696 {
2697 case 1:
2698 {
2699 short x = bfd_getb16 (inplace_address);
2700
2701 DOIT (x);
2702 bfd_putb16 ((bfd_vma) x, inplace_address);
2703 }
2704 break;
2705 case 2:
2706 {
2707 unsigned long x = bfd_getb32 (inplace_address);
2708
2709 DOIT (x);
2710 bfd_putb32 ((bfd_vma) x, inplace_address);
2711 }
2712 break;
2713 default:
2714 BFD_ASSERT (0);
2715 }
2716
2717 if (output_bfd != (bfd *) NULL)
2718 reloc_entry->address += input_section->output_offset;
2719
2720 return ret;
2721 }
2722
2723 /* Handle the R_NDS32_SDA15 reloc.
2724 This reloc is used to compute the address of objects in the small data area
2725 and to perform loads and stores from that area.
2726 The lower 15 bits are sign extended and added to the register specified
2727 in the instruction, which is assumed to point to _SDA_BASE_.
2728
2729 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2730 the access size, this must be taken care of. */
2731
2732 static bfd_reloc_status_type
2733 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2734 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2735 asection *input_section, bfd *output_bfd,
2736 char **error_message ATTRIBUTE_UNUSED)
2737 {
2738 /* This part is from bfd_elf_generic_reloc. */
2739 if (output_bfd != (bfd *) NULL
2740 && (symbol->flags & BSF_SECTION_SYM) == 0
2741 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2742 {
2743 reloc_entry->address += input_section->output_offset;
2744 return bfd_reloc_ok;
2745 }
2746
2747 if (output_bfd != NULL)
2748 {
2749 /* FIXME: See bfd_perform_relocation. Is this right? */
2750 return bfd_reloc_continue;
2751 }
2752
2753 /* FIXME: not sure what to do here yet. But then again, the linker
2754 may never call us. */
2755 abort ();
2756 }
2757
2758 /* nds32_elf_ignore_reloc is the special function for
2759 relocation types which don't need to be relocated
2760 like relaxation relocation types.
2761 This function simply return bfd_reloc_ok when it is
2762 invoked. */
2763
2764 static bfd_reloc_status_type
2765 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2766 asymbol *symbol ATTRIBUTE_UNUSED,
2767 void *data ATTRIBUTE_UNUSED, asection *input_section,
2768 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2769 {
2770 if (output_bfd != NULL)
2771 reloc_entry->address += input_section->output_offset;
2772
2773 return bfd_reloc_ok;
2774 }
2775 \f
2776
2777 /* Map BFD reloc types to NDS32 ELF reloc types. */
2778
2779 struct nds32_reloc_map_entry
2780 {
2781 bfd_reloc_code_real_type bfd_reloc_val;
2782 unsigned char elf_reloc_val;
2783 };
2784
2785 static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2786 {
2787 {BFD_RELOC_NONE, R_NDS32_NONE},
2788 {BFD_RELOC_16, R_NDS32_16_RELA},
2789 {BFD_RELOC_32, R_NDS32_32_RELA},
2790 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2791 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2792 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2793 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2794 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2795 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2796 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2797 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2798 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2799 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2800 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2801 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2802 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2803 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2804 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2805 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2806 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2807 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2808 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2809 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2810
2811 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2812 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2813 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2814 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2815 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2816 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2817 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2818 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2819 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2820 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2821 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2822 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2823 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2824 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2825 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2826 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2827 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2828 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2829 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2830 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2831 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2832 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2833 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2834 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2835 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2836 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2837 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
2838 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2839 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2840 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2841 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2842 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2843 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2844 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
2845 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2846 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2847 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2848 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2849 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2850 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2851 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2856 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2857 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2858 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2859 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2860 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2861 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2862 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2863 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2864 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2865 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2867 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2868 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2869 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2870 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2871 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2872 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2873 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2874 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2875 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2876 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2877 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2878 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2879 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2880 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2881 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2882 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2883 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2884 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2885 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
2886
2887 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2888 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2889 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2890 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2891 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2892 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2893 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2894 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2895 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2896 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2897 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2898 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2899 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2900 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2901 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2902 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2903 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2904 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2905 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2906 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
2907 };
2908
2909 /* Patch tag. */
2910
2911 static reloc_howto_type *
2912 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2913 const char *r_name)
2914 {
2915 unsigned int i;
2916
2917 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2918 if (nds32_elf_howto_table[i].name != NULL
2919 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2920 return &nds32_elf_howto_table[i];
2921
2922 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2923 if (nds32_elf_relax_howto_table[i].name != NULL
2924 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2925 return &nds32_elf_relax_howto_table[i];
2926
2927 return NULL;
2928 }
2929
2930 static reloc_howto_type *
2931 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2932 {
2933 if (code < R_NDS32_RELAX_ENTRY)
2934 {
2935 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2936 return &nds32_elf_howto_table[code];
2937 }
2938 else
2939 {
2940 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2941 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2942 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2943 }
2944 }
2945
2946 static reloc_howto_type *
2947 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2948 bfd_reloc_code_real_type code)
2949 {
2950 unsigned int i;
2951
2952 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2953 {
2954 if (nds32_reloc_map[i].bfd_reloc_val == code)
2955 return bfd_elf32_bfd_reloc_type_table_lookup
2956 (nds32_reloc_map[i].elf_reloc_val);
2957 }
2958
2959 return NULL;
2960 }
2961
2962 /* Set the howto pointer for an NDS32 ELF reloc. */
2963
2964 static void
2965 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2966 Elf_Internal_Rela *dst)
2967 {
2968 enum elf_nds32_reloc_type r_type;
2969
2970 r_type = ELF32_R_TYPE (dst->r_info);
2971 if (r_type > R_NDS32_GNU_VTENTRY)
2972 {
2973 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
2974 r_type = 0;
2975 }
2976 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2977 }
2978
2979 static void
2980 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2981 Elf_Internal_Rela *dst)
2982 {
2983 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2984 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2985 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2986 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2987 }
2988
2989 /* Support for core dump NOTE sections.
2990 Reference to include/linux/elfcore.h in Linux. */
2991
2992 static bfd_boolean
2993 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2994 {
2995 int offset;
2996 size_t size;
2997
2998 switch (note->descsz)
2999 {
3000 case 0x114:
3001 /* Linux/NDS32 32-bit, ABI1 */
3002
3003 /* pr_cursig */
3004 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3005
3006 /* pr_pid */
3007 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3008
3009 /* pr_reg */
3010 offset = 72;
3011 size = 200;
3012 break;
3013
3014 case 0xfc:
3015 /* Linux/NDS32 32-bit */
3016
3017 /* pr_cursig */
3018 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3019
3020 /* pr_pid */
3021 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3022
3023 /* pr_reg */
3024 offset = 72;
3025 size = 176;
3026 break;
3027
3028 default:
3029 return FALSE;
3030 }
3031
3032 /* Make a ".reg" section. */
3033 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3034 size, note->descpos + offset);
3035 }
3036
3037 static bfd_boolean
3038 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3039 {
3040 switch (note->descsz)
3041 {
3042 case 124:
3043 /* Linux/NDS32 */
3044
3045 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3046 elf_tdata (abfd)->core->program =
3047 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3048 elf_tdata (abfd)->core->command =
3049 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3050 break;
3051
3052 default:
3053 return FALSE;
3054 }
3055
3056 /* Note that for some reason, a spurious space is tacked
3057 onto the end of the args in some (at least one anyway)
3058 implementations, so strip it off if it exists. */
3059 {
3060 char *command = elf_tdata (abfd)->core->command;
3061 int n = strlen (command);
3062
3063 if (0 < n && command[n - 1] == ' ')
3064 command[n - 1] = '\0';
3065 }
3066
3067 return TRUE;
3068 }
3069
3070 /* Hook called by the linker routine which adds symbols from an object
3071 file. We must handle the special NDS32 section numbers here.
3072 We also keep watching for whether we need to create the sdata special
3073 linker sections. */
3074
3075 static bfd_boolean
3076 nds32_elf_add_symbol_hook (bfd *abfd,
3077 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3078 Elf_Internal_Sym *sym,
3079 const char **namep ATTRIBUTE_UNUSED,
3080 flagword *flagsp ATTRIBUTE_UNUSED,
3081 asection **secp, bfd_vma *valp)
3082 {
3083 switch (sym->st_shndx)
3084 {
3085 case SHN_COMMON:
3086 /* Common symbols less than the GP size are automatically
3087 treated as SHN_MIPS_SCOMMON symbols. */
3088 if (sym->st_size > elf_gp_size (abfd)
3089 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3090 break;
3091
3092 /* st_value is the alignemnt constraint.
3093 That might be its actual size if it is an array or structure. */
3094 switch (sym->st_value)
3095 {
3096 case 1:
3097 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3098 break;
3099 case 2:
3100 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3101 break;
3102 case 4:
3103 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3104 break;
3105 case 8:
3106 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3107 break;
3108 default:
3109 return TRUE;
3110 }
3111
3112 (*secp)->flags |= SEC_IS_COMMON;
3113 *valp = sym->st_size;
3114 break;
3115 }
3116
3117 return TRUE;
3118 }
3119
3120
3121 /* This function can figure out the best location for a base register to access
3122 data relative to this base register
3123 INPUT:
3124 sda_d0: size of first DOUBLE WORD data section
3125 sda_w0: size of first WORD data section
3126 sda_h0: size of first HALF WORD data section
3127 sda_b : size of BYTE data section
3128 sda_hi: size of second HALF WORD data section
3129 sda_w1: size of second WORD data section
3130 sda_d1: size of second DOUBLE WORD data section
3131 OUTPUT:
3132 offset (always positive) from the beginning of sda_d0 if OK
3133 a negative error value if fail
3134 NOTE:
3135 these 7 sections have to be located back to back if exist
3136 a pass in 0 value for non-existing section */
3137
3138 /* Due to the interpretation of simm15 field of load/store depending on
3139 data accessing size, the organization of base register relative data shall
3140 like the following figure
3141 -------------------------------------------
3142 | DOUBLE WORD sized data (range +/- 128K)
3143 -------------------------------------------
3144 | WORD sized data (range +/- 64K)
3145 -------------------------------------------
3146 | HALF WORD sized data (range +/- 32K)
3147 -------------------------------------------
3148 | BYTE sized data (range +/- 16K)
3149 -------------------------------------------
3150 | HALF WORD sized data (range +/- 32K)
3151 -------------------------------------------
3152 | WORD sized data (range +/- 64K)
3153 -------------------------------------------
3154 | DOUBLE WORD sized data (range +/- 128K)
3155 -------------------------------------------
3156 Its base register shall be set to access these data freely. */
3157
3158 /* We have to figure out the SDA_BASE value, so that we can adjust the
3159 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3160 BFD. If we can't find it, we're stuck. We cache it in the ELF
3161 target data. We don't need to adjust the symbol value for an
3162 external symbol if we are producing relocatable output. */
3163
3164 static asection *sda_rela_sec = NULL;
3165
3166 #define SDA_SECTION_NUM 10
3167
3168 static bfd_reloc_status_type
3169 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3170 bfd_vma *psb, bfd_boolean add_symbol)
3171 {
3172 int relax_fp_as_gp;
3173 struct elf_nds32_link_hash_table *table;
3174 struct bfd_link_hash_entry *h, *h2;
3175 long unsigned int total = 0;
3176
3177 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3178 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3179 {
3180 asection *first = NULL, *final = NULL, *temp;
3181 bfd_vma sda_base;
3182 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3183 4 byte-aligned. Therefore, it has to set the first section ".data"
3184 4 byte-aligned. */
3185 static const char sec_name[SDA_SECTION_NUM][10] =
3186 {
3187 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
3188 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
3189 };
3190 size_t i = 0;
3191
3192 if (output_bfd->sections == NULL)
3193 {
3194 *psb = elf_gp (output_bfd);
3195 return bfd_reloc_ok;
3196 }
3197
3198 /* Get the first and final section. */
3199 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3200 {
3201 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3202 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3203 first = temp;
3204 if (temp && (temp->size != 0 || temp->rawsize != 0))
3205 final = temp;
3206
3207 /* Summarize the sections in order to check if joining .bss. */
3208 if (temp && temp->size != 0)
3209 total += temp->size;
3210 else if (temp && temp->rawsize != 0)
3211 total += temp->rawsize;
3212
3213 i++;
3214 }
3215
3216 /* Check .bss size. */
3217 temp = bfd_get_section_by_name (output_bfd, ".bss");
3218 if (temp)
3219 {
3220 if (temp->size != 0)
3221 total += temp->size;
3222 else if (temp->rawsize != 0)
3223 total += temp->rawsize;
3224
3225 if (total < 0x80000)
3226 {
3227 if (!first && (temp->size != 0 || temp->rawsize != 0))
3228 first = temp;
3229 if ((temp->size != 0 || temp->rawsize != 0))
3230 final = temp;
3231 }
3232 }
3233
3234 if (first && final)
3235 {
3236 /* The middle of data region. */
3237 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3238
3239 /* Find the section sda_base located. */
3240 i = 0;
3241 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3242 {
3243 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3244 if (final && (final->size != 0 || final->rawsize != 0)
3245 && sda_base >= final->vma)
3246 {
3247 first = final;
3248 i++;
3249 }
3250 else
3251 break;
3252 }
3253 }
3254 else
3255 {
3256 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3257 first output section. */
3258 first = output_bfd->sections;
3259 while (first && first->size == 0 && first->rawsize == 0)
3260 first = first->next;
3261 if (!first)
3262 {
3263 *psb = elf_gp (output_bfd);
3264 return bfd_reloc_ok;
3265 }
3266 sda_base = first->vma + first->rawsize;
3267 }
3268
3269 sda_base -= first->vma;
3270 sda_base = sda_base & (~7);
3271
3272 if (!_bfd_generic_link_add_one_symbol
3273 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3274 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3275 get_elf_backend_data (output_bfd)->collect, &h))
3276 return FALSE;
3277
3278 sda_rela_sec = first;
3279
3280 table = nds32_elf_hash_table (info);
3281 relax_fp_as_gp = table->relax_fp_as_gp;
3282 if (relax_fp_as_gp)
3283 {
3284 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3285 FALSE, FALSE, FALSE);
3286 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3287 And set FP equal to SDA_BASE to do relaxation for
3288 la $fp, _FP_BASE_. */
3289 if (!_bfd_generic_link_add_one_symbol
3290 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3291 first, (bfd_vma) sda_base, (const char *) NULL,
3292 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3293 return FALSE;
3294 }
3295 }
3296
3297 if (add_symbol == TRUE)
3298 {
3299 if (h)
3300 {
3301 /* Now set gp. */
3302 elf_gp (output_bfd) = (h->u.def.value
3303 + h->u.def.section->output_section->vma
3304 + h->u.def.section->output_offset);
3305 }
3306 else
3307 {
3308 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
3309 return bfd_reloc_dangerous;
3310 }
3311 }
3312
3313 *psb = h->u.def.value + h->u.def.section->output_section->vma
3314 + h->u.def.section->output_offset;
3315 return bfd_reloc_ok;
3316 }
3317 \f
3318
3319 /* Return size of a PLT entry. */
3320 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3321
3322
3323 /* Create an entry in an nds32 ELF linker hash table. */
3324
3325 static struct bfd_hash_entry *
3326 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3327 struct bfd_hash_table *table,
3328 const char *string)
3329 {
3330 struct elf_nds32_link_hash_entry *ret;
3331
3332 ret = (struct elf_nds32_link_hash_entry *) entry;
3333
3334 /* Allocate the structure if it has not already been allocated by a
3335 subclass. */
3336 if (ret == NULL)
3337 ret = (struct elf_nds32_link_hash_entry *)
3338 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3339
3340 if (ret == NULL)
3341 return (struct bfd_hash_entry *) ret;
3342
3343 /* Call the allocation method of the superclass. */
3344 ret = (struct elf_nds32_link_hash_entry *)
3345 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3346
3347 if (ret != NULL)
3348 {
3349 struct elf_nds32_link_hash_entry *eh;
3350
3351 eh = (struct elf_nds32_link_hash_entry *) ret;
3352 eh->dyn_relocs = NULL;
3353 eh->tls_type = GOT_UNKNOWN;
3354 }
3355
3356 return (struct bfd_hash_entry *) ret;
3357 }
3358
3359 /* Create an nds32 ELF linker hash table. */
3360
3361 static struct bfd_link_hash_table *
3362 nds32_elf_link_hash_table_create (bfd *abfd)
3363 {
3364 struct elf_nds32_link_hash_table *ret;
3365
3366 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3367
3368 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3369 if (ret == NULL)
3370 return NULL;
3371
3372 /* patch tag. */
3373 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3374 nds32_elf_link_hash_newfunc,
3375 sizeof (struct elf_nds32_link_hash_entry),
3376 NDS32_ELF_DATA))
3377 {
3378 free (ret);
3379 return NULL;
3380 }
3381
3382 ret->sgot = NULL;
3383 ret->sgotplt = NULL;
3384 ret->srelgot = NULL;
3385 ret->splt = NULL;
3386 ret->srelplt = NULL;
3387 ret->sdynbss = NULL;
3388 ret->srelbss = NULL;
3389 ret->sym_ld_script = NULL;
3390 ret->ex9_export_file = NULL;
3391 ret->ex9_import_file = NULL;
3392
3393 return &ret->root.root;
3394 }
3395
3396 /* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3397 shortcuts to them in our hash table. */
3398
3399 static bfd_boolean
3400 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3401 {
3402 struct elf_nds32_link_hash_table *htab;
3403
3404 if (!_bfd_elf_create_got_section (dynobj, info))
3405 return FALSE;
3406
3407 htab = nds32_elf_hash_table (info);
3408 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3409 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3410 if (!htab->sgot || !htab->sgotplt)
3411 abort ();
3412
3413 /* _bfd_elf_create_got_section will create it for us. */
3414 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3415 if (htab->srelgot == NULL
3416 || !bfd_set_section_flags (dynobj, htab->srelgot,
3417 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3418 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3419 | SEC_READONLY))
3420 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3421 return FALSE;
3422
3423 return TRUE;
3424 }
3425
3426 /* Create dynamic sections when linking against a dynamic object. */
3427
3428 static bfd_boolean
3429 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3430 {
3431 struct elf_nds32_link_hash_table *htab;
3432 flagword flags, pltflags;
3433 register asection *s;
3434 const struct elf_backend_data *bed;
3435 int ptralign = 2; /* 32-bit */
3436
3437 bed = get_elf_backend_data (abfd);
3438
3439 htab = nds32_elf_hash_table (info);
3440
3441 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3442 .rel[a].bss sections. */
3443
3444 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3445 | SEC_LINKER_CREATED);
3446
3447 pltflags = flags;
3448 pltflags |= SEC_CODE;
3449 if (bed->plt_not_loaded)
3450 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3451 if (bed->plt_readonly)
3452 pltflags |= SEC_READONLY;
3453
3454 s = bfd_make_section (abfd, ".plt");
3455 htab->splt = s;
3456 if (s == NULL
3457 || !bfd_set_section_flags (abfd, s, pltflags)
3458 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3459 return FALSE;
3460
3461 if (bed->want_plt_sym)
3462 {
3463 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3464 .plt section. */
3465 struct bfd_link_hash_entry *bh = NULL;
3466 struct elf_link_hash_entry *h;
3467
3468 if (!(_bfd_generic_link_add_one_symbol
3469 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3470 (bfd_vma) 0, (const char *) NULL, FALSE,
3471 get_elf_backend_data (abfd)->collect, &bh)))
3472 return FALSE;
3473
3474 h = (struct elf_link_hash_entry *) bh;
3475 h->def_regular = 1;
3476 h->type = STT_OBJECT;
3477
3478 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
3479 return FALSE;
3480 }
3481
3482 s = bfd_make_section (abfd,
3483 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3484 htab->srelplt = s;
3485 if (s == NULL
3486 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3487 || !bfd_set_section_alignment (abfd, s, ptralign))
3488 return FALSE;
3489
3490 if (htab->sgot == NULL && !create_got_section (abfd, info))
3491 return FALSE;
3492
3493 {
3494 const char *secname;
3495 char *relname;
3496 flagword secflags;
3497 asection *sec;
3498
3499 for (sec = abfd->sections; sec; sec = sec->next)
3500 {
3501 secflags = bfd_get_section_flags (abfd, sec);
3502 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3503 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3504 continue;
3505 secname = bfd_get_section_name (abfd, sec);
3506 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3507 strcpy (relname, ".rela");
3508 strcat (relname, secname);
3509 if (bfd_get_section_by_name (abfd, secname))
3510 continue;
3511 s = bfd_make_section (abfd, relname);
3512 if (s == NULL
3513 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3514 || !bfd_set_section_alignment (abfd, s, ptralign))
3515 return FALSE;
3516 }
3517 }
3518
3519 if (bed->want_dynbss)
3520 {
3521 /* The .dynbss section is a place to put symbols which are defined
3522 by dynamic objects, are referenced by regular objects, and are
3523 not functions. We must allocate space for them in the process
3524 image and use a R_*_COPY reloc to tell the dynamic linker to
3525 initialize them at run time. The linker script puts the .dynbss
3526 section into the .bss section of the final image. */
3527 s = bfd_make_section (abfd, ".dynbss");
3528 htab->sdynbss = s;
3529 if (s == NULL
3530 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3531 return FALSE;
3532 /* The .rel[a].bss section holds copy relocs. This section is not
3533 normally needed. We need to create it here, though, so that the
3534 linker will map it to an output section. We can't just create it
3535 only if we need it, because we will not know whether we need it
3536 until we have seen all the input files, and the first time the
3537 main linker code calls BFD after examining all the input files
3538 (size_dynamic_sections) the input sections have already been
3539 mapped to the output sections. If the section turns out not to
3540 be needed, we can discard it later. We will never need this
3541 section when generating a shared object, since they do not use
3542 copy relocs. */
3543 if (!bfd_link_pic (info))
3544 {
3545 s = bfd_make_section (abfd, (bed->default_use_rela_p
3546 ? ".rela.bss" : ".rel.bss"));
3547 htab->srelbss = s;
3548 if (s == NULL
3549 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3550 || !bfd_set_section_alignment (abfd, s, ptralign))
3551 return FALSE;
3552 }
3553 }
3554
3555 return TRUE;
3556 }
3557
3558 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3559 static void
3560 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3561 struct elf_link_hash_entry *dir,
3562 struct elf_link_hash_entry *ind)
3563 {
3564 struct elf_nds32_link_hash_entry *edir, *eind;
3565
3566 edir = (struct elf_nds32_link_hash_entry *) dir;
3567 eind = (struct elf_nds32_link_hash_entry *) ind;
3568
3569 if (eind->dyn_relocs != NULL)
3570 {
3571 if (edir->dyn_relocs != NULL)
3572 {
3573 struct elf_nds32_dyn_relocs **pp;
3574 struct elf_nds32_dyn_relocs *p;
3575
3576 if (ind->root.type == bfd_link_hash_indirect)
3577 abort ();
3578
3579 /* Add reloc counts against the weak sym to the strong sym
3580 list. Merge any entries against the same section. */
3581 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3582 {
3583 struct elf_nds32_dyn_relocs *q;
3584
3585 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3586 if (q->sec == p->sec)
3587 {
3588 q->pc_count += p->pc_count;
3589 q->count += p->count;
3590 *pp = p->next;
3591 break;
3592 }
3593 if (q == NULL)
3594 pp = &p->next;
3595 }
3596 *pp = edir->dyn_relocs;
3597 }
3598
3599 edir->dyn_relocs = eind->dyn_relocs;
3600 eind->dyn_relocs = NULL;
3601 }
3602
3603 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3604 }
3605 \f
3606
3607 /* Adjust a symbol defined by a dynamic object and referenced by a
3608 regular object. The current definition is in some section of the
3609 dynamic object, but we're not including those sections. We have to
3610 change the definition to something the rest of the link can
3611 understand. */
3612
3613 static bfd_boolean
3614 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3615 struct elf_link_hash_entry *h)
3616 {
3617 struct elf_nds32_link_hash_table *htab;
3618 struct elf_nds32_link_hash_entry *eh;
3619 struct elf_nds32_dyn_relocs *p;
3620 bfd *dynobj;
3621 asection *s;
3622 unsigned int power_of_two;
3623
3624 dynobj = elf_hash_table (info)->dynobj;
3625
3626 /* Make sure we know what is going on here. */
3627 BFD_ASSERT (dynobj != NULL
3628 && (h->needs_plt
3629 || h->u.weakdef != NULL
3630 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3631
3632
3633 /* If this is a function, put it in the procedure linkage table. We
3634 will fill in the contents of the procedure linkage table later,
3635 when we know the address of the .got section. */
3636 if (h->type == STT_FUNC || h->needs_plt)
3637 {
3638 if (!bfd_link_pic (info)
3639 && !h->def_dynamic
3640 && !h->ref_dynamic
3641 && h->root.type != bfd_link_hash_undefweak
3642 && h->root.type != bfd_link_hash_undefined)
3643 {
3644 /* This case can occur if we saw a PLT reloc in an input
3645 file, but the symbol was never referred to by a dynamic
3646 object. In such a case, we don't actually need to build
3647 a procedure linkage table, and we can just do a PCREL
3648 reloc instead. */
3649 h->plt.offset = (bfd_vma) - 1;
3650 h->needs_plt = 0;
3651 }
3652
3653 return TRUE;
3654 }
3655 else
3656 h->plt.offset = (bfd_vma) - 1;
3657
3658 /* If this is a weak symbol, and there is a real definition, the
3659 processor independent code will have arranged for us to see the
3660 real definition first, and we can just use the same value. */
3661 if (h->u.weakdef != NULL)
3662 {
3663 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3664 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3665 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3666 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3667 return TRUE;
3668 }
3669
3670 /* This is a reference to a symbol defined by a dynamic object which
3671 is not a function. */
3672
3673 /* If we are creating a shared library, we must presume that the
3674 only references to the symbol are via the global offset table.
3675 For such cases we need not do anything here; the relocations will
3676 be handled correctly by relocate_section. */
3677 if (bfd_link_pic (info))
3678 return TRUE;
3679
3680 /* If there are no references to this symbol that do not use the
3681 GOT, we don't need to generate a copy reloc. */
3682 if (!h->non_got_ref)
3683 return TRUE;
3684
3685 /* If -z nocopyreloc was given, we won't generate them either. */
3686 if (info->nocopyreloc)
3687 {
3688 h->non_got_ref = 0;
3689 return TRUE;
3690 }
3691
3692 eh = (struct elf_nds32_link_hash_entry *) h;
3693 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3694 {
3695 s = p->sec->output_section;
3696 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3697 break;
3698 }
3699
3700 /* If we didn't find any dynamic relocs in sections which needs the
3701 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3702 the copy reloc. */
3703 if (p == NULL)
3704 {
3705 h->non_got_ref = 0;
3706 return TRUE;
3707 }
3708
3709 /* We must allocate the symbol in our .dynbss section, which will
3710 become part of the .bss section of the executable. There will be
3711 an entry for this symbol in the .dynsym section. The dynamic
3712 object will contain position independent code, so all references
3713 from the dynamic object to this symbol will go through the global
3714 offset table. The dynamic linker will use the .dynsym entry to
3715 determine the address it must put in the global offset table, so
3716 both the dynamic object and the regular object will refer to the
3717 same memory location for the variable. */
3718
3719 htab = nds32_elf_hash_table (info);
3720 s = htab->sdynbss;
3721 BFD_ASSERT (s != NULL);
3722
3723 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3724 to copy the initial value out of the dynamic object and into the
3725 runtime process image. We need to remember the offset into the
3726 .rela.bss section we are going to use. */
3727 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3728 {
3729 asection *srel;
3730
3731 srel = htab->srelbss;
3732 BFD_ASSERT (srel != NULL);
3733 srel->size += sizeof (Elf32_External_Rela);
3734 h->needs_copy = 1;
3735 }
3736
3737 /* We need to figure out the alignment required for this symbol. I
3738 have no idea how ELF linkers handle this. */
3739 power_of_two = bfd_log2 (h->size);
3740 if (power_of_two > 3)
3741 power_of_two = 3;
3742
3743 /* Apply the required alignment. */
3744 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3745 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3746 {
3747 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3748 return FALSE;
3749 }
3750
3751 /* Define the symbol as being at this point in the section. */
3752 h->root.u.def.section = s;
3753 h->root.u.def.value = s->size;
3754
3755 /* Increment the section size to make room for the symbol. */
3756 s->size += h->size;
3757
3758 return TRUE;
3759 }
3760
3761 /* Allocate space in .plt, .got and associated reloc sections for
3762 dynamic relocs. */
3763
3764 static bfd_boolean
3765 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3766 {
3767 struct bfd_link_info *info;
3768 struct elf_nds32_link_hash_table *htab;
3769 struct elf_nds32_link_hash_entry *eh;
3770 struct elf_nds32_dyn_relocs *p;
3771
3772 if (h->root.type == bfd_link_hash_indirect)
3773 return TRUE;
3774
3775 if (h->root.type == bfd_link_hash_warning)
3776 /* When warning symbols are created, they **replace** the "real"
3777 entry in the hash table, thus we never get to see the real
3778 symbol in a hash traversal. So look at it now. */
3779 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3780
3781 info = (struct bfd_link_info *) inf;
3782 htab = nds32_elf_hash_table (info);
3783
3784 eh = (struct elf_nds32_link_hash_entry *) h;
3785
3786 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3787 {
3788 /* Make sure this symbol is output as a dynamic symbol.
3789 Undefined weak syms won't yet be marked as dynamic. */
3790 if (h->dynindx == -1 && !h->forced_local)
3791 {
3792 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3793 return FALSE;
3794 }
3795
3796 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
3797 {
3798 asection *s = htab->splt;
3799
3800 /* If this is the first .plt entry, make room for the special
3801 first entry. */
3802 if (s->size == 0)
3803 s->size += PLT_ENTRY_SIZE;
3804
3805 h->plt.offset = s->size;
3806
3807 /* If this symbol is not defined in a regular file, and we are
3808 not generating a shared library, then set the symbol to this
3809 location in the .plt. This is required to make function
3810 pointers compare as equal between the normal executable and
3811 the shared library. */
3812 if (!bfd_link_pic (info) && !h->def_regular)
3813 {
3814 h->root.u.def.section = s;
3815 h->root.u.def.value = h->plt.offset;
3816 }
3817
3818 /* Make room for this entry. */
3819 s->size += PLT_ENTRY_SIZE;
3820
3821 /* We also need to make an entry in the .got.plt section, which
3822 will be placed in the .got section by the linker script. */
3823 htab->sgotplt->size += 4;
3824
3825 /* We also need to make an entry in the .rel.plt section. */
3826 htab->srelplt->size += sizeof (Elf32_External_Rela);
3827 }
3828 else
3829 {
3830 h->plt.offset = (bfd_vma) - 1;
3831 h->needs_plt = 0;
3832 }
3833 }
3834 else
3835 {
3836 h->plt.offset = (bfd_vma) - 1;
3837 h->needs_plt = 0;
3838 }
3839
3840 if (h->got.refcount > 0)
3841 {
3842 asection *s;
3843 bfd_boolean dyn;
3844 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
3845
3846 /* Make sure this symbol is output as a dynamic symbol.
3847 Undefined weak syms won't yet be marked as dynamic. */
3848 if (h->dynindx == -1 && !h->forced_local)
3849 {
3850 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3851 return FALSE;
3852 }
3853
3854 s = htab->sgot;
3855 h->got.offset = s->size;
3856
3857 if (tls_type == GOT_UNKNOWN)
3858 abort ();
3859 else if (tls_type == GOT_NORMAL
3860 || tls_type == GOT_TLS_IE)
3861 /* Need a GOT slot. */
3862 s->size += 4;
3863
3864 dyn = htab->root.dynamic_sections_created;
3865 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
3866 htab->srelgot->size += sizeof (Elf32_External_Rela);
3867 }
3868 else
3869 h->got.offset = (bfd_vma) - 1;
3870
3871 if (eh->dyn_relocs == NULL)
3872 return TRUE;
3873
3874 /* In the shared -Bsymbolic case, discard space allocated for
3875 dynamic pc-relative relocs against symbols which turn out to be
3876 defined in regular objects. For the normal shared case, discard
3877 space for pc-relative relocs that have become local due to symbol
3878 visibility changes. */
3879
3880 if (bfd_link_pic (info))
3881 {
3882 if (h->def_regular && (h->forced_local || info->symbolic))
3883 {
3884 struct elf_nds32_dyn_relocs **pp;
3885
3886 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3887 {
3888 p->count -= p->pc_count;
3889 p->pc_count = 0;
3890 if (p->count == 0)
3891 *pp = p->next;
3892 else
3893 pp = &p->next;
3894 }
3895 }
3896 }
3897 else
3898 {
3899 /* For the non-shared case, discard space for relocs against
3900 symbols which turn out to need copy relocs or are not dynamic. */
3901
3902 if (!h->non_got_ref
3903 && ((h->def_dynamic
3904 && !h->def_regular)
3905 || (htab->root.dynamic_sections_created
3906 && (h->root.type == bfd_link_hash_undefweak
3907 || h->root.type == bfd_link_hash_undefined))))
3908 {
3909 /* Make sure this symbol is output as a dynamic symbol.
3910 Undefined weak syms won't yet be marked as dynamic. */
3911 if (h->dynindx == -1 && !h->forced_local)
3912 {
3913 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3914 return FALSE;
3915 }
3916
3917 /* If that succeeded, we know we'll be keeping all the
3918 relocs. */
3919 if (h->dynindx != -1)
3920 goto keep;
3921 }
3922
3923 eh->dyn_relocs = NULL;
3924
3925 keep:;
3926 }
3927
3928 /* Finally, allocate space. */
3929 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3930 {
3931 asection *sreloc = elf_section_data (p->sec)->sreloc;
3932 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3933 }
3934
3935 return TRUE;
3936 }
3937
3938 /* Find any dynamic relocs that apply to read-only sections. */
3939
3940 static bfd_boolean
3941 readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3942 {
3943 struct elf_nds32_link_hash_entry *eh;
3944 struct elf_nds32_dyn_relocs *p;
3945
3946 if (h->root.type == bfd_link_hash_warning)
3947 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3948
3949 eh = (struct elf_nds32_link_hash_entry *) h;
3950 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3951 {
3952 asection *s = p->sec->output_section;
3953
3954 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3955 {
3956 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3957
3958 info->flags |= DF_TEXTREL;
3959
3960 /* Not an error, just cut short the traversal. */
3961 return FALSE;
3962 }
3963 }
3964 return TRUE;
3965 }
3966
3967 /* Set the sizes of the dynamic sections. */
3968
3969 static bfd_boolean
3970 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3971 struct bfd_link_info *info)
3972 {
3973 struct elf_nds32_link_hash_table *htab;
3974 bfd *dynobj;
3975 asection *s;
3976 bfd_boolean relocs;
3977 bfd *ibfd;
3978
3979 htab = nds32_elf_hash_table (info);
3980 dynobj = htab->root.dynobj;
3981 BFD_ASSERT (dynobj != NULL);
3982
3983 if (htab->root.dynamic_sections_created)
3984 {
3985 /* Set the contents of the .interp section to the interpreter. */
3986 if (!bfd_link_pic (info) && !info->nointerp)
3987 {
3988 s = bfd_get_section_by_name (dynobj, ".interp");
3989 BFD_ASSERT (s != NULL);
3990 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3991 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3992 }
3993 }
3994
3995 /* Set up .got offsets for local syms, and space for local dynamic
3996 relocs. */
3997 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
3998 {
3999 bfd_signed_vma *local_got;
4000 bfd_signed_vma *end_local_got;
4001 bfd_size_type locsymcount;
4002 Elf_Internal_Shdr *symtab_hdr;
4003 asection *srel;
4004
4005 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4006 continue;
4007
4008 for (s = ibfd->sections; s != NULL; s = s->next)
4009 {
4010 struct elf_nds32_dyn_relocs *p;
4011
4012 for (p = ((struct elf_nds32_dyn_relocs *)
4013 elf_section_data (s)->local_dynrel);
4014 p != NULL; p = p->next)
4015 {
4016 if (!bfd_is_abs_section (p->sec)
4017 && bfd_is_abs_section (p->sec->output_section))
4018 {
4019 /* Input section has been discarded, either because
4020 it is a copy of a linkonce section or due to
4021 linker script /DISCARD/, so we'll be discarding
4022 the relocs too. */
4023 }
4024 else if (p->count != 0)
4025 {
4026 srel = elf_section_data (p->sec)->sreloc;
4027 srel->size += p->count * sizeof (Elf32_External_Rela);
4028 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4029 info->flags |= DF_TEXTREL;
4030 }
4031 }
4032 }
4033
4034 local_got = elf_local_got_refcounts (ibfd);
4035 if (!local_got)
4036 continue;
4037
4038 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4039 locsymcount = symtab_hdr->sh_info;
4040 end_local_got = local_got + locsymcount;
4041 s = htab->sgot;
4042 srel = htab->srelgot;
4043 for (; local_got < end_local_got; ++local_got)
4044 {
4045 if (*local_got > 0)
4046 {
4047 *local_got = s->size;
4048 s->size += 4;
4049 if (bfd_link_pic (info))
4050 srel->size += sizeof (Elf32_External_Rela);
4051 }
4052 else
4053 *local_got = (bfd_vma) - 1;
4054 }
4055 }
4056
4057 /* Allocate global sym .plt and .got entries, and space for global
4058 sym dynamic relocs. */
4059 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4060
4061 /* We now have determined the sizes of the various dynamic sections.
4062 Allocate memory for them. */
4063 relocs = FALSE;
4064 for (s = dynobj->sections; s != NULL; s = s->next)
4065 {
4066 if ((s->flags & SEC_LINKER_CREATED) == 0)
4067 continue;
4068
4069 if (s == htab->splt)
4070 {
4071 /* Strip this section if we don't need it; see the
4072 comment below. */
4073 }
4074 else if (s == htab->sgot)
4075 {
4076 got_size += s->size;
4077 }
4078 else if (s == htab->sgotplt)
4079 {
4080 got_size += s->size;
4081 }
4082 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4083 {
4084 if (s->size != 0 && s != htab->srelplt)
4085 relocs = TRUE;
4086
4087 /* We use the reloc_count field as a counter if we need
4088 to copy relocs into the output file. */
4089 s->reloc_count = 0;
4090 }
4091 else
4092 {
4093 /* It's not one of our sections, so don't allocate space. */
4094 continue;
4095 }
4096
4097 if (s->size == 0)
4098 {
4099 /* If we don't need this section, strip it from the
4100 output file. This is mostly to handle .rela.bss and
4101 .rela.plt. We must create both sections in
4102 create_dynamic_sections, because they must be created
4103 before the linker maps input sections to output
4104 sections. The linker does that before
4105 adjust_dynamic_symbol is called, and it is that
4106 function which decides whether anything needs to go
4107 into these sections. */
4108 s->flags |= SEC_EXCLUDE;
4109 continue;
4110 }
4111
4112 /* Allocate memory for the section contents. We use bfd_zalloc
4113 here in case unused entries are not reclaimed before the
4114 section's contents are written out. This should not happen,
4115 but this way if it does, we get a R_NDS32_NONE reloc instead
4116 of garbage. */
4117 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4118 if (s->contents == NULL)
4119 return FALSE;
4120 }
4121
4122
4123 if (htab->root.dynamic_sections_created)
4124 {
4125 /* Add some entries to the .dynamic section. We fill in the
4126 values later, in nds32_elf_finish_dynamic_sections, but we
4127 must add the entries now so that we get the correct size for
4128 the .dynamic section. The DT_DEBUG entry is filled in by the
4129 dynamic linker and used by the debugger. */
4130 #define add_dynamic_entry(TAG, VAL) \
4131 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4132
4133 if (!bfd_link_pic (info))
4134 {
4135 if (!add_dynamic_entry (DT_DEBUG, 0))
4136 return FALSE;
4137 }
4138
4139 if (htab->splt->size != 0)
4140 {
4141 if (!add_dynamic_entry (DT_PLTGOT, 0)
4142 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4143 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4144 || !add_dynamic_entry (DT_JMPREL, 0))
4145 return FALSE;
4146 }
4147
4148 if (relocs)
4149 {
4150 if (!add_dynamic_entry (DT_RELA, 0)
4151 || !add_dynamic_entry (DT_RELASZ, 0)
4152 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4153 return FALSE;
4154
4155 /* If any dynamic relocs apply to a read-only section,
4156 then we need a DT_TEXTREL entry. */
4157 if ((info->flags & DF_TEXTREL) == 0)
4158 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4159 (void *) info);
4160
4161 if ((info->flags & DF_TEXTREL) != 0)
4162 {
4163 if (!add_dynamic_entry (DT_TEXTREL, 0))
4164 return FALSE;
4165 }
4166 }
4167 }
4168 #undef add_dynamic_entry
4169
4170 return TRUE;
4171 }
4172
4173 static bfd_reloc_status_type
4174 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4175 bfd_vma relocation, bfd_byte *location)
4176 {
4177 int size;
4178 bfd_vma x = 0;
4179 bfd_reloc_status_type flag;
4180 unsigned int rightshift = howto->rightshift;
4181 unsigned int bitpos = howto->bitpos;
4182
4183 /* If the size is negative, negate RELOCATION. This isn't very
4184 general. */
4185 if (howto->size < 0)
4186 relocation = -relocation;
4187
4188 /* Get the value we are going to relocate. */
4189 size = bfd_get_reloc_size (howto);
4190 switch (size)
4191 {
4192 default:
4193 abort ();
4194 break;
4195 case 0:
4196 return bfd_reloc_ok;
4197 case 2:
4198 x = bfd_getb16 (location);
4199 break;
4200 case 4:
4201 x = bfd_getb32 (location);
4202 break;
4203 }
4204
4205 /* Check for overflow. FIXME: We may drop bits during the addition
4206 which we don't check for. We must either check at every single
4207 operation, which would be tedious, or we must do the computations
4208 in a type larger than bfd_vma, which would be inefficient. */
4209 flag = bfd_reloc_ok;
4210 if (howto->complain_on_overflow != complain_overflow_dont)
4211 {
4212 bfd_vma addrmask, fieldmask, signmask, ss;
4213 bfd_vma a, b, sum;
4214
4215 /* Get the values to be added together. For signed and unsigned
4216 relocations, we assume that all values should be truncated to
4217 the size of an address. For bitfields, all the bits matter.
4218 See also bfd_check_overflow. */
4219 fieldmask = N_ONES (howto->bitsize);
4220 signmask = ~fieldmask;
4221 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4222 a = (relocation & addrmask) >> rightshift;
4223 b = (x & howto->src_mask & addrmask) >> bitpos;
4224
4225 switch (howto->complain_on_overflow)
4226 {
4227 case complain_overflow_signed:
4228 /* If any sign bits are set, all sign bits must be set.
4229 That is, A must be a valid negative address after
4230 shifting. */
4231 signmask = ~(fieldmask >> 1);
4232 /* Fall through. */
4233
4234 case complain_overflow_bitfield:
4235 /* Much like the signed check, but for a field one bit
4236 wider. We allow a bitfield to represent numbers in the
4237 range -2**n to 2**n-1, where n is the number of bits in the
4238 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4239 can't overflow, which is exactly what we want. */
4240 ss = a & signmask;
4241 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4242 flag = bfd_reloc_overflow;
4243
4244 /* We only need this next bit of code if the sign bit of B
4245 is below the sign bit of A. This would only happen if
4246 SRC_MASK had fewer bits than BITSIZE. Note that if
4247 SRC_MASK has more bits than BITSIZE, we can get into
4248 trouble; we would need to verify that B is in range, as
4249 we do for A above. */
4250 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4251 ss >>= bitpos;
4252
4253 /* Set all the bits above the sign bit. */
4254 b = (b ^ ss) - ss;
4255
4256 /* Now we can do the addition. */
4257 sum = a + b;
4258
4259 /* See if the result has the correct sign. Bits above the
4260 sign bit are junk now; ignore them. If the sum is
4261 positive, make sure we did not have all negative inputs;
4262 if the sum is negative, make sure we did not have all
4263 positive inputs. The test below looks only at the sign
4264 bits, and it really just
4265 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4266
4267 We mask with addrmask here to explicitly allow an address
4268 wrap-around. The Linux kernel relies on it, and it is
4269 the only way to write assembler code which can run when
4270 loaded at a location 0x80000000 away from the location at
4271 which it is linked. */
4272 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4273 flag = bfd_reloc_overflow;
4274
4275 break;
4276
4277 case complain_overflow_unsigned:
4278 /* Checking for an unsigned overflow is relatively easy:
4279 trim the addresses and add, and trim the result as well.
4280 Overflow is normally indicated when the result does not
4281 fit in the field. However, we also need to consider the
4282 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4283 input is 0x80000000, and bfd_vma is only 32 bits; then we
4284 will get sum == 0, but there is an overflow, since the
4285 inputs did not fit in the field. Instead of doing a
4286 separate test, we can check for this by or-ing in the
4287 operands when testing for the sum overflowing its final
4288 field. */
4289 sum = (a + b) & addrmask;
4290 if ((a | b | sum) & signmask)
4291 flag = bfd_reloc_overflow;
4292 break;
4293
4294 default:
4295 abort ();
4296 }
4297 }
4298
4299 /* Put RELOCATION in the right bits. */
4300 relocation >>= (bfd_vma) rightshift;
4301 relocation <<= (bfd_vma) bitpos;
4302
4303 /* Add RELOCATION to the right bits of X. */
4304 /* FIXME : 090616
4305 Because the relaxation may generate duplicate relocation at one address,
4306 an addition to immediate in the instruction may cause the relocation added
4307 several times.
4308 This bug should be fixed in assembler, but a check is also needed here. */
4309 if (howto->partial_inplace)
4310 x = ((x & ~howto->dst_mask)
4311 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4312 else
4313 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4314
4315
4316 /* Put the relocated value back in the object file. */
4317 switch (size)
4318 {
4319 default:
4320 case 0:
4321 case 1:
4322 case 8:
4323 abort ();
4324 break;
4325 case 2:
4326 bfd_putb16 (x, location);
4327 break;
4328 case 4:
4329 bfd_putb32 (x, location);
4330 break;
4331 }
4332
4333 return flag;
4334 }
4335
4336 static bfd_reloc_status_type
4337 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4338 asection *input_section, bfd_byte *contents,
4339 bfd_vma address, bfd_vma value, bfd_vma addend)
4340 {
4341 bfd_vma relocation;
4342
4343 /* Sanity check the address. */
4344 if (address > bfd_get_section_limit (input_bfd, input_section))
4345 return bfd_reloc_outofrange;
4346
4347 /* This function assumes that we are dealing with a basic relocation
4348 against a symbol. We want to compute the value of the symbol to
4349 relocate to. This is just VALUE, the value of the symbol, plus
4350 ADDEND, any addend associated with the reloc. */
4351 relocation = value + addend;
4352
4353 /* If the relocation is PC relative, we want to set RELOCATION to
4354 the distance between the symbol (currently in RELOCATION) and the
4355 location we are relocating. Some targets (e.g., i386-aout)
4356 arrange for the contents of the section to be the negative of the
4357 offset of the location within the section; for such targets
4358 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4359 simply leave the contents of the section as zero; for such
4360 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4361 need to subtract out the offset of the location within the
4362 section (which is just ADDRESS). */
4363 if (howto->pc_relative)
4364 {
4365 relocation -= (input_section->output_section->vma
4366 + input_section->output_offset);
4367 if (howto->pcrel_offset)
4368 relocation -= address;
4369 }
4370
4371 return nds32_relocate_contents (howto, input_bfd, relocation,
4372 contents + address);
4373 }
4374
4375 static bfd_boolean
4376 nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4377 const char *name,
4378 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4379 asection *input_sec,
4380 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4381 {
4382 const char *source;
4383 FILE *sym_ld_script = NULL;
4384 struct elf_nds32_link_hash_table *table;
4385
4386 table = nds32_elf_hash_table (info);
4387 sym_ld_script = table->sym_ld_script;
4388 if (!sym_ld_script)
4389 return TRUE;
4390
4391 if (!h || !name || *name == '\0')
4392 return TRUE;
4393
4394 if (input_sec->flags & SEC_EXCLUDE)
4395 return TRUE;
4396
4397 if (!check_start_export_sym)
4398 {
4399 fprintf (sym_ld_script, "SECTIONS\n{\n");
4400 check_start_export_sym = 1;
4401 }
4402
4403 if (h->root.type == bfd_link_hash_defined
4404 || h->root.type == bfd_link_hash_defweak)
4405 {
4406 if (!h->root.u.def.section->output_section)
4407 return TRUE;
4408
4409 if (bfd_is_const_section (input_sec))
4410 source = input_sec->name;
4411 else
4412 source = input_sec->owner->filename;
4413
4414 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4415 h->root.root.string,
4416 (long) (h->root.u.def.value
4417 + h->root.u.def.section->output_section->vma
4418 + h->root.u.def.section->output_offset), source);
4419 }
4420
4421 return TRUE;
4422 }
4423
4424 /* Relocate an NDS32/D ELF section.
4425 There is some attempt to make this function usable for many architectures,
4426 both for RELA and REL type relocs, if only to serve as a learning tool.
4427
4428 The RELOCATE_SECTION function is called by the new ELF backend linker
4429 to handle the relocations for a section.
4430
4431 The relocs are always passed as Rela structures; if the section
4432 actually uses Rel structures, the r_addend field will always be
4433 zero.
4434
4435 This function is responsible for adjust the section contents as
4436 necessary, and (if using Rela relocs and generating a
4437 relocatable output file) adjusting the reloc addend as
4438 necessary.
4439
4440 This function does not have to worry about setting the reloc
4441 address or the reloc symbol index.
4442
4443 LOCAL_SYMS is a pointer to the swapped in local symbols.
4444
4445 LOCAL_SECTIONS is an array giving the section in the input file
4446 corresponding to the st_shndx field of each local symbol.
4447
4448 The global hash table entry for the global symbols can be found
4449 via elf_sym_hashes (input_bfd).
4450
4451 When generating relocatable output, this function must handle
4452 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4453 going to be the section symbol corresponding to the output
4454 section, which means that the addend must be adjusted
4455 accordingly. */
4456
4457 static bfd_vma
4458 dtpoff_base (struct bfd_link_info *info)
4459 {
4460 /* If tls_sec is NULL, we should have signalled an error already. */
4461 if (elf_hash_table (info)->tls_sec == NULL)
4462 return 0;
4463 return elf_hash_table (info)->tls_sec->vma;
4464 }
4465
4466 static bfd_boolean
4467 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4468 struct bfd_link_info * info,
4469 bfd * input_bfd,
4470 asection * input_section,
4471 bfd_byte * contents,
4472 Elf_Internal_Rela * relocs,
4473 Elf_Internal_Sym * local_syms,
4474 asection ** local_sections)
4475 {
4476 Elf_Internal_Shdr *symtab_hdr;
4477 struct elf_link_hash_entry **sym_hashes;
4478 Elf_Internal_Rela *rel, *relend;
4479 bfd_boolean ret = TRUE; /* Assume success. */
4480 int align = 0;
4481 bfd_reloc_status_type r;
4482 const char *errmsg = NULL;
4483 bfd_vma gp;
4484 struct elf_nds32_link_hash_table *htab;
4485 bfd *dynobj;
4486 bfd_vma *local_got_offsets;
4487 asection *sgot, *splt, *sreloc;
4488 bfd_vma high_address;
4489 struct elf_nds32_link_hash_table *table;
4490 int eliminate_gc_relocs;
4491 bfd_vma fpbase_addr;
4492
4493 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4494 sym_hashes = elf_sym_hashes (input_bfd);
4495 htab = nds32_elf_hash_table (info);
4496 high_address = bfd_get_section_limit (input_bfd, input_section);
4497
4498 dynobj = htab->root.dynobj;
4499 local_got_offsets = elf_local_got_offsets (input_bfd);
4500
4501 sgot = htab->sgot;
4502 splt = htab->splt;
4503 sreloc = NULL;
4504
4505 rel = relocs;
4506 relend = relocs + input_section->reloc_count;
4507
4508 table = nds32_elf_hash_table (info);
4509 eliminate_gc_relocs = table->eliminate_gc_relocs;
4510 /* By this time, we can adjust the value of _SDA_BASE_. */
4511 if ((!bfd_link_relocatable (info)))
4512 {
4513 is_SDA_BASE_set = 1;
4514 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4515 if (r != bfd_reloc_ok)
4516 return FALSE;
4517 }
4518
4519 if (is_ITB_BASE_set == 0)
4520 {
4521 /* Set the _ITB_BASE_. */
4522 if (!nds32_elf_ex9_itb_base (info))
4523 {
4524 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"),
4525 output_bfd);
4526 bfd_set_error (bfd_error_bad_value);
4527 }
4528 }
4529
4530 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4531 if (!nds32_elf_ifc_reloc ())
4532 _bfd_error_handler (_("error: IFC relocation error."));
4533
4534 /* Relocation for .ex9.itable. */
4535 if (table->target_optimize & NDS32_RELAX_EX9_ON
4536 || (table->ex9_import_file && table->update_ex9_table))
4537 nds32_elf_ex9_reloc_jmp (info);
4538
4539 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4540 the fp value is set as gp, and it has be reverted for instruction
4541 setting fp. */
4542 fpbase_addr = elf_gp (output_bfd);
4543
4544 for (rel = relocs; rel < relend; rel++)
4545 {
4546 enum elf_nds32_reloc_type r_type;
4547 reloc_howto_type *howto = NULL;
4548 unsigned long r_symndx;
4549 struct elf_link_hash_entry *h = NULL;
4550 Elf_Internal_Sym *sym = NULL;
4551 asection *sec;
4552 bfd_vma relocation;
4553
4554 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4555 ensure it's zero (we use REL relocs, not RELA). Therefore this
4556 should be assigning zero to `addend', but for clarity we use
4557 `r_addend'. */
4558
4559 bfd_vma addend = rel->r_addend;
4560 bfd_vma offset = rel->r_offset;
4561
4562 r_type = ELF32_R_TYPE (rel->r_info);
4563 if (r_type >= R_NDS32_max)
4564 {
4565 _bfd_error_handler (_("%B: error: unknown relocation type %d."),
4566 input_bfd, r_type);
4567 bfd_set_error (bfd_error_bad_value);
4568 ret = FALSE;
4569 continue;
4570 }
4571
4572 if (r_type == R_NDS32_GNU_VTENTRY
4573 || r_type == R_NDS32_GNU_VTINHERIT
4574 || r_type == R_NDS32_NONE
4575 || r_type == R_NDS32_RELA_GNU_VTENTRY
4576 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4577 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4578 || r_type == R_NDS32_DATA
4579 || r_type == R_NDS32_TRAN
4580 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
4581 continue;
4582
4583 /* If we enter the fp-as-gp region. Resolve the address
4584 of best fp-base. */
4585 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4586 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4587 {
4588 int dist;
4589
4590 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4591 dist = rel->r_addend >> 16;
4592 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4593 local_syms, symtab_hdr);
4594 }
4595 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4596 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4597 {
4598 fpbase_addr = elf_gp (output_bfd);
4599 }
4600
4601 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4602 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4603 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
4604 continue;
4605
4606 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4607 r_symndx = ELF32_R_SYM (rel->r_info);
4608
4609 /* This is a final link. */
4610 sym = NULL;
4611 sec = NULL;
4612 h = NULL;
4613
4614 if (r_symndx < symtab_hdr->sh_info)
4615 {
4616 /* Local symbol. */
4617 sym = local_syms + r_symndx;
4618 sec = local_sections[r_symndx];
4619
4620 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4621 addend = rel->r_addend;
4622 }
4623 else
4624 {
4625 /* External symbol. */
4626 bfd_boolean warned, ignored, unresolved_reloc;
4627 int symndx = r_symndx - symtab_hdr->sh_info;
4628
4629 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4630 r_symndx, symtab_hdr, sym_hashes, h, sec,
4631 relocation, unresolved_reloc, warned,
4632 ignored);
4633
4634 /* la $fp, _FP_BASE_ is per-function (region).
4635 Handle it specially. */
4636 switch ((int) r_type)
4637 {
4638 case R_NDS32_SDA19S0_RELA:
4639 case R_NDS32_SDA15S0_RELA:
4640 case R_NDS32_20_RELA:
4641 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4642 FP_BASE_NAME) == 0)
4643 {
4644 relocation = fpbase_addr;
4645 break;
4646 }
4647 }
4648
4649 }
4650
4651 if (bfd_link_relocatable (info))
4652 {
4653 /* This is a relocatable link. We don't have to change
4654 anything, unless the reloc is against a section symbol,
4655 in which case we have to adjust according to where the
4656 section symbol winds up in the output section. */
4657 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4658 rel->r_addend += sec->output_offset + sym->st_value;
4659
4660 continue;
4661 }
4662
4663 /* Sanity check the address. */
4664 if (offset > high_address)
4665 {
4666 r = bfd_reloc_outofrange;
4667 goto check_reloc;
4668 }
4669
4670 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4671 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4672 || r_type >= R_NDS32_RELAX_ENTRY)
4673 continue;
4674
4675 switch ((int) r_type)
4676 {
4677 case R_NDS32_GOTOFF:
4678 /* Relocation is relative to the start of the global offset
4679 table (for ld24 rx, #uimm24), e.g. access at label+addend
4680
4681 ld24 rx. #label@GOTOFF + addend
4682 sub rx, r12. */
4683 case R_NDS32_GOTOFF_HI20:
4684 case R_NDS32_GOTOFF_LO12:
4685 case R_NDS32_GOTOFF_LO15:
4686 case R_NDS32_GOTOFF_LO19:
4687 BFD_ASSERT (sgot != NULL);
4688
4689 relocation -= elf_gp (output_bfd);
4690 break;
4691
4692 case R_NDS32_9_PLTREL:
4693 case R_NDS32_25_PLTREL:
4694 /* Relocation is to the entry for this symbol in the
4695 procedure linkage table. */
4696
4697 /* The native assembler will generate a 25_PLTREL reloc
4698 for a local symbol if you assemble a call from one
4699 section to another when using -K pic. */
4700 if (h == NULL)
4701 break;
4702
4703 if (h->forced_local)
4704 break;
4705
4706 /* We didn't make a PLT entry for this symbol. This
4707 happens when statically linking PIC code, or when
4708 using -Bsymbolic. */
4709 if (h->plt.offset == (bfd_vma) - 1)
4710 break;
4711
4712 relocation = (splt->output_section->vma
4713 + splt->output_offset + h->plt.offset);
4714 break;
4715
4716 case R_NDS32_PLT_GOTREL_HI20:
4717 case R_NDS32_PLT_GOTREL_LO12:
4718 case R_NDS32_PLT_GOTREL_LO15:
4719 case R_NDS32_PLT_GOTREL_LO19:
4720 case R_NDS32_PLT_GOTREL_LO20:
4721 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4722 {
4723 /* We didn't make a PLT entry for this symbol. This
4724 happens when statically linking PIC code, or when
4725 using -Bsymbolic. */
4726 relocation -= elf_gp (output_bfd);
4727 break;
4728 }
4729
4730 relocation = (splt->output_section->vma
4731 + splt->output_offset + h->plt.offset);
4732
4733 relocation -= elf_gp (output_bfd);
4734 break;
4735
4736 case R_NDS32_PLTREL_HI20:
4737 case R_NDS32_PLTREL_LO12:
4738
4739 /* Relocation is to the entry for this symbol in the
4740 procedure linkage table. */
4741
4742 /* The native assembler will generate a 25_PLTREL reloc
4743 for a local symbol if you assemble a call from one
4744 section to another when using -K pic. */
4745 if (h == NULL)
4746 break;
4747
4748 if (h->forced_local)
4749 break;
4750
4751 if (h->plt.offset == (bfd_vma) - 1)
4752 /* We didn't make a PLT entry for this symbol. This
4753 happens when statically linking PIC code, or when
4754 using -Bsymbolic. */
4755 break;
4756
4757 if (splt == NULL)
4758 break;
4759
4760 relocation = (splt->output_section->vma
4761 + splt->output_offset
4762 + h->plt.offset + 4)
4763 - (input_section->output_section->vma
4764 + input_section->output_offset
4765 + rel->r_offset);
4766
4767 break;
4768
4769 case R_NDS32_GOTPC20:
4770 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4771 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4772 relocation = elf_gp (output_bfd);
4773 break;
4774
4775 case R_NDS32_GOTPC_HI20:
4776 case R_NDS32_GOTPC_LO12:
4777 {
4778 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4779 bl .+4
4780 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4781 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4782 or
4783 bl .+4
4784 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4785 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4786 */
4787 relocation = elf_gp (output_bfd);
4788 relocation -= (input_section->output_section->vma
4789 + input_section->output_offset + rel->r_offset);
4790 break;
4791 }
4792
4793 case R_NDS32_GOT20:
4794 /* Fall through. */
4795 case R_NDS32_GOT_HI20:
4796 case R_NDS32_GOT_LO12:
4797 case R_NDS32_GOT_LO15:
4798 case R_NDS32_GOT_LO19:
4799 /* Relocation is to the entry for this symbol in the global
4800 offset table. */
4801 BFD_ASSERT (sgot != NULL);
4802
4803 if (h != NULL)
4804 {
4805 bfd_boolean dyn;
4806 bfd_vma off;
4807
4808 off = h->got.offset;
4809 BFD_ASSERT (off != (bfd_vma) - 1);
4810 dyn = htab->root.dynamic_sections_created;
4811 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4812 bfd_link_pic (info),
4813 h)
4814 || (bfd_link_pic (info)
4815 && (info->symbolic
4816 || h->dynindx == -1
4817 || h->forced_local) && h->def_regular))
4818 {
4819 /* This is actually a static link, or it is a
4820 -Bsymbolic link and the symbol is defined
4821 locally, or the symbol was forced to be local
4822 because of a version file. We must initialize
4823 this entry in the global offset table. Since the
4824 offset must always be a multiple of 4, we use the
4825 least significant bit to record whether we have
4826 initialized it already.
4827
4828 When doing a dynamic link, we create a .rela.got
4829 relocation entry to initialize the value. This
4830 is done in the finish_dynamic_symbol routine. */
4831 if ((off & 1) != 0)
4832 off &= ~1;
4833 else
4834 {
4835 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4836 h->got.offset |= 1;
4837 }
4838 }
4839 relocation = sgot->output_section->vma + sgot->output_offset + off
4840 - elf_gp (output_bfd);
4841 }
4842 else
4843 {
4844 bfd_vma off;
4845 bfd_byte *loc;
4846
4847 BFD_ASSERT (local_got_offsets != NULL
4848 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4849
4850 off = local_got_offsets[r_symndx];
4851
4852 /* The offset must always be a multiple of 4. We use
4853 the least significant bit to record whether we have
4854 already processed this entry. */
4855 if ((off & 1) != 0)
4856 off &= ~1;
4857 else
4858 {
4859 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4860
4861 if (bfd_link_pic (info))
4862 {
4863 asection *srelgot;
4864 Elf_Internal_Rela outrel;
4865
4866 /* We need to generate a R_NDS32_RELATIVE reloc
4867 for the dynamic linker. */
4868 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4869 BFD_ASSERT (srelgot != NULL);
4870
4871 outrel.r_offset = (elf_gp (output_bfd)
4872 + sgot->output_offset + off);
4873 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4874 outrel.r_addend = relocation;
4875 loc = srelgot->contents;
4876 loc +=
4877 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4878 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4879 ++srelgot->reloc_count;
4880 }
4881 local_got_offsets[r_symndx] |= 1;
4882 }
4883 relocation = sgot->output_section->vma + sgot->output_offset + off
4884 - elf_gp (output_bfd);
4885 }
4886
4887 break;
4888
4889 case R_NDS32_16_RELA:
4890 case R_NDS32_20_RELA:
4891 case R_NDS32_5_RELA:
4892 case R_NDS32_32_RELA:
4893 case R_NDS32_9_PCREL_RELA:
4894 case R_NDS32_WORD_9_PCREL_RELA:
4895 case R_NDS32_10_UPCREL_RELA:
4896 case R_NDS32_15_PCREL_RELA:
4897 case R_NDS32_17_PCREL_RELA:
4898 case R_NDS32_25_PCREL_RELA:
4899 case R_NDS32_HI20_RELA:
4900 case R_NDS32_LO12S3_RELA:
4901 case R_NDS32_LO12S2_RELA:
4902 case R_NDS32_LO12S2_DP_RELA:
4903 case R_NDS32_LO12S2_SP_RELA:
4904 case R_NDS32_LO12S1_RELA:
4905 case R_NDS32_LO12S0_RELA:
4906 case R_NDS32_LO12S0_ORI_RELA:
4907 if (bfd_link_pic (info) && r_symndx != 0
4908 && (input_section->flags & SEC_ALLOC) != 0
4909 && (eliminate_gc_relocs == 0
4910 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4911 && ((r_type != R_NDS32_9_PCREL_RELA
4912 && r_type != R_NDS32_WORD_9_PCREL_RELA
4913 && r_type != R_NDS32_10_UPCREL_RELA
4914 && r_type != R_NDS32_15_PCREL_RELA
4915 && r_type != R_NDS32_17_PCREL_RELA
4916 && r_type != R_NDS32_25_PCREL_RELA
4917 && !(r_type == R_NDS32_32_RELA
4918 && strcmp (input_section->name, ".eh_frame") == 0))
4919 || (h != NULL && h->dynindx != -1
4920 && (!info->symbolic || !h->def_regular))))
4921 {
4922 Elf_Internal_Rela outrel;
4923 bfd_boolean skip, relocate;
4924 bfd_byte *loc;
4925
4926 /* When generating a shared object, these relocations
4927 are copied into the output file to be resolved at run
4928 time. */
4929
4930 if (sreloc == NULL)
4931 {
4932 const char *name;
4933
4934 name = bfd_elf_string_from_elf_section
4935 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4936 elf_section_data (input_section)->rela.hdr->sh_name);
4937 if (name == NULL)
4938 return FALSE;
4939
4940 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4941 && strcmp (bfd_get_section_name (input_bfd,
4942 input_section),
4943 name + 5) == 0);
4944
4945 sreloc = bfd_get_section_by_name (dynobj, name);
4946 BFD_ASSERT (sreloc != NULL);
4947 }
4948
4949 skip = FALSE;
4950 relocate = FALSE;
4951
4952 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4953 info,
4954 input_section,
4955 rel->r_offset);
4956 if (outrel.r_offset == (bfd_vma) - 1)
4957 skip = TRUE;
4958 else if (outrel.r_offset == (bfd_vma) - 2)
4959 skip = TRUE, relocate = TRUE;
4960 outrel.r_offset += (input_section->output_section->vma
4961 + input_section->output_offset);
4962
4963 if (skip)
4964 memset (&outrel, 0, sizeof outrel);
4965 else if (r_type == R_NDS32_17_PCREL_RELA
4966 || r_type == R_NDS32_15_PCREL_RELA
4967 || r_type == R_NDS32_25_PCREL_RELA)
4968 {
4969 BFD_ASSERT (h != NULL && h->dynindx != -1);
4970 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4971 outrel.r_addend = rel->r_addend;
4972 }
4973 else
4974 {
4975 /* h->dynindx may be -1 if this symbol was marked to
4976 become local. */
4977 if (h == NULL
4978 || ((info->symbolic || h->dynindx == -1)
4979 && h->def_regular))
4980 {
4981 relocate = TRUE;
4982 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4983 outrel.r_addend = relocation + rel->r_addend;
4984 }
4985 else
4986 {
4987 BFD_ASSERT (h->dynindx != -1);
4988 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4989 outrel.r_addend = rel->r_addend;
4990 }
4991 }
4992
4993 loc = sreloc->contents;
4994 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4995 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4996 ++sreloc->reloc_count;
4997
4998 /* If this reloc is against an external symbol, we do
4999 not want to fiddle with the addend. Otherwise, we
5000 need to include the symbol value so that it becomes
5001 an addend for the dynamic reloc. */
5002 if (!relocate)
5003 continue;
5004 }
5005 break;
5006
5007 case R_NDS32_25_ABS_RELA:
5008 if (bfd_link_pic (info))
5009 {
5010 _bfd_error_handler
5011 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5012 "mode."), bfd_get_filename (input_bfd));
5013 return FALSE;
5014 }
5015 break;
5016
5017 case R_NDS32_9_PCREL:
5018 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5019 contents, offset,
5020 sec, relocation, addend);
5021 goto check_reloc;
5022
5023 case R_NDS32_HI20:
5024 {
5025 Elf_Internal_Rela *lorel;
5026
5027 /* We allow an arbitrary number of HI20 relocs before the
5028 LO12 reloc. This permits gcc to emit the HI and LO relocs
5029 itself. */
5030 for (lorel = rel + 1;
5031 (lorel < relend
5032 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5033 continue;
5034 if (lorel < relend
5035 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5036 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5037 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5038 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5039 {
5040 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5041 contents, relocation + addend);
5042 r = bfd_reloc_ok;
5043 }
5044 else
5045 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5046 contents, offset, relocation,
5047 addend);
5048 }
5049
5050 goto check_reloc;
5051
5052 case R_NDS32_GOT17S2_RELA:
5053 case R_NDS32_GOT15S2_RELA:
5054 {
5055 bfd_vma off;
5056
5057 BFD_ASSERT (sgot != NULL);
5058
5059 if (h != NULL)
5060 {
5061 bfd_boolean dyn;
5062
5063 off = h->got.offset;
5064 BFD_ASSERT (off != (bfd_vma) - 1);
5065
5066 dyn = htab->root.dynamic_sections_created;
5067 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5068 (dyn, bfd_link_pic (info), h)
5069 || (bfd_link_pic (info)
5070 && (info->symbolic
5071 || h->dynindx == -1
5072 || h->forced_local)
5073 && h->def_regular))
5074 {
5075 /* This is actually a static link, or it is a
5076 -Bsymbolic link and the symbol is defined
5077 locally, or the symbol was forced to be local
5078 because of a version file. We must initialize
5079 this entry in the global offset table. Since the
5080 offset must always be a multiple of 4, we use the
5081 least significant bit to record whether we have
5082 initialized it already.
5083
5084 When doing a dynamic link, we create a .rela.got
5085 relocation entry to initialize the value. This
5086 is done in the finish_dynamic_symbol routine. */
5087 if ((off & 1) != 0)
5088 off &= ~1;
5089 else
5090 {
5091 bfd_put_32 (output_bfd, relocation,
5092 sgot->contents + off);
5093 h->got.offset |= 1;
5094 }
5095 }
5096 }
5097 else
5098 {
5099 bfd_byte *loc;
5100
5101 BFD_ASSERT (local_got_offsets != NULL
5102 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5103
5104 off = local_got_offsets[r_symndx];
5105
5106 /* The offset must always be a multiple of 4. We use
5107 the least significant bit to record whether we have
5108 already processed this entry. */
5109 if ((off & 1) != 0)
5110 off &= ~1;
5111 else
5112 {
5113 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5114
5115 if (bfd_link_pic (info))
5116 {
5117 asection *srelgot;
5118 Elf_Internal_Rela outrel;
5119
5120 /* We need to generate a R_NDS32_RELATIVE reloc
5121 for the dynamic linker. */
5122 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5123 BFD_ASSERT (srelgot != NULL);
5124
5125 outrel.r_offset = (elf_gp (output_bfd)
5126 + sgot->output_offset + off);
5127 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5128 outrel.r_addend = relocation;
5129 loc = srelgot->contents;
5130 loc +=
5131 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5132 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5133 ++srelgot->reloc_count;
5134 }
5135 local_got_offsets[r_symndx] |= 1;
5136 }
5137 }
5138 relocation = sgot->output_section->vma + sgot->output_offset + off
5139 - elf_gp (output_bfd);
5140 }
5141 if (relocation & align)
5142 {
5143 /* Incorrect alignment. */
5144 _bfd_error_handler
5145 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5146 ret = FALSE;
5147 r = bfd_reloc_dangerous;
5148 goto check_reloc;
5149 }
5150 break;
5151
5152 case R_NDS32_SDA16S3_RELA:
5153 case R_NDS32_SDA15S3_RELA:
5154 case R_NDS32_SDA15S3:
5155 align = 0x7;
5156 goto handle_sda;
5157
5158 case R_NDS32_SDA17S2_RELA:
5159 case R_NDS32_SDA15S2_RELA:
5160 case R_NDS32_SDA12S2_SP_RELA:
5161 case R_NDS32_SDA12S2_DP_RELA:
5162 case R_NDS32_SDA15S2:
5163 case R_NDS32_SDA_FP7U2_RELA:
5164 align = 0x3;
5165 goto handle_sda;
5166
5167 case R_NDS32_SDA18S1_RELA:
5168 case R_NDS32_SDA15S1_RELA:
5169 case R_NDS32_SDA15S1:
5170 align = 0x1;
5171 goto handle_sda;
5172
5173 case R_NDS32_SDA19S0_RELA:
5174 case R_NDS32_SDA15S0_RELA:
5175 case R_NDS32_SDA15S0:
5176 {
5177 align = 0x0;
5178 handle_sda:
5179 BFD_ASSERT (sec != NULL);
5180
5181 /* If the symbol is in the abs section, the out_bfd will be null.
5182 This happens when the relocation has a symbol@GOTOFF. */
5183 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5184 if (r != bfd_reloc_ok)
5185 {
5186 _bfd_error_handler
5187 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5188 ret = FALSE;
5189 goto check_reloc;
5190 }
5191
5192 /* At this point `relocation' contains the object's
5193 address. */
5194 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5195 {
5196 relocation -= fpbase_addr;
5197 }
5198 else
5199 relocation -= gp;
5200 /* Now it contains the offset from _SDA_BASE_. */
5201
5202 /* Make sure alignment is correct. */
5203
5204 if (relocation & align)
5205 {
5206 /* Incorrect alignment. */
5207 _bfd_error_handler
5208 (_("%B(%A): warning: unaligned small data access of type %d."),
5209 input_bfd, input_section, r_type);
5210 ret = FALSE;
5211 goto check_reloc;
5212 }
5213 }
5214
5215 break;
5216 case R_NDS32_17IFC_PCREL_RELA:
5217 case R_NDS32_10IFCU_PCREL_RELA:
5218 /* do nothing */
5219 break;
5220
5221 case R_NDS32_TLS_LE_HI20:
5222 case R_NDS32_TLS_LE_LO12:
5223 case R_NDS32_TLS_LE_20:
5224 case R_NDS32_TLS_LE_15S0:
5225 case R_NDS32_TLS_LE_15S1:
5226 case R_NDS32_TLS_LE_15S2:
5227 if (elf_hash_table (info)->tls_sec != NULL)
5228 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5229 break;
5230 case R_NDS32_TLS_IE_HI20:
5231 case R_NDS32_TLS_IE_LO12S2:
5232 {
5233 /* Relocation is to the entry for this symbol in the global
5234 offset table. */
5235 unsigned int tls_type;
5236 asection *srelgot;
5237 Elf_Internal_Rela outrel;
5238 bfd_vma off;
5239 bfd_byte *loc;
5240 int indx = 0;
5241
5242 BFD_ASSERT (sgot != NULL);
5243 if (h != NULL)
5244 {
5245 bfd_boolean dyn;
5246
5247 off = h->got.offset;
5248 BFD_ASSERT (off != (bfd_vma) - 1);
5249 dyn = htab->root.dynamic_sections_created;
5250 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5251 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5252 && (!bfd_link_pic (info)
5253 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5254 indx = h->dynindx;
5255 }
5256 else
5257 {
5258 /* Never happen currently. */
5259 BFD_ASSERT (local_got_offsets != NULL
5260 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5261
5262 off = local_got_offsets[r_symndx];
5263
5264 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5265 }
5266 relocation = sgot->output_section->vma + sgot->output_offset + off;
5267
5268 if (r_type == R_NDS32_TLS_IE_LO12S2)
5269 break;
5270
5271 /* The offset must always be a multiple of 4. We use
5272 the least significant bit to record whether we have
5273 already processed this entry. */
5274 if ((off & 1) != 0)
5275 off &= ~1;
5276 else
5277 {
5278 bfd_boolean need_relocs = FALSE;
5279 srelgot = htab->srelgot;
5280 if ((bfd_link_pic (info) || indx != 0)
5281 && (h == NULL
5282 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5283 || h->root.type != bfd_link_hash_undefweak))
5284 {
5285 need_relocs = TRUE;
5286 BFD_ASSERT (srelgot != NULL);
5287 }
5288 if (tls_type & GOT_TLS_IE)
5289 {
5290 if (need_relocs)
5291 {
5292 if (h->dynindx == 0)
5293 outrel.r_addend = relocation - dtpoff_base (info);
5294 else
5295 outrel.r_addend = 0;
5296 outrel.r_offset = (sgot->output_section->vma
5297 + sgot->output_offset
5298 + off);
5299 outrel.r_info =
5300 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5301
5302 loc = srelgot->contents;
5303 loc +=
5304 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5305 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5306 ++srelgot->reloc_count;
5307 }
5308 else
5309 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5310 sgot->contents + off);
5311 }
5312 }
5313 }
5314 break;
5315
5316 /* DON'T fall through. */
5317
5318 default:
5319 /* OLD_NDS32_RELOC. */
5320
5321 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5322 contents, offset, relocation, addend);
5323 goto check_reloc;
5324 }
5325
5326 switch ((int) r_type)
5327 {
5328 case R_NDS32_20_RELA:
5329 case R_NDS32_5_RELA:
5330 case R_NDS32_9_PCREL_RELA:
5331 case R_NDS32_WORD_9_PCREL_RELA:
5332 case R_NDS32_10_UPCREL_RELA:
5333 case R_NDS32_15_PCREL_RELA:
5334 case R_NDS32_17_PCREL_RELA:
5335 case R_NDS32_25_PCREL_RELA:
5336 case R_NDS32_25_ABS_RELA:
5337 case R_NDS32_HI20_RELA:
5338 case R_NDS32_LO12S3_RELA:
5339 case R_NDS32_LO12S2_RELA:
5340 case R_NDS32_LO12S2_DP_RELA:
5341 case R_NDS32_LO12S2_SP_RELA:
5342 case R_NDS32_LO12S1_RELA:
5343 case R_NDS32_LO12S0_RELA:
5344 case R_NDS32_LO12S0_ORI_RELA:
5345 case R_NDS32_SDA16S3_RELA:
5346 case R_NDS32_SDA17S2_RELA:
5347 case R_NDS32_SDA18S1_RELA:
5348 case R_NDS32_SDA19S0_RELA:
5349 case R_NDS32_SDA15S3_RELA:
5350 case R_NDS32_SDA15S2_RELA:
5351 case R_NDS32_SDA12S2_DP_RELA:
5352 case R_NDS32_SDA12S2_SP_RELA:
5353 case R_NDS32_SDA15S1_RELA:
5354 case R_NDS32_SDA15S0_RELA:
5355 case R_NDS32_SDA_FP7U2_RELA:
5356 case R_NDS32_9_PLTREL:
5357 case R_NDS32_25_PLTREL:
5358 case R_NDS32_GOT20:
5359 case R_NDS32_GOT_HI20:
5360 case R_NDS32_GOT_LO12:
5361 case R_NDS32_GOT_LO15:
5362 case R_NDS32_GOT_LO19:
5363 case R_NDS32_GOT15S2_RELA:
5364 case R_NDS32_GOT17S2_RELA:
5365 case R_NDS32_GOTPC20:
5366 case R_NDS32_GOTPC_HI20:
5367 case R_NDS32_GOTPC_LO12:
5368 case R_NDS32_GOTOFF:
5369 case R_NDS32_GOTOFF_HI20:
5370 case R_NDS32_GOTOFF_LO12:
5371 case R_NDS32_GOTOFF_LO15:
5372 case R_NDS32_GOTOFF_LO19:
5373 case R_NDS32_PLTREL_HI20:
5374 case R_NDS32_PLTREL_LO12:
5375 case R_NDS32_PLT_GOTREL_HI20:
5376 case R_NDS32_PLT_GOTREL_LO12:
5377 case R_NDS32_PLT_GOTREL_LO15:
5378 case R_NDS32_PLT_GOTREL_LO19:
5379 case R_NDS32_PLT_GOTREL_LO20:
5380 case R_NDS32_17IFC_PCREL_RELA:
5381 case R_NDS32_10IFCU_PCREL_RELA:
5382 case R_NDS32_TLS_LE_HI20:
5383 case R_NDS32_TLS_LE_LO12:
5384 case R_NDS32_TLS_IE_HI20:
5385 case R_NDS32_TLS_IE_LO12S2:
5386 case R_NDS32_TLS_LE_20:
5387 case R_NDS32_TLS_LE_15S0:
5388 case R_NDS32_TLS_LE_15S1:
5389 case R_NDS32_TLS_LE_15S2:
5390 /* Instruction related relocs must handle endian properly. */
5391 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
5392 r = nds32_elf_final_link_relocate (howto, input_bfd,
5393 input_section, contents,
5394 rel->r_offset, relocation,
5395 rel->r_addend);
5396 break;
5397
5398 default:
5399 /* All other relocs can use default handler. */
5400 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5401 contents, rel->r_offset,
5402 relocation, rel->r_addend);
5403 break;
5404 }
5405
5406 check_reloc:
5407
5408 if (r != bfd_reloc_ok)
5409 {
5410 /* FIXME: This should be generic enough to go in a utility. */
5411 const char *name;
5412
5413 if (h != NULL)
5414 name = h->root.root.string;
5415 else
5416 {
5417 name = bfd_elf_string_from_elf_section
5418 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5419 if (name == NULL || *name == '\0')
5420 name = bfd_section_name (input_bfd, sec);
5421 }
5422
5423 if (errmsg != NULL)
5424 goto common_error;
5425
5426 switch (r)
5427 {
5428 case bfd_reloc_overflow:
5429 (*info->callbacks->reloc_overflow)
5430 (info, (h ? &h->root : NULL), name, howto->name,
5431 (bfd_vma) 0, input_bfd, input_section, offset);
5432 break;
5433
5434 case bfd_reloc_undefined:
5435 (*info->callbacks->undefined_symbol)
5436 (info, name, input_bfd, input_section, offset, TRUE);
5437 break;
5438
5439 case bfd_reloc_outofrange:
5440 errmsg = _("internal error: out of range error");
5441 goto common_error;
5442
5443 case bfd_reloc_notsupported:
5444 errmsg = _("internal error: unsupported relocation error");
5445 goto common_error;
5446
5447 case bfd_reloc_dangerous:
5448 errmsg = _("internal error: dangerous error");
5449 goto common_error;
5450
5451 default:
5452 errmsg = _("internal error: unknown error");
5453 /* Fall through. */
5454
5455 common_error:
5456 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5457 input_section, offset);
5458 break;
5459 }
5460 }
5461 }
5462
5463 return ret;
5464 }
5465
5466 /* Finish up dynamic symbol handling. We set the contents of various
5467 dynamic sections here. */
5468
5469 static bfd_boolean
5470 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5471 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5472 {
5473 struct elf_nds32_link_hash_table *htab;
5474 bfd_byte *loc;
5475
5476 htab = nds32_elf_hash_table (info);
5477
5478 if (h->plt.offset != (bfd_vma) - 1)
5479 {
5480 asection *splt;
5481 asection *sgot;
5482 asection *srela;
5483
5484 bfd_vma plt_index;
5485 bfd_vma got_offset;
5486 bfd_vma local_plt_offset;
5487 Elf_Internal_Rela rela;
5488
5489 /* This symbol has an entry in the procedure linkage table. Set
5490 it up. */
5491
5492 BFD_ASSERT (h->dynindx != -1);
5493
5494 splt = htab->splt;
5495 sgot = htab->sgotplt;
5496 srela = htab->srelplt;
5497 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5498
5499 /* Get the index in the procedure linkage table which
5500 corresponds to this symbol. This is the index of this symbol
5501 in all the symbols for which we are making plt entries. The
5502 first entry in the procedure linkage table is reserved. */
5503 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5504
5505 /* Get the offset into the .got table of the entry that
5506 corresponds to this function. Each .got entry is 4 bytes.
5507 The first three are reserved. */
5508 got_offset = (plt_index + 3) * 4;
5509
5510 /* Fill in the entry in the procedure linkage table. */
5511 if (!bfd_link_pic (info))
5512 {
5513 unsigned long insn;
5514
5515 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5516 + sgot->output_offset + got_offset) >> 12)
5517 & 0xfffff);
5518 bfd_putb32 (insn, splt->contents + h->plt.offset);
5519
5520 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5521 + sgot->output_offset + got_offset) & 0x0fff)
5522 >> 2);
5523 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5524
5525 insn = PLT_ENTRY_WORD2;
5526 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5527
5528 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5529 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5530
5531 insn = PLT_ENTRY_WORD4
5532 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5533 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5534 local_plt_offset = 12;
5535 }
5536 else
5537 {
5538 /* sda_base must be set at this time. */
5539 unsigned long insn;
5540 long offset;
5541
5542 /* FIXME, sda_base is 65536, it will damage opcode. */
5543 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5544 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5545 - elf_gp (output_bfd);
5546 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5547 bfd_putb32 (insn, splt->contents + h->plt.offset);
5548
5549 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5550 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5551
5552 insn = PLT_PIC_ENTRY_WORD2;
5553 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5554
5555 insn = PLT_PIC_ENTRY_WORD3;
5556 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5557
5558 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5559 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5560
5561 insn = PLT_PIC_ENTRY_WORD5
5562 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5563 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5564
5565 local_plt_offset = 16;
5566 }
5567
5568 /* Fill in the entry in the global offset table,
5569 so it will fall through to the next instruction for the first time. */
5570 bfd_put_32 (output_bfd,
5571 (splt->output_section->vma + splt->output_offset
5572 + h->plt.offset + local_plt_offset),
5573 sgot->contents + got_offset);
5574
5575 /* Fill in the entry in the .rela.plt section. */
5576 rela.r_offset = (sgot->output_section->vma
5577 + sgot->output_offset + got_offset);
5578 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5579 rela.r_addend = 0;
5580 loc = srela->contents;
5581 loc += plt_index * sizeof (Elf32_External_Rela);
5582 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5583
5584 if (!h->def_regular)
5585 {
5586 /* Mark the symbol as undefined, rather than as defined in
5587 the .plt section. Leave the value alone. */
5588 sym->st_shndx = SHN_UNDEF;
5589 if (!h->ref_regular_nonweak)
5590 sym->st_value = 0;
5591 }
5592 }
5593
5594 if (h->got.offset != (bfd_vma) - 1)
5595 {
5596 asection *sgot;
5597 asection *srela;
5598 Elf_Internal_Rela rela;
5599
5600 /* This symbol has an entry in the global offset table.
5601 Set it up. */
5602
5603 sgot = htab->sgot;
5604 srela = htab->srelgot;
5605 BFD_ASSERT (sgot != NULL && srela != NULL);
5606
5607 rela.r_offset = (sgot->output_section->vma
5608 + sgot->output_offset + (h->got.offset & ~1));
5609
5610 /* If this is a -Bsymbolic link, and the symbol is defined
5611 locally, we just want to emit a RELATIVE reloc. Likewise if
5612 the symbol was forced to be local because of a version file.
5613 The entry in the global offset table will already have been
5614 initialized in the relocate_section function. */
5615 if (bfd_link_pic (info)
5616 && (info->symbolic
5617 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5618 {
5619 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5620 rela.r_addend = (h->root.u.def.value
5621 + h->root.u.def.section->output_section->vma
5622 + h->root.u.def.section->output_offset);
5623 }
5624 else
5625 {
5626 BFD_ASSERT ((h->got.offset & 1) == 0);
5627 bfd_put_32 (output_bfd, (bfd_vma) 0,
5628 sgot->contents + h->got.offset);
5629 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5630 rela.r_addend = 0;
5631 }
5632
5633 loc = srela->contents;
5634 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5635 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5636 ++srela->reloc_count;
5637 }
5638
5639 if (h->needs_copy)
5640 {
5641 asection *s;
5642 Elf_Internal_Rela rela;
5643
5644 /* This symbols needs a copy reloc. Set it up. */
5645
5646 BFD_ASSERT (h->dynindx != -1
5647 && (h->root.type == bfd_link_hash_defined
5648 || h->root.type == bfd_link_hash_defweak));
5649
5650 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5651 BFD_ASSERT (s != NULL);
5652
5653 rela.r_offset = (h->root.u.def.value
5654 + h->root.u.def.section->output_section->vma
5655 + h->root.u.def.section->output_offset);
5656 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5657 rela.r_addend = 0;
5658 loc = s->contents;
5659 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5660 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5661 ++s->reloc_count;
5662 }
5663
5664 /* Mark some specially defined symbols as absolute. */
5665 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5666 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5667 sym->st_shndx = SHN_ABS;
5668
5669 return TRUE;
5670 }
5671
5672
5673 /* Finish up the dynamic sections. */
5674
5675 static bfd_boolean
5676 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5677 {
5678 struct elf_nds32_link_hash_table *htab;
5679 bfd *dynobj;
5680 asection *sdyn;
5681 asection *sgot;
5682
5683 htab = nds32_elf_hash_table (info);
5684 dynobj = htab->root.dynobj;
5685
5686 sgot = htab->sgotplt;
5687 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5688
5689 if (htab->root.dynamic_sections_created)
5690 {
5691 asection *splt;
5692 Elf32_External_Dyn *dyncon, *dynconend;
5693
5694 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5695
5696 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5697 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5698
5699 for (; dyncon < dynconend; dyncon++)
5700 {
5701 Elf_Internal_Dyn dyn;
5702 asection *s;
5703
5704 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5705
5706 switch (dyn.d_tag)
5707 {
5708 default:
5709 break;
5710
5711 case DT_PLTGOT:
5712 s = htab->sgotplt;
5713 goto get_vma;
5714 case DT_JMPREL:
5715 s = htab->srelplt;
5716 get_vma:
5717 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
5718 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5719 break;
5720
5721 case DT_PLTRELSZ:
5722 s = htab->srelplt;
5723 dyn.d_un.d_val = s->size;
5724 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5725 break;
5726
5727 case DT_RELASZ:
5728 /* My reading of the SVR4 ABI indicates that the
5729 procedure linkage table relocs (DT_JMPREL) should be
5730 included in the overall relocs (DT_RELA). This is
5731 what Solaris does. However, UnixWare can not handle
5732 that case. Therefore, we override the DT_RELASZ entry
5733 here to make it not include the JMPREL relocs. Since
5734 the linker script arranges for .rela.plt to follow all
5735 other relocation sections, we don't have to worry
5736 about changing the DT_RELA entry. */
5737 if (htab->srelplt != NULL)
5738 {
5739 s = htab->srelplt;
5740 dyn.d_un.d_val -= s->size;
5741 }
5742 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5743 break;
5744 }
5745 }
5746
5747 /* Fill in the first entry in the procedure linkage table. */
5748 splt = htab->splt;
5749 if (splt && splt->size > 0)
5750 {
5751 if (bfd_link_pic (info))
5752 {
5753 unsigned long insn;
5754 long offset;
5755
5756 /* FIXME, sda_base is 65536, it will damage opcode. */
5757 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5758 offset = sgot->output_section->vma + sgot->output_offset + 4
5759 - elf_gp (output_bfd);
5760 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5761 bfd_putb32 (insn, splt->contents);
5762
5763 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5764 /* here has a typo? */
5765 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5766 bfd_putb32 (insn, splt->contents + 4);
5767
5768 insn = PLT0_PIC_ENTRY_WORD2;
5769 bfd_putb32 (insn, splt->contents + 8);
5770
5771 insn = PLT0_PIC_ENTRY_WORD3;
5772 bfd_putb32 (insn, splt->contents + 12);
5773
5774 insn = PLT0_PIC_ENTRY_WORD4;
5775 bfd_putb32 (insn, splt->contents + 16);
5776
5777 insn = PLT0_PIC_ENTRY_WORD5;
5778 bfd_putb32 (insn, splt->contents + 20);
5779 }
5780 else
5781 {
5782 unsigned long insn;
5783 unsigned long addr;
5784
5785 /* addr = .got + 4 */
5786 addr = sgot->output_section->vma + sgot->output_offset + 4;
5787 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5788 bfd_putb32 (insn, splt->contents);
5789
5790 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5791 bfd_putb32 (insn, splt->contents + 4);
5792
5793 insn = PLT0_ENTRY_WORD2;
5794 bfd_putb32 (insn, splt->contents + 8);
5795
5796 insn = PLT0_ENTRY_WORD3;
5797 bfd_putb32 (insn, splt->contents + 12);
5798
5799 insn = PLT0_ENTRY_WORD4;
5800 bfd_putb32 (insn, splt->contents + 16);
5801 }
5802
5803 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5804 PLT_ENTRY_SIZE;
5805 }
5806 }
5807
5808 /* Fill in the first three entries in the global offset table. */
5809 if (sgot && sgot->size > 0)
5810 {
5811 if (sdyn == NULL)
5812 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5813 else
5814 bfd_put_32 (output_bfd,
5815 sdyn->output_section->vma + sdyn->output_offset,
5816 sgot->contents);
5817 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5818 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5819
5820 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5821 }
5822
5823 return TRUE;
5824 }
5825 \f
5826
5827 /* Set the right machine number. */
5828
5829 static bfd_boolean
5830 nds32_elf_object_p (bfd *abfd)
5831 {
5832 static unsigned int cur_arch = 0;
5833
5834 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5835 {
5836 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5837 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5838 }
5839
5840 switch (cur_arch)
5841 {
5842 default:
5843 case E_N1_ARCH:
5844 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5845 break;
5846 case E_N1H_ARCH:
5847 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5848 break;
5849 case E_NDS_ARCH_STAR_V2_0:
5850 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5851 break;
5852 case E_NDS_ARCH_STAR_V3_0:
5853 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5854 break;
5855 case E_NDS_ARCH_STAR_V3_M:
5856 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5857 break;
5858 }
5859
5860 return TRUE;
5861 }
5862
5863 /* Store the machine number in the flags field. */
5864
5865 static void
5866 nds32_elf_final_write_processing (bfd *abfd,
5867 bfd_boolean linker ATTRIBUTE_UNUSED)
5868 {
5869 unsigned long val;
5870 static unsigned int cur_mach = 0;
5871
5872 if (bfd_mach_n1 != bfd_get_mach (abfd))
5873 {
5874 cur_mach = bfd_get_mach (abfd);
5875 }
5876
5877 switch (cur_mach)
5878 {
5879 case bfd_mach_n1:
5880 /* Only happen when object is empty, since the case is abandon. */
5881 val = E_N1_ARCH;
5882 val |= E_NDS_ABI_AABI;
5883 val |= E_NDS32_ELF_VER_1_4;
5884 break;
5885 case bfd_mach_n1h:
5886 val = E_N1H_ARCH;
5887 break;
5888 case bfd_mach_n1h_v2:
5889 val = E_NDS_ARCH_STAR_V2_0;
5890 break;
5891 case bfd_mach_n1h_v3:
5892 val = E_NDS_ARCH_STAR_V3_0;
5893 break;
5894 case bfd_mach_n1h_v3m:
5895 val = E_NDS_ARCH_STAR_V3_M;
5896 break;
5897 default:
5898 val = 0;
5899 break;
5900 }
5901
5902 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5903 elf_elfheader (abfd)->e_flags |= val;
5904 }
5905
5906 /* Function to keep NDS32 specific file flags. */
5907
5908 static bfd_boolean
5909 nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5910 {
5911 BFD_ASSERT (!elf_flags_init (abfd)
5912 || elf_elfheader (abfd)->e_flags == flags);
5913
5914 elf_elfheader (abfd)->e_flags = flags;
5915 elf_flags_init (abfd) = TRUE;
5916 return TRUE;
5917 }
5918
5919 static unsigned int
5920 convert_e_flags (unsigned int e_flags, unsigned int arch)
5921 {
5922 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5923 {
5924 /* From 0.9 to 1.0. */
5925 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5926
5927 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5928 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5929 if (arch == E_NDS_ARCH_STAR_V1_0)
5930 {
5931 /* Done. */
5932 return e_flags;
5933 }
5934 }
5935
5936 /* From 1.0 to 2.0. */
5937 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5938
5939 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5940 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5941
5942 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5943 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5944 return e_flags;
5945 }
5946
5947 static bfd_boolean
5948 nds32_check_vec_size (bfd *ibfd)
5949 {
5950 static unsigned int nds32_vec_size = 0;
5951
5952 asection *sec_t = NULL;
5953 bfd_byte *contents = NULL;
5954
5955 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5956
5957 if (sec_t && sec_t->size >= 4)
5958 {
5959 /* Get vec_size in file. */
5960 unsigned int flag_t;
5961
5962 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
5963 flag_t = bfd_get_32 (ibfd, contents);
5964
5965 /* The value could only be 4 or 16. */
5966
5967 if (!nds32_vec_size)
5968 /* Set if not set yet. */
5969 nds32_vec_size = (flag_t & 0x3);
5970 else if (nds32_vec_size != (flag_t & 0x3))
5971 {
5972 _bfd_error_handler
5973 (_("%B: ISR vector size mismatch"
5974 " with previous modules, previous %u-byte, current %u-byte"),
5975 ibfd,
5976 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5977 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5978 return FALSE;
5979 }
5980 else
5981 /* Only keep the first vec_size section. */
5982 sec_t->flags |= SEC_EXCLUDE;
5983 }
5984
5985 return TRUE;
5986 }
5987
5988 /* Merge backend specific data from an object file to the output
5989 object file when linking. */
5990
5991 static bfd_boolean
5992 nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
5993 {
5994 bfd *obfd = info->output_bfd;
5995 flagword out_flags;
5996 flagword in_flags;
5997 flagword out_16regs;
5998 flagword in_no_mac;
5999 flagword out_no_mac;
6000 flagword in_16regs;
6001 flagword out_version;
6002 flagword in_version;
6003 flagword out_fpu_config;
6004 flagword in_fpu_config;
6005
6006 /* TODO: Revise to use object-attributes instead. */
6007 if (!nds32_check_vec_size (ibfd))
6008 return FALSE;
6009
6010 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6011 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6012 return TRUE;
6013
6014 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6015 {
6016 _bfd_error_handler
6017 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6018
6019 bfd_set_error (bfd_error_bad_value);
6020 return FALSE;
6021 }
6022
6023 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6024 if (in_version == E_NDS32_ELF_VER_1_2)
6025 {
6026 _bfd_error_handler
6027 (_("%B: warning: Older version of object file encountered, "
6028 "Please recompile with current tool chain."), ibfd);
6029 }
6030
6031 /* We may need to merge V1 and V2 arch object files to V2. */
6032 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6033 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6034 {
6035 /* Need to convert version. */
6036 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6037 == E_NDS_ARCH_STAR_RESERVED)
6038 {
6039 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6040 }
6041 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6042 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6043 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6044 {
6045 elf_elfheader (obfd)->e_flags =
6046 convert_e_flags (elf_elfheader (obfd)->e_flags,
6047 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6048 }
6049 else
6050 {
6051 elf_elfheader (ibfd)->e_flags =
6052 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6053 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6054 }
6055 }
6056
6057 /* Extract some flags. */
6058 in_flags = elf_elfheader (ibfd)->e_flags
6059 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6060 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6061
6062 /* The following flags need special treatment. */
6063 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6064 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6065 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6066
6067 /* Extract some flags. */
6068 out_flags = elf_elfheader (obfd)->e_flags
6069 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6070 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6071
6072 /* The following flags need special treatment. */
6073 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6074 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6075 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6076 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6077 if (!elf_flags_init (obfd))
6078 {
6079 /* If the input is the default architecture then do not
6080 bother setting the flags for the output architecture,
6081 instead allow future merges to do this. If no future
6082 merges ever set these flags then they will retain their
6083 unitialised values, which surprise surprise, correspond
6084 to the default values. */
6085 if (bfd_get_arch_info (ibfd)->the_default)
6086 return TRUE;
6087
6088 elf_flags_init (obfd) = TRUE;
6089 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6090
6091 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6092 && bfd_get_arch_info (obfd)->the_default)
6093 {
6094 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6095 bfd_get_mach (ibfd));
6096 }
6097
6098 return TRUE;
6099 }
6100
6101 /* Check flag compatibility. */
6102 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6103 {
6104 _bfd_error_handler
6105 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6106
6107 bfd_set_error (bfd_error_bad_value);
6108 return FALSE;
6109 }
6110
6111 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6112 {
6113 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6114 {
6115 _bfd_error_handler
6116 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6117
6118 bfd_set_error (bfd_error_bad_value);
6119 return FALSE;
6120 }
6121 }
6122
6123 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6124 and perf ext1 and DIV are mergerd to perf ext1. */
6125 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6126 {
6127 elf_elfheader (obfd)->e_flags =
6128 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6129 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6130 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6131 ? E_NDS32_HAS_EXT_INST : 0)
6132 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6133 ? E_NDS32_HAS_EXT_INST : 0)
6134 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6135 | ((in_version > out_version) ? out_version : in_version);
6136 }
6137 else
6138 {
6139 if (in_version != out_version)
6140 _bfd_error_handler
6141 (_("%B: warning: Incompatible elf-versions %s and %s."),
6142 ibfd, nds32_elfver_strtab[out_version],
6143 nds32_elfver_strtab[in_version]);
6144
6145 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6146 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6147 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6148 | (in_version > out_version ? out_version : in_version);
6149 }
6150
6151 return TRUE;
6152 }
6153
6154 /* Display the flags field. */
6155
6156 static bfd_boolean
6157 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6158 {
6159 FILE *file = (FILE *) ptr;
6160
6161 BFD_ASSERT (abfd != NULL && ptr != NULL);
6162
6163 _bfd_elf_print_private_bfd_data (abfd, ptr);
6164
6165 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6166
6167 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6168 {
6169 default:
6170 case E_N1_ARCH:
6171 fprintf (file, _(": n1 instructions"));
6172 break;
6173 case E_N1H_ARCH:
6174 fprintf (file, _(": n1h instructions"));
6175 break;
6176 }
6177
6178 fputc ('\n', file);
6179
6180 return TRUE;
6181 }
6182
6183 static unsigned int
6184 nds32_elf_action_discarded (asection *sec)
6185 {
6186
6187 if (strncmp
6188 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6189 return 0;
6190
6191 return _bfd_elf_default_action_discarded (sec);
6192 }
6193
6194 static asection *
6195 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6196 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6197 Elf_Internal_Sym *sym)
6198 {
6199 if (h != NULL)
6200 switch (ELF32_R_TYPE (rel->r_info))
6201 {
6202 case R_NDS32_GNU_VTINHERIT:
6203 case R_NDS32_GNU_VTENTRY:
6204 case R_NDS32_RELA_GNU_VTINHERIT:
6205 case R_NDS32_RELA_GNU_VTENTRY:
6206 return NULL;
6207 }
6208
6209 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6210 }
6211
6212 static bfd_boolean
6213 nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6214 const Elf_Internal_Rela *relocs)
6215 {
6216 /* Update the got entry reference counts for the section being removed. */
6217 Elf_Internal_Shdr *symtab_hdr;
6218 struct elf_link_hash_entry **sym_hashes;
6219 bfd_signed_vma *local_got_refcounts;
6220 const Elf_Internal_Rela *rel, *relend;
6221
6222 elf_section_data (sec)->local_dynrel = NULL;
6223
6224 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6225 sym_hashes = elf_sym_hashes (abfd);
6226 local_got_refcounts = elf_local_got_refcounts (abfd);
6227
6228 relend = relocs + sec->reloc_count;
6229 for (rel = relocs; rel < relend; rel++)
6230 {
6231 unsigned long r_symndx;
6232 struct elf_link_hash_entry *h = NULL;
6233
6234 r_symndx = ELF32_R_SYM (rel->r_info);
6235 if (r_symndx >= symtab_hdr->sh_info)
6236 {
6237 /* External symbol. */
6238 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6239 while (h->root.type == bfd_link_hash_indirect
6240 || h->root.type == bfd_link_hash_warning)
6241 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6242 }
6243
6244 switch (ELF32_R_TYPE (rel->r_info))
6245 {
6246 case R_NDS32_GOT_HI20:
6247 case R_NDS32_GOT_LO12:
6248 case R_NDS32_GOT_LO15:
6249 case R_NDS32_GOT_LO19:
6250 case R_NDS32_GOT17S2_RELA:
6251 case R_NDS32_GOT15S2_RELA:
6252 case R_NDS32_GOTOFF:
6253 case R_NDS32_GOTOFF_HI20:
6254 case R_NDS32_GOTOFF_LO12:
6255 case R_NDS32_GOTOFF_LO15:
6256 case R_NDS32_GOTOFF_LO19:
6257 case R_NDS32_GOT20:
6258 case R_NDS32_GOTPC_HI20:
6259 case R_NDS32_GOTPC_LO12:
6260 case R_NDS32_GOTPC20:
6261 if (h != NULL)
6262 {
6263 if (h->got.refcount > 0)
6264 h->got.refcount--;
6265 }
6266 else
6267 {
6268 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6269 local_got_refcounts[r_symndx]--;
6270 }
6271 break;
6272
6273 case R_NDS32_16_RELA:
6274 case R_NDS32_20_RELA:
6275 case R_NDS32_5_RELA:
6276 case R_NDS32_32_RELA:
6277 case R_NDS32_HI20_RELA:
6278 case R_NDS32_LO12S3_RELA:
6279 case R_NDS32_LO12S2_RELA:
6280 case R_NDS32_LO12S2_DP_RELA:
6281 case R_NDS32_LO12S2_SP_RELA:
6282 case R_NDS32_LO12S1_RELA:
6283 case R_NDS32_LO12S0_RELA:
6284 case R_NDS32_LO12S0_ORI_RELA:
6285 case R_NDS32_SDA16S3_RELA:
6286 case R_NDS32_SDA17S2_RELA:
6287 case R_NDS32_SDA18S1_RELA:
6288 case R_NDS32_SDA19S0_RELA:
6289 case R_NDS32_SDA15S3_RELA:
6290 case R_NDS32_SDA15S2_RELA:
6291 case R_NDS32_SDA12S2_DP_RELA:
6292 case R_NDS32_SDA12S2_SP_RELA:
6293 case R_NDS32_SDA15S1_RELA:
6294 case R_NDS32_SDA15S0_RELA:
6295 case R_NDS32_SDA_FP7U2_RELA:
6296 case R_NDS32_15_PCREL_RELA:
6297 case R_NDS32_17_PCREL_RELA:
6298 case R_NDS32_25_PCREL_RELA:
6299 if (h != NULL)
6300 {
6301 struct elf_nds32_link_hash_entry *eh;
6302 struct elf_nds32_dyn_relocs **pp;
6303 struct elf_nds32_dyn_relocs *p;
6304
6305 if (!bfd_link_pic (info) && h->plt.refcount > 0)
6306 h->plt.refcount -= 1;
6307
6308 eh = (struct elf_nds32_link_hash_entry *) h;
6309
6310 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6311 if (p->sec == sec)
6312 {
6313 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6314 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6315 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6316 p->pc_count -= 1;
6317 p->count -= 1;
6318 if (p->count == 0)
6319 *pp = p->next;
6320 break;
6321 }
6322 }
6323 break;
6324
6325 case R_NDS32_9_PLTREL:
6326 case R_NDS32_25_PLTREL:
6327 if (h != NULL)
6328 {
6329 if (h->plt.refcount > 0)
6330 h->plt.refcount--;
6331 }
6332 break;
6333
6334 default:
6335 break;
6336 }
6337 }
6338
6339 return TRUE;
6340 }
6341
6342 /* Look through the relocs for a section during the first phase.
6343 Since we don't do .gots or .plts, we just need to consider the
6344 virtual table relocs for gc. */
6345
6346 static bfd_boolean
6347 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6348 asection *sec, const Elf_Internal_Rela *relocs)
6349 {
6350 Elf_Internal_Shdr *symtab_hdr;
6351 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6352 const Elf_Internal_Rela *rel;
6353 const Elf_Internal_Rela *rel_end;
6354 struct elf_nds32_link_hash_table *htab;
6355 bfd *dynobj;
6356 asection *sreloc = NULL;
6357
6358 if (bfd_link_relocatable (info))
6359 return TRUE;
6360
6361 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6362 sym_hashes = elf_sym_hashes (abfd);
6363 sym_hashes_end =
6364 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6365 if (!elf_bad_symtab (abfd))
6366 sym_hashes_end -= symtab_hdr->sh_info;
6367
6368 htab = nds32_elf_hash_table (info);
6369 dynobj = htab->root.dynobj;
6370
6371 rel_end = relocs + sec->reloc_count;
6372 for (rel = relocs; rel < rel_end; rel++)
6373 {
6374 enum elf_nds32_reloc_type r_type;
6375 struct elf_link_hash_entry *h;
6376 unsigned long r_symndx;
6377 int tls_type, old_tls_type;
6378
6379 r_symndx = ELF32_R_SYM (rel->r_info);
6380 r_type = ELF32_R_TYPE (rel->r_info);
6381 if (r_symndx < symtab_hdr->sh_info)
6382 h = NULL;
6383 else
6384 {
6385 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6386 while (h->root.type == bfd_link_hash_indirect
6387 || h->root.type == bfd_link_hash_warning)
6388 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6389 }
6390
6391 /* Some relocs require a global offset table. We create
6392 got section here, since these relocation need got section
6393 and it is not created yet. */
6394 if (htab->sgot == NULL)
6395 {
6396 switch (r_type)
6397 {
6398 case R_NDS32_GOT_HI20:
6399 case R_NDS32_GOT_LO12:
6400 case R_NDS32_GOT_LO15:
6401 case R_NDS32_GOT_LO19:
6402 case R_NDS32_GOT17S2_RELA:
6403 case R_NDS32_GOT15S2_RELA:
6404 case R_NDS32_GOTOFF:
6405 case R_NDS32_GOTOFF_HI20:
6406 case R_NDS32_GOTOFF_LO12:
6407 case R_NDS32_GOTOFF_LO15:
6408 case R_NDS32_GOTOFF_LO19:
6409 case R_NDS32_GOTPC20:
6410 case R_NDS32_GOTPC_HI20:
6411 case R_NDS32_GOTPC_LO12:
6412 case R_NDS32_GOT20:
6413 case R_NDS32_TLS_IE_HI20:
6414 case R_NDS32_TLS_IE_LO12S2:
6415 if (dynobj == NULL)
6416 htab->root.dynobj = dynobj = abfd;
6417 if (!create_got_section (dynobj, info))
6418 return FALSE;
6419 break;
6420
6421 default:
6422 break;
6423 }
6424 }
6425
6426 switch ((int) r_type)
6427 {
6428 case R_NDS32_GOT_HI20:
6429 case R_NDS32_GOT_LO12:
6430 case R_NDS32_GOT_LO15:
6431 case R_NDS32_GOT_LO19:
6432 case R_NDS32_GOT20:
6433 case R_NDS32_TLS_IE_HI20:
6434 case R_NDS32_TLS_IE_LO12S2:
6435 switch (r_type)
6436 {
6437 case R_NDS32_TLS_IE_HI20:
6438 case R_NDS32_TLS_IE_LO12S2:
6439 tls_type = GOT_TLS_IE;
6440 break;
6441 default:
6442 tls_type = GOT_NORMAL;
6443 break;
6444 }
6445 if (h != NULL)
6446 {
6447 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6448 h->got.refcount += 1;
6449 }
6450 else
6451 {
6452 bfd_signed_vma *local_got_refcounts;
6453
6454 /* This is a global offset table entry for a local
6455 symbol. */
6456 local_got_refcounts = elf_local_got_refcounts (abfd);
6457 if (local_got_refcounts == NULL)
6458 {
6459 bfd_size_type size;
6460
6461 size = symtab_hdr->sh_info;
6462 size *= sizeof (bfd_signed_vma);
6463 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6464 if (local_got_refcounts == NULL)
6465 return FALSE;
6466 elf_local_got_refcounts (abfd) = local_got_refcounts;
6467 }
6468 local_got_refcounts[r_symndx] += 1;
6469 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
6470 }
6471
6472 /* We will already have issued an error message if there
6473 is a TLS/non-TLS mismatch, based on the symbol
6474 type. So just combine any TLS types needed. */
6475 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6476 && tls_type != GOT_NORMAL)
6477 tls_type |= old_tls_type;
6478
6479 if (old_tls_type != tls_type)
6480 {
6481 if (h != NULL)
6482 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6483 else
6484 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6485 }
6486 break;
6487 case R_NDS32_9_PLTREL:
6488 case R_NDS32_25_PLTREL:
6489 case R_NDS32_PLTREL_HI20:
6490 case R_NDS32_PLTREL_LO12:
6491 case R_NDS32_PLT_GOTREL_HI20:
6492 case R_NDS32_PLT_GOTREL_LO12:
6493 case R_NDS32_PLT_GOTREL_LO15:
6494 case R_NDS32_PLT_GOTREL_LO19:
6495 case R_NDS32_PLT_GOTREL_LO20:
6496
6497 /* This symbol requires a procedure linkage table entry. We
6498 actually build the entry in adjust_dynamic_symbol,
6499 because this might be a case of linking PIC code without
6500 linking in any dynamic objects, in which case we don't
6501 need to generate a procedure linkage table after all. */
6502
6503 /* If this is a local symbol, we resolve it directly without
6504 creating a procedure linkage table entry. */
6505 if (h == NULL)
6506 continue;
6507
6508 if (h->forced_local)
6509 break;
6510
6511 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
6512 h->needs_plt = 1;
6513 h->plt.refcount += 1;
6514 break;
6515
6516 case R_NDS32_16_RELA:
6517 case R_NDS32_20_RELA:
6518 case R_NDS32_5_RELA:
6519 case R_NDS32_32_RELA:
6520 case R_NDS32_HI20_RELA:
6521 case R_NDS32_LO12S3_RELA:
6522 case R_NDS32_LO12S2_RELA:
6523 case R_NDS32_LO12S2_DP_RELA:
6524 case R_NDS32_LO12S2_SP_RELA:
6525 case R_NDS32_LO12S1_RELA:
6526 case R_NDS32_LO12S0_RELA:
6527 case R_NDS32_LO12S0_ORI_RELA:
6528 case R_NDS32_SDA16S3_RELA:
6529 case R_NDS32_SDA17S2_RELA:
6530 case R_NDS32_SDA18S1_RELA:
6531 case R_NDS32_SDA19S0_RELA:
6532 case R_NDS32_SDA15S3_RELA:
6533 case R_NDS32_SDA15S2_RELA:
6534 case R_NDS32_SDA12S2_DP_RELA:
6535 case R_NDS32_SDA12S2_SP_RELA:
6536 case R_NDS32_SDA15S1_RELA:
6537 case R_NDS32_SDA15S0_RELA:
6538 case R_NDS32_SDA_FP7U2_RELA:
6539 case R_NDS32_15_PCREL_RELA:
6540 case R_NDS32_17_PCREL_RELA:
6541 case R_NDS32_25_PCREL_RELA:
6542
6543 if (h != NULL && !bfd_link_pic (info))
6544 {
6545 h->non_got_ref = 1;
6546 h->plt.refcount += 1;
6547 }
6548
6549 /* If we are creating a shared library, and this is a reloc against
6550 a global symbol, or a non PC relative reloc against a local
6551 symbol, then we need to copy the reloc into the shared library.
6552 However, if we are linking with -Bsymbolic, we do not need to
6553 copy a reloc against a global symbol which is defined in an
6554 object we are including in the link (i.e., DEF_REGULAR is set).
6555 At this point we have not seen all the input files, so it is
6556 possible that DEF_REGULAR is not set now but will be set later
6557 (it is never cleared). We account for that possibility below by
6558 storing information in the dyn_relocs field of the hash table
6559 entry. A similar situation occurs when creating shared libraries
6560 and symbol visibility changes render the symbol local.
6561
6562 If on the other hand, we are creating an executable, we may need
6563 to keep relocations for symbols satisfied by a dynamic library
6564 if we manage to avoid copy relocs for the symbol. */
6565 if ((bfd_link_pic (info)
6566 && (sec->flags & SEC_ALLOC) != 0
6567 && ((r_type != R_NDS32_25_PCREL_RELA
6568 && r_type != R_NDS32_15_PCREL_RELA
6569 && r_type != R_NDS32_17_PCREL_RELA
6570 && !(r_type == R_NDS32_32_RELA
6571 && strcmp (sec->name, ".eh_frame") == 0))
6572 || (h != NULL
6573 && (!info->symbolic
6574 || h->root.type == bfd_link_hash_defweak
6575 || !h->def_regular))))
6576 || (!bfd_link_pic (info)
6577 && (sec->flags & SEC_ALLOC) != 0
6578 && h != NULL
6579 && (h->root.type == bfd_link_hash_defweak
6580 || !h->def_regular)))
6581 {
6582 struct elf_nds32_dyn_relocs *p;
6583 struct elf_nds32_dyn_relocs **head;
6584
6585 if (dynobj == NULL)
6586 htab->root.dynobj = dynobj = abfd;
6587
6588 /* When creating a shared object, we must copy these
6589 relocs into the output file. We create a reloc
6590 section in dynobj and make room for the reloc. */
6591 if (sreloc == NULL)
6592 {
6593 const char *name;
6594
6595 name = bfd_elf_string_from_elf_section
6596 (abfd, elf_elfheader (abfd)->e_shstrndx,
6597 elf_section_data (sec)->rela.hdr->sh_name);
6598 if (name == NULL)
6599 return FALSE;
6600
6601 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6602 && strcmp (bfd_get_section_name (abfd, sec),
6603 name + 5) == 0);
6604
6605 sreloc = bfd_get_section_by_name (dynobj, name);
6606 if (sreloc == NULL)
6607 {
6608 flagword flags;
6609
6610 sreloc = bfd_make_section (dynobj, name);
6611 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6612 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6613 if ((sec->flags & SEC_ALLOC) != 0)
6614 flags |= SEC_ALLOC | SEC_LOAD;
6615 if (sreloc == NULL
6616 || !bfd_set_section_flags (dynobj, sreloc, flags)
6617 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6618 return FALSE;
6619
6620 elf_section_type (sreloc) = SHT_RELA;
6621 }
6622 elf_section_data (sec)->sreloc = sreloc;
6623 }
6624
6625 /* If this is a global symbol, we count the number of
6626 relocations we need for this symbol. */
6627 if (h != NULL)
6628 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6629 else
6630 {
6631 asection *s;
6632
6633 Elf_Internal_Sym *isym;
6634 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6635 if (isym == NULL)
6636 return FALSE;
6637
6638 /* Track dynamic relocs needed for local syms too. */
6639 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6640 if (s == NULL)
6641 return FALSE;
6642
6643 head = ((struct elf_nds32_dyn_relocs **)
6644 &elf_section_data (s)->local_dynrel);
6645 }
6646
6647 p = *head;
6648 if (p == NULL || p->sec != sec)
6649 {
6650 bfd_size_type amt = sizeof (*p);
6651 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6652 if (p == NULL)
6653 return FALSE;
6654 p->next = *head;
6655 *head = p;
6656 p->sec = sec;
6657 p->count = 0;
6658 p->pc_count = 0;
6659 }
6660
6661 p->count += 1;
6662 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6663 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6664 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6665 p->pc_count += 1;
6666 }
6667 break;
6668
6669 /* This relocation describes the C++ object vtable hierarchy.
6670 Reconstruct it for later use during GC. */
6671 case R_NDS32_RELA_GNU_VTINHERIT:
6672 case R_NDS32_GNU_VTINHERIT:
6673 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6674 return FALSE;
6675 break;
6676
6677 /* This relocation describes which C++ vtable entries are actually
6678 used. Record for later use during GC. */
6679 case R_NDS32_GNU_VTENTRY:
6680 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6681 return FALSE;
6682 break;
6683 case R_NDS32_RELA_GNU_VTENTRY:
6684 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6685 return FALSE;
6686 break;
6687 }
6688 }
6689
6690 return TRUE;
6691 }
6692
6693 /* Write VAL in uleb128 format to P, returning a pointer to the
6694 following byte.
6695 This code is copied from elf-attr.c. */
6696
6697 static bfd_byte *
6698 write_uleb128 (bfd_byte *p, unsigned int val)
6699 {
6700 bfd_byte c;
6701 do
6702 {
6703 c = val & 0x7f;
6704 val >>= 7;
6705 if (val)
6706 c |= 0x80;
6707 *(p++) = c;
6708 }
6709 while (val);
6710 return p;
6711 }
6712
6713 static bfd_signed_vma
6714 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6715 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6716 int *pic_ext_target)
6717 {
6718 bfd_signed_vma foff;
6719 bfd_vma symval, addend;
6720 asection *sym_sec;
6721
6722 /* Get the value of the symbol referred to by the reloc. */
6723 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6724 {
6725 Elf_Internal_Sym *isym;
6726
6727 /* A local symbol. */
6728 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6729
6730 if (isym->st_shndx == SHN_UNDEF)
6731 sym_sec = bfd_und_section_ptr;
6732 else if (isym->st_shndx == SHN_ABS)
6733 sym_sec = bfd_abs_section_ptr;
6734 else if (isym->st_shndx == SHN_COMMON)
6735 sym_sec = bfd_com_section_ptr;
6736 else
6737 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6738 symval = isym->st_value + sym_sec->output_section->vma
6739 + sym_sec->output_offset;
6740 }
6741 else
6742 {
6743 unsigned long indx;
6744 struct elf_link_hash_entry *h;
6745 bfd *owner;
6746
6747 /* An external symbol. */
6748 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6749 h = elf_sym_hashes (abfd)[indx];
6750 BFD_ASSERT (h != NULL);
6751
6752 if (h->root.type != bfd_link_hash_defined
6753 && h->root.type != bfd_link_hash_defweak)
6754 /* This appears to be a reference to an undefined
6755 symbol. Just ignore it--it will be caught by the
6756 regular reloc processing. */
6757 return 0;
6758 owner = h->root.u.def.section->owner;
6759 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6760 *pic_ext_target = 1;
6761
6762 if (h->root.u.def.section->flags & SEC_MERGE)
6763 {
6764 sym_sec = h->root.u.def.section;
6765 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6766 elf_section_data (sym_sec)->sec_info,
6767 h->root.u.def.value);
6768 symval = symval + sym_sec->output_section->vma
6769 + sym_sec->output_offset;
6770 }
6771 else
6772 symval = (h->root.u.def.value
6773 + h->root.u.def.section->output_section->vma
6774 + h->root.u.def.section->output_offset);
6775 }
6776
6777 addend = irel->r_addend;
6778
6779 foff = (symval + addend
6780 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6781 return foff;
6782 }
6783
6784 static bfd_vma
6785 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6786 Elf_Internal_Sym *isymbuf,
6787 Elf_Internal_Rela *irel,
6788 Elf_Internal_Shdr *symtab_hdr)
6789 {
6790 bfd_vma symval;
6791
6792 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6793 {
6794 Elf_Internal_Sym *isym;
6795 asection *sym_sec;
6796 /* A local symbol. */
6797 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6798
6799 if (isym->st_shndx == SHN_UNDEF)
6800 sym_sec = bfd_und_section_ptr;
6801 else if (isym->st_shndx == SHN_ABS)
6802 sym_sec = bfd_abs_section_ptr;
6803 else if (isym->st_shndx == SHN_COMMON)
6804 sym_sec = bfd_com_section_ptr;
6805 else
6806 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6807 symval = isym->st_value + sym_sec->output_section->vma
6808 + sym_sec->output_offset;
6809 }
6810 else
6811 {
6812 unsigned long indx;
6813 struct elf_link_hash_entry *h;
6814 struct elf_nds32_link_hash_table *htab;
6815 asection *splt;
6816
6817 /* An external symbol. */
6818 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6819 h = elf_sym_hashes (abfd)[indx];
6820 BFD_ASSERT (h != NULL);
6821 htab = nds32_elf_hash_table (link_info);
6822 splt = htab->splt;
6823
6824 while (h->root.type == bfd_link_hash_indirect
6825 || h->root.type == bfd_link_hash_warning)
6826 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6827
6828 if (h->plt.offset == (bfd_vma) - 1)
6829 {
6830 if (h->root.type != bfd_link_hash_defined
6831 && h->root.type != bfd_link_hash_defweak)
6832 /* This appears to be a reference to an undefined
6833 * symbol. Just ignore it--it will be caught by the
6834 * regular reloc processing. */
6835 return 0;
6836 symval = (h->root.u.def.value
6837 + h->root.u.def.section->output_section->vma
6838 + h->root.u.def.section->output_offset);
6839 }
6840 else
6841 symval = splt->output_section->vma + h->plt.offset;
6842 }
6843
6844 return symval;
6845 }
6846
6847 static bfd_signed_vma
6848 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6849 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6850 Elf_Internal_Shdr *symtab_hdr)
6851 {
6852 bfd_vma foff;
6853 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6854 symtab_hdr)) == 0)
6855 return 0;
6856 else
6857 return foff - (irel->r_offset
6858 + sec->output_section->vma + sec->output_offset);
6859 }
6860 \f
6861 /* Convert a 32-bit instruction to 16-bit one.
6862 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6863 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6864 type of INSN16. Return 1 if successful. */
6865
6866 static int
6867 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6868 int *pinsn_type)
6869 {
6870 uint16_t insn16 = 0;
6871 int insn_type = 0;
6872 unsigned long mach = bfd_get_mach (abfd);
6873
6874 if (N32_SH5 (insn) != 0)
6875 return 0;
6876
6877 switch (N32_SUB5 (insn))
6878 {
6879 case N32_ALU1_ADD_SLLI:
6880 case N32_ALU1_ADD_SRLI:
6881 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6882 {
6883 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6884 N32_RB5 (insn));
6885 insn_type = NDS32_INSN_ADD333;
6886 }
6887 else if (N32_IS_RT4 (insn))
6888 {
6889 if (N32_RT5 (insn) == N32_RA5 (insn))
6890 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6891 else if (N32_RT5 (insn) == N32_RB5 (insn))
6892 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6893 insn_type = NDS32_INSN_ADD45;
6894 }
6895 break;
6896
6897 case N32_ALU1_SUB_SLLI:
6898 case N32_ALU1_SUB_SRLI:
6899 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6900 {
6901 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6902 N32_RB5 (insn));
6903 insn_type = NDS32_INSN_SUB333;
6904 }
6905 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6906 {
6907 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6908 insn_type = NDS32_INSN_SUB45;
6909 }
6910 break;
6911
6912 case N32_ALU1_AND_SLLI:
6913 case N32_ALU1_AND_SRLI:
6914 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6915 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6916 && N32_IS_RB3 (insn))
6917 {
6918 if (N32_RT5 (insn) == N32_RA5 (insn))
6919 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6920 else if (N32_RT5 (insn) == N32_RB5 (insn))
6921 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6922 if (insn16)
6923 insn_type = NDS32_INSN_AND33;
6924 }
6925 break;
6926
6927 case N32_ALU1_XOR_SLLI:
6928 case N32_ALU1_XOR_SRLI:
6929 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6930 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6931 && N32_IS_RB3 (insn))
6932 {
6933 if (N32_RT5 (insn) == N32_RA5 (insn))
6934 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6935 else if (N32_RT5 (insn) == N32_RB5 (insn))
6936 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6937 if (insn16)
6938 insn_type = NDS32_INSN_XOR33;
6939 }
6940 break;
6941
6942 case N32_ALU1_OR_SLLI:
6943 case N32_ALU1_OR_SRLI:
6944 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6945 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6946 && N32_IS_RB3 (insn))
6947 {
6948 if (N32_RT5 (insn) == N32_RA5 (insn))
6949 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6950 else if (N32_RT5 (insn) == N32_RB5 (insn))
6951 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6952 if (insn16)
6953 insn_type = NDS32_INSN_OR33;
6954 }
6955 break;
6956 case N32_ALU1_NOR:
6957 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6958 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6959 && N32_RA5 (insn) == N32_RB5 (insn))
6960 {
6961 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6962 insn_type = NDS32_INSN_NOT33;
6963 }
6964 break;
6965 case N32_ALU1_SRAI:
6966 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6967 {
6968 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6969 insn_type = NDS32_INSN_SRAI45;
6970 }
6971 break;
6972
6973 case N32_ALU1_SRLI:
6974 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6975 {
6976 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6977 insn_type = NDS32_INSN_SRLI45;
6978 }
6979 break;
6980
6981 case N32_ALU1_SLLI:
6982 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6983 {
6984 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6985 N32_UB5 (insn));
6986 insn_type = NDS32_INSN_SLLI333;
6987 }
6988 break;
6989
6990 case N32_ALU1_ZEH:
6991 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6992 {
6993 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6994 insn_type = NDS32_INSN_ZEH33;
6995 }
6996 break;
6997
6998 case N32_ALU1_SEB:
6999 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7000 {
7001 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7002 insn_type = NDS32_INSN_SEB33;
7003 }
7004 break;
7005
7006 case N32_ALU1_SEH:
7007 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7008 {
7009 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7010 insn_type = NDS32_INSN_SEH33;
7011 }
7012 break;
7013
7014 case N32_ALU1_SLT:
7015 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7016 {
7017 /* Implicit r15. */
7018 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7019 insn_type = NDS32_INSN_SLT45;
7020 }
7021 break;
7022
7023 case N32_ALU1_SLTS:
7024 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7025 {
7026 /* Implicit r15. */
7027 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7028 insn_type = NDS32_INSN_SLTS45;
7029 }
7030 break;
7031 }
7032
7033 if ((insn16 & 0x8000) == 0)
7034 return 0;
7035
7036 if (pinsn16)
7037 *pinsn16 = insn16;
7038 if (pinsn_type)
7039 *pinsn_type = insn_type;
7040 return 1;
7041 }
7042
7043 static int
7044 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7045 int *pinsn_type)
7046 {
7047 uint16_t insn16 = 0;
7048 int insn_type;
7049 unsigned long mach = bfd_get_mach (abfd);
7050
7051 /* TODO: bset, bclr, btgl, btst. */
7052 if (__GF (insn, 6, 4) != 0)
7053 return 0;
7054
7055 switch (N32_IMMU (insn, 6))
7056 {
7057 case N32_ALU2_MUL:
7058 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7059 && N32_IS_RB3 (insn))
7060 {
7061 if (N32_RT5 (insn) == N32_RA5 (insn))
7062 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7063 else if (N32_RT5 (insn) == N32_RB5 (insn))
7064 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7065 if (insn16)
7066 insn_type = NDS32_INSN_MUL33;
7067 }
7068 }
7069
7070 if ((insn16 & 0x8000) == 0)
7071 return 0;
7072
7073 if (pinsn16)
7074 *pinsn16 = insn16;
7075 if (pinsn_type)
7076 *pinsn_type = insn_type;
7077 return 1;
7078 }
7079
7080 int
7081 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7082 int *pinsn_type)
7083 {
7084 int op6;
7085 uint16_t insn16 = 0;
7086 int insn_type;
7087 unsigned long mach = bfd_get_mach (abfd);
7088
7089 /* Decode 32-bit instruction. */
7090 if (insn & 0x80000000)
7091 {
7092 /* Not 32-bit insn. */
7093 return 0;
7094 }
7095
7096 op6 = N32_OP6 (insn);
7097
7098 /* Convert it to 16-bit instruction. */
7099 switch (op6)
7100 {
7101 case N32_OP6_MOVI:
7102 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7103 {
7104 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7105 insn_type = NDS32_INSN_MOVI55;
7106 }
7107 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7108 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7109 {
7110 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7111 N32_IMM20S (insn) - 16);
7112 insn_type = NDS32_INSN_MOVPI45;
7113 }
7114 break;
7115
7116 case N32_OP6_ADDI:
7117 if (N32_IMM15S (insn) == 0)
7118 {
7119 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7120 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7121 if (mach <= MACH_V2
7122 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7123 {
7124 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7125 insn_type = NDS32_INSN_MOV55;
7126 }
7127 }
7128 else if (N32_IMM15S (insn) > 0)
7129 {
7130 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7131 {
7132 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7133 N32_IMM15S (insn));
7134 insn_type = NDS32_INSN_ADDI333;
7135 }
7136 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7137 && N32_IMM15S (insn) < 32)
7138 {
7139 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7140 insn_type = NDS32_INSN_ADDI45;
7141 }
7142 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7143 && N32_RT5 (insn) == N32_RA5 (insn)
7144 && N32_IMM15S (insn) < 512)
7145 {
7146 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7147 insn_type = NDS32_INSN_ADDI10_SP;
7148 }
7149 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7150 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7151 && (N32_IMM15S (insn) % 4 == 0))
7152 {
7153 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7154 N32_IMM15S (insn) >> 2);
7155 insn_type = NDS32_INSN_ADDRI36_SP;
7156 }
7157 }
7158 else
7159 {
7160 /* Less than 0. */
7161 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7162 {
7163 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7164 0 - N32_IMM15S (insn));
7165 insn_type = NDS32_INSN_SUBI333;
7166 }
7167 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7168 && N32_IMM15S (insn) > -32)
7169 {
7170 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7171 0 - N32_IMM15S (insn));
7172 insn_type = NDS32_INSN_SUBI45;
7173 }
7174 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7175 && N32_RT5 (insn) == N32_RA5 (insn)
7176 && N32_IMM15S (insn) >= -512)
7177 {
7178 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7179 insn_type = NDS32_INSN_ADDI10_SP;
7180 }
7181 }
7182 break;
7183
7184 case N32_OP6_ORI:
7185 if (N32_IMM15S (insn) == 0)
7186 {
7187 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7188 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7189 if (mach <= MACH_V2
7190 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7191 {
7192 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7193 insn_type = NDS32_INSN_MOV55;
7194 }
7195 }
7196 break;
7197
7198 case N32_OP6_SUBRI:
7199 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7200 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7201 {
7202 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7203 insn_type = NDS32_INSN_NEG33;
7204 }
7205 break;
7206
7207 case N32_OP6_ANDI:
7208 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7209 {
7210 if (N32_IMM15U (insn) == 1)
7211 {
7212 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7213 insn_type = NDS32_INSN_XLSB33;
7214 }
7215 else if (N32_IMM15U (insn) == 0x7ff)
7216 {
7217 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7218 insn_type = NDS32_INSN_X11B33;
7219 }
7220 else if (N32_IMM15U (insn) == 0xff)
7221 {
7222 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7223 insn_type = NDS32_INSN_ZEB33;
7224 }
7225 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7226 && N32_IMM15U (insn) < 256)
7227 {
7228 int imm15u = N32_IMM15U (insn);
7229
7230 if (__builtin_popcount (imm15u) == 1)
7231 {
7232 /* BMSKI33 */
7233 int imm3u = __builtin_ctz (imm15u);
7234
7235 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7236 insn_type = NDS32_INSN_BMSKI33;
7237 }
7238 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7239 {
7240 /* FEXTI33 */
7241 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7242
7243 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7244 insn_type = NDS32_INSN_FEXTI33;
7245 }
7246 }
7247 }
7248 break;
7249
7250 case N32_OP6_SLTI:
7251 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7252 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7253 {
7254 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7255 insn_type = NDS32_INSN_SLTI45;
7256 }
7257 break;
7258
7259 case N32_OP6_SLTSI:
7260 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7261 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7262 {
7263 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7264 insn_type = NDS32_INSN_SLTSI45;
7265 }
7266 break;
7267
7268 case N32_OP6_LWI:
7269 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7270 {
7271 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7272 insn_type = NDS32_INSN_LWI450;
7273 }
7274 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7275 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7276 {
7277 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7278 N32_IMM15S (insn));
7279 insn_type = NDS32_INSN_LWI333;
7280 }
7281 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7282 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7283 {
7284 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7285 insn_type = NDS32_INSN_LWI37;
7286 }
7287 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7288 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7289 {
7290 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7291 insn_type = NDS32_INSN_LWI37_SP;
7292 }
7293 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7294 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7295 {
7296 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7297 N32_IMM15S (insn) + 32);
7298 insn_type = NDS32_INSN_LWI45_FE;
7299 }
7300 break;
7301
7302 case N32_OP6_SWI:
7303 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7304 {
7305 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7306 insn_type = NDS32_INSN_SWI450;
7307 }
7308 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7309 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7310 {
7311 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7312 N32_IMM15S (insn));
7313 insn_type = NDS32_INSN_SWI333;
7314 }
7315 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7316 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7317 {
7318 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7319 insn_type = NDS32_INSN_SWI37;
7320 }
7321 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7322 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7323 {
7324 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7325 insn_type = NDS32_INSN_SWI37_SP;
7326 }
7327 break;
7328
7329 case N32_OP6_LWI_BI:
7330 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7331 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7332 {
7333 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7334 N32_IMM15S (insn));
7335 insn_type = NDS32_INSN_LWI333_BI;
7336 }
7337 break;
7338
7339 case N32_OP6_SWI_BI:
7340 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7341 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7342 {
7343 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7344 N32_IMM15S (insn));
7345 insn_type = NDS32_INSN_SWI333_BI;
7346 }
7347 break;
7348
7349 case N32_OP6_LHI:
7350 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7351 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7352 {
7353 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7354 N32_IMM15S (insn));
7355 insn_type = NDS32_INSN_LHI333;
7356 }
7357 break;
7358
7359 case N32_OP6_SHI:
7360 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7361 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7362 {
7363 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7364 N32_IMM15S (insn));
7365 insn_type = NDS32_INSN_SHI333;
7366 }
7367 break;
7368
7369 case N32_OP6_LBI:
7370 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7371 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7372 {
7373 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7374 N32_IMM15S (insn));
7375 insn_type = NDS32_INSN_LBI333;
7376 }
7377 break;
7378
7379 case N32_OP6_SBI:
7380 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7381 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7382 {
7383 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7384 N32_IMM15S (insn));
7385 insn_type = NDS32_INSN_SBI333;
7386 }
7387 break;
7388
7389 case N32_OP6_ALU1:
7390 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7391
7392 case N32_OP6_ALU2:
7393 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7394
7395 case N32_OP6_BR1:
7396 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7397 goto done;
7398
7399 if ((insn & __BIT (14)) == 0)
7400 {
7401 /* N32_BR1_BEQ */
7402 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7403 && N32_RT5 (insn) != REG_R5)
7404 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7405 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7406 && N32_RA5 (insn) != REG_R5)
7407 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7408 insn_type = NDS32_INSN_BEQS38;
7409 break;
7410 }
7411 else
7412 {
7413 /* N32_BR1_BNE */
7414 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7415 && N32_RT5 (insn) != REG_R5)
7416 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7417 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7418 && N32_RA5 (insn) != REG_R5)
7419 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7420 insn_type = NDS32_INSN_BNES38;
7421 break;
7422 }
7423 break;
7424
7425 case N32_OP6_BR2:
7426 switch (N32_BR2_SUB (insn))
7427 {
7428 case N32_BR2_BEQZ:
7429 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7430 {
7431 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7432 insn_type = NDS32_INSN_BEQZ38;
7433 }
7434 else if (N32_RT5 (insn) == REG_R15
7435 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7436 {
7437 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7438 insn_type = NDS32_INSN_BEQZS8;
7439 }
7440 break;
7441
7442 case N32_BR2_BNEZ:
7443 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7444 {
7445 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7446 insn_type = NDS32_INSN_BNEZ38;
7447 }
7448 else if (N32_RT5 (insn) == REG_R15
7449 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7450 {
7451 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7452 insn_type = NDS32_INSN_BNEZS8;
7453 }
7454 break;
7455
7456 case N32_BR2_IFCALL:
7457 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7458 {
7459 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7460 insn_type = NDS32_INSN_IFCALL9;
7461 }
7462 break;
7463 }
7464 break;
7465
7466 case N32_OP6_JI:
7467 if ((insn & __BIT (24)) == 0)
7468 {
7469 /* N32_JI_J */
7470 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7471 {
7472 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7473 insn_type = NDS32_INSN_J8;
7474 }
7475 }
7476 break;
7477
7478 case N32_OP6_JREG:
7479 if (__GF (insn, 8, 2) != 0)
7480 goto done;
7481
7482 switch (N32_IMMU (insn, 5))
7483 {
7484 case N32_JREG_JR:
7485 if (N32_JREG_HINT (insn) == 0)
7486 {
7487 /* jr */
7488 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7489 insn_type = NDS32_INSN_JR5;
7490 }
7491 else if (N32_JREG_HINT (insn) == 1)
7492 {
7493 /* ret */
7494 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7495 insn_type = NDS32_INSN_RET5;
7496 }
7497 else if (N32_JREG_HINT (insn) == 3)
7498 {
7499 /* ifret = mov55 $sp, $sp */
7500 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7501 insn_type = NDS32_INSN_IFRET;
7502 }
7503 break;
7504
7505 case N32_JREG_JRAL:
7506 /* It's convertible when return rt5 is $lp and address
7507 translation is kept. */
7508 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7509 {
7510 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7511 insn_type = NDS32_INSN_JRAL5;
7512 }
7513 break;
7514 }
7515 break;
7516
7517 case N32_OP6_MISC:
7518 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7519 {
7520 /* For v3, swid above 31 are used for ex9.it. */
7521 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7522 insn_type = NDS32_INSN_BREAK16;
7523 }
7524 break;
7525
7526 default:
7527 /* This instruction has no 16-bit variant. */
7528 goto done;
7529 }
7530
7531 done:
7532 /* Bit-15 of insn16 should be set for a valid instruction. */
7533 if ((insn16 & 0x8000) == 0)
7534 return 0;
7535
7536 if (pinsn16)
7537 *pinsn16 = insn16;
7538 if (pinsn_type)
7539 *pinsn_type = insn_type;
7540 return 1;
7541 }
7542
7543 static int
7544 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7545 Elf_Internal_Rela *reloc)
7546 {
7547 uint16_t insn16 = 0;
7548
7549 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7550 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7551 return 0;
7552
7553 if (!N32_IS_RT3 (insn))
7554 return 0;
7555
7556 switch (N32_OP6 (insn))
7557 {
7558 case N32_OP6_LWI:
7559 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7560 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7561 break;
7562 case N32_OP6_SWI:
7563 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7564 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7565 break;
7566 case N32_OP6_HWGP:
7567 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7568 break;
7569
7570 if (__GF (insn, 17, 3) == 6)
7571 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7572 else if (__GF (insn, 17, 3) == 7)
7573 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7574 break;
7575 }
7576
7577 if ((insn16 & 0x8000) == 0)
7578 return 0;
7579
7580 *pinsn16 = insn16;
7581 return 1;
7582 }
7583
7584 /* Convert a 16-bit instruction to 32-bit one.
7585 INSN16 it the input and PINSN it the point to output.
7586 Return non-zero on successful. Otherwise 0 is returned. */
7587
7588 int
7589 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7590 {
7591 uint32_t insn = 0xffffffff;
7592 unsigned long mach = bfd_get_mach (abfd);
7593
7594 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7595
7596 switch (__GF (insn16, 9, 6))
7597 {
7598 case 0x4: /* add45 */
7599 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7600 N16_RA5 (insn16));
7601 goto done;
7602 case 0x5: /* sub45 */
7603 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7604 N16_RA5 (insn16));
7605 goto done;
7606 case 0x6: /* addi45 */
7607 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7608 N16_IMM5U (insn16));
7609 goto done;
7610 case 0x7: /* subi45 */
7611 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7612 -N16_IMM5U (insn16));
7613 goto done;
7614 case 0x8: /* srai45 */
7615 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7616 N16_IMM5U (insn16));
7617 goto done;
7618 case 0x9: /* srli45 */
7619 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7620 N16_IMM5U (insn16));
7621 goto done;
7622 case 0xa: /* slli333 */
7623 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7624 N16_IMM3U (insn16));
7625 goto done;
7626 case 0xc: /* add333 */
7627 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7628 N16_RB3 (insn16));
7629 goto done;
7630 case 0xd: /* sub333 */
7631 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7632 N16_RB3 (insn16));
7633 goto done;
7634 case 0xe: /* addi333 */
7635 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7636 N16_IMM3U (insn16));
7637 goto done;
7638 case 0xf: /* subi333 */
7639 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7640 -N16_IMM3U (insn16));
7641 goto done;
7642 case 0x10: /* lwi333 */
7643 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7644 N16_IMM3U (insn16));
7645 goto done;
7646 case 0x12: /* lhi333 */
7647 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7648 N16_IMM3U (insn16));
7649 goto done;
7650 case 0x13: /* lbi333 */
7651 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7652 N16_IMM3U (insn16));
7653 goto done;
7654 case 0x11: /* lwi333.bi */
7655 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7656 N16_IMM3U (insn16));
7657 goto done;
7658 case 0x14: /* swi333 */
7659 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7660 N16_IMM3U (insn16));
7661 goto done;
7662 case 0x16: /* shi333 */
7663 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7664 N16_IMM3U (insn16));
7665 goto done;
7666 case 0x17: /* sbi333 */
7667 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7668 N16_IMM3U (insn16));
7669 goto done;
7670 case 0x15: /* swi333.bi */
7671 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7672 N16_IMM3U (insn16));
7673 goto done;
7674 case 0x18: /* addri36.sp */
7675 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7676 N16_IMM6U (insn16) << 2);
7677 goto done;
7678 case 0x19: /* lwi45.fe */
7679 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7680 (N16_IMM5U (insn16) - 32));
7681 goto done;
7682 case 0x1a: /* lwi450 */
7683 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7684 goto done;
7685 case 0x1b: /* swi450 */
7686 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7687 goto done;
7688
7689 /* These are r15 implied instructions. */
7690 case 0x30: /* slts45 */
7691 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7692 goto done;
7693 case 0x31: /* slt45 */
7694 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7695 goto done;
7696 case 0x32: /* sltsi45 */
7697 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7698 goto done;
7699 case 0x33: /* slti45 */
7700 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7701 goto done;
7702 case 0x34: /* beqzs8, bnezs8 */
7703 if (insn16 & __BIT (8))
7704 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7705 else
7706 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7707 goto done;
7708
7709 case 0x35: /* break16, ex9.it */
7710 /* Only consider range of v3 break16. */
7711 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7712 goto done;
7713
7714 case 0x3c: /* ifcall9 */
7715 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7716 goto done;
7717 case 0x3d: /* movpi45 */
7718 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7719 goto done;
7720
7721 case 0x3f: /* MISC33 */
7722 switch (insn16 & 0x7)
7723 {
7724 case 2: /* neg33 */
7725 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7726 break;
7727 case 3: /* not33 */
7728 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7729 N16_RA3 (insn16));
7730 break;
7731 case 4: /* mul33 */
7732 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7733 N16_RA3 (insn16));
7734 break;
7735 case 5: /* xor33 */
7736 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7737 N16_RA3 (insn16));
7738 break;
7739 case 6: /* and33 */
7740 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7741 N16_RA3 (insn16));
7742 break;
7743 case 7: /* or33 */
7744 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7745 N16_RA3 (insn16));
7746 break;
7747 }
7748 goto done;
7749
7750 case 0xb:
7751 switch (insn16 & 0x7)
7752 {
7753 case 0: /* zeb33 */
7754 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7755 break;
7756 case 1: /* zeh33 */
7757 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7758 break;
7759 case 2: /* seb33 */
7760 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7761 break;
7762 case 3: /* seh33 */
7763 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7764 break;
7765 case 4: /* xlsb33 */
7766 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7767 break;
7768 case 5: /* x11b33 */
7769 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7770 break;
7771 case 6: /* bmski33 */
7772 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7773 1 << __GF (insn16, 3, 3));
7774 break;
7775 case 7: /* fexti33 */
7776 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7777 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
7778 break;
7779 }
7780 goto done;
7781 }
7782
7783 switch (__GF (insn16, 10, 5))
7784 {
7785 case 0x0: /* mov55 or ifret16 */
7786 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7787 && N16_RT5 (insn16) == N16_RA5 (insn16))
7788 insn = N32_JREG (JR, 0, 0, 0, 3);
7789 else
7790 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7791 goto done;
7792 case 0x1: /* movi55 */
7793 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7794 goto done;
7795 case 0x1b: /* addi10s (V2) */
7796 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7797 goto done;
7798 }
7799
7800 switch (__GF (insn16, 11, 4))
7801 {
7802 case 0x7: /* lwi37.fp/swi37.fp */
7803 if (insn16 & __BIT (7)) /* swi37.fp */
7804 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7805 else /* lwi37.fp */
7806 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7807 goto done;
7808 case 0x8: /* beqz38 */
7809 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7810 goto done;
7811 case 0x9: /* bnez38 */
7812 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7813 goto done;
7814 case 0xa: /* beqs38/j8, implied r5 */
7815 if (N16_RT38 (insn16) == 5)
7816 insn = N32_JI (J, N16_IMM8S (insn16));
7817 else
7818 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7819 goto done;
7820 case 0xb: /* bnes38 and others */
7821 if (N16_RT38 (insn16) == 5)
7822 {
7823 switch (__GF (insn16, 5, 3))
7824 {
7825 case 0: /* jr5 */
7826 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7827 break;
7828 case 4: /* ret5 */
7829 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7830 break;
7831 case 1: /* jral5 */
7832 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7833 break;
7834 case 2: /* ex9.it imm5 */
7835 /* ex9.it had no 32-bit variantl. */
7836 break;
7837 case 5: /* add5.pc */
7838 /* add5.pc had no 32-bit variantl. */
7839 break;
7840 }
7841 }
7842 else /* bnes38 */
7843 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7844 goto done;
7845 case 0xe: /* lwi37/swi37 */
7846 if (insn16 & (1 << 7)) /* swi37.sp */
7847 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7848 else /* lwi37.sp */
7849 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7850 goto done;
7851 }
7852
7853 done:
7854 if (insn & 0x80000000)
7855 return 0;
7856
7857 if (pinsn)
7858 *pinsn = insn;
7859 return 1;
7860 }
7861 \f
7862 static bfd_boolean
7863 is_sda_access_insn (unsigned long insn)
7864 {
7865 switch (N32_OP6 (insn))
7866 {
7867 case N32_OP6_LWI:
7868 case N32_OP6_LHI:
7869 case N32_OP6_LHSI:
7870 case N32_OP6_LBI:
7871 case N32_OP6_LBSI:
7872 case N32_OP6_SWI:
7873 case N32_OP6_SHI:
7874 case N32_OP6_SBI:
7875 case N32_OP6_LWC:
7876 case N32_OP6_LDC:
7877 case N32_OP6_SWC:
7878 case N32_OP6_SDC:
7879 return TRUE;
7880 default:
7881 ;
7882 }
7883 return FALSE;
7884 }
7885
7886 static unsigned long
7887 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7888 {
7889 uint32_t oinsn = 0;
7890
7891 switch (type)
7892 {
7893 case R_NDS32_GOT_LO12:
7894 case R_NDS32_GOTOFF_LO12:
7895 case R_NDS32_PLTREL_LO12:
7896 case R_NDS32_PLT_GOTREL_LO12:
7897 case R_NDS32_LO12S0_RELA:
7898 switch (N32_OP6 (insn))
7899 {
7900 case N32_OP6_LBI:
7901 /* lbi.gp */
7902 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7903 break;
7904 case N32_OP6_LBSI:
7905 /* lbsi.gp */
7906 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7907 break;
7908 case N32_OP6_SBI:
7909 /* sbi.gp */
7910 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7911 break;
7912 case N32_OP6_ORI:
7913 /* addi.gp */
7914 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7915 break;
7916 }
7917 break;
7918
7919 case R_NDS32_LO12S1_RELA:
7920 switch (N32_OP6 (insn))
7921 {
7922 case N32_OP6_LHI:
7923 /* lhi.gp */
7924 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7925 break;
7926 case N32_OP6_LHSI:
7927 /* lhsi.gp */
7928 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7929 break;
7930 case N32_OP6_SHI:
7931 /* shi.gp */
7932 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7933 break;
7934 }
7935 break;
7936
7937 case R_NDS32_LO12S2_RELA:
7938 switch (N32_OP6 (insn))
7939 {
7940 case N32_OP6_LWI:
7941 /* lwi.gp */
7942 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7943 break;
7944 case N32_OP6_SWI:
7945 /* swi.gp */
7946 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7947 break;
7948 }
7949 break;
7950
7951 case R_NDS32_LO12S2_DP_RELA:
7952 case R_NDS32_LO12S2_SP_RELA:
7953 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7954 break;
7955 }
7956
7957 if (oinsn)
7958 *pinsn = oinsn;
7959
7960 return oinsn != 0;
7961 }
7962
7963 /* Linker hasn't found the correct merge section for non-section symbol
7964 in relax time, this work is left to the function elf_link_input_bfd().
7965 So for non-section symbol, _bfd_merged_section_offset is also needed
7966 to find the correct symbol address. */
7967
7968 static bfd_vma
7969 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7970 asection **psec, Elf_Internal_Rela *rel)
7971 {
7972 asection *sec = *psec;
7973 bfd_vma relocation;
7974
7975 relocation = (sec->output_section->vma
7976 + sec->output_offset + sym->st_value);
7977 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7978 {
7979 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7980 rel->r_addend =
7981 _bfd_merged_section_offset (abfd, psec,
7982 elf_section_data (sec)->sec_info,
7983 sym->st_value + rel->r_addend);
7984 else
7985 rel->r_addend =
7986 _bfd_merged_section_offset (abfd, psec,
7987 elf_section_data (sec)->sec_info,
7988 sym->st_value) + rel->r_addend;
7989
7990 if (sec != *psec)
7991 {
7992 /* If we have changed the section, and our original section is
7993 marked with SEC_EXCLUDE, it means that the original
7994 SEC_MERGE section has been completely subsumed in some
7995 other SEC_MERGE section. In this case, we need to leave
7996 some info around for --emit-relocs. */
7997 if ((sec->flags & SEC_EXCLUDE) != 0)
7998 sec->kept_section = *psec;
7999 sec = *psec;
8000 }
8001 rel->r_addend -= relocation;
8002 rel->r_addend += sec->output_section->vma + sec->output_offset;
8003 }
8004 return relocation;
8005 }
8006
8007 static bfd_vma
8008 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8009 Elf_Internal_Sym *isymbuf,
8010 Elf_Internal_Shdr *symtab_hdr)
8011 {
8012 bfd_signed_vma foff;
8013 bfd_vma symval, addend;
8014 Elf_Internal_Rela irel_fn;
8015 Elf_Internal_Sym *isym;
8016 asection *sym_sec;
8017
8018 /* Get the value of the symbol referred to by the reloc. */
8019 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8020 {
8021 /* A local symbol. */
8022 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8023
8024 if (isym->st_shndx == SHN_UNDEF)
8025 sym_sec = bfd_und_section_ptr;
8026 else if (isym->st_shndx == SHN_ABS)
8027 sym_sec = bfd_abs_section_ptr;
8028 else if (isym->st_shndx == SHN_COMMON)
8029 sym_sec = bfd_com_section_ptr;
8030 else
8031 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8032 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8033 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8034 addend = irel_fn.r_addend;
8035 }
8036 else
8037 {
8038 unsigned long indx;
8039 struct elf_link_hash_entry *h;
8040
8041 /* An external symbol. */
8042 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8043 h = elf_sym_hashes (abfd)[indx];
8044 BFD_ASSERT (h != NULL);
8045
8046 while (h->root.type == bfd_link_hash_indirect
8047 || h->root.type == bfd_link_hash_warning)
8048 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8049
8050 if (h->root.type != bfd_link_hash_defined
8051 && h->root.type != bfd_link_hash_defweak)
8052 /* This appears to be a reference to an undefined
8053 symbol. Just ignore it--it will be caught by the
8054 regular reloc processing. */
8055 return 0;
8056
8057 if (h->root.u.def.section->flags & SEC_MERGE)
8058 {
8059 sym_sec = h->root.u.def.section;
8060 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8061 (sym_sec)->sec_info, h->root.u.def.value);
8062 symval = symval + sym_sec->output_section->vma
8063 + sym_sec->output_offset;
8064 }
8065 else
8066 symval = (h->root.u.def.value
8067 + h->root.u.def.section->output_section->vma
8068 + h->root.u.def.section->output_offset);
8069 addend = irel->r_addend;
8070 }
8071
8072 foff = symval + addend;
8073
8074 return foff;
8075 }
8076
8077 static bfd_vma
8078 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8079 Elf_Internal_Rela *irel,
8080 Elf_Internal_Shdr *symtab_hdr)
8081 {
8082 int symndx;
8083 bfd_vma *local_got_offsets;
8084 /* Get the value of the symbol referred to by the reloc. */
8085 struct elf_link_hash_entry *h;
8086 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8087
8088 /* An external symbol. */
8089 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8090 h = elf_sym_hashes (abfd)[symndx];
8091 while (h->root.type == bfd_link_hash_indirect
8092 || h->root.type == bfd_link_hash_warning)
8093 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8094
8095 if (symndx >= 0)
8096 {
8097 BFD_ASSERT (h != NULL);
8098 return htab->sgot->output_section->vma + htab->sgot->output_offset
8099 + h->got.offset;
8100 }
8101 else
8102 {
8103 local_got_offsets = elf_local_got_offsets (abfd);
8104 BFD_ASSERT (local_got_offsets != NULL);
8105 return htab->sgot->output_section->vma + htab->sgot->output_offset
8106 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8107 }
8108
8109 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8110 /* The check of h->root.type is passed. */
8111 }
8112
8113 static int
8114 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8115 asection *sec, Elf_Internal_Rela *rel)
8116 {
8117 bfd_byte *contents;
8118 unsigned short insn16;
8119
8120 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8121 return FALSE;
8122 contents = elf_section_data (sec)->this_hdr.contents;
8123 insn16 = bfd_getb16 (contents + rel->r_offset);
8124 if (insn16 == NDS32_NOP16)
8125 return TRUE;
8126 return FALSE;
8127 }
8128
8129 /* It checks whether the instruction could be converted to
8130 16-bit form and returns the converted one.
8131
8132 `internal_relocs' is supposed to be sorted. */
8133
8134 static int
8135 is_convert_32_to_16 (bfd *abfd, asection *sec,
8136 Elf_Internal_Rela *reloc,
8137 Elf_Internal_Rela *internal_relocs,
8138 Elf_Internal_Rela *irelend,
8139 uint16_t *insn16)
8140 {
8141 #define NORMAL_32_TO_16 (1 << 0)
8142 #define SPECIAL_32_TO_16 (1 << 1)
8143 bfd_byte *contents = NULL;
8144 bfd_signed_vma off;
8145 bfd_vma mem_addr;
8146 uint32_t insn = 0;
8147 Elf_Internal_Rela *pc_rel;
8148 int pic_ext_target = 0;
8149 Elf_Internal_Shdr *symtab_hdr;
8150 Elf_Internal_Sym *isymbuf = NULL;
8151 int convert_type;
8152 bfd_vma offset;
8153
8154 if (reloc->r_offset + 4 > sec->size)
8155 return FALSE;
8156
8157 offset = reloc->r_offset;
8158
8159 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
8160 return FALSE;
8161 insn = bfd_getb32 (contents + offset);
8162
8163 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8164 convert_type = NORMAL_32_TO_16;
8165 else if (special_convert_32_to_16 (insn, insn16, reloc))
8166 convert_type = SPECIAL_32_TO_16;
8167 else
8168 return FALSE;
8169
8170 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8171 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8172 return FALSE;
8173
8174 /* Find the first relocation of the same relocation-type,
8175 so we iteratie them forward. */
8176 pc_rel = reloc;
8177 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
8178 pc_rel--;
8179
8180 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8181 {
8182 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8183 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8184 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8185 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8186 {
8187 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8188 &pic_ext_target);
8189 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8190 || off == 0)
8191 return FALSE;
8192 break;
8193 }
8194 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8195 {
8196 /* movi => movi55 */
8197 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8198 symtab_hdr);
8199 /* mem_addr is unsigned, but the value should
8200 be between [-16, 15]. */
8201 if ((mem_addr + 0x10) >> 5)
8202 return FALSE;
8203 break;
8204 }
8205 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8206 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8207 {
8208 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8209 because it can be relaxed to addi for TLS_LE_ADD. */
8210 return FALSE;
8211 }
8212 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8213 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8214 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8215 && convert_type == SPECIAL_32_TO_16)
8216 {
8217 /* fp-as-gp
8218 We've selected a best fp-base for this access, so we can
8219 always resolve it anyway. Do nothing. */
8220 break;
8221 }
8222 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8223 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8224 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8225 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8226 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8227 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8228 {
8229 /* Prevent unresolved addi instruction translate
8230 to addi45 or addi333. */
8231 return FALSE;
8232 }
8233 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8234 {
8235 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8236 &pic_ext_target);
8237 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8238 return FALSE;
8239 break;
8240 }
8241 }
8242
8243 return TRUE;
8244 }
8245
8246 static void
8247 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8248 Elf_Internal_Rela *reloc,
8249 Elf_Internal_Rela *internal_relocs,
8250 Elf_Internal_Rela *irelend,
8251 unsigned short insn16)
8252 {
8253 Elf_Internal_Rela *pc_rel;
8254 bfd_vma offset;
8255
8256 offset = reloc->r_offset;
8257 bfd_putb16 (insn16, contents + offset);
8258 /* Find the first relocation of the same relocation-type,
8259 so we iteratie them forward. */
8260 pc_rel = reloc;
8261 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8262 pc_rel--;
8263
8264 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8265 {
8266 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8267 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8268 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8269 {
8270 pc_rel->r_info =
8271 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8272 }
8273 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8274 pc_rel->r_info =
8275 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8276 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8277 pc_rel->r_info =
8278 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8279 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8280 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8281 pc_rel->r_info =
8282 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
8283 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8284 pc_rel->r_info =
8285 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
8286 }
8287 }
8288
8289 /* Find a relocation of type specified by `reloc_type'
8290 of the same r_offset with reloc.
8291 If not found, return irelend.
8292
8293 Assuming relocations are sorted by r_offset,
8294 we find the relocation from `reloc' backward untill relocs,
8295 or find it from `reloc' forward untill irelend. */
8296
8297 static Elf_Internal_Rela *
8298 find_relocs_at_address (Elf_Internal_Rela *reloc,
8299 Elf_Internal_Rela *relocs,
8300 Elf_Internal_Rela *irelend,
8301 enum elf_nds32_reloc_type reloc_type)
8302 {
8303 Elf_Internal_Rela *rel_t;
8304
8305 /* Find backward. */
8306 for (rel_t = reloc;
8307 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8308 rel_t--)
8309 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8310 return rel_t;
8311
8312 /* We didn't find it backward. Try find it forward. */
8313 for (rel_t = reloc;
8314 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8315 rel_t++)
8316 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8317 return rel_t;
8318
8319 return irelend;
8320 }
8321
8322 /* Find a relocation of specified type and offset.
8323 `reloc' is just a refence point to find a relocation at specified offset.
8324 If not found, return irelend.
8325
8326 Assuming relocations are sorted by r_offset,
8327 we find the relocation from `reloc' backward untill relocs,
8328 or find it from `reloc' forward untill irelend. */
8329
8330 static Elf_Internal_Rela *
8331 find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8332 Elf_Internal_Rela *relocs,
8333 Elf_Internal_Rela *irelend,
8334 enum elf_nds32_reloc_type reloc_type,
8335 bfd_vma offset_p)
8336 {
8337 Elf_Internal_Rela *rel_t = NULL;
8338
8339 /* First, we try to find a relocation of offset `offset_p',
8340 and then we use find_relocs_at_address to find specific type. */
8341
8342 if (reloc->r_offset > offset_p)
8343 {
8344 /* Find backward. */
8345 for (rel_t = reloc;
8346 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8347 /* Do nothing. */;
8348 }
8349 else if (reloc->r_offset < offset_p)
8350 {
8351 /* Find forward. */
8352 for (rel_t = reloc;
8353 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8354 /* Do nothing. */;
8355 }
8356 else
8357 rel_t = reloc;
8358
8359 /* Not found? */
8360 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8361 return irelend;
8362
8363 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8364 }
8365
8366 static bfd_boolean
8367 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8368 Elf_Internal_Rela *internal_relocs,
8369 Elf_Internal_Rela *irelend,
8370 unsigned char reloc_type)
8371 {
8372 Elf_Internal_Rela *rel_t;
8373
8374 for (rel_t = reloc;
8375 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8376 rel_t--)
8377 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8378 {
8379 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8380 && rel_t->r_addend == reloc->r_addend)
8381 continue;
8382 return TRUE;
8383 }
8384
8385 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8386 rel_t++)
8387 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8388 {
8389 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8390 && rel_t->r_addend == reloc->r_addend)
8391 continue;
8392 return TRUE;
8393 }
8394
8395 return FALSE;
8396 }
8397
8398 typedef struct nds32_elf_blank nds32_elf_blank_t;
8399 struct nds32_elf_blank
8400 {
8401 /* Where the blank begins. */
8402 bfd_vma offset;
8403 /* The size of the blank. */
8404 bfd_vma size;
8405 /* The accumulative size before this blank. */
8406 bfd_vma total_size;
8407 nds32_elf_blank_t *next;
8408 nds32_elf_blank_t *prev;
8409 };
8410
8411 static nds32_elf_blank_t *blank_free_list = NULL;
8412
8413 static nds32_elf_blank_t *
8414 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8415 {
8416 nds32_elf_blank_t *blank_t;
8417
8418 if (blank_free_list)
8419 {
8420 blank_t = blank_free_list;
8421 blank_free_list = blank_free_list->next;
8422 }
8423 else
8424 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8425
8426 if (blank_t == NULL)
8427 return NULL;
8428
8429 blank_t->offset = offset_p;
8430 blank_t->size = size_p;
8431 blank_t->total_size = 0;
8432 blank_t->next = NULL;
8433 blank_t->prev = NULL;
8434
8435 return blank_t;
8436 }
8437
8438 static void
8439 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8440 {
8441 if (blank_free_list)
8442 {
8443 blank_free_list->prev = blank_p;
8444 blank_p->next = blank_free_list;
8445 }
8446 else
8447 blank_p->next = NULL;
8448
8449 blank_p->prev = NULL;
8450 blank_free_list = blank_p;
8451 }
8452
8453 static void
8454 clean_nds32_elf_blank (void)
8455 {
8456 nds32_elf_blank_t *blank_t;
8457
8458 while (blank_free_list)
8459 {
8460 blank_t = blank_free_list;
8461 blank_free_list = blank_free_list->next;
8462 free (blank_t);
8463 }
8464 }
8465
8466 static nds32_elf_blank_t *
8467 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8468 {
8469 nds32_elf_blank_t *blank_t;
8470
8471 if (!blank_p)
8472 return NULL;
8473 blank_t = blank_p;
8474
8475 while (blank_t && addr < blank_t->offset)
8476 blank_t = blank_t->prev;
8477 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8478 blank_t = blank_t->next;
8479
8480 return blank_t;
8481 }
8482
8483 static bfd_vma
8484 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8485 int overwrite)
8486 {
8487 nds32_elf_blank_t *blank_t;
8488
8489 blank_t = search_nds32_elf_blank (*blank_p, addr);
8490 if (!blank_t)
8491 return 0;
8492
8493 if (overwrite)
8494 *blank_p = blank_t;
8495
8496 if (addr < blank_t->offset + blank_t->size)
8497 return blank_t->total_size + (addr - blank_t->offset);
8498 else
8499 return blank_t->total_size + blank_t->size;
8500 }
8501
8502 static bfd_boolean
8503 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8504 {
8505 nds32_elf_blank_t *blank_t, *blank_t2;
8506
8507 if (!*blank_p)
8508 {
8509 *blank_p = create_nds32_elf_blank (addr, len);
8510 return *blank_p ? TRUE : FALSE;
8511 }
8512
8513 blank_t = search_nds32_elf_blank (*blank_p, addr);
8514
8515 if (blank_t == NULL)
8516 {
8517 blank_t = create_nds32_elf_blank (addr, len);
8518 if (!blank_t)
8519 return FALSE;
8520 while ((*blank_p)->prev != NULL)
8521 *blank_p = (*blank_p)->prev;
8522 blank_t->next = *blank_p;
8523 (*blank_p)->prev = blank_t;
8524 (*blank_p) = blank_t;
8525 return TRUE;
8526 }
8527
8528 if (addr < blank_t->offset + blank_t->size)
8529 {
8530 if (addr > blank_t->offset + blank_t->size)
8531 blank_t->size = addr - blank_t->offset;
8532 }
8533 else
8534 {
8535 blank_t2 = create_nds32_elf_blank (addr, len);
8536 if (!blank_t2)
8537 return FALSE;
8538 if (blank_t->next)
8539 {
8540 blank_t->next->prev = blank_t2;
8541 blank_t2->next = blank_t->next;
8542 }
8543 blank_t2->prev = blank_t;
8544 blank_t->next = blank_t2;
8545 *blank_p = blank_t2;
8546 }
8547
8548 return TRUE;
8549 }
8550
8551 static bfd_boolean
8552 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8553 bfd_vma len)
8554 {
8555 nds32_elf_blank_t *blank_t;
8556
8557 if (!insert_nds32_elf_blank (blank_p, addr, len))
8558 return FALSE;
8559
8560 blank_t = *blank_p;
8561
8562 if (!blank_t->prev)
8563 {
8564 blank_t->total_size = 0;
8565 blank_t = blank_t->next;
8566 }
8567
8568 while (blank_t)
8569 {
8570 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8571 blank_t = blank_t->next;
8572 }
8573
8574 return TRUE;
8575 }
8576
8577 static void
8578 calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8579 {
8580 nds32_elf_blank_t *blank_t;
8581 bfd_vma total_size = 0;
8582
8583 if (!blank_p)
8584 return;
8585
8586 blank_t = blank_p;
8587 while (blank_t->prev)
8588 blank_t = blank_t->prev;
8589 while (blank_t)
8590 {
8591 blank_t->total_size = total_size;
8592 total_size += blank_t->size;
8593 blank_t = blank_t->next;
8594 }
8595 }
8596
8597 static bfd_boolean
8598 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8599 nds32_elf_blank_t *blank_p)
8600 {
8601 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
8602 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
8603 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8604 unsigned int sec_shndx; /* The section the be relaxed. */
8605 bfd_byte *contents; /* Contents data of iterating section. */
8606 Elf_Internal_Rela *internal_relocs;
8607 Elf_Internal_Rela *irel;
8608 Elf_Internal_Rela *irelend;
8609 struct elf_link_hash_entry **sym_hashes;
8610 struct elf_link_hash_entry **end_hashes;
8611 unsigned int symcount;
8612 asection *sect;
8613 nds32_elf_blank_t *blank_t;
8614 nds32_elf_blank_t *blank_t2;
8615 nds32_elf_blank_t *blank_head;
8616
8617 blank_head = blank_t = blank_p;
8618 while (blank_head->prev != NULL)
8619 blank_head = blank_head->prev;
8620 while (blank_t->next != NULL)
8621 blank_t = blank_t->next;
8622
8623 if (blank_t->offset + blank_t->size <= sec->size)
8624 {
8625 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8626 blank_t->next->prev = blank_t;
8627 }
8628 if (blank_head->offset > 0)
8629 {
8630 blank_head->prev = create_nds32_elf_blank (0, 0);
8631 blank_head->prev->next = blank_head;
8632 blank_head = blank_head->prev;
8633 }
8634
8635 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8636
8637 /* The deletion must stop at the next ALIGN reloc for an alignment
8638 power larger than the number of bytes we are deleting. */
8639
8640 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8641 if (!nds32_get_local_syms (abfd, sec, &isym))
8642 return FALSE;
8643
8644 if (isym == NULL)
8645 {
8646 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8647 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8648 symtab_hdr->contents = (bfd_byte *) isym;
8649 }
8650
8651 if (isym == NULL || symtab_hdr->sh_info == 0)
8652 return FALSE;
8653
8654 blank_t = blank_head;
8655 calc_nds32_blank_total (blank_head);
8656
8657 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8658 {
8659 /* Adjust all the relocs. */
8660
8661 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8662 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8663 TRUE /* keep_memory */);
8664 irelend = internal_relocs + sect->reloc_count;
8665
8666 blank_t = blank_head;
8667 blank_t2 = blank_head;
8668
8669 if (!(sect->flags & SEC_RELOC))
8670 continue;
8671
8672 nds32_get_section_contents (abfd, sect, &contents, TRUE);
8673
8674 for (irel = internal_relocs; irel < irelend; irel++)
8675 {
8676 bfd_vma raddr;
8677
8678 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8679 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8680 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8681 {
8682 unsigned long val = 0;
8683 unsigned long mask;
8684 long before, between;
8685 long offset = 0;
8686
8687 switch (ELF32_R_TYPE (irel->r_info))
8688 {
8689 case R_NDS32_DIFF8:
8690 offset = bfd_get_8 (abfd, contents + irel->r_offset);
8691 break;
8692 case R_NDS32_DIFF16:
8693 offset = bfd_get_16 (abfd, contents + irel->r_offset);
8694 break;
8695 case R_NDS32_DIFF32:
8696 val = bfd_get_32 (abfd, contents + irel->r_offset);
8697 /* Get the signed bit and mask for the high part. The
8698 gcc will alarm when right shift 32-bit since the
8699 type size of long may be 32-bit. */
8700 mask = 0 - (val >> 31);
8701 if (mask)
8702 offset = (val | (mask - 0xffffffff));
8703 else
8704 offset = val;
8705 break;
8706 default:
8707 BFD_ASSERT (0);
8708 }
8709
8710 /* DIFF value
8711 0 |encoded in location|
8712 |------------|-------------------|---------
8713 sym+off(addend)
8714 -- before ---| *****************
8715 --------------------- between ---|
8716
8717 We only care how much data are relax between DIFF,
8718 marked as ***. */
8719
8720 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8721 between = get_nds32_elf_blank_total (&blank_t,
8722 irel->r_addend + offset, 0);
8723 if (between == before)
8724 goto done_adjust_diff;
8725
8726 switch (ELF32_R_TYPE (irel->r_info))
8727 {
8728 case R_NDS32_DIFF8:
8729 bfd_put_8 (abfd, offset - (between - before),
8730 contents + irel->r_offset);
8731 break;
8732 case R_NDS32_DIFF16:
8733 bfd_put_16 (abfd, offset - (between - before),
8734 contents + irel->r_offset);
8735 break;
8736 case R_NDS32_DIFF32:
8737 bfd_put_32 (abfd, offset - (between - before),
8738 contents + irel->r_offset);
8739 break;
8740 }
8741 }
8742 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8743 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8744 {
8745 bfd_vma val = 0;
8746 unsigned int len = 0;
8747 unsigned long before, between;
8748 bfd_byte *endp, *p;
8749
8750 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8751 &len);
8752
8753 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8754 between = get_nds32_elf_blank_total (&blank_t,
8755 irel->r_addend + val, 0);
8756 if (between == before)
8757 goto done_adjust_diff;
8758
8759 p = contents + irel->r_offset;
8760 endp = p + len -1;
8761 memset (p, 0x80, len);
8762 *(endp) = 0;
8763 p = write_uleb128 (p, val - (between - before)) - 1;
8764 if (p < endp)
8765 *p |= 0x80;
8766 }
8767 done_adjust_diff:
8768
8769 if (sec == sect)
8770 {
8771 raddr = irel->r_offset;
8772 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8773 irel->r_offset, 1);
8774
8775 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8776 continue;
8777 if (blank_t2 && blank_t2->next
8778 && (blank_t2->offset > raddr
8779 || blank_t2->next->offset <= raddr))
8780 _bfd_error_handler
8781 (_("%B: %s\n"), abfd,
8782 "Error: search_nds32_elf_blank reports wrong node");
8783
8784 /* Mark reloc in deleted portion as NONE.
8785 For some relocs like R_NDS32_LABEL that doesn't modify the
8786 content in the section. R_NDS32_LABEL doesn't belong to the
8787 instruction in the section, so we should preserve it. */
8788 if (raddr >= blank_t2->offset
8789 && raddr < blank_t2->offset + blank_t2->size
8790 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8791 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8793 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8794 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8795 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8796 {
8797 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8798 R_NDS32_NONE);
8799 continue;
8800 }
8801 }
8802
8803 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8804 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8805 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8806 continue;
8807
8808 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8809 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8810 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8811 {
8812 if (irel->r_addend <= sec->size)
8813 irel->r_addend -=
8814 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8815 }
8816 }
8817 }
8818
8819 /* Adjust the local symbols defined in this section. */
8820 blank_t = blank_head;
8821 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8822 {
8823 if (isym->st_shndx == sec_shndx)
8824 {
8825 if (isym->st_value <= sec->size)
8826 {
8827 bfd_vma ahead;
8828 bfd_vma orig_addr = isym->st_value;
8829
8830 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8831 isym->st_value -= ahead;
8832
8833 /* Adjust function size. */
8834 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8835 && isym->st_size > 0)
8836 isym->st_size -=
8837 get_nds32_elf_blank_total
8838 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8839 }
8840 }
8841 }
8842
8843 /* Now adjust the global symbols defined in this section. */
8844 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8845 - symtab_hdr->sh_info);
8846 sym_hashes = elf_sym_hashes (abfd);
8847 end_hashes = sym_hashes + symcount;
8848 blank_t = blank_head;
8849 for (; sym_hashes < end_hashes; sym_hashes++)
8850 {
8851 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8852
8853 if ((sym_hash->root.type == bfd_link_hash_defined
8854 || sym_hash->root.type == bfd_link_hash_defweak)
8855 && sym_hash->root.u.def.section == sec)
8856 {
8857 if (sym_hash->root.u.def.value <= sec->size)
8858 {
8859 bfd_vma ahead;
8860 bfd_vma orig_addr = sym_hash->root.u.def.value;
8861
8862 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8863 sym_hash->root.u.def.value -= ahead;
8864
8865 /* Adjust function size. */
8866 if (sym_hash->type == STT_FUNC)
8867 sym_hash->size -=
8868 get_nds32_elf_blank_total
8869 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8870
8871 }
8872 }
8873 }
8874
8875 contents = elf_section_data (sec)->this_hdr.contents;
8876 blank_t = blank_head;
8877 while (blank_t->next)
8878 {
8879 /* Actually delete the bytes. */
8880
8881 /* If current blank is the last blank overlap with current section,
8882 go to finish process. */
8883 if (sec->size <= (blank_t->next->offset))
8884 break;
8885
8886 memmove (contents + blank_t->offset - blank_t->total_size,
8887 contents + blank_t->offset + blank_t->size,
8888 blank_t->next->offset - (blank_t->offset + blank_t->size));
8889
8890 blank_t = blank_t->next;
8891 }
8892
8893 if (sec->size > (blank_t->offset + blank_t->size))
8894 {
8895 /* There are remaining code between blank and section boundary.
8896 Move the remaining code to appropriate location. */
8897 memmove (contents + blank_t->offset - blank_t->total_size,
8898 contents + blank_t->offset + blank_t->size,
8899 sec->size - (blank_t->offset + blank_t->size));
8900 sec->size -= blank_t->total_size + blank_t->size;
8901 }
8902 else
8903 /* This blank is not entirely included in the section,
8904 reduce the section size by only part of the blank size. */
8905 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8906
8907 while (blank_head)
8908 {
8909 blank_t = blank_head;
8910 blank_head = blank_head->next;
8911 remove_nds32_elf_blank (blank_t);
8912 }
8913
8914 return TRUE;
8915 }
8916
8917 /* Get the contents of a section. */
8918
8919 static int
8920 nds32_get_section_contents (bfd *abfd, asection *sec,
8921 bfd_byte **contents_p, bfd_boolean cache)
8922 {
8923 /* Get the section contents. */
8924 if (elf_section_data (sec)->this_hdr.contents != NULL)
8925 *contents_p = elf_section_data (sec)->this_hdr.contents;
8926 else
8927 {
8928 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8929 return FALSE;
8930 if (cache)
8931 elf_section_data (sec)->this_hdr.contents = *contents_p;
8932 }
8933
8934 return TRUE;
8935 }
8936
8937 /* Get the contents of the internal symbol of abfd. */
8938
8939 static int
8940 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8941 Elf_Internal_Sym **isymbuf_p)
8942 {
8943 Elf_Internal_Shdr *symtab_hdr;
8944 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8945
8946 /* Read this BFD's local symbols if we haven't done so already. */
8947 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8948 {
8949 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8950 if (*isymbuf_p == NULL)
8951 {
8952 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8953 symtab_hdr->sh_info, 0,
8954 NULL, NULL, NULL);
8955 if (*isymbuf_p == NULL)
8956 return FALSE;
8957 }
8958 }
8959 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8960
8961 return TRUE;
8962 }
8963
8964 /* Range of small data. */
8965 static bfd_vma sdata_range[2][2];
8966 static bfd_vma const sdata_init_range[2] =
8967 { ACCURATE_12BIT_S1, ACCURATE_19BIT };
8968
8969 static int
8970 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8971 bfd_byte *contents, bfd_vma addr)
8972 {
8973 unsigned long insn = bfd_getb32 (contents + addr);
8974
8975 if (insn & 0x80000000)
8976 return 2;
8977
8978 return 4;
8979 }
8980
8981 /* Set the gp relax range. We have to measure the safe range
8982 to do gp relaxation. */
8983
8984 static void
8985 relax_range_measurement (bfd *abfd)
8986 {
8987 asection *sec_f, *sec_b;
8988 /* For upper bound. */
8989 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8990 bfd_vma align;
8991 static int decide_relax_range = 0;
8992 int i;
8993 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
8994
8995 if (decide_relax_range)
8996 return;
8997 decide_relax_range = 1;
8998
8999 if (sda_rela_sec == NULL)
9000 {
9001 /* Since there is no data sections, we assume the range is page size. */
9002 for (i = 0; i < range_number; i++)
9003 {
9004 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9005 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9006 }
9007 return;
9008 }
9009
9010 /* Get the biggest alignment power after the gp located section. */
9011 sec_f = sda_rela_sec->output_section;
9012 sec_b = sec_f->next;
9013 align = 0;
9014 while (sec_b != NULL)
9015 {
9016 if ((unsigned)(1 << sec_b->alignment_power) > align)
9017 align = (1 << sec_b->alignment_power);
9018 sec_b = sec_b->next;
9019 }
9020
9021 /* I guess we can not determine the section before
9022 gp located section, so we assume the align is max page size. */
9023 for (i = 0; i < range_number; i++)
9024 {
9025 sdata_range[i][1] = sdata_init_range[i] - align;
9026 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
9027 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
9028 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9029 }
9030 }
9031
9032 /* These are macros used to check flags encoded in r_addend.
9033 They are only used by nds32_elf_relax_section (). */
9034 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9035 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9036 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9037 #define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9038
9039 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9040
9041 static bfd_boolean
9042 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9043 Elf_Internal_Rela *internal_relocs, int *insn_len,
9044 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9045 Elf_Internal_Shdr *symtab_hdr)
9046 {
9047 /* There are 3 variations for LONGCALL1
9048 case 4-4-2; 16-bit on, optimize off or optimize for space
9049 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9050 ori ta, ta, lo12(symbol) ; LO12S0
9051 jral5 ta ;
9052
9053 case 4-4-4; 16-bit off, optimize don't care
9054 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9055 ori ta, ta, lo12(symbol) ; LO12S0
9056 jral ta ;
9057
9058 case 4-4-4; 16-bit on, optimize for speed
9059 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9060 ori ta, ta, lo12(symbol) ; LO12S0
9061 jral ta ;
9062 Check code for -mlong-calls output. */
9063
9064 /* Get the reloc for the address from which the register is
9065 being loaded. This reloc will tell us which function is
9066 actually being called. */
9067
9068 bfd_vma laddr;
9069 int seq_len; /* Original length of instruction sequence. */
9070 uint32_t insn;
9071 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9072 int pic_ext_target = 0;
9073 bfd_signed_vma foff;
9074 uint16_t insn16;
9075
9076 irelend = internal_relocs + sec->reloc_count;
9077 seq_len = GET_SEQ_LEN (irel->r_addend);
9078 laddr = irel->r_offset;
9079 *insn_len = seq_len;
9080
9081 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9082 R_NDS32_HI20_RELA, laddr);
9083 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9084 R_NDS32_LO12S0_ORI_RELA,
9085 laddr + 4);
9086
9087 if (hi_irelfn == irelend || lo_irelfn == irelend)
9088 {
9089 _bfd_error_handler
9090 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9091 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9092 return FALSE;
9093 }
9094
9095 /* Get the value of the symbol referred to by the reloc. */
9096 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9097 &pic_ext_target);
9098
9099 /* This condition only happened when symbol is undefined. */
9100 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9101 || foff >= CONSERVATIVE_24BIT_S1)
9102 return FALSE;
9103
9104 /* Relax to: jal symbol; 25_PCREL */
9105 /* For simplicity of coding, we are going to modify the section
9106 contents, the section relocs, and the BFD symbol table. We
9107 must tell the rest of the code not to free up this
9108 information. It would be possible to instead create a table
9109 of changes which have to be made, as is done in coff-mips.c;
9110 that would be more work, but would require less memory when
9111 the linker is run. */
9112
9113 /* Replace the long call with a jal. */
9114 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9115 R_NDS32_25_PCREL_RELA);
9116 irel->r_addend = hi_irelfn->r_addend;
9117
9118 /* We don't resolve this here but resolve it in relocate_section. */
9119 insn = INSN_JAL;
9120 bfd_putb32 (insn, contents + irel->r_offset);
9121
9122 hi_irelfn->r_info =
9123 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9124 lo_irelfn->r_info =
9125 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9126 *insn_len = 4;
9127
9128 if (seq_len & 0x2)
9129 {
9130 insn16 = NDS32_NOP16;
9131 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9132 lo_irelfn->r_info =
9133 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9134 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9135 *insn_len += 2;
9136 }
9137 return TRUE;
9138 }
9139
9140 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9141 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
9142
9143 static bfd_boolean
9144 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9145 Elf_Internal_Rela *internal_relocs, int *insn_len,
9146 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9147 Elf_Internal_Shdr *symtab_hdr)
9148 {
9149 /* bltz rt, .L1 ; LONGCALL2
9150 jal symbol ; 25_PCREL
9151 .L1: */
9152
9153 /* Get the reloc for the address from which the register is
9154 being loaded. This reloc will tell us which function is
9155 actually being called. */
9156
9157 bfd_vma laddr;
9158 uint32_t insn;
9159 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9160 int pic_ext_target = 0;
9161 bfd_signed_vma foff;
9162
9163 irelend = internal_relocs + sec->reloc_count;
9164 laddr = irel->r_offset;
9165 i1_irelfn =
9166 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9167 R_NDS32_25_PCREL_RELA, laddr + 4);
9168
9169 if (i1_irelfn == irelend)
9170 {
9171 _bfd_error_handler
9172 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9173 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9174 return FALSE;
9175 }
9176
9177 insn = bfd_getb32 (contents + laddr);
9178
9179 /* Get the value of the symbol referred to by the reloc. */
9180 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9181 &pic_ext_target);
9182
9183 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9184 || foff >= CONSERVATIVE_16BIT_S1)
9185 return FALSE;
9186
9187 /* Relax to bgezal rt, label ; 17_PCREL
9188 or bltzal rt, label ; 17_PCREL */
9189
9190 /* Convert to complimentary conditional call. */
9191 insn = CONVERT_CONDITION_CALL (insn);
9192
9193 /* For simplicity of coding, we are going to modify the section
9194 contents, the section relocs, and the BFD symbol table. We
9195 must tell the rest of the code not to free up this
9196 information. It would be possible to instead create a table
9197 of changes which have to be made, as is done in coff-mips.c;
9198 that would be more work, but would require less memory when
9199 the linker is run. */
9200
9201 /* Clean unnessary relocations. */
9202 i1_irelfn->r_info =
9203 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9204 cond_irelfn =
9205 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9206 R_NDS32_17_PCREL_RELA, laddr);
9207 if (cond_irelfn != irelend)
9208 cond_irelfn->r_info =
9209 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9210
9211 /* Replace the long call with a bgezal. */
9212 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9213 R_NDS32_17_PCREL_RELA);
9214 irel->r_addend = i1_irelfn->r_addend;
9215
9216 bfd_putb32 (insn, contents + irel->r_offset);
9217
9218 *insn_len = 4;
9219 return TRUE;
9220 }
9221
9222 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9223
9224 static bfd_boolean
9225 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9226 Elf_Internal_Rela *internal_relocs, int *insn_len,
9227 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9228 Elf_Internal_Shdr *symtab_hdr)
9229 {
9230 /* There are 3 variations for LONGCALL3
9231 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9232 bltz rt, $1 ; LONGCALL3
9233 sethi ta, hi20(symbol) ; HI20
9234 ori ta, ta, lo12(symbol) ; LO12S0
9235 jral5 ta ;
9236 $1
9237
9238 case 4-4-4-4; 16-bit off, optimize don't care
9239 bltz rt, $1 ; LONGCALL3
9240 sethi ta, hi20(symbol) ; HI20
9241 ori ta, ta, lo12(symbol) ; LO12S0
9242 jral ta ;
9243 $1
9244
9245 case 4-4-4-4; 16-bit on, optimize for speed
9246 bltz rt, $1 ; LONGCALL3
9247 sethi ta, hi20(symbol) ; HI20
9248 ori ta, ta, lo12(symbol) ; LO12S0
9249 jral ta ;
9250 $1 */
9251
9252 /* Get the reloc for the address from which the register is
9253 being loaded. This reloc will tell us which function is
9254 actually being called. */
9255
9256 bfd_vma laddr;
9257 int seq_len; /* Original length of instruction sequence. */
9258 uint32_t insn;
9259 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9260 int pic_ext_target = 0;
9261 bfd_signed_vma foff;
9262 uint16_t insn16;
9263
9264 irelend = internal_relocs + sec->reloc_count;
9265 seq_len = GET_SEQ_LEN (irel->r_addend);
9266 laddr = irel->r_offset;
9267 *insn_len = seq_len;
9268
9269 hi_irelfn =
9270 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9271 R_NDS32_HI20_RELA, laddr + 4);
9272 lo_irelfn =
9273 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9274 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9275
9276 if (hi_irelfn == irelend || lo_irelfn == irelend)
9277 {
9278 _bfd_error_handler
9279 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9280 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9281 return FALSE;
9282 }
9283
9284 /* Get the value of the symbol referred to by the reloc. */
9285 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9286 &pic_ext_target);
9287
9288 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9289 || foff >= CONSERVATIVE_24BIT_S1)
9290 return FALSE;
9291
9292 insn = bfd_getb32 (contents + laddr);
9293 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9294 {
9295 /* Relax to bgezal rt, label ; 17_PCREL
9296 or bltzal rt, label ; 17_PCREL */
9297
9298 /* Convert to complimentary conditional call. */
9299 insn = CONVERT_CONDITION_CALL (insn);
9300 bfd_putb32 (insn, contents + irel->r_offset);
9301
9302 *insn_len = 4;
9303 irel->r_info =
9304 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9305 hi_irelfn->r_info =
9306 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9307 lo_irelfn->r_info =
9308 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9309
9310 cond_irelfn =
9311 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9312 R_NDS32_17_PCREL_RELA, laddr);
9313 if (cond_irelfn != irelend)
9314 {
9315 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9316 R_NDS32_17_PCREL_RELA);
9317 cond_irelfn->r_addend = hi_irelfn->r_addend;
9318 }
9319
9320 if (seq_len & 0x2)
9321 {
9322 insn16 = NDS32_NOP16;
9323 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9324 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9325 R_NDS32_INSN16);
9326 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9327 insn_len += 2;
9328 }
9329 }
9330 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9331 {
9332 /* Relax to the following instruction sequence
9333 bltz rt, $1 ; LONGCALL2
9334 jal symbol ; 25_PCREL
9335 $1 */
9336 *insn_len = 8;
9337 insn = INSN_JAL;
9338 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9339
9340 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9341 R_NDS32_25_PCREL_RELA);
9342 irel->r_info =
9343 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9344
9345 lo_irelfn->r_info =
9346 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9347
9348 if (seq_len & 0x2)
9349 {
9350 insn16 = NDS32_NOP16;
9351 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9352 lo_irelfn->r_info =
9353 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9354 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9355 insn_len += 2;
9356 }
9357 }
9358 return TRUE;
9359 }
9360
9361 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
9362
9363 static bfd_boolean
9364 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9365 Elf_Internal_Rela *internal_relocs, int *insn_len,
9366 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9367 Elf_Internal_Shdr *symtab_hdr)
9368 {
9369 /* There are 3 variations for LONGJUMP1
9370 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9371 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9372 ori ta, ta, lo12(symbol) ; LO12S0
9373 jr5 ta ;
9374
9375 case 4-4-4; 16-bit off, optimize don't care
9376 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9377 ori ta, ta, lo12(symbol) ; LO12S0
9378 jr ta ;
9379
9380 case 4-4-4; 16-bit on, optimize for speed
9381 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9382 ori ta, ta, lo12(symbol) ; LO12S0
9383 jr ta ; */
9384
9385 /* Get the reloc for the address from which the register is
9386 being loaded. This reloc will tell us which function is
9387 actually being called. */
9388
9389 bfd_vma laddr;
9390 int seq_len; /* Original length of instruction sequence. */
9391 int insn16_on; /* 16-bit on/off. */
9392 uint32_t insn;
9393 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9394 int pic_ext_target = 0;
9395 bfd_signed_vma foff;
9396 uint16_t insn16;
9397 unsigned long reloc;
9398
9399 irelend = internal_relocs + sec->reloc_count;
9400 seq_len = GET_SEQ_LEN (irel->r_addend);
9401 laddr = irel->r_offset;
9402 *insn_len = seq_len;
9403 insn16_on = IS_16BIT_ON (irel->r_addend);
9404
9405 hi_irelfn =
9406 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9407 R_NDS32_HI20_RELA, laddr);
9408 lo_irelfn =
9409 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9410 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9411 if (hi_irelfn == irelend || lo_irelfn == irelend)
9412 {
9413 _bfd_error_handler
9414 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9415 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9416 return FALSE;
9417 }
9418
9419 /* Get the value of the symbol referred to by the reloc. */
9420 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9421 &pic_ext_target);
9422
9423 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9424 || foff < -CONSERVATIVE_24BIT_S1)
9425 return FALSE;
9426
9427 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9428 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9429 {
9430 /* j8 label */
9431 /* 16-bit on, but not optimized for speed. */
9432 reloc = R_NDS32_9_PCREL_RELA;
9433 insn16 = INSN_J8;
9434 bfd_putb16 (insn16, contents + irel->r_offset);
9435 *insn_len = 2;
9436 irel->r_info =
9437 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9438 }
9439 else
9440 {
9441 /* j label */
9442 reloc = R_NDS32_25_PCREL_RELA;
9443 insn = INSN_J;
9444 bfd_putb32 (insn, contents + irel->r_offset);
9445 *insn_len = 4;
9446 irel->r_info =
9447 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9448 irel->r_addend = 0;
9449 }
9450
9451 hi_irelfn->r_info =
9452 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9453 lo_irelfn->r_info =
9454 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9455
9456 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9457 {
9458 insn16 = NDS32_NOP16;
9459 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9460 lo_irelfn->r_info =
9461 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9462 R_NDS32_INSN16);
9463 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9464 *insn_len += 2;
9465 }
9466 return TRUE;
9467 }
9468
9469 /* Revert condition branch. This function does not check if the input
9470 instruction is condition branch or not. */
9471
9472 static void
9473 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9474 uint16_t *re_insn16, uint32_t *re_insn)
9475 {
9476 uint32_t comp_insn = 0;
9477 uint16_t comp_insn16 = 0;
9478
9479 if (insn)
9480 {
9481 if (N32_OP6 (insn) == N32_OP6_BR1)
9482 {
9483 /* beqs label. */
9484 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9485 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9486 {
9487 /* Insn can be contracted to 16-bit implied r5. */
9488 comp_insn16 =
9489 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9490 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9491 }
9492 }
9493 else if (N32_OP6 (insn) == N32_OP6_BR3)
9494 {
9495 /* bnec $ta, imm11, label. */
9496 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9497 }
9498 else
9499 {
9500 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9501 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9502 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9503 {
9504 if (N32_IS_RT3 (insn))
9505 {
9506 /* Insn can be contracted to 16-bit. */
9507 comp_insn16 =
9508 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9509 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9510 }
9511 else if (N32_RT5 (insn) == REG_R15)
9512 {
9513 /* Insn can be contracted to 16-bit. */
9514 comp_insn16 =
9515 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9516 }
9517 }
9518 }
9519 }
9520 else
9521 {
9522 switch ((insn16 & 0xf000) >> 12)
9523 {
9524 case 0xc:
9525 /* beqz38 or bnez38 */
9526 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9527 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9528 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9529 break;
9530
9531 case 0xd:
9532 /* beqs38 or bnes38 */
9533 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9534 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9535 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9536 | (REG_R5 << 15);
9537 break;
9538
9539 case 0xe:
9540 /* beqzS8 or bnezS8 */
9541 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9542 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9543 comp_insn |= REG_R15 << 20;
9544 break;
9545
9546 default:
9547 break;
9548 }
9549 }
9550 if (comp_insn && re_insn)
9551 *re_insn = comp_insn;
9552 if (comp_insn16 && re_insn16)
9553 *re_insn16 = comp_insn16;
9554 }
9555
9556 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
9557
9558 static bfd_boolean
9559 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9560 Elf_Internal_Rela *internal_relocs, int *insn_len,
9561 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9562 Elf_Internal_Shdr *symtab_hdr)
9563 {
9564 /* There are 3 variations for LONGJUMP2
9565 case 2-4; 1st insn convertible, 16-bit on,
9566 optimize off or optimize for space
9567 bnes38 rt, ra, $1 ; LONGJUMP2
9568 j label ; 25_PCREL
9569 $1:
9570
9571 case 4-4; 1st insn not convertible
9572 bne rt, ra, $1 ; LONGJUMP2
9573 j label ; 25_PCREL
9574 $1:
9575
9576 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9577 bne rt, ra, $1 ; LONGJUMP2
9578 j label ; 25_PCREL
9579 $1: */
9580
9581 /* Get the reloc for the address from which the register is
9582 being loaded. This reloc will tell us which function is
9583 actually being called. */
9584
9585 bfd_vma laddr;
9586 int seq_len; /* Original length of instruction sequence. */
9587 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9588 int pic_ext_target = 0, first_size;
9589 unsigned int i;
9590 bfd_signed_vma foff;
9591 uint32_t insn, re_insn = 0;
9592 uint16_t insn16, re_insn16 = 0;
9593 unsigned long reloc, cond_reloc;
9594
9595 enum elf_nds32_reloc_type checked_types[] =
9596 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9597
9598 irelend = internal_relocs + sec->reloc_count;
9599 seq_len = GET_SEQ_LEN (irel->r_addend);
9600 laddr = irel->r_offset;
9601 *insn_len = seq_len;
9602 first_size = (seq_len == 6) ? 2 : 4;
9603
9604 i2_irelfn =
9605 find_relocs_at_address_addr (irel, internal_relocs,
9606 irelend, R_NDS32_25_PCREL_RELA,
9607 laddr + first_size);
9608
9609 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9610 {
9611 cond_irelfn =
9612 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9613 checked_types[i], laddr);
9614 if (cond_irelfn != irelend)
9615 break;
9616 }
9617
9618 if (i2_irelfn == irelend || cond_irelfn == irelend)
9619 {
9620 _bfd_error_handler
9621 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9622 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9623 return FALSE;
9624 }
9625
9626 /* Get the value of the symbol referred to by the reloc. */
9627 foff =
9628 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9629 &pic_ext_target);
9630 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9631 || foff >= CONSERVATIVE_16BIT_S1)
9632 return FALSE;
9633
9634 /* Get the all corresponding instructions. */
9635 if (first_size == 4)
9636 {
9637 insn = bfd_getb32 (contents + laddr);
9638 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9639 }
9640 else
9641 {
9642 insn16 = bfd_getb16 (contents + laddr);
9643 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9644 }
9645
9646 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9647 && foff < ACCURATE_8BIT_S1 - first_size)
9648 {
9649 if (first_size == 4)
9650 {
9651 /* Don't convert it to 16-bit now, keep this as relaxable for
9652 ``label reloc; INSN16''. */
9653
9654 /* Save comp_insn32 to buffer. */
9655 bfd_putb32 (re_insn, contents + irel->r_offset);
9656 *insn_len = 4;
9657 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9658 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9659 cond_reloc = R_NDS32_INSN16;
9660 }
9661 else
9662 {
9663 bfd_putb16 (re_insn16, contents + irel->r_offset);
9664 *insn_len = 2;
9665 reloc = R_NDS32_9_PCREL_RELA;
9666 cond_reloc = R_NDS32_NONE;
9667 }
9668 }
9669 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9670 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9671 && foff < ACCURATE_14BIT_S1 - first_size))
9672 {
9673 /* beqs label ; 15_PCREL */
9674 bfd_putb32 (re_insn, contents + irel->r_offset);
9675 *insn_len = 4;
9676 reloc = R_NDS32_15_PCREL_RELA;
9677 cond_reloc = R_NDS32_NONE;
9678 }
9679 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9680 && foff >= -CONSERVATIVE_16BIT_S1
9681 && foff < CONSERVATIVE_16BIT_S1)
9682 {
9683 /* beqz label ; 17_PCREL */
9684 bfd_putb32 (re_insn, contents + irel->r_offset);
9685 *insn_len = 4;
9686 reloc = R_NDS32_17_PCREL_RELA;
9687 cond_reloc = R_NDS32_NONE;
9688 }
9689 else
9690 return FALSE;
9691
9692 /* Set all relocations. */
9693 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9694 irel->r_addend = i2_irelfn->r_addend;
9695
9696 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9697 cond_reloc);
9698 cond_irelfn->r_addend = 0;
9699
9700 if ((seq_len ^ *insn_len ) & 0x2)
9701 {
9702 insn16 = NDS32_NOP16;
9703 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9704 i2_irelfn->r_offset = 4;
9705 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9706 R_NDS32_INSN16);
9707 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9708 *insn_len += 2;
9709 }
9710 else
9711 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9712 R_NDS32_NONE);
9713 return TRUE;
9714 }
9715
9716 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
9717
9718 static bfd_boolean
9719 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9720 Elf_Internal_Rela *internal_relocs, int *insn_len,
9721 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9722 Elf_Internal_Shdr *symtab_hdr)
9723 {
9724 /* There are 5 variations for LONGJUMP3
9725 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9726 optimize off or optimize for space
9727 bnes38 rt, ra, $1 ; LONGJUMP3
9728 sethi ta, hi20(symbol) ; HI20
9729 ori ta, ta, lo12(symbol) ; LO12S0
9730 jr5 ta ;
9731 $1: ;
9732
9733 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9734 bnes38 rt, ra, $1 ; LONGJUMP3
9735 sethi ta, hi20(symbol) ; HI20
9736 ori ta, ta, lo12(symbol) ; LO12S0
9737 jr5 ta ;
9738 $1: ; LABEL
9739
9740 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9741 optimize off or optimize for space
9742 bne rt, ra, $1 ; LONGJUMP3
9743 sethi ta, hi20(symbol) ; HI20
9744 ori ta, ta, lo12(symbol) ; LO12S0
9745 jr5 ta ;
9746 $1: ;
9747
9748 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9749 16-bit off if no INSN16
9750 bne rt, ra, $1 ; LONGJUMP3
9751 sethi ta, hi20(symbol) ; HI20
9752 ori ta, ta, lo12(symbol) ; LO12S0
9753 jr ta ;
9754 $1: ;
9755
9756 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9757 16-bit off if no INSN16
9758 bne rt, ra, $1 ; LONGJUMP3
9759 sethi ta, hi20(symbol) ; HI20
9760 ori ta, ta, lo12(symbol) ; LO12S0
9761 jr ta ;
9762 $1: ; LABEL */
9763
9764 /* Get the reloc for the address from which the register is
9765 being loaded. This reloc will tell us which function is
9766 actually being called. */
9767 enum elf_nds32_reloc_type checked_types[] =
9768 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9769
9770 int reloc_off = 0, cond_removed = 0, convertible;
9771 bfd_vma laddr;
9772 int seq_len; /* Original length of instruction sequence. */
9773 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9774 int pic_ext_target = 0, first_size;
9775 unsigned int i;
9776 bfd_signed_vma foff;
9777 uint32_t insn, re_insn = 0;
9778 uint16_t insn16, re_insn16 = 0;
9779 unsigned long reloc, cond_reloc;
9780
9781 irelend = internal_relocs + sec->reloc_count;
9782 seq_len = GET_SEQ_LEN (irel->r_addend);
9783 laddr = irel->r_offset;
9784 *insn_len = seq_len;
9785
9786 convertible = IS_1ST_CONVERT (irel->r_addend);
9787
9788 if (convertible)
9789 first_size = 2;
9790 else
9791 first_size = 4;
9792
9793 /* Get all needed relocations. */
9794 hi_irelfn =
9795 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9796 R_NDS32_HI20_RELA, laddr + first_size);
9797 lo_irelfn =
9798 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9799 R_NDS32_LO12S0_ORI_RELA,
9800 laddr + first_size + 4);
9801
9802 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9803 {
9804 cond_irelfn =
9805 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9806 checked_types[i], laddr);
9807 if (cond_irelfn != irelend)
9808 break;
9809 }
9810
9811 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9812 {
9813 _bfd_error_handler
9814 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9815 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9816 return FALSE;
9817 }
9818
9819 /* Get the value of the symbol referred to by the reloc. */
9820 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9821 &pic_ext_target);
9822
9823 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9824 || foff >= CONSERVATIVE_24BIT_S1)
9825 return FALSE;
9826
9827 /* Get the all corresponding instructions. */
9828 if (first_size == 4)
9829 {
9830 insn = bfd_getb32 (contents + laddr);
9831 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9832 }
9833 else
9834 {
9835 insn16 = bfd_getb16 (contents + laddr);
9836 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9837 }
9838
9839 /* For simplicity of coding, we are going to modify the section
9840 contents, the section relocs, and the BFD symbol table. We
9841 must tell the rest of the code not to free up this
9842 information. It would be possible to instead create a table
9843 of changes which have to be made, as is done in coff-mips.c;
9844 that would be more work, but would require less memory when
9845 the linker is run. */
9846
9847 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9848 && foff < ACCURATE_8BIT_S1 - first_size)
9849 {
9850 if (!(seq_len & 0x2))
9851 {
9852 /* Don't convert it to 16-bit now, keep this as relaxable
9853 for ``label reloc; INSN1a''6. */
9854 /* Save comp_insn32 to buffer. */
9855 bfd_putb32 (re_insn, contents + irel->r_offset);
9856 *insn_len = 4;
9857 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9858 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9859 cond_reloc = R_NDS32_INSN16;
9860 }
9861 else
9862 {
9863 /* Not optimize for speed; convert sequence to 16-bit. */
9864 /* Save comp_insn16 to buffer. */
9865 bfd_putb16 (re_insn16, contents + irel->r_offset);
9866 *insn_len = 2;
9867 reloc = R_NDS32_9_PCREL_RELA;
9868 cond_reloc = R_NDS32_NONE;
9869 }
9870 cond_removed = 1;
9871 }
9872 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9873 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9874 && foff < ACCURATE_14BIT_S1 - first_size))
9875 {
9876 /* beqs label ; 15_PCREL */
9877 bfd_putb32 (re_insn, contents + irel->r_offset);
9878 *insn_len = 4;
9879 reloc = R_NDS32_15_PCREL_RELA;
9880 cond_reloc = R_NDS32_NONE;
9881 cond_removed = 1;
9882 }
9883 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9884 && foff >= -CONSERVATIVE_16BIT_S1
9885 && foff < CONSERVATIVE_16BIT_S1)
9886 {
9887 /* beqz label ; 17_PCREL */
9888 bfd_putb32 (re_insn, contents + irel->r_offset);
9889 *insn_len = 4;
9890 reloc = R_NDS32_17_PCREL_RELA;
9891 cond_reloc = R_NDS32_NONE;
9892 cond_removed = 1;
9893 }
9894 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9895 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9896 {
9897 /* Relax to one of the following 3 variations
9898
9899 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9900 for space
9901 bnes38 rt, $1 ; LONGJUMP2
9902 j label ; 25_PCREL
9903 $1
9904
9905 case 4-4; 1st insn not convertible, others don't care
9906 bne rt, ra, $1 ; LONGJUMP2
9907 j label ; 25_PCREL
9908 $1
9909
9910 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9911 bne rt, ra, $1 ; LONGJUMP2
9912 j label ; 25_PCREL
9913 $1 */
9914
9915 /* Offset for first instruction. */
9916
9917 /* Use j label as second instruction. */
9918 *insn_len = 4 + first_size;
9919 insn = INSN_J;
9920 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9921 reloc = R_NDS32_LONGJUMP2;
9922 cond_reloc = R_NDS32_25_PLTREL;
9923 }
9924 else
9925 return FALSE;
9926
9927 if (cond_removed == 1)
9928 {
9929 /* Set all relocations. */
9930 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9931 irel->r_addend = hi_irelfn->r_addend;
9932
9933 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9934 cond_reloc);
9935 cond_irelfn->r_addend = 0;
9936 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9937 R_NDS32_NONE);
9938 }
9939 else
9940 {
9941 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9942 irel->r_addend = irel->r_addend;
9943 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9944 cond_reloc);
9945 }
9946
9947 if ((seq_len ^ *insn_len ) & 0x2)
9948 {
9949 insn16 = NDS32_NOP16;
9950 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9951 lo_irelfn->r_offset = *insn_len;
9952 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9953 R_NDS32_INSN16);
9954 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9955 *insn_len += 2;
9956 }
9957 else
9958 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9959 R_NDS32_NONE);
9960 return TRUE;
9961 }
9962
9963 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
9964
9965 static bfd_boolean
9966 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9967 Elf_Internal_Rela *internal_relocs, int *insn_len,
9968 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9969 Elf_Internal_Shdr *symtab_hdr)
9970 {
9971 /* The pattern for LONGCALL4. Support for function cse.
9972 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9973 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9974 jral ta ; PTR_RES/EMPTY/INSN16 */
9975
9976 bfd_vma laddr;
9977 uint32_t insn;
9978 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9979 Elf_Internal_Rela *irelend;
9980 int pic_ext_target = 0;
9981 bfd_signed_vma foff;
9982
9983 irelend = internal_relocs + sec->reloc_count;
9984 laddr = irel->r_offset;
9985
9986 /* Get the reloc for the address from which the register is
9987 being loaded. This reloc will tell us which function is
9988 actually being called. */
9989 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9990 R_NDS32_HI20_RELA, laddr);
9991
9992 if (hi_irel == irelend)
9993 {
9994 _bfd_error_handler
9995 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9996 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9997 return FALSE;
9998 }
9999
10000 /* Get the value of the symbol referred to by the reloc. */
10001 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10002 &pic_ext_target);
10003
10004 /* This condition only happened when symbol is undefined. */
10005 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10006 || foff >= CONSERVATIVE_24BIT_S1)
10007 return FALSE;
10008
10009 /* Relax to: jal symbol; 25_PCREL */
10010 /* For simplicity of coding, we are going to modify the section
10011 contents, the section relocs, and the BFD symbol table. We
10012 must tell the rest of the code not to free up this
10013 information. It would be possible to instead create a table
10014 of changes which have to be made, as is done in coff-mips.c;
10015 that would be more work, but would require less memory when
10016 the linker is run. */
10017
10018 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10019 R_NDS32_PTR_RESOLVED, irel->r_addend);
10020 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10021 R_NDS32_EMPTY, irel->r_addend);
10022
10023 if (ptr_irel == irelend || em_irel == irelend)
10024 {
10025 _bfd_error_handler
10026 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10027 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10028 return FALSE;
10029 }
10030 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10031 insn = bfd_getb32 (contents + irel->r_addend);
10032 if (insn & 0x80000000)
10033 return FALSE;
10034
10035 /* Replace the long call with a jal. */
10036 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10037 R_NDS32_25_PCREL_RELA);
10038 ptr_irel->r_addend = 1;
10039
10040 /* We don't resolve this here but resolve it in relocate_section. */
10041 insn = INSN_JAL;
10042 bfd_putb32 (insn, contents + em_irel->r_offset);
10043
10044 irel->r_info =
10045 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10046
10047 /* If there is function cse, HI20 can not remove now. */
10048 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10049 R_NDS32_LONGCALL4, laddr);
10050 if (call_irel == irelend)
10051 {
10052 *insn_len = 0;
10053 hi_irel->r_info =
10054 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10055 }
10056
10057 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10058 R_NDS32_INSN16, irel->r_addend);
10059 if (insn_irel != irelend)
10060 insn_irel->r_info =
10061 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10062
10063 return TRUE;
10064 }
10065
10066 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
10067
10068 static bfd_boolean
10069 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10070 Elf_Internal_Rela *internal_relocs, int *insn_len,
10071 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10072 Elf_Internal_Shdr *symtab_hdr)
10073 {
10074 /* The pattern for LONGCALL5.
10075 bltz rt, .L1 ; LONGCALL5/17_PCREL
10076 jal symbol ; 25_PCREL
10077 .L1: */
10078
10079 bfd_vma laddr;
10080 uint32_t insn;
10081 Elf_Internal_Rela *cond_irel, *irelend;
10082 int pic_ext_target = 0;
10083 bfd_signed_vma foff;
10084
10085 irelend = internal_relocs + sec->reloc_count;
10086 laddr = irel->r_offset;
10087 insn = bfd_getb32 (contents + laddr);
10088
10089 /* Get the reloc for the address from which the register is
10090 being loaded. This reloc will tell us which function is
10091 actually being called. */
10092 cond_irel =
10093 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10094 R_NDS32_25_PCREL_RELA, irel->r_addend);
10095 if (cond_irel == irelend)
10096 {
10097 _bfd_error_handler
10098 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10099 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10100 return FALSE;
10101 }
10102
10103 /* Get the value of the symbol referred to by the reloc. */
10104 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10105 &pic_ext_target);
10106
10107 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10108 || foff >= CONSERVATIVE_16BIT_S1)
10109 return FALSE;
10110
10111 /* Relax to bgezal rt, label ; 17_PCREL
10112 or bltzal rt, label ; 17_PCREL */
10113
10114 /* Convert to complimentary conditional call. */
10115 insn = CONVERT_CONDITION_CALL (insn);
10116
10117 /* For simplicity of coding, we are going to modify the section
10118 contents, the section relocs, and the BFD symbol table. We
10119 must tell the rest of the code not to free up this
10120 information. It would be possible to instead create a table
10121 of changes which have to be made, as is done in coff-mips.c;
10122 that would be more work, but would require less memory when
10123 the linker is run. */
10124
10125 /* Modify relocation and contents. */
10126 cond_irel->r_info =
10127 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
10128
10129 /* Replace the long call with a bgezal. */
10130 bfd_putb32 (insn, contents + cond_irel->r_offset);
10131 *insn_len = 0;
10132
10133 /* Clean unnessary relocations. */
10134 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10135
10136 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10137 R_NDS32_17_PCREL_RELA, laddr);
10138 cond_irel->r_info =
10139 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10140
10141 return TRUE;
10142 }
10143
10144 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
10145
10146 static bfd_boolean
10147 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10148 Elf_Internal_Rela *internal_relocs, int *insn_len,
10149 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10150 Elf_Internal_Shdr *symtab_hdr)
10151 {
10152 /* The pattern for LONGCALL6.
10153 bltz rt, .L1 ; LONGCALL6/17_PCREL
10154 sethi ta, hi20(symbol) ; HI20/PTR
10155 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10156 jral ta ; PTR_RES/EMPTY/INSN16
10157 .L1 */
10158
10159 bfd_vma laddr;
10160 uint32_t insn;
10161 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10162 int pic_ext_target = 0;
10163 bfd_signed_vma foff;
10164
10165 irelend = internal_relocs + sec->reloc_count;
10166 laddr = irel->r_offset;
10167
10168 /* Get the reloc for the address from which the register is
10169 being loaded. This reloc will tell us which function is
10170 actually being called. */
10171 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10172 R_NDS32_EMPTY, irel->r_addend);
10173
10174 if (em_irel == irelend)
10175 {
10176 _bfd_error_handler
10177 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10178 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10179 return FALSE;
10180 }
10181
10182 /* Get the value of the symbol referred to by the reloc. */
10183 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10184 &pic_ext_target);
10185
10186 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10187 || foff >= CONSERVATIVE_24BIT_S1)
10188 return FALSE;
10189
10190 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10191 insn = bfd_getb32 (contents + irel->r_addend);
10192 if (insn & 0x80000000)
10193 return FALSE;
10194
10195 insn = bfd_getb32 (contents + laddr);
10196 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10197 {
10198 /* Relax to bgezal rt, label ; 17_PCREL
10199 or bltzal rt, label ; 17_PCREL */
10200
10201 /* Convert to complimentary conditional call. */
10202 *insn_len = 0;
10203 insn = CONVERT_CONDITION_CALL (insn);
10204 bfd_putb32 (insn, contents + em_irel->r_offset);
10205
10206 em_irel->r_info =
10207 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10208
10209 /* Set resolved relocation. */
10210 cond_irel =
10211 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10212 R_NDS32_PTR_RESOLVED, irel->r_addend);
10213 if (cond_irel == irelend)
10214 {
10215 _bfd_error_handler
10216 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10217 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10218 return FALSE;
10219 }
10220 cond_irel->r_addend = 1;
10221
10222 /* Clear relocations. */
10223
10224 irel->r_info =
10225 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10226
10227 cond_irel =
10228 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10229 R_NDS32_17_PCREL_RELA, laddr);
10230 if (cond_irel != irelend)
10231 cond_irel->r_info =
10232 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10233
10234 cond_irel =
10235 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10236 R_NDS32_INSN16, irel->r_addend);
10237 if (cond_irel != irelend)
10238 cond_irel->r_info =
10239 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10240
10241 }
10242 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10243 {
10244 /* Relax to the following instruction sequence
10245 bltz rt, .L1 ; LONGCALL2/17_PCREL
10246 jal symbol ; 25_PCREL/PTR_RES
10247 .L1 */
10248 *insn_len = 4;
10249 /* Convert instruction. */
10250 insn = INSN_JAL;
10251 bfd_putb32 (insn, contents + em_irel->r_offset);
10252
10253 /* Convert relocations. */
10254 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10255 R_NDS32_25_PCREL_RELA);
10256 irel->r_info =
10257 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
10258
10259 /* Set resolved relocation. */
10260 cond_irel =
10261 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10262 R_NDS32_PTR_RESOLVED, irel->r_addend);
10263 if (cond_irel == irelend)
10264 {
10265 _bfd_error_handler
10266 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10267 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10268 return FALSE;
10269 }
10270 cond_irel->r_addend = 1;
10271
10272 cond_irel =
10273 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10274 R_NDS32_INSN16, irel->r_addend);
10275 if (cond_irel != irelend)
10276 cond_irel->r_info =
10277 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10278 }
10279 return TRUE;
10280 }
10281
10282 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
10283
10284 static bfd_boolean
10285 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10286 Elf_Internal_Rela *internal_relocs, int *insn_len,
10287 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10288 Elf_Internal_Shdr *symtab_hdr)
10289 {
10290 /* The pattern for LONGJUMP4.
10291 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10292 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10293 jr ta ; PTR_RES/INSN16/EMPTY */
10294
10295 bfd_vma laddr;
10296 int seq_len; /* Original length of instruction sequence. */
10297 uint32_t insn;
10298 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10299 int pic_ext_target = 0;
10300 bfd_signed_vma foff;
10301
10302 irelend = internal_relocs + sec->reloc_count;
10303 seq_len = GET_SEQ_LEN (irel->r_addend);
10304 laddr = irel->r_offset;
10305 *insn_len = seq_len;
10306
10307 /* Get the reloc for the address from which the register is
10308 being loaded. This reloc will tell us which function is
10309 actually being called. */
10310
10311 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10312 R_NDS32_HI20_RELA, laddr);
10313
10314 if (hi_irel == irelend)
10315 {
10316 _bfd_error_handler
10317 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10318 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10319 return FALSE;
10320 }
10321
10322 /* Get the value of the symbol referred to by the reloc. */
10323 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10324 &pic_ext_target);
10325
10326 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10327 || foff < -CONSERVATIVE_24BIT_S1)
10328 return FALSE;
10329
10330 /* Convert it to "j label", it may be converted to j8 in the final
10331 pass of relaxation. Therefore, we do not consider this currently. */
10332 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10333 R_NDS32_PTR_RESOLVED, irel->r_addend);
10334 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10335 R_NDS32_EMPTY, irel->r_addend);
10336
10337 if (ptr_irel == irelend || em_irel == irelend)
10338 {
10339 _bfd_error_handler
10340 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10341 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10342 return FALSE;
10343 }
10344
10345 em_irel->r_info =
10346 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10347 ptr_irel->r_addend = 1;
10348
10349 /* Write instruction. */
10350 insn = INSN_J;
10351 bfd_putb32 (insn, contents + em_irel->r_offset);
10352
10353 /* Clear relocations. */
10354 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10355
10356 /* If there is function cse, HI20 can not remove now. */
10357 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10358 R_NDS32_LONGJUMP4, laddr);
10359 if (call_irel == irelend)
10360 {
10361 *insn_len = 0;
10362 hi_irel->r_info =
10363 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10364 }
10365
10366 return TRUE;
10367 }
10368
10369 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
10370
10371 static bfd_boolean
10372 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10373 Elf_Internal_Rela *internal_relocs, int *insn_len,
10374 int *seq_len, bfd_byte *contents,
10375 Elf_Internal_Sym *isymbuf,
10376 Elf_Internal_Shdr *symtab_hdr)
10377 {
10378 /* There are 2 variations for LONGJUMP5
10379 case 2-4; 1st insn convertible, 16-bit on.
10380 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10381 j label ; 25_PCREL/INSN16
10382 $1:
10383
10384 case 4-4; 1st insn not convertible
10385 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10386 j label ; 25_PCREL/INSN16
10387 .L1: */
10388
10389 bfd_vma laddr;
10390 Elf_Internal_Rela *cond_irel, *irelend;
10391 int pic_ext_target = 0;
10392 unsigned int i;
10393 bfd_signed_vma foff;
10394 uint32_t insn, re_insn = 0;
10395 uint16_t insn16, re_insn16 = 0;
10396 unsigned long reloc;
10397
10398 enum elf_nds32_reloc_type checked_types[] =
10399 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10400 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10401
10402 irelend = internal_relocs + sec->reloc_count;
10403 laddr = irel->r_offset;
10404
10405 /* Get the reloc for the address from which the register is
10406 being loaded. This reloc will tell us which function is
10407 actually being called. */
10408
10409 cond_irel =
10410 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10411 R_NDS32_25_PCREL_RELA, irel->r_addend);
10412 if (cond_irel == irelend)
10413 {
10414 _bfd_error_handler
10415 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10416 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10417 return FALSE;
10418 }
10419
10420 /* Get the value of the symbol referred to by the reloc. */
10421 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10422 &pic_ext_target);
10423
10424 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10425 || foff >= CONSERVATIVE_16BIT_S1)
10426 return FALSE;
10427
10428 /* Get the all corresponding instructions. */
10429 insn = bfd_getb32 (contents + laddr);
10430 /* Check instruction size. */
10431 if (insn & 0x80000000)
10432 {
10433 *seq_len = 0;
10434 insn16 = insn >> 16;
10435 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10436 }
10437 else
10438 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10439
10440 if (N32_OP6 (re_insn) == N32_OP6_BR1
10441 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10442 {
10443 /* beqs label ; 15_PCREL. */
10444 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10445 reloc = R_NDS32_15_PCREL_RELA;
10446 }
10447 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10448 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10449 {
10450 /* beqz label ; 17_PCREL. */
10451 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10452 reloc = R_NDS32_17_PCREL_RELA;
10453 }
10454 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10455 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10456 {
10457 /* beqc label ; 9_PCREL. */
10458 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10459 reloc = R_NDS32_WORD_9_PCREL_RELA;
10460 }
10461 else
10462 return FALSE;
10463
10464 /* Set all relocations. */
10465 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
10466
10467 /* Clean relocations. */
10468 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10469 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10470 {
10471 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10472 checked_types[i], laddr);
10473 if (cond_irel != irelend)
10474 {
10475 if (*seq_len == 0
10476 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10477 {
10478 /* If the branch instruction is 2 byte, it cannot remove
10479 directly. Only convert it to nop16 and remove it after
10480 checking alignment issue. */
10481 insn16 = NDS32_NOP16;
10482 bfd_putb16 (insn16, contents + laddr);
10483 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10484 }
10485 else
10486 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10487 R_NDS32_NONE);
10488 }
10489 }
10490 *insn_len = 0;
10491
10492 return TRUE;
10493 }
10494
10495 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
10496
10497 static bfd_boolean
10498 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10499 Elf_Internal_Rela *internal_relocs, int *insn_len,
10500 int *seq_len, bfd_byte *contents,
10501 Elf_Internal_Sym *isymbuf,
10502 Elf_Internal_Shdr *symtab_hdr)
10503 {
10504 /* There are 5 variations for LONGJUMP6
10505 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10506 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10507 sethi ta, hi20(symbol) ; HI20/PTR
10508 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10509 jr ta ; PTR_RES/INSN16/EMPTY
10510 .L1:
10511
10512 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10513 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10514 sethi ta, hi20(symbol) ; HI20/PTR
10515 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10516 jr ta ; PTR_RES/INSN16/EMPTY
10517 .L1: */
10518
10519 enum elf_nds32_reloc_type checked_types[] =
10520 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10521 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10522
10523 int reloc_off = 0, cond_removed = 0;
10524 bfd_vma laddr;
10525 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10526 int pic_ext_target = 0;
10527 unsigned int i;
10528 bfd_signed_vma foff;
10529 uint32_t insn, re_insn = 0;
10530 uint16_t insn16, re_insn16 = 0;
10531 unsigned long reloc;
10532
10533 irelend = internal_relocs + sec->reloc_count;
10534 laddr = irel->r_offset;
10535
10536 /* Get the reloc for the address from which the register is
10537 being loaded. This reloc will tell us which function is
10538 actually being called. */
10539 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10540 R_NDS32_EMPTY, irel->r_addend);
10541
10542 if (em_irel == irelend)
10543 {
10544 _bfd_error_handler
10545 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10546 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10547 return FALSE;
10548 }
10549
10550 /* Get the value of the symbol referred to by the reloc. */
10551 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10552 &pic_ext_target);
10553
10554 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10555 || foff >= CONSERVATIVE_24BIT_S1)
10556 return FALSE;
10557
10558 insn = bfd_getb32 (contents + laddr);
10559 /* Check instruction size. */
10560 if (insn & 0x80000000)
10561 {
10562 *seq_len = 0;
10563 insn16 = insn >> 16;
10564 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10565 }
10566 else
10567 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10568
10569 /* For simplicity of coding, we are going to modify the section
10570 contents, the section relocs, and the BFD symbol table. We
10571 must tell the rest of the code not to free up this
10572 information. It would be possible to instead create a table
10573 of changes which have to be made, as is done in coff-mips.c;
10574 that would be more work, but would require less memory when
10575 the linker is run. */
10576
10577 if (N32_OP6 (re_insn) == N32_OP6_BR1
10578 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10579 {
10580 /* beqs label ; 15_PCREL */
10581 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10582 reloc = R_NDS32_15_PCREL_RELA;
10583 cond_removed = 1;
10584 }
10585 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10586 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10587 {
10588 /* beqz label ; 17_PCREL */
10589 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10590 reloc = R_NDS32_17_PCREL_RELA;
10591 cond_removed = 1;
10592 }
10593 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10594 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10595 {
10596 /* Relax to one of the following 2 variations
10597
10598 case 2-4; 1st insn convertible, 16-bit on.
10599 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10600 j label ; 25_PCREL/INSN16
10601 $1:
10602
10603 case 4-4; 1st insn not convertible
10604 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10605 j label ; 25_PCREL/INSN16
10606 .L1: */
10607
10608 /* Use j label as second instruction. */
10609 insn = INSN_J;
10610 reloc = R_NDS32_25_PCREL_RELA;
10611 bfd_putb32 (insn, contents + em_irel->r_offset);
10612 }
10613 else
10614 return FALSE;
10615
10616 /* Set all relocations. */
10617 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
10618
10619 cond_irel =
10620 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10621 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10622 cond_irel->r_addend = 1;
10623
10624 /* Use INSN16 of first branch instruction to distinguish if keeping
10625 INSN16 of final instruction or not. */
10626 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10627 R_NDS32_INSN16, irel->r_offset);
10628 if (insn_irel == irelend)
10629 {
10630 /* Clean the final INSN16. */
10631 insn_irel =
10632 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10633 R_NDS32_INSN16, em_irel->r_offset);
10634 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10635 R_NDS32_NONE);
10636 }
10637
10638 if (cond_removed == 1)
10639 {
10640 *insn_len = 0;
10641
10642 /* Clear relocations. */
10643 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10644
10645 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10646 {
10647 cond_irel =
10648 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10649 checked_types[i], laddr);
10650 if (cond_irel != irelend)
10651 {
10652 if (*seq_len == 0
10653 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10654 {
10655 /* If the branch instruction is 2 byte, it cannot remove
10656 directly. Only convert it to nop16 and remove it after
10657 checking alignment issue. */
10658 insn16 = NDS32_NOP16;
10659 bfd_putb16 (insn16, contents + laddr);
10660 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10661 }
10662 else
10663 cond_irel->r_info =
10664 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10665 }
10666 }
10667 }
10668 else
10669 {
10670 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10671 R_NDS32_LONGJUMP5);
10672 }
10673
10674 return TRUE;
10675 }
10676
10677 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
10678
10679 static bfd_boolean
10680 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10681 Elf_Internal_Rela *internal_relocs, int *insn_len,
10682 int *seq_len, bfd_byte *contents,
10683 Elf_Internal_Sym *isymbuf,
10684 Elf_Internal_Shdr *symtab_hdr)
10685 {
10686 /* There are 2 variations for LONGJUMP5
10687 case 2-4; 1st insn convertible, 16-bit on.
10688 movi55 ta, imm11 ; LONGJUMP7/INSN16
10689 beq rt, ta, label ; 15_PCREL
10690
10691 case 4-4; 1st insn not convertible
10692 movi55 ta, imm11 ; LONGJUMP7/INSN16
10693 beq rt, ta, label ; 15_PCREL */
10694
10695 bfd_vma laddr;
10696 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10697 int pic_ext_target = 0;
10698 bfd_signed_vma foff;
10699 uint32_t insn, re_insn = 0;
10700 uint16_t insn16;
10701 uint32_t imm11;
10702
10703 irelend = internal_relocs + sec->reloc_count;
10704 laddr = irel->r_offset;
10705
10706 /* Get the reloc for the address from which the register is
10707 being loaded. This reloc will tell us which function is
10708 actually being called. */
10709
10710 cond_irel =
10711 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10712 R_NDS32_15_PCREL_RELA, irel->r_addend);
10713 if (cond_irel == irelend)
10714 {
10715 _bfd_error_handler
10716 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10717 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10718 return FALSE;
10719 }
10720
10721 /* Get the value of the symbol referred to by the reloc. */
10722 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10723 &pic_ext_target);
10724
10725 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10726 || foff >= CONSERVATIVE_8BIT_S1)
10727 return FALSE;
10728
10729 /* Get the first instruction for its size. */
10730 insn = bfd_getb32 (contents + laddr);
10731 if (insn & 0x80000000)
10732 {
10733 *seq_len = 0;
10734 /* Get the immediate from movi55. */
10735 imm11 = N16_IMM5S (insn >> 16);
10736 }
10737 else
10738 {
10739 /* Get the immediate from movi. */
10740 imm11 = N32_IMM20S (insn);
10741 }
10742
10743 /* Get the branch instruction. */
10744 insn = bfd_getb32 (contents + irel->r_addend);
10745 /* Convert instruction to BR3. */
10746 if ((insn >> 14) & 0x1)
10747 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10748 else
10749 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
10750
10751 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10752
10753 /* Set all relocations. */
10754 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10755 R_NDS32_WORD_9_PCREL_RELA);
10756
10757 /* Clean relocations. */
10758 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10759 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10760 R_NDS32_INSN16, irel->r_offset);
10761 if (insn_irel != irelend)
10762 {
10763 if (*seq_len == 0)
10764 {
10765 /* If the first insntruction is 16bit, convert it to nop16. */
10766 insn16 = NDS32_NOP16;
10767 bfd_putb16 (insn16, contents + laddr);
10768 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10769 }
10770 else
10771 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10772 R_NDS32_NONE);
10773 }
10774 *insn_len = 0;
10775
10776 return TRUE;
10777 }
10778
10779 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
10780
10781 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */
10782
10783 static bfd_boolean
10784 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10785 asection *sec, Elf_Internal_Rela *irel,
10786 Elf_Internal_Rela *internal_relocs, int *insn_len,
10787 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10788 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10789 {
10790 int eliminate_sethi = 0, range_type;
10791 unsigned int i;
10792 bfd_vma local_sda, laddr;
10793 int seq_len; /* Original length of instruction sequence. */
10794 uint32_t insn;
10795 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10796 bfd_vma access_addr = 0;
10797 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10798 enum elf_nds32_reloc_type checked_types[] =
10799 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10800 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10801 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10802 R_NDS32_TLS_LE_HI20
10803 };
10804
10805 irelend = internal_relocs + sec->reloc_count;
10806 seq_len = GET_SEQ_LEN (irel->r_addend);
10807 laddr = irel->r_offset;
10808 *insn_len = seq_len;
10809
10810 /* Get the high part relocation. */
10811 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
10812 {
10813 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10814 checked_types[i], laddr);
10815 if (hi_irelfn != irelend)
10816 break;
10817 }
10818
10819 if (hi_irelfn == irelend)
10820 {
10821 _bfd_error_handler
10822 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10823 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10824 return FALSE;
10825 }
10826
10827 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10828 nds32_elf_final_sda_base (sec->output_section->owner,
10829 link_info, &local_sda, FALSE);
10830
10831 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10832 {
10833 case R_NDS32_HI20_RELA:
10834 insn = bfd_getb32 (contents + laddr);
10835 access_addr =
10836 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10837
10838 if (range_type == NDS32_LOADSTORE_IMM)
10839 {
10840 struct elf_link_hash_entry *h = NULL;
10841 int indx;
10842
10843 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
10844 {
10845 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10846 h = elf_sym_hashes (abfd)[indx];
10847 }
10848
10849 if ((access_addr < CONSERVATIVE_20BIT)
10850 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10851 {
10852 eliminate_sethi = 1;
10853 break;
10854 }
10855
10856 /* This is avoid to relax symbol address which is fixed
10857 relocations. Ex: _stack. */
10858 if (h && bfd_is_abs_section (h->root.u.def.section))
10859 return FALSE;
10860 }
10861
10862 if (!load_store_relax)
10863 return FALSE;
10864
10865 /* Case for set gp register. */
10866 if (N32_RT5 (insn) == REG_GP)
10867 break;
10868
10869 if (range_type == NDS32_LOADSTORE_FLOAT_S
10870 || range_type == NDS32_LOADSTORE_FLOAT_S)
10871 {
10872 range_l = sdata_range[0][0];
10873 range_h = sdata_range[0][1];
10874 }
10875 else
10876 {
10877 range_l = sdata_range[1][0];
10878 range_h = sdata_range[1][1];
10879 }
10880 break;
10881
10882 case R_NDS32_GOT_HI20:
10883 access_addr =
10884 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10885
10886 /* If this symbol is not in .got, the return value will be -1.
10887 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10888 a negative offset is allowed. */
10889 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10890 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10891 eliminate_sethi = 1;
10892 break;
10893
10894 case R_NDS32_PLT_GOTREL_HI20:
10895 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10896 hi_irelfn, symtab_hdr);
10897
10898 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10899 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10900 eliminate_sethi = 1;
10901 break;
10902
10903 case R_NDS32_GOTOFF_HI20:
10904 access_addr =
10905 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10906
10907 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10908 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10909 eliminate_sethi = 1;
10910 break;
10911
10912 case R_NDS32_GOTPC_HI20:
10913 /* The access_addr must consider r_addend of hi_irel. */
10914 access_addr = sec->output_section->vma + sec->output_offset
10915 + irel->r_offset + hi_irelfn->r_addend;
10916
10917 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10918 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10919 eliminate_sethi = 1;
10920 break;
10921
10922 case R_NDS32_TLS_LE_HI20:
10923 access_addr =
10924 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10925 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10926 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10927 if ((range_type == NDS32_LOADSTORE_IMM)
10928 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10929 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10930 eliminate_sethi = 1;
10931 break;
10932
10933 default:
10934 return FALSE;
10935 }
10936
10937 /* Delete sethi instruction. */
10938 if (eliminate_sethi == 1
10939 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10940 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10941 {
10942 hi_irelfn->r_info =
10943 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10944 irel->r_info =
10945 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10946 *insn_len = 0;
10947 }
10948 return TRUE;
10949 }
10950
10951 /* Relax LO12 relocation for nds32_elf_relax_section. */
10952
10953 static void
10954 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10955 asection *sec, Elf_Internal_Rela *irel,
10956 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10957 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10958 {
10959 uint32_t insn;
10960 bfd_vma local_sda, laddr;
10961 unsigned long reloc;
10962 bfd_vma access_addr;
10963 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10964 Elf_Internal_Rela *irelfn = NULL, *irelend;
10965 struct elf_link_hash_entry *h = NULL;
10966 int indx;
10967
10968 /* For SDA base relative relaxation. */
10969 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10970 &local_sda, FALSE);
10971
10972 irelend = internal_relocs + sec->reloc_count;
10973 laddr = irel->r_offset;
10974 insn = bfd_getb32 (contents + laddr);
10975
10976 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10977 return;
10978
10979 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10980
10981 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10982 {
10983 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10984 h = elf_sym_hashes (abfd)[indx];
10985 }
10986
10987 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10988 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10989 {
10990 reloc = R_NDS32_20_RELA;
10991 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10992 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10993 bfd_putb32 (insn, contents + laddr);
10994 }
10995 /* This is avoid to relax symbol address which is fixed
10996 relocations. Ex: _stack. */
10997 else if (N32_OP6 (insn) == N32_OP6_ORI
10998 && h && bfd_is_abs_section (h->root.u.def.section))
10999 return;
11000 else
11001 {
11002 range_l = sdata_range[1][0];
11003 range_h = sdata_range[1][1];
11004 switch (ELF32_R_TYPE (irel->r_info))
11005 {
11006 case R_NDS32_LO12S0_RELA:
11007 reloc = R_NDS32_SDA19S0_RELA;
11008 break;
11009 case R_NDS32_LO12S1_RELA:
11010 reloc = R_NDS32_SDA18S1_RELA;
11011 break;
11012 case R_NDS32_LO12S2_RELA:
11013 reloc = R_NDS32_SDA17S2_RELA;
11014 break;
11015 case R_NDS32_LO12S2_DP_RELA:
11016 range_l = sdata_range[0][0];
11017 range_h = sdata_range[0][1];
11018 reloc = R_NDS32_SDA12S2_DP_RELA;
11019 break;
11020 case R_NDS32_LO12S2_SP_RELA:
11021 range_l = sdata_range[0][0];
11022 range_h = sdata_range[0][1];
11023 reloc = R_NDS32_SDA12S2_SP_RELA;
11024 break;
11025 default:
11026 return;
11027 }
11028
11029 /* There are range_h and range_l because linker has to promise
11030 all sections move cross one page together. */
11031 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11032 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11033 {
11034 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
11035 {
11036 /* Maybe we should add R_NDS32_INSN16 reloc type here
11037 or manually do some optimization. sethi can't be
11038 eliminated when updating $gp so the relative ori
11039 needs to be preserved. */
11040 return;
11041 }
11042 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11043 &insn))
11044 return;
11045 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11046 bfd_putb32 (insn, contents + laddr);
11047
11048 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11049 R_NDS32_INSN16);
11050 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11051 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11052 irelfn->r_info =
11053 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11054
11055 }
11056 }
11057 return;
11058 }
11059
11060 /* Relax low part of PIC instruction pattern. */
11061
11062 static void
11063 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11064 asection *sec, Elf_Internal_Rela *irel,
11065 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11066 Elf_Internal_Shdr *symtab_hdr)
11067 {
11068 uint32_t insn;
11069 bfd_vma local_sda, laddr;
11070 bfd_signed_vma foff;
11071 unsigned long reloc;
11072
11073 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11074 &local_sda, FALSE);
11075 laddr = irel->r_offset;
11076 insn = bfd_getb32 (contents + laddr);
11077
11078 if (N32_OP6 (insn) != N32_OP6_ORI)
11079 return;
11080
11081 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11082 {
11083 foff = calculate_got_memory_address (abfd, link_info, irel,
11084 symtab_hdr) - local_sda;
11085 reloc = R_NDS32_GOT20;
11086 }
11087 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11088 {
11089 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11090 symtab_hdr) - local_sda;
11091 reloc = R_NDS32_PLT_GOTREL_LO20;
11092 }
11093 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11094 {
11095 foff = calculate_memory_address (abfd, irel, isymbuf,
11096 symtab_hdr) - local_sda;
11097 reloc = R_NDS32_GOTOFF;
11098 }
11099 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11100 {
11101 foff = local_sda - sec->output_section->vma + sec->output_offset
11102 + irel->r_offset + irel->r_addend;
11103 reloc = R_NDS32_GOTPC20;
11104 }
11105 else
11106 return;
11107
11108 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11109 {
11110 /* Turn into MOVI. */
11111 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11112 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11113 bfd_putb32 (insn, contents + laddr);
11114 }
11115 }
11116
11117 /* Relax low part of LE TLS instruction pattern. */
11118
11119 static void
11120 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11121 Elf_Internal_Rela *irel,
11122 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11123 Elf_Internal_Shdr *symtab_hdr)
11124 {
11125 uint32_t insn;
11126 bfd_vma laddr;
11127 bfd_signed_vma foff;
11128 unsigned long reloc;
11129
11130 laddr = irel->r_offset;
11131 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11132 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11133 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11134 insn = bfd_getb32 (contents + laddr);
11135
11136 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11137 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11138 {
11139 /* Pattern sethi-ori transform to movi. */
11140 reloc = R_NDS32_TLS_LE_20;
11141 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11142 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11143 bfd_putb32 (insn, contents + laddr);
11144 }
11145 }
11146
11147 /* Relax LE TLS calculate address instruction pattern. */
11148
11149 static void
11150 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11151 asection *sec, Elf_Internal_Rela *irel,
11152 Elf_Internal_Rela *internal_relocs,
11153 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11154 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11155 {
11156 /* Local TLS non-pic
11157 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11158 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11159 add ra, ta, tp ; TLS_LE_ADD */
11160
11161 uint32_t insn;
11162 bfd_vma laddr;
11163 bfd_signed_vma foff;
11164 Elf_Internal_Rela *i1_irelfn, *irelend;
11165
11166 irelend = internal_relocs + sec->reloc_count;
11167 laddr = irel->r_offset;
11168 insn = bfd_getb32 (contents + laddr);
11169 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11170 R_NDS32_PTR_RESOLVED);
11171 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11172 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11173 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11174
11175 /* The range is +/-16k. */
11176 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11177 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11178 {
11179 /* Transform add to addi. */
11180 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11181 irel->r_info =
11182 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11183
11184 bfd_putb32 (insn, contents + laddr);
11185 if (i1_irelfn != irelend)
11186 {
11187 i1_irelfn->r_addend |= 1;
11188 *again = TRUE;
11189 }
11190 }
11191 }
11192
11193 /* Relax LE TLS load store instruction pattern. */
11194
11195 static void
11196 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11197 asection *sec, Elf_Internal_Rela *irel,
11198 Elf_Internal_Rela *internal_relocs,
11199 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11200 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11201 {
11202
11203 uint32_t insn;
11204 bfd_vma laddr;
11205 bfd_signed_vma foff;
11206 Elf_Internal_Rela *i1_irelfn, *irelend;
11207 int success = 0;
11208
11209 irelend = internal_relocs + sec->reloc_count;
11210 laddr = irel->r_offset;
11211 insn = bfd_getb32 (contents + laddr);
11212 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11213 R_NDS32_PTR_RESOLVED);
11214 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11215 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11216 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11217
11218 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11219 {
11220 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11221 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11222 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11223 /* The range is +/-16k. */
11224 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11225 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11226 {
11227 insn =
11228 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11229 irel->r_info =
11230 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11231 success = 1;
11232 break;
11233 }
11234 /* Fall through. */
11235 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11236 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11237 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11238 /* The range is +/-32k. */
11239 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11240 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
11241 {
11242 insn =
11243 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11244 irel->r_info =
11245 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11246 success = 1;
11247 break;
11248 }
11249 /* Fall through. */
11250 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11251 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11252 /* The range is +/-64k. */
11253 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11254 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11255 {
11256 insn =
11257 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11258 irel->r_info =
11259 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11260 success = 1;
11261 break;
11262 }
11263 /* Fall through. */
11264 default:
11265 break;
11266 }
11267
11268 if (success)
11269 {
11270 bfd_putb32 (insn, contents + laddr);
11271 if (i1_irelfn != irelend)
11272 {
11273 i1_irelfn->r_addend |= 1;
11274 *again = TRUE;
11275 }
11276 }
11277 }
11278
11279 /* Relax PTR relocation for nds32_elf_relax_section. */
11280
11281 static bfd_boolean
11282 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11283 Elf_Internal_Rela *internal_relocs, int *insn_len,
11284 int *seq_len, bfd_byte *contents)
11285 {
11286 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
11287
11288 irelend = internal_relocs + sec->reloc_count;
11289
11290 re_irel =
11291 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11292 R_NDS32_PTR_RESOLVED, irel->r_addend);
11293
11294 if (re_irel == irelend)
11295 {
11296 _bfd_error_handler
11297 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11298 abfd, (long) irel->r_offset);
11299 return FALSE;
11300 }
11301
11302 if (re_irel->r_addend != 1)
11303 return FALSE;
11304
11305 /* Pointed target is relaxed and no longer needs this void *,
11306 change the type to NONE. */
11307 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11308
11309 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11310 not exist, it means only count 1 and remove it directly. */
11311 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11312 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11313 R_NDS32_PTR_COUNT);
11314 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11315 R_NDS32_PTR);
11316 if (count_irel != irelend)
11317 {
11318 if (--count_irel->r_addend > 0)
11319 return FALSE;
11320 }
11321
11322 if (ptr_irel != irelend)
11323 return FALSE;
11324
11325 /* If the PTR_COUNT is already 0, remove current instruction. */
11326 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11327 *insn_len = 0;
11328 return TRUE;
11329 }
11330
11331 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11332
11333 static void
11334 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11335 asection *sec, Elf_Internal_Rela *irel,
11336 Elf_Internal_Rela *internal_relocs,
11337 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11338 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11339 {
11340 uint32_t insn;
11341 bfd_signed_vma foff;
11342 Elf_Internal_Rela *i1_irelfn, *irelend;
11343 bfd_vma local_sda, laddr;
11344
11345 irelend = internal_relocs + sec->reloc_count;
11346 laddr = irel->r_offset;
11347 insn = bfd_getb32 (contents + laddr);
11348
11349 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11350 we need additional space. It might be help if we could
11351 borrow some space from instructions to be eliminated
11352 such as sethi, ori, add. */
11353 if (insn & 0x80000000)
11354 return;
11355
11356 if (nds32_elf_check_dup_relocs
11357 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11358 return;
11359
11360 i1_irelfn =
11361 find_relocs_at_address (irel, internal_relocs, irelend,
11362 R_NDS32_PTR_RESOLVED);
11363
11364 /* FIXIT 090606
11365 The boundary should be reduced since the .plt section hasn't
11366 been created and the address of specific entry is still unknown
11367 Maybe the range between the function call and the begin of the
11368 .text section can be used to decide if the .plt is in the range
11369 of function call. */
11370
11371 if (N32_OP6 (insn) == N32_OP6_ALU1
11372 && N32_SUB5 (insn) == N32_ALU1_ADD)
11373 {
11374 /* Get the value of the symbol referred to by the reloc. */
11375 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11376 &local_sda, FALSE);
11377 foff = (bfd_signed_vma) (calculate_plt_memory_address
11378 (abfd, link_info, isymbuf, irel,
11379 symtab_hdr) - local_sda);
11380 /* This condition only happened when symbol is undefined. */
11381 if (foff == 0)
11382 return;
11383
11384 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11385 return;
11386 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11387 R_NDS32_PLT_GOTREL_LO19);
11388 /* addi.gp */
11389 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11390 }
11391 else if (N32_OP6 (insn) == N32_OP6_JREG
11392 && N32_SUB5 (insn) == N32_JREG_JRAL)
11393 {
11394 /* Get the value of the symbol referred to by the reloc. */
11395 foff =
11396 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11397 /* This condition only happened when symbol is undefined. */
11398 if (foff == 0)
11399 return;
11400 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11401 return;
11402 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11403 insn = INSN_JAL;
11404 }
11405 else
11406 return;
11407
11408 bfd_putb32 (insn, contents + laddr);
11409 if (i1_irelfn != irelend)
11410 {
11411 i1_irelfn->r_addend |= 1;
11412 *again = TRUE;
11413 }
11414 }
11415
11416 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11417
11418 static void
11419 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11420 asection *sec, Elf_Internal_Rela *irel,
11421 Elf_Internal_Rela *internal_relocs,
11422 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11423 bfd_boolean *again)
11424 {
11425 uint32_t insn;
11426 bfd_signed_vma foff;
11427 Elf_Internal_Rela *i1_irelfn, *irelend;
11428 bfd_vma local_sda, laddr;
11429
11430 irelend = internal_relocs + sec->reloc_count;
11431 laddr = irel->r_offset;
11432 insn = bfd_getb32 (contents + laddr);
11433 if (insn & 0x80000000)
11434 return;
11435
11436 if (nds32_elf_check_dup_relocs
11437 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11438 return;
11439
11440 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11441 R_NDS32_PTR_RESOLVED);
11442
11443 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11444 &local_sda, FALSE);
11445 foff = calculate_got_memory_address (abfd, link_info, irel,
11446 symtab_hdr) - local_sda;
11447
11448 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11449 {
11450 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11451 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11452 irel->r_info =
11453 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11454 bfd_putb32 (insn, contents + laddr);
11455 if (i1_irelfn != irelend)
11456 {
11457 i1_irelfn->r_addend |= 1;
11458 *again = TRUE;
11459 }
11460 }
11461 }
11462
11463 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11464
11465 static void
11466 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11467 asection *sec, Elf_Internal_Rela *irel,
11468 Elf_Internal_Rela *internal_relocs,
11469 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11470 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11471 {
11472 int opc_insn_gotoff;
11473 uint32_t insn;
11474 bfd_signed_vma foff;
11475 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11476 bfd_vma local_sda, laddr;
11477
11478 irelend = internal_relocs + sec->reloc_count;
11479 laddr = irel->r_offset;
11480 insn = bfd_getb32 (contents + laddr);
11481
11482 if (insn & 0x80000000)
11483 return;
11484
11485 if (nds32_elf_check_dup_relocs
11486 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11487 return;
11488
11489 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11490 R_NDS32_PTR_RESOLVED);
11491 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11492 &local_sda, FALSE);
11493 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11494 foff = foff - local_sda;
11495
11496 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11497 return;
11498
11499 /* Concatenate opcode and sub-opcode for switch case.
11500 It may be MEM or ALU1. */
11501 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11502 switch (opc_insn_gotoff)
11503 {
11504 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11505 /* 4-byte aligned. */
11506 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11507 irel->r_info =
11508 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11509 break;
11510 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11511 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11512 irel->r_info =
11513 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11514 break;
11515 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11516 /* 2-byte aligned. */
11517 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11518 irel->r_info =
11519 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11520 break;
11521 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11522 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11523 irel->r_info =
11524 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11525 break;
11526 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11527 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11528 irel->r_info =
11529 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11530 break;
11531 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11532 /* 1-byte aligned. */
11533 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11534 irel->r_info =
11535 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11536 break;
11537 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11538 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11539 irel->r_info =
11540 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11541 break;
11542 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11543 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11544 irel->r_info =
11545 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11546 break;
11547 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11548 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11549 irel->r_info =
11550 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11551 break;
11552 default:
11553 return;
11554 }
11555
11556 bfd_putb32 (insn, contents + laddr);
11557 if (i1_irelfn != irelend)
11558 {
11559 i1_irelfn->r_addend |= 1;
11560 *again = TRUE;
11561 }
11562 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11563 R_NDS32_INSN16)) != irelend)
11564 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11565
11566 }
11567
11568 static bfd_boolean
11569 nds32_relax_adjust_label (bfd *abfd, asection *sec,
11570 Elf_Internal_Rela *internal_relocs,
11571 bfd_byte *contents,
11572 nds32_elf_blank_t **relax_blank_list,
11573 int optimize, int opt_size)
11574 {
11575 /* This code block is used to adjust 4-byte alignment by relax a pair
11576 of instruction a time.
11577
11578 It recognizes three types of relocations.
11579 1. R_NDS32_LABEL - a aligment.
11580 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11581 3. is_16bit_NOP () - remove a 16-bit instruction. */
11582
11583 /* TODO: It seems currently implementation only support 4-byte aligment.
11584 We should handle any-aligment. */
11585
11586 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11587 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11588 Elf_Internal_Rela rel_temp;
11589 Elf_Internal_Rela *irelend;
11590 bfd_vma address;
11591 uint16_t insn16;
11592
11593 /* Checking for branch relaxation relies on the relocations to
11594 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11595 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11596 sizeof (Elf_Internal_Rela), compar_reloc);
11597
11598 irelend = internal_relocs + sec->reloc_count;
11599
11600 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11601 /* FIXME: Can we generate the right order in assembler?
11602 So we don't have to swapping them here. */
11603
11604 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11605 label_rel < irelend; label_rel++)
11606 {
11607 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11608 continue;
11609
11610 /* Find the first reloc has the same offset with label_rel. */
11611 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11612 insn_rel++;
11613
11614 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11615 insn_rel++)
11616 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11617 address. */
11618 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11619 break;
11620
11621 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11622 && insn_rel < label_rel)
11623 {
11624 /* Swap the two reloc if the R_NDS32_INSN16 is
11625 before R_NDS32_LABEL. */
11626 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11627 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11628 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11629 }
11630 }
11631
11632 label_rel = NULL;
11633 insn_rel = NULL;
11634 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11635 or higher, remove other R_NDS32_LABEL with lower alignment.
11636 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11637 then the R_NDS32_LABEL sequence is broke. */
11638 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11639 {
11640 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11641 {
11642 if (label_rel == NULL)
11643 {
11644 if (tmp_rel->r_addend < 2)
11645 label_rel = tmp_rel;
11646 continue;
11647 }
11648 else if (tmp_rel->r_addend > 1)
11649 {
11650 /* Remove all LABEL relocation from label_rel to tmp_rel
11651 including relocations with same offset as tmp_rel. */
11652 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11653 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11654 {
11655 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11656 && tmp2_rel->r_addend < 2)
11657 tmp2_rel->r_info =
11658 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11659 R_NDS32_NONE);
11660 }
11661 label_rel = NULL;
11662 }
11663 }
11664 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11665 {
11666 /* A new INSN16 which can be converted, so clear label_rel. */
11667 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11668 irelend, &insn16)
11669 || is_16bit_NOP (abfd, sec, tmp_rel))
11670 label_rel = NULL;
11671 }
11672 }
11673
11674 label_rel = NULL;
11675 insn_rel = NULL;
11676 /* Optimized for speed and nothing has not been relaxed.
11677 It's time to align labels.
11678 We may convert a 16-bit instruction right before a label to
11679 32-bit, in order to align the label if necessary
11680 all reloc entries has been sorted by r_offset. */
11681 for (irel = internal_relocs; irel < irelend; irel++)
11682 {
11683 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11684 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11685 continue;
11686
11687 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11688 {
11689 /* A new INSN16 found, resize the old one. */
11690 if (is_convert_32_to_16
11691 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11692 || is_16bit_NOP (abfd, sec, irel))
11693 {
11694 if (insn_rel)
11695 {
11696 /* Previous INSN16 reloc exists, reduce its
11697 size to 16-bit. */
11698 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11699 irelend, &insn16))
11700 {
11701 nds32_elf_write_16 (abfd, contents, insn_rel,
11702 internal_relocs, irelend, insn16);
11703
11704 if (!insert_nds32_elf_blank_recalc_total
11705 (relax_blank_list, insn_rel->r_offset + 2, 2))
11706 return FALSE;
11707 }
11708 else if (is_16bit_NOP (abfd, sec, insn_rel))
11709 {
11710 if (!insert_nds32_elf_blank_recalc_total
11711 (relax_blank_list, insn_rel->r_offset, 2))
11712 return FALSE;
11713 }
11714 insn_rel->r_info =
11715 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11716 }
11717 /* Save the new one for later use. */
11718 insn_rel = irel;
11719 }
11720 else
11721 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11722 R_NDS32_NONE);
11723 }
11724 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11725 {
11726 /* Search for label. */
11727 int force_relax = 0;
11728
11729 /* Label on 16-bit instruction or optimization
11730 needless, just reset this reloc. */
11731 insn16 = bfd_getb16 (contents + irel->r_offset);
11732 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11733 {
11734 irel->r_info =
11735 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11736 continue;
11737 }
11738
11739 address =
11740 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11741 irel->r_offset, 1);
11742
11743 if (!insn_rel)
11744 {
11745 /* Check if there is case which can not be aligned. */
11746 if (irel->r_addend == 2 && address & 0x2)
11747 return FALSE;
11748 continue;
11749 }
11750
11751 /* Try to align this label. */
11752
11753 if ((irel->r_addend & 0x1f) < 2)
11754 {
11755 /* Check if there is a INSN16 at the same address.
11756 Label_rel always seats before insn_rel after
11757 our sort. */
11758
11759 /* Search for INSN16 at LABEL location. If INSN16 is at
11760 same location and this LABEL alignment is lower than 2,
11761 the INSN16 can be converted to 2-byte. */
11762 for (tmp_rel = irel;
11763 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11764 tmp_rel++)
11765 {
11766 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11767 && (is_convert_32_to_16
11768 (abfd, sec, tmp_rel, internal_relocs,
11769 irelend, &insn16)
11770 || is_16bit_NOP (abfd, sec, tmp_rel)))
11771 {
11772 force_relax = 1;
11773 break;
11774 }
11775 }
11776 }
11777
11778 if (force_relax || irel->r_addend == 1 || address & 0x2)
11779 {
11780 /* Label not aligned. */
11781 /* Previous reloc exists, reduce its size to 16-bit. */
11782 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11783 internal_relocs, irelend, &insn16))
11784 {
11785 nds32_elf_write_16 (abfd, contents, insn_rel,
11786 internal_relocs, irelend, insn16);
11787
11788 if (!insert_nds32_elf_blank_recalc_total
11789 (relax_blank_list, insn_rel->r_offset + 2, 2))
11790 return FALSE;
11791 }
11792 else if (is_16bit_NOP (abfd, sec, insn_rel))
11793 {
11794 if (!insert_nds32_elf_blank_recalc_total
11795 (relax_blank_list, insn_rel->r_offset, 2))
11796 return FALSE;
11797 }
11798
11799 }
11800 /* INSN16 reloc is used. */
11801 insn_rel = NULL;
11802 }
11803 }
11804
11805 address =
11806 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11807 if (insn_rel && (address & 0x2 || opt_size))
11808 {
11809 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11810 irelend, &insn16))
11811 {
11812 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11813 irelend, insn16);
11814 if (!insert_nds32_elf_blank_recalc_total
11815 (relax_blank_list, insn_rel->r_offset + 2, 2))
11816 return FALSE;
11817 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11818 R_NDS32_NONE);
11819 }
11820 else if (is_16bit_NOP (abfd, sec, insn_rel))
11821 {
11822 if (!insert_nds32_elf_blank_recalc_total
11823 (relax_blank_list, insn_rel->r_offset, 2))
11824 return FALSE;
11825 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11826 R_NDS32_NONE);
11827 }
11828 }
11829 insn_rel = NULL;
11830 return TRUE;
11831 }
11832
11833 /* Pick relaxation round. */
11834
11835 static int
11836 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11837 struct elf_nds32_link_hash_table *table,
11838 struct bfd_link_info *link_info)
11839 {
11840 static asection *final_sec, *first_sec = NULL;
11841 static bfd_boolean normal_again = FALSE;
11842 static bfd_boolean set = FALSE;
11843 static bfd_boolean first = TRUE;
11844 int round_table[] = {
11845 NDS32_RELAX_NORMAL_ROUND,
11846 NDS32_RELAX_JUMP_IFC_ROUND,
11847 NDS32_RELAX_EX9_BUILD_ROUND,
11848 NDS32_RELAX_EX9_REPLACE_ROUND,
11849 };
11850 static int pass = 0;
11851 static int relax_round;
11852
11853 /* The new round. */
11854 if (init && first_sec == sec)
11855 {
11856 set = TRUE;
11857 normal_again = FALSE;
11858 }
11859
11860 if (first)
11861 {
11862 /* Run an empty run to get the final section. */
11863 relax_round = NDS32_RELAX_EMPTY_ROUND;
11864
11865 /* It has to enter relax again because we can
11866 not make sure what the final turn is. */
11867 *again = TRUE;
11868
11869 first = FALSE;
11870 first_sec = sec;
11871 }
11872
11873 if (!set)
11874 {
11875 /* Not reenter yet. */
11876 final_sec = sec;
11877 return relax_round;
11878 }
11879
11880 relax_round = round_table[pass];
11881
11882 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11883 normal_again = TRUE;
11884
11885 if (!init && final_sec == sec)
11886 {
11887 switch (relax_round)
11888 {
11889 case NDS32_RELAX_NORMAL_ROUND:
11890 if (!normal_again)
11891 {
11892 /* Normal relaxation done. */
11893 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11894 {
11895 pass++;
11896 *again = TRUE;
11897 }
11898 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11899 {
11900 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11901 *again = TRUE;
11902 }
11903 else if (table->ex9_import_file)
11904 {
11905 /* Import ex9 table. */
11906 if (table->update_ex9_table)
11907 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11908 else
11909 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11910 nds32_elf_ex9_import_table (link_info);
11911 *again = TRUE;
11912 }
11913 }
11914 break;
11915 case NDS32_RELAX_JUMP_IFC_ROUND:
11916 if (!nds32_elf_ifc_finish (link_info))
11917 _bfd_error_handler (_("error: Jump IFC Fail."));
11918 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11919 {
11920 pass++;
11921 *again = TRUE;
11922 }
11923 break;
11924 case NDS32_RELAX_EX9_BUILD_ROUND:
11925 nds32_elf_ex9_finish (link_info);
11926 pass++;
11927 *again = TRUE;
11928 break;
11929 case NDS32_RELAX_EX9_REPLACE_ROUND:
11930 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11931 {
11932 /* Do jump IFC optimization again. */
11933 if (!nds32_elf_ifc_finish (link_info))
11934 _bfd_error_handler (_("error: Jump IFC Fail."));
11935 }
11936 break;
11937 default:
11938 break;
11939 }
11940 }
11941
11942 return relax_round;
11943 }
11944
11945 static bfd_boolean
11946 nds32_elf_relax_section (bfd *abfd, asection *sec,
11947 struct bfd_link_info *link_info, bfd_boolean *again)
11948 {
11949 nds32_elf_blank_t *relax_blank_list = NULL;
11950 Elf_Internal_Shdr *symtab_hdr;
11951 Elf_Internal_Rela *internal_relocs;
11952 Elf_Internal_Rela *irel;
11953 Elf_Internal_Rela *irelend;
11954 Elf_Internal_Sym *isymbuf = NULL;
11955 bfd_byte *contents = NULL;
11956 bfd_boolean result = TRUE;
11957 int optimize = 0;
11958 int opt_size = 0;
11959 uint32_t insn;
11960 uint16_t insn16;
11961
11962 /* Target dependnet option. */
11963 struct elf_nds32_link_hash_table *table;
11964 int load_store_relax;
11965 int relax_round;
11966
11967 relax_blank_list = NULL;
11968
11969 *again = FALSE;
11970
11971 /* Nothing to do for
11972 * relocatable link or
11973 * non-relocatable section or
11974 * non-code section or
11975 * empty content or
11976 * no reloc entry. */
11977 if (bfd_link_relocatable (link_info)
11978 || (sec->flags & SEC_RELOC) == 0
11979 || (sec->flags & SEC_EXCLUDE) == 1
11980 || (sec->flags & SEC_CODE) == 0
11981 || sec->size == 0)
11982 return TRUE;
11983
11984 /* 09.12.11 Workaround. */
11985 /* We have to adjust align for R_NDS32_LABEL if needed.
11986 The adjust approach only can fix 2-byte align once. */
11987 if (sec->alignment_power > 2)
11988 return TRUE;
11989
11990 /* The optimization type to do. */
11991
11992 table = nds32_elf_hash_table (link_info);
11993 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11994 switch (relax_round)
11995 {
11996 case NDS32_RELAX_JUMP_IFC_ROUND:
11997 /* Here is the entrance of ifc jump relaxation. */
11998 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11999 return FALSE;
12000 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12001 return TRUE;
12002
12003 case NDS32_RELAX_EX9_BUILD_ROUND:
12004 /* Here is the entrance of ex9 relaxation. There are two pass of
12005 ex9 relaxation. The one is to traverse all instructions and build
12006 the hash table. The other one is to compare instructions and replace
12007 it by ex9.it. */
12008 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12009 return FALSE;
12010 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12011 return TRUE;
12012
12013 case NDS32_RELAX_EX9_REPLACE_ROUND:
12014 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12015 return FALSE;
12016 return TRUE;
12017
12018 case NDS32_RELAX_EMPTY_ROUND:
12019 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12020 return TRUE;
12021
12022 case NDS32_RELAX_NORMAL_ROUND:
12023 default:
12024 if (sec->reloc_count == 0)
12025 return TRUE;
12026 break;
12027 }
12028
12029 /* The begining of general relaxation. */
12030
12031 if (is_SDA_BASE_set == 0)
12032 {
12033 bfd_vma gp;
12034 is_SDA_BASE_set = 1;
12035 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12036 &gp, FALSE);
12037 relax_range_measurement (abfd);
12038 }
12039
12040 if (is_ITB_BASE_set == 0)
12041 {
12042 /* Set the _ITB_BASE_. */
12043 if (!nds32_elf_ex9_itb_base (link_info))
12044 {
12045 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12046 bfd_set_error (bfd_error_bad_value);
12047 }
12048 }
12049
12050 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12051 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12052 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12053 TRUE /* keep_memory */);
12054 if (internal_relocs == NULL)
12055 goto error_return;
12056
12057 irelend = internal_relocs + sec->reloc_count;
12058 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12059 irelend, R_NDS32_RELAX_ENTRY);
12060
12061 if (irel == irelend)
12062 return TRUE;
12063
12064 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12065 {
12066 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
12067 {
12068 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12069 return TRUE;
12070 }
12071
12072 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12073 optimize = 1;
12074
12075 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12076 opt_size = 1;
12077 }
12078
12079 load_store_relax = table->load_store_relax;
12080
12081 /* Get symbol table and section content. */
12082 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12083 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12084 goto error_return;
12085
12086 /* Do relax loop only when finalize is not done.
12087 Take care of relaxable relocs except INSN16. */
12088 for (irel = internal_relocs; irel < irelend; irel++)
12089 {
12090 int seq_len; /* Original length of instruction sequence. */
12091 int insn_len = 0; /* Final length of instruction sequence. */
12092 bfd_boolean removed;
12093
12094 insn = 0;
12095 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12096 && (irel->r_addend & 0x1f) >= 2)
12097 optimize = 1;
12098
12099 /* Relocation Types
12100 R_NDS32_LONGCALL1 53
12101 R_NDS32_LONGCALL2 54
12102 R_NDS32_LONGCALL3 55
12103 R_NDS32_LONGJUMP1 56
12104 R_NDS32_LONGJUMP2 57
12105 R_NDS32_LONGJUMP3 58
12106 R_NDS32_LOADSTORE 59 */
12107 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12108 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12109 seq_len = GET_SEQ_LEN (irel->r_addend);
12110
12111 /* Relocation Types
12112 R_NDS32_LONGCALL4 107
12113 R_NDS32_LONGCALL5 108
12114 R_NDS32_LONGCALL6 109
12115 R_NDS32_LONGJUMP4 110
12116 R_NDS32_LONGJUMP5 111
12117 R_NDS32_LONGJUMP6 112
12118 R_NDS32_LONGJUMP7 113 */
12119 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12120 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12121 seq_len = 4;
12122
12123 /* Relocation Types
12124 R_NDS32_LO12S0_RELA 30
12125 R_NDS32_LO12S1_RELA 29
12126 R_NDS32_LO12S2_RELA 28
12127 R_NDS32_LO12S2_SP_RELA 71
12128 R_NDS32_LO12S2_DP_RELA 70
12129 R_NDS32_GOT_LO12 46
12130 R_NDS32_GOTOFF_LO12 50
12131 R_NDS32_PLTREL_LO12 65
12132 R_NDS32_PLT_GOTREL_LO12 67
12133 R_NDS32_17IFC_PCREL_RELA 96
12134 R_NDS32_GOT_SUFF 193
12135 R_NDS32_GOTOFF_SUFF 194
12136 R_NDS32_PLT_GOT_SUFF 195
12137 R_NDS32_MULCALL_SUFF 196
12138 R_NDS32_PTR 197 */
12139 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12140 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12141 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12144 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12146 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12147 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12148 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12149 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12150 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12151 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12152 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12153 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12154 seq_len = 0;
12155 else
12156 continue;
12157
12158 insn_len = seq_len;
12159 removed = FALSE;
12160
12161 switch (ELF32_R_TYPE (irel->r_info))
12162 {
12163 case R_NDS32_LONGCALL1:
12164 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12165 &insn_len, contents, isymbuf,
12166 symtab_hdr);
12167 break;
12168 case R_NDS32_LONGCALL2:
12169 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12170 &insn_len, contents, isymbuf,
12171 symtab_hdr);
12172 break;
12173 case R_NDS32_LONGCALL3:
12174 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12175 &insn_len, contents, isymbuf,
12176 symtab_hdr);
12177 break;
12178 case R_NDS32_LONGJUMP1:
12179 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12180 &insn_len, contents, isymbuf,
12181 symtab_hdr);
12182 break;
12183 case R_NDS32_LONGJUMP2:
12184 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12185 &insn_len, contents, isymbuf,
12186 symtab_hdr);
12187 break;
12188 case R_NDS32_LONGJUMP3:
12189 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12190 &insn_len, contents, isymbuf,
12191 symtab_hdr);
12192 break;
12193 case R_NDS32_LONGCALL4:
12194 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12195 &insn_len, contents, isymbuf,
12196 symtab_hdr);
12197 break;
12198 case R_NDS32_LONGCALL5:
12199 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12200 &insn_len, contents, isymbuf,
12201 symtab_hdr);
12202 break;
12203 case R_NDS32_LONGCALL6:
12204 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12205 &insn_len, contents, isymbuf,
12206 symtab_hdr);
12207 break;
12208 case R_NDS32_LONGJUMP4:
12209 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12210 &insn_len, contents, isymbuf,
12211 symtab_hdr);
12212 break;
12213 case R_NDS32_LONGJUMP5:
12214 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12215 &insn_len, &seq_len, contents,
12216 isymbuf, symtab_hdr);
12217 break;
12218 case R_NDS32_LONGJUMP6:
12219 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12220 &insn_len, &seq_len, contents,
12221 isymbuf, symtab_hdr);
12222 break;
12223 case R_NDS32_LONGJUMP7:
12224 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12225 &insn_len, &seq_len, contents,
12226 isymbuf, symtab_hdr);
12227 break;
12228 case R_NDS32_LOADSTORE:
12229 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12230 internal_relocs, &insn_len,
12231 contents, isymbuf, symtab_hdr,
12232 load_store_relax);
12233 break;
12234 case R_NDS32_LO12S0_RELA:
12235 case R_NDS32_LO12S1_RELA:
12236 case R_NDS32_LO12S2_DP_RELA:
12237 case R_NDS32_LO12S2_SP_RELA:
12238 case R_NDS32_LO12S2_RELA:
12239 /* Relax for low part. */
12240 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12241 contents, isymbuf, symtab_hdr);
12242
12243 /* It is impossible to delete blank, so just continue. */
12244 continue;
12245 case R_NDS32_GOT_LO12:
12246 case R_NDS32_GOTOFF_LO12:
12247 case R_NDS32_PLTREL_LO12:
12248 case R_NDS32_PLT_GOTREL_LO12:
12249 case R_NDS32_GOTPC_LO12:
12250 /* Relax for PIC gp-relative low part. */
12251 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12252 isymbuf, symtab_hdr);
12253
12254 /* It is impossible to delete blank, so just continue. */
12255 continue;
12256 case R_NDS32_TLS_LE_LO12:
12257 /* Relax for LE TLS low part. */
12258 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12259 isymbuf, symtab_hdr);
12260
12261 /* It is impossible to delete blank, so just continue. */
12262 continue;
12263 case R_NDS32_TLS_LE_ADD:
12264 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12265 contents, isymbuf, symtab_hdr, again);
12266 /* It is impossible to delete blank, so just continue. */
12267 continue;
12268 case R_NDS32_TLS_LE_LS:
12269 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12270 contents, isymbuf, symtab_hdr, again);
12271 continue;
12272 case R_NDS32_PTR:
12273 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12274 &insn_len, &seq_len, contents);
12275 break;
12276 case R_NDS32_PLT_GOT_SUFF:
12277 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12278 internal_relocs, contents,
12279 isymbuf, symtab_hdr, again);
12280 /* It is impossible to delete blank, so just continue. */
12281 continue;
12282 case R_NDS32_GOT_SUFF:
12283 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12284 internal_relocs, contents,
12285 symtab_hdr, again);
12286 /* It is impossible to delete blank, so just continue. */
12287 continue;
12288 case R_NDS32_GOTOFF_SUFF:
12289 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12290 internal_relocs, contents,
12291 isymbuf, symtab_hdr, again);
12292 /* It is impossible to delete blank, so just continue. */
12293 continue;
12294 default:
12295 continue;
12296
12297 }
12298 if (removed && seq_len - insn_len > 0)
12299 {
12300 if (!insert_nds32_elf_blank
12301 (&relax_blank_list, irel->r_offset + insn_len,
12302 seq_len - insn_len))
12303 goto error_return;
12304 *again = TRUE;
12305 }
12306 }
12307
12308 calc_nds32_blank_total (relax_blank_list);
12309
12310 if (table->relax_fp_as_gp)
12311 {
12312 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12313 irelend, isymbuf))
12314 goto error_return;
12315
12316 if (*again == FALSE)
12317 {
12318 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12319 irelend))
12320 goto error_return;
12321 }
12322 }
12323
12324 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12325
12326 if (*again == FALSE)
12327 {
12328 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12329 &relax_blank_list, optimize, opt_size))
12330 goto error_return;
12331 }
12332
12333 /* It doesn't matter optimize_for_space_no_align anymore.
12334 If object file is assembled with flag '-Os',
12335 the we don't adjust jump-destination on 4-byte boundary. */
12336
12337 if (relax_blank_list)
12338 {
12339 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12340 relax_blank_list = NULL;
12341 }
12342
12343 if (*again == FALSE)
12344 {
12345 /* Closing the section, so we don't relax it anymore. */
12346 bfd_vma sec_size_align;
12347 Elf_Internal_Rela *tmp_rel;
12348
12349 /* Pad to alignment boundary. Only handle current section alignment. */
12350 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12351 & ((-1U) << sec->alignment_power);
12352 if ((sec_size_align - sec->size) & 0x2)
12353 {
12354 insn16 = NDS32_NOP16;
12355 bfd_putb16 (insn16, contents + sec->size);
12356 sec->size += 2;
12357 }
12358
12359 while (sec_size_align != sec->size)
12360 {
12361 insn = NDS32_NOP32;
12362 bfd_putb32 (insn, contents + sec->size);
12363 sec->size += 4;
12364 }
12365
12366 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12367 irelend, R_NDS32_RELAX_ENTRY);
12368 if (tmp_rel != irelend)
12369 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12370
12371 clean_nds32_elf_blank ();
12372 }
12373
12374 finish:
12375 if (internal_relocs != NULL
12376 && elf_section_data (sec)->relocs != internal_relocs)
12377 free (internal_relocs);
12378
12379 if (contents != NULL
12380 && elf_section_data (sec)->this_hdr.contents != contents)
12381 free (contents);
12382
12383 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12384 free (isymbuf);
12385
12386 return result;
12387
12388 error_return:
12389 result = FALSE;
12390 goto finish;
12391 }
12392
12393 static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12394 {
12395 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12396 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12397 {NULL, 0, 0, 0, 0}
12398 };
12399
12400 static bfd_boolean
12401 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12402 struct bfd_link_info *info,
12403 void *finfo ATTRIBUTE_UNUSED,
12404 bfd_boolean (*func) (void *, const char *,
12405 Elf_Internal_Sym *,
12406 asection *,
12407 struct elf_link_hash_entry *)
12408 ATTRIBUTE_UNUSED)
12409 {
12410 FILE *sym_ld_script = NULL;
12411 struct elf_nds32_link_hash_table *table;
12412
12413 table = nds32_elf_hash_table (info);
12414 sym_ld_script = table->sym_ld_script;
12415
12416 if (check_start_export_sym)
12417 fprintf (sym_ld_script, "}\n");
12418
12419 return TRUE;
12420 }
12421
12422 static enum elf_reloc_type_class
12423 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12424 const asection *rel_sec ATTRIBUTE_UNUSED,
12425 const Elf_Internal_Rela *rela)
12426 {
12427 switch ((int) ELF32_R_TYPE (rela->r_info))
12428 {
12429 case R_NDS32_RELATIVE:
12430 return reloc_class_relative;
12431 case R_NDS32_JMP_SLOT:
12432 return reloc_class_plt;
12433 case R_NDS32_COPY:
12434 return reloc_class_copy;
12435 default:
12436 return reloc_class_normal;
12437 }
12438 }
12439
12440 /* Put target dependent option into info hash table. */
12441 void
12442 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12443 int relax_fp_as_gp,
12444 int eliminate_gc_relocs,
12445 FILE * sym_ld_script, int load_store_relax,
12446 int target_optimize, int relax_status,
12447 int relax_round, FILE * ex9_export_file,
12448 FILE * ex9_import_file,
12449 int update_ex9_table, int ex9_limit,
12450 bfd_boolean ex9_loop_aware,
12451 bfd_boolean ifc_loop_aware)
12452 {
12453 struct elf_nds32_link_hash_table *table;
12454
12455 table = nds32_elf_hash_table (link_info);
12456 if (table == NULL)
12457 return;
12458
12459 table->relax_fp_as_gp = relax_fp_as_gp;
12460 table->eliminate_gc_relocs = eliminate_gc_relocs;
12461 table->sym_ld_script = sym_ld_script;
12462 table ->load_store_relax = load_store_relax;
12463 table->target_optimize = target_optimize;
12464 table->relax_status = relax_status;
12465 table->relax_round = relax_round;
12466 table->ex9_export_file = ex9_export_file;
12467 table->ex9_import_file = ex9_import_file;
12468 table->update_ex9_table = update_ex9_table;
12469 table->ex9_limit = ex9_limit;
12470 table->ex9_loop_aware = ex9_loop_aware;
12471 table->ifc_loop_aware = ifc_loop_aware;
12472 }
12473 \f
12474 /* These functions and data-structures are used for fp-as-gp
12475 optimization. */
12476
12477 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */
12478 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12479 the read-only section and read-write section. */
12480 #define FAG_WINDOW (508 - 32)
12481
12482 /* An nds32_fag represent a gp-relative access.
12483 We find best fp-base by using a sliding window
12484 to find a base address which can cover most gp-access. */
12485 struct nds32_fag
12486 {
12487 struct nds32_fag *next; /* NULL-teminated linked list. */
12488 bfd_vma addr; /* The address of this fag. */
12489 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12490 It is used for applying FP7U2_FLAG. */
12491 int count; /* How many times this address is referred.
12492 There should be exactly `count' relocations
12493 in relas. */
12494 int relas_capcity; /* The buffer size of relas.
12495 We use an array instead of linked-list,
12496 and realloc is used to adjust buffer size. */
12497 };
12498
12499 static void
12500 nds32_fag_init (struct nds32_fag *head)
12501 {
12502 memset (head, 0, sizeof (struct nds32_fag));
12503 }
12504
12505 static void
12506 nds32_fag_verify (struct nds32_fag *head)
12507 {
12508 struct nds32_fag *iter;
12509 struct nds32_fag *prev;
12510
12511 prev = NULL;
12512 iter = head->next;
12513 while (iter)
12514 {
12515 if (prev && prev->addr >= iter->addr)
12516 puts ("Bug in fp-as-gp insertion.");
12517 prev = iter;
12518 iter = iter->next;
12519 }
12520 }
12521
12522 /* Insert a fag in ascending order.
12523 If a fag of the same address already exists,
12524 they are chained by relas array. */
12525
12526 static void
12527 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12528 Elf_Internal_Rela * rel)
12529 {
12530 struct nds32_fag *iter;
12531 struct nds32_fag *new_fag;
12532 const int INIT_RELAS_CAP = 4;
12533
12534 for (iter = head;
12535 iter->next && iter->next->addr <= addr;
12536 iter = iter->next)
12537 /* Find somewhere to insert. */ ;
12538
12539 /* `iter' will be equal to `head' if the list is empty. */
12540 if (iter != head && iter->addr == addr)
12541 {
12542 /* The address exists in the list.
12543 Insert `rel' into relocation list, relas. */
12544
12545 /* Check whether relas is big enough. */
12546 if (iter->count >= iter->relas_capcity)
12547 {
12548 iter->relas_capcity *= 2;
12549 iter->relas = bfd_realloc
12550 (iter->relas, iter->relas_capcity * sizeof (void *));
12551 }
12552 iter->relas[iter->count++] = rel;
12553 return;
12554 }
12555
12556 /* This is a new address. Create a fag node for it. */
12557 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12558 memset (new_fag, 0, sizeof (*new_fag));
12559 new_fag->addr = addr;
12560 new_fag->count = 1;
12561 new_fag->next = iter->next;
12562 new_fag->relas_capcity = INIT_RELAS_CAP;
12563 new_fag->relas = (Elf_Internal_Rela **)
12564 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12565 new_fag->relas[0] = rel;
12566 iter->next = new_fag;
12567
12568 nds32_fag_verify (head);
12569 }
12570
12571 static void
12572 nds32_fag_free_list (struct nds32_fag *head)
12573 {
12574 struct nds32_fag *iter;
12575
12576 iter = head->next;
12577 while (iter)
12578 {
12579 struct nds32_fag *tmp = iter;
12580 iter = iter->next;
12581 free (tmp->relas);
12582 tmp->relas = NULL;
12583 free (tmp);
12584 }
12585 }
12586
12587 /* Find the best fp-base address.
12588 The relocation associated with that address is returned,
12589 so we can track the symbol instead of a fixed address.
12590
12591 When relaxation, the address of an datum may change,
12592 because a text section is shrinked, so the data section
12593 moves forward. If the aligments of text and data section
12594 are different, their distance may change too.
12595 Therefore, tracking a fixed address is not appriate. */
12596
12597 static int
12598 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12599 {
12600 struct nds32_fag *base; /* First fag in the window. */
12601 struct nds32_fag *last; /* First fag outside the window. */
12602 int accu = 0; /* Usage accumulation. */
12603 struct nds32_fag *best; /* Best fag. */
12604 int baccu = 0; /* Best accumulation. */
12605
12606 /* Use first fag for initial, and find the last fag in the window.
12607
12608 In each iteration, we could simply subtract previous fag
12609 and accumulate following fags which are inside the window,
12610 untill we each the end. */
12611
12612 if (head->next == NULL)
12613 {
12614 *bestpp = NULL;
12615 return 0;
12616 }
12617
12618 /* Initialize base. */
12619 base = head->next;
12620 best = base;
12621 for (last = base;
12622 last && last->addr < base->addr + FAG_WINDOW;
12623 last = last->next)
12624 accu += last->count;
12625
12626 baccu = accu;
12627
12628 /* Record the best base in each iteration. */
12629 while (base->next)
12630 {
12631 accu -= base->count;
12632 base = base->next;
12633 /* Account fags in window. */
12634 for (/* Nothing. */;
12635 last && last->addr < base->addr + FAG_WINDOW;
12636 last = last->next)
12637 accu += last->count;
12638
12639 /* A better fp-base? */
12640 if (accu > baccu)
12641 {
12642 best = base;
12643 baccu = accu;
12644 }
12645 }
12646
12647 if (bestpp)
12648 *bestpp = best;
12649 return baccu;
12650 }
12651
12652 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12653 so we can convert it fo fp-relative access later.
12654 `best_fag' is the best fp-base. Only those inside the window
12655 of best_fag is applied the flag. */
12656
12657 static bfd_boolean
12658 nds32_fag_mark_relax (struct bfd_link_info *link_info,
12659 bfd *abfd, struct nds32_fag *best_fag,
12660 Elf_Internal_Rela *internal_relocs,
12661 Elf_Internal_Rela *irelend)
12662 {
12663 struct nds32_fag *ifag;
12664 bfd_vma best_fpbase, gp;
12665 bfd *output_bfd;
12666
12667 output_bfd = abfd->sections->output_section->owner;
12668 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12669 best_fpbase = best_fag->addr;
12670
12671 if (best_fpbase > gp + sdata_range[1][1]
12672 || best_fpbase < gp - sdata_range[1][0])
12673 return FALSE;
12674
12675 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12676 so we know they can be converted to lwi37.fp. */
12677 for (ifag = best_fag;
12678 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12679 {
12680 int i;
12681
12682 for (i = 0; i < ifag->count; i++)
12683 {
12684 Elf_Internal_Rela *insn16_rel;
12685 Elf_Internal_Rela *fag_rel;
12686
12687 fag_rel = ifag->relas[i];
12688
12689 /* Only if this is within the WINDOWS, FP7U2_FLAG
12690 is applied. */
12691
12692 insn16_rel = find_relocs_at_address
12693 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12694
12695 if (insn16_rel != irelend)
12696 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12697 }
12698 }
12699 return TRUE;
12700 }
12701
12702 /* Reset INSN16 to clean fp as gp. */
12703
12704 static void
12705 nds32_fag_unmark_relax (struct nds32_fag *fag,
12706 Elf_Internal_Rela *internal_relocs,
12707 Elf_Internal_Rela *irelend)
12708 {
12709 struct nds32_fag *ifag;
12710 int i;
12711 Elf_Internal_Rela *insn16_rel;
12712 Elf_Internal_Rela *fag_rel;
12713
12714 for (ifag = fag; ifag; ifag = ifag->next)
12715 {
12716 for (i = 0; i < ifag->count; i++)
12717 {
12718 fag_rel = ifag->relas[i];
12719
12720 /* Restore the INSN16 relocation. */
12721 insn16_rel = find_relocs_at_address
12722 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12723
12724 if (insn16_rel != irelend)
12725 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12726 }
12727 }
12728 }
12729
12730 /* This is the main function of fp-as-gp optimization.
12731 It should be called by relax_section. */
12732
12733 static bfd_boolean
12734 nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12735 bfd *abfd, asection *sec,
12736 Elf_Internal_Rela *internal_relocs,
12737 Elf_Internal_Rela *irelend,
12738 Elf_Internal_Sym *isymbuf)
12739 {
12740 Elf_Internal_Rela *begin_rel = NULL;
12741 Elf_Internal_Rela *irel;
12742 struct nds32_fag fag_head;
12743 Elf_Internal_Shdr *symtab_hdr;
12744 bfd_byte *contents;
12745 bfd_boolean ifc_inside = FALSE;
12746
12747 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12748
12749 /* Per-function fp-base selection.
12750 1. Create a list for all the gp-relative access.
12751 2. Base on those gp-relative address,
12752 find a fp-base which can cover most access.
12753 3. Use the fp-base for fp-as-gp relaxation.
12754
12755 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12756 we should
12757 1. delete the `la $fp, _FP_BASE_' instruction and
12758 2. not convert lwi.gp to lwi37.fp.
12759
12760 To delete the _FP_BASE_ instruction, we simply apply
12761 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12762
12763 To suppress the conversion, we simply NOT to apply
12764 R_NDS32_INSN16_FP7U2_FLAG flag. */
12765
12766 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12767
12768 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12769 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12770 return FALSE;
12771
12772 /* Check whether it is worth for fp-as-gp optimization,
12773 i.e., at least 3 gp-load.
12774
12775 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12776 apply this optimization. */
12777
12778 for (irel = internal_relocs; irel < irelend; irel++)
12779 {
12780 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12781 One we enter the begin of the region, we track all the LW/ST
12782 instructions, so when we leave the region, we try to find
12783 the best fp-base address for those LW/ST instructions. */
12784
12785 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12786 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12787 {
12788 /* Begin of the region. */
12789 if (begin_rel)
12790 _bfd_error_handler (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12791
12792 begin_rel = irel;
12793 nds32_fag_init (&fag_head);
12794 ifc_inside = FALSE;
12795 }
12796 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12797 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12798 {
12799 int accu;
12800 struct nds32_fag *best_fag, *tmp_fag;
12801 int dist;
12802
12803 /* End of the region.
12804 Check whether it is worth to do fp-as-gp. */
12805
12806 if (begin_rel == NULL)
12807 {
12808 _bfd_error_handler (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12809 continue;
12810 }
12811
12812 accu = nds32_fag_find_base (&fag_head, &best_fag);
12813
12814 /* Clean FP7U2_FLAG because they may set ever. */
12815 tmp_fag = fag_head.next;
12816 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12817
12818 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12819 if (accu < FAG_THRESHOLD
12820 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12821 internal_relocs, irelend))
12822 {
12823 /* Not worth to do fp-as-gp. */
12824 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12825 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12826 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12827 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12828 nds32_fag_free_list (&fag_head);
12829 begin_rel = NULL;
12830 continue;
12831 }
12832
12833 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12834 so we use it to record the distance to the reloction of best
12835 fp-base. */
12836 dist = best_fag->relas[0] - begin_rel;
12837 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12838 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12839 relocation. And get the base value when relocating. */
12840 begin_rel->r_addend &= (0x1 << 16) - 1;
12841 begin_rel->r_addend |= dist << 16;
12842
12843 nds32_fag_free_list (&fag_head);
12844 begin_rel = NULL;
12845 }
12846
12847 if (begin_rel == NULL || ifc_inside)
12848 /* Skip if we are not in the region of fp-as-gp. */
12849 continue;
12850
12851 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12852 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12853 {
12854 bfd_vma addr;
12855 uint32_t insn;
12856
12857 /* A gp-relative access is found. Insert it to the fag-list. */
12858
12859 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12860 insn = bfd_getb32 (contents + irel->r_offset);
12861 if (!N32_IS_RT3 (insn))
12862 continue;
12863
12864 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12865 nds32_fag_insert (&fag_head, addr, irel);
12866 }
12867 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12868 {
12869 begin_rel = NULL;
12870 }
12871 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12872 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12873 {
12874 /* Suppress fp as gp when encounter ifc. */
12875 ifc_inside = TRUE;
12876 }
12877 }
12878
12879 return TRUE;
12880 }
12881
12882 /* Remove unused `la $fp, _FD_BASE_' instruction. */
12883
12884 static bfd_boolean
12885 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12886 Elf_Internal_Rela *internal_relocs,
12887 Elf_Internal_Rela *irelend)
12888 {
12889 Elf_Internal_Rela *irel;
12890 Elf_Internal_Shdr *symtab_hdr;
12891 bfd_byte *contents = NULL;
12892 nds32_elf_blank_t *relax_blank_list = NULL;
12893 bfd_boolean result = TRUE;
12894 bfd_boolean unused_region = FALSE;
12895
12896 /*
12897 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12898 * R_NDS32_17IFC_PCREL_RELA
12899 * R_NDS32_10IFCU_PCREL_RELA
12900
12901 CASE??????????????
12902 */
12903
12904 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12905 nds32_get_section_contents (abfd, sec, &contents, TRUE);
12906
12907 for (irel = internal_relocs; irel < irelend; irel++)
12908 {
12909 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12910 we marked to in previous pass.
12911 DO NOT scan relocations again, since we've alreadly decided it
12912 and set the flag. */
12913 const char *syname;
12914 int syndx;
12915 uint32_t insn;
12916
12917 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12918 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12919 unused_region = TRUE;
12920 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12921 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12922 unused_region = FALSE;
12923
12924 /* We're not in the region. */
12925 if (!unused_region)
12926 continue;
12927
12928 /* _FP_BASE_ must be a GLOBAL symbol. */
12929 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12930 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12931 continue;
12932
12933 /* The symbol name must be _FP_BASE_. */
12934 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12935 if (strcmp (syname, FP_BASE_NAME) != 0)
12936 continue;
12937
12938 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12939 {
12940 /* addi.gp $fp, -256 */
12941 insn = bfd_getb32 (contents + irel->r_offset);
12942 if (insn != INSN_ADDIGP_TO_FP)
12943 continue;
12944 }
12945 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12946 {
12947 /* addi $fp, $gp, -256 */
12948 insn = bfd_getb32 (contents + irel->r_offset);
12949 if (insn != INSN_ADDI_GP_TO_FP)
12950 continue;
12951 }
12952 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12953 {
12954 /* movi $fp, FP_BASE */
12955 insn = bfd_getb32 (contents + irel->r_offset);
12956 if (insn != INSN_MOVI_TO_FP)
12957 continue;
12958 }
12959 else
12960 continue;
12961
12962 /* We got here because a FP_BASE instruction is found. */
12963 if (!insert_nds32_elf_blank_recalc_total
12964 (&relax_blank_list, irel->r_offset, 4))
12965 goto error_return;
12966 }
12967
12968 finish:
12969 if (relax_blank_list)
12970 {
12971 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12972 relax_blank_list = NULL;
12973 }
12974 return result;
12975
12976 error_return:
12977 result = FALSE;
12978 goto finish;
12979 }
12980
12981 /* This is a version of bfd_generic_get_relocated_section_contents.
12982 We need this variety because relaxation will modify the dwarf
12983 infomation. When there is undefined symbol reference error mesage,
12984 linker need to dump line number where the symbol be used. However
12985 the address is be relaxed, it can not get the original dwarf contents.
12986 The variety only modify function call for reading in the section. */
12987
12988 static bfd_byte *
12989 nds32_elf_get_relocated_section_contents (bfd *abfd,
12990 struct bfd_link_info *link_info,
12991 struct bfd_link_order *link_order,
12992 bfd_byte *data,
12993 bfd_boolean relocatable,
12994 asymbol **symbols)
12995 {
12996 bfd *input_bfd = link_order->u.indirect.section->owner;
12997 asection *input_section = link_order->u.indirect.section;
12998 long reloc_size;
12999 arelent **reloc_vector;
13000 long reloc_count;
13001
13002 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
13003 if (reloc_size < 0)
13004 return NULL;
13005
13006 /* Read in the section. */
13007 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
13008 return NULL;
13009
13010 if (reloc_size == 0)
13011 return data;
13012
13013 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13014 if (reloc_vector == NULL)
13015 return NULL;
13016
13017 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13018 reloc_vector, symbols);
13019 if (reloc_count < 0)
13020 goto error_return;
13021
13022 if (reloc_count > 0)
13023 {
13024 arelent **parent;
13025 for (parent = reloc_vector; *parent != NULL; parent++)
13026 {
13027 char *error_message = NULL;
13028 asymbol *symbol;
13029 bfd_reloc_status_type r;
13030
13031 symbol = *(*parent)->sym_ptr_ptr;
13032 if (symbol->section && discarded_section (symbol->section))
13033 {
13034 bfd_byte *p;
13035 static reloc_howto_type none_howto
13036 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13037 "unused", FALSE, 0, 0, FALSE);
13038
13039 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13040 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13041 p);
13042 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13043 (*parent)->addend = 0;
13044 (*parent)->howto = &none_howto;
13045 r = bfd_reloc_ok;
13046 }
13047 else
13048 r = bfd_perform_relocation (input_bfd, *parent, data,
13049 input_section,
13050 relocatable ? abfd : NULL,
13051 &error_message);
13052
13053 if (relocatable)
13054 {
13055 asection *os = input_section->output_section;
13056
13057 /* A partial link, so keep the relocs. */
13058 os->orelocation[os->reloc_count] = *parent;
13059 os->reloc_count++;
13060 }
13061
13062 if (r != bfd_reloc_ok)
13063 {
13064 switch (r)
13065 {
13066 case bfd_reloc_undefined:
13067 (*link_info->callbacks->undefined_symbol)
13068 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13069 input_bfd, input_section, (*parent)->address, TRUE);
13070 break;
13071 case bfd_reloc_dangerous:
13072 BFD_ASSERT (error_message != NULL);
13073 (*link_info->callbacks->reloc_dangerous)
13074 (link_info, error_message,
13075 input_bfd, input_section, (*parent)->address);
13076 break;
13077 case bfd_reloc_overflow:
13078 (*link_info->callbacks->reloc_overflow)
13079 (link_info, NULL,
13080 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13081 (*parent)->howto->name, (*parent)->addend,
13082 input_bfd, input_section, (*parent)->address);
13083 break;
13084 case bfd_reloc_outofrange:
13085 /* PR ld/13730:
13086 This error can result when processing some partially
13087 complete binaries. Do not abort, but issue an error
13088 message instead. */
13089 link_info->callbacks->einfo
13090 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13091 abfd, input_section, * parent);
13092 goto error_return;
13093
13094 default:
13095 abort ();
13096 break;
13097 }
13098 }
13099 }
13100 }
13101
13102 free (reloc_vector);
13103 return data;
13104
13105 error_return:
13106 free (reloc_vector);
13107 return NULL;
13108 }
13109 \f
13110 /* Link-time IFC relaxation.
13111 In this optimization, we chains jump instructions
13112 of the same destination with ifcall. */
13113
13114
13115 /* List to save jal and j relocation. */
13116 struct elf_nds32_ifc_symbol_entry
13117 {
13118 asection *sec;
13119 struct elf_link_hash_entry *h;
13120 struct elf_nds32_ifc_irel_list *irel_head;
13121 unsigned long insn;
13122 int times;
13123 int enable; /* Apply ifc. */
13124 int ex9_enable; /* Apply ifc after ex9. */
13125 struct elf_nds32_ifc_symbol_entry *next;
13126 };
13127
13128 struct elf_nds32_ifc_irel_list
13129 {
13130 Elf_Internal_Rela *irel;
13131 asection *sec;
13132 bfd_vma addr;
13133 /* If this is set, then it is the last instruction for
13134 ifc-chain, so it must be keep for the actual branching. */
13135 int keep;
13136 struct elf_nds32_ifc_irel_list *next;
13137 };
13138
13139 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13140
13141 /* Insert symbol of jal and j for ifc. */
13142
13143 static void
13144 nds32_elf_ifc_insert_symbol (asection *sec,
13145 struct elf_link_hash_entry *h,
13146 Elf_Internal_Rela *irel,
13147 unsigned long insn)
13148 {
13149 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13150
13151 /* Check there is target of existing entry the same as the new one. */
13152 while (ptr != NULL)
13153 {
13154 if (((h == NULL && ptr->sec == sec
13155 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13156 && ptr->irel_head->irel->r_addend == irel->r_addend)
13157 || h != NULL)
13158 && ptr->h == h
13159 && ptr->insn == insn)
13160 {
13161 /* The same target exist, so insert into list. */
13162 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13163
13164 while (irel_list->next != NULL)
13165 irel_list = irel_list->next;
13166 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13167 irel_list = irel_list->next;
13168 irel_list->irel = irel;
13169 irel_list->keep = 1;
13170
13171 if (h == NULL)
13172 irel_list->sec = NULL;
13173 else
13174 irel_list->sec = sec;
13175 irel_list->next = NULL;
13176 return;
13177 }
13178 if (ptr->next == NULL)
13179 break;
13180 ptr = ptr->next;
13181 }
13182
13183 /* There is no same target entry, so build a new one. */
13184 if (ifc_symbol_head == NULL)
13185 {
13186 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13187 ptr = ifc_symbol_head;
13188 }
13189 else
13190 {
13191 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13192 ptr = ptr->next;
13193 }
13194
13195 ptr->h = h;
13196 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13197 ptr->irel_head->irel = irel;
13198 ptr->insn = insn;
13199 ptr->irel_head->keep = 1;
13200
13201 if (h == NULL)
13202 {
13203 /* Local symbols. */
13204 ptr->sec = sec;
13205 ptr->irel_head->sec = NULL;
13206 }
13207 else
13208 {
13209 /* Global symbol. */
13210 ptr->sec = NULL;
13211 ptr->irel_head->sec = sec;
13212 }
13213
13214 ptr->irel_head->next = NULL;
13215 ptr->times = 0;
13216 ptr->enable = 0;
13217 ptr->ex9_enable = 0;
13218 ptr->next = NULL;
13219 }
13220
13221 /* Gather all jal and j instructions. */
13222
13223 static bfd_boolean
13224 nds32_elf_ifc_calc (struct bfd_link_info *info,
13225 bfd *abfd, asection *sec)
13226 {
13227 Elf_Internal_Rela *internal_relocs;
13228 Elf_Internal_Rela *irelend;
13229 Elf_Internal_Rela *irel;
13230 Elf_Internal_Shdr *symtab_hdr;
13231 bfd_byte *contents = NULL;
13232 uint32_t insn, insn_with_reg;
13233 unsigned long r_symndx;
13234 struct elf_link_hash_entry *h;
13235 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13236 struct elf_nds32_link_hash_table *table;
13237 bfd_boolean ifc_loop_aware;
13238
13239 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13240 TRUE /* keep_memory */);
13241 irelend = internal_relocs + sec->reloc_count;
13242 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13243
13244 /* Check if the object enable ifc. */
13245 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13246 R_NDS32_RELAX_ENTRY);
13247
13248 if (irel == NULL
13249 || irel >= irelend
13250 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13251 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13252 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13253 return TRUE;
13254
13255 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
13256 return FALSE;
13257
13258 table = nds32_elf_hash_table (info);
13259 ifc_loop_aware = table->ifc_loop_aware;
13260 while (irel != NULL && irel < irelend)
13261 {
13262 /* Traverse all relocation and gather all of them to build the list. */
13263
13264 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13265 {
13266 if (ifc_loop_aware == 1
13267 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13268 {
13269 /* Check the region if loop or not. If it is true and
13270 ifc-loop-aware is true, ignore the region till region end. */
13271 while (irel != NULL
13272 && irel < irelend
13273 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13274 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13275 irel++;
13276 }
13277 }
13278
13279 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13280 {
13281 insn = bfd_getb32 (contents + irel->r_offset);
13282 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13283 r_symndx = ELF32_R_SYM (irel->r_info);
13284 if (r_symndx < symtab_hdr->sh_info)
13285 {
13286 /* Local symbol. */
13287 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13288 }
13289 else
13290 {
13291 /* External symbol. */
13292 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13293 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13294 }
13295 }
13296 irel++;
13297 }
13298 return TRUE;
13299 }
13300
13301 /* Determine whether j and jal should be substituted. */
13302
13303 static void
13304 nds32_elf_ifc_filter (struct bfd_link_info *info)
13305 {
13306 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13307 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13308 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13309 struct elf_nds32_link_hash_table *table;
13310 int target_optimize;
13311 bfd_vma address;
13312
13313 table = nds32_elf_hash_table (info);
13314 target_optimize = table->target_optimize;
13315 while (ptr)
13316 {
13317 irel_ptr = ptr->irel_head;
13318 if (ptr->h == NULL)
13319 {
13320 /* Local symbol. */
13321 irel_keeper = irel_ptr;
13322 while (irel_ptr && irel_ptr->next)
13323 {
13324 /* Check there is jump target can be used. */
13325 if ((irel_ptr->next->irel->r_offset
13326 - irel_keeper->irel->r_offset) > 1022)
13327 irel_keeper = irel_ptr->next;
13328 else
13329 {
13330 ptr->enable = 1;
13331 irel_ptr->keep = 0;
13332 }
13333 irel_ptr = irel_ptr->next;
13334 }
13335 }
13336 else
13337 {
13338 /* Global symbol. */
13339 /* We have to get the absolute address and decide
13340 whether to keep it or not. */
13341 while (irel_ptr)
13342 {
13343 address = (irel_ptr->irel->r_offset
13344 + irel_ptr->sec->output_section->vma
13345 + irel_ptr->sec->output_offset);
13346 irel_ptr->addr = address;
13347 irel_ptr = irel_ptr->next;
13348 }
13349
13350 irel_ptr = ptr->irel_head;
13351 while (irel_ptr)
13352 {
13353 /* Sort by address. */
13354 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13355 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13356 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13357 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13358
13359 /* Get the smallest one. */
13360 while (irel_temp->next)
13361 {
13362 if (irel_temp->next->addr < irel_dest->addr)
13363 {
13364 irel_dest_prev = irel_temp;
13365 irel_dest = irel_temp->next;
13366 }
13367 irel_temp = irel_temp->next;
13368 }
13369
13370 if (irel_dest != irel_ptr)
13371 {
13372 if (irel_ptr_prev)
13373 irel_ptr_prev->next = irel_dest;
13374 if (irel_dest_prev)
13375 irel_dest_prev->next = irel_ptr;
13376 irel_temp = irel_ptr->next;
13377 irel_ptr->next = irel_dest->next;
13378 irel_dest->next = irel_temp;
13379 }
13380 irel_ptr_prev = irel_ptr;
13381 irel_ptr = irel_ptr->next;
13382 }
13383
13384 irel_ptr = ptr->irel_head;
13385 irel_keeper = irel_ptr;
13386 while (irel_ptr && irel_ptr->next)
13387 {
13388 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13389 irel_keeper = irel_ptr->next;
13390 else
13391 {
13392 ptr->enable = 1;
13393 irel_ptr->keep = 0;
13394 }
13395 irel_ptr = irel_ptr->next;
13396 }
13397 }
13398
13399 /* Ex9 enable. Reserve it for ex9. */
13400 if ((target_optimize & NDS32_RELAX_EX9_ON)
13401 && ptr->irel_head != irel_keeper)
13402 ptr->enable = 0;
13403 ptr = ptr->next;
13404 }
13405 }
13406
13407 /* Determine whether j and jal should be substituted after ex9 done. */
13408
13409 static void
13410 nds32_elf_ifc_filter_after_ex9 (void)
13411 {
13412 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13413 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13414
13415 while (ptr)
13416 {
13417 if (ptr->enable == 0)
13418 {
13419 /* Check whether ifc is applied or not. */
13420 irel_ptr = ptr->irel_head;
13421 ptr->ex9_enable = 1;
13422 while (irel_ptr)
13423 {
13424 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13425 {
13426 /* Ex9 already. */
13427 ptr->ex9_enable = 0;
13428 break;
13429 }
13430 irel_ptr = irel_ptr->next;
13431 }
13432 }
13433 ptr = ptr->next;
13434 }
13435 }
13436
13437 /* Wrapper to do ifc relaxation. */
13438
13439 bfd_boolean
13440 nds32_elf_ifc_finish (struct bfd_link_info *info)
13441 {
13442 int relax_status;
13443 struct elf_nds32_link_hash_table *table;
13444
13445 table = nds32_elf_hash_table (info);
13446 relax_status = table->relax_status;
13447
13448 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13449 nds32_elf_ifc_filter (info);
13450 else
13451 nds32_elf_ifc_filter_after_ex9 ();
13452
13453 if (!nds32_elf_ifc_replace (info))
13454 return FALSE;
13455
13456 if (table)
13457 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13458 return TRUE;
13459 }
13460
13461 /* Traverse the result of ifc filter and replace it with ifcall9. */
13462
13463 static bfd_boolean
13464 nds32_elf_ifc_replace (struct bfd_link_info *info)
13465 {
13466 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13467 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13468 nds32_elf_blank_t *relax_blank_list = NULL;
13469 bfd_byte *contents = NULL;
13470 Elf_Internal_Rela *internal_relocs;
13471 Elf_Internal_Rela *irel;
13472 Elf_Internal_Rela *irelend;
13473 unsigned short insn16 = INSN_IFCALL9;
13474 struct elf_nds32_link_hash_table *table;
13475 int relax_status;
13476
13477 table = nds32_elf_hash_table (info);
13478 relax_status = table->relax_status;
13479
13480 while (ptr)
13481 {
13482 /* Traverse the ifc gather list, and replace the
13483 filter entries by ifcall9. */
13484 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
13485 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13486 && ptr->ex9_enable == 1))
13487 {
13488 irel_ptr = ptr->irel_head;
13489 if (ptr->h == NULL)
13490 {
13491 /* Local symbol. */
13492 internal_relocs = _bfd_elf_link_read_relocs
13493 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13494 irelend = internal_relocs + ptr->sec->reloc_count;
13495
13496 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13497 &contents, TRUE))
13498 return FALSE;
13499
13500 while (irel_ptr)
13501 {
13502 if (irel_ptr->keep == 0 && irel_ptr->next)
13503 {
13504 /* The one can be replaced. We have to check whether
13505 there is any alignment point in the region. */
13506 irel = irel_ptr->irel;
13507 while (((irel_ptr->next->keep == 0
13508 && irel < irel_ptr->next->irel)
13509 || (irel_ptr->next->keep == 1 && irel < irelend))
13510 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13511 && (irel->r_addend & 0x1f) == 2))
13512 irel++;
13513 if (irel >= irelend
13514 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13515 && (irel->r_addend & 0x1f) == 2
13516 && ((irel->r_offset - get_nds32_elf_blank_total
13517 (&relax_blank_list, irel->r_offset, 1))
13518 & 0x02) == 0))
13519 {
13520 /* Replace by ifcall9. */
13521 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13522 if (!insert_nds32_elf_blank_recalc_total
13523 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13524 return FALSE;
13525 irel_ptr->irel->r_info =
13526 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13527 R_NDS32_10IFCU_PCREL_RELA);
13528 }
13529 }
13530 irel_ptr = irel_ptr->next;
13531 }
13532
13533 /* Delete the redundant code. */
13534 if (relax_blank_list)
13535 {
13536 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13537 relax_blank_list);
13538 relax_blank_list = NULL;
13539 }
13540 }
13541 else
13542 {
13543 /* Global symbol. */
13544 while (irel_ptr)
13545 {
13546 if (irel_ptr->keep == 0 && irel_ptr->next)
13547 {
13548 /* The one can be replaced, and we have to check
13549 whether there is any alignment point in the region. */
13550 internal_relocs = _bfd_elf_link_read_relocs
13551 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13552 TRUE /* keep_memory */);
13553 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13554 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13555 irel_ptr->sec, &contents,
13556 TRUE))
13557 return FALSE;
13558
13559 irel = irel_ptr->irel;
13560 while (((irel_ptr->sec == irel_ptr->next->sec
13561 && irel_ptr->next->keep == 0
13562 && irel < irel_ptr->next->irel)
13563 || ((irel_ptr->sec != irel_ptr->next->sec
13564 || irel_ptr->next->keep == 1)
13565 && irel < irelend))
13566 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13567 && (irel->r_addend & 0x1f) == 2))
13568 irel++;
13569 if (irel >= irelend
13570 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13571 && (irel->r_addend & 0x1f) == 2
13572 && ((irel->r_offset
13573 - get_nds32_elf_blank_total (&relax_blank_list,
13574 irel->r_offset, 1)) & 0x02) == 0))
13575 {
13576 /* Replace by ifcall9. */
13577 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13578 if (!insert_nds32_elf_blank_recalc_total
13579 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13580 return FALSE;
13581
13582 /* Delete the redundant code, and clear the relocation. */
13583 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13584 irel_ptr->sec,
13585 relax_blank_list);
13586 irel_ptr->irel->r_info =
13587 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13588 R_NDS32_10IFCU_PCREL_RELA);
13589 relax_blank_list = NULL;
13590 }
13591 }
13592
13593 irel_ptr = irel_ptr->next;
13594 }
13595 }
13596 }
13597 ptr = ptr->next;
13598 }
13599
13600 return TRUE;
13601 }
13602
13603 /* Relocate ifcall. */
13604
13605 static bfd_boolean
13606 nds32_elf_ifc_reloc (void)
13607 {
13608 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13609 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13610 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13611 bfd_vma relocation, address;
13612 unsigned short insn16;
13613 bfd_byte *contents = NULL;
13614 static bfd_boolean done = FALSE;
13615
13616 if (done)
13617 return TRUE;
13618
13619 done = TRUE;
13620
13621 while (ptr)
13622 {
13623 /* Check the entry is enable ifcall. */
13624 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13625 {
13626 /* Get the reserve jump. */
13627 irel_ptr = ptr->irel_head;
13628 while (irel_ptr)
13629 {
13630 if (irel_ptr->keep == 1)
13631 {
13632 irel_keeper = irel_ptr;
13633 break;
13634 }
13635 irel_ptr = irel_ptr->next;
13636 }
13637
13638 irel_ptr = ptr->irel_head;
13639 if (ptr->h == NULL)
13640 {
13641 /* Local symbol. */
13642 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13643 &contents, TRUE))
13644 return FALSE;
13645
13646 while (irel_ptr)
13647 {
13648 if (irel_ptr->keep == 0
13649 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13650 {
13651 relocation = irel_keeper->irel->r_offset;
13652 relocation = relocation - irel_ptr->irel->r_offset;
13653 while (irel_keeper && relocation > 1022)
13654 {
13655 irel_keeper = irel_keeper->next;
13656 if (irel_keeper && irel_keeper->keep == 1)
13657 {
13658 relocation = irel_keeper->irel->r_offset;
13659 relocation = relocation - irel_ptr->irel->r_offset;
13660 }
13661 }
13662 if (relocation > 1022)
13663 {
13664 /* Double check. */
13665 irel_keeper = ptr->irel_head;
13666 while (irel_keeper)
13667 {
13668 if (irel_keeper->keep == 1)
13669 {
13670 relocation = irel_keeper->irel->r_offset;
13671 relocation = relocation - irel_ptr->irel->r_offset;
13672 }
13673 if (relocation <= 1022)
13674 break;
13675 irel_keeper = irel_keeper->next;
13676 }
13677 if (!irel_keeper)
13678 return FALSE;
13679 }
13680 irel_ptr->irel->r_info =
13681 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13682 R_NDS32_NONE);
13683 insn16 = INSN_IFCALL9 | (relocation >> 1);
13684 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13685 }
13686 irel_ptr = irel_ptr->next;
13687 }
13688 }
13689 else
13690 {
13691 /* Global symbol. */
13692 while (irel_ptr)
13693 {
13694 if (irel_ptr->keep == 0
13695 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13696 {
13697 /* Get the distance between ifcall and jump. */
13698 relocation = (irel_keeper->irel->r_offset
13699 + irel_keeper->sec->output_section->vma
13700 + irel_keeper->sec->output_offset);
13701 address = (irel_ptr->irel->r_offset
13702 + irel_ptr->sec->output_section->vma
13703 + irel_ptr->sec->output_offset);
13704 relocation = relocation - address;
13705
13706 /* The distance is over ragne, find callee again. */
13707 while (irel_keeper && relocation > 1022)
13708 {
13709 irel_keeper = irel_keeper->next;
13710 if (irel_keeper && irel_keeper->keep ==1)
13711 {
13712 relocation = (irel_keeper->irel->r_offset
13713 + irel_keeper->sec->output_section->vma
13714 + irel_keeper->sec->output_offset);
13715 relocation = relocation - address;
13716 }
13717 }
13718
13719 if (relocation > 1022)
13720 {
13721 /* Double check. */
13722 irel_keeper = ptr->irel_head;
13723 while (irel_keeper)
13724 {
13725 if (irel_keeper->keep == 1)
13726 {
13727
13728 relocation = (irel_keeper->irel->r_offset
13729 + irel_keeper->sec->output_section->vma
13730 + irel_keeper->sec->output_offset);
13731 relocation = relocation - address;
13732 }
13733 if (relocation <= 1022)
13734 break;
13735 irel_keeper = irel_keeper->next;
13736 }
13737 if (!irel_keeper)
13738 return FALSE;
13739 }
13740 if (!nds32_get_section_contents
13741 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
13742 return FALSE;
13743 insn16 = INSN_IFCALL9 | (relocation >> 1);
13744 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13745 irel_ptr->irel->r_info =
13746 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13747 R_NDS32_NONE);
13748 }
13749 irel_ptr =irel_ptr->next;
13750 }
13751 }
13752 }
13753 ptr = ptr->next;
13754 }
13755
13756 return TRUE;
13757 }
13758
13759 /* End of IFC relaxation. */
13760 \f
13761 /* EX9 Instruction Table Relaxation. */
13762
13763 /* Global hash list. */
13764 struct elf_link_hash_entry_list
13765 {
13766 struct elf_link_hash_entry *h;
13767 struct elf_link_hash_entry_list *next;
13768 };
13769
13770 /* Save different destination but same insn. */
13771 struct elf_link_hash_entry_mul_list
13772 {
13773 /* Global symbol times. */
13774 int times;
13775 /* Save relocation for each global symbol but useful?? */
13776 Elf_Internal_Rela *irel;
13777 /* For sethi, two sethi may have the same high-part but different low-parts. */
13778 Elf_Internal_Rela rel_backup;
13779 struct elf_link_hash_entry_list *h_list;
13780 struct elf_link_hash_entry_mul_list *next;
13781 };
13782
13783 /* Instruction hash table. */
13784 struct elf_nds32_code_hash_entry
13785 {
13786 struct bfd_hash_entry root;
13787 int times;
13788 /* For insn that can use relocation or constant ex: sethi. */
13789 int const_insn;
13790 asection *sec;
13791 struct elf_link_hash_entry_mul_list *m_list;
13792 /* Using r_addend. */
13793 Elf_Internal_Rela *irel;
13794 /* Using r_info. */
13795 Elf_Internal_Rela rel_backup;
13796 };
13797
13798 /* Instruction count list. */
13799 struct elf_nds32_insn_times_entry
13800 {
13801 const char *string;
13802 int times;
13803 int order;
13804 asection *sec;
13805 struct elf_link_hash_entry_mul_list *m_list;
13806 Elf_Internal_Rela *irel;
13807 Elf_Internal_Rela rel_backup;
13808 struct elf_nds32_insn_times_entry *next;
13809 };
13810
13811 /* J and JAL symbol list. */
13812 struct elf_nds32_symbol_entry
13813 {
13814 char *string;
13815 unsigned long insn;
13816 struct elf_nds32_symbol_entry *next;
13817 };
13818
13819 /* Relocation list. */
13820 struct elf_nds32_irel_entry
13821 {
13822 Elf_Internal_Rela *irel;
13823 struct elf_nds32_irel_entry *next;
13824 };
13825
13826 /* ex9.it insn need to be fixed. */
13827 struct elf_nds32_ex9_refix
13828 {
13829 Elf_Internal_Rela *irel;
13830 asection *sec;
13831 struct elf_link_hash_entry *h;
13832 int order;
13833 struct elf_nds32_ex9_refix *next;
13834 };
13835
13836 static struct bfd_hash_table ex9_code_table;
13837 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13838 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13839
13840 /* EX9 hash function. */
13841
13842 static struct bfd_hash_entry *
13843 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13844 struct bfd_hash_table *table,
13845 const char *string)
13846 {
13847 struct elf_nds32_code_hash_entry *ret;
13848
13849 /* Allocate the structure if it has not already been allocated by a
13850 subclass. */
13851 if (entry == NULL)
13852 {
13853 entry = (struct bfd_hash_entry *)
13854 bfd_hash_allocate (table, sizeof (*ret));
13855 if (entry == NULL)
13856 return entry;
13857 }
13858
13859 /* Call the allocation method of the superclass. */
13860 entry = bfd_hash_newfunc (entry, table, string);
13861 if (entry == NULL)
13862 return entry;
13863
13864 ret = (struct elf_nds32_code_hash_entry*) entry;
13865 ret->times = 0;
13866 ret->const_insn = 0;
13867 ret->m_list = NULL;
13868 ret->sec = NULL;
13869 ret->irel = NULL;
13870 return &ret->root;
13871 }
13872
13873 /* Insert ex9 entry
13874 this insert must be stable sorted by times. */
13875
13876 static void
13877 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13878 {
13879 struct elf_nds32_insn_times_entry *temp;
13880 struct elf_nds32_insn_times_entry *temp2;
13881
13882 if (ex9_insn_head == NULL)
13883 {
13884 ex9_insn_head = ptr;
13885 ptr->next = NULL;
13886 }
13887 else
13888 {
13889 temp = ex9_insn_head;
13890 temp2 = ex9_insn_head;
13891 while (temp->next &&
13892 (temp->next->times >= ptr->times
13893 || temp->times == -1))
13894 {
13895 if (temp->times == -1)
13896 temp2 = temp;
13897 temp = temp->next;
13898 }
13899 if (ptr->times > temp->times && temp->times != -1)
13900 {
13901 ptr->next = temp;
13902 if (temp2->times == -1)
13903 temp2->next = ptr;
13904 else
13905 ex9_insn_head = ptr;
13906 }
13907 else if (temp->next == NULL)
13908 {
13909 temp->next = ptr;
13910 ptr->next = NULL;
13911 }
13912 else
13913 {
13914 ptr->next = temp->next;
13915 temp->next = ptr;
13916 }
13917 }
13918 }
13919
13920 /* Examine each insn times in hash table.
13921 Handle multi-link hash entry.
13922
13923 TODO: This function doesn't assign so much info since it is fake. */
13924
13925 static int
13926 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13927 {
13928 struct elf_nds32_insn_times_entry *ptr;
13929 int times;
13930
13931 if (h->m_list == NULL)
13932 {
13933 /* Local symbol insn or insn without relocation. */
13934 if (h->times < 3)
13935 return TRUE;
13936
13937 ptr = (struct elf_nds32_insn_times_entry *)
13938 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13939 ptr->times = h->times;
13940 ptr->string = h->root.string;
13941 ptr->m_list = NULL;
13942 ptr->sec = h->sec;
13943 ptr->irel = h->irel;
13944 ptr->rel_backup = h->rel_backup;
13945 nds32_elf_ex9_insert_entry (ptr);
13946 }
13947 else
13948 {
13949 /* Global symbol insn. */
13950 /* Only sethi insn has multiple m_list. */
13951 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13952
13953 times = 0;
13954 while (m_list)
13955 {
13956 times += m_list->times;
13957 m_list = m_list->next;
13958 }
13959 if (times >= 3)
13960 {
13961 m_list = h->m_list;
13962 ptr = (struct elf_nds32_insn_times_entry *)
13963 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13964 ptr->times = times; /* Use the total times. */
13965 ptr->string = h->root.string;
13966 ptr->m_list = m_list;
13967 ptr->sec = h->sec;
13968 ptr->irel = m_list->irel;
13969 ptr->rel_backup = m_list->rel_backup;
13970 nds32_elf_ex9_insert_entry (ptr);
13971 }
13972 if (h->const_insn == 1)
13973 {
13974 /* sethi with constant value. */
13975 if (h->times < 3)
13976 return TRUE;
13977
13978 ptr = (struct elf_nds32_insn_times_entry *)
13979 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13980 ptr->times = h->times;
13981 ptr->string = h->root.string;
13982 ptr->m_list = NULL;
13983 ptr->sec = NULL;
13984 ptr->irel = NULL;
13985 ptr->rel_backup = h->rel_backup;
13986 nds32_elf_ex9_insert_entry (ptr);
13987 }
13988 }
13989 return TRUE;
13990 }
13991
13992 /* Count each insn times in hash table.
13993 Handle multi-link hash entry. */
13994
13995 static int
13996 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13997 {
13998 int reservation, times;
13999 unsigned long relocation, min_relocation;
14000 struct elf_nds32_insn_times_entry *ptr;
14001
14002 if (h->m_list == NULL)
14003 {
14004 /* Local symbol insn or insn without relocation. */
14005 if (h->times < 3)
14006 return TRUE;
14007 ptr = (struct elf_nds32_insn_times_entry *)
14008 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14009 ptr->times = h->times;
14010 ptr->string = h->root.string;
14011 ptr->m_list = NULL;
14012 ptr->sec = h->sec;
14013 ptr->irel = h->irel;
14014 ptr->rel_backup = h->rel_backup;
14015 nds32_elf_ex9_insert_entry (ptr);
14016 }
14017 else
14018 {
14019 /* Global symbol insn. */
14020 /* Only sethi insn has multiple m_list. */
14021 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14022
14023 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14024 && m_list->next != NULL)
14025 {
14026 /* Sethi insn has different symbol or addend but has same hi20. */
14027 times = 0;
14028 reservation = 1;
14029 relocation = 0;
14030 min_relocation = 0xffffffff;
14031 while (m_list)
14032 {
14033 /* Get the minimum sethi address
14034 and calculate how many entry the sethi-list have to use. */
14035 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14036 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14037 && (m_list->h_list->h->root.u.def.section != NULL
14038 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14039 {
14040 relocation = (m_list->h_list->h->root.u.def.value +
14041 m_list->h_list->h->root.u.def.section->output_section->vma +
14042 m_list->h_list->h->root.u.def.section->output_offset);
14043 relocation += m_list->irel->r_addend;
14044 }
14045 else
14046 relocation = 0;
14047 if (relocation < min_relocation)
14048 min_relocation = relocation;
14049 times += m_list->times;
14050 m_list = m_list->next;
14051 }
14052 if (min_relocation < ex9_relax_size)
14053 reservation = (min_relocation >> 12) + 1;
14054 else
14055 reservation = (min_relocation >> 12)
14056 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14057 if (reservation < (times / 3))
14058 {
14059 /* Efficient enough to use ex9. */
14060 int i;
14061
14062 for (i = reservation ; i > 0; i--)
14063 {
14064 /* Allocate number of reservation ex9 entry. */
14065 ptr = (struct elf_nds32_insn_times_entry *)
14066 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14067 ptr->times = h->m_list->times / reservation;
14068 ptr->string = h->root.string;
14069 ptr->m_list = h->m_list;
14070 ptr->sec = h->sec;
14071 ptr->irel = h->m_list->irel;
14072 ptr->rel_backup = h->m_list->rel_backup;
14073 nds32_elf_ex9_insert_entry (ptr);
14074 }
14075 }
14076 }
14077 else
14078 {
14079 /* Normal global symbol that means no different address symbol
14080 using same ex9 entry. */
14081 if (m_list->times >= 3)
14082 {
14083 ptr = (struct elf_nds32_insn_times_entry *)
14084 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14085 ptr->times = m_list->times;
14086 ptr->string = h->root.string;
14087 ptr->m_list = h->m_list;
14088 ptr->sec = h->sec;
14089 ptr->irel = h->m_list->irel;
14090 ptr->rel_backup = h->m_list->rel_backup;
14091 nds32_elf_ex9_insert_entry (ptr);
14092 }
14093 }
14094
14095 if (h->const_insn == 1)
14096 {
14097 /* sethi with constant value. */
14098 if (h->times < 3)
14099 return TRUE;
14100
14101 ptr = (struct elf_nds32_insn_times_entry *)
14102 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14103 ptr->times = h->times;
14104 ptr->string = h->root.string;
14105 ptr->m_list = NULL;
14106 ptr->sec = NULL;
14107 ptr->irel = NULL;
14108 ptr->rel_backup = h->rel_backup;
14109 nds32_elf_ex9_insert_entry (ptr);
14110 }
14111 }
14112
14113 return TRUE;
14114 }
14115
14116 /* Hash table traverse function. */
14117
14118 static void
14119 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14120 {
14121 unsigned int i;
14122
14123 ex9_code_table.frozen = 1;
14124 for (i = 0; i < ex9_code_table.size; i++)
14125 {
14126 struct bfd_hash_entry *p;
14127
14128 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14129 if (!func ((struct elf_nds32_code_hash_entry *) p))
14130 goto out;
14131 }
14132 out:
14133 ex9_code_table.frozen = 0;
14134 }
14135
14136
14137 /* Give order number to insn list. */
14138
14139 static void
14140 nds32_elf_order_insn_times (struct bfd_link_info *info)
14141 {
14142 struct elf_nds32_insn_times_entry *ex9_insn;
14143 struct elf_nds32_insn_times_entry *temp = NULL;
14144 struct elf_nds32_link_hash_table *table;
14145 int ex9_limit;
14146 int number = 0;
14147
14148 if (ex9_insn_head == NULL)
14149 return;
14150
14151 /* The max number of entries is 512. */
14152 ex9_insn = ex9_insn_head;
14153 table = nds32_elf_hash_table (info);
14154 ex9_limit = table->ex9_limit;
14155
14156 ex9_insn = ex9_insn_head;
14157
14158 while (ex9_insn != NULL && number < ex9_limit)
14159 {
14160 ex9_insn->order = number;
14161 number++;
14162 temp = ex9_insn;
14163 ex9_insn = ex9_insn->next;
14164 }
14165
14166 if (ex9_insn && temp)
14167 temp->next = NULL;
14168
14169 while (ex9_insn != NULL)
14170 {
14171 /* Free useless entry. */
14172 temp = ex9_insn;
14173 ex9_insn = ex9_insn->next;
14174 free (temp);
14175 }
14176 }
14177
14178 /* Build .ex9.itable section. */
14179
14180 static void
14181 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14182 {
14183 asection *table_sec;
14184 struct elf_nds32_insn_times_entry *ptr;
14185 bfd *it_abfd;
14186 int number = 0;
14187 bfd_byte *contents = NULL;
14188
14189 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
14190 it_abfd = it_abfd->link.next)
14191 {
14192 /* Find the section .ex9.itable, and put all entries into it. */
14193 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14194 if (table_sec != NULL)
14195 {
14196 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
14197 return;
14198
14199 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14200 number++;
14201
14202 table_sec->size = number * 4;
14203
14204 if (number == 0)
14205 return;
14206
14207 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14208 number = 0;
14209 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14210 {
14211 long val;
14212
14213 val = strtol (ptr->string, NULL, 16);
14214 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14215 number++;
14216 }
14217 break;
14218 }
14219 }
14220 }
14221
14222 /* Get insn with regs according to relocation type. */
14223
14224 static void
14225 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
14226 uint32_t insn, uint32_t *insn_with_reg)
14227 {
14228 reloc_howto_type *howto = NULL;
14229
14230 if (irel == NULL
14231 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14232 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14233 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14234 {
14235 *insn_with_reg = insn;
14236 return;
14237 }
14238
14239 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14240 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14241 }
14242
14243 /* Mask number of address bits according to relocation. */
14244
14245 static unsigned long
14246 nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14247 {
14248 reloc_howto_type *howto = NULL;
14249
14250 if (irel == NULL
14251 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14252 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14253 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14254 return 0;
14255
14256 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14257 return howto->dst_mask;
14258 }
14259
14260 static void
14261 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14262 struct elf_nds32_irel_entry *irel_ptr)
14263 {
14264 if (*irel_list == NULL)
14265 {
14266 *irel_list = irel_ptr;
14267 irel_ptr->next = NULL;
14268 }
14269 else
14270 {
14271 irel_ptr->next = *irel_list;
14272 *irel_list = irel_ptr;
14273 }
14274 }
14275
14276 static void
14277 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14278 struct elf_link_hash_entry *h, int order)
14279 {
14280 struct elf_nds32_ex9_refix *ptr;
14281
14282 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14283 ptr->sec = sec;
14284 ptr->irel = irel;
14285 ptr->h = h;
14286 ptr->order = order;
14287 ptr->next = NULL;
14288
14289 if (ex9_refix_head == NULL)
14290 ex9_refix_head = ptr;
14291 else
14292 {
14293 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14294
14295 while (temp->next != NULL)
14296 temp = temp->next;
14297 temp->next = ptr;
14298 }
14299 }
14300
14301 enum
14302 {
14303 DATA_EXIST = 1,
14304 CLEAN_PRE = 1 << 1,
14305 PUSH_PRE = 1 << 2
14306 };
14307
14308 /* Check relocation type if supporting for ex9. */
14309
14310 static int
14311 nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14312 Elf_Internal_Rela **irel,
14313 Elf_Internal_Rela *irelend,
14314 nds32_elf_blank_t *relax_blank_list,
14315 asection *sec,bfd_vma *off,
14316 bfd_byte *contents)
14317 {
14318 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14319 bfd_boolean nested_ex9, nested_loop;
14320 bfd_boolean ex9_loop_aware;
14321 /* We use the highest 1 byte of result to record
14322 how many bytes location counter has to move. */
14323 int result = 0;
14324 Elf_Internal_Rela *irel_save = NULL;
14325 struct elf_nds32_link_hash_table *table;
14326
14327 table = nds32_elf_hash_table (info);
14328 ex9_loop_aware = table->ex9_loop_aware;
14329
14330 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14331 {
14332 switch (ELF32_R_TYPE ((*irel)->r_info))
14333 {
14334 case R_NDS32_RELAX_REGION_BEGIN:
14335 /* Ignore code block. */
14336 nested_ex9 = FALSE;
14337 nested_loop = FALSE;
14338 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14339 || (ex9_loop_aware
14340 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14341 {
14342 /* Check the region if loop or not. If it is true and
14343 ex9-loop-aware is true, ignore the region till region end. */
14344 /* To save the status for in .no_relax ex9 region and
14345 loop region to conform the block can do ex9 relaxation. */
14346 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14347 nested_loop = (ex9_loop_aware
14348 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14349 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14350 {
14351 (*irel)++;
14352 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14353 {
14354 /* There may be nested region. */
14355 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14356 nested_ex9 = TRUE;
14357 else if (ex9_loop_aware
14358 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14359 nested_loop = TRUE;
14360 }
14361 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14362 {
14363 /* The end of region. */
14364 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14365 nested_ex9 = FALSE;
14366 else if (ex9_loop_aware
14367 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14368 nested_loop = FALSE;
14369 }
14370 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
14371 && ((*irel)->r_addend & 0x1f) == 2)
14372 {
14373 /* Alignment exist in the region. */
14374 result |= CLEAN_PRE;
14375 if (((*irel)->r_offset -
14376 get_nds32_elf_blank_total (&relax_blank_list,
14377 (*irel)->r_offset, 0)) & 0x02)
14378 result |= PUSH_PRE;
14379 }
14380 }
14381 if ((*irel) >= irelend)
14382 *off = sec->size;
14383 else
14384 *off = (*irel)->r_offset;
14385
14386 /* The final instruction in the region, regard this one as data to ignore it. */
14387 result |= DATA_EXIST;
14388 return result;
14389 }
14390 break;
14391
14392 case R_NDS32_LABEL:
14393 if (((*irel)->r_addend & 0x1f) == 2)
14394 {
14395 /* Check this point is align and decide to do ex9 or not. */
14396 result |= CLEAN_PRE;
14397 if (((*irel)->r_offset -
14398 get_nds32_elf_blank_total (&relax_blank_list,
14399 (*irel)->r_offset, 0)) & 0x02)
14400 result |= PUSH_PRE;
14401 }
14402 break;
14403 case R_NDS32_32_RELA:
14404 /* Data. */
14405 result |= (4 << 24);
14406 result |= DATA_EXIST;
14407 break;
14408 case R_NDS32_16_RELA:
14409 /* Data. */
14410 result |= (2 << 24);
14411 result |= DATA_EXIST;
14412 break;
14413 case R_NDS32_DATA:
14414 /* Data. */
14415 /* The least code alignment is 2. If the data is only one byte,
14416 we have to shift one more byte. */
14417 if ((*irel)->r_addend == 1)
14418 result |= ((*irel)->r_addend << 25) ;
14419 else
14420 result |= ((*irel)->r_addend << 24) ;
14421
14422 result |= DATA_EXIST;
14423 break;
14424
14425 case R_NDS32_25_PCREL_RELA:
14426 case R_NDS32_SDA16S3_RELA:
14427 case R_NDS32_SDA15S3_RELA:
14428 case R_NDS32_SDA15S3:
14429 case R_NDS32_SDA17S2_RELA:
14430 case R_NDS32_SDA15S2_RELA:
14431 case R_NDS32_SDA12S2_SP_RELA:
14432 case R_NDS32_SDA12S2_DP_RELA:
14433 case R_NDS32_SDA15S2:
14434 case R_NDS32_SDA18S1_RELA:
14435 case R_NDS32_SDA15S1_RELA:
14436 case R_NDS32_SDA15S1:
14437 case R_NDS32_SDA19S0_RELA:
14438 case R_NDS32_SDA15S0_RELA:
14439 case R_NDS32_SDA15S0:
14440 case R_NDS32_HI20_RELA:
14441 case R_NDS32_LO12S0_ORI_RELA:
14442 case R_NDS32_LO12S0_RELA:
14443 case R_NDS32_LO12S1_RELA:
14444 case R_NDS32_LO12S2_RELA:
14445 /* These relocation is supported ex9 relaxation currently. */
14446 /* We have to save the relocation for using later, since we have
14447 to check there is any alignment in the same address. */
14448 irel_save = *irel;
14449 break;
14450 default:
14451 /* Not support relocations. */
14452 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
14453 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14454 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
14455 {
14456 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14457 But we have to consider if there is any side-effect. */
14458 if (!(result & DATA_EXIST))
14459 {
14460 /* We have to confirm there is no data relocation in the
14461 same address. In general case, this won't happen. */
14462 /* We have to do ex9 conservative, for those relocation not
14463 considerd we ignore instruction. */
14464 result |= DATA_EXIST;
14465 if (*(contents + *off) & 0x80)
14466 result |= (2 << 24);
14467 else
14468 result |= (4 << 24);
14469 break;
14470 }
14471 }
14472 }
14473 if ((*irel) < irelend
14474 && ((*irel) + 1) < irelend
14475 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14476 /* There are relocations pointing to the same address, we have to
14477 check all of them. */
14478 (*irel)++;
14479 else
14480 {
14481 if (irel_save)
14482 *irel = irel_save;
14483 return result;
14484 }
14485 }
14486 return result;
14487 }
14488
14489 /* Replace with ex9 instruction. */
14490
14491 static bfd_boolean
14492 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14493 nds32_elf_blank_t **relax_blank_list,
14494 struct elf_nds32_irel_entry *pre_irel_ptr,
14495 struct elf_nds32_irel_entry **irel_list)
14496 {
14497 if (insn16 != 0)
14498 {
14499 /* Implement the ex9 relaxation. */
14500 bfd_putb16 (insn16, contents + pre_off);
14501 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14502 pre_off + 2, 2))
14503 return FALSE;
14504 if (pre_irel_ptr != NULL)
14505 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14506 }
14507 return TRUE;
14508 }
14509
14510 /* Replace input file instruction which is in ex9 itable. */
14511
14512 static bfd_boolean
14513 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14514 {
14515 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14516 bfd_byte *contents = NULL;
14517 bfd_vma off;
14518 uint16_t insn16, insn_ex9;
14519 /* `pre_*' are used to track previous instruction that can use ex9.it. */
14520 bfd_vma pre_off = -1;
14521 uint16_t pre_insn16 = 0;
14522 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14523 Elf_Internal_Rela *internal_relocs;
14524 Elf_Internal_Rela *irel;
14525 Elf_Internal_Rela *irelend;
14526 Elf_Internal_Shdr *symtab_hdr;
14527 Elf_Internal_Sym *isym = NULL;
14528 nds32_elf_blank_t *relax_blank_list = NULL;
14529 uint32_t insn = 0;
14530 uint32_t insn_with_reg = 0;
14531 uint32_t it_insn;
14532 uint32_t it_insn_with_reg;
14533 unsigned long r_symndx;
14534 asection *isec;
14535 struct elf_nds32_irel_entry *irel_list = NULL;
14536 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14537 int data_flag, do_replace, save_irel;
14538 struct elf_link_hash_entry_list *h_list;
14539
14540
14541 /* Load section instructions, relocations, and symbol table. */
14542 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
14543 || !nds32_get_local_syms (abfd, sec, &isym))
14544 return FALSE;
14545 internal_relocs =
14546 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
14547 irelend = internal_relocs + sec->reloc_count;
14548 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14549
14550 off = 0;
14551
14552 /* Check if the object enable ex9. */
14553 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14554 irelend, R_NDS32_RELAX_ENTRY);
14555
14556 /* Check this section trigger ex9 relaxation. */
14557 if (irel == NULL
14558 || irel >= irelend
14559 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14560 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14561 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14562 return TRUE;
14563
14564 irel = internal_relocs;
14565
14566 /* Check alignment and fetch proper relocation. */
14567 while (off < sec->size)
14568 {
14569 struct elf_link_hash_entry *h = NULL;
14570 struct elf_nds32_irel_entry *irel_ptr = NULL;
14571
14572 /* Syn the instruction and the relocation. */
14573 while (irel != NULL && irel < irelend && irel->r_offset < off)
14574 irel++;
14575
14576 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14577 relax_blank_list, sec,
14578 &off, contents);
14579 if (data_flag & PUSH_PRE)
14580 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14581 &relax_blank_list, pre_irel_ptr,
14582 &irel_list))
14583 return FALSE;
14584
14585 if (data_flag & CLEAN_PRE)
14586 {
14587 pre_off = 0;
14588 pre_insn16 = 0;
14589 pre_irel_ptr = NULL;
14590 }
14591 if (data_flag & DATA_EXIST)
14592 {
14593 /* We save the move offset in the highest byte. */
14594 off += (data_flag >> 24);
14595 continue;
14596 }
14597
14598 if (*(contents + off) & 0x80)
14599 {
14600 /* 2-byte instruction. */
14601 off += 2;
14602 continue;
14603 }
14604
14605 /* Load the instruction and its opcode with register for comparing. */
14606 ex9_insn = ex9_insn_head;
14607 insn = bfd_getb32 (contents + off);
14608 insn_with_reg = 0;
14609 while (ex9_insn)
14610 {
14611 it_insn = strtol (ex9_insn->string, NULL, 16);
14612 it_insn_with_reg = 0;
14613 do_replace = 0;
14614 save_irel = 0;
14615
14616 if (irel != NULL && irel < irelend && irel->r_offset == off)
14617 {
14618 /* Insn with relocation. */
14619 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14620
14621 if (ex9_insn->irel != NULL)
14622 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14623 &it_insn_with_reg);
14624
14625 if (ex9_insn->irel != NULL
14626 && (ELF32_R_TYPE (irel->r_info) ==
14627 ELF32_R_TYPE (ex9_insn->irel->r_info))
14628 && (insn_with_reg == it_insn_with_reg))
14629 {
14630 /* Insn relocation and format is the same as table entry. */
14631
14632 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14633 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14634 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14635 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14636 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14637 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14638 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14639 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14640 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14641 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14642 && ELF32_R_TYPE (irel->r_info) <=
14643 R_NDS32_SDA12S2_SP_RELA)
14644 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14645 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14646 {
14647 r_symndx = ELF32_R_SYM (irel->r_info);
14648 if (r_symndx < symtab_hdr->sh_info)
14649 {
14650 /* Local symbol. */
14651 int shndx = isym[r_symndx].st_shndx;
14652
14653 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14654 if (ex9_insn->sec == isec
14655 && ex9_insn->irel->r_addend == irel->r_addend
14656 && ex9_insn->irel->r_info == irel->r_info)
14657 {
14658 do_replace = 1;
14659 save_irel = 1;
14660 }
14661 }
14662 else
14663 {
14664 /* External symbol. */
14665 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14666 if (ex9_insn->m_list)
14667 {
14668 h_list = ex9_insn->m_list->h_list;
14669 while (h_list)
14670 {
14671 if (h == h_list->h
14672 && (ex9_insn->m_list->irel->r_addend ==
14673 irel->r_addend))
14674 {
14675 do_replace = 1;
14676 save_irel = 1;
14677 break;
14678 }
14679 h_list = h_list->next;
14680 }
14681 }
14682 }
14683 }
14684 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14685 {
14686 r_symndx = ELF32_R_SYM (irel->r_info);
14687 if (r_symndx < symtab_hdr->sh_info)
14688 {
14689 /* Local symbols. Compare its base symbol and offset. */
14690 int shndx = isym[r_symndx].st_shndx;
14691
14692 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14693 if (ex9_insn->sec == isec
14694 && ex9_insn->irel->r_addend == irel->r_addend
14695 && ex9_insn->irel->r_info == irel->r_info)
14696 {
14697 do_replace = 1;
14698 save_irel = 1;
14699 }
14700 }
14701 else
14702 {
14703 /* External symbol. */
14704 struct elf_link_hash_entry_mul_list *m_list;
14705
14706 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14707 m_list = ex9_insn->m_list;
14708
14709 while (m_list)
14710 {
14711 h_list = m_list->h_list;
14712
14713 while (h_list)
14714 {
14715 if (h == h_list->h
14716 && (m_list->irel->r_addend
14717 == irel->r_addend))
14718 {
14719 do_replace = 1;
14720 save_irel = 1;
14721 if (ex9_insn->next
14722 && ex9_insn->m_list
14723 && ex9_insn->m_list == ex9_insn->next->m_list)
14724 {
14725 /* sethi multiple entry must be fixed */
14726 nds32_elf_ex9_insert_fix (sec, irel,
14727 h, ex9_insn->order);
14728 }
14729 break;
14730 }
14731 h_list = h_list->next;
14732 }
14733 m_list = m_list->next;
14734 }
14735 }
14736 }
14737 }
14738
14739 /* Import table: Check the symbol hash table and the
14740 jump target. Only R_NDS32_25_PCREL_RELA now. */
14741 else if (ex9_insn->times == -1
14742 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14743 {
14744 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14745 if (insn_with_reg == it_insn_with_reg)
14746 {
14747 char code[10];
14748 bfd_vma relocation;
14749
14750 r_symndx = ELF32_R_SYM (irel->r_info);
14751 if (r_symndx >= symtab_hdr->sh_info)
14752 {
14753 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14754 if ((h->root.type == bfd_link_hash_defined
14755 || h->root.type == bfd_link_hash_defweak)
14756 && h->root.u.def.section != NULL
14757 && h->root.u.def.section->output_section != NULL
14758 && h->root.u.def.section->gc_mark == 1
14759 && bfd_is_abs_section (h->root.u.def.section)
14760 && h->root.u.def.value > sec->size)
14761 {
14762 relocation = h->root.u.def.value +
14763 h->root.u.def.section->output_section->vma +
14764 h->root.u.def.section->output_offset;
14765 relocation += irel->r_addend;
14766 insn = insn_with_reg
14767 | ((relocation >> 1) & 0xffffff);
14768 snprintf (code, sizeof (code), "%08x", insn);
14769 if (strcmp (code, ex9_insn->string) == 0)
14770 {
14771 do_replace = 1;
14772 save_irel = 1;
14773 }
14774 }
14775 }
14776 }
14777 }
14778 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14779 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14780 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
14781 {
14782 /* These relocations do not have to relocate contens, so it can
14783 be regard as instruction without relocation. */
14784 if (insn == it_insn && ex9_insn->irel == NULL)
14785 do_replace = 1;
14786 }
14787 }
14788 else
14789 {
14790 /* Instruction without relocation, we only
14791 have to compare their byte code. */
14792 if (insn == it_insn && ex9_insn->irel == NULL)
14793 do_replace = 1;
14794 }
14795
14796 /* Insntruction match so replacing the code here. */
14797 if (do_replace == 1)
14798 {
14799 /* There are two formats of ex9 instruction. */
14800 if (ex9_insn->order < 32)
14801 insn_ex9 = INSN_EX9_IT_2;
14802 else
14803 insn_ex9 = INSN_EX9_IT_1;
14804 insn16 = insn_ex9 | ex9_insn->order;
14805
14806 /* Insert ex9 instruction. */
14807 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14808 &relax_blank_list, pre_irel_ptr,
14809 &irel_list);
14810 pre_off = off;
14811 pre_insn16 = insn16;
14812
14813 if (save_irel)
14814 {
14815 /* For instuction with relocation do relax. */
14816 irel_ptr = (struct elf_nds32_irel_entry *)
14817 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14818 irel_ptr->irel = irel;
14819 irel_ptr->next = NULL;
14820 pre_irel_ptr = irel_ptr;
14821 }
14822 else
14823 pre_irel_ptr = NULL;
14824 break;
14825 }
14826 ex9_insn = ex9_insn->next;
14827 }
14828 off += 4;
14829 }
14830
14831 /* Insert ex9 instruction. */
14832 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14833 &relax_blank_list, pre_irel_ptr,
14834 &irel_list);
14835
14836 /* Delete the redundant code. */
14837 if (relax_blank_list)
14838 {
14839 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14840 relax_blank_list = NULL;
14841 }
14842
14843 /* Clear the relocation that is replaced by ex9. */
14844 while (irel_list)
14845 {
14846 struct elf_nds32_irel_entry *irel_ptr;
14847
14848 irel_ptr = irel_list;
14849 irel_list = irel_ptr->next;
14850 irel_ptr->irel->r_info =
14851 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14852 free (irel_ptr);
14853 }
14854 return TRUE;
14855 }
14856
14857 /* Initialize ex9 hash table. */
14858
14859 int
14860 nds32_elf_ex9_init (void)
14861 {
14862 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14863 sizeof (struct elf_nds32_code_hash_entry),
14864 1023))
14865 {
14866 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
14867 return FALSE;
14868 }
14869 return TRUE;
14870 }
14871
14872 /* Predict how many bytes will be relaxed with ex9 and ifc. */
14873
14874 static void
14875 nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14876 {
14877 struct elf_nds32_insn_times_entry *ex9_insn;
14878 struct elf_nds32_insn_times_entry *temp;
14879 int target_optimize;
14880 struct elf_nds32_link_hash_table *table;
14881
14882 if (ex9_insn_head == NULL)
14883 return;
14884
14885 table = nds32_elf_hash_table (info);
14886 target_optimize = table->target_optimize;
14887 ex9_insn = ex9_insn_head;
14888 while (ex9_insn)
14889 {
14890 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14891 temp = ex9_insn;
14892 ex9_insn = ex9_insn->next;
14893 free (temp);
14894 }
14895 ex9_insn_head = NULL;
14896
14897 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14898 {
14899 /* Examine ifc reduce size. */
14900 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14901 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14902 int size = 0;
14903
14904 while (ifc_ent)
14905 {
14906 if (ifc_ent->enable == 0)
14907 {
14908 /* Not ifc yet. */
14909 irel_ptr = ifc_ent->irel_head;
14910 while (irel_ptr)
14911 {
14912 size += 2;
14913 irel_ptr = irel_ptr->next;
14914 }
14915 }
14916 size -= 2;
14917 ifc_ent = ifc_ent->next;
14918 }
14919 ex9_relax_size += size;
14920 }
14921 }
14922
14923 /* Finish ex9 table. */
14924
14925 void
14926 nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14927 {
14928 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14929 nds32_elf_order_insn_times (link_info);
14930 nds32_elf_ex9_total_relax (link_info);
14931 /* Traverse the hash table and count its times. */
14932 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14933 nds32_elf_order_insn_times (link_info);
14934 nds32_elf_ex9_build_itable (link_info);
14935 }
14936
14937 /* Relocate the entries in ex9 table. */
14938
14939 static bfd_vma
14940 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14941 struct bfd_link_info *link_info)
14942 {
14943 Elf_Internal_Sym *isym = NULL;
14944 bfd_vma relocation = -1;
14945 struct elf_link_hash_entry *h;
14946
14947 if (ptr->m_list != NULL)
14948 {
14949 /* Global symbol. */
14950 h = ptr->m_list->h_list->h;
14951 if ((h->root.type == bfd_link_hash_defined
14952 || h->root.type == bfd_link_hash_defweak)
14953 && h->root.u.def.section != NULL
14954 && h->root.u.def.section->output_section != NULL)
14955 {
14956
14957 relocation = h->root.u.def.value +
14958 h->root.u.def.section->output_section->vma +
14959 h->root.u.def.section->output_offset;
14960 relocation += ptr->m_list->irel->r_addend;
14961 }
14962 else
14963 relocation = 0;
14964 }
14965 else if (ptr->sec !=NULL)
14966 {
14967 /* Local symbol. */
14968 Elf_Internal_Sym sym;
14969 asection *sec = NULL;
14970 asection isec;
14971 asection *isec_ptr = &isec;
14972 Elf_Internal_Rela irel_backup = *(ptr->irel);
14973 asection *sec_backup = ptr->sec;
14974 bfd *abfd = ptr->sec->owner;
14975
14976 if (!nds32_get_local_syms (abfd, sec, &isym))
14977 return FALSE;
14978 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14979
14980 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14981 if (sec != NULL)
14982 *isec_ptr = *sec;
14983 sym = *isym;
14984
14985 /* The purpose is same as elf_link_input_bfd. */
14986 if (isec_ptr != NULL
14987 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14988 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14989 {
14990 sym.st_value =
14991 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14992 elf_section_data (isec_ptr)->sec_info,
14993 isym->st_value);
14994 }
14995 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14996 &ptr->sec, ptr->irel);
14997 if (ptr->irel != NULL)
14998 relocation += ptr->irel->r_addend;
14999
15000 /* Restore origin value since there may be some insntructions that
15001 could not be replaced with ex9.it. */
15002 *(ptr->irel) = irel_backup;
15003 ptr->sec = sec_backup;
15004 }
15005
15006 return relocation;
15007 }
15008
15009 /* Import ex9 table and build list. */
15010
15011 void
15012 nds32_elf_ex9_import_table (struct bfd_link_info *info)
15013 {
15014 int num = 0;
15015 bfd_byte *contents;
15016 unsigned long insn;
15017 FILE *ex9_import_file;
15018 int update_ex9_table;
15019 struct elf_nds32_link_hash_table *table;
15020
15021 table = nds32_elf_hash_table (info);
15022 ex9_import_file = table->ex9_import_file;
15023 rewind (table->ex9_import_file);
15024
15025 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15026
15027 /* Read instructions from the input file and build the list. */
15028 while (!feof (ex9_import_file))
15029 {
15030 char *code;
15031 struct elf_nds32_insn_times_entry *ptr;
15032 size_t nread;
15033
15034 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
15035 /* Ignore the final byte 0x0a. */
15036 if (nread < 1)
15037 break;
15038 insn = bfd_getb32 (contents);
15039 code = bfd_malloc (sizeof (char) * 9);
15040 snprintf (code, 9, "%08lx", insn);
15041 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15042 ptr->string = code;
15043 ptr->order = num;
15044 ptr->times = -1;
15045 ptr->sec = NULL;
15046 ptr->m_list = NULL;
15047 ptr->rel_backup.r_offset = 0;
15048 ptr->rel_backup.r_info = 0;
15049 ptr->rel_backup.r_addend = 0;
15050 ptr->irel = NULL;
15051 ptr->next = NULL;
15052 nds32_elf_ex9_insert_entry (ptr);
15053 num++;
15054 }
15055
15056 update_ex9_table = table->update_ex9_table;
15057 if (update_ex9_table == 1)
15058 {
15059 /* It has to consider of sethi need to use multiple page
15060 but it not be done yet. */
15061 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15062 nds32_elf_order_insn_times (info);
15063 }
15064 }
15065
15066 /* Export ex9 table. */
15067
15068 static void
15069 nds32_elf_ex9_export (struct bfd_link_info *info,
15070 bfd_byte *contents, int size)
15071 {
15072 FILE *ex9_export_file;
15073 struct elf_nds32_link_hash_table *table;
15074
15075 table = nds32_elf_hash_table (info);
15076 ex9_export_file = table->ex9_export_file;
15077 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15078 fclose (ex9_export_file);
15079 }
15080
15081 /* Adjust relocations of J and JAL in ex9.itable.
15082 Export ex9 table. */
15083
15084 static void
15085 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15086 {
15087 asection *table_sec = NULL;
15088 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15089 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15090 bfd *it_abfd;
15091 uint32_t insn, insn_with_reg, source_insn;
15092 bfd_byte *contents = NULL, *source_contents = NULL;
15093 int size = 0;
15094 bfd_vma gp;
15095 int shift, update_ex9_table, offset = 0;
15096 reloc_howto_type *howto = NULL;
15097 Elf_Internal_Rela rel_backup;
15098 unsigned short insn_ex9;
15099 struct elf_nds32_link_hash_table *table;
15100 FILE *ex9_export_file;
15101 static bfd_boolean done = FALSE;
15102
15103 if (done)
15104 return;
15105
15106 done = TRUE;
15107
15108 table = nds32_elf_hash_table (link_info);
15109 if (table)
15110 table->relax_status |= NDS32_RELAX_EX9_DONE;
15111
15112
15113 update_ex9_table = table->update_ex9_table;
15114 /* Generated ex9.itable exactly. */
15115 if (update_ex9_table == 0)
15116 {
15117 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
15118 it_abfd = it_abfd->link.next)
15119 {
15120 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15121 if (table_sec != NULL)
15122 break;
15123 }
15124
15125 if (table_sec != NULL)
15126 {
15127 bfd *output_bfd;
15128
15129 output_bfd = table_sec->output_section->owner;
15130 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15131 if (table_sec->size == 0)
15132 return;
15133
15134 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
15135 return;
15136 }
15137 }
15138 else
15139 {
15140 /* Set gp. */
15141 bfd *output_bfd;
15142
15143 output_bfd = link_info->input_bfds->sections->output_section->owner;
15144 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15145 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15146 }
15147
15148 /* Relocate instruction. */
15149 while (ex9_insn)
15150 {
15151 bfd_vma relocation, min_relocation = 0xffffffff;
15152
15153 insn = strtol (ex9_insn->string, NULL, 16);
15154 insn_with_reg = 0;
15155 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15156 {
15157 if (ex9_insn->m_list)
15158 rel_backup = ex9_insn->m_list->rel_backup;
15159 else
15160 rel_backup = ex9_insn->rel_backup;
15161
15162 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15163 howto =
15164 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15165 (rel_backup.r_info));
15166 shift = howto->rightshift;
15167 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15168 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15169 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15170 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15171 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15172 {
15173 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15174 insn =
15175 insn_with_reg | ((relocation >> shift) &
15176 nds32_elf_irel_mask (&rel_backup));
15177 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15178 }
15179 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15180 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15181 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15182 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15183 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15184 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15185 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15186 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15187 {
15188 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15189 insn =
15190 insn_with_reg | (((relocation - gp) >> shift) &
15191 nds32_elf_irel_mask (&rel_backup));
15192 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15193 }
15194 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15195 {
15196 /* Sethi may be multiple entry for one insn. */
15197 if (ex9_insn->next && ex9_insn->m_list
15198 && ex9_insn->m_list == ex9_insn->next->m_list)
15199 {
15200 struct elf_link_hash_entry_mul_list *m_list;
15201 struct elf_nds32_ex9_refix *fix_ptr;
15202 struct elf_link_hash_entry *h;
15203
15204 temp_ptr = ex9_insn;
15205 temp_ptr2 = ex9_insn;
15206 m_list = ex9_insn->m_list;
15207 while (m_list)
15208 {
15209 h = m_list->h_list->h;
15210 relocation = h->root.u.def.value +
15211 h->root.u.def.section->output_section->vma +
15212 h->root.u.def.section->output_offset;
15213 relocation += m_list->irel->r_addend;
15214
15215 if (relocation < min_relocation)
15216 min_relocation = relocation;
15217 m_list = m_list->next;
15218 }
15219 relocation = min_relocation;
15220
15221 /* Put insntruction into ex9 table. */
15222 insn = insn_with_reg
15223 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15224 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15225 relocation = relocation + 0x1000; /* hi20 */
15226
15227 while (ex9_insn->next && ex9_insn->m_list
15228 && ex9_insn->m_list == ex9_insn->next->m_list)
15229 {
15230 /* Multiple sethi. */
15231 ex9_insn = ex9_insn->next;
15232 size += 4;
15233 insn =
15234 insn_with_reg | ((relocation >> shift) &
15235 nds32_elf_irel_mask (&rel_backup));
15236 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15237 relocation = relocation + 0x1000; /* hi20 */
15238 }
15239
15240 fix_ptr = ex9_refix_head;
15241 while (fix_ptr)
15242 {
15243 /* Fix ex9 insn. */
15244 /* temp_ptr2 points to the head of multiple sethi. */
15245 temp_ptr = temp_ptr2;
15246 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15247 {
15248 fix_ptr = fix_ptr->next;
15249 }
15250 if (fix_ptr->order != temp_ptr->order)
15251 break;
15252
15253 /* Set source insn. */
15254 relocation =
15255 fix_ptr->h->root.u.def.value +
15256 fix_ptr->h->root.u.def.section->output_section->vma +
15257 fix_ptr->h->root.u.def.section->output_offset;
15258 relocation += fix_ptr->irel->r_addend;
15259 /* sethi imm is imm20s. */
15260 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15261
15262 while (temp_ptr)
15263 {
15264 /* Match entry and source code. */
15265 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15266 if (insn == source_insn)
15267 {
15268 /* Fix the ex9 insn. */
15269 if (temp_ptr->order != fix_ptr->order)
15270 {
15271 if (!nds32_get_section_contents
15272 (fix_ptr->sec->owner, fix_ptr->sec,
15273 &source_contents, TRUE))
15274 _bfd_error_handler
15275 (_("Linker: error cannot fixed ex9 relocation \n"));
15276 if (temp_ptr->order < 32)
15277 insn_ex9 = INSN_EX9_IT_2;
15278 else
15279 insn_ex9 = INSN_EX9_IT_1;
15280 insn_ex9 = insn_ex9 | temp_ptr->order;
15281 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15282 }
15283 break;
15284 }
15285 else
15286 {
15287 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15288 _bfd_error_handler
15289 (_("Linker: error cannot fixed ex9 relocation \n"));
15290 else
15291 temp_ptr = temp_ptr->next;
15292 }
15293 }
15294 fix_ptr = fix_ptr->next;
15295 }
15296 }
15297 else
15298 {
15299 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15300 insn = insn_with_reg
15301 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15302 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15303 }
15304 }
15305 }
15306 else
15307 {
15308 /* Insn without relocation does not have to be fixed
15309 if need to update export table. */
15310 if (update_ex9_table == 1)
15311 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15312 }
15313 ex9_insn = ex9_insn->next;
15314 size += 4;
15315 }
15316
15317 ex9_export_file = table->ex9_export_file;
15318 if (ex9_export_file != NULL)
15319 nds32_elf_ex9_export (link_info, contents, table_sec->size);
15320 else if (update_ex9_table == 1)
15321 {
15322 table->ex9_export_file = table->ex9_import_file;
15323 rewind (table->ex9_export_file);
15324 nds32_elf_ex9_export (link_info, contents, size);
15325 }
15326 }
15327
15328 /* Generate ex9 hash table. */
15329
15330 static bfd_boolean
15331 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
15332 struct bfd_link_info *link_info)
15333 {
15334 Elf_Internal_Rela *internal_relocs;
15335 Elf_Internal_Rela *irelend;
15336 Elf_Internal_Rela *irel;
15337 Elf_Internal_Rela *jrel;
15338 Elf_Internal_Rela rel_backup;
15339 Elf_Internal_Shdr *symtab_hdr;
15340 Elf_Internal_Sym *isym = NULL;
15341 asection *isec;
15342 struct elf_link_hash_entry **sym_hashes;
15343 bfd_byte *contents = NULL;
15344 bfd_vma off = 0;
15345 unsigned long r_symndx;
15346 uint32_t insn, insn_with_reg;
15347 struct elf_link_hash_entry *h;
15348 int data_flag, shift, align;
15349 bfd_vma relocation;
15350 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15351 reloc_howto_type *howto = NULL;
15352
15353 sym_hashes = elf_sym_hashes (abfd);
15354 /* Load section instructions, relocations, and symbol table. */
15355 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
15356 return FALSE;
15357
15358 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15359 TRUE /* keep_memory */);
15360 irelend = internal_relocs + sec->reloc_count;
15361 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15362 if (!nds32_get_local_syms (abfd, sec, &isym))
15363 return FALSE;
15364
15365 /* Check the object if enable ex9. */
15366 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15367 R_NDS32_RELAX_ENTRY);
15368
15369 /* Check this section trigger ex9 relaxation. */
15370 if (irel == NULL
15371 || irel >= irelend
15372 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15373 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15374 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15375 return TRUE;
15376
15377 irel = internal_relocs;
15378
15379 /* Push each insn into hash table. */
15380 while (off < sec->size)
15381 {
15382 char code[10];
15383 struct elf_nds32_code_hash_entry *entry;
15384
15385 while (irel != NULL && irel < irelend && irel->r_offset < off)
15386 irel++;
15387
15388 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15389 NULL, sec, &off, contents);
15390 if (data_flag & DATA_EXIST)
15391 {
15392 /* We save the move offset in the highest byte. */
15393 off += (data_flag >> 24);
15394 continue;
15395 }
15396
15397 if (*(contents + off) & 0x80)
15398 {
15399 off += 2;
15400 }
15401 else
15402 {
15403 h = NULL;
15404 isec = NULL;
15405 jrel = NULL;
15406 rel_backup.r_info = 0;
15407 rel_backup.r_offset = 0;
15408 rel_backup.r_addend = 0;
15409 /* Load the instruction and its opcode with register for comparing. */
15410 insn = bfd_getb32 (contents + off);
15411 insn_with_reg = 0;
15412 if (irel != NULL && irel < irelend && irel->r_offset == off)
15413 {
15414 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15415 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15416 shift = howto->rightshift;
15417 align = (1 << shift) - 1;
15418 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15419 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15420 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15421 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15422 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15423 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15424 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15425 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15426 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15427 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15428 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15429 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15430 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15431 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15432 {
15433 r_symndx = ELF32_R_SYM (irel->r_info);
15434 jrel = irel;
15435 rel_backup = *irel;
15436 if (r_symndx < symtab_hdr->sh_info)
15437 {
15438 /* Local symbol. */
15439 int shndx = isym[r_symndx].st_shndx;
15440
15441 bfd_vma st_value = (isym + r_symndx)->st_value;
15442 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15443 relocation = (isec->output_section->vma + isec->output_offset
15444 + st_value + irel->r_addend);
15445 }
15446 else
15447 {
15448 /* External symbol. */
15449 bfd_boolean warned ATTRIBUTE_UNUSED;
15450 bfd_boolean ignored ATTRIBUTE_UNUSED;
15451 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15452 asection *sym_sec;
15453
15454 /* Maybe there is a better way to get h and relocation */
15455 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15456 r_symndx, symtab_hdr, sym_hashes,
15457 h, sym_sec, relocation,
15458 unresolved_reloc, warned, ignored);
15459 relocation += irel->r_addend;
15460 if ((h->root.type != bfd_link_hash_defined
15461 && h->root.type != bfd_link_hash_defweak)
15462 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
15463 {
15464 off += 4;
15465 continue;
15466 }
15467 }
15468
15469 /* Check for gp relative instruction alignment. */
15470 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15471 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15472 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15473 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15474 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15475 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15476 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15477 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15478 {
15479 bfd_vma gp;
15480 bfd *output_bfd = sec->output_section->owner;
15481 bfd_reloc_status_type r;
15482
15483 /* If the symbol is in the abs section, the out_bfd will be null.
15484 This happens when the relocation has a symbol@GOTOFF. */
15485 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15486 if (r != bfd_reloc_ok)
15487 {
15488 off += 4;
15489 continue;
15490 }
15491
15492 relocation -= gp;
15493
15494 /* Make sure alignment is correct. */
15495 if (relocation & align)
15496 {
15497 /* Incorrect alignment. */
15498 _bfd_error_handler
15499 (_("%s: warning: unaligned small data access. "
15500 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15501 bfd_get_filename (abfd), irel->r_offset,
15502 irel->r_info, irel->r_addend, relocation, align);
15503 off += 4;
15504 continue;
15505 }
15506 }
15507
15508 insn = insn_with_reg
15509 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15510 }
15511 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
15512 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15513 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
15514 {
15515 /* These relocations do not have to relocate contens, so it can
15516 be regard as instruction without relocation. */
15517 }
15518 else
15519 {
15520 off += 4;
15521 continue;
15522 }
15523 }
15524
15525 snprintf (code, sizeof (code), "%08x", insn);
15526 /* Copy "code". */
15527 entry = (struct elf_nds32_code_hash_entry*)
15528 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15529 if (entry == NULL)
15530 {
15531 _bfd_error_handler
15532 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15533 return FALSE;
15534 }
15535 if (h)
15536 {
15537 if (h->root.type == bfd_link_hash_undefined)
15538 return TRUE;
15539 /* Global symbol. */
15540 /* In order to do sethi with different symbol but same value. */
15541 if (entry->m_list == NULL)
15542 {
15543 struct elf_link_hash_entry_mul_list *m_list_new;
15544 struct elf_link_hash_entry_list *h_list_new;
15545
15546 m_list_new = (struct elf_link_hash_entry_mul_list *)
15547 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15548 h_list_new = (struct elf_link_hash_entry_list *)
15549 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15550 entry->m_list = m_list_new;
15551 m_list_new->h_list = h_list_new;
15552 m_list_new->rel_backup = rel_backup;
15553 m_list_new->times = 1;
15554 m_list_new->irel = jrel;
15555 m_list_new->next = NULL;
15556 h_list_new->h = h;
15557 h_list_new->next = NULL;
15558 }
15559 else
15560 {
15561 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15562 struct elf_link_hash_entry_list *h_list;
15563
15564 while (m_list)
15565 {
15566 /* Build the different symbols that point to the same address. */
15567 h_list = m_list->h_list;
15568 if (h_list->h->root.u.def.value == h->root.u.def.value
15569 && h_list->h->root.u.def.section->output_section->vma
15570 == h->root.u.def.section->output_section->vma
15571 && h_list->h->root.u.def.section->output_offset
15572 == h->root.u.def.section->output_offset
15573 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15574 {
15575 m_list->times++;
15576 m_list->irel = jrel;
15577 while (h_list->h != h && h_list->next)
15578 h_list = h_list->next;
15579 if (h_list->h != h)
15580 {
15581 struct elf_link_hash_entry_list *h_list_new;
15582
15583 h_list_new = (struct elf_link_hash_entry_list *)
15584 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15585 h_list->next = h_list_new;
15586 h_list_new->h = h;
15587 h_list_new->next = NULL;
15588 }
15589 break;
15590 }
15591 /* The sethi case may have different address but the
15592 hi20 is the same. */
15593 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15594 && m_list->next == NULL)
15595 {
15596 struct elf_link_hash_entry_mul_list *m_list_new;
15597 struct elf_link_hash_entry_list *h_list_new;
15598
15599 m_list_new = (struct elf_link_hash_entry_mul_list *)
15600 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15601 h_list_new = (struct elf_link_hash_entry_list *)
15602 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15603 m_list->next = m_list_new;
15604 m_list_new->h_list = h_list_new;
15605 m_list_new->rel_backup = rel_backup;
15606 m_list_new->times = 1;
15607 m_list_new->irel = jrel;
15608 m_list_new->next = NULL;
15609 h_list_new->h = h;
15610 h_list_new->next = NULL;
15611 break;
15612 }
15613 m_list = m_list->next;
15614 }
15615 if (!m_list)
15616 {
15617 off += 4;
15618 continue;
15619 }
15620 }
15621 }
15622 else
15623 {
15624 /* Local symbol and insn without relocation*/
15625 entry->times++;
15626 entry->rel_backup = rel_backup;
15627 }
15628
15629 /* Use in sethi insn with constant and global symbol in same format. */
15630 if (!jrel)
15631 entry->const_insn = 1;
15632 else
15633 entry->irel = jrel;
15634 entry->sec = isec;
15635 off += 4;
15636 }
15637 }
15638 return TRUE;
15639 }
15640
15641 /* Set the _ITB_BASE, and point it to ex9 table. */
15642
15643 bfd_boolean
15644 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15645 {
15646 bfd *abfd;
15647 asection *sec;
15648 bfd *output_bfd = NULL;
15649 struct bfd_link_hash_entry *bh = NULL;
15650
15651 if (is_ITB_BASE_set == 1)
15652 return TRUE;
15653
15654 is_ITB_BASE_set = 1;
15655
15656 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15657
15658 if (bh && (bh->type == bfd_link_hash_defined
15659 || bh->type == bfd_link_hash_defweak))
15660 return TRUE;
15661
15662 for (abfd = link_info->input_bfds; abfd != NULL;
15663 abfd = abfd->link.next)
15664 {
15665 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15666 if (sec != NULL)
15667 {
15668 output_bfd = sec->output_section->owner;
15669 break;
15670 }
15671 }
15672 if (output_bfd == NULL)
15673 {
15674 output_bfd = link_info->output_bfd;
15675 if (output_bfd->sections == NULL)
15676 return TRUE;
15677 else
15678 sec = bfd_abs_section_ptr;
15679 }
15680 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15681 FALSE, FALSE, TRUE);
15682 return (_bfd_generic_link_add_one_symbol
15683 (link_info, output_bfd, "_ITB_BASE_",
15684 BSF_GLOBAL | BSF_WEAK, sec, 0,
15685 (const char *) NULL, FALSE, get_elf_backend_data
15686 (output_bfd)->collect, &bh));
15687 } /* End EX9.IT */
15688 \f
15689
15690 #define ELF_ARCH bfd_arch_nds32
15691 #define ELF_MACHINE_CODE EM_NDS32
15692 #define ELF_MAXPAGESIZE 0x1000
15693 #define ELF_TARGET_ID NDS32_ELF_DATA
15694
15695 #define TARGET_BIG_SYM nds32_elf32_be_vec
15696 #define TARGET_BIG_NAME "elf32-nds32be"
15697 #define TARGET_LITTLE_SYM nds32_elf32_le_vec
15698 #define TARGET_LITTLE_NAME "elf32-nds32le"
15699
15700 #define elf_info_to_howto nds32_info_to_howto
15701 #define elf_info_to_howto_rel nds32_info_to_howto_rel
15702
15703 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15704 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15705 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15706 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15707 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15708
15709 #define bfd_elf32_mkobject nds32_elf_mkobject
15710 #define elf_backend_action_discarded nds32_elf_action_discarded
15711 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15712 #define elf_backend_check_relocs nds32_elf_check_relocs
15713 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15714 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15715 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15716 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15717 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15718 #define elf_backend_relocate_section nds32_elf_relocate_section
15719 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15720 #define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15721 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15722 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15723 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15724 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15725 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15726 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15727 #define elf_backend_object_p nds32_elf_object_p
15728 #define elf_backend_final_write_processing nds32_elf_final_write_processing
15729 #define elf_backend_special_sections nds32_elf_special_sections
15730 #define bfd_elf32_bfd_get_relocated_section_contents \
15731 nds32_elf_get_relocated_section_contents
15732
15733 #define elf_backend_can_gc_sections 1
15734 #define elf_backend_can_refcount 1
15735 #define elf_backend_want_got_plt 1
15736 #define elf_backend_plt_readonly 1
15737 #define elf_backend_want_plt_sym 0
15738 #define elf_backend_got_header_size 12
15739 #define elf_backend_may_use_rel_p 1
15740 #define elf_backend_default_use_rela_p 1
15741 #define elf_backend_may_use_rela_p 1
15742
15743 #include "elf32-target.h"
15744
15745 #undef ELF_MAXPAGESIZE
15746 #define ELF_MAXPAGESIZE 0x2000
15747
15748 #undef TARGET_BIG_SYM
15749 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec
15750 #undef TARGET_BIG_NAME
15751 #define TARGET_BIG_NAME "elf32-nds32be-linux"
15752 #undef TARGET_LITTLE_SYM
15753 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
15754 #undef TARGET_LITTLE_NAME
15755 #define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15756 #undef elf32_bed
15757 #define elf32_bed elf32_nds32_lin_bed
15758
15759 #include "elf32-target.h"
GDB Binutils - Deliverables
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