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[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "bfdlink.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "libiberty.h"
30 #include "bfd_stdint.h"
31 #include "elf/nds32.h"
32 #include "opcode/nds32.h"
33 #include "elf32-nds32.h"
34 #include "opcode/cgen.h"
35 #include "../opcodes/nds32-opc.h"
36
37 /* Relocation HOWTO functions. */
38 static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42 static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45 static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48 static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51 static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55 /* Helper functions for HOWTO. */
56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59
60 /* Nds32 helper functions. */
61 static bfd_vma calculate_memory_address
62 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
63 static int nds32_get_section_contents (bfd *, asection *,
64 bfd_byte **, bfd_boolean);
65 static bfd_boolean nds32_elf_ex9_build_hash_table
66 (bfd *, asection *, struct bfd_link_info *);
67 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
68 static void nds32_elf_ex9_import_table (struct bfd_link_info *);
69 static void nds32_elf_ex9_finish (struct bfd_link_info *);
70 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
71 static void nds32_elf_get_insn_with_reg
72 (Elf_Internal_Rela *, uint32_t, uint32_t *);
73 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
74 Elf_Internal_Sym **);
75 static bfd_boolean nds32_elf_ex9_replace_instruction
76 (struct bfd_link_info *, bfd *, asection *);
77 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
78 asection *);
79 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
80 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
81 static bfd_boolean nds32_elf_ifc_reloc (void);
82 static bfd_boolean nds32_relax_fp_as_gp
83 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
84 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
85 Elf_Internal_Sym *isymbuf);
86 static bfd_boolean nds32_fag_remove_unused_fpbase
87 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
88 Elf_Internal_Rela *irelend);
89
90 enum
91 {
92 MACH_V1 = bfd_mach_n1h,
93 MACH_V2 = bfd_mach_n1h_v2,
94 MACH_V3 = bfd_mach_n1h_v3,
95 MACH_V3M = bfd_mach_n1h_v3m
96 };
97
98 #define MIN(a, b) ((a) > (b) ? (b) : (a))
99 #define MAX(a, b) ((a) > (b) ? (a) : (b))
100
101 /* The name of the dynamic interpreter. This is put in the .interp
102 section. */
103 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
104
105 /* The nop opcode we use. */
106 #define NDS32_NOP32 0x40000009
107 #define NDS32_NOP16 0x9200
108
109 /* The size in bytes of an entry in the procedure linkage table. */
110 #define PLT_ENTRY_SIZE 24
111 #define PLT_HEADER_SIZE 24
112
113 /* The first entry in a procedure linkage table are reserved,
114 and the initial contents are unimportant (we zero them out).
115 Subsequent entries look like this. */
116 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
117 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
118 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
119 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
120 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
121
122 /* $ta is change to $r15 (from $r25). */
123 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
124 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
125 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
126 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
127 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
128 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
129
130 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
131 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
132 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
133 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
134 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
135
136 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
137 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
138 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
139 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
140 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
141 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
142
143 /* These are macros used to get the relocation accurate value. */
144 #define ACCURATE_8BIT_S1 (0x100)
145 #define ACCURATE_U9BIT_S1 (0x400)
146 #define ACCURATE_12BIT_S1 (0x2000)
147 #define ACCURATE_14BIT_S1 (0x4000)
148 #define ACCURATE_19BIT (0x40000)
149
150 /* These are macros used to get the relocation conservative value. */
151 #define CONSERVATIVE_8BIT_S1 (0x100 - 4)
152 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
153 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
154 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
155 /* These must be more conservative because the address may be in
156 different segment. */
157 #define CONSERVATIVE_15BIT (0x4000 - 0x1000)
158 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
159 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
160 #define CONSERVATIVE_19BIT (0x40000 - 0x1000)
161 #define CONSERVATIVE_20BIT (0x80000 - 0x1000)
162
163 /* Size of small data/bss sections, used to calculate SDA_BASE. */
164 static long got_size = 0;
165 static int is_SDA_BASE_set = 0;
166 static int is_ITB_BASE_set = 0;
167
168 /* Convert ELF-VER in eflags to string for debugging purpose. */
169 static const char *const nds32_elfver_strtab[] =
170 {
171 "ELF-1.2",
172 "ELF-1.3",
173 "ELF-1.4",
174 };
175
176 /* The nds32 linker needs to keep track of the number of relocs that it
177 decides to copy in check_relocs for each symbol. This is so that
178 it can discard PC relative relocs if it doesn't need them when
179 linking with -Bsymbolic. We store the information in a field
180 extending the regular ELF linker hash table. */
181
182 /* This structure keeps track of the number of PC relative relocs we
183 have copied for a given symbol. */
184
185 struct elf_nds32_pcrel_relocs_copied
186 {
187 /* Next section. */
188 struct elf_nds32_pcrel_relocs_copied *next;
189 /* A section in dynobj. */
190 asection *section;
191 /* Number of relocs copied in this section. */
192 bfd_size_type count;
193 };
194
195 /* Nds32 ELF linker hash entry. */
196
197 struct elf_nds32_link_hash_entry
198 {
199 struct elf_link_hash_entry root;
200
201 /* Track dynamic relocs copied for this symbol. */
202 struct elf_dyn_relocs *dyn_relocs;
203
204 /* For checking relocation type. */
205 #define GOT_UNKNOWN 0
206 #define GOT_NORMAL 1
207 #define GOT_TLS_IE 2
208 unsigned int tls_type;
209 };
210
211 /* Get the nds32 ELF linker hash table from a link_info structure. */
212
213 #define FP_BASE_NAME "_FP_BASE_"
214 static int check_start_export_sym = 0;
215 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
216
217 /* The offset for executable tls relaxation. */
218 #define TP_OFFSET 0x0
219
220 struct elf_nds32_obj_tdata
221 {
222 struct elf_obj_tdata root;
223
224 /* tls_type for each local got entry. */
225 char *local_got_tls_type;
226 };
227
228 #define elf_nds32_tdata(bfd) \
229 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
230
231 #define elf32_nds32_local_got_tls_type(bfd) \
232 (elf_nds32_tdata (bfd)->local_got_tls_type)
233
234 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
235
236 static bfd_boolean
237 nds32_elf_mkobject (bfd *abfd)
238 {
239 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
240 NDS32_ELF_DATA);
241 }
242
243 /* Relocations used for relocation. */
244 static reloc_howto_type nds32_elf_howto_table[] =
245 {
246 /* This reloc does nothing. */
247 HOWTO (R_NDS32_NONE, /* type */
248 0, /* rightshift */
249 3, /* size (0 = byte, 1 = short, 2 = long) */
250 0, /* bitsize */
251 FALSE, /* pc_relative */
252 0, /* bitpos */
253 complain_overflow_dont, /* complain_on_overflow */
254 bfd_elf_generic_reloc, /* special_function */
255 "R_NDS32_NONE", /* name */
256 FALSE, /* partial_inplace */
257 0, /* src_mask */
258 0, /* dst_mask */
259 FALSE), /* pcrel_offset */
260
261 /* A 16 bit absolute relocation. */
262 HOWTO (R_NDS32_16, /* type */
263 0, /* rightshift */
264 1, /* size (0 = byte, 1 = short, 2 = long) */
265 16, /* bitsize */
266 FALSE, /* pc_relative */
267 0, /* bitpos */
268 complain_overflow_bitfield, /* complain_on_overflow */
269 nds32_elf_generic_reloc, /* special_function */
270 "R_NDS32_16", /* name */
271 FALSE, /* partial_inplace */
272 0xffff, /* src_mask */
273 0xffff, /* dst_mask */
274 FALSE), /* pcrel_offset */
275
276 /* A 32 bit absolute relocation. */
277 HOWTO (R_NDS32_32, /* type */
278 0, /* rightshift */
279 2, /* size (0 = byte, 1 = short, 2 = long) */
280 32, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_bitfield, /* complain_on_overflow */
284 nds32_elf_generic_reloc, /* special_function */
285 "R_NDS32_32", /* name */
286 FALSE, /* partial_inplace */
287 0xffffffff, /* src_mask */
288 0xffffffff, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* A 20 bit address. */
292 HOWTO (R_NDS32_20, /* type */
293 0, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 20, /* bitsize */
296 FALSE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_unsigned, /* complain_on_overflow */
299 nds32_elf_generic_reloc, /* special_function */
300 "R_NDS32_20", /* name */
301 FALSE, /* partial_inplace */
302 0xfffff, /* src_mask */
303 0xfffff, /* dst_mask */
304 FALSE), /* pcrel_offset */
305
306 /* An PC Relative 9-bit relocation, shifted by 2.
307 This reloc is complicated because relocations are relative to pc & -4.
308 i.e. branches in the right insn slot use the address of the left insn
309 slot for pc. */
310 /* ??? It's not clear whether this should have partial_inplace set or not.
311 Branch relaxing in the assembler can store the addend in the insn,
312 and if bfd_install_relocation gets called the addend may get added
313 again. */
314 HOWTO (R_NDS32_9_PCREL, /* type */
315 1, /* rightshift */
316 1, /* size (0 = byte, 1 = short, 2 = long) */
317 8, /* bitsize */
318 TRUE, /* pc_relative */
319 0, /* bitpos */
320 complain_overflow_signed, /* complain_on_overflow */
321 nds32_elf_9_pcrel_reloc, /* special_function */
322 "R_NDS32_9_PCREL", /* name */
323 FALSE, /* partial_inplace */
324 0xff, /* src_mask */
325 0xff, /* dst_mask */
326 TRUE), /* pcrel_offset */
327
328 /* A relative 15 bit relocation, right shifted by 1. */
329 HOWTO (R_NDS32_15_PCREL, /* type */
330 1, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 14, /* bitsize */
333 TRUE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_signed, /* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_NDS32_15_PCREL", /* name */
338 FALSE, /* partial_inplace */
339 0x3fff, /* src_mask */
340 0x3fff, /* dst_mask */
341 TRUE), /* pcrel_offset */
342
343 /* A relative 17 bit relocation, right shifted by 1. */
344 HOWTO (R_NDS32_17_PCREL, /* type */
345 1, /* rightshift */
346 2, /* size (0 = byte, 1 = short, 2 = long) */
347 16, /* bitsize */
348 TRUE, /* pc_relative */
349 0, /* bitpos */
350 complain_overflow_signed, /* complain_on_overflow */
351 bfd_elf_generic_reloc, /* special_function */
352 "R_NDS32_17_PCREL", /* name */
353 FALSE, /* partial_inplace */
354 0xffff, /* src_mask */
355 0xffff, /* dst_mask */
356 TRUE), /* pcrel_offset */
357
358 /* A relative 25 bit relocation, right shifted by 1. */
359 /* ??? It's not clear whether this should have partial_inplace set or not.
360 Branch relaxing in the assembler can store the addend in the insn,
361 and if bfd_install_relocation gets called the addend may get added
362 again. */
363 HOWTO (R_NDS32_25_PCREL, /* type */
364 1, /* rightshift */
365 2, /* size (0 = byte, 1 = short, 2 = long) */
366 24, /* bitsize */
367 TRUE, /* pc_relative */
368 0, /* bitpos */
369 complain_overflow_signed, /* complain_on_overflow */
370 bfd_elf_generic_reloc, /* special_function */
371 "R_NDS32_25_PCREL", /* name */
372 FALSE, /* partial_inplace */
373 0xffffff, /* src_mask */
374 0xffffff, /* dst_mask */
375 TRUE), /* pcrel_offset */
376
377 /* High 20 bits of address when lower 12 is or'd in. */
378 HOWTO (R_NDS32_HI20, /* type */
379 12, /* rightshift */
380 2, /* size (0 = byte, 1 = short, 2 = long) */
381 20, /* bitsize */
382 FALSE, /* pc_relative */
383 0, /* bitpos */
384 complain_overflow_dont,/* complain_on_overflow */
385 nds32_elf_hi20_reloc, /* special_function */
386 "R_NDS32_HI20", /* name */
387 FALSE, /* partial_inplace */
388 0x000fffff, /* src_mask */
389 0x000fffff, /* dst_mask */
390 FALSE), /* pcrel_offset */
391
392 /* Lower 12 bits of address. */
393 HOWTO (R_NDS32_LO12S3, /* type */
394 3, /* rightshift */
395 2, /* size (0 = byte, 1 = short, 2 = long) */
396 9, /* bitsize */
397 FALSE, /* pc_relative */
398 0, /* bitpos */
399 complain_overflow_dont,/* complain_on_overflow */
400 nds32_elf_lo12_reloc, /* special_function */
401 "R_NDS32_LO12S3", /* name */
402 FALSE, /* partial_inplace */
403 0x000001ff, /* src_mask */
404 0x000001ff, /* dst_mask */
405 FALSE), /* pcrel_offset */
406
407 /* Lower 12 bits of address. */
408 HOWTO (R_NDS32_LO12S2, /* type */
409 2, /* rightshift */
410 2, /* size (0 = byte, 1 = short, 2 = long) */
411 10, /* bitsize */
412 FALSE, /* pc_relative */
413 0, /* bitpos */
414 complain_overflow_dont,/* complain_on_overflow */
415 nds32_elf_lo12_reloc, /* special_function */
416 "R_NDS32_LO12S2", /* name */
417 FALSE, /* partial_inplace */
418 0x000003ff, /* src_mask */
419 0x000003ff, /* dst_mask */
420 FALSE), /* pcrel_offset */
421
422 /* Lower 12 bits of address. */
423 HOWTO (R_NDS32_LO12S1, /* type */
424 1, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 11, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_dont,/* complain_on_overflow */
430 nds32_elf_lo12_reloc, /* special_function */
431 "R_NDS32_LO12S1", /* name */
432 FALSE, /* partial_inplace */
433 0x000007ff, /* src_mask */
434 0x000007ff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 /* Lower 12 bits of address. */
438 HOWTO (R_NDS32_LO12S0, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 12, /* bitsize */
442 FALSE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_dont,/* complain_on_overflow */
445 nds32_elf_lo12_reloc, /* special_function */
446 "R_NDS32_LO12S0", /* name */
447 FALSE, /* partial_inplace */
448 0x00000fff, /* src_mask */
449 0x00000fff, /* dst_mask */
450 FALSE), /* pcrel_offset */
451
452 /* Small data area 15 bits offset. */
453 HOWTO (R_NDS32_SDA15S3, /* type */
454 3, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 15, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_signed, /* complain_on_overflow */
460 nds32_elf_sda15_reloc, /* special_function */
461 "R_NDS32_SDA15S3", /* name */
462 FALSE, /* partial_inplace */
463 0x00007fff, /* src_mask */
464 0x00007fff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Small data area 15 bits offset. */
468 HOWTO (R_NDS32_SDA15S2, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 15, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_signed, /* complain_on_overflow */
475 nds32_elf_sda15_reloc, /* special_function */
476 "R_NDS32_SDA15S2", /* name */
477 FALSE, /* partial_inplace */
478 0x00007fff, /* src_mask */
479 0x00007fff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Small data area 15 bits offset. */
483 HOWTO (R_NDS32_SDA15S1, /* type */
484 1, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 15, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_signed, /* complain_on_overflow */
490 nds32_elf_sda15_reloc, /* special_function */
491 "R_NDS32_SDA15S1", /* name */
492 FALSE, /* partial_inplace */
493 0x00007fff, /* src_mask */
494 0x00007fff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Small data area 15 bits offset. */
498 HOWTO (R_NDS32_SDA15S0, /* type */
499 0, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 15, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed, /* complain_on_overflow */
505 nds32_elf_sda15_reloc, /* special_function */
506 "R_NDS32_SDA15S0", /* name */
507 FALSE, /* partial_inplace */
508 0x00007fff, /* src_mask */
509 0x00007fff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* GNU extension to record C++ vtable hierarchy */
513 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 0, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 NULL, /* special_function */
521 "R_NDS32_GNU_VTINHERIT", /* name */
522 FALSE, /* partial_inplace */
523 0, /* src_mask */
524 0, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* GNU extension to record C++ vtable member usage */
528 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
529 0, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 0, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_dont,/* complain_on_overflow */
535 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
536 "R_NDS32_GNU_VTENTRY", /* name */
537 FALSE, /* partial_inplace */
538 0, /* src_mask */
539 0, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* A 16 bit absolute relocation. */
543 HOWTO (R_NDS32_16_RELA, /* type */
544 0, /* rightshift */
545 1, /* size (0 = byte, 1 = short, 2 = long) */
546 16, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_bitfield, /* complain_on_overflow */
550 bfd_elf_generic_reloc, /* special_function */
551 "R_NDS32_16_RELA", /* name */
552 FALSE, /* partial_inplace */
553 0xffff, /* src_mask */
554 0xffff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* A 32 bit absolute relocation. */
558 HOWTO (R_NDS32_32_RELA, /* type */
559 0, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 32, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_bitfield, /* complain_on_overflow */
565 bfd_elf_generic_reloc, /* special_function */
566 "R_NDS32_32_RELA", /* name */
567 FALSE, /* partial_inplace */
568 0xffffffff, /* src_mask */
569 0xffffffff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* A 20 bit address. */
573 HOWTO (R_NDS32_20_RELA, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 20, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 bfd_elf_generic_reloc, /* special_function */
581 "R_NDS32_20_RELA", /* name */
582 FALSE, /* partial_inplace */
583 0xfffff, /* src_mask */
584 0xfffff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
588 1, /* rightshift */
589 1, /* size (0 = byte, 1 = short, 2 = long) */
590 8, /* bitsize */
591 TRUE, /* pc_relative */
592 0, /* bitpos */
593 complain_overflow_signed, /* complain_on_overflow */
594 bfd_elf_generic_reloc, /* special_function */
595 "R_NDS32_9_PCREL_RELA",/* name */
596 FALSE, /* partial_inplace */
597 0xff, /* src_mask */
598 0xff, /* dst_mask */
599 TRUE), /* pcrel_offset */
600
601 /* A relative 15 bit relocation, right shifted by 1. */
602 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
603 1, /* rightshift */
604 2, /* size (0 = byte, 1 = short, 2 = long) */
605 14, /* bitsize */
606 TRUE, /* pc_relative */
607 0, /* bitpos */
608 complain_overflow_signed, /* complain_on_overflow */
609 bfd_elf_generic_reloc, /* special_function */
610 "R_NDS32_15_PCREL_RELA", /* name */
611 FALSE, /* partial_inplace */
612 0x3fff, /* src_mask */
613 0x3fff, /* dst_mask */
614 TRUE), /* pcrel_offset */
615
616 /* A relative 17 bit relocation, right shifted by 1. */
617 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
618 1, /* rightshift */
619 2, /* size (0 = byte, 1 = short, 2 = long) */
620 16, /* bitsize */
621 TRUE, /* pc_relative */
622 0, /* bitpos */
623 complain_overflow_signed, /* complain_on_overflow */
624 bfd_elf_generic_reloc, /* special_function */
625 "R_NDS32_17_PCREL_RELA", /* name */
626 FALSE, /* partial_inplace */
627 0xffff, /* src_mask */
628 0xffff, /* dst_mask */
629 TRUE), /* pcrel_offset */
630
631 /* A relative 25 bit relocation, right shifted by 2. */
632 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
633 1, /* rightshift */
634 2, /* size (0 = byte, 1 = short, 2 = long) */
635 24, /* bitsize */
636 TRUE, /* pc_relative */
637 0, /* bitpos */
638 complain_overflow_signed, /* complain_on_overflow */
639 bfd_elf_generic_reloc, /* special_function */
640 "R_NDS32_25_PCREL_RELA", /* name */
641 FALSE, /* partial_inplace */
642 0xffffff, /* src_mask */
643 0xffffff, /* dst_mask */
644 TRUE), /* pcrel_offset */
645
646 /* High 20 bits of address when lower 16 is or'd in. */
647 HOWTO (R_NDS32_HI20_RELA, /* type */
648 12, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 20, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_NDS32_HI20_RELA", /* name */
656 FALSE, /* partial_inplace */
657 0x000fffff, /* src_mask */
658 0x000fffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 /* Lower 12 bits of address. */
662 HOWTO (R_NDS32_LO12S3_RELA, /* type */
663 3, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 9, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_dont,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_LO12S3_RELA", /* name */
671 FALSE, /* partial_inplace */
672 0x000001ff, /* src_mask */
673 0x000001ff, /* dst_mask */
674 FALSE), /* pcrel_offset */
675
676 /* Lower 12 bits of address. */
677 HOWTO (R_NDS32_LO12S2_RELA, /* type */
678 2, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 10, /* bitsize */
681 FALSE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_dont,/* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_LO12S2_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x000003ff, /* src_mask */
688 0x000003ff, /* dst_mask */
689 FALSE), /* pcrel_offset */
690
691 /* Lower 12 bits of address. */
692 HOWTO (R_NDS32_LO12S1_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 11, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_LO12S1_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0x000007ff, /* src_mask */
703 0x000007ff, /* dst_mask */
704 FALSE), /* pcrel_offset */
705
706 /* Lower 12 bits of address. */
707 HOWTO (R_NDS32_LO12S0_RELA, /* type */
708 0, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 12, /* bitsize */
711 FALSE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_dont,/* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_LO12S0_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0x00000fff, /* src_mask */
718 0x00000fff, /* dst_mask */
719 FALSE), /* pcrel_offset */
720
721 /* Small data area 15 bits offset. */
722 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
723 3, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 15, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_signed, /* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_SDA15S3_RELA",/* name */
731 FALSE, /* partial_inplace */
732 0x00007fff, /* src_mask */
733 0x00007fff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Small data area 15 bits offset. */
737 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
738 2, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 15, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_signed, /* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_SDA15S2_RELA",/* name */
746 FALSE, /* partial_inplace */
747 0x00007fff, /* src_mask */
748 0x00007fff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
752 1, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 15, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_signed, /* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_NDS32_SDA15S1_RELA",/* name */
760 FALSE, /* partial_inplace */
761 0x00007fff, /* src_mask */
762 0x00007fff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 15, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_signed, /* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_NDS32_SDA15S0_RELA",/* name */
774 FALSE, /* partial_inplace */
775 0x00007fff, /* src_mask */
776 0x00007fff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 /* GNU extension to record C++ vtable hierarchy */
780 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
781 0, /* rightshift */
782 2, /* size (0 = byte, 1 = short, 2 = long) */
783 0, /* bitsize */
784 FALSE, /* pc_relative */
785 0, /* bitpos */
786 complain_overflow_dont,/* complain_on_overflow */
787 NULL, /* special_function */
788 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
789 FALSE, /* partial_inplace */
790 0, /* src_mask */
791 0, /* dst_mask */
792 FALSE), /* pcrel_offset */
793
794 /* GNU extension to record C++ vtable member usage */
795 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
796 0, /* rightshift */
797 2, /* size (0 = byte, 1 = short, 2 = long) */
798 0, /* bitsize */
799 FALSE, /* pc_relative */
800 0, /* bitpos */
801 complain_overflow_dont,/* complain_on_overflow */
802 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
803 "R_NDS32_RELA_GNU_VTENTRY", /* name */
804 FALSE, /* partial_inplace */
805 0, /* src_mask */
806 0, /* dst_mask */
807 FALSE), /* pcrel_offset */
808
809 /* Like R_NDS32_20, but referring to the GOT table entry for
810 the symbol. */
811 HOWTO (R_NDS32_GOT20, /* type */
812 0, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 20, /* bitsize */
815 FALSE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_signed, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 "R_NDS32_GOT20", /* name */
820 FALSE, /* partial_inplace */
821 0xfffff, /* src_mask */
822 0xfffff, /* dst_mask */
823 FALSE), /* pcrel_offset */
824
825 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
826 entry for the symbol. */
827 HOWTO (R_NDS32_25_PLTREL, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 24, /* bitsize */
831 TRUE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_25_PLTREL", /* name */
836 FALSE, /* partial_inplace */
837 0xffffff, /* src_mask */
838 0xffffff, /* dst_mask */
839 TRUE), /* pcrel_offset */
840
841 /* This is used only by the dynamic linker. The symbol should exist
842 both in the object being run and in some shared library. The
843 dynamic linker copies the data addressed by the symbol from the
844 shared library into the object, because the object being
845 run has to have the data at some particular address. */
846 HOWTO (R_NDS32_COPY, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 32, /* bitsize */
850 FALSE, /* pc_relative */
851 0, /* bitpos */
852 complain_overflow_bitfield, /* complain_on_overflow */
853 bfd_elf_generic_reloc, /* special_function */
854 "R_NDS32_COPY", /* name */
855 FALSE, /* partial_inplace */
856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
858 FALSE), /* pcrel_offset */
859
860 /* Like R_NDS32_20, but used when setting global offset table
861 entries. */
862 HOWTO (R_NDS32_GLOB_DAT, /* type */
863 0, /* rightshift */
864 2, /* size (0 = byte, 1 = short, 2 = long) */
865 32, /* bitsize */
866 FALSE, /* pc_relative */
867 0, /* bitpos */
868 complain_overflow_bitfield, /* complain_on_overflow */
869 bfd_elf_generic_reloc, /* special_function */
870 "R_NDS32_GLOB_DAT", /* name */
871 FALSE, /* partial_inplace */
872 0xffffffff, /* src_mask */
873 0xffffffff, /* dst_mask */
874 FALSE), /* pcrel_offset */
875
876 /* Marks a procedure linkage table entry for a symbol. */
877 HOWTO (R_NDS32_JMP_SLOT, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 FALSE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_bitfield, /* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_NDS32_JMP_SLOT", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 /* Used only by the dynamic linker. When the object is run, this
892 longword is set to the load address of the object, plus the
893 addend. */
894 HOWTO (R_NDS32_RELATIVE, /* type */
895 0, /* rightshift */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
897 32, /* bitsize */
898 FALSE, /* pc_relative */
899 0, /* bitpos */
900 complain_overflow_bitfield, /* complain_on_overflow */
901 bfd_elf_generic_reloc, /* special_function */
902 "R_NDS32_RELATIVE", /* name */
903 FALSE, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 FALSE), /* pcrel_offset */
907
908 HOWTO (R_NDS32_GOTOFF, /* type */
909 0, /* rightshift */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
911 20, /* bitsize */
912 FALSE, /* pc_relative */
913 0, /* bitpos */
914 complain_overflow_signed, /* complain_on_overflow */
915 bfd_elf_generic_reloc, /* special_function */
916 "R_NDS32_GOTOFF", /* name */
917 FALSE, /* partial_inplace */
918 0xfffff, /* src_mask */
919 0xfffff, /* dst_mask */
920 FALSE), /* pcrel_offset */
921
922 /* An PC Relative 20-bit relocation used when setting PIC offset
923 table register. */
924 HOWTO (R_NDS32_GOTPC20, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 20, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_signed, /* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_NDS32_GOTPC20", /* name */
933 FALSE, /* partial_inplace */
934 0xfffff, /* src_mask */
935 0xfffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 /* Like R_NDS32_HI20, but referring to the GOT table entry for
939 the symbol. */
940 HOWTO (R_NDS32_GOT_HI20, /* type */
941 12, /* rightshift */
942 2, /* size (0 = byte, 1 = short, 2 = long) */
943 20, /* bitsize */
944 FALSE, /* pc_relative */
945 0, /* bitpos */
946 complain_overflow_dont,/* complain_on_overflow */
947 bfd_elf_generic_reloc, /* special_function */
948 "R_NDS32_GOT_HI20", /* name */
949 FALSE, /* partial_inplace */
950 0x000fffff, /* src_mask */
951 0x000fffff, /* dst_mask */
952 FALSE), /* pcrel_offset */
953 HOWTO (R_NDS32_GOT_LO12, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 12, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_dont,/* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_GOT_LO12", /* name */
962 FALSE, /* partial_inplace */
963 0x00000fff, /* src_mask */
964 0x00000fff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* An PC Relative relocation used when setting PIC offset table register.
968 Like R_NDS32_HI20, but referring to the GOT table entry for
969 the symbol. */
970 HOWTO (R_NDS32_GOTPC_HI20, /* type */
971 12, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 20, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_dont,/* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_GOTPC_HI20", /* name */
979 FALSE, /* partial_inplace */
980 0x000fffff, /* src_mask */
981 0x000fffff, /* dst_mask */
982 TRUE), /* pcrel_offset */
983 HOWTO (R_NDS32_GOTPC_LO12, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 12, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_dont, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTPC_LO12", /* name */
992 FALSE, /* partial_inplace */
993 0x00000fff, /* src_mask */
994 0x00000fff, /* dst_mask */
995 TRUE), /* pcrel_offset */
996
997 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
998 12, /* rightshift */
999 2, /* size (0 = byte, 1 = short, 2 = long) */
1000 20, /* bitsize */
1001 FALSE, /* pc_relative */
1002 0, /* bitpos */
1003 complain_overflow_dont,/* complain_on_overflow */
1004 bfd_elf_generic_reloc, /* special_function */
1005 "R_NDS32_GOTOFF_HI20", /* name */
1006 FALSE, /* partial_inplace */
1007 0x000fffff, /* src_mask */
1008 0x000fffff, /* dst_mask */
1009 FALSE), /* pcrel_offset */
1010 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 12, /* bitsize */
1014 FALSE, /* pc_relative */
1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 bfd_elf_generic_reloc, /* special_function */
1018 "R_NDS32_GOTOFF_LO12", /* name */
1019 FALSE, /* partial_inplace */
1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
1022 FALSE), /* pcrel_offset */
1023
1024 /* Alignment hint for relaxable instruction. This is used with
1025 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1026 in order to make next label aligned on word boundary. */
1027 HOWTO (R_NDS32_INSN16, /* type */
1028 0, /* rightshift */
1029 2, /* size (0 = byte, 1 = short, 2 = long) */
1030 32, /* bitsize */
1031 FALSE, /* pc_relative */
1032 0, /* bitpos */
1033 complain_overflow_dont,/* complain_on_overflow */
1034 nds32_elf_ignore_reloc,/* special_function */
1035 "R_NDS32_INSN16", /* name */
1036 FALSE, /* partial_inplace */
1037 0x00000fff, /* src_mask */
1038 0x00000fff, /* dst_mask */
1039 FALSE), /* pcrel_offset */
1040
1041 /* Alignment hint for label. */
1042 HOWTO (R_NDS32_LABEL, /* type */
1043 0, /* rightshift */
1044 2, /* size (0 = byte, 1 = short, 2 = long) */
1045 32, /* bitsize */
1046 FALSE, /* pc_relative */
1047 0, /* bitpos */
1048 complain_overflow_dont,/* complain_on_overflow */
1049 nds32_elf_ignore_reloc,/* special_function */
1050 "R_NDS32_LABEL", /* name */
1051 FALSE, /* partial_inplace */
1052 0xffffffff, /* src_mask */
1053 0xffffffff, /* dst_mask */
1054 FALSE), /* pcrel_offset */
1055
1056 /* Relax hint for unconditional call sequence */
1057 HOWTO (R_NDS32_LONGCALL1, /* type */
1058 0, /* rightshift */
1059 2, /* size (0 = byte, 1 = short, 2 = long) */
1060 32, /* bitsize */
1061 FALSE, /* pc_relative */
1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 nds32_elf_ignore_reloc,/* special_function */
1065 "R_NDS32_LONGCALL1", /* name */
1066 FALSE, /* partial_inplace */
1067 0xffffffff, /* src_mask */
1068 0xffffffff, /* dst_mask */
1069 FALSE), /* pcrel_offset */
1070
1071 /* Relax hint for conditional call sequence. */
1072 HOWTO (R_NDS32_LONGCALL2, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 nds32_elf_ignore_reloc,/* special_function */
1080 "R_NDS32_LONGCALL2", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085
1086 /* Relax hint for conditional call sequence. */
1087 HOWTO (R_NDS32_LONGCALL3, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 nds32_elf_ignore_reloc,/* special_function */
1095 "R_NDS32_LONGCALL3", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Relax hint for unconditional branch sequence. */
1102 HOWTO (R_NDS32_LONGJUMP1, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_LONGJUMP1", /* name */
1111 FALSE, /* partial_inplace */
1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Relax hint for conditional branch sequence. */
1117 HOWTO (R_NDS32_LONGJUMP2, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LONGJUMP2", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for conditional branch sequence. */
1132 HOWTO (R_NDS32_LONGJUMP3, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGJUMP3", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for load/store sequence. */
1147 HOWTO (R_NDS32_LOADSTORE, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LOADSTORE", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for load/store sequence. */
1162 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1163 0, /* rightshift */
1164 1, /* size (0 = byte, 1 = short, 2 = long) */
1165 16, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_9_FIXED_RELA",/* name */
1171 FALSE, /* partial_inplace */
1172 0x000000ff, /* src_mask */
1173 0x000000ff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for load/store sequence. */
1177 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_15_FIXED_RELA", /* name */
1186 FALSE, /* partial_inplace */
1187 0x00003fff, /* src_mask */
1188 0x00003fff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for load/store sequence. */
1192 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_17_FIXED_RELA", /* name */
1201 FALSE, /* partial_inplace */
1202 0x0000ffff, /* src_mask */
1203 0x0000ffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for load/store sequence. */
1207 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_25_FIXED_RELA", /* name */
1216 FALSE, /* partial_inplace */
1217 0x00ffffff, /* src_mask */
1218 0x00ffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* High 20 bits of PLT symbol offset relative to PC. */
1222 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1223 12, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 20, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 bfd_elf_generic_reloc, /* special_function */
1230 "R_NDS32_PLTREL_HI20", /* name */
1231 FALSE, /* partial_inplace */
1232 0x000fffff, /* src_mask */
1233 0x000fffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Low 12 bits of PLT symbol offset relative to PC. */
1237 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1238 0, /* rightshift */
1239 2, /* size (0 = byte, 1 = short, 2 = long) */
1240 12, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 bfd_elf_generic_reloc, /* special_function */
1245 "R_NDS32_PLTREL_LO12", /* name */
1246 FALSE, /* partial_inplace */
1247 0x00000fff, /* src_mask */
1248 0x00000fff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1252 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1253 12, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 20, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 bfd_elf_generic_reloc, /* special_function */
1260 "R_NDS32_PLT_GOTREL_HI20", /* name */
1261 FALSE, /* partial_inplace */
1262 0x000fffff, /* src_mask */
1263 0x000fffff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1267 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 12, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 bfd_elf_generic_reloc, /* special_function */
1275 "R_NDS32_PLT_GOTREL_LO12", /* name */
1276 FALSE, /* partial_inplace */
1277 0x00000fff, /* src_mask */
1278 0x00000fff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Small data area 12 bits offset. */
1282 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1283 2, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 12, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_signed, /* complain_on_overflow */
1289 bfd_elf_generic_reloc, /* special_function */
1290 "R_NDS32_SDA12S2_DP_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00000fff, /* src_mask */
1293 0x00000fff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* Small data area 12 bits offset. */
1297 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1298 2, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 12, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_signed, /* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_SDA12S2_SP_RELA", /* name */
1306 FALSE, /* partial_inplace */
1307 0x00000fff, /* src_mask */
1308 0x00000fff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310 /* Lower 12 bits of address. */
1311
1312 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1313 2, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 10, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_LO12S2_DP_RELA", /* name */
1321 FALSE, /* partial_inplace */
1322 0x000003ff, /* src_mask */
1323 0x000003ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* Lower 12 bits of address. */
1327 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1328 2, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 10, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_LO12S2_SP_RELA", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000003ff, /* src_mask */
1338 0x000003ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340 /* Lower 12 bits of address. Special identity for or case. */
1341 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 12, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_NDS32_LO12S0_ORI_RELA", /* name */
1350 FALSE, /* partial_inplace */
1351 0x00000fff, /* src_mask */
1352 0x00000fff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354 /* Small data area 19 bits offset. */
1355 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1356 3, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 16, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_signed, /* complain_on_overflow */
1362 bfd_elf_generic_reloc, /* special_function */
1363 "R_NDS32_SDA16S3_RELA",/* name */
1364 FALSE, /* partial_inplace */
1365 0x0000ffff, /* src_mask */
1366 0x0000ffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 /* Small data area 15 bits offset. */
1370 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1371 2, /* rightshift */
1372 2, /* size (0 = byte, 1 = short, 2 = long) */
1373 17, /* bitsize */
1374 FALSE, /* pc_relative */
1375 0, /* bitpos */
1376 complain_overflow_signed, /* complain_on_overflow */
1377 bfd_elf_generic_reloc, /* special_function */
1378 "R_NDS32_SDA17S2_RELA",/* name */
1379 FALSE, /* partial_inplace */
1380 0x0001ffff, /* src_mask */
1381 0x0001ffff, /* dst_mask */
1382 FALSE), /* pcrel_offset */
1383
1384 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1385 1, /* rightshift */
1386 2, /* size (0 = byte, 1 = short, 2 = long) */
1387 18, /* bitsize */
1388 FALSE, /* pc_relative */
1389 0, /* bitpos */
1390 complain_overflow_signed, /* complain_on_overflow */
1391 bfd_elf_generic_reloc, /* special_function */
1392 "R_NDS32_SDA18S1_RELA",/* name */
1393 FALSE, /* partial_inplace */
1394 0x0003ffff, /* src_mask */
1395 0x0003ffff, /* dst_mask */
1396 FALSE), /* pcrel_offset */
1397
1398 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1399 0, /* rightshift */
1400 2, /* size (0 = byte, 1 = short, 2 = long) */
1401 19, /* bitsize */
1402 FALSE, /* pc_relative */
1403 0, /* bitpos */
1404 complain_overflow_signed, /* complain_on_overflow */
1405 bfd_elf_generic_reloc, /* special_function */
1406 "R_NDS32_SDA19S0_RELA",/* name */
1407 FALSE, /* partial_inplace */
1408 0x0007ffff, /* src_mask */
1409 0x0007ffff, /* dst_mask */
1410 FALSE), /* pcrel_offset */
1411 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1412 0, /* rightshift */
1413 0, /* size (0 = byte, 1 = short, 2 = long) */
1414 8, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 nds32_elf_ignore_reloc,/* special_function */
1419 "R_NDS32_DWARF2_OP1_RELA", /* name */
1420 FALSE, /* partial_inplace */
1421 0xff, /* src_mask */
1422 0xff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1425 0, /* rightshift */
1426 1, /* size (0 = byte, 1 = short, 2 = long) */
1427 16, /* bitsize */
1428 FALSE, /* pc_relative */
1429 0, /* bitpos */
1430 complain_overflow_dont,/* complain_on_overflow */
1431 nds32_elf_ignore_reloc,/* special_function */
1432 "R_NDS32_DWARF2_OP2_RELA", /* name */
1433 FALSE, /* partial_inplace */
1434 0xffff, /* src_mask */
1435 0xffff, /* dst_mask */
1436 FALSE), /* pcrel_offset */
1437 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1438 0, /* rightshift */
1439 2, /* size (0 = byte, 1 = short, 2 = long) */
1440 32, /* bitsize */
1441 FALSE, /* pc_relative */
1442 0, /* bitpos */
1443 complain_overflow_dont,/* complain_on_overflow */
1444 nds32_elf_ignore_reloc,/* special_function */
1445 "R_NDS32_DWARF2_LEB_RELA", /* name */
1446 FALSE, /* partial_inplace */
1447 0xffffffff, /* src_mask */
1448 0xffffffff, /* dst_mask */
1449 FALSE), /* pcrel_offset */
1450 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1451 0, /* rightshift */
1452 1, /* size (0 = byte, 1 = short, 2 = long) */
1453 16, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont,/* complain_on_overflow */
1457 nds32_elf_ignore_reloc,/* special_function */
1458 "R_NDS32_UPDATE_TA_RELA", /* name */
1459 FALSE, /* partial_inplace */
1460 0xffff, /* src_mask */
1461 0xffff, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1464 entry for the symbol. */
1465 HOWTO (R_NDS32_9_PLTREL, /* type */
1466 1, /* rightshift */
1467 1, /* size (0 = byte, 1 = short, 2 = long) */
1468 8, /* bitsize */
1469 TRUE, /* pc_relative */
1470 0, /* bitpos */
1471 complain_overflow_signed, /* complain_on_overflow */
1472 bfd_elf_generic_reloc, /* special_function */
1473 "R_NDS32_9_PLTREL", /* name */
1474 FALSE, /* partial_inplace */
1475 0xff, /* src_mask */
1476 0xff, /* dst_mask */
1477 TRUE), /* pcrel_offset */
1478 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1479 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1480 0, /* rightshift */
1481 2, /* size (0 = byte, 1 = short, 2 = long) */
1482 20, /* bitsize */
1483 FALSE, /* pc_relative */
1484 0, /* bitpos */
1485 complain_overflow_dont,/* complain_on_overflow */
1486 bfd_elf_generic_reloc, /* special_function */
1487 "R_NDS32_PLT_GOTREL_LO20", /* name */
1488 FALSE, /* partial_inplace */
1489 0x000fffff, /* src_mask */
1490 0x000fffff, /* dst_mask */
1491 FALSE), /* pcrel_offset */
1492 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1493 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 15, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_dont,/* complain_on_overflow */
1500 bfd_elf_generic_reloc, /* special_function */
1501 "R_NDS32_PLT_GOTREL_LO15", /* name */
1502 FALSE, /* partial_inplace */
1503 0x00007fff, /* src_mask */
1504 0x00007fff, /* dst_mask */
1505 FALSE), /* pcrel_offset */
1506 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1507 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 19, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_dont,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_NDS32_PLT_GOTREL_LO19", /* name */
1516 FALSE, /* partial_inplace */
1517 0x0007ffff, /* src_mask */
1518 0x0007ffff, /* dst_mask */
1519 FALSE), /* pcrel_offset */
1520 HOWTO (R_NDS32_GOT_LO15, /* type */
1521 0, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 15, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_dont,/* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 "R_NDS32_GOT_LO15", /* name */
1529 FALSE, /* partial_inplace */
1530 0x00007fff, /* src_mask */
1531 0x00007fff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533 HOWTO (R_NDS32_GOT_LO19, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 19, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_dont,/* complain_on_overflow */
1540 bfd_elf_generic_reloc, /* special_function */
1541 "R_NDS32_GOT_LO19", /* name */
1542 FALSE, /* partial_inplace */
1543 0x0007ffff, /* src_mask */
1544 0x0007ffff, /* dst_mask */
1545 FALSE), /* pcrel_offset */
1546 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 15, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_dont,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_NDS32_GOTOFF_LO15", /* name */
1555 FALSE, /* partial_inplace */
1556 0x00007fff, /* src_mask */
1557 0x00007fff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1560 0, /* rightshift */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 19, /* bitsize */
1563 FALSE, /* pc_relative */
1564 0, /* bitpos */
1565 complain_overflow_dont,/* complain_on_overflow */
1566 bfd_elf_generic_reloc, /* special_function */
1567 "R_NDS32_GOTOFF_LO19", /* name */
1568 FALSE, /* partial_inplace */
1569 0x0007ffff, /* src_mask */
1570 0x0007ffff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
1572 /* GOT 15 bits offset. */
1573 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1574 2, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 15, /* bitsize */
1577 FALSE, /* pc_relative */
1578 0, /* bitpos */
1579 complain_overflow_signed, /* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_NDS32_GOT15S2_RELA",/* name */
1582 FALSE, /* partial_inplace */
1583 0x00007fff, /* src_mask */
1584 0x00007fff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
1586 /* GOT 17 bits offset. */
1587 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1588 2, /* rightshift */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1590 17, /* bitsize */
1591 FALSE, /* pc_relative */
1592 0, /* bitpos */
1593 complain_overflow_signed, /* complain_on_overflow */
1594 bfd_elf_generic_reloc, /* special_function */
1595 "R_NDS32_GOT17S2_RELA",/* name */
1596 FALSE, /* partial_inplace */
1597 0x0001ffff, /* src_mask */
1598 0x0001ffff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1600 /* A 5 bit address. */
1601 HOWTO (R_NDS32_5_RELA, /* type */
1602 0, /* rightshift */
1603 1, /* size (0 = byte, 1 = short, 2 = long) */
1604 5, /* bitsize */
1605 FALSE, /* pc_relative */
1606 0, /* bitpos */
1607 complain_overflow_signed, /* complain_on_overflow */
1608 bfd_elf_generic_reloc, /* special_function */
1609 "R_NDS32_5_RELA", /* name */
1610 FALSE, /* partial_inplace */
1611 0x1f, /* src_mask */
1612 0x1f, /* dst_mask */
1613 FALSE), /* pcrel_offset */
1614 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1615 1, /* rightshift */
1616 1, /* size (0 = byte, 1 = short, 2 = long) */
1617 9, /* bitsize */
1618 TRUE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_unsigned, /* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_NDS32_10_UPCREL_RELA", /* name */
1623 FALSE, /* partial_inplace */
1624 0x1ff, /* src_mask */
1625 0x1ff, /* dst_mask */
1626 TRUE), /* pcrel_offset */
1627 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1628 2, /* rightshift */
1629 1, /* size (0 = byte, 1 = short, 2 = long) */
1630 7, /* bitsize */
1631 FALSE, /* pc_relative */
1632 0, /* bitpos */
1633 complain_overflow_unsigned, /* complain_on_overflow */
1634 bfd_elf_generic_reloc, /* special_function */
1635 "R_NDS32_SDA_FP7U2_RELA", /* name */
1636 FALSE, /* partial_inplace */
1637 0x0000007f, /* src_mask */
1638 0x0000007f, /* dst_mask */
1639 FALSE), /* pcrel_offset */
1640 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1641 1, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 8, /* bitsize */
1644 TRUE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_signed, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1649 FALSE, /* partial_inplace */
1650 0xff, /* src_mask */
1651 0xff, /* dst_mask */
1652 TRUE), /* pcrel_offset */
1653 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1654 1, /* rightshift */
1655 2, /* size (0 = byte, 1 = short, 2 = long) */
1656 24, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_NDS32_25_ABS_RELA", /* name */
1662 FALSE, /* partial_inplace */
1663 0xffffff, /* src_mask */
1664 0xffffff, /* dst_mask */
1665 FALSE), /* pcrel_offset */
1666
1667 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1668 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1669 1, /* rightshift */
1670 2, /* size (0 = byte, 1 = short, 2 = long) */
1671 16, /* bitsize */
1672 TRUE, /* pc_relative */
1673 0, /* bitpos */
1674 complain_overflow_signed, /* complain_on_overflow */
1675 bfd_elf_generic_reloc, /* special_function */
1676 "R_NDS32_17IFC_PCREL_RELA", /* name */
1677 FALSE, /* partial_inplace */
1678 0xffff, /* src_mask */
1679 0xffff, /* dst_mask */
1680 TRUE), /* pcrel_offset */
1681
1682 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1683 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1684 1, /* rightshift */
1685 1, /* size (0 = byte, 1 = short, 2 = long) */
1686 9, /* bitsize */
1687 TRUE, /* pc_relative */
1688 0, /* bitpos */
1689 complain_overflow_unsigned, /* complain_on_overflow */
1690 bfd_elf_generic_reloc, /* special_function */
1691 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1692 FALSE, /* partial_inplace */
1693 0x1ff, /* src_mask */
1694 0x1ff, /* dst_mask */
1695 TRUE), /* pcrel_offset */
1696
1697 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1698 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1699 12, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 20, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_dont, /* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_NDS32_TLS_LE_HI20", /* name */
1707 FALSE, /* partial_inplace */
1708 0x000fffff, /* src_mask */
1709 0x000fffff, /* dst_mask */
1710 FALSE), /* pcrel_offset */
1711 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1712 0, /* rightshift */
1713 2, /* size (0 = byte, 1 = short, 2 = long) */
1714 12, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont, /* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_NDS32_TLS_LE_LO12", /* name */
1720 FALSE, /* partial_inplace */
1721 0x00000fff, /* src_mask */
1722 0x00000fff, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1726 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1727 12, /* rightshift */
1728 2, /* size (0 = byte, 1 = short, 2 = long) */
1729 20, /* bitsize */
1730 FALSE, /* pc_relative */
1731 0, /* bitpos */
1732 complain_overflow_dont, /* complain_on_overflow */
1733 bfd_elf_generic_reloc, /* special_function */
1734 "R_NDS32_TLS_IE_HI20", /* name */
1735 FALSE, /* partial_inplace */
1736 0x000fffff, /* src_mask */
1737 0x000fffff, /* dst_mask */
1738 FALSE), /* pcrel_offset */
1739 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1740 2, /* rightshift */
1741 2, /* size (0 = byte, 1 = short, 2 = long) */
1742 10, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont, /* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_NDS32_TLS_IE_LO12S2", /* name */
1748 FALSE, /* partial_inplace */
1749 0x000003ff, /* src_mask */
1750 0x000003ff, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752 /* Mark a TLS IE entry in GOT. */
1753 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1754 0, /* rightshift */
1755 2, /* size (0 = byte, 1 = short, 2 = long) */
1756 32, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_bitfield, /* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_NDS32_TLS_TPOFF", /* name */
1762 FALSE, /* partial_inplace */
1763 0xffffffff, /* src_mask */
1764 0xffffffff, /* dst_mask */
1765 FALSE), /* pcrel_offset */
1766 /* A 20 bit address. */
1767 HOWTO (R_NDS32_TLS_LE_20, /* type */
1768 0, /* rightshift */
1769 2, /* size (0 = byte, 1 = short, 2 = long) */
1770 20, /* bitsize */
1771 FALSE, /* pc_relative */
1772 0, /* bitpos */
1773 complain_overflow_signed, /* complain_on_overflow */
1774 bfd_elf_generic_reloc, /* special_function */
1775 "R_NDS32_TLS_LE_20", /* name */
1776 FALSE, /* partial_inplace */
1777 0xfffff, /* src_mask */
1778 0xfffff, /* dst_mask */
1779 FALSE), /* pcrel_offset */
1780 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1781 0, /* rightshift */
1782 2, /* size (0 = byte, 1 = short, 2 = long) */
1783 15, /* bitsize */
1784 FALSE, /* pc_relative */
1785 0, /* bitpos */
1786 complain_overflow_signed, /* complain_on_overflow */
1787 bfd_elf_generic_reloc, /* special_function */
1788 "R_NDS32_TLS_LE_15S0", /* name */
1789 FALSE, /* partial_inplace */
1790 0x7fff, /* src_mask */
1791 0x7fff, /* dst_mask */
1792 FALSE), /* pcrel_offset */
1793 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1794 1, /* rightshift */
1795 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 15, /* bitsize */
1797 FALSE, /* pc_relative */
1798 0, /* bitpos */
1799 complain_overflow_signed, /* complain_on_overflow */
1800 bfd_elf_generic_reloc, /* special_function */
1801 "R_NDS32_TLS_LE_15S1", /* name */
1802 FALSE, /* partial_inplace */
1803 0x7fff, /* src_mask */
1804 0x7fff, /* dst_mask */
1805 FALSE), /* pcrel_offset */
1806 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1807 2, /* rightshift */
1808 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 15, /* bitsize */
1810 FALSE, /* pc_relative */
1811 0, /* bitpos */
1812 complain_overflow_signed, /* complain_on_overflow */
1813 bfd_elf_generic_reloc, /* special_function */
1814 "R_NDS32_TLS_LE_15S2", /* name */
1815 FALSE, /* partial_inplace */
1816 0x7fff, /* src_mask */
1817 0x7fff, /* dst_mask */
1818 FALSE), /* pcrel_offset */
1819
1820 /* Relax hint for unconditional call sequence */
1821 HOWTO (R_NDS32_LONGCALL4, /* type */
1822 0, /* rightshift */
1823 2, /* size (0 = byte, 1 = short, 2 = long) */
1824 32, /* bitsize */
1825 FALSE, /* pc_relative */
1826 0, /* bitpos */
1827 complain_overflow_dont, /* complain_on_overflow */
1828 nds32_elf_ignore_reloc, /* special_function */
1829 "R_NDS32_LONGCALL4", /* name */
1830 FALSE, /* partial_inplace */
1831 0xffffffff, /* src_mask */
1832 0xffffffff, /* dst_mask */
1833 FALSE), /* pcrel_offset */
1834
1835 /* Relax hint for conditional call sequence. */
1836 HOWTO (R_NDS32_LONGCALL5, /* type */
1837 0, /* rightshift */
1838 2, /* size (0 = byte, 1 = short, 2 = long) */
1839 32, /* bitsize */
1840 FALSE, /* pc_relative */
1841 0, /* bitpos */
1842 complain_overflow_dont, /* complain_on_overflow */
1843 nds32_elf_ignore_reloc, /* special_function */
1844 "R_NDS32_LONGCALL5", /* name */
1845 FALSE, /* partial_inplace */
1846 0xffffffff, /* src_mask */
1847 0xffffffff, /* dst_mask */
1848 FALSE), /* pcrel_offset */
1849
1850 /* Relax hint for conditional call sequence. */
1851 HOWTO (R_NDS32_LONGCALL6, /* type */
1852 0, /* rightshift */
1853 2, /* size (0 = byte, 1 = short, 2 = long) */
1854 32, /* bitsize */
1855 FALSE, /* pc_relative */
1856 0, /* bitpos */
1857 complain_overflow_dont, /* complain_on_overflow */
1858 nds32_elf_ignore_reloc, /* special_function */
1859 "R_NDS32_LONGCALL6", /* name */
1860 FALSE, /* partial_inplace */
1861 0xffffffff, /* src_mask */
1862 0xffffffff, /* dst_mask */
1863 FALSE), /* pcrel_offset */
1864
1865 /* Relax hint for unconditional branch sequence. */
1866 HOWTO (R_NDS32_LONGJUMP4, /* type */
1867 0, /* rightshift */
1868 2, /* size (0 = byte, 1 = short, 2 = long) */
1869 32, /* bitsize */
1870 FALSE, /* pc_relative */
1871 0, /* bitpos */
1872 complain_overflow_dont, /* complain_on_overflow */
1873 nds32_elf_ignore_reloc, /* special_function */
1874 "R_NDS32_LONGJUMP4", /* name */
1875 FALSE, /* partial_inplace */
1876 0xffffffff, /* src_mask */
1877 0xffffffff, /* dst_mask */
1878 FALSE), /* pcrel_offset */
1879
1880 /* Relax hint for conditional branch sequence. */
1881 HOWTO (R_NDS32_LONGJUMP5, /* type */
1882 0, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 32, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_dont, /* complain_on_overflow */
1888 nds32_elf_ignore_reloc, /* special_function */
1889 "R_NDS32_LONGJUMP5", /* name */
1890 FALSE, /* partial_inplace */
1891 0xffffffff, /* src_mask */
1892 0xffffffff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for conditional branch sequence. */
1896 HOWTO (R_NDS32_LONGJUMP6, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGJUMP6", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional branch sequence. */
1911 HOWTO (R_NDS32_LONGJUMP7, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGJUMP7", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
1924 };
1925
1926 /* Relocations used for relaxation. */
1927 static reloc_howto_type nds32_elf_relax_howto_table[] =
1928 {
1929 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
1930 0, /* rightshift */
1931 2, /* size (0 = byte, 1 = short, 2 = long) */
1932 32, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 nds32_elf_ignore_reloc,/* special_function */
1937 "R_NDS32_RELAX_ENTRY", /* name */
1938 FALSE, /* partial_inplace */
1939 0xffffffff, /* src_mask */
1940 0xffffffff, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942 HOWTO (R_NDS32_GOT_SUFF, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont,/* complain_on_overflow */
1949 nds32_elf_ignore_reloc,/* special_function */
1950 "R_NDS32_GOT_SUFF", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
1956 0, /* rightshift */
1957 2, /* size (0 = byte, 1 = short, 2 = long) */
1958 32, /* bitsize */
1959 FALSE, /* pc_relative */
1960 0, /* bitpos */
1961 complain_overflow_bitfield, /* complain_on_overflow */
1962 nds32_elf_ignore_reloc,/* special_function */
1963 "R_NDS32_GOTOFF_SUFF", /* name */
1964 FALSE, /* partial_inplace */
1965 0xffffffff, /* src_mask */
1966 0xffffffff, /* dst_mask */
1967 FALSE), /* pcrel_offset */
1968 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
1969 0, /* rightshift */
1970 2, /* size (0 = byte, 1 = short, 2 = long) */
1971 32, /* bitsize */
1972 FALSE, /* pc_relative */
1973 0, /* bitpos */
1974 complain_overflow_dont,/* complain_on_overflow */
1975 nds32_elf_ignore_reloc,/* special_function */
1976 "R_NDS32_PLT_GOT_SUFF",/* name */
1977 FALSE, /* partial_inplace */
1978 0xffffffff, /* src_mask */
1979 0xffffffff, /* dst_mask */
1980 FALSE), /* pcrel_offset */
1981 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
1982 0, /* rightshift */
1983 2, /* size (0 = byte, 1 = short, 2 = long) */
1984 32, /* bitsize */
1985 FALSE, /* pc_relative */
1986 0, /* bitpos */
1987 complain_overflow_dont,/* complain_on_overflow */
1988 nds32_elf_ignore_reloc,/* special_function */
1989 "R_NDS32_MULCALL_SUFF",/* name */
1990 FALSE, /* partial_inplace */
1991 0xffffffff, /* src_mask */
1992 0xffffffff, /* dst_mask */
1993 FALSE), /* pcrel_offset */
1994 HOWTO (R_NDS32_PTR, /* type */
1995 0, /* rightshift */
1996 2, /* size (0 = byte, 1 = short, 2 = long) */
1997 32, /* bitsize */
1998 FALSE, /* pc_relative */
1999 0, /* bitpos */
2000 complain_overflow_dont,/* complain_on_overflow */
2001 nds32_elf_ignore_reloc,/* special_function */
2002 "R_NDS32_PTR", /* name */
2003 FALSE, /* partial_inplace */
2004 0xffffffff, /* src_mask */
2005 0xffffffff, /* dst_mask */
2006 FALSE), /* pcrel_offset */
2007 HOWTO (R_NDS32_PTR_COUNT, /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 32, /* bitsize */
2011 FALSE, /* pc_relative */
2012 0, /* bitpos */
2013 complain_overflow_dont,/* complain_on_overflow */
2014 nds32_elf_ignore_reloc,/* special_function */
2015 "R_NDS32_PTR_COUNT", /* name */
2016 FALSE, /* partial_inplace */
2017 0xffffffff, /* src_mask */
2018 0xffffffff, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2021 0, /* rightshift */
2022 2, /* size (0 = byte, 1 = short, 2 = long) */
2023 32, /* bitsize */
2024 FALSE, /* pc_relative */
2025 0, /* bitpos */
2026 complain_overflow_dont,/* complain_on_overflow */
2027 nds32_elf_ignore_reloc,/* special_function */
2028 "R_NDS32_PTR_RESOLVED",/* name */
2029 FALSE, /* partial_inplace */
2030 0xffffffff, /* src_mask */
2031 0xffffffff, /* dst_mask */
2032 FALSE), /* pcrel_offset */
2033 HOWTO (R_NDS32_PLTBLOCK, /* type */
2034 0, /* rightshift */
2035 2, /* size (0 = byte, 1 = short, 2 = long) */
2036 32, /* bitsize */
2037 FALSE, /* pc_relative */
2038 0, /* bitpos */
2039 complain_overflow_dont,/* complain_on_overflow */
2040 nds32_elf_ignore_reloc,/* special_function */
2041 "R_NDS32_PLTBLOCK", /* name */
2042 FALSE, /* partial_inplace */
2043 0xffffffff, /* src_mask */
2044 0xffffffff, /* dst_mask */
2045 FALSE), /* pcrel_offset */
2046 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2047 0, /* rightshift */
2048 2, /* size (0 = byte, 1 = short, 2 = long) */
2049 32, /* bitsize */
2050 FALSE, /* pc_relative */
2051 0, /* bitpos */
2052 complain_overflow_dont,/* complain_on_overflow */
2053 nds32_elf_ignore_reloc,/* special_function */
2054 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2055 FALSE, /* partial_inplace */
2056 0xffffffff, /* src_mask */
2057 0xffffffff, /* dst_mask */
2058 FALSE), /* pcrel_offset */
2059 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2060 0, /* rightshift */
2061 2, /* size (0 = byte, 1 = short, 2 = long) */
2062 32, /* bitsize */
2063 FALSE, /* pc_relative */
2064 0, /* bitpos */
2065 complain_overflow_dont,/* complain_on_overflow */
2066 nds32_elf_ignore_reloc,/* special_function */
2067 "R_NDS32_RELAX_REGION_END", /* name */
2068 FALSE, /* partial_inplace */
2069 0xffffffff, /* src_mask */
2070 0xffffffff, /* dst_mask */
2071 FALSE), /* pcrel_offset */
2072 HOWTO (R_NDS32_MINUEND, /* type */
2073 0, /* rightshift */
2074 2, /* size (0 = byte, 1 = short, 2 = long) */
2075 32, /* bitsize */
2076 FALSE, /* pc_relative */
2077 0, /* bitpos */
2078 complain_overflow_dont,/* complain_on_overflow */
2079 nds32_elf_ignore_reloc,/* special_function */
2080 "R_NDS32_MINUEND", /* name */
2081 FALSE, /* partial_inplace */
2082 0xffffffff, /* src_mask */
2083 0xffffffff, /* dst_mask */
2084 FALSE), /* pcrel_offset */
2085 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2086 0, /* rightshift */
2087 2, /* size (0 = byte, 1 = short, 2 = long) */
2088 32, /* bitsize */
2089 FALSE, /* pc_relative */
2090 0, /* bitpos */
2091 complain_overflow_dont,/* complain_on_overflow */
2092 nds32_elf_ignore_reloc,/* special_function */
2093 "R_NDS32_SUBTRAHEND", /* name */
2094 FALSE, /* partial_inplace */
2095 0xffffffff, /* src_mask */
2096 0xffffffff, /* dst_mask */
2097 FALSE), /* pcrel_offset */
2098 HOWTO (R_NDS32_DIFF8, /* type */
2099 0, /* rightshift */
2100 0, /* size (0 = byte, 1 = short, 2 = long) */
2101 8, /* bitsize */
2102 FALSE, /* pc_relative */
2103 0, /* bitpos */
2104 complain_overflow_dont,/* complain_on_overflow */
2105 nds32_elf_ignore_reloc,/* special_function */
2106 "R_NDS32_DIFF8", /* name */
2107 FALSE, /* partial_inplace */
2108 0x000000ff, /* src_mask */
2109 0x000000ff, /* dst_mask */
2110 FALSE), /* pcrel_offset */
2111 HOWTO (R_NDS32_DIFF16, /* type */
2112 0, /* rightshift */
2113 1, /* size (0 = byte, 1 = short, 2 = long) */
2114 16, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
2117 complain_overflow_dont,/* complain_on_overflow */
2118 nds32_elf_ignore_reloc,/* special_function */
2119 "R_NDS32_DIFF16", /* name */
2120 FALSE, /* partial_inplace */
2121 0x0000ffff, /* src_mask */
2122 0x0000ffff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124 HOWTO (R_NDS32_DIFF32, /* type */
2125 0, /* rightshift */
2126 2, /* size (0 = byte, 1 = short, 2 = long) */
2127 32, /* bitsize */
2128 FALSE, /* pc_relative */
2129 0, /* bitpos */
2130 complain_overflow_dont,/* complain_on_overflow */
2131 nds32_elf_ignore_reloc,/* special_function */
2132 "R_NDS32_DIFF32", /* name */
2133 FALSE, /* partial_inplace */
2134 0xffffffff, /* src_mask */
2135 0xffffffff, /* dst_mask */
2136 FALSE), /* pcrel_offset */
2137 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2138 0, /* rightshift */
2139 0, /* size (0 = byte, 1 = short, 2 = long) */
2140 0, /* bitsize */
2141 FALSE, /* pc_relative */
2142 0, /* bitpos */
2143 complain_overflow_dont,/* complain_on_overflow */
2144 nds32_elf_ignore_reloc,/* special_function */
2145 "R_NDS32_DIFF_ULEB128",/* name */
2146 FALSE, /* partial_inplace */
2147 0xffffffff, /* src_mask */
2148 0xffffffff, /* dst_mask */
2149 FALSE), /* pcrel_offset */
2150 HOWTO (R_NDS32_DATA, /* type */
2151 0, /* rightshift */
2152 2, /* size (0 = byte, 1 = short, 2 = long) */
2153 32, /* bitsize */
2154 FALSE, /* pc_relative */
2155 0, /* bitpos */
2156 complain_overflow_dont,/* complain_on_overflow */
2157 nds32_elf_ignore_reloc,/* special_function */
2158 "R_NDS32_DATA", /* name */
2159 FALSE, /* partial_inplace */
2160 0xffffffff, /* src_mask */
2161 0xffffffff, /* dst_mask */
2162 FALSE), /* pcrel_offset */
2163 HOWTO (R_NDS32_TRAN, /* type */
2164 0, /* rightshift */
2165 2, /* size (0 = byte, 1 = short, 2 = long) */
2166 32, /* bitsize */
2167 FALSE, /* pc_relative */
2168 0, /* bitpos */
2169 complain_overflow_dont,/* complain_on_overflow */
2170 nds32_elf_ignore_reloc,/* special_function */
2171 "R_NDS32_TRAN", /* name */
2172 FALSE, /* partial_inplace */
2173 0xffffffff, /* src_mask */
2174 0xffffffff, /* dst_mask */
2175 FALSE), /* pcrel_offset */
2176 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2177 0, /* rightshift */
2178 2, /* size (0 = byte, 1 = short, 2 = long) */
2179 32, /* bitsize */
2180 FALSE, /* pc_relative */
2181 0, /* bitpos */
2182 complain_overflow_dont, /* complain_on_overflow */
2183 nds32_elf_ignore_reloc, /* special_function */
2184 "R_NDS32_TLS_LE_ADD", /* name */
2185 FALSE, /* partial_inplace */
2186 0xffffffff, /* src_mask */
2187 0xffffffff, /* dst_mask */
2188 FALSE), /* pcrel_offset */
2189 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2190 0, /* rightshift */
2191 2, /* size (0 = byte, 1 = short, 2 = long) */
2192 32, /* bitsize */
2193 FALSE, /* pc_relative */
2194 0, /* bitpos */
2195 complain_overflow_dont, /* complain_on_overflow */
2196 nds32_elf_ignore_reloc, /* special_function */
2197 "R_NDS32_TLS_LE_LS", /* name */
2198 FALSE, /* partial_inplace */
2199 0xffffffff, /* src_mask */
2200 0xffffffff, /* dst_mask */
2201 FALSE), /* pcrel_offset */
2202 HOWTO (R_NDS32_EMPTY, /* type */
2203 0, /* rightshift */
2204 2, /* size (0 = byte, 1 = short, 2 = long) */
2205 32, /* bitsize */
2206 FALSE, /* pc_relative */
2207 0, /* bitpos */
2208 complain_overflow_dont, /* complain_on_overflow */
2209 nds32_elf_ignore_reloc, /* special_function */
2210 "R_NDS32_EMPTY", /* name */
2211 FALSE, /* partial_inplace */
2212 0xffffffff, /* src_mask */
2213 0xffffffff, /* dst_mask */
2214 FALSE), /* pcrel_offset */
2215 };
2216
2217 \f
2218 /* nds32_insertion_sort sorts an array with nmemb elements of size size.
2219 This prototype is the same as qsort (). */
2220
2221 void
2222 nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2223 int (*compar) (const void *lhs, const void *rhs))
2224 {
2225 char *ptr = (char *) base;
2226 int i, j;
2227 char *tmp = xmalloc (size);
2228
2229 /* If i is less than j, i is inserted before j.
2230
2231 |---- j ----- i --------------|
2232 \ / \ /
2233 sorted unsorted
2234 */
2235
2236 for (i = 1; i < (int) nmemb; i++)
2237 {
2238 for (j = (i - 1); j >= 0; j--)
2239 if (compar (ptr + i * size, ptr + j * size) >= 0)
2240 break;
2241
2242 j++;
2243
2244 if (i == j)
2245 continue; /* i is in order. */
2246
2247 memcpy (tmp, ptr + i * size, size);
2248 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2249 memcpy (ptr + j * size, tmp, size);
2250 }
2251 free (tmp);
2252 }
2253
2254 /* Sort relocation by r_offset.
2255
2256 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2257 algorithm. Relocations at the same r_offset must keep their order.
2258 For example, RELAX_ENTRY must be the very first relocation entry.
2259
2260 Currently, this function implements insertion-sort.
2261
2262 FIXME: If we already sort them in assembler, why bother sort them
2263 here again? */
2264
2265 static int
2266 compar_reloc (const void *lhs, const void *rhs)
2267 {
2268 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2269 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2270
2271 if (l->r_offset > r->r_offset)
2272 return 1;
2273 else if (l->r_offset == r->r_offset)
2274 return 0;
2275 else
2276 return -1;
2277 }
2278
2279 /* Functions listed below are only used for old relocs.
2280 * nds32_elf_9_pcrel_reloc
2281 * nds32_elf_do_9_pcrel_reloc
2282 * nds32_elf_hi20_reloc
2283 * nds32_elf_relocate_hi20
2284 * nds32_elf_lo12_reloc
2285 * nds32_elf_sda15_reloc
2286 * nds32_elf_generic_reloc
2287 */
2288
2289 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2290
2291 static bfd_reloc_status_type
2292 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2293 void *data, asection *input_section, bfd *output_bfd,
2294 char **error_message ATTRIBUTE_UNUSED)
2295 {
2296 /* This part is from bfd_elf_generic_reloc. */
2297 if (output_bfd != (bfd *) NULL
2298 && (symbol->flags & BSF_SECTION_SYM) == 0
2299 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2300 {
2301 reloc_entry->address += input_section->output_offset;
2302 return bfd_reloc_ok;
2303 }
2304
2305 if (output_bfd != NULL)
2306 {
2307 /* FIXME: See bfd_perform_relocation. Is this right? */
2308 return bfd_reloc_continue;
2309 }
2310
2311 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2312 input_section,
2313 data, reloc_entry->address,
2314 symbol->section,
2315 (symbol->value
2316 + symbol->section->output_section->vma
2317 + symbol->section->output_offset),
2318 reloc_entry->addend);
2319 }
2320
2321 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2322 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2323
2324 static bfd_reloc_status_type
2325 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2326 asection *input_section, bfd_byte *data,
2327 bfd_vma offset,
2328 asection *symbol_section ATTRIBUTE_UNUSED,
2329 bfd_vma symbol_value, bfd_vma addend)
2330 {
2331 bfd_signed_vma relocation;
2332 unsigned short x;
2333 bfd_reloc_status_type status;
2334
2335 /* Sanity check the address (offset in section). */
2336 if (offset > bfd_get_section_limit (abfd, input_section))
2337 return bfd_reloc_outofrange;
2338
2339 relocation = symbol_value + addend;
2340 /* Make it pc relative. */
2341 relocation -= (input_section->output_section->vma
2342 + input_section->output_offset);
2343 /* These jumps mask off the lower two bits of the current address
2344 before doing pcrel calculations. */
2345 relocation -= (offset & -(bfd_vma) 2);
2346
2347 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
2348 status = bfd_reloc_overflow;
2349 else
2350 status = bfd_reloc_ok;
2351
2352 x = bfd_getb16 (data + offset);
2353
2354 relocation >>= howto->rightshift;
2355 relocation <<= howto->bitpos;
2356 x = (x & ~howto->dst_mask)
2357 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2358
2359 bfd_putb16 ((bfd_vma) x, data + offset);
2360
2361 return status;
2362 }
2363
2364 /* Handle the R_NDS32_HI20_[SU]LO relocs.
2365 HI20_SLO is for the add3 and load/store with displacement instructions.
2366 HI20 is for the or3 instruction.
2367 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2368 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2369 we must add one to the high 16 bytes (which will get subtracted off when
2370 the low 16 bits are added).
2371 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2372 because there is a carry from the LO12 to the HI20. Here we just save
2373 the information we need; we do the actual relocation when we see the LO12.
2374 This code is copied from the elf32-mips.c. We also support an arbitrary
2375 number of HI20 relocs to be associated with a single LO12 reloc. The
2376 assembler sorts the relocs to ensure each HI20 immediately precedes its
2377 LO12. However if there are multiple copies, the assembler may not find
2378 the real LO12 so it picks the first one it finds. */
2379
2380 struct nds32_hi20
2381 {
2382 struct nds32_hi20 *next;
2383 bfd_byte *addr;
2384 bfd_vma addend;
2385 };
2386
2387 static struct nds32_hi20 *nds32_hi20_list;
2388
2389 static bfd_reloc_status_type
2390 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2391 asymbol *symbol, void *data, asection *input_section,
2392 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2393 {
2394 bfd_reloc_status_type ret;
2395 bfd_vma relocation;
2396 struct nds32_hi20 *n;
2397
2398 /* This part is from bfd_elf_generic_reloc.
2399 If we're relocating, and this an external symbol, we don't want
2400 to change anything. */
2401 if (output_bfd != (bfd *) NULL
2402 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2403 {
2404 reloc_entry->address += input_section->output_offset;
2405 return bfd_reloc_ok;
2406 }
2407
2408 /* Sanity check the address (offset in section). */
2409 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2410 return bfd_reloc_outofrange;
2411
2412 ret = bfd_reloc_ok;
2413 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2414 ret = bfd_reloc_undefined;
2415
2416 if (bfd_is_com_section (symbol->section))
2417 relocation = 0;
2418 else
2419 relocation = symbol->value;
2420
2421 relocation += symbol->section->output_section->vma;
2422 relocation += symbol->section->output_offset;
2423 relocation += reloc_entry->addend;
2424
2425 /* Save the information, and let LO12 do the actual relocation. */
2426 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2427 if (n == NULL)
2428 return bfd_reloc_outofrange;
2429
2430 n->addr = (bfd_byte *) data + reloc_entry->address;
2431 n->addend = relocation;
2432 n->next = nds32_hi20_list;
2433 nds32_hi20_list = n;
2434
2435 if (output_bfd != (bfd *) NULL)
2436 reloc_entry->address += input_section->output_offset;
2437
2438 return ret;
2439 }
2440
2441 /* Handle an NDS32 ELF HI20 reloc. */
2442
2443 static void
2444 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2445 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2446 Elf_Internal_Rela *rello, bfd_byte *contents,
2447 bfd_vma addend)
2448 {
2449 unsigned long insn;
2450 bfd_vma addlo;
2451
2452 insn = bfd_getb32 (contents + relhi->r_offset);
2453
2454 addlo = bfd_getb32 (contents + rello->r_offset);
2455 addlo &= 0xfff;
2456
2457 addend += ((insn & 0xfffff) << 20) + addlo;
2458
2459 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2460 bfd_putb32 (insn, contents + relhi->r_offset);
2461 }
2462
2463 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2464 inplace relocation; this function exists in order to do the
2465 R_NDS32_HI20_[SU]LO relocation described above. */
2466
2467 static bfd_reloc_status_type
2468 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2469 void *data, asection *input_section, bfd *output_bfd,
2470 char **error_message)
2471 {
2472 /* This part is from bfd_elf_generic_reloc.
2473 If we're relocating, and this an external symbol, we don't want
2474 to change anything. */
2475 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2476 && reloc_entry->addend == 0)
2477 {
2478 reloc_entry->address += input_section->output_offset;
2479 return bfd_reloc_ok;
2480 }
2481
2482 if (nds32_hi20_list != NULL)
2483 {
2484 struct nds32_hi20 *l;
2485
2486 l = nds32_hi20_list;
2487 while (l != NULL)
2488 {
2489 unsigned long insn;
2490 unsigned long val;
2491 unsigned long vallo;
2492 struct nds32_hi20 *next;
2493
2494 /* Do the HI20 relocation. Note that we actually don't need
2495 to know anything about the LO12 itself, except where to
2496 find the low 12 bits of the addend needed by the LO12. */
2497 insn = bfd_getb32 (l->addr);
2498 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2499 vallo &= 0xfff;
2500 switch (reloc_entry->howto->type)
2501 {
2502 case R_NDS32_LO12S3:
2503 vallo <<= 3;
2504 break;
2505
2506 case R_NDS32_LO12S2:
2507 vallo <<= 2;
2508 break;
2509
2510 case R_NDS32_LO12S1:
2511 vallo <<= 1;
2512 break;
2513
2514 case R_NDS32_LO12S0:
2515 vallo <<= 0;
2516 break;
2517 }
2518
2519 val = ((insn & 0xfffff) << 12) + vallo;
2520 val += l->addend;
2521
2522 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2523 bfd_putb32 ((bfd_vma) insn, l->addr);
2524
2525 next = l->next;
2526 free (l);
2527 l = next;
2528 }
2529
2530 nds32_hi20_list = NULL;
2531 }
2532
2533 /* Now do the LO12 reloc in the usual way.
2534 ??? It would be nice to call bfd_elf_generic_reloc here,
2535 but we have partial_inplace set. bfd_elf_generic_reloc will
2536 pass the handling back to bfd_install_relocation which will install
2537 a section relative addend which is wrong. */
2538 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2539 input_section, output_bfd, error_message);
2540 }
2541
2542 /* Do generic partial_inplace relocation.
2543 This is a local replacement for bfd_elf_generic_reloc. */
2544
2545 static bfd_reloc_status_type
2546 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2547 asymbol *symbol, void *data, asection *input_section,
2548 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2549 {
2550 bfd_reloc_status_type ret;
2551 bfd_vma relocation;
2552 bfd_byte *inplace_address;
2553
2554 /* This part is from bfd_elf_generic_reloc.
2555 If we're relocating, and this an external symbol, we don't want
2556 to change anything. */
2557 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2558 && reloc_entry->addend == 0)
2559 {
2560 reloc_entry->address += input_section->output_offset;
2561 return bfd_reloc_ok;
2562 }
2563
2564 /* Now do the reloc in the usual way.
2565 ??? It would be nice to call bfd_elf_generic_reloc here,
2566 but we have partial_inplace set. bfd_elf_generic_reloc will
2567 pass the handling back to bfd_install_relocation which will install
2568 a section relative addend which is wrong. */
2569
2570 /* Sanity check the address (offset in section). */
2571 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2572 return bfd_reloc_outofrange;
2573
2574 ret = bfd_reloc_ok;
2575 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2576 ret = bfd_reloc_undefined;
2577
2578 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2579 relocation = 0;
2580 else
2581 relocation = symbol->value;
2582
2583 /* Only do this for a final link. */
2584 if (output_bfd == (bfd *) NULL)
2585 {
2586 relocation += symbol->section->output_section->vma;
2587 relocation += symbol->section->output_offset;
2588 }
2589
2590 relocation += reloc_entry->addend;
2591 switch (reloc_entry->howto->type)
2592 {
2593 case R_NDS32_LO12S3:
2594 relocation >>= 3;
2595 break;
2596
2597 case R_NDS32_LO12S2:
2598 relocation >>= 2;
2599 break;
2600
2601 case R_NDS32_LO12S1:
2602 relocation >>= 1;
2603 break;
2604
2605 case R_NDS32_LO12S0:
2606 default:
2607 relocation >>= 0;
2608 break;
2609 }
2610
2611 inplace_address = (bfd_byte *) data + reloc_entry->address;
2612
2613 #define DOIT(x) \
2614 x = ((x & ~reloc_entry->howto->dst_mask) | \
2615 (((x & reloc_entry->howto->src_mask) + relocation) & \
2616 reloc_entry->howto->dst_mask))
2617
2618 switch (reloc_entry->howto->size)
2619 {
2620 case 1:
2621 {
2622 short x = bfd_getb16 (inplace_address);
2623
2624 DOIT (x);
2625 bfd_putb16 ((bfd_vma) x, inplace_address);
2626 }
2627 break;
2628 case 2:
2629 {
2630 unsigned long x = bfd_getb32 (inplace_address);
2631
2632 DOIT (x);
2633 bfd_putb32 ((bfd_vma) x, inplace_address);
2634 }
2635 break;
2636 default:
2637 BFD_ASSERT (0);
2638 }
2639
2640 if (output_bfd != (bfd *) NULL)
2641 reloc_entry->address += input_section->output_offset;
2642
2643 return ret;
2644 }
2645
2646 /* Handle the R_NDS32_SDA15 reloc.
2647 This reloc is used to compute the address of objects in the small data area
2648 and to perform loads and stores from that area.
2649 The lower 15 bits are sign extended and added to the register specified
2650 in the instruction, which is assumed to point to _SDA_BASE_.
2651
2652 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2653 the access size, this must be taken care of. */
2654
2655 static bfd_reloc_status_type
2656 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2657 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2658 asection *input_section, bfd *output_bfd,
2659 char **error_message ATTRIBUTE_UNUSED)
2660 {
2661 /* This part is from bfd_elf_generic_reloc. */
2662 if (output_bfd != (bfd *) NULL
2663 && (symbol->flags & BSF_SECTION_SYM) == 0
2664 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2665 {
2666 reloc_entry->address += input_section->output_offset;
2667 return bfd_reloc_ok;
2668 }
2669
2670 if (output_bfd != NULL)
2671 {
2672 /* FIXME: See bfd_perform_relocation. Is this right? */
2673 return bfd_reloc_continue;
2674 }
2675
2676 /* FIXME: not sure what to do here yet. But then again, the linker
2677 may never call us. */
2678 abort ();
2679 }
2680
2681 /* nds32_elf_ignore_reloc is the special function for
2682 relocation types which don't need to be relocated
2683 like relaxation relocation types.
2684 This function simply return bfd_reloc_ok when it is
2685 invoked. */
2686
2687 static bfd_reloc_status_type
2688 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2689 asymbol *symbol ATTRIBUTE_UNUSED,
2690 void *data ATTRIBUTE_UNUSED, asection *input_section,
2691 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2692 {
2693 if (output_bfd != NULL)
2694 reloc_entry->address += input_section->output_offset;
2695
2696 return bfd_reloc_ok;
2697 }
2698 \f
2699
2700 /* Map BFD reloc types to NDS32 ELF reloc types. */
2701
2702 struct nds32_reloc_map_entry
2703 {
2704 bfd_reloc_code_real_type bfd_reloc_val;
2705 unsigned char elf_reloc_val;
2706 };
2707
2708 static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2709 {
2710 {BFD_RELOC_NONE, R_NDS32_NONE},
2711 {BFD_RELOC_16, R_NDS32_16_RELA},
2712 {BFD_RELOC_32, R_NDS32_32_RELA},
2713 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2714 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2715 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2716 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2717 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2718 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2719 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2720 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2721 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2722 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2723 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2724 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2725 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2726 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2727 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2728 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2729 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2730 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2731 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2732 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2733
2734 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2735 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2736 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2737 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2738 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2739 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2740 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2741 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2742 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2743 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2744 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2745 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2746 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2747 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2748 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2749 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2750 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2751 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2752 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2753 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2754 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2755 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2756 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2757 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2758 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2759 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2760 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
2761 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2762 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2763 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2764 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2765 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2766 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2767 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
2768 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2769 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2770 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2771 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2772 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2773 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2774 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2775 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2776 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2777 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2778 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2779 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2780 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2781 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2782 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2783 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2784 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2785 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2786 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2787 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2788 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2789 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2790 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2791 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2792 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2793 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2794 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2795 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2796 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2797 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2798 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2799 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2800 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2801 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2802 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2803 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2804 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2805 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2806 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2807 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2808 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
2809
2810 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2811 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2812 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2813 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2814 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2815 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2816 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2817 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2818 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2819 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2820 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2821 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2822 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2823 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2824 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2825 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2826 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2827 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2828 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2829 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
2830 };
2831
2832 /* Patch tag. */
2833
2834 static reloc_howto_type *
2835 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2836 const char *r_name)
2837 {
2838 unsigned int i;
2839
2840 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2841 if (nds32_elf_howto_table[i].name != NULL
2842 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2843 return &nds32_elf_howto_table[i];
2844
2845 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2846 if (nds32_elf_relax_howto_table[i].name != NULL
2847 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2848 return &nds32_elf_relax_howto_table[i];
2849
2850 return NULL;
2851 }
2852
2853 static reloc_howto_type *
2854 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2855 {
2856 if (code < R_NDS32_RELAX_ENTRY)
2857 {
2858 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2859 return &nds32_elf_howto_table[code];
2860 }
2861 else
2862 {
2863 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2864 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2865 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2866 }
2867 }
2868
2869 static reloc_howto_type *
2870 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2871 bfd_reloc_code_real_type code)
2872 {
2873 unsigned int i;
2874
2875 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2876 {
2877 if (nds32_reloc_map[i].bfd_reloc_val == code)
2878 return bfd_elf32_bfd_reloc_type_table_lookup
2879 (nds32_reloc_map[i].elf_reloc_val);
2880 }
2881
2882 return NULL;
2883 }
2884
2885 /* Set the howto pointer for an NDS32 ELF reloc. */
2886
2887 static void
2888 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2889 Elf_Internal_Rela *dst)
2890 {
2891 enum elf_nds32_reloc_type r_type;
2892
2893 r_type = ELF32_R_TYPE (dst->r_info);
2894 if (r_type > R_NDS32_GNU_VTENTRY)
2895 {
2896 /* xgettext:c-format */
2897 _bfd_error_handler (_("%pB: invalid NDS32 reloc number: %d"), abfd, r_type);
2898 r_type = 0;
2899 }
2900 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2901 }
2902
2903 static void
2904 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2905 Elf_Internal_Rela *dst)
2906 {
2907 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2908 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2909 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2910 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2911 }
2912
2913 /* Support for core dump NOTE sections.
2914 Reference to include/linux/elfcore.h in Linux. */
2915
2916 static bfd_boolean
2917 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2918 {
2919 int offset;
2920 size_t size;
2921
2922 switch (note->descsz)
2923 {
2924 case 0x114:
2925 /* Linux/NDS32 32-bit, ABI1 */
2926
2927 /* pr_cursig */
2928 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2929
2930 /* pr_pid */
2931 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2932
2933 /* pr_reg */
2934 offset = 72;
2935 size = 200;
2936 break;
2937
2938 case 0xfc:
2939 /* Linux/NDS32 32-bit */
2940
2941 /* pr_cursig */
2942 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2943
2944 /* pr_pid */
2945 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2946
2947 /* pr_reg */
2948 offset = 72;
2949 size = 176;
2950 break;
2951
2952 default:
2953 return FALSE;
2954 }
2955
2956 /* Make a ".reg" section. */
2957 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2958 size, note->descpos + offset);
2959 }
2960
2961 static bfd_boolean
2962 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2963 {
2964 switch (note->descsz)
2965 {
2966 case 124:
2967 /* Linux/NDS32 */
2968
2969 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
2970 elf_tdata (abfd)->core->program =
2971 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2972 elf_tdata (abfd)->core->command =
2973 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2974 break;
2975
2976 default:
2977 return FALSE;
2978 }
2979
2980 /* Note that for some reason, a spurious space is tacked
2981 onto the end of the args in some (at least one anyway)
2982 implementations, so strip it off if it exists. */
2983 {
2984 char *command = elf_tdata (abfd)->core->command;
2985 int n = strlen (command);
2986
2987 if (0 < n && command[n - 1] == ' ')
2988 command[n - 1] = '\0';
2989 }
2990
2991 return TRUE;
2992 }
2993
2994 /* Hook called by the linker routine which adds symbols from an object
2995 file. We must handle the special NDS32 section numbers here.
2996 We also keep watching for whether we need to create the sdata special
2997 linker sections. */
2998
2999 static bfd_boolean
3000 nds32_elf_add_symbol_hook (bfd *abfd,
3001 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3002 Elf_Internal_Sym *sym,
3003 const char **namep ATTRIBUTE_UNUSED,
3004 flagword *flagsp ATTRIBUTE_UNUSED,
3005 asection **secp, bfd_vma *valp)
3006 {
3007 switch (sym->st_shndx)
3008 {
3009 case SHN_COMMON:
3010 /* Common symbols less than the GP size are automatically
3011 treated as SHN_MIPS_SCOMMON symbols. */
3012 if (sym->st_size > elf_gp_size (abfd)
3013 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3014 break;
3015
3016 /* st_value is the alignemnt constraint.
3017 That might be its actual size if it is an array or structure. */
3018 switch (sym->st_value)
3019 {
3020 case 1:
3021 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3022 break;
3023 case 2:
3024 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3025 break;
3026 case 4:
3027 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3028 break;
3029 case 8:
3030 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3031 break;
3032 default:
3033 return TRUE;
3034 }
3035
3036 (*secp)->flags |= SEC_IS_COMMON;
3037 *valp = sym->st_size;
3038 break;
3039 }
3040
3041 return TRUE;
3042 }
3043
3044
3045 /* This function can figure out the best location for a base register to access
3046 data relative to this base register
3047 INPUT:
3048 sda_d0: size of first DOUBLE WORD data section
3049 sda_w0: size of first WORD data section
3050 sda_h0: size of first HALF WORD data section
3051 sda_b : size of BYTE data section
3052 sda_hi: size of second HALF WORD data section
3053 sda_w1: size of second WORD data section
3054 sda_d1: size of second DOUBLE WORD data section
3055 OUTPUT:
3056 offset (always positive) from the beginning of sda_d0 if OK
3057 a negative error value if fail
3058 NOTE:
3059 these 7 sections have to be located back to back if exist
3060 a pass in 0 value for non-existing section */
3061
3062 /* Due to the interpretation of simm15 field of load/store depending on
3063 data accessing size, the organization of base register relative data shall
3064 like the following figure
3065 -------------------------------------------
3066 | DOUBLE WORD sized data (range +/- 128K)
3067 -------------------------------------------
3068 | WORD sized data (range +/- 64K)
3069 -------------------------------------------
3070 | HALF WORD sized data (range +/- 32K)
3071 -------------------------------------------
3072 | BYTE sized data (range +/- 16K)
3073 -------------------------------------------
3074 | HALF WORD sized data (range +/- 32K)
3075 -------------------------------------------
3076 | WORD sized data (range +/- 64K)
3077 -------------------------------------------
3078 | DOUBLE WORD sized data (range +/- 128K)
3079 -------------------------------------------
3080 Its base register shall be set to access these data freely. */
3081
3082 /* We have to figure out the SDA_BASE value, so that we can adjust the
3083 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3084 BFD. If we can't find it, we're stuck. We cache it in the ELF
3085 target data. We don't need to adjust the symbol value for an
3086 external symbol if we are producing relocatable output. */
3087
3088 static asection *sda_rela_sec = NULL;
3089
3090 #define SDA_SECTION_NUM 10
3091
3092 static bfd_reloc_status_type
3093 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3094 bfd_vma *psb, bfd_boolean add_symbol)
3095 {
3096 int relax_fp_as_gp;
3097 struct elf_nds32_link_hash_table *table;
3098 struct bfd_link_hash_entry *h, *h2;
3099 long unsigned int total = 0;
3100
3101 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3102 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3103 {
3104 asection *first = NULL, *final = NULL, *temp;
3105 bfd_vma sda_base;
3106 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3107 4 byte-aligned. Therefore, it has to set the first section ".data"
3108 4 byte-aligned. */
3109 static const char sec_name[SDA_SECTION_NUM][10] =
3110 {
3111 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
3112 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
3113 };
3114 size_t i = 0;
3115
3116 if (output_bfd->sections == NULL)
3117 {
3118 *psb = elf_gp (output_bfd);
3119 return bfd_reloc_ok;
3120 }
3121
3122 /* Get the first and final section. */
3123 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3124 {
3125 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3126 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3127 first = temp;
3128 if (temp && (temp->size != 0 || temp->rawsize != 0))
3129 final = temp;
3130
3131 /* Summarize the sections in order to check if joining .bss. */
3132 if (temp && temp->size != 0)
3133 total += temp->size;
3134 else if (temp && temp->rawsize != 0)
3135 total += temp->rawsize;
3136
3137 i++;
3138 }
3139
3140 /* Check .bss size. */
3141 temp = bfd_get_section_by_name (output_bfd, ".bss");
3142 if (temp)
3143 {
3144 if (temp->size != 0)
3145 total += temp->size;
3146 else if (temp->rawsize != 0)
3147 total += temp->rawsize;
3148
3149 if (total < 0x80000)
3150 {
3151 if (!first && (temp->size != 0 || temp->rawsize != 0))
3152 first = temp;
3153 if ((temp->size != 0 || temp->rawsize != 0))
3154 final = temp;
3155 }
3156 }
3157
3158 if (first && final)
3159 {
3160 /* The middle of data region. */
3161 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3162
3163 /* Find the section sda_base located. */
3164 i = 0;
3165 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3166 {
3167 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3168 if (final && (final->size != 0 || final->rawsize != 0)
3169 && sda_base >= final->vma)
3170 {
3171 first = final;
3172 i++;
3173 }
3174 else
3175 break;
3176 }
3177 }
3178 else
3179 {
3180 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3181 first output section. */
3182 first = output_bfd->sections;
3183 while (first && first->size == 0 && first->rawsize == 0)
3184 first = first->next;
3185 if (!first)
3186 {
3187 *psb = elf_gp (output_bfd);
3188 return bfd_reloc_ok;
3189 }
3190 sda_base = first->vma + first->rawsize;
3191 }
3192
3193 sda_base -= first->vma;
3194 sda_base = sda_base & (~7);
3195
3196 if (!_bfd_generic_link_add_one_symbol
3197 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3198 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3199 get_elf_backend_data (output_bfd)->collect, &h))
3200 return FALSE;
3201
3202 sda_rela_sec = first;
3203
3204 table = nds32_elf_hash_table (info);
3205 relax_fp_as_gp = table->relax_fp_as_gp;
3206 if (relax_fp_as_gp)
3207 {
3208 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3209 FALSE, FALSE, FALSE);
3210 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3211 And set FP equal to SDA_BASE to do relaxation for
3212 la $fp, _FP_BASE_. */
3213 if (!_bfd_generic_link_add_one_symbol
3214 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3215 first, (bfd_vma) sda_base, (const char *) NULL,
3216 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3217 return FALSE;
3218 }
3219 }
3220
3221 if (add_symbol)
3222 {
3223 if (h)
3224 {
3225 /* Now set gp. */
3226 elf_gp (output_bfd) = (h->u.def.value
3227 + h->u.def.section->output_section->vma
3228 + h->u.def.section->output_offset);
3229 }
3230 else
3231 {
3232 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
3233 return bfd_reloc_dangerous;
3234 }
3235 }
3236
3237 *psb = h->u.def.value + h->u.def.section->output_section->vma
3238 + h->u.def.section->output_offset;
3239 return bfd_reloc_ok;
3240 }
3241 \f
3242
3243 /* Return size of a PLT entry. */
3244 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3245
3246
3247 /* Create an entry in an nds32 ELF linker hash table. */
3248
3249 static struct bfd_hash_entry *
3250 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3251 struct bfd_hash_table *table,
3252 const char *string)
3253 {
3254 struct elf_nds32_link_hash_entry *ret;
3255
3256 ret = (struct elf_nds32_link_hash_entry *) entry;
3257
3258 /* Allocate the structure if it has not already been allocated by a
3259 subclass. */
3260 if (ret == NULL)
3261 ret = (struct elf_nds32_link_hash_entry *)
3262 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3263
3264 if (ret == NULL)
3265 return (struct bfd_hash_entry *) ret;
3266
3267 /* Call the allocation method of the superclass. */
3268 ret = (struct elf_nds32_link_hash_entry *)
3269 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3270
3271 if (ret != NULL)
3272 {
3273 struct elf_nds32_link_hash_entry *eh;
3274
3275 eh = (struct elf_nds32_link_hash_entry *) ret;
3276 eh->dyn_relocs = NULL;
3277 eh->tls_type = GOT_UNKNOWN;
3278 }
3279
3280 return (struct bfd_hash_entry *) ret;
3281 }
3282
3283 /* Create an nds32 ELF linker hash table. */
3284
3285 static struct bfd_link_hash_table *
3286 nds32_elf_link_hash_table_create (bfd *abfd)
3287 {
3288 struct elf_nds32_link_hash_table *ret;
3289
3290 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3291
3292 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3293 if (ret == NULL)
3294 return NULL;
3295
3296 /* patch tag. */
3297 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3298 nds32_elf_link_hash_newfunc,
3299 sizeof (struct elf_nds32_link_hash_entry),
3300 NDS32_ELF_DATA))
3301 {
3302 free (ret);
3303 return NULL;
3304 }
3305
3306 return &ret->root.root;
3307 }
3308
3309 /* Create dynamic sections when linking against a dynamic object. */
3310
3311 static bfd_boolean
3312 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3313 {
3314 struct elf_nds32_link_hash_table *htab;
3315 flagword flags, pltflags;
3316 register asection *s;
3317 const struct elf_backend_data *bed;
3318 int ptralign = 2; /* 32-bit */
3319
3320 bed = get_elf_backend_data (abfd);
3321
3322 htab = nds32_elf_hash_table (info);
3323
3324 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3325 .rel[a].bss sections. */
3326
3327 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3328 | SEC_LINKER_CREATED);
3329
3330 pltflags = flags;
3331 pltflags |= SEC_CODE;
3332 if (bed->plt_not_loaded)
3333 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3334 if (bed->plt_readonly)
3335 pltflags |= SEC_READONLY;
3336
3337 s = bfd_make_section (abfd, ".plt");
3338 htab->root.splt = s;
3339 if (s == NULL
3340 || !bfd_set_section_flags (abfd, s, pltflags)
3341 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3342 return FALSE;
3343
3344 if (bed->want_plt_sym)
3345 {
3346 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3347 .plt section. */
3348 struct bfd_link_hash_entry *bh = NULL;
3349 struct elf_link_hash_entry *h;
3350
3351 if (!(_bfd_generic_link_add_one_symbol
3352 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3353 (bfd_vma) 0, (const char *) NULL, FALSE,
3354 get_elf_backend_data (abfd)->collect, &bh)))
3355 return FALSE;
3356
3357 h = (struct elf_link_hash_entry *) bh;
3358 h->def_regular = 1;
3359 h->type = STT_OBJECT;
3360
3361 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
3362 return FALSE;
3363 }
3364
3365 s = bfd_make_section (abfd,
3366 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3367 htab->root.srelplt = s;
3368 if (s == NULL
3369 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3370 || !bfd_set_section_alignment (abfd, s, ptralign))
3371 return FALSE;
3372
3373 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
3374 return FALSE;
3375
3376 {
3377 const char *secname;
3378 char *relname;
3379 flagword secflags;
3380 asection *sec;
3381
3382 for (sec = abfd->sections; sec; sec = sec->next)
3383 {
3384 secflags = bfd_get_section_flags (abfd, sec);
3385 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3386 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3387 continue;
3388 secname = bfd_get_section_name (abfd, sec);
3389 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3390 strcpy (relname, ".rela");
3391 strcat (relname, secname);
3392 if (bfd_get_section_by_name (abfd, secname))
3393 continue;
3394 s = bfd_make_section (abfd, relname);
3395 if (s == NULL
3396 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3397 || !bfd_set_section_alignment (abfd, s, ptralign))
3398 return FALSE;
3399 }
3400 }
3401
3402 if (bed->want_dynbss)
3403 {
3404 /* The .dynbss section is a place to put symbols which are defined
3405 by dynamic objects, are referenced by regular objects, and are
3406 not functions. We must allocate space for them in the process
3407 image and use a R_*_COPY reloc to tell the dynamic linker to
3408 initialize them at run time. The linker script puts the .dynbss
3409 section into the .bss section of the final image. */
3410 s = bfd_make_section (abfd, ".dynbss");
3411 htab->sdynbss = s;
3412 if (s == NULL
3413 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3414 return FALSE;
3415 /* The .rel[a].bss section holds copy relocs. This section is not
3416 normally needed. We need to create it here, though, so that the
3417 linker will map it to an output section. We can't just create it
3418 only if we need it, because we will not know whether we need it
3419 until we have seen all the input files, and the first time the
3420 main linker code calls BFD after examining all the input files
3421 (size_dynamic_sections) the input sections have already been
3422 mapped to the output sections. If the section turns out not to
3423 be needed, we can discard it later. We will never need this
3424 section when generating a shared object, since they do not use
3425 copy relocs. */
3426 if (!bfd_link_pic (info))
3427 {
3428 s = bfd_make_section (abfd, (bed->default_use_rela_p
3429 ? ".rela.bss" : ".rel.bss"));
3430 htab->srelbss = s;
3431 if (s == NULL
3432 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3433 || !bfd_set_section_alignment (abfd, s, ptralign))
3434 return FALSE;
3435 }
3436 }
3437
3438 return TRUE;
3439 }
3440
3441 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3442 static void
3443 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3444 struct elf_link_hash_entry *dir,
3445 struct elf_link_hash_entry *ind)
3446 {
3447 struct elf_nds32_link_hash_entry *edir, *eind;
3448
3449 edir = (struct elf_nds32_link_hash_entry *) dir;
3450 eind = (struct elf_nds32_link_hash_entry *) ind;
3451
3452 if (eind->dyn_relocs != NULL)
3453 {
3454 if (edir->dyn_relocs != NULL)
3455 {
3456 struct elf_dyn_relocs **pp;
3457 struct elf_dyn_relocs *p;
3458
3459 if (ind->root.type == bfd_link_hash_indirect)
3460 abort ();
3461
3462 /* Add reloc counts against the weak sym to the strong sym
3463 list. Merge any entries against the same section. */
3464 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3465 {
3466 struct elf_dyn_relocs *q;
3467
3468 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3469 if (q->sec == p->sec)
3470 {
3471 q->pc_count += p->pc_count;
3472 q->count += p->count;
3473 *pp = p->next;
3474 break;
3475 }
3476 if (q == NULL)
3477 pp = &p->next;
3478 }
3479 *pp = edir->dyn_relocs;
3480 }
3481
3482 edir->dyn_relocs = eind->dyn_relocs;
3483 eind->dyn_relocs = NULL;
3484 }
3485
3486 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3487 }
3488 \f
3489 /* Find dynamic relocs for H that apply to read-only sections. */
3490
3491 static asection *
3492 readonly_dynrelocs (struct elf_link_hash_entry *h)
3493 {
3494 struct elf_dyn_relocs *p;
3495
3496 for (p = elf32_nds32_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
3497 {
3498 asection *s = p->sec->output_section;
3499
3500 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3501 return p->sec;
3502 }
3503 return NULL;
3504 }
3505
3506 /* Adjust a symbol defined by a dynamic object and referenced by a
3507 regular object. The current definition is in some section of the
3508 dynamic object, but we're not including those sections. We have to
3509 change the definition to something the rest of the link can
3510 understand. */
3511
3512 static bfd_boolean
3513 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3514 struct elf_link_hash_entry *h)
3515 {
3516 struct elf_nds32_link_hash_table *htab;
3517 bfd *dynobj;
3518 asection *s;
3519 unsigned int power_of_two;
3520
3521 dynobj = elf_hash_table (info)->dynobj;
3522
3523 /* Make sure we know what is going on here. */
3524 BFD_ASSERT (dynobj != NULL
3525 && (h->needs_plt
3526 || h->is_weakalias
3527 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3528
3529
3530 /* If this is a function, put it in the procedure linkage table. We
3531 will fill in the contents of the procedure linkage table later,
3532 when we know the address of the .got section. */
3533 if (h->type == STT_FUNC || h->needs_plt)
3534 {
3535 if (!bfd_link_pic (info)
3536 && !h->def_dynamic
3537 && !h->ref_dynamic
3538 && h->root.type != bfd_link_hash_undefweak
3539 && h->root.type != bfd_link_hash_undefined)
3540 {
3541 /* This case can occur if we saw a PLT reloc in an input
3542 file, but the symbol was never referred to by a dynamic
3543 object. In such a case, we don't actually need to build
3544 a procedure linkage table, and we can just do a PCREL
3545 reloc instead. */
3546 h->plt.offset = (bfd_vma) - 1;
3547 h->needs_plt = 0;
3548 }
3549
3550 return TRUE;
3551 }
3552 else
3553 h->plt.offset = (bfd_vma) - 1;
3554
3555 /* If this is a weak symbol, and there is a real definition, the
3556 processor independent code will have arranged for us to see the
3557 real definition first, and we can just use the same value. */
3558 if (h->is_weakalias)
3559 {
3560 struct elf_link_hash_entry *def = weakdef (h);
3561 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3562 h->root.u.def.section = def->root.u.def.section;
3563 h->root.u.def.value = def->root.u.def.value;
3564 return TRUE;
3565 }
3566
3567 /* This is a reference to a symbol defined by a dynamic object which
3568 is not a function. */
3569
3570 /* If we are creating a shared library, we must presume that the
3571 only references to the symbol are via the global offset table.
3572 For such cases we need not do anything here; the relocations will
3573 be handled correctly by relocate_section. */
3574 if (bfd_link_pic (info))
3575 return TRUE;
3576
3577 /* If there are no references to this symbol that do not use the
3578 GOT, we don't need to generate a copy reloc. */
3579 if (!h->non_got_ref)
3580 return TRUE;
3581
3582 /* If -z nocopyreloc was given, we won't generate them either. */
3583 if (0 && info->nocopyreloc)
3584 {
3585 h->non_got_ref = 0;
3586 return TRUE;
3587 }
3588
3589 /* If we don't find any dynamic relocs in read-only sections, then
3590 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
3591 if (0 && !readonly_dynrelocs (h))
3592 {
3593 h->non_got_ref = 0;
3594 return TRUE;
3595 }
3596
3597 /* We must allocate the symbol in our .dynbss section, which will
3598 become part of the .bss section of the executable. There will be
3599 an entry for this symbol in the .dynsym section. The dynamic
3600 object will contain position independent code, so all references
3601 from the dynamic object to this symbol will go through the global
3602 offset table. The dynamic linker will use the .dynsym entry to
3603 determine the address it must put in the global offset table, so
3604 both the dynamic object and the regular object will refer to the
3605 same memory location for the variable. */
3606
3607 htab = nds32_elf_hash_table (info);
3608 s = htab->sdynbss;
3609 BFD_ASSERT (s != NULL);
3610
3611 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3612 to copy the initial value out of the dynamic object and into the
3613 runtime process image. We need to remember the offset into the
3614 .rela.bss section we are going to use. */
3615 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3616 {
3617 asection *srel;
3618
3619 srel = htab->srelbss;
3620 BFD_ASSERT (srel != NULL);
3621 srel->size += sizeof (Elf32_External_Rela);
3622 h->needs_copy = 1;
3623 }
3624
3625 /* We need to figure out the alignment required for this symbol. I
3626 have no idea how ELF linkers handle this. */
3627 power_of_two = bfd_log2 (h->size);
3628 if (power_of_two > 3)
3629 power_of_two = 3;
3630
3631 /* Apply the required alignment. */
3632 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3633 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3634 {
3635 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3636 return FALSE;
3637 }
3638
3639 /* Define the symbol as being at this point in the section. */
3640 h->root.u.def.section = s;
3641 h->root.u.def.value = s->size;
3642
3643 /* Increment the section size to make room for the symbol. */
3644 s->size += h->size;
3645
3646 return TRUE;
3647 }
3648
3649 /* Allocate space in .plt, .got and associated reloc sections for
3650 dynamic relocs. */
3651
3652 static bfd_boolean
3653 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3654 {
3655 struct bfd_link_info *info;
3656 struct elf_nds32_link_hash_table *htab;
3657 struct elf_nds32_link_hash_entry *eh;
3658 struct elf_dyn_relocs *p;
3659
3660 if (h->root.type == bfd_link_hash_indirect)
3661 return TRUE;
3662
3663 if (h->root.type == bfd_link_hash_warning)
3664 /* When warning symbols are created, they **replace** the "real"
3665 entry in the hash table, thus we never get to see the real
3666 symbol in a hash traversal. So look at it now. */
3667 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3668
3669 info = (struct bfd_link_info *) inf;
3670 htab = nds32_elf_hash_table (info);
3671
3672 eh = (struct elf_nds32_link_hash_entry *) h;
3673
3674 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3675 {
3676 /* Make sure this symbol is output as a dynamic symbol.
3677 Undefined weak syms won't yet be marked as dynamic. */
3678 if (h->dynindx == -1 && !h->forced_local)
3679 {
3680 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3681 return FALSE;
3682 }
3683
3684 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
3685 {
3686 asection *s = htab->root.splt;
3687
3688 /* If this is the first .plt entry, make room for the special
3689 first entry. */
3690 if (s->size == 0)
3691 s->size += PLT_ENTRY_SIZE;
3692
3693 h->plt.offset = s->size;
3694
3695 /* If this symbol is not defined in a regular file, and we are
3696 not generating a shared library, then set the symbol to this
3697 location in the .plt. This is required to make function
3698 pointers compare as equal between the normal executable and
3699 the shared library. */
3700 if (!bfd_link_pic (info) && !h->def_regular)
3701 {
3702 h->root.u.def.section = s;
3703 h->root.u.def.value = h->plt.offset;
3704 }
3705
3706 /* Make room for this entry. */
3707 s->size += PLT_ENTRY_SIZE;
3708
3709 /* We also need to make an entry in the .got.plt section, which
3710 will be placed in the .got section by the linker script. */
3711 htab->root.sgotplt->size += 4;
3712
3713 /* We also need to make an entry in the .rel.plt section. */
3714 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
3715 }
3716 else
3717 {
3718 h->plt.offset = (bfd_vma) - 1;
3719 h->needs_plt = 0;
3720 }
3721 }
3722 else
3723 {
3724 h->plt.offset = (bfd_vma) - 1;
3725 h->needs_plt = 0;
3726 }
3727
3728 if (h->got.refcount > 0)
3729 {
3730 asection *s;
3731 bfd_boolean dyn;
3732 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
3733
3734 /* Make sure this symbol is output as a dynamic symbol.
3735 Undefined weak syms won't yet be marked as dynamic. */
3736 if (h->dynindx == -1 && !h->forced_local)
3737 {
3738 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3739 return FALSE;
3740 }
3741
3742 s = htab->root.sgot;
3743 h->got.offset = s->size;
3744
3745 if (tls_type == GOT_UNKNOWN)
3746 abort ();
3747 else if (tls_type == GOT_NORMAL
3748 || tls_type == GOT_TLS_IE)
3749 /* Need a GOT slot. */
3750 s->size += 4;
3751
3752 dyn = htab->root.dynamic_sections_created;
3753 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
3754 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
3755 }
3756 else
3757 h->got.offset = (bfd_vma) - 1;
3758
3759 if (eh->dyn_relocs == NULL)
3760 return TRUE;
3761
3762 /* In the shared -Bsymbolic case, discard space allocated for
3763 dynamic pc-relative relocs against symbols which turn out to be
3764 defined in regular objects. For the normal shared case, discard
3765 space for pc-relative relocs that have become local due to symbol
3766 visibility changes. */
3767
3768 if (bfd_link_pic (info))
3769 {
3770 if (h->def_regular && (h->forced_local || info->symbolic))
3771 {
3772 struct elf_dyn_relocs **pp;
3773
3774 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3775 {
3776 p->count -= p->pc_count;
3777 p->pc_count = 0;
3778 if (p->count == 0)
3779 *pp = p->next;
3780 else
3781 pp = &p->next;
3782 }
3783 }
3784 }
3785 else
3786 {
3787 /* For the non-shared case, discard space for relocs against
3788 symbols which turn out to need copy relocs or are not dynamic. */
3789
3790 if (!h->non_got_ref
3791 && ((h->def_dynamic
3792 && !h->def_regular)
3793 || (htab->root.dynamic_sections_created
3794 && (h->root.type == bfd_link_hash_undefweak
3795 || h->root.type == bfd_link_hash_undefined))))
3796 {
3797 /* Make sure this symbol is output as a dynamic symbol.
3798 Undefined weak syms won't yet be marked as dynamic. */
3799 if (h->dynindx == -1 && !h->forced_local)
3800 {
3801 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3802 return FALSE;
3803 }
3804
3805 /* If that succeeded, we know we'll be keeping all the
3806 relocs. */
3807 if (h->dynindx != -1)
3808 goto keep;
3809 }
3810
3811 eh->dyn_relocs = NULL;
3812
3813 keep:;
3814 }
3815
3816 /* Finally, allocate space. */
3817 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3818 {
3819 asection *sreloc = elf_section_data (p->sec)->sreloc;
3820 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3821 }
3822
3823 return TRUE;
3824 }
3825
3826 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
3827 read-only sections. */
3828
3829 static bfd_boolean
3830 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
3831 {
3832 asection *sec;
3833
3834 if (h->root.type == bfd_link_hash_indirect)
3835 return TRUE;
3836
3837 sec = readonly_dynrelocs (h);
3838 if (sec != NULL)
3839 {
3840 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
3841
3842 info->flags |= DF_TEXTREL;
3843 info->callbacks->minfo
3844 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
3845 sec->owner, h->root.root.string, sec);
3846
3847 /* Not an error, just cut short the traversal. */
3848 return FALSE;
3849 }
3850 return TRUE;
3851 }
3852
3853 /* Set the sizes of the dynamic sections. */
3854
3855 static bfd_boolean
3856 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3857 struct bfd_link_info *info)
3858 {
3859 struct elf_nds32_link_hash_table *htab;
3860 bfd *dynobj;
3861 asection *s;
3862 bfd_boolean relocs;
3863 bfd *ibfd;
3864
3865 htab = nds32_elf_hash_table (info);
3866 dynobj = htab->root.dynobj;
3867 BFD_ASSERT (dynobj != NULL);
3868
3869 if (htab->root.dynamic_sections_created)
3870 {
3871 /* Set the contents of the .interp section to the interpreter. */
3872 if (bfd_link_executable (info) && !info->nointerp)
3873 {
3874 s = bfd_get_section_by_name (dynobj, ".interp");
3875 BFD_ASSERT (s != NULL);
3876 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3877 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3878 }
3879 }
3880
3881 /* Set up .got offsets for local syms, and space for local dynamic
3882 relocs. */
3883 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
3884 {
3885 bfd_signed_vma *local_got;
3886 bfd_signed_vma *end_local_got;
3887 bfd_size_type locsymcount;
3888 Elf_Internal_Shdr *symtab_hdr;
3889 asection *srel;
3890
3891 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3892 continue;
3893
3894 for (s = ibfd->sections; s != NULL; s = s->next)
3895 {
3896 struct elf_dyn_relocs *p;
3897
3898 for (p = ((struct elf_dyn_relocs *)
3899 elf_section_data (s)->local_dynrel);
3900 p != NULL; p = p->next)
3901 {
3902 if (!bfd_is_abs_section (p->sec)
3903 && bfd_is_abs_section (p->sec->output_section))
3904 {
3905 /* Input section has been discarded, either because
3906 it is a copy of a linkonce section or due to
3907 linker script /DISCARD/, so we'll be discarding
3908 the relocs too. */
3909 }
3910 else if (p->count != 0)
3911 {
3912 srel = elf_section_data (p->sec)->sreloc;
3913 srel->size += p->count * sizeof (Elf32_External_Rela);
3914 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3915 info->flags |= DF_TEXTREL;
3916 }
3917 }
3918 }
3919
3920 local_got = elf_local_got_refcounts (ibfd);
3921 if (!local_got)
3922 continue;
3923
3924 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3925 locsymcount = symtab_hdr->sh_info;
3926 end_local_got = local_got + locsymcount;
3927 s = htab->root.sgot;
3928 srel = htab->root.srelgot;
3929 for (; local_got < end_local_got; ++local_got)
3930 {
3931 if (*local_got > 0)
3932 {
3933 *local_got = s->size;
3934 s->size += 4;
3935 if (bfd_link_pic (info))
3936 srel->size += sizeof (Elf32_External_Rela);
3937 }
3938 else
3939 *local_got = (bfd_vma) - 1;
3940 }
3941 }
3942
3943 /* Allocate global sym .plt and .got entries, and space for global
3944 sym dynamic relocs. */
3945 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3946
3947 /* We now have determined the sizes of the various dynamic sections.
3948 Allocate memory for them. */
3949 relocs = FALSE;
3950 for (s = dynobj->sections; s != NULL; s = s->next)
3951 {
3952 if ((s->flags & SEC_LINKER_CREATED) == 0)
3953 continue;
3954
3955 if (s == htab->root.splt)
3956 {
3957 /* Strip this section if we don't need it; see the
3958 comment below. */
3959 }
3960 else if (s == htab->root.sgot)
3961 {
3962 got_size += s->size;
3963 }
3964 else if (s == htab->root.sgotplt)
3965 {
3966 got_size += s->size;
3967 }
3968 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3969 {
3970 if (s->size != 0 && s != htab->root.srelplt)
3971 relocs = TRUE;
3972
3973 /* We use the reloc_count field as a counter if we need
3974 to copy relocs into the output file. */
3975 s->reloc_count = 0;
3976 }
3977 else
3978 {
3979 /* It's not one of our sections, so don't allocate space. */
3980 continue;
3981 }
3982
3983 if (s->size == 0)
3984 {
3985 /* If we don't need this section, strip it from the
3986 output file. This is mostly to handle .rela.bss and
3987 .rela.plt. We must create both sections in
3988 create_dynamic_sections, because they must be created
3989 before the linker maps input sections to output
3990 sections. The linker does that before
3991 adjust_dynamic_symbol is called, and it is that
3992 function which decides whether anything needs to go
3993 into these sections. */
3994 s->flags |= SEC_EXCLUDE;
3995 continue;
3996 }
3997
3998 /* Allocate memory for the section contents. We use bfd_zalloc
3999 here in case unused entries are not reclaimed before the
4000 section's contents are written out. This should not happen,
4001 but this way if it does, we get a R_NDS32_NONE reloc instead
4002 of garbage. */
4003 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4004 if (s->contents == NULL)
4005 return FALSE;
4006 }
4007
4008
4009 if (htab->root.dynamic_sections_created)
4010 {
4011 /* Add some entries to the .dynamic section. We fill in the
4012 values later, in nds32_elf_finish_dynamic_sections, but we
4013 must add the entries now so that we get the correct size for
4014 the .dynamic section. The DT_DEBUG entry is filled in by the
4015 dynamic linker and used by the debugger. */
4016 #define add_dynamic_entry(TAG, VAL) \
4017 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4018
4019 if (!bfd_link_pic (info))
4020 {
4021 if (!add_dynamic_entry (DT_DEBUG, 0))
4022 return FALSE;
4023 }
4024
4025 if (htab->root.splt->size != 0)
4026 {
4027 if (!add_dynamic_entry (DT_PLTGOT, 0)
4028 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4029 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4030 || !add_dynamic_entry (DT_JMPREL, 0))
4031 return FALSE;
4032 }
4033
4034 if (relocs)
4035 {
4036 if (!add_dynamic_entry (DT_RELA, 0)
4037 || !add_dynamic_entry (DT_RELASZ, 0)
4038 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4039 return FALSE;
4040
4041 /* If any dynamic relocs apply to a read-only section,
4042 then we need a DT_TEXTREL entry. */
4043 if ((info->flags & DF_TEXTREL) == 0)
4044 elf_link_hash_traverse (&htab->root, maybe_set_textrel,
4045 (void *) info);
4046
4047 if ((info->flags & DF_TEXTREL) != 0)
4048 {
4049 if (!add_dynamic_entry (DT_TEXTREL, 0))
4050 return FALSE;
4051 }
4052 }
4053 }
4054 #undef add_dynamic_entry
4055
4056 return TRUE;
4057 }
4058
4059 static bfd_reloc_status_type
4060 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4061 bfd_vma relocation, bfd_byte *location)
4062 {
4063 int size;
4064 bfd_vma x = 0;
4065 bfd_reloc_status_type flag;
4066 unsigned int rightshift = howto->rightshift;
4067 unsigned int bitpos = howto->bitpos;
4068
4069 /* If the size is negative, negate RELOCATION. This isn't very
4070 general. */
4071 if (howto->size < 0)
4072 relocation = -relocation;
4073
4074 /* Get the value we are going to relocate. */
4075 size = bfd_get_reloc_size (howto);
4076 switch (size)
4077 {
4078 default:
4079 abort ();
4080 break;
4081 case 0:
4082 return bfd_reloc_ok;
4083 case 2:
4084 x = bfd_getb16 (location);
4085 break;
4086 case 4:
4087 x = bfd_getb32 (location);
4088 break;
4089 }
4090
4091 /* Check for overflow. FIXME: We may drop bits during the addition
4092 which we don't check for. We must either check at every single
4093 operation, which would be tedious, or we must do the computations
4094 in a type larger than bfd_vma, which would be inefficient. */
4095 flag = bfd_reloc_ok;
4096 if (howto->complain_on_overflow != complain_overflow_dont)
4097 {
4098 bfd_vma addrmask, fieldmask, signmask, ss;
4099 bfd_vma a, b, sum;
4100
4101 /* Get the values to be added together. For signed and unsigned
4102 relocations, we assume that all values should be truncated to
4103 the size of an address. For bitfields, all the bits matter.
4104 See also bfd_check_overflow. */
4105 fieldmask = N_ONES (howto->bitsize);
4106 signmask = ~fieldmask;
4107 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4108 a = (relocation & addrmask) >> rightshift;
4109 b = (x & howto->src_mask & addrmask) >> bitpos;
4110
4111 switch (howto->complain_on_overflow)
4112 {
4113 case complain_overflow_signed:
4114 /* If any sign bits are set, all sign bits must be set.
4115 That is, A must be a valid negative address after
4116 shifting. */
4117 signmask = ~(fieldmask >> 1);
4118 /* Fall through. */
4119
4120 case complain_overflow_bitfield:
4121 /* Much like the signed check, but for a field one bit
4122 wider. We allow a bitfield to represent numbers in the
4123 range -2**n to 2**n-1, where n is the number of bits in the
4124 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4125 can't overflow, which is exactly what we want. */
4126 ss = a & signmask;
4127 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4128 flag = bfd_reloc_overflow;
4129
4130 /* We only need this next bit of code if the sign bit of B
4131 is below the sign bit of A. This would only happen if
4132 SRC_MASK had fewer bits than BITSIZE. Note that if
4133 SRC_MASK has more bits than BITSIZE, we can get into
4134 trouble; we would need to verify that B is in range, as
4135 we do for A above. */
4136 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4137 ss >>= bitpos;
4138
4139 /* Set all the bits above the sign bit. */
4140 b = (b ^ ss) - ss;
4141
4142 /* Now we can do the addition. */
4143 sum = a + b;
4144
4145 /* See if the result has the correct sign. Bits above the
4146 sign bit are junk now; ignore them. If the sum is
4147 positive, make sure we did not have all negative inputs;
4148 if the sum is negative, make sure we did not have all
4149 positive inputs. The test below looks only at the sign
4150 bits, and it really just
4151 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4152
4153 We mask with addrmask here to explicitly allow an address
4154 wrap-around. The Linux kernel relies on it, and it is
4155 the only way to write assembler code which can run when
4156 loaded at a location 0x80000000 away from the location at
4157 which it is linked. */
4158 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4159 flag = bfd_reloc_overflow;
4160
4161 break;
4162
4163 case complain_overflow_unsigned:
4164 /* Checking for an unsigned overflow is relatively easy:
4165 trim the addresses and add, and trim the result as well.
4166 Overflow is normally indicated when the result does not
4167 fit in the field. However, we also need to consider the
4168 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4169 input is 0x80000000, and bfd_vma is only 32 bits; then we
4170 will get sum == 0, but there is an overflow, since the
4171 inputs did not fit in the field. Instead of doing a
4172 separate test, we can check for this by or-ing in the
4173 operands when testing for the sum overflowing its final
4174 field. */
4175 sum = (a + b) & addrmask;
4176 if ((a | b | sum) & signmask)
4177 flag = bfd_reloc_overflow;
4178 break;
4179
4180 default:
4181 abort ();
4182 }
4183 }
4184
4185 /* Put RELOCATION in the right bits. */
4186 relocation >>= (bfd_vma) rightshift;
4187 relocation <<= (bfd_vma) bitpos;
4188
4189 /* Add RELOCATION to the right bits of X. */
4190 /* FIXME : 090616
4191 Because the relaxation may generate duplicate relocation at one address,
4192 an addition to immediate in the instruction may cause the relocation added
4193 several times.
4194 This bug should be fixed in assembler, but a check is also needed here. */
4195 if (howto->partial_inplace)
4196 x = ((x & ~howto->dst_mask)
4197 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4198 else
4199 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4200
4201
4202 /* Put the relocated value back in the object file. */
4203 switch (size)
4204 {
4205 default:
4206 case 0:
4207 case 1:
4208 case 8:
4209 abort ();
4210 break;
4211 case 2:
4212 bfd_putb16 (x, location);
4213 break;
4214 case 4:
4215 bfd_putb32 (x, location);
4216 break;
4217 }
4218
4219 return flag;
4220 }
4221
4222 static bfd_reloc_status_type
4223 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4224 asection *input_section, bfd_byte *contents,
4225 bfd_vma address, bfd_vma value, bfd_vma addend)
4226 {
4227 bfd_vma relocation;
4228
4229 /* Sanity check the address. */
4230 if (address > bfd_get_section_limit (input_bfd, input_section))
4231 return bfd_reloc_outofrange;
4232
4233 /* This function assumes that we are dealing with a basic relocation
4234 against a symbol. We want to compute the value of the symbol to
4235 relocate to. This is just VALUE, the value of the symbol, plus
4236 ADDEND, any addend associated with the reloc. */
4237 relocation = value + addend;
4238
4239 /* If the relocation is PC relative, we want to set RELOCATION to
4240 the distance between the symbol (currently in RELOCATION) and the
4241 location we are relocating. Some targets (e.g., i386-aout)
4242 arrange for the contents of the section to be the negative of the
4243 offset of the location within the section; for such targets
4244 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4245 simply leave the contents of the section as zero; for such
4246 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4247 need to subtract out the offset of the location within the
4248 section (which is just ADDRESS). */
4249 if (howto->pc_relative)
4250 {
4251 relocation -= (input_section->output_section->vma
4252 + input_section->output_offset);
4253 if (howto->pcrel_offset)
4254 relocation -= address;
4255 }
4256
4257 return nds32_relocate_contents (howto, input_bfd, relocation,
4258 contents + address);
4259 }
4260
4261 static bfd_boolean
4262 nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4263 const char *name,
4264 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4265 asection *input_sec,
4266 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4267 {
4268 const char *source;
4269 FILE *sym_ld_script = NULL;
4270 struct elf_nds32_link_hash_table *table;
4271
4272 table = nds32_elf_hash_table (info);
4273 sym_ld_script = table->sym_ld_script;
4274 if (!sym_ld_script)
4275 return TRUE;
4276
4277 if (!h || !name || *name == '\0')
4278 return TRUE;
4279
4280 if (input_sec->flags & SEC_EXCLUDE)
4281 return TRUE;
4282
4283 if (!check_start_export_sym)
4284 {
4285 fprintf (sym_ld_script, "SECTIONS\n{\n");
4286 check_start_export_sym = 1;
4287 }
4288
4289 if (h->root.type == bfd_link_hash_defined
4290 || h->root.type == bfd_link_hash_defweak)
4291 {
4292 if (!h->root.u.def.section->output_section)
4293 return TRUE;
4294
4295 if (bfd_is_const_section (input_sec))
4296 source = input_sec->name;
4297 else
4298 source = input_sec->owner->filename;
4299
4300 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4301 h->root.root.string,
4302 (long) (h->root.u.def.value
4303 + h->root.u.def.section->output_section->vma
4304 + h->root.u.def.section->output_offset), source);
4305 }
4306
4307 return TRUE;
4308 }
4309
4310 /* Relocate an NDS32/D ELF section.
4311 There is some attempt to make this function usable for many architectures,
4312 both for RELA and REL type relocs, if only to serve as a learning tool.
4313
4314 The RELOCATE_SECTION function is called by the new ELF backend linker
4315 to handle the relocations for a section.
4316
4317 The relocs are always passed as Rela structures; if the section
4318 actually uses Rel structures, the r_addend field will always be
4319 zero.
4320
4321 This function is responsible for adjust the section contents as
4322 necessary, and (if using Rela relocs and generating a
4323 relocatable output file) adjusting the reloc addend as
4324 necessary.
4325
4326 This function does not have to worry about setting the reloc
4327 address or the reloc symbol index.
4328
4329 LOCAL_SYMS is a pointer to the swapped in local symbols.
4330
4331 LOCAL_SECTIONS is an array giving the section in the input file
4332 corresponding to the st_shndx field of each local symbol.
4333
4334 The global hash table entry for the global symbols can be found
4335 via elf_sym_hashes (input_bfd).
4336
4337 When generating relocatable output, this function must handle
4338 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4339 going to be the section symbol corresponding to the output
4340 section, which means that the addend must be adjusted
4341 accordingly. */
4342
4343 static bfd_vma
4344 dtpoff_base (struct bfd_link_info *info)
4345 {
4346 /* If tls_sec is NULL, we should have signalled an error already. */
4347 if (elf_hash_table (info)->tls_sec == NULL)
4348 return 0;
4349 return elf_hash_table (info)->tls_sec->vma;
4350 }
4351
4352 static bfd_boolean
4353 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4354 struct bfd_link_info * info,
4355 bfd * input_bfd,
4356 asection * input_section,
4357 bfd_byte * contents,
4358 Elf_Internal_Rela * relocs,
4359 Elf_Internal_Sym * local_syms,
4360 asection ** local_sections)
4361 {
4362 Elf_Internal_Shdr *symtab_hdr;
4363 struct elf_link_hash_entry **sym_hashes;
4364 Elf_Internal_Rela *rel, *relend;
4365 bfd_boolean ret = TRUE; /* Assume success. */
4366 int align = 0;
4367 bfd_reloc_status_type r;
4368 const char *errmsg = NULL;
4369 bfd_vma gp;
4370 struct elf_nds32_link_hash_table *htab;
4371 bfd *dynobj;
4372 bfd_vma *local_got_offsets;
4373 asection *sgot, *splt, *sreloc;
4374 bfd_vma high_address;
4375 struct elf_nds32_link_hash_table *table;
4376 int eliminate_gc_relocs;
4377 bfd_vma fpbase_addr;
4378
4379 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4380 sym_hashes = elf_sym_hashes (input_bfd);
4381 htab = nds32_elf_hash_table (info);
4382 high_address = bfd_get_section_limit (input_bfd, input_section);
4383
4384 dynobj = htab->root.dynobj;
4385 local_got_offsets = elf_local_got_offsets (input_bfd);
4386
4387 sgot = htab->root.sgot;
4388 splt = htab->root.splt;
4389 sreloc = NULL;
4390
4391 rel = relocs;
4392 relend = relocs + input_section->reloc_count;
4393
4394 table = nds32_elf_hash_table (info);
4395 eliminate_gc_relocs = table->eliminate_gc_relocs;
4396 /* By this time, we can adjust the value of _SDA_BASE_. */
4397 if ((!bfd_link_relocatable (info)))
4398 {
4399 is_SDA_BASE_set = 1;
4400 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4401 if (r != bfd_reloc_ok)
4402 return FALSE;
4403 }
4404
4405 if (is_ITB_BASE_set == 0)
4406 {
4407 /* Set the _ITB_BASE_. */
4408 if (!nds32_elf_ex9_itb_base (info))
4409 {
4410 _bfd_error_handler (_("%pB: error: Cannot set _ITB_BASE_"),
4411 output_bfd);
4412 bfd_set_error (bfd_error_bad_value);
4413 }
4414 }
4415
4416 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4417 if (!nds32_elf_ifc_reloc ())
4418 _bfd_error_handler (_("error: IFC relocation error."));
4419
4420 /* Relocation for .ex9.itable. */
4421 if (table->target_optimize & NDS32_RELAX_EX9_ON
4422 || (table->ex9_import_file && table->update_ex9_table))
4423 nds32_elf_ex9_reloc_jmp (info);
4424
4425 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4426 the fp value is set as gp, and it has be reverted for instruction
4427 setting fp. */
4428 fpbase_addr = elf_gp (output_bfd);
4429
4430 for (rel = relocs; rel < relend; rel++)
4431 {
4432 enum elf_nds32_reloc_type r_type;
4433 reloc_howto_type *howto = NULL;
4434 unsigned long r_symndx;
4435 struct elf_link_hash_entry *h = NULL;
4436 Elf_Internal_Sym *sym = NULL;
4437 asection *sec;
4438 bfd_vma relocation;
4439
4440 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4441 ensure it's zero (we use REL relocs, not RELA). Therefore this
4442 should be assigning zero to `addend', but for clarity we use
4443 `r_addend'. */
4444
4445 bfd_vma addend = rel->r_addend;
4446 bfd_vma offset = rel->r_offset;
4447
4448 r_type = ELF32_R_TYPE (rel->r_info);
4449 if (r_type >= R_NDS32_max)
4450 {
4451 /* xgettext:c-format */
4452 _bfd_error_handler (_("%pB: error: unknown relocation type %d."),
4453 input_bfd, r_type);
4454 bfd_set_error (bfd_error_bad_value);
4455 ret = FALSE;
4456 continue;
4457 }
4458
4459 if (r_type == R_NDS32_GNU_VTENTRY
4460 || r_type == R_NDS32_GNU_VTINHERIT
4461 || r_type == R_NDS32_NONE
4462 || r_type == R_NDS32_RELA_GNU_VTENTRY
4463 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4464 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4465 || r_type == R_NDS32_DATA
4466 || r_type == R_NDS32_TRAN
4467 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
4468 continue;
4469
4470 /* If we enter the fp-as-gp region. Resolve the address
4471 of best fp-base. */
4472 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4473 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4474 {
4475 int dist;
4476
4477 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4478 dist = rel->r_addend >> 16;
4479 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4480 local_syms, symtab_hdr);
4481 }
4482 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4483 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4484 {
4485 fpbase_addr = elf_gp (output_bfd);
4486 }
4487
4488 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4489 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4490 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
4491 continue;
4492
4493 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4494 r_symndx = ELF32_R_SYM (rel->r_info);
4495
4496 /* This is a final link. */
4497 sym = NULL;
4498 sec = NULL;
4499 h = NULL;
4500
4501 if (r_symndx < symtab_hdr->sh_info)
4502 {
4503 /* Local symbol. */
4504 sym = local_syms + r_symndx;
4505 sec = local_sections[r_symndx];
4506
4507 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4508 addend = rel->r_addend;
4509 }
4510 else
4511 {
4512 /* External symbol. */
4513 bfd_boolean warned, ignored, unresolved_reloc;
4514 int symndx = r_symndx - symtab_hdr->sh_info;
4515
4516 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4517 r_symndx, symtab_hdr, sym_hashes, h, sec,
4518 relocation, unresolved_reloc, warned,
4519 ignored);
4520
4521 /* la $fp, _FP_BASE_ is per-function (region).
4522 Handle it specially. */
4523 switch ((int) r_type)
4524 {
4525 case R_NDS32_SDA19S0_RELA:
4526 case R_NDS32_SDA15S0_RELA:
4527 case R_NDS32_20_RELA:
4528 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4529 FP_BASE_NAME) == 0)
4530 {
4531 relocation = fpbase_addr;
4532 break;
4533 }
4534 }
4535
4536 }
4537
4538 if (bfd_link_relocatable (info))
4539 {
4540 /* This is a relocatable link. We don't have to change
4541 anything, unless the reloc is against a section symbol,
4542 in which case we have to adjust according to where the
4543 section symbol winds up in the output section. */
4544 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4545 rel->r_addend += sec->output_offset + sym->st_value;
4546
4547 continue;
4548 }
4549
4550 /* Sanity check the address. */
4551 if (offset > high_address)
4552 {
4553 r = bfd_reloc_outofrange;
4554 goto check_reloc;
4555 }
4556
4557 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4558 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4559 || r_type >= R_NDS32_RELAX_ENTRY)
4560 continue;
4561
4562 switch ((int) r_type)
4563 {
4564 case R_NDS32_GOTOFF:
4565 /* Relocation is relative to the start of the global offset
4566 table (for ld24 rx, #uimm24), e.g. access at label+addend
4567
4568 ld24 rx. #label@GOTOFF + addend
4569 sub rx, r12. */
4570 case R_NDS32_GOTOFF_HI20:
4571 case R_NDS32_GOTOFF_LO12:
4572 case R_NDS32_GOTOFF_LO15:
4573 case R_NDS32_GOTOFF_LO19:
4574 BFD_ASSERT (sgot != NULL);
4575
4576 relocation -= elf_gp (output_bfd);
4577 break;
4578
4579 case R_NDS32_9_PLTREL:
4580 case R_NDS32_25_PLTREL:
4581 /* Relocation is to the entry for this symbol in the
4582 procedure linkage table. */
4583
4584 /* The native assembler will generate a 25_PLTREL reloc
4585 for a local symbol if you assemble a call from one
4586 section to another when using -K pic. */
4587 if (h == NULL)
4588 break;
4589
4590 if (h->forced_local)
4591 break;
4592
4593 /* We didn't make a PLT entry for this symbol. This
4594 happens when statically linking PIC code, or when
4595 using -Bsymbolic. */
4596 if (h->plt.offset == (bfd_vma) - 1)
4597 break;
4598
4599 relocation = (splt->output_section->vma
4600 + splt->output_offset + h->plt.offset);
4601 break;
4602
4603 case R_NDS32_PLT_GOTREL_HI20:
4604 case R_NDS32_PLT_GOTREL_LO12:
4605 case R_NDS32_PLT_GOTREL_LO15:
4606 case R_NDS32_PLT_GOTREL_LO19:
4607 case R_NDS32_PLT_GOTREL_LO20:
4608 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4609 {
4610 /* We didn't make a PLT entry for this symbol. This
4611 happens when statically linking PIC code, or when
4612 using -Bsymbolic. */
4613 relocation -= elf_gp (output_bfd);
4614 break;
4615 }
4616
4617 relocation = (splt->output_section->vma
4618 + splt->output_offset + h->plt.offset);
4619
4620 relocation -= elf_gp (output_bfd);
4621 break;
4622
4623 case R_NDS32_PLTREL_HI20:
4624 case R_NDS32_PLTREL_LO12:
4625
4626 /* Relocation is to the entry for this symbol in the
4627 procedure linkage table. */
4628
4629 /* The native assembler will generate a 25_PLTREL reloc
4630 for a local symbol if you assemble a call from one
4631 section to another when using -K pic. */
4632 if (h == NULL)
4633 break;
4634
4635 if (h->forced_local)
4636 break;
4637
4638 if (h->plt.offset == (bfd_vma) - 1)
4639 /* We didn't make a PLT entry for this symbol. This
4640 happens when statically linking PIC code, or when
4641 using -Bsymbolic. */
4642 break;
4643
4644 if (splt == NULL)
4645 break;
4646
4647 relocation = (splt->output_section->vma
4648 + splt->output_offset
4649 + h->plt.offset + 4)
4650 - (input_section->output_section->vma
4651 + input_section->output_offset
4652 + rel->r_offset);
4653
4654 break;
4655
4656 case R_NDS32_GOTPC20:
4657 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4658 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4659 relocation = elf_gp (output_bfd);
4660 break;
4661
4662 case R_NDS32_GOTPC_HI20:
4663 case R_NDS32_GOTPC_LO12:
4664 {
4665 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4666 bl .+4
4667 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4668 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4669 or
4670 bl .+4
4671 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4672 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4673 */
4674 relocation = elf_gp (output_bfd);
4675 relocation -= (input_section->output_section->vma
4676 + input_section->output_offset + rel->r_offset);
4677 break;
4678 }
4679
4680 case R_NDS32_GOT20:
4681 /* Fall through. */
4682 case R_NDS32_GOT_HI20:
4683 case R_NDS32_GOT_LO12:
4684 case R_NDS32_GOT_LO15:
4685 case R_NDS32_GOT_LO19:
4686 /* Relocation is to the entry for this symbol in the global
4687 offset table. */
4688 BFD_ASSERT (sgot != NULL);
4689
4690 if (h != NULL)
4691 {
4692 bfd_boolean dyn;
4693 bfd_vma off;
4694
4695 off = h->got.offset;
4696 BFD_ASSERT (off != (bfd_vma) - 1);
4697 dyn = htab->root.dynamic_sections_created;
4698 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4699 bfd_link_pic (info),
4700 h)
4701 || (bfd_link_pic (info)
4702 && (info->symbolic
4703 || h->dynindx == -1
4704 || h->forced_local) && h->def_regular))
4705 {
4706 /* This is actually a static link, or it is a
4707 -Bsymbolic link and the symbol is defined
4708 locally, or the symbol was forced to be local
4709 because of a version file. We must initialize
4710 this entry in the global offset table. Since the
4711 offset must always be a multiple of 4, we use the
4712 least significant bit to record whether we have
4713 initialized it already.
4714
4715 When doing a dynamic link, we create a .rela.got
4716 relocation entry to initialize the value. This
4717 is done in the finish_dynamic_symbol routine. */
4718 if ((off & 1) != 0)
4719 off &= ~1;
4720 else
4721 {
4722 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4723 h->got.offset |= 1;
4724 }
4725 }
4726 relocation = sgot->output_section->vma + sgot->output_offset + off
4727 - elf_gp (output_bfd);
4728 }
4729 else
4730 {
4731 bfd_vma off;
4732 bfd_byte *loc;
4733
4734 BFD_ASSERT (local_got_offsets != NULL
4735 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4736
4737 off = local_got_offsets[r_symndx];
4738
4739 /* The offset must always be a multiple of 4. We use
4740 the least significant bit to record whether we have
4741 already processed this entry. */
4742 if ((off & 1) != 0)
4743 off &= ~1;
4744 else
4745 {
4746 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4747
4748 if (bfd_link_pic (info))
4749 {
4750 asection *srelgot;
4751 Elf_Internal_Rela outrel;
4752
4753 /* We need to generate a R_NDS32_RELATIVE reloc
4754 for the dynamic linker. */
4755 srelgot = htab->root.srelgot;
4756 BFD_ASSERT (srelgot != NULL);
4757
4758 outrel.r_offset = (elf_gp (output_bfd)
4759 + sgot->output_offset + off);
4760 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4761 outrel.r_addend = relocation;
4762 loc = srelgot->contents;
4763 loc +=
4764 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4765 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4766 ++srelgot->reloc_count;
4767 }
4768 local_got_offsets[r_symndx] |= 1;
4769 }
4770 relocation = sgot->output_section->vma + sgot->output_offset + off
4771 - elf_gp (output_bfd);
4772 }
4773
4774 break;
4775
4776 case R_NDS32_16_RELA:
4777 case R_NDS32_20_RELA:
4778 case R_NDS32_5_RELA:
4779 case R_NDS32_32_RELA:
4780 case R_NDS32_9_PCREL_RELA:
4781 case R_NDS32_WORD_9_PCREL_RELA:
4782 case R_NDS32_10_UPCREL_RELA:
4783 case R_NDS32_15_PCREL_RELA:
4784 case R_NDS32_17_PCREL_RELA:
4785 case R_NDS32_25_PCREL_RELA:
4786 case R_NDS32_HI20_RELA:
4787 case R_NDS32_LO12S3_RELA:
4788 case R_NDS32_LO12S2_RELA:
4789 case R_NDS32_LO12S2_DP_RELA:
4790 case R_NDS32_LO12S2_SP_RELA:
4791 case R_NDS32_LO12S1_RELA:
4792 case R_NDS32_LO12S0_RELA:
4793 case R_NDS32_LO12S0_ORI_RELA:
4794 if (bfd_link_pic (info) && r_symndx != 0
4795 && (input_section->flags & SEC_ALLOC) != 0
4796 && (eliminate_gc_relocs == 0
4797 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4798 && ((r_type != R_NDS32_9_PCREL_RELA
4799 && r_type != R_NDS32_WORD_9_PCREL_RELA
4800 && r_type != R_NDS32_10_UPCREL_RELA
4801 && r_type != R_NDS32_15_PCREL_RELA
4802 && r_type != R_NDS32_17_PCREL_RELA
4803 && r_type != R_NDS32_25_PCREL_RELA
4804 && !(r_type == R_NDS32_32_RELA
4805 && strcmp (input_section->name, ".eh_frame") == 0))
4806 || (h != NULL && h->dynindx != -1
4807 && (!info->symbolic || !h->def_regular))))
4808 {
4809 Elf_Internal_Rela outrel;
4810 bfd_boolean skip, relocate;
4811 bfd_byte *loc;
4812
4813 /* When generating a shared object, these relocations
4814 are copied into the output file to be resolved at run
4815 time. */
4816
4817 if (sreloc == NULL)
4818 {
4819 const char *name;
4820
4821 name = bfd_elf_string_from_elf_section
4822 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4823 elf_section_data (input_section)->rela.hdr->sh_name);
4824 if (name == NULL)
4825 return FALSE;
4826
4827 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4828 && strcmp (bfd_get_section_name (input_bfd,
4829 input_section),
4830 name + 5) == 0);
4831
4832 sreloc = bfd_get_section_by_name (dynobj, name);
4833 BFD_ASSERT (sreloc != NULL);
4834 }
4835
4836 skip = FALSE;
4837 relocate = FALSE;
4838
4839 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4840 info,
4841 input_section,
4842 rel->r_offset);
4843 if (outrel.r_offset == (bfd_vma) - 1)
4844 skip = TRUE;
4845 else if (outrel.r_offset == (bfd_vma) - 2)
4846 skip = TRUE, relocate = TRUE;
4847 outrel.r_offset += (input_section->output_section->vma
4848 + input_section->output_offset);
4849
4850 if (skip)
4851 memset (&outrel, 0, sizeof outrel);
4852 else if (r_type == R_NDS32_17_PCREL_RELA
4853 || r_type == R_NDS32_15_PCREL_RELA
4854 || r_type == R_NDS32_25_PCREL_RELA)
4855 {
4856 BFD_ASSERT (h != NULL && h->dynindx != -1);
4857 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4858 outrel.r_addend = rel->r_addend;
4859 }
4860 else
4861 {
4862 /* h->dynindx may be -1 if this symbol was marked to
4863 become local. */
4864 if (h == NULL
4865 || ((info->symbolic || h->dynindx == -1)
4866 && h->def_regular))
4867 {
4868 relocate = TRUE;
4869 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4870 outrel.r_addend = relocation + rel->r_addend;
4871 }
4872 else
4873 {
4874 BFD_ASSERT (h->dynindx != -1);
4875 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4876 outrel.r_addend = rel->r_addend;
4877 }
4878 }
4879
4880 loc = sreloc->contents;
4881 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4882 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4883 ++sreloc->reloc_count;
4884
4885 /* If this reloc is against an external symbol, we do
4886 not want to fiddle with the addend. Otherwise, we
4887 need to include the symbol value so that it becomes
4888 an addend for the dynamic reloc. */
4889 if (!relocate)
4890 continue;
4891 }
4892 break;
4893
4894 case R_NDS32_25_ABS_RELA:
4895 if (bfd_link_pic (info))
4896 {
4897 _bfd_error_handler
4898 (_("%pB: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
4899 "mode."), input_bfd);
4900 return FALSE;
4901 }
4902 break;
4903
4904 case R_NDS32_9_PCREL:
4905 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4906 contents, offset,
4907 sec, relocation, addend);
4908 goto check_reloc;
4909
4910 case R_NDS32_HI20:
4911 {
4912 Elf_Internal_Rela *lorel;
4913
4914 /* We allow an arbitrary number of HI20 relocs before the
4915 LO12 reloc. This permits gcc to emit the HI and LO relocs
4916 itself. */
4917 for (lorel = rel + 1;
4918 (lorel < relend
4919 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4920 continue;
4921 if (lorel < relend
4922 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4923 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4924 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4925 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4926 {
4927 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4928 contents, relocation + addend);
4929 r = bfd_reloc_ok;
4930 }
4931 else
4932 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
4933 contents, offset, relocation,
4934 addend);
4935 }
4936
4937 goto check_reloc;
4938
4939 case R_NDS32_GOT17S2_RELA:
4940 case R_NDS32_GOT15S2_RELA:
4941 {
4942 bfd_vma off;
4943
4944 BFD_ASSERT (sgot != NULL);
4945
4946 if (h != NULL)
4947 {
4948 bfd_boolean dyn;
4949
4950 off = h->got.offset;
4951 BFD_ASSERT (off != (bfd_vma) - 1);
4952
4953 dyn = htab->root.dynamic_sections_created;
4954 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
4955 (dyn, bfd_link_pic (info), h)
4956 || (bfd_link_pic (info)
4957 && (info->symbolic
4958 || h->dynindx == -1
4959 || h->forced_local)
4960 && h->def_regular))
4961 {
4962 /* This is actually a static link, or it is a
4963 -Bsymbolic link and the symbol is defined
4964 locally, or the symbol was forced to be local
4965 because of a version file. We must initialize
4966 this entry in the global offset table. Since the
4967 offset must always be a multiple of 4, we use the
4968 least significant bit to record whether we have
4969 initialized it already.
4970
4971 When doing a dynamic link, we create a .rela.got
4972 relocation entry to initialize the value. This
4973 is done in the finish_dynamic_symbol routine. */
4974 if ((off & 1) != 0)
4975 off &= ~1;
4976 else
4977 {
4978 bfd_put_32 (output_bfd, relocation,
4979 sgot->contents + off);
4980 h->got.offset |= 1;
4981 }
4982 }
4983 }
4984 else
4985 {
4986 bfd_byte *loc;
4987
4988 BFD_ASSERT (local_got_offsets != NULL
4989 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4990
4991 off = local_got_offsets[r_symndx];
4992
4993 /* The offset must always be a multiple of 4. We use
4994 the least significant bit to record whether we have
4995 already processed this entry. */
4996 if ((off & 1) != 0)
4997 off &= ~1;
4998 else
4999 {
5000 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5001
5002 if (bfd_link_pic (info))
5003 {
5004 asection *srelgot;
5005 Elf_Internal_Rela outrel;
5006
5007 /* We need to generate a R_NDS32_RELATIVE reloc
5008 for the dynamic linker. */
5009 srelgot = htab->root.srelgot;
5010 BFD_ASSERT (srelgot != NULL);
5011
5012 outrel.r_offset = (elf_gp (output_bfd)
5013 + sgot->output_offset + off);
5014 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5015 outrel.r_addend = relocation;
5016 loc = srelgot->contents;
5017 loc +=
5018 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5019 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5020 ++srelgot->reloc_count;
5021 }
5022 local_got_offsets[r_symndx] |= 1;
5023 }
5024 }
5025 relocation = sgot->output_section->vma + sgot->output_offset + off
5026 - elf_gp (output_bfd);
5027 }
5028 if (relocation & align)
5029 {
5030 /* Incorrect alignment. */
5031 _bfd_error_handler
5032 (_("%pB: warning: unaligned access to GOT entry."), input_bfd);
5033 ret = FALSE;
5034 r = bfd_reloc_dangerous;
5035 goto check_reloc;
5036 }
5037 break;
5038
5039 case R_NDS32_SDA16S3_RELA:
5040 case R_NDS32_SDA15S3_RELA:
5041 case R_NDS32_SDA15S3:
5042 align = 0x7;
5043 goto handle_sda;
5044
5045 case R_NDS32_SDA17S2_RELA:
5046 case R_NDS32_SDA15S2_RELA:
5047 case R_NDS32_SDA12S2_SP_RELA:
5048 case R_NDS32_SDA12S2_DP_RELA:
5049 case R_NDS32_SDA15S2:
5050 case R_NDS32_SDA_FP7U2_RELA:
5051 align = 0x3;
5052 goto handle_sda;
5053
5054 case R_NDS32_SDA18S1_RELA:
5055 case R_NDS32_SDA15S1_RELA:
5056 case R_NDS32_SDA15S1:
5057 align = 0x1;
5058 goto handle_sda;
5059
5060 case R_NDS32_SDA19S0_RELA:
5061 case R_NDS32_SDA15S0_RELA:
5062 case R_NDS32_SDA15S0:
5063 {
5064 align = 0x0;
5065 handle_sda:
5066 BFD_ASSERT (sec != NULL);
5067
5068 /* If the symbol is in the abs section, the out_bfd will be null.
5069 This happens when the relocation has a symbol@GOTOFF. */
5070 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5071 if (r != bfd_reloc_ok)
5072 {
5073 _bfd_error_handler
5074 (_("%pB: warning: relocate SDA_BASE failed."), input_bfd);
5075 ret = FALSE;
5076 goto check_reloc;
5077 }
5078
5079 /* At this point `relocation' contains the object's
5080 address. */
5081 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5082 {
5083 relocation -= fpbase_addr;
5084 }
5085 else
5086 relocation -= gp;
5087 /* Now it contains the offset from _SDA_BASE_. */
5088
5089 /* Make sure alignment is correct. */
5090
5091 if (relocation & align)
5092 {
5093 /* Incorrect alignment. */
5094 _bfd_error_handler
5095 /* xgettext:c-format */
5096 (_("%pB(%pA): warning: unaligned small data access of type %d."),
5097 input_bfd, input_section, r_type);
5098 ret = FALSE;
5099 goto check_reloc;
5100 }
5101 }
5102
5103 break;
5104 case R_NDS32_17IFC_PCREL_RELA:
5105 case R_NDS32_10IFCU_PCREL_RELA:
5106 /* do nothing */
5107 break;
5108
5109 case R_NDS32_TLS_LE_HI20:
5110 case R_NDS32_TLS_LE_LO12:
5111 case R_NDS32_TLS_LE_20:
5112 case R_NDS32_TLS_LE_15S0:
5113 case R_NDS32_TLS_LE_15S1:
5114 case R_NDS32_TLS_LE_15S2:
5115 if (elf_hash_table (info)->tls_sec != NULL)
5116 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5117 break;
5118 case R_NDS32_TLS_IE_HI20:
5119 case R_NDS32_TLS_IE_LO12S2:
5120 {
5121 /* Relocation is to the entry for this symbol in the global
5122 offset table. */
5123 unsigned int tls_type;
5124 asection *srelgot;
5125 Elf_Internal_Rela outrel;
5126 bfd_vma off;
5127 bfd_byte *loc;
5128 int indx = 0;
5129
5130 BFD_ASSERT (sgot != NULL);
5131 if (h != NULL)
5132 {
5133 bfd_boolean dyn;
5134
5135 off = h->got.offset;
5136 BFD_ASSERT (off != (bfd_vma) - 1);
5137 dyn = htab->root.dynamic_sections_created;
5138 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5139 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5140 && (!bfd_link_pic (info)
5141 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5142 indx = h->dynindx;
5143 }
5144 else
5145 {
5146 /* Never happen currently. */
5147 BFD_ASSERT (local_got_offsets != NULL
5148 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5149
5150 off = local_got_offsets[r_symndx];
5151
5152 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5153 }
5154 relocation = sgot->output_section->vma + sgot->output_offset + off;
5155
5156 if (r_type == R_NDS32_TLS_IE_LO12S2)
5157 break;
5158
5159 /* The offset must always be a multiple of 4. We use
5160 the least significant bit to record whether we have
5161 already processed this entry. */
5162 if ((off & 1) != 0)
5163 off &= ~1;
5164 else
5165 {
5166 bfd_boolean need_relocs = FALSE;
5167 srelgot = htab->root.srelgot;
5168 if ((bfd_link_pic (info) || indx != 0)
5169 && (h == NULL
5170 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5171 || h->root.type != bfd_link_hash_undefweak))
5172 {
5173 need_relocs = TRUE;
5174 BFD_ASSERT (srelgot != NULL);
5175 }
5176 if (tls_type & GOT_TLS_IE)
5177 {
5178 if (need_relocs)
5179 {
5180 if (h->dynindx == 0)
5181 outrel.r_addend = relocation - dtpoff_base (info);
5182 else
5183 outrel.r_addend = 0;
5184 outrel.r_offset = (sgot->output_section->vma
5185 + sgot->output_offset
5186 + off);
5187 outrel.r_info =
5188 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5189
5190 loc = srelgot->contents;
5191 loc +=
5192 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5193 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5194 ++srelgot->reloc_count;
5195 }
5196 else
5197 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5198 sgot->contents + off);
5199 }
5200 }
5201 }
5202 break;
5203
5204 /* DON'T fall through. */
5205
5206 default:
5207 /* OLD_NDS32_RELOC. */
5208
5209 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5210 contents, offset, relocation, addend);
5211 goto check_reloc;
5212 }
5213
5214 switch ((int) r_type)
5215 {
5216 case R_NDS32_20_RELA:
5217 case R_NDS32_5_RELA:
5218 case R_NDS32_9_PCREL_RELA:
5219 case R_NDS32_WORD_9_PCREL_RELA:
5220 case R_NDS32_10_UPCREL_RELA:
5221 case R_NDS32_15_PCREL_RELA:
5222 case R_NDS32_17_PCREL_RELA:
5223 case R_NDS32_25_PCREL_RELA:
5224 case R_NDS32_25_ABS_RELA:
5225 case R_NDS32_HI20_RELA:
5226 case R_NDS32_LO12S3_RELA:
5227 case R_NDS32_LO12S2_RELA:
5228 case R_NDS32_LO12S2_DP_RELA:
5229 case R_NDS32_LO12S2_SP_RELA:
5230 case R_NDS32_LO12S1_RELA:
5231 case R_NDS32_LO12S0_RELA:
5232 case R_NDS32_LO12S0_ORI_RELA:
5233 case R_NDS32_SDA16S3_RELA:
5234 case R_NDS32_SDA17S2_RELA:
5235 case R_NDS32_SDA18S1_RELA:
5236 case R_NDS32_SDA19S0_RELA:
5237 case R_NDS32_SDA15S3_RELA:
5238 case R_NDS32_SDA15S2_RELA:
5239 case R_NDS32_SDA12S2_DP_RELA:
5240 case R_NDS32_SDA12S2_SP_RELA:
5241 case R_NDS32_SDA15S1_RELA:
5242 case R_NDS32_SDA15S0_RELA:
5243 case R_NDS32_SDA_FP7U2_RELA:
5244 case R_NDS32_9_PLTREL:
5245 case R_NDS32_25_PLTREL:
5246 case R_NDS32_GOT20:
5247 case R_NDS32_GOT_HI20:
5248 case R_NDS32_GOT_LO12:
5249 case R_NDS32_GOT_LO15:
5250 case R_NDS32_GOT_LO19:
5251 case R_NDS32_GOT15S2_RELA:
5252 case R_NDS32_GOT17S2_RELA:
5253 case R_NDS32_GOTPC20:
5254 case R_NDS32_GOTPC_HI20:
5255 case R_NDS32_GOTPC_LO12:
5256 case R_NDS32_GOTOFF:
5257 case R_NDS32_GOTOFF_HI20:
5258 case R_NDS32_GOTOFF_LO12:
5259 case R_NDS32_GOTOFF_LO15:
5260 case R_NDS32_GOTOFF_LO19:
5261 case R_NDS32_PLTREL_HI20:
5262 case R_NDS32_PLTREL_LO12:
5263 case R_NDS32_PLT_GOTREL_HI20:
5264 case R_NDS32_PLT_GOTREL_LO12:
5265 case R_NDS32_PLT_GOTREL_LO15:
5266 case R_NDS32_PLT_GOTREL_LO19:
5267 case R_NDS32_PLT_GOTREL_LO20:
5268 case R_NDS32_17IFC_PCREL_RELA:
5269 case R_NDS32_10IFCU_PCREL_RELA:
5270 case R_NDS32_TLS_LE_HI20:
5271 case R_NDS32_TLS_LE_LO12:
5272 case R_NDS32_TLS_IE_HI20:
5273 case R_NDS32_TLS_IE_LO12S2:
5274 case R_NDS32_TLS_LE_20:
5275 case R_NDS32_TLS_LE_15S0:
5276 case R_NDS32_TLS_LE_15S1:
5277 case R_NDS32_TLS_LE_15S2:
5278 /* Instruction related relocs must handle endian properly. */
5279 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
5280 r = nds32_elf_final_link_relocate (howto, input_bfd,
5281 input_section, contents,
5282 rel->r_offset, relocation,
5283 rel->r_addend);
5284 break;
5285
5286 default:
5287 /* All other relocs can use default handler. */
5288 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5289 contents, rel->r_offset,
5290 relocation, rel->r_addend);
5291 break;
5292 }
5293
5294 check_reloc:
5295
5296 if (r != bfd_reloc_ok)
5297 {
5298 /* FIXME: This should be generic enough to go in a utility. */
5299 const char *name;
5300
5301 if (h != NULL)
5302 name = h->root.root.string;
5303 else
5304 {
5305 name = bfd_elf_string_from_elf_section
5306 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5307 if (name == NULL || *name == '\0')
5308 name = bfd_section_name (input_bfd, sec);
5309 }
5310
5311 if (errmsg != NULL)
5312 goto common_error;
5313
5314 switch (r)
5315 {
5316 case bfd_reloc_overflow:
5317 (*info->callbacks->reloc_overflow)
5318 (info, (h ? &h->root : NULL), name, howto->name,
5319 (bfd_vma) 0, input_bfd, input_section, offset);
5320 break;
5321
5322 case bfd_reloc_undefined:
5323 (*info->callbacks->undefined_symbol)
5324 (info, name, input_bfd, input_section, offset, TRUE);
5325 break;
5326
5327 case bfd_reloc_outofrange:
5328 errmsg = _("internal error: out of range error");
5329 goto common_error;
5330
5331 case bfd_reloc_notsupported:
5332 errmsg = _("internal error: unsupported relocation error");
5333 goto common_error;
5334
5335 case bfd_reloc_dangerous:
5336 errmsg = _("internal error: dangerous error");
5337 goto common_error;
5338
5339 default:
5340 errmsg = _("internal error: unknown error");
5341 /* Fall through. */
5342
5343 common_error:
5344 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5345 input_section, offset);
5346 break;
5347 }
5348 }
5349 }
5350
5351 return ret;
5352 }
5353
5354 /* Finish up dynamic symbol handling. We set the contents of various
5355 dynamic sections here. */
5356
5357 static bfd_boolean
5358 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5359 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5360 {
5361 struct elf_nds32_link_hash_table *htab;
5362 bfd_byte *loc;
5363
5364 htab = nds32_elf_hash_table (info);
5365
5366 if (h->plt.offset != (bfd_vma) - 1)
5367 {
5368 asection *splt;
5369 asection *sgot;
5370 asection *srela;
5371
5372 bfd_vma plt_index;
5373 bfd_vma got_offset;
5374 bfd_vma local_plt_offset;
5375 Elf_Internal_Rela rela;
5376
5377 /* This symbol has an entry in the procedure linkage table. Set
5378 it up. */
5379
5380 BFD_ASSERT (h->dynindx != -1);
5381
5382 splt = htab->root.splt;
5383 sgot = htab->root.sgotplt;
5384 srela = htab->root.srelplt;
5385 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5386
5387 /* Get the index in the procedure linkage table which
5388 corresponds to this symbol. This is the index of this symbol
5389 in all the symbols for which we are making plt entries. The
5390 first entry in the procedure linkage table is reserved. */
5391 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5392
5393 /* Get the offset into the .got table of the entry that
5394 corresponds to this function. Each .got entry is 4 bytes.
5395 The first three are reserved. */
5396 got_offset = (plt_index + 3) * 4;
5397
5398 /* Fill in the entry in the procedure linkage table. */
5399 if (!bfd_link_pic (info))
5400 {
5401 unsigned long insn;
5402
5403 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5404 + sgot->output_offset + got_offset) >> 12)
5405 & 0xfffff);
5406 bfd_putb32 (insn, splt->contents + h->plt.offset);
5407
5408 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5409 + sgot->output_offset + got_offset) & 0x0fff)
5410 >> 2);
5411 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5412
5413 insn = PLT_ENTRY_WORD2;
5414 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5415
5416 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5417 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5418
5419 insn = PLT_ENTRY_WORD4
5420 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5421 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5422 local_plt_offset = 12;
5423 }
5424 else
5425 {
5426 /* sda_base must be set at this time. */
5427 unsigned long insn;
5428 long offset;
5429
5430 /* FIXME, sda_base is 65536, it will damage opcode. */
5431 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5432 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5433 - elf_gp (output_bfd);
5434 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5435 bfd_putb32 (insn, splt->contents + h->plt.offset);
5436
5437 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5438 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5439
5440 insn = PLT_PIC_ENTRY_WORD2;
5441 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5442
5443 insn = PLT_PIC_ENTRY_WORD3;
5444 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5445
5446 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5447 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5448
5449 insn = PLT_PIC_ENTRY_WORD5
5450 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5451 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5452
5453 local_plt_offset = 16;
5454 }
5455
5456 /* Fill in the entry in the global offset table,
5457 so it will fall through to the next instruction for the first time. */
5458 bfd_put_32 (output_bfd,
5459 (splt->output_section->vma + splt->output_offset
5460 + h->plt.offset + local_plt_offset),
5461 sgot->contents + got_offset);
5462
5463 /* Fill in the entry in the .rela.plt section. */
5464 rela.r_offset = (sgot->output_section->vma
5465 + sgot->output_offset + got_offset);
5466 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5467 rela.r_addend = 0;
5468 loc = srela->contents;
5469 loc += plt_index * sizeof (Elf32_External_Rela);
5470 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5471
5472 if (!h->def_regular)
5473 {
5474 /* Mark the symbol as undefined, rather than as defined in
5475 the .plt section. Leave the value alone. */
5476 sym->st_shndx = SHN_UNDEF;
5477 if (!h->ref_regular_nonweak)
5478 sym->st_value = 0;
5479 }
5480 }
5481
5482 if (h->got.offset != (bfd_vma) - 1)
5483 {
5484 asection *sgot;
5485 asection *srela;
5486 Elf_Internal_Rela rela;
5487
5488 /* This symbol has an entry in the global offset table.
5489 Set it up. */
5490
5491 sgot = htab->root.sgot;
5492 srela = htab->root.srelgot;
5493 BFD_ASSERT (sgot != NULL && srela != NULL);
5494
5495 rela.r_offset = (sgot->output_section->vma
5496 + sgot->output_offset + (h->got.offset & ~1));
5497
5498 /* If this is a -Bsymbolic link, and the symbol is defined
5499 locally, we just want to emit a RELATIVE reloc. Likewise if
5500 the symbol was forced to be local because of a version file.
5501 The entry in the global offset table will already have been
5502 initialized in the relocate_section function. */
5503 if (bfd_link_pic (info)
5504 && (info->symbolic
5505 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5506 {
5507 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5508 rela.r_addend = (h->root.u.def.value
5509 + h->root.u.def.section->output_section->vma
5510 + h->root.u.def.section->output_offset);
5511 }
5512 else
5513 {
5514 BFD_ASSERT ((h->got.offset & 1) == 0);
5515 bfd_put_32 (output_bfd, (bfd_vma) 0,
5516 sgot->contents + h->got.offset);
5517 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5518 rela.r_addend = 0;
5519 }
5520
5521 loc = srela->contents;
5522 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5523 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5524 ++srela->reloc_count;
5525 }
5526
5527 if (h->needs_copy)
5528 {
5529 asection *s;
5530 Elf_Internal_Rela rela;
5531
5532 /* This symbols needs a copy reloc. Set it up. */
5533
5534 BFD_ASSERT (h->dynindx != -1
5535 && (h->root.type == bfd_link_hash_defined
5536 || h->root.type == bfd_link_hash_defweak));
5537
5538 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5539 BFD_ASSERT (s != NULL);
5540
5541 rela.r_offset = (h->root.u.def.value
5542 + h->root.u.def.section->output_section->vma
5543 + h->root.u.def.section->output_offset);
5544 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5545 rela.r_addend = 0;
5546 loc = s->contents;
5547 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5548 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5549 ++s->reloc_count;
5550 }
5551
5552 /* Mark some specially defined symbols as absolute. */
5553 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5554 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5555 sym->st_shndx = SHN_ABS;
5556
5557 return TRUE;
5558 }
5559
5560
5561 /* Finish up the dynamic sections. */
5562
5563 static bfd_boolean
5564 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5565 {
5566 struct elf_nds32_link_hash_table *htab;
5567 bfd *dynobj;
5568 asection *sdyn;
5569 asection *sgot;
5570
5571 htab = nds32_elf_hash_table (info);
5572 dynobj = htab->root.dynobj;
5573
5574 sgot = htab->root.sgotplt;
5575 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5576
5577 if (htab->root.dynamic_sections_created)
5578 {
5579 asection *splt;
5580 Elf32_External_Dyn *dyncon, *dynconend;
5581
5582 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5583
5584 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5585 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5586
5587 for (; dyncon < dynconend; dyncon++)
5588 {
5589 Elf_Internal_Dyn dyn;
5590 asection *s;
5591
5592 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5593
5594 switch (dyn.d_tag)
5595 {
5596 default:
5597 break;
5598
5599 case DT_PLTGOT:
5600 s = htab->root.sgotplt;
5601 goto get_vma;
5602 case DT_JMPREL:
5603 s = htab->root.srelplt;
5604 get_vma:
5605 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
5606 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5607 break;
5608
5609 case DT_PLTRELSZ:
5610 s = htab->root.srelplt;
5611 dyn.d_un.d_val = s->size;
5612 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5613 break;
5614 }
5615 }
5616
5617 /* Fill in the first entry in the procedure linkage table. */
5618 splt = htab->root.splt;
5619 if (splt && splt->size > 0)
5620 {
5621 if (bfd_link_pic (info))
5622 {
5623 unsigned long insn;
5624 long offset;
5625
5626 /* FIXME, sda_base is 65536, it will damage opcode. */
5627 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5628 offset = sgot->output_section->vma + sgot->output_offset + 4
5629 - elf_gp (output_bfd);
5630 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5631 bfd_putb32 (insn, splt->contents);
5632
5633 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5634 /* here has a typo? */
5635 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5636 bfd_putb32 (insn, splt->contents + 4);
5637
5638 insn = PLT0_PIC_ENTRY_WORD2;
5639 bfd_putb32 (insn, splt->contents + 8);
5640
5641 insn = PLT0_PIC_ENTRY_WORD3;
5642 bfd_putb32 (insn, splt->contents + 12);
5643
5644 insn = PLT0_PIC_ENTRY_WORD4;
5645 bfd_putb32 (insn, splt->contents + 16);
5646
5647 insn = PLT0_PIC_ENTRY_WORD5;
5648 bfd_putb32 (insn, splt->contents + 20);
5649 }
5650 else
5651 {
5652 unsigned long insn;
5653 unsigned long addr;
5654
5655 /* addr = .got + 4 */
5656 addr = sgot->output_section->vma + sgot->output_offset + 4;
5657 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5658 bfd_putb32 (insn, splt->contents);
5659
5660 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5661 bfd_putb32 (insn, splt->contents + 4);
5662
5663 insn = PLT0_ENTRY_WORD2;
5664 bfd_putb32 (insn, splt->contents + 8);
5665
5666 insn = PLT0_ENTRY_WORD3;
5667 bfd_putb32 (insn, splt->contents + 12);
5668
5669 insn = PLT0_ENTRY_WORD4;
5670 bfd_putb32 (insn, splt->contents + 16);
5671 }
5672
5673 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5674 PLT_ENTRY_SIZE;
5675 }
5676 }
5677
5678 /* Fill in the first three entries in the global offset table. */
5679 if (sgot && sgot->size > 0)
5680 {
5681 if (sdyn == NULL)
5682 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5683 else
5684 bfd_put_32 (output_bfd,
5685 sdyn->output_section->vma + sdyn->output_offset,
5686 sgot->contents);
5687 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5688 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5689
5690 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5691 }
5692
5693 return TRUE;
5694 }
5695 \f
5696
5697 /* Set the right machine number. */
5698
5699 static bfd_boolean
5700 nds32_elf_object_p (bfd *abfd)
5701 {
5702 static unsigned int cur_arch = 0;
5703
5704 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5705 {
5706 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5707 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5708 }
5709
5710 switch (cur_arch)
5711 {
5712 default:
5713 case E_N1_ARCH:
5714 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5715 break;
5716 case E_N1H_ARCH:
5717 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5718 break;
5719 case E_NDS_ARCH_STAR_V2_0:
5720 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5721 break;
5722 case E_NDS_ARCH_STAR_V3_0:
5723 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5724 break;
5725 case E_NDS_ARCH_STAR_V3_M:
5726 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5727 break;
5728 }
5729
5730 return TRUE;
5731 }
5732
5733 /* Store the machine number in the flags field. */
5734
5735 static void
5736 nds32_elf_final_write_processing (bfd *abfd,
5737 bfd_boolean linker ATTRIBUTE_UNUSED)
5738 {
5739 unsigned long val;
5740 static unsigned int cur_mach = 0;
5741
5742 if (bfd_mach_n1 != bfd_get_mach (abfd))
5743 {
5744 cur_mach = bfd_get_mach (abfd);
5745 }
5746
5747 switch (cur_mach)
5748 {
5749 case bfd_mach_n1:
5750 /* Only happen when object is empty, since the case is abandon. */
5751 val = E_N1_ARCH;
5752 val |= E_NDS_ABI_AABI;
5753 val |= E_NDS32_ELF_VER_1_4;
5754 break;
5755 case bfd_mach_n1h:
5756 val = E_N1H_ARCH;
5757 break;
5758 case bfd_mach_n1h_v2:
5759 val = E_NDS_ARCH_STAR_V2_0;
5760 break;
5761 case bfd_mach_n1h_v3:
5762 val = E_NDS_ARCH_STAR_V3_0;
5763 break;
5764 case bfd_mach_n1h_v3m:
5765 val = E_NDS_ARCH_STAR_V3_M;
5766 break;
5767 default:
5768 val = 0;
5769 break;
5770 }
5771
5772 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5773 elf_elfheader (abfd)->e_flags |= val;
5774 }
5775
5776 /* Function to keep NDS32 specific file flags. */
5777
5778 static bfd_boolean
5779 nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5780 {
5781 BFD_ASSERT (!elf_flags_init (abfd)
5782 || elf_elfheader (abfd)->e_flags == flags);
5783
5784 elf_elfheader (abfd)->e_flags = flags;
5785 elf_flags_init (abfd) = TRUE;
5786 return TRUE;
5787 }
5788
5789 static unsigned int
5790 convert_e_flags (unsigned int e_flags, unsigned int arch)
5791 {
5792 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5793 {
5794 /* From 0.9 to 1.0. */
5795 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5796
5797 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5798 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5799 if (arch == E_NDS_ARCH_STAR_V1_0)
5800 {
5801 /* Done. */
5802 return e_flags;
5803 }
5804 }
5805
5806 /* From 1.0 to 2.0. */
5807 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5808
5809 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5810 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5811
5812 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5813 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5814 return e_flags;
5815 }
5816
5817 static bfd_boolean
5818 nds32_check_vec_size (bfd *ibfd)
5819 {
5820 static unsigned int nds32_vec_size = 0;
5821
5822 asection *sec_t = NULL;
5823 bfd_byte *contents = NULL;
5824
5825 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5826
5827 if (sec_t && sec_t->size >= 4)
5828 {
5829 /* Get vec_size in file. */
5830 unsigned int flag_t;
5831
5832 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
5833 flag_t = bfd_get_32 (ibfd, contents);
5834
5835 /* The value could only be 4 or 16. */
5836
5837 if (!nds32_vec_size)
5838 /* Set if not set yet. */
5839 nds32_vec_size = (flag_t & 0x3);
5840 else if (nds32_vec_size != (flag_t & 0x3))
5841 {
5842 _bfd_error_handler
5843 /* xgettext:c-format */
5844 (_("%pB: ISR vector size mismatch"
5845 " with previous modules, previous %u-byte, current %u-byte"),
5846 ibfd,
5847 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5848 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5849 return FALSE;
5850 }
5851 else
5852 /* Only keep the first vec_size section. */
5853 sec_t->flags |= SEC_EXCLUDE;
5854 }
5855
5856 return TRUE;
5857 }
5858
5859 /* Merge backend specific data from an object file to the output
5860 object file when linking. */
5861
5862 static bfd_boolean
5863 nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
5864 {
5865 bfd *obfd = info->output_bfd;
5866 flagword out_flags;
5867 flagword in_flags;
5868 flagword out_16regs;
5869 flagword in_no_mac;
5870 flagword out_no_mac;
5871 flagword in_16regs;
5872 flagword out_version;
5873 flagword in_version;
5874 flagword out_fpu_config;
5875 flagword in_fpu_config;
5876
5877 /* TODO: Revise to use object-attributes instead. */
5878 if (!nds32_check_vec_size (ibfd))
5879 return FALSE;
5880
5881 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5882 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5883 return TRUE;
5884
5885 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5886 {
5887 _bfd_error_handler
5888 (_("%pB: warning: Endian mismatch with previous modules."), ibfd);
5889
5890 bfd_set_error (bfd_error_bad_value);
5891 return FALSE;
5892 }
5893
5894 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5895 if (in_version == E_NDS32_ELF_VER_1_2)
5896 {
5897 _bfd_error_handler
5898 (_("%pB: warning: Older version of object file encountered, "
5899 "Please recompile with current tool chain."), ibfd);
5900 }
5901
5902 /* We may need to merge V1 and V2 arch object files to V2. */
5903 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5904 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5905 {
5906 /* Need to convert version. */
5907 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5908 == E_NDS_ARCH_STAR_RESERVED)
5909 {
5910 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5911 }
5912 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5913 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5914 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5915 {
5916 elf_elfheader (obfd)->e_flags =
5917 convert_e_flags (elf_elfheader (obfd)->e_flags,
5918 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5919 }
5920 else
5921 {
5922 elf_elfheader (ibfd)->e_flags =
5923 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5924 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5925 }
5926 }
5927
5928 /* Extract some flags. */
5929 in_flags = elf_elfheader (ibfd)->e_flags
5930 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5931 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5932
5933 /* The following flags need special treatment. */
5934 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5935 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5936 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5937
5938 /* Extract some flags. */
5939 out_flags = elf_elfheader (obfd)->e_flags
5940 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5941 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5942
5943 /* The following flags need special treatment. */
5944 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5945 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5946 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5947 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5948 if (!elf_flags_init (obfd))
5949 {
5950 /* If the input is the default architecture then do not
5951 bother setting the flags for the output architecture,
5952 instead allow future merges to do this. If no future
5953 merges ever set these flags then they will retain their
5954 unitialised values, which surprise surprise, correspond
5955 to the default values. */
5956 if (bfd_get_arch_info (ibfd)->the_default)
5957 return TRUE;
5958
5959 elf_flags_init (obfd) = TRUE;
5960 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5961
5962 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5963 && bfd_get_arch_info (obfd)->the_default)
5964 {
5965 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5966 bfd_get_mach (ibfd));
5967 }
5968
5969 return TRUE;
5970 }
5971
5972 /* Check flag compatibility. */
5973 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5974 {
5975 _bfd_error_handler
5976 (_("%pB: error: ABI mismatch with previous modules."), ibfd);
5977
5978 bfd_set_error (bfd_error_bad_value);
5979 return FALSE;
5980 }
5981
5982 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5983 {
5984 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5985 {
5986 _bfd_error_handler
5987 (_("%pB: error: Instruction set mismatch with previous modules."), ibfd);
5988
5989 bfd_set_error (bfd_error_bad_value);
5990 return FALSE;
5991 }
5992 }
5993
5994 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
5995 and perf ext1 and DIV are mergerd to perf ext1. */
5996 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
5997 {
5998 elf_elfheader (obfd)->e_flags =
5999 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6000 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6001 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6002 ? E_NDS32_HAS_EXT_INST : 0)
6003 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6004 ? E_NDS32_HAS_EXT_INST : 0)
6005 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6006 | ((in_version > out_version) ? out_version : in_version);
6007 }
6008 else
6009 {
6010 if (in_version != out_version)
6011 _bfd_error_handler
6012 /* xgettext:c-format */
6013 (_("%pB: warning: Incompatible elf-versions %s and %s."),
6014 ibfd, nds32_elfver_strtab[out_version],
6015 nds32_elfver_strtab[in_version]);
6016
6017 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6018 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6019 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6020 | (in_version > out_version ? out_version : in_version);
6021 }
6022
6023 return TRUE;
6024 }
6025
6026 /* Display the flags field. */
6027
6028 static bfd_boolean
6029 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6030 {
6031 FILE *file = (FILE *) ptr;
6032
6033 BFD_ASSERT (abfd != NULL && ptr != NULL);
6034
6035 _bfd_elf_print_private_bfd_data (abfd, ptr);
6036
6037 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6038
6039 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6040 {
6041 default:
6042 case E_N1_ARCH:
6043 fprintf (file, _(": n1 instructions"));
6044 break;
6045 case E_N1H_ARCH:
6046 fprintf (file, _(": n1h instructions"));
6047 break;
6048 }
6049
6050 fputc ('\n', file);
6051
6052 return TRUE;
6053 }
6054
6055 static unsigned int
6056 nds32_elf_action_discarded (asection *sec)
6057 {
6058
6059 if (strncmp
6060 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6061 return 0;
6062
6063 return _bfd_elf_default_action_discarded (sec);
6064 }
6065
6066 static asection *
6067 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6068 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6069 Elf_Internal_Sym *sym)
6070 {
6071 if (h != NULL)
6072 switch (ELF32_R_TYPE (rel->r_info))
6073 {
6074 case R_NDS32_GNU_VTINHERIT:
6075 case R_NDS32_GNU_VTENTRY:
6076 case R_NDS32_RELA_GNU_VTINHERIT:
6077 case R_NDS32_RELA_GNU_VTENTRY:
6078 return NULL;
6079 }
6080
6081 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6082 }
6083
6084 /* Look through the relocs for a section during the first phase.
6085 Since we don't do .gots or .plts, we just need to consider the
6086 virtual table relocs for gc. */
6087
6088 static bfd_boolean
6089 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6090 asection *sec, const Elf_Internal_Rela *relocs)
6091 {
6092 Elf_Internal_Shdr *symtab_hdr;
6093 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6094 const Elf_Internal_Rela *rel;
6095 const Elf_Internal_Rela *rel_end;
6096 struct elf_nds32_link_hash_table *htab;
6097 bfd *dynobj;
6098 asection *sreloc = NULL;
6099
6100 if (bfd_link_relocatable (info))
6101 return TRUE;
6102
6103 /* Don't do anything special with non-loaded, non-alloced sections.
6104 In particular, any relocs in such sections should not affect GOT
6105 and PLT reference counting (ie. we don't allow them to create GOT
6106 or PLT entries), there's no possibility or desire to optimize TLS
6107 relocs, and there's not much point in propagating relocs to shared
6108 libs that the dynamic linker won't relocate. */
6109 if ((sec->flags & SEC_ALLOC) == 0)
6110 return TRUE;
6111
6112 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6113 sym_hashes = elf_sym_hashes (abfd);
6114 sym_hashes_end =
6115 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6116 if (!elf_bad_symtab (abfd))
6117 sym_hashes_end -= symtab_hdr->sh_info;
6118
6119 htab = nds32_elf_hash_table (info);
6120 dynobj = htab->root.dynobj;
6121
6122 rel_end = relocs + sec->reloc_count;
6123 for (rel = relocs; rel < rel_end; rel++)
6124 {
6125 enum elf_nds32_reloc_type r_type;
6126 struct elf_link_hash_entry *h;
6127 unsigned long r_symndx;
6128 int tls_type, old_tls_type;
6129
6130 r_symndx = ELF32_R_SYM (rel->r_info);
6131 r_type = ELF32_R_TYPE (rel->r_info);
6132 if (r_symndx < symtab_hdr->sh_info)
6133 h = NULL;
6134 else
6135 {
6136 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6137 while (h->root.type == bfd_link_hash_indirect
6138 || h->root.type == bfd_link_hash_warning)
6139 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6140 }
6141
6142 /* Some relocs require a global offset table. We create
6143 got section here, since these relocation need got section
6144 and it is not created yet. */
6145 if (htab->root.sgot == NULL)
6146 {
6147 switch (r_type)
6148 {
6149 case R_NDS32_GOT_HI20:
6150 case R_NDS32_GOT_LO12:
6151 case R_NDS32_GOT_LO15:
6152 case R_NDS32_GOT_LO19:
6153 case R_NDS32_GOT17S2_RELA:
6154 case R_NDS32_GOT15S2_RELA:
6155 case R_NDS32_GOTOFF:
6156 case R_NDS32_GOTOFF_HI20:
6157 case R_NDS32_GOTOFF_LO12:
6158 case R_NDS32_GOTOFF_LO15:
6159 case R_NDS32_GOTOFF_LO19:
6160 case R_NDS32_GOTPC20:
6161 case R_NDS32_GOTPC_HI20:
6162 case R_NDS32_GOTPC_LO12:
6163 case R_NDS32_GOT20:
6164 case R_NDS32_TLS_IE_HI20:
6165 case R_NDS32_TLS_IE_LO12S2:
6166 if (dynobj == NULL)
6167 htab->root.dynobj = dynobj = abfd;
6168 if (!_bfd_elf_create_got_section (dynobj, info))
6169 return FALSE;
6170 break;
6171
6172 default:
6173 break;
6174 }
6175 }
6176
6177 switch ((int) r_type)
6178 {
6179 case R_NDS32_GOT_HI20:
6180 case R_NDS32_GOT_LO12:
6181 case R_NDS32_GOT_LO15:
6182 case R_NDS32_GOT_LO19:
6183 case R_NDS32_GOT20:
6184 case R_NDS32_TLS_IE_HI20:
6185 case R_NDS32_TLS_IE_LO12S2:
6186 switch (r_type)
6187 {
6188 case R_NDS32_TLS_IE_HI20:
6189 case R_NDS32_TLS_IE_LO12S2:
6190 tls_type = GOT_TLS_IE;
6191 break;
6192 default:
6193 tls_type = GOT_NORMAL;
6194 break;
6195 }
6196 if (h != NULL)
6197 {
6198 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6199 h->got.refcount += 1;
6200 }
6201 else
6202 {
6203 bfd_signed_vma *local_got_refcounts;
6204
6205 /* This is a global offset table entry for a local
6206 symbol. */
6207 local_got_refcounts = elf_local_got_refcounts (abfd);
6208 if (local_got_refcounts == NULL)
6209 {
6210 bfd_size_type size;
6211
6212 size = symtab_hdr->sh_info;
6213 size *= sizeof (bfd_signed_vma);
6214 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6215 if (local_got_refcounts == NULL)
6216 return FALSE;
6217 elf_local_got_refcounts (abfd) = local_got_refcounts;
6218 }
6219 local_got_refcounts[r_symndx] += 1;
6220 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
6221 }
6222
6223 /* We will already have issued an error message if there
6224 is a TLS/non-TLS mismatch, based on the symbol
6225 type. So just combine any TLS types needed. */
6226 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6227 && tls_type != GOT_NORMAL)
6228 tls_type |= old_tls_type;
6229
6230 if (old_tls_type != tls_type)
6231 {
6232 if (h != NULL)
6233 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6234 else
6235 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6236 }
6237 break;
6238 case R_NDS32_9_PLTREL:
6239 case R_NDS32_25_PLTREL:
6240 case R_NDS32_PLTREL_HI20:
6241 case R_NDS32_PLTREL_LO12:
6242 case R_NDS32_PLT_GOTREL_HI20:
6243 case R_NDS32_PLT_GOTREL_LO12:
6244 case R_NDS32_PLT_GOTREL_LO15:
6245 case R_NDS32_PLT_GOTREL_LO19:
6246 case R_NDS32_PLT_GOTREL_LO20:
6247
6248 /* This symbol requires a procedure linkage table entry. We
6249 actually build the entry in adjust_dynamic_symbol,
6250 because this might be a case of linking PIC code without
6251 linking in any dynamic objects, in which case we don't
6252 need to generate a procedure linkage table after all. */
6253
6254 /* If this is a local symbol, we resolve it directly without
6255 creating a procedure linkage table entry. */
6256 if (h == NULL)
6257 continue;
6258
6259 if (h->forced_local)
6260 break;
6261
6262 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
6263 h->needs_plt = 1;
6264 h->plt.refcount += 1;
6265 break;
6266
6267 case R_NDS32_16_RELA:
6268 case R_NDS32_20_RELA:
6269 case R_NDS32_5_RELA:
6270 case R_NDS32_32_RELA:
6271 case R_NDS32_HI20_RELA:
6272 case R_NDS32_LO12S3_RELA:
6273 case R_NDS32_LO12S2_RELA:
6274 case R_NDS32_LO12S2_DP_RELA:
6275 case R_NDS32_LO12S2_SP_RELA:
6276 case R_NDS32_LO12S1_RELA:
6277 case R_NDS32_LO12S0_RELA:
6278 case R_NDS32_LO12S0_ORI_RELA:
6279 case R_NDS32_SDA16S3_RELA:
6280 case R_NDS32_SDA17S2_RELA:
6281 case R_NDS32_SDA18S1_RELA:
6282 case R_NDS32_SDA19S0_RELA:
6283 case R_NDS32_SDA15S3_RELA:
6284 case R_NDS32_SDA15S2_RELA:
6285 case R_NDS32_SDA12S2_DP_RELA:
6286 case R_NDS32_SDA12S2_SP_RELA:
6287 case R_NDS32_SDA15S1_RELA:
6288 case R_NDS32_SDA15S0_RELA:
6289 case R_NDS32_SDA_FP7U2_RELA:
6290 case R_NDS32_15_PCREL_RELA:
6291 case R_NDS32_17_PCREL_RELA:
6292 case R_NDS32_25_PCREL_RELA:
6293
6294 if (h != NULL && !bfd_link_pic (info))
6295 {
6296 h->non_got_ref = 1;
6297 h->plt.refcount += 1;
6298 }
6299
6300 /* If we are creating a shared library, and this is a reloc against
6301 a global symbol, or a non PC relative reloc against a local
6302 symbol, then we need to copy the reloc into the shared library.
6303 However, if we are linking with -Bsymbolic, we do not need to
6304 copy a reloc against a global symbol which is defined in an
6305 object we are including in the link (i.e., DEF_REGULAR is set).
6306 At this point we have not seen all the input files, so it is
6307 possible that DEF_REGULAR is not set now but will be set later
6308 (it is never cleared). We account for that possibility below by
6309 storing information in the dyn_relocs field of the hash table
6310 entry. A similar situation occurs when creating shared libraries
6311 and symbol visibility changes render the symbol local.
6312
6313 If on the other hand, we are creating an executable, we may need
6314 to keep relocations for symbols satisfied by a dynamic library
6315 if we manage to avoid copy relocs for the symbol. */
6316 if ((bfd_link_pic (info)
6317 && (sec->flags & SEC_ALLOC) != 0
6318 && ((r_type != R_NDS32_25_PCREL_RELA
6319 && r_type != R_NDS32_15_PCREL_RELA
6320 && r_type != R_NDS32_17_PCREL_RELA
6321 && !(r_type == R_NDS32_32_RELA
6322 && strcmp (sec->name, ".eh_frame") == 0))
6323 || (h != NULL
6324 && (!info->symbolic
6325 || h->root.type == bfd_link_hash_defweak
6326 || !h->def_regular))))
6327 || (!bfd_link_pic (info)
6328 && (sec->flags & SEC_ALLOC) != 0
6329 && h != NULL
6330 && (h->root.type == bfd_link_hash_defweak
6331 || !h->def_regular)))
6332 {
6333 struct elf_dyn_relocs *p;
6334 struct elf_dyn_relocs **head;
6335
6336 if (dynobj == NULL)
6337 htab->root.dynobj = dynobj = abfd;
6338
6339 /* When creating a shared object, we must copy these
6340 relocs into the output file. We create a reloc
6341 section in dynobj and make room for the reloc. */
6342 if (sreloc == NULL)
6343 {
6344 const char *name;
6345
6346 name = bfd_elf_string_from_elf_section
6347 (abfd, elf_elfheader (abfd)->e_shstrndx,
6348 elf_section_data (sec)->rela.hdr->sh_name);
6349 if (name == NULL)
6350 return FALSE;
6351
6352 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6353 && strcmp (bfd_get_section_name (abfd, sec),
6354 name + 5) == 0);
6355
6356 sreloc = bfd_get_section_by_name (dynobj, name);
6357 if (sreloc == NULL)
6358 {
6359 flagword flags;
6360
6361 sreloc = bfd_make_section (dynobj, name);
6362 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6363 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6364 if ((sec->flags & SEC_ALLOC) != 0)
6365 flags |= SEC_ALLOC | SEC_LOAD;
6366 if (sreloc == NULL
6367 || !bfd_set_section_flags (dynobj, sreloc, flags)
6368 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6369 return FALSE;
6370
6371 elf_section_type (sreloc) = SHT_RELA;
6372 }
6373 elf_section_data (sec)->sreloc = sreloc;
6374 }
6375
6376 /* If this is a global symbol, we count the number of
6377 relocations we need for this symbol. */
6378 if (h != NULL)
6379 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6380 else
6381 {
6382 asection *s;
6383 void *vpp;
6384
6385 Elf_Internal_Sym *isym;
6386 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6387 if (isym == NULL)
6388 return FALSE;
6389
6390 /* Track dynamic relocs needed for local syms too. */
6391 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6392 if (s == NULL)
6393 return FALSE;
6394
6395 vpp = &elf_section_data (s)->local_dynrel;
6396 head = (struct elf_dyn_relocs **) vpp;
6397 }
6398
6399 p = *head;
6400 if (p == NULL || p->sec != sec)
6401 {
6402 bfd_size_type amt = sizeof (*p);
6403 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
6404 if (p == NULL)
6405 return FALSE;
6406 p->next = *head;
6407 *head = p;
6408 p->sec = sec;
6409 p->count = 0;
6410 p->pc_count = 0;
6411 }
6412
6413 p->count += 1;
6414 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6415 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6416 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6417 p->pc_count += 1;
6418 }
6419 break;
6420
6421 /* This relocation describes the C++ object vtable hierarchy.
6422 Reconstruct it for later use during GC. */
6423 case R_NDS32_RELA_GNU_VTINHERIT:
6424 case R_NDS32_GNU_VTINHERIT:
6425 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6426 return FALSE;
6427 break;
6428
6429 /* This relocation describes which C++ vtable entries are actually
6430 used. Record for later use during GC. */
6431 case R_NDS32_GNU_VTENTRY:
6432 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6433 return FALSE;
6434 break;
6435 case R_NDS32_RELA_GNU_VTENTRY:
6436 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6437 return FALSE;
6438 break;
6439 }
6440 }
6441
6442 return TRUE;
6443 }
6444
6445 /* Write VAL in uleb128 format to P, returning a pointer to the
6446 following byte.
6447 This code is copied from elf-attr.c. */
6448
6449 static bfd_byte *
6450 write_uleb128 (bfd_byte *p, unsigned int val)
6451 {
6452 bfd_byte c;
6453 do
6454 {
6455 c = val & 0x7f;
6456 val >>= 7;
6457 if (val)
6458 c |= 0x80;
6459 *(p++) = c;
6460 }
6461 while (val);
6462 return p;
6463 }
6464
6465 static bfd_signed_vma
6466 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6467 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6468 int *pic_ext_target)
6469 {
6470 bfd_signed_vma foff;
6471 bfd_vma symval, addend;
6472 asection *sym_sec;
6473
6474 /* Get the value of the symbol referred to by the reloc. */
6475 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6476 {
6477 Elf_Internal_Sym *isym;
6478
6479 /* A local symbol. */
6480 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6481
6482 if (isym->st_shndx == SHN_UNDEF)
6483 sym_sec = bfd_und_section_ptr;
6484 else if (isym->st_shndx == SHN_ABS)
6485 sym_sec = bfd_abs_section_ptr;
6486 else if (isym->st_shndx == SHN_COMMON)
6487 sym_sec = bfd_com_section_ptr;
6488 else
6489 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6490 symval = isym->st_value + sym_sec->output_section->vma
6491 + sym_sec->output_offset;
6492 }
6493 else
6494 {
6495 unsigned long indx;
6496 struct elf_link_hash_entry *h;
6497 bfd *owner;
6498
6499 /* An external symbol. */
6500 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6501 h = elf_sym_hashes (abfd)[indx];
6502 BFD_ASSERT (h != NULL);
6503
6504 if (h->root.type != bfd_link_hash_defined
6505 && h->root.type != bfd_link_hash_defweak)
6506 /* This appears to be a reference to an undefined
6507 symbol. Just ignore it--it will be caught by the
6508 regular reloc processing. */
6509 return 0;
6510 owner = h->root.u.def.section->owner;
6511 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6512 *pic_ext_target = 1;
6513
6514 if (h->root.u.def.section->flags & SEC_MERGE)
6515 {
6516 sym_sec = h->root.u.def.section;
6517 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6518 elf_section_data (sym_sec)->sec_info,
6519 h->root.u.def.value);
6520 symval = symval + sym_sec->output_section->vma
6521 + sym_sec->output_offset;
6522 }
6523 else
6524 symval = (h->root.u.def.value
6525 + h->root.u.def.section->output_section->vma
6526 + h->root.u.def.section->output_offset);
6527 }
6528
6529 addend = irel->r_addend;
6530
6531 foff = (symval + addend
6532 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6533 return foff;
6534 }
6535
6536 static bfd_vma
6537 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6538 Elf_Internal_Sym *isymbuf,
6539 Elf_Internal_Rela *irel,
6540 Elf_Internal_Shdr *symtab_hdr)
6541 {
6542 bfd_vma symval;
6543
6544 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6545 {
6546 Elf_Internal_Sym *isym;
6547 asection *sym_sec;
6548 /* A local symbol. */
6549 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6550
6551 if (isym->st_shndx == SHN_UNDEF)
6552 sym_sec = bfd_und_section_ptr;
6553 else if (isym->st_shndx == SHN_ABS)
6554 sym_sec = bfd_abs_section_ptr;
6555 else if (isym->st_shndx == SHN_COMMON)
6556 sym_sec = bfd_com_section_ptr;
6557 else
6558 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6559 symval = isym->st_value + sym_sec->output_section->vma
6560 + sym_sec->output_offset;
6561 }
6562 else
6563 {
6564 unsigned long indx;
6565 struct elf_link_hash_entry *h;
6566 struct elf_nds32_link_hash_table *htab;
6567 asection *splt;
6568
6569 /* An external symbol. */
6570 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6571 h = elf_sym_hashes (abfd)[indx];
6572 BFD_ASSERT (h != NULL);
6573 htab = nds32_elf_hash_table (link_info);
6574 splt = htab->root.splt;
6575
6576 while (h->root.type == bfd_link_hash_indirect
6577 || h->root.type == bfd_link_hash_warning)
6578 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6579
6580 if (h->plt.offset == (bfd_vma) - 1)
6581 {
6582 if (h->root.type != bfd_link_hash_defined
6583 && h->root.type != bfd_link_hash_defweak)
6584 /* This appears to be a reference to an undefined
6585 * symbol. Just ignore it--it will be caught by the
6586 * regular reloc processing. */
6587 return 0;
6588 symval = (h->root.u.def.value
6589 + h->root.u.def.section->output_section->vma
6590 + h->root.u.def.section->output_offset);
6591 }
6592 else
6593 symval = splt->output_section->vma + h->plt.offset;
6594 }
6595
6596 return symval;
6597 }
6598
6599 static bfd_signed_vma
6600 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6601 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6602 Elf_Internal_Shdr *symtab_hdr)
6603 {
6604 bfd_vma foff;
6605 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6606 symtab_hdr)) == 0)
6607 return 0;
6608 else
6609 return foff - (irel->r_offset
6610 + sec->output_section->vma + sec->output_offset);
6611 }
6612 \f
6613 /* Convert a 32-bit instruction to 16-bit one.
6614 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6615 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6616 type of INSN16. Return 1 if successful. */
6617
6618 static int
6619 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6620 int *pinsn_type)
6621 {
6622 uint16_t insn16 = 0;
6623 int insn_type = 0;
6624 unsigned long mach = bfd_get_mach (abfd);
6625
6626 if (N32_SH5 (insn) != 0)
6627 return 0;
6628
6629 switch (N32_SUB5 (insn))
6630 {
6631 case N32_ALU1_ADD_SLLI:
6632 case N32_ALU1_ADD_SRLI:
6633 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6634 {
6635 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6636 N32_RB5 (insn));
6637 insn_type = NDS32_INSN_ADD333;
6638 }
6639 else if (N32_IS_RT4 (insn))
6640 {
6641 if (N32_RT5 (insn) == N32_RA5 (insn))
6642 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6643 else if (N32_RT5 (insn) == N32_RB5 (insn))
6644 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6645 insn_type = NDS32_INSN_ADD45;
6646 }
6647 break;
6648
6649 case N32_ALU1_SUB_SLLI:
6650 case N32_ALU1_SUB_SRLI:
6651 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6652 {
6653 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6654 N32_RB5 (insn));
6655 insn_type = NDS32_INSN_SUB333;
6656 }
6657 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6658 {
6659 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6660 insn_type = NDS32_INSN_SUB45;
6661 }
6662 break;
6663
6664 case N32_ALU1_AND_SLLI:
6665 case N32_ALU1_AND_SRLI:
6666 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6667 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6668 && N32_IS_RB3 (insn))
6669 {
6670 if (N32_RT5 (insn) == N32_RA5 (insn))
6671 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6672 else if (N32_RT5 (insn) == N32_RB5 (insn))
6673 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6674 if (insn16)
6675 insn_type = NDS32_INSN_AND33;
6676 }
6677 break;
6678
6679 case N32_ALU1_XOR_SLLI:
6680 case N32_ALU1_XOR_SRLI:
6681 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6682 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6683 && N32_IS_RB3 (insn))
6684 {
6685 if (N32_RT5 (insn) == N32_RA5 (insn))
6686 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6687 else if (N32_RT5 (insn) == N32_RB5 (insn))
6688 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6689 if (insn16)
6690 insn_type = NDS32_INSN_XOR33;
6691 }
6692 break;
6693
6694 case N32_ALU1_OR_SLLI:
6695 case N32_ALU1_OR_SRLI:
6696 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6697 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6698 && N32_IS_RB3 (insn))
6699 {
6700 if (N32_RT5 (insn) == N32_RA5 (insn))
6701 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6702 else if (N32_RT5 (insn) == N32_RB5 (insn))
6703 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6704 if (insn16)
6705 insn_type = NDS32_INSN_OR33;
6706 }
6707 break;
6708 case N32_ALU1_NOR:
6709 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6710 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6711 && N32_RA5 (insn) == N32_RB5 (insn))
6712 {
6713 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6714 insn_type = NDS32_INSN_NOT33;
6715 }
6716 break;
6717 case N32_ALU1_SRAI:
6718 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6719 {
6720 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6721 insn_type = NDS32_INSN_SRAI45;
6722 }
6723 break;
6724
6725 case N32_ALU1_SRLI:
6726 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6727 {
6728 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6729 insn_type = NDS32_INSN_SRLI45;
6730 }
6731 break;
6732
6733 case N32_ALU1_SLLI:
6734 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6735 {
6736 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6737 N32_UB5 (insn));
6738 insn_type = NDS32_INSN_SLLI333;
6739 }
6740 break;
6741
6742 case N32_ALU1_ZEH:
6743 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6744 {
6745 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6746 insn_type = NDS32_INSN_ZEH33;
6747 }
6748 break;
6749
6750 case N32_ALU1_SEB:
6751 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6752 {
6753 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6754 insn_type = NDS32_INSN_SEB33;
6755 }
6756 break;
6757
6758 case N32_ALU1_SEH:
6759 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6760 {
6761 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6762 insn_type = NDS32_INSN_SEH33;
6763 }
6764 break;
6765
6766 case N32_ALU1_SLT:
6767 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6768 {
6769 /* Implicit r15. */
6770 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6771 insn_type = NDS32_INSN_SLT45;
6772 }
6773 break;
6774
6775 case N32_ALU1_SLTS:
6776 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6777 {
6778 /* Implicit r15. */
6779 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6780 insn_type = NDS32_INSN_SLTS45;
6781 }
6782 break;
6783 }
6784
6785 if ((insn16 & 0x8000) == 0)
6786 return 0;
6787
6788 if (pinsn16)
6789 *pinsn16 = insn16;
6790 if (pinsn_type)
6791 *pinsn_type = insn_type;
6792 return 1;
6793 }
6794
6795 static int
6796 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6797 int *pinsn_type)
6798 {
6799 uint16_t insn16 = 0;
6800 int insn_type;
6801 unsigned long mach = bfd_get_mach (abfd);
6802
6803 /* TODO: bset, bclr, btgl, btst. */
6804 if (__GF (insn, 6, 4) != 0)
6805 return 0;
6806
6807 switch (N32_IMMU (insn, 6))
6808 {
6809 case N32_ALU2_MUL:
6810 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6811 && N32_IS_RB3 (insn))
6812 {
6813 if (N32_RT5 (insn) == N32_RA5 (insn))
6814 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6815 else if (N32_RT5 (insn) == N32_RB5 (insn))
6816 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6817 if (insn16)
6818 insn_type = NDS32_INSN_MUL33;
6819 }
6820 }
6821
6822 if ((insn16 & 0x8000) == 0)
6823 return 0;
6824
6825 if (pinsn16)
6826 *pinsn16 = insn16;
6827 if (pinsn_type)
6828 *pinsn_type = insn_type;
6829 return 1;
6830 }
6831
6832 int
6833 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6834 int *pinsn_type)
6835 {
6836 int op6;
6837 uint16_t insn16 = 0;
6838 int insn_type;
6839 unsigned long mach = bfd_get_mach (abfd);
6840
6841 /* Decode 32-bit instruction. */
6842 if (insn & 0x80000000)
6843 {
6844 /* Not 32-bit insn. */
6845 return 0;
6846 }
6847
6848 op6 = N32_OP6 (insn);
6849
6850 /* Convert it to 16-bit instruction. */
6851 switch (op6)
6852 {
6853 case N32_OP6_MOVI:
6854 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6855 {
6856 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6857 insn_type = NDS32_INSN_MOVI55;
6858 }
6859 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6860 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6861 {
6862 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6863 N32_IMM20S (insn) - 16);
6864 insn_type = NDS32_INSN_MOVPI45;
6865 }
6866 break;
6867
6868 case N32_OP6_ADDI:
6869 if (N32_IMM15S (insn) == 0)
6870 {
6871 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6872 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6873 if (mach <= MACH_V2
6874 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6875 {
6876 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6877 insn_type = NDS32_INSN_MOV55;
6878 }
6879 }
6880 else if (N32_IMM15S (insn) > 0)
6881 {
6882 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6883 {
6884 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6885 N32_IMM15S (insn));
6886 insn_type = NDS32_INSN_ADDI333;
6887 }
6888 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6889 && N32_IMM15S (insn) < 32)
6890 {
6891 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6892 insn_type = NDS32_INSN_ADDI45;
6893 }
6894 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6895 && N32_RT5 (insn) == N32_RA5 (insn)
6896 && N32_IMM15S (insn) < 512)
6897 {
6898 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6899 insn_type = NDS32_INSN_ADDI10_SP;
6900 }
6901 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6902 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6903 && (N32_IMM15S (insn) % 4 == 0))
6904 {
6905 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6906 N32_IMM15S (insn) >> 2);
6907 insn_type = NDS32_INSN_ADDRI36_SP;
6908 }
6909 }
6910 else
6911 {
6912 /* Less than 0. */
6913 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6914 {
6915 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6916 0 - N32_IMM15S (insn));
6917 insn_type = NDS32_INSN_SUBI333;
6918 }
6919 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6920 && N32_IMM15S (insn) > -32)
6921 {
6922 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6923 0 - N32_IMM15S (insn));
6924 insn_type = NDS32_INSN_SUBI45;
6925 }
6926 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6927 && N32_RT5 (insn) == N32_RA5 (insn)
6928 && N32_IMM15S (insn) >= -512)
6929 {
6930 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6931 insn_type = NDS32_INSN_ADDI10_SP;
6932 }
6933 }
6934 break;
6935
6936 case N32_OP6_ORI:
6937 if (N32_IMM15S (insn) == 0)
6938 {
6939 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6940 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6941 if (mach <= MACH_V2
6942 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6943 {
6944 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6945 insn_type = NDS32_INSN_MOV55;
6946 }
6947 }
6948 break;
6949
6950 case N32_OP6_SUBRI:
6951 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6952 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6953 {
6954 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6955 insn_type = NDS32_INSN_NEG33;
6956 }
6957 break;
6958
6959 case N32_OP6_ANDI:
6960 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6961 {
6962 if (N32_IMM15U (insn) == 1)
6963 {
6964 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6965 insn_type = NDS32_INSN_XLSB33;
6966 }
6967 else if (N32_IMM15U (insn) == 0x7ff)
6968 {
6969 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6970 insn_type = NDS32_INSN_X11B33;
6971 }
6972 else if (N32_IMM15U (insn) == 0xff)
6973 {
6974 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6975 insn_type = NDS32_INSN_ZEB33;
6976 }
6977 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6978 && N32_IMM15U (insn) < 256)
6979 {
6980 int imm15u = N32_IMM15U (insn);
6981
6982 if (__builtin_popcount (imm15u) == 1)
6983 {
6984 /* BMSKI33 */
6985 int imm3u = __builtin_ctz (imm15u);
6986
6987 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
6988 insn_type = NDS32_INSN_BMSKI33;
6989 }
6990 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
6991 {
6992 /* FEXTI33 */
6993 int imm3u = __builtin_ctz (imm15u + 1) - 1;
6994
6995 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
6996 insn_type = NDS32_INSN_FEXTI33;
6997 }
6998 }
6999 }
7000 break;
7001
7002 case N32_OP6_SLTI:
7003 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7004 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7005 {
7006 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7007 insn_type = NDS32_INSN_SLTI45;
7008 }
7009 break;
7010
7011 case N32_OP6_SLTSI:
7012 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7013 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7014 {
7015 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7016 insn_type = NDS32_INSN_SLTSI45;
7017 }
7018 break;
7019
7020 case N32_OP6_LWI:
7021 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7022 {
7023 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7024 insn_type = NDS32_INSN_LWI450;
7025 }
7026 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7027 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7028 {
7029 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7030 N32_IMM15S (insn));
7031 insn_type = NDS32_INSN_LWI333;
7032 }
7033 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7034 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7035 {
7036 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7037 insn_type = NDS32_INSN_LWI37;
7038 }
7039 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7040 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7041 {
7042 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7043 insn_type = NDS32_INSN_LWI37_SP;
7044 }
7045 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7046 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7047 {
7048 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7049 N32_IMM15S (insn) + 32);
7050 insn_type = NDS32_INSN_LWI45_FE;
7051 }
7052 break;
7053
7054 case N32_OP6_SWI:
7055 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7056 {
7057 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7058 insn_type = NDS32_INSN_SWI450;
7059 }
7060 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7061 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7062 {
7063 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7064 N32_IMM15S (insn));
7065 insn_type = NDS32_INSN_SWI333;
7066 }
7067 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7068 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7069 {
7070 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7071 insn_type = NDS32_INSN_SWI37;
7072 }
7073 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7074 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7075 {
7076 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7077 insn_type = NDS32_INSN_SWI37_SP;
7078 }
7079 break;
7080
7081 case N32_OP6_LWI_BI:
7082 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7083 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7084 {
7085 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7086 N32_IMM15S (insn));
7087 insn_type = NDS32_INSN_LWI333_BI;
7088 }
7089 break;
7090
7091 case N32_OP6_SWI_BI:
7092 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7093 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7094 {
7095 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7096 N32_IMM15S (insn));
7097 insn_type = NDS32_INSN_SWI333_BI;
7098 }
7099 break;
7100
7101 case N32_OP6_LHI:
7102 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7103 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7104 {
7105 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7106 N32_IMM15S (insn));
7107 insn_type = NDS32_INSN_LHI333;
7108 }
7109 break;
7110
7111 case N32_OP6_SHI:
7112 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7113 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7114 {
7115 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7116 N32_IMM15S (insn));
7117 insn_type = NDS32_INSN_SHI333;
7118 }
7119 break;
7120
7121 case N32_OP6_LBI:
7122 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7123 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7124 {
7125 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7126 N32_IMM15S (insn));
7127 insn_type = NDS32_INSN_LBI333;
7128 }
7129 break;
7130
7131 case N32_OP6_SBI:
7132 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7133 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7134 {
7135 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7136 N32_IMM15S (insn));
7137 insn_type = NDS32_INSN_SBI333;
7138 }
7139 break;
7140
7141 case N32_OP6_ALU1:
7142 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7143
7144 case N32_OP6_ALU2:
7145 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7146
7147 case N32_OP6_BR1:
7148 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7149 goto done;
7150
7151 if ((insn & N32_BIT (14)) == 0)
7152 {
7153 /* N32_BR1_BEQ */
7154 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7155 && N32_RT5 (insn) != REG_R5)
7156 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7157 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7158 && N32_RA5 (insn) != REG_R5)
7159 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7160 insn_type = NDS32_INSN_BEQS38;
7161 break;
7162 }
7163 else
7164 {
7165 /* N32_BR1_BNE */
7166 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7167 && N32_RT5 (insn) != REG_R5)
7168 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7169 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7170 && N32_RA5 (insn) != REG_R5)
7171 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7172 insn_type = NDS32_INSN_BNES38;
7173 break;
7174 }
7175 break;
7176
7177 case N32_OP6_BR2:
7178 switch (N32_BR2_SUB (insn))
7179 {
7180 case N32_BR2_BEQZ:
7181 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7182 {
7183 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7184 insn_type = NDS32_INSN_BEQZ38;
7185 }
7186 else if (N32_RT5 (insn) == REG_R15
7187 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7188 {
7189 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7190 insn_type = NDS32_INSN_BEQZS8;
7191 }
7192 break;
7193
7194 case N32_BR2_BNEZ:
7195 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7196 {
7197 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7198 insn_type = NDS32_INSN_BNEZ38;
7199 }
7200 else if (N32_RT5 (insn) == REG_R15
7201 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7202 {
7203 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7204 insn_type = NDS32_INSN_BNEZS8;
7205 }
7206 break;
7207
7208 case N32_BR2_IFCALL:
7209 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7210 {
7211 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7212 insn_type = NDS32_INSN_IFCALL9;
7213 }
7214 break;
7215 }
7216 break;
7217
7218 case N32_OP6_JI:
7219 if ((insn & N32_BIT (24)) == 0)
7220 {
7221 /* N32_JI_J */
7222 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7223 {
7224 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7225 insn_type = NDS32_INSN_J8;
7226 }
7227 }
7228 break;
7229
7230 case N32_OP6_JREG:
7231 if (__GF (insn, 8, 2) != 0)
7232 goto done;
7233
7234 switch (N32_IMMU (insn, 5))
7235 {
7236 case N32_JREG_JR:
7237 if (N32_JREG_HINT (insn) == 0)
7238 {
7239 /* jr */
7240 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7241 insn_type = NDS32_INSN_JR5;
7242 }
7243 else if (N32_JREG_HINT (insn) == 1)
7244 {
7245 /* ret */
7246 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7247 insn_type = NDS32_INSN_RET5;
7248 }
7249 else if (N32_JREG_HINT (insn) == 3)
7250 {
7251 /* ifret = mov55 $sp, $sp */
7252 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7253 insn_type = NDS32_INSN_IFRET;
7254 }
7255 break;
7256
7257 case N32_JREG_JRAL:
7258 /* It's convertible when return rt5 is $lp and address
7259 translation is kept. */
7260 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7261 {
7262 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7263 insn_type = NDS32_INSN_JRAL5;
7264 }
7265 break;
7266 }
7267 break;
7268
7269 case N32_OP6_MISC:
7270 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7271 {
7272 /* For v3, swid above 31 are used for ex9.it. */
7273 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7274 insn_type = NDS32_INSN_BREAK16;
7275 }
7276 break;
7277
7278 default:
7279 /* This instruction has no 16-bit variant. */
7280 goto done;
7281 }
7282
7283 done:
7284 /* Bit-15 of insn16 should be set for a valid instruction. */
7285 if ((insn16 & 0x8000) == 0)
7286 return 0;
7287
7288 if (pinsn16)
7289 *pinsn16 = insn16;
7290 if (pinsn_type)
7291 *pinsn_type = insn_type;
7292 return 1;
7293 }
7294
7295 static int
7296 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7297 Elf_Internal_Rela *reloc)
7298 {
7299 uint16_t insn16 = 0;
7300
7301 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7302 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7303 return 0;
7304
7305 if (!N32_IS_RT3 (insn))
7306 return 0;
7307
7308 switch (N32_OP6 (insn))
7309 {
7310 case N32_OP6_LWI:
7311 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7312 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7313 break;
7314 case N32_OP6_SWI:
7315 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7316 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7317 break;
7318 case N32_OP6_HWGP:
7319 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7320 break;
7321
7322 if (__GF (insn, 17, 3) == 6)
7323 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7324 else if (__GF (insn, 17, 3) == 7)
7325 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7326 break;
7327 }
7328
7329 if ((insn16 & 0x8000) == 0)
7330 return 0;
7331
7332 *pinsn16 = insn16;
7333 return 1;
7334 }
7335
7336 /* Convert a 16-bit instruction to 32-bit one.
7337 INSN16 it the input and PINSN it the point to output.
7338 Return non-zero on successful. Otherwise 0 is returned. */
7339
7340 int
7341 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7342 {
7343 uint32_t insn = 0xffffffff;
7344 unsigned long mach = bfd_get_mach (abfd);
7345
7346 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7347
7348 switch (__GF (insn16, 9, 6))
7349 {
7350 case 0x4: /* add45 */
7351 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7352 N16_RA5 (insn16));
7353 goto done;
7354 case 0x5: /* sub45 */
7355 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7356 N16_RA5 (insn16));
7357 goto done;
7358 case 0x6: /* addi45 */
7359 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7360 N16_IMM5U (insn16));
7361 goto done;
7362 case 0x7: /* subi45 */
7363 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7364 -N16_IMM5U (insn16));
7365 goto done;
7366 case 0x8: /* srai45 */
7367 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7368 N16_IMM5U (insn16));
7369 goto done;
7370 case 0x9: /* srli45 */
7371 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7372 N16_IMM5U (insn16));
7373 goto done;
7374 case 0xa: /* slli333 */
7375 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7376 N16_IMM3U (insn16));
7377 goto done;
7378 case 0xc: /* add333 */
7379 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7380 N16_RB3 (insn16));
7381 goto done;
7382 case 0xd: /* sub333 */
7383 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7384 N16_RB3 (insn16));
7385 goto done;
7386 case 0xe: /* addi333 */
7387 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7388 N16_IMM3U (insn16));
7389 goto done;
7390 case 0xf: /* subi333 */
7391 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7392 -N16_IMM3U (insn16));
7393 goto done;
7394 case 0x10: /* lwi333 */
7395 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7396 N16_IMM3U (insn16));
7397 goto done;
7398 case 0x12: /* lhi333 */
7399 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7400 N16_IMM3U (insn16));
7401 goto done;
7402 case 0x13: /* lbi333 */
7403 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7404 N16_IMM3U (insn16));
7405 goto done;
7406 case 0x11: /* lwi333.bi */
7407 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7408 N16_IMM3U (insn16));
7409 goto done;
7410 case 0x14: /* swi333 */
7411 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7412 N16_IMM3U (insn16));
7413 goto done;
7414 case 0x16: /* shi333 */
7415 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7416 N16_IMM3U (insn16));
7417 goto done;
7418 case 0x17: /* sbi333 */
7419 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7420 N16_IMM3U (insn16));
7421 goto done;
7422 case 0x15: /* swi333.bi */
7423 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7424 N16_IMM3U (insn16));
7425 goto done;
7426 case 0x18: /* addri36.sp */
7427 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7428 N16_IMM6U (insn16) << 2);
7429 goto done;
7430 case 0x19: /* lwi45.fe */
7431 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7432 (N16_IMM5U (insn16) - 32));
7433 goto done;
7434 case 0x1a: /* lwi450 */
7435 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7436 goto done;
7437 case 0x1b: /* swi450 */
7438 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7439 goto done;
7440
7441 /* These are r15 implied instructions. */
7442 case 0x30: /* slts45 */
7443 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7444 goto done;
7445 case 0x31: /* slt45 */
7446 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7447 goto done;
7448 case 0x32: /* sltsi45 */
7449 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7450 goto done;
7451 case 0x33: /* slti45 */
7452 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7453 goto done;
7454 case 0x34: /* beqzs8, bnezs8 */
7455 if (insn16 & N32_BIT (8))
7456 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7457 else
7458 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7459 goto done;
7460
7461 case 0x35: /* break16, ex9.it */
7462 /* Only consider range of v3 break16. */
7463 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7464 goto done;
7465
7466 case 0x3c: /* ifcall9 */
7467 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7468 goto done;
7469 case 0x3d: /* movpi45 */
7470 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7471 goto done;
7472
7473 case 0x3f: /* MISC33 */
7474 switch (insn16 & 0x7)
7475 {
7476 case 2: /* neg33 */
7477 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7478 break;
7479 case 3: /* not33 */
7480 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7481 N16_RA3 (insn16));
7482 break;
7483 case 4: /* mul33 */
7484 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7485 N16_RA3 (insn16));
7486 break;
7487 case 5: /* xor33 */
7488 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7489 N16_RA3 (insn16));
7490 break;
7491 case 6: /* and33 */
7492 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7493 N16_RA3 (insn16));
7494 break;
7495 case 7: /* or33 */
7496 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7497 N16_RA3 (insn16));
7498 break;
7499 }
7500 goto done;
7501
7502 case 0xb:
7503 switch (insn16 & 0x7)
7504 {
7505 case 0: /* zeb33 */
7506 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7507 break;
7508 case 1: /* zeh33 */
7509 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7510 break;
7511 case 2: /* seb33 */
7512 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7513 break;
7514 case 3: /* seh33 */
7515 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7516 break;
7517 case 4: /* xlsb33 */
7518 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7519 break;
7520 case 5: /* x11b33 */
7521 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7522 break;
7523 case 6: /* bmski33 */
7524 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7525 1 << __GF (insn16, 3, 3));
7526 break;
7527 case 7: /* fexti33 */
7528 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7529 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
7530 break;
7531 }
7532 goto done;
7533 }
7534
7535 switch (__GF (insn16, 10, 5))
7536 {
7537 case 0x0: /* mov55 or ifret16 */
7538 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7539 && N16_RT5 (insn16) == N16_RA5 (insn16))
7540 insn = N32_JREG (JR, 0, 0, 0, 3);
7541 else
7542 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7543 goto done;
7544 case 0x1: /* movi55 */
7545 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7546 goto done;
7547 case 0x1b: /* addi10s (V2) */
7548 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7549 goto done;
7550 }
7551
7552 switch (__GF (insn16, 11, 4))
7553 {
7554 case 0x7: /* lwi37.fp/swi37.fp */
7555 if (insn16 & N32_BIT (7)) /* swi37.fp */
7556 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7557 else /* lwi37.fp */
7558 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7559 goto done;
7560 case 0x8: /* beqz38 */
7561 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7562 goto done;
7563 case 0x9: /* bnez38 */
7564 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7565 goto done;
7566 case 0xa: /* beqs38/j8, implied r5 */
7567 if (N16_RT38 (insn16) == 5)
7568 insn = N32_JI (J, N16_IMM8S (insn16));
7569 else
7570 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7571 goto done;
7572 case 0xb: /* bnes38 and others */
7573 if (N16_RT38 (insn16) == 5)
7574 {
7575 switch (__GF (insn16, 5, 3))
7576 {
7577 case 0: /* jr5 */
7578 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7579 break;
7580 case 4: /* ret5 */
7581 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7582 break;
7583 case 1: /* jral5 */
7584 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7585 break;
7586 case 2: /* ex9.it imm5 */
7587 /* ex9.it had no 32-bit variantl. */
7588 break;
7589 case 5: /* add5.pc */
7590 /* add5.pc had no 32-bit variantl. */
7591 break;
7592 }
7593 }
7594 else /* bnes38 */
7595 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7596 goto done;
7597 case 0xe: /* lwi37/swi37 */
7598 if (insn16 & (1 << 7)) /* swi37.sp */
7599 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7600 else /* lwi37.sp */
7601 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7602 goto done;
7603 }
7604
7605 done:
7606 if (insn & 0x80000000)
7607 return 0;
7608
7609 if (pinsn)
7610 *pinsn = insn;
7611 return 1;
7612 }
7613 \f
7614 static bfd_boolean
7615 is_sda_access_insn (unsigned long insn)
7616 {
7617 switch (N32_OP6 (insn))
7618 {
7619 case N32_OP6_LWI:
7620 case N32_OP6_LHI:
7621 case N32_OP6_LHSI:
7622 case N32_OP6_LBI:
7623 case N32_OP6_LBSI:
7624 case N32_OP6_SWI:
7625 case N32_OP6_SHI:
7626 case N32_OP6_SBI:
7627 case N32_OP6_LWC:
7628 case N32_OP6_LDC:
7629 case N32_OP6_SWC:
7630 case N32_OP6_SDC:
7631 return TRUE;
7632 default:
7633 ;
7634 }
7635 return FALSE;
7636 }
7637
7638 static unsigned long
7639 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7640 {
7641 uint32_t oinsn = 0;
7642
7643 switch (type)
7644 {
7645 case R_NDS32_GOT_LO12:
7646 case R_NDS32_GOTOFF_LO12:
7647 case R_NDS32_PLTREL_LO12:
7648 case R_NDS32_PLT_GOTREL_LO12:
7649 case R_NDS32_LO12S0_RELA:
7650 switch (N32_OP6 (insn))
7651 {
7652 case N32_OP6_LBI:
7653 /* lbi.gp */
7654 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7655 break;
7656 case N32_OP6_LBSI:
7657 /* lbsi.gp */
7658 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
7659 break;
7660 case N32_OP6_SBI:
7661 /* sbi.gp */
7662 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7663 break;
7664 case N32_OP6_ORI:
7665 /* addi.gp */
7666 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
7667 break;
7668 }
7669 break;
7670
7671 case R_NDS32_LO12S1_RELA:
7672 switch (N32_OP6 (insn))
7673 {
7674 case N32_OP6_LHI:
7675 /* lhi.gp */
7676 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7677 break;
7678 case N32_OP6_LHSI:
7679 /* lhsi.gp */
7680 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
7681 break;
7682 case N32_OP6_SHI:
7683 /* shi.gp */
7684 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
7685 break;
7686 }
7687 break;
7688
7689 case R_NDS32_LO12S2_RELA:
7690 switch (N32_OP6 (insn))
7691 {
7692 case N32_OP6_LWI:
7693 /* lwi.gp */
7694 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7695 break;
7696 case N32_OP6_SWI:
7697 /* swi.gp */
7698 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7699 break;
7700 }
7701 break;
7702
7703 case R_NDS32_LO12S2_DP_RELA:
7704 case R_NDS32_LO12S2_SP_RELA:
7705 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7706 break;
7707 }
7708
7709 if (oinsn)
7710 *pinsn = oinsn;
7711
7712 return oinsn != 0;
7713 }
7714
7715 /* Linker hasn't found the correct merge section for non-section symbol
7716 in relax time, this work is left to the function elf_link_input_bfd().
7717 So for non-section symbol, _bfd_merged_section_offset is also needed
7718 to find the correct symbol address. */
7719
7720 static bfd_vma
7721 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7722 asection **psec, Elf_Internal_Rela *rel)
7723 {
7724 asection *sec = *psec;
7725 bfd_vma relocation;
7726
7727 relocation = (sec->output_section->vma
7728 + sec->output_offset + sym->st_value);
7729 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7730 {
7731 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7732 rel->r_addend =
7733 _bfd_merged_section_offset (abfd, psec,
7734 elf_section_data (sec)->sec_info,
7735 sym->st_value + rel->r_addend);
7736 else
7737 rel->r_addend =
7738 _bfd_merged_section_offset (abfd, psec,
7739 elf_section_data (sec)->sec_info,
7740 sym->st_value) + rel->r_addend;
7741
7742 if (sec != *psec)
7743 {
7744 /* If we have changed the section, and our original section is
7745 marked with SEC_EXCLUDE, it means that the original
7746 SEC_MERGE section has been completely subsumed in some
7747 other SEC_MERGE section. In this case, we need to leave
7748 some info around for --emit-relocs. */
7749 if ((sec->flags & SEC_EXCLUDE) != 0)
7750 sec->kept_section = *psec;
7751 sec = *psec;
7752 }
7753 rel->r_addend -= relocation;
7754 rel->r_addend += sec->output_section->vma + sec->output_offset;
7755 }
7756 return relocation;
7757 }
7758
7759 static bfd_vma
7760 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7761 Elf_Internal_Sym *isymbuf,
7762 Elf_Internal_Shdr *symtab_hdr)
7763 {
7764 bfd_signed_vma foff;
7765 bfd_vma symval, addend;
7766 Elf_Internal_Rela irel_fn;
7767 Elf_Internal_Sym *isym;
7768 asection *sym_sec;
7769
7770 /* Get the value of the symbol referred to by the reloc. */
7771 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7772 {
7773 /* A local symbol. */
7774 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7775
7776 if (isym->st_shndx == SHN_UNDEF)
7777 sym_sec = bfd_und_section_ptr;
7778 else if (isym->st_shndx == SHN_ABS)
7779 sym_sec = bfd_abs_section_ptr;
7780 else if (isym->st_shndx == SHN_COMMON)
7781 sym_sec = bfd_com_section_ptr;
7782 else
7783 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7784 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7785 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7786 addend = irel_fn.r_addend;
7787 }
7788 else
7789 {
7790 unsigned long indx;
7791 struct elf_link_hash_entry *h;
7792
7793 /* An external symbol. */
7794 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7795 h = elf_sym_hashes (abfd)[indx];
7796 BFD_ASSERT (h != NULL);
7797
7798 while (h->root.type == bfd_link_hash_indirect
7799 || h->root.type == bfd_link_hash_warning)
7800 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7801
7802 if (h->root.type != bfd_link_hash_defined
7803 && h->root.type != bfd_link_hash_defweak)
7804 /* This appears to be a reference to an undefined
7805 symbol. Just ignore it--it will be caught by the
7806 regular reloc processing. */
7807 return 0;
7808
7809 if (h->root.u.def.section->flags & SEC_MERGE)
7810 {
7811 sym_sec = h->root.u.def.section;
7812 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7813 (sym_sec)->sec_info, h->root.u.def.value);
7814 symval = symval + sym_sec->output_section->vma
7815 + sym_sec->output_offset;
7816 }
7817 else
7818 symval = (h->root.u.def.value
7819 + h->root.u.def.section->output_section->vma
7820 + h->root.u.def.section->output_offset);
7821 addend = irel->r_addend;
7822 }
7823
7824 foff = symval + addend;
7825
7826 return foff;
7827 }
7828
7829 static bfd_vma
7830 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7831 Elf_Internal_Rela *irel,
7832 Elf_Internal_Shdr *symtab_hdr)
7833 {
7834 int symndx;
7835 bfd_vma *local_got_offsets;
7836 /* Get the value of the symbol referred to by the reloc. */
7837 struct elf_link_hash_entry *h;
7838 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7839
7840 /* An external symbol. */
7841 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7842 h = elf_sym_hashes (abfd)[symndx];
7843 while (h->root.type == bfd_link_hash_indirect
7844 || h->root.type == bfd_link_hash_warning)
7845 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7846
7847 if (symndx >= 0)
7848 {
7849 BFD_ASSERT (h != NULL);
7850 return (htab->root.sgot->output_section->vma
7851 + htab->root.sgot->output_offset
7852 + h->got.offset);
7853 }
7854 else
7855 {
7856 local_got_offsets = elf_local_got_offsets (abfd);
7857 BFD_ASSERT (local_got_offsets != NULL);
7858 return (htab->root.sgot->output_section->vma
7859 + htab->root.sgot->output_offset
7860 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
7861 }
7862
7863 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7864 /* The check of h->root.type is passed. */
7865 }
7866
7867 static int
7868 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7869 asection *sec, Elf_Internal_Rela *rel)
7870 {
7871 bfd_byte *contents;
7872 unsigned short insn16;
7873
7874 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7875 return FALSE;
7876 contents = elf_section_data (sec)->this_hdr.contents;
7877 insn16 = bfd_getb16 (contents + rel->r_offset);
7878 if (insn16 == NDS32_NOP16)
7879 return TRUE;
7880 return FALSE;
7881 }
7882
7883 /* It checks whether the instruction could be converted to
7884 16-bit form and returns the converted one.
7885
7886 `internal_relocs' is supposed to be sorted. */
7887
7888 static int
7889 is_convert_32_to_16 (bfd *abfd, asection *sec,
7890 Elf_Internal_Rela *reloc,
7891 Elf_Internal_Rela *internal_relocs,
7892 Elf_Internal_Rela *irelend,
7893 uint16_t *insn16)
7894 {
7895 #define NORMAL_32_TO_16 (1 << 0)
7896 #define SPECIAL_32_TO_16 (1 << 1)
7897 bfd_byte *contents = NULL;
7898 bfd_signed_vma off;
7899 bfd_vma mem_addr;
7900 uint32_t insn = 0;
7901 Elf_Internal_Rela *pc_rel;
7902 int pic_ext_target = 0;
7903 Elf_Internal_Shdr *symtab_hdr;
7904 Elf_Internal_Sym *isymbuf = NULL;
7905 int convert_type;
7906 bfd_vma offset;
7907
7908 if (reloc->r_offset + 4 > sec->size)
7909 return FALSE;
7910
7911 offset = reloc->r_offset;
7912
7913 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
7914 return FALSE;
7915 insn = bfd_getb32 (contents + offset);
7916
7917 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7918 convert_type = NORMAL_32_TO_16;
7919 else if (special_convert_32_to_16 (insn, insn16, reloc))
7920 convert_type = SPECIAL_32_TO_16;
7921 else
7922 return FALSE;
7923
7924 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7925 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7926 return FALSE;
7927
7928 /* Find the first relocation of the same relocation-type,
7929 so we iteratie them forward. */
7930 pc_rel = reloc;
7931 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
7932 pc_rel--;
7933
7934 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7935 {
7936 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7937 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7938 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7939 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7940 {
7941 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7942 &pic_ext_target);
7943 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
7944 || off == 0)
7945 return FALSE;
7946 break;
7947 }
7948 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7949 {
7950 /* movi => movi55 */
7951 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
7952 symtab_hdr);
7953 /* mem_addr is unsigned, but the value should
7954 be between [-16, 15]. */
7955 if ((mem_addr + 0x10) >> 5)
7956 return FALSE;
7957 break;
7958 }
7959 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
7960 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
7961 {
7962 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
7963 because it can be relaxed to addi for TLS_LE_ADD. */
7964 return FALSE;
7965 }
7966 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7967 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7968 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7969 && convert_type == SPECIAL_32_TO_16)
7970 {
7971 /* fp-as-gp
7972 We've selected a best fp-base for this access, so we can
7973 always resolve it anyway. Do nothing. */
7974 break;
7975 }
7976 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7977 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7978 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7979 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7980 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7981 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7982 {
7983 /* Prevent unresolved addi instruction translate
7984 to addi45 or addi333. */
7985 return FALSE;
7986 }
7987 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
7988 {
7989 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7990 &pic_ext_target);
7991 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
7992 return FALSE;
7993 break;
7994 }
7995 }
7996
7997 return TRUE;
7998 }
7999
8000 static void
8001 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8002 Elf_Internal_Rela *reloc,
8003 Elf_Internal_Rela *internal_relocs,
8004 Elf_Internal_Rela *irelend,
8005 unsigned short insn16)
8006 {
8007 Elf_Internal_Rela *pc_rel;
8008 bfd_vma offset;
8009
8010 offset = reloc->r_offset;
8011 bfd_putb16 (insn16, contents + offset);
8012 /* Find the first relocation of the same relocation-type,
8013 so we iteratie them forward. */
8014 pc_rel = reloc;
8015 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8016 pc_rel--;
8017
8018 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8019 {
8020 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8021 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8022 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8023 {
8024 pc_rel->r_info =
8025 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8026 }
8027 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8028 pc_rel->r_info =
8029 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8030 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8031 pc_rel->r_info =
8032 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8033 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8034 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8035 pc_rel->r_info =
8036 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
8037 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8038 pc_rel->r_info =
8039 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
8040 }
8041 }
8042
8043 /* Find a relocation of type specified by `reloc_type'
8044 of the same r_offset with reloc.
8045 If not found, return irelend.
8046
8047 Assuming relocations are sorted by r_offset,
8048 we find the relocation from `reloc' backward untill relocs,
8049 or find it from `reloc' forward untill irelend. */
8050
8051 static Elf_Internal_Rela *
8052 find_relocs_at_address (Elf_Internal_Rela *reloc,
8053 Elf_Internal_Rela *relocs,
8054 Elf_Internal_Rela *irelend,
8055 enum elf_nds32_reloc_type reloc_type)
8056 {
8057 Elf_Internal_Rela *rel_t;
8058
8059 /* Find backward. */
8060 for (rel_t = reloc;
8061 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8062 rel_t--)
8063 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8064 return rel_t;
8065
8066 /* We didn't find it backward. Try find it forward. */
8067 for (rel_t = reloc;
8068 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8069 rel_t++)
8070 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8071 return rel_t;
8072
8073 return irelend;
8074 }
8075
8076 /* Find a relocation of specified type and offset.
8077 `reloc' is just a refence point to find a relocation at specified offset.
8078 If not found, return irelend.
8079
8080 Assuming relocations are sorted by r_offset,
8081 we find the relocation from `reloc' backward untill relocs,
8082 or find it from `reloc' forward untill irelend. */
8083
8084 static Elf_Internal_Rela *
8085 find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8086 Elf_Internal_Rela *relocs,
8087 Elf_Internal_Rela *irelend,
8088 enum elf_nds32_reloc_type reloc_type,
8089 bfd_vma offset_p)
8090 {
8091 Elf_Internal_Rela *rel_t = NULL;
8092
8093 /* First, we try to find a relocation of offset `offset_p',
8094 and then we use find_relocs_at_address to find specific type. */
8095
8096 if (reloc->r_offset > offset_p)
8097 {
8098 /* Find backward. */
8099 for (rel_t = reloc;
8100 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8101 /* Do nothing. */;
8102 }
8103 else if (reloc->r_offset < offset_p)
8104 {
8105 /* Find forward. */
8106 for (rel_t = reloc;
8107 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8108 /* Do nothing. */;
8109 }
8110 else
8111 rel_t = reloc;
8112
8113 /* Not found? */
8114 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8115 return irelend;
8116
8117 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8118 }
8119
8120 static bfd_boolean
8121 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8122 Elf_Internal_Rela *internal_relocs,
8123 Elf_Internal_Rela *irelend,
8124 unsigned char reloc_type)
8125 {
8126 Elf_Internal_Rela *rel_t;
8127
8128 for (rel_t = reloc;
8129 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8130 rel_t--)
8131 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8132 {
8133 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8134 && rel_t->r_addend == reloc->r_addend)
8135 continue;
8136 return TRUE;
8137 }
8138
8139 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8140 rel_t++)
8141 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8142 {
8143 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8144 && rel_t->r_addend == reloc->r_addend)
8145 continue;
8146 return TRUE;
8147 }
8148
8149 return FALSE;
8150 }
8151
8152 typedef struct nds32_elf_blank nds32_elf_blank_t;
8153 struct nds32_elf_blank
8154 {
8155 /* Where the blank begins. */
8156 bfd_vma offset;
8157 /* The size of the blank. */
8158 bfd_vma size;
8159 /* The accumulative size before this blank. */
8160 bfd_vma total_size;
8161 nds32_elf_blank_t *next;
8162 nds32_elf_blank_t *prev;
8163 };
8164
8165 static nds32_elf_blank_t *blank_free_list = NULL;
8166
8167 static nds32_elf_blank_t *
8168 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8169 {
8170 nds32_elf_blank_t *blank_t;
8171
8172 if (blank_free_list)
8173 {
8174 blank_t = blank_free_list;
8175 blank_free_list = blank_free_list->next;
8176 }
8177 else
8178 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8179
8180 if (blank_t == NULL)
8181 return NULL;
8182
8183 blank_t->offset = offset_p;
8184 blank_t->size = size_p;
8185 blank_t->total_size = 0;
8186 blank_t->next = NULL;
8187 blank_t->prev = NULL;
8188
8189 return blank_t;
8190 }
8191
8192 static void
8193 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8194 {
8195 if (blank_free_list)
8196 {
8197 blank_free_list->prev = blank_p;
8198 blank_p->next = blank_free_list;
8199 }
8200 else
8201 blank_p->next = NULL;
8202
8203 blank_p->prev = NULL;
8204 blank_free_list = blank_p;
8205 }
8206
8207 static void
8208 clean_nds32_elf_blank (void)
8209 {
8210 nds32_elf_blank_t *blank_t;
8211
8212 while (blank_free_list)
8213 {
8214 blank_t = blank_free_list;
8215 blank_free_list = blank_free_list->next;
8216 free (blank_t);
8217 }
8218 }
8219
8220 static nds32_elf_blank_t *
8221 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8222 {
8223 nds32_elf_blank_t *blank_t;
8224
8225 if (!blank_p)
8226 return NULL;
8227 blank_t = blank_p;
8228
8229 while (blank_t && addr < blank_t->offset)
8230 blank_t = blank_t->prev;
8231 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8232 blank_t = blank_t->next;
8233
8234 return blank_t;
8235 }
8236
8237 static bfd_vma
8238 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8239 int overwrite)
8240 {
8241 nds32_elf_blank_t *blank_t;
8242
8243 blank_t = search_nds32_elf_blank (*blank_p, addr);
8244 if (!blank_t)
8245 return 0;
8246
8247 if (overwrite)
8248 *blank_p = blank_t;
8249
8250 if (addr < blank_t->offset + blank_t->size)
8251 return blank_t->total_size + (addr - blank_t->offset);
8252 else
8253 return blank_t->total_size + blank_t->size;
8254 }
8255
8256 static bfd_boolean
8257 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8258 {
8259 nds32_elf_blank_t *blank_t, *blank_t2;
8260
8261 if (!*blank_p)
8262 {
8263 *blank_p = create_nds32_elf_blank (addr, len);
8264 return *blank_p ? TRUE : FALSE;
8265 }
8266
8267 blank_t = search_nds32_elf_blank (*blank_p, addr);
8268
8269 if (blank_t == NULL)
8270 {
8271 blank_t = create_nds32_elf_blank (addr, len);
8272 if (!blank_t)
8273 return FALSE;
8274 while ((*blank_p)->prev != NULL)
8275 *blank_p = (*blank_p)->prev;
8276 blank_t->next = *blank_p;
8277 (*blank_p)->prev = blank_t;
8278 (*blank_p) = blank_t;
8279 return TRUE;
8280 }
8281
8282 if (addr < blank_t->offset + blank_t->size)
8283 {
8284 if (addr > blank_t->offset + blank_t->size)
8285 blank_t->size = addr - blank_t->offset;
8286 }
8287 else
8288 {
8289 blank_t2 = create_nds32_elf_blank (addr, len);
8290 if (!blank_t2)
8291 return FALSE;
8292 if (blank_t->next)
8293 {
8294 blank_t->next->prev = blank_t2;
8295 blank_t2->next = blank_t->next;
8296 }
8297 blank_t2->prev = blank_t;
8298 blank_t->next = blank_t2;
8299 *blank_p = blank_t2;
8300 }
8301
8302 return TRUE;
8303 }
8304
8305 static bfd_boolean
8306 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8307 bfd_vma len)
8308 {
8309 nds32_elf_blank_t *blank_t;
8310
8311 if (!insert_nds32_elf_blank (blank_p, addr, len))
8312 return FALSE;
8313
8314 blank_t = *blank_p;
8315
8316 if (!blank_t->prev)
8317 {
8318 blank_t->total_size = 0;
8319 blank_t = blank_t->next;
8320 }
8321
8322 while (blank_t)
8323 {
8324 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8325 blank_t = blank_t->next;
8326 }
8327
8328 return TRUE;
8329 }
8330
8331 static void
8332 calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8333 {
8334 nds32_elf_blank_t *blank_t;
8335 bfd_vma total_size = 0;
8336
8337 if (!blank_p)
8338 return;
8339
8340 blank_t = blank_p;
8341 while (blank_t->prev)
8342 blank_t = blank_t->prev;
8343 while (blank_t)
8344 {
8345 blank_t->total_size = total_size;
8346 total_size += blank_t->size;
8347 blank_t = blank_t->next;
8348 }
8349 }
8350
8351 static bfd_boolean
8352 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8353 nds32_elf_blank_t *blank_p)
8354 {
8355 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
8356 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
8357 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8358 unsigned int sec_shndx; /* The section the be relaxed. */
8359 bfd_byte *contents; /* Contents data of iterating section. */
8360 Elf_Internal_Rela *internal_relocs;
8361 Elf_Internal_Rela *irel;
8362 Elf_Internal_Rela *irelend;
8363 struct elf_link_hash_entry **sym_hashes;
8364 struct elf_link_hash_entry **end_hashes;
8365 unsigned int symcount;
8366 asection *sect;
8367 nds32_elf_blank_t *blank_t;
8368 nds32_elf_blank_t *blank_t2;
8369 nds32_elf_blank_t *blank_head;
8370
8371 blank_head = blank_t = blank_p;
8372 while (blank_head->prev != NULL)
8373 blank_head = blank_head->prev;
8374 while (blank_t->next != NULL)
8375 blank_t = blank_t->next;
8376
8377 if (blank_t->offset + blank_t->size <= sec->size)
8378 {
8379 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8380 blank_t->next->prev = blank_t;
8381 }
8382 if (blank_head->offset > 0)
8383 {
8384 blank_head->prev = create_nds32_elf_blank (0, 0);
8385 blank_head->prev->next = blank_head;
8386 blank_head = blank_head->prev;
8387 }
8388
8389 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8390
8391 /* The deletion must stop at the next ALIGN reloc for an alignment
8392 power larger than the number of bytes we are deleting. */
8393
8394 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8395 if (!nds32_get_local_syms (abfd, sec, &isym))
8396 return FALSE;
8397
8398 if (isym == NULL)
8399 {
8400 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8401 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8402 symtab_hdr->contents = (bfd_byte *) isym;
8403 }
8404
8405 if (isym == NULL || symtab_hdr->sh_info == 0)
8406 return FALSE;
8407
8408 blank_t = blank_head;
8409 calc_nds32_blank_total (blank_head);
8410
8411 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8412 {
8413 /* Adjust all the relocs. */
8414
8415 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8416 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8417 TRUE /* keep_memory */);
8418 irelend = internal_relocs + sect->reloc_count;
8419
8420 blank_t = blank_head;
8421 blank_t2 = blank_head;
8422
8423 if (!(sect->flags & SEC_RELOC))
8424 continue;
8425
8426 nds32_get_section_contents (abfd, sect, &contents, TRUE);
8427
8428 for (irel = internal_relocs; irel < irelend; irel++)
8429 {
8430 bfd_vma raddr;
8431
8432 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8433 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8434 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8435 {
8436 unsigned long val = 0;
8437 unsigned long mask;
8438 long before, between;
8439 long offset = 0;
8440
8441 switch (ELF32_R_TYPE (irel->r_info))
8442 {
8443 case R_NDS32_DIFF8:
8444 offset = bfd_get_8 (abfd, contents + irel->r_offset);
8445 break;
8446 case R_NDS32_DIFF16:
8447 offset = bfd_get_16 (abfd, contents + irel->r_offset);
8448 break;
8449 case R_NDS32_DIFF32:
8450 val = bfd_get_32 (abfd, contents + irel->r_offset);
8451 /* Get the signed bit and mask for the high part. The
8452 gcc will alarm when right shift 32-bit since the
8453 type size of long may be 32-bit. */
8454 mask = 0 - (val >> 31);
8455 if (mask)
8456 offset = (val | (mask - 0xffffffff));
8457 else
8458 offset = val;
8459 break;
8460 default:
8461 BFD_ASSERT (0);
8462 }
8463
8464 /* DIFF value
8465 0 |encoded in location|
8466 |------------|-------------------|---------
8467 sym+off(addend)
8468 -- before ---| *****************
8469 --------------------- between ---|
8470
8471 We only care how much data are relax between DIFF,
8472 marked as ***. */
8473
8474 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8475 between = get_nds32_elf_blank_total (&blank_t,
8476 irel->r_addend + offset, 0);
8477 if (between == before)
8478 goto done_adjust_diff;
8479
8480 switch (ELF32_R_TYPE (irel->r_info))
8481 {
8482 case R_NDS32_DIFF8:
8483 bfd_put_8 (abfd, offset - (between - before),
8484 contents + irel->r_offset);
8485 break;
8486 case R_NDS32_DIFF16:
8487 bfd_put_16 (abfd, offset - (between - before),
8488 contents + irel->r_offset);
8489 break;
8490 case R_NDS32_DIFF32:
8491 bfd_put_32 (abfd, offset - (between - before),
8492 contents + irel->r_offset);
8493 break;
8494 }
8495 }
8496 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8497 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8498 {
8499 bfd_vma val = 0;
8500 unsigned int len = 0;
8501 unsigned long before, between;
8502 bfd_byte *endp, *p;
8503
8504 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8505 &len);
8506
8507 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8508 between = get_nds32_elf_blank_total (&blank_t,
8509 irel->r_addend + val, 0);
8510 if (between == before)
8511 goto done_adjust_diff;
8512
8513 p = contents + irel->r_offset;
8514 endp = p + len -1;
8515 memset (p, 0x80, len);
8516 *(endp) = 0;
8517 p = write_uleb128 (p, val - (between - before)) - 1;
8518 if (p < endp)
8519 *p |= 0x80;
8520 }
8521 done_adjust_diff:
8522
8523 if (sec == sect)
8524 {
8525 raddr = irel->r_offset;
8526 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8527 irel->r_offset, 1);
8528
8529 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8530 continue;
8531 if (blank_t2 && blank_t2->next
8532 && (blank_t2->offset > raddr
8533 || blank_t2->next->offset <= raddr))
8534 _bfd_error_handler
8535 (_("%pB: Error: search_nds32_elf_blank reports wrong node\n"), abfd);
8536
8537 /* Mark reloc in deleted portion as NONE.
8538 For some relocs like R_NDS32_LABEL that doesn't modify the
8539 content in the section. R_NDS32_LABEL doesn't belong to the
8540 instruction in the section, so we should preserve it. */
8541 if (raddr >= blank_t2->offset
8542 && raddr < blank_t2->offset + blank_t2->size
8543 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8544 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8545 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8546 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8547 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8548 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8549 {
8550 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8551 R_NDS32_NONE);
8552 continue;
8553 }
8554 }
8555
8556 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8557 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8558 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8559 continue;
8560
8561 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8562 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8563 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8564 {
8565 if (irel->r_addend <= sec->size)
8566 irel->r_addend -=
8567 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8568 }
8569 }
8570 }
8571
8572 /* Adjust the local symbols defined in this section. */
8573 blank_t = blank_head;
8574 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8575 {
8576 if (isym->st_shndx == sec_shndx)
8577 {
8578 if (isym->st_value <= sec->size)
8579 {
8580 bfd_vma ahead;
8581 bfd_vma orig_addr = isym->st_value;
8582
8583 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8584 isym->st_value -= ahead;
8585
8586 /* Adjust function size. */
8587 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8588 && isym->st_size > 0)
8589 isym->st_size -=
8590 get_nds32_elf_blank_total
8591 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8592 }
8593 }
8594 }
8595
8596 /* Now adjust the global symbols defined in this section. */
8597 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8598 - symtab_hdr->sh_info);
8599 sym_hashes = elf_sym_hashes (abfd);
8600 end_hashes = sym_hashes + symcount;
8601 blank_t = blank_head;
8602 for (; sym_hashes < end_hashes; sym_hashes++)
8603 {
8604 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8605
8606 if ((sym_hash->root.type == bfd_link_hash_defined
8607 || sym_hash->root.type == bfd_link_hash_defweak)
8608 && sym_hash->root.u.def.section == sec)
8609 {
8610 if (sym_hash->root.u.def.value <= sec->size)
8611 {
8612 bfd_vma ahead;
8613 bfd_vma orig_addr = sym_hash->root.u.def.value;
8614
8615 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8616 sym_hash->root.u.def.value -= ahead;
8617
8618 /* Adjust function size. */
8619 if (sym_hash->type == STT_FUNC)
8620 sym_hash->size -=
8621 get_nds32_elf_blank_total
8622 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8623
8624 }
8625 }
8626 }
8627
8628 contents = elf_section_data (sec)->this_hdr.contents;
8629 blank_t = blank_head;
8630 while (blank_t->next)
8631 {
8632 /* Actually delete the bytes. */
8633
8634 /* If current blank is the last blank overlap with current section,
8635 go to finish process. */
8636 if (sec->size <= (blank_t->next->offset))
8637 break;
8638
8639 memmove (contents + blank_t->offset - blank_t->total_size,
8640 contents + blank_t->offset + blank_t->size,
8641 blank_t->next->offset - (blank_t->offset + blank_t->size));
8642
8643 blank_t = blank_t->next;
8644 }
8645
8646 if (sec->size > (blank_t->offset + blank_t->size))
8647 {
8648 /* There are remaining code between blank and section boundary.
8649 Move the remaining code to appropriate location. */
8650 memmove (contents + blank_t->offset - blank_t->total_size,
8651 contents + blank_t->offset + blank_t->size,
8652 sec->size - (blank_t->offset + blank_t->size));
8653 sec->size -= blank_t->total_size + blank_t->size;
8654 }
8655 else
8656 /* This blank is not entirely included in the section,
8657 reduce the section size by only part of the blank size. */
8658 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8659
8660 while (blank_head)
8661 {
8662 blank_t = blank_head;
8663 blank_head = blank_head->next;
8664 remove_nds32_elf_blank (blank_t);
8665 }
8666
8667 return TRUE;
8668 }
8669
8670 /* Get the contents of a section. */
8671
8672 static int
8673 nds32_get_section_contents (bfd *abfd, asection *sec,
8674 bfd_byte **contents_p, bfd_boolean cache)
8675 {
8676 /* Get the section contents. */
8677 if (elf_section_data (sec)->this_hdr.contents != NULL)
8678 *contents_p = elf_section_data (sec)->this_hdr.contents;
8679 else
8680 {
8681 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8682 return FALSE;
8683 if (cache)
8684 elf_section_data (sec)->this_hdr.contents = *contents_p;
8685 }
8686
8687 return TRUE;
8688 }
8689
8690 /* Get the contents of the internal symbol of abfd. */
8691
8692 static int
8693 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8694 Elf_Internal_Sym **isymbuf_p)
8695 {
8696 Elf_Internal_Shdr *symtab_hdr;
8697 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8698
8699 /* Read this BFD's local symbols if we haven't done so already. */
8700 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8701 {
8702 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8703 if (*isymbuf_p == NULL)
8704 {
8705 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8706 symtab_hdr->sh_info, 0,
8707 NULL, NULL, NULL);
8708 if (*isymbuf_p == NULL)
8709 return FALSE;
8710 }
8711 }
8712 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8713
8714 return TRUE;
8715 }
8716
8717 /* Range of small data. */
8718 static bfd_vma sdata_range[2][2];
8719 static bfd_vma const sdata_init_range[2] =
8720 { ACCURATE_12BIT_S1, ACCURATE_19BIT };
8721
8722 static int
8723 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8724 bfd_byte *contents, bfd_vma addr)
8725 {
8726 unsigned long insn = bfd_getb32 (contents + addr);
8727
8728 if (insn & 0x80000000)
8729 return 2;
8730
8731 return 4;
8732 }
8733
8734 /* Set the gp relax range. We have to measure the safe range
8735 to do gp relaxation. */
8736
8737 static void
8738 relax_range_measurement (bfd *abfd)
8739 {
8740 asection *sec_f, *sec_b;
8741 /* For upper bound. */
8742 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8743 bfd_vma align;
8744 static int decide_relax_range = 0;
8745 int i;
8746 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
8747
8748 if (decide_relax_range)
8749 return;
8750 decide_relax_range = 1;
8751
8752 if (sda_rela_sec == NULL)
8753 {
8754 /* Since there is no data sections, we assume the range is page size. */
8755 for (i = 0; i < range_number; i++)
8756 {
8757 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8758 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8759 }
8760 return;
8761 }
8762
8763 /* Get the biggest alignment power after the gp located section. */
8764 sec_f = sda_rela_sec->output_section;
8765 sec_b = sec_f->next;
8766 align = 0;
8767 while (sec_b != NULL)
8768 {
8769 if ((unsigned)(1 << sec_b->alignment_power) > align)
8770 align = (1 << sec_b->alignment_power);
8771 sec_b = sec_b->next;
8772 }
8773
8774 /* I guess we can not determine the section before
8775 gp located section, so we assume the align is max page size. */
8776 for (i = 0; i < range_number; i++)
8777 {
8778 sdata_range[i][1] = sdata_init_range[i] - align;
8779 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
8780 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
8781 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8782 }
8783 }
8784
8785 /* These are macros used to check flags encoded in r_addend.
8786 They are only used by nds32_elf_relax_section (). */
8787 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8788 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8789 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8790 #define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8791
8792 static const char * unrecognized_reloc_msg =
8793 /* xgettext:c-format */
8794 N_("%pB: warning: %s points to unrecognized reloc at %#Lx");
8795
8796 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8797
8798 static bfd_boolean
8799 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8800 Elf_Internal_Rela *internal_relocs, int *insn_len,
8801 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8802 Elf_Internal_Shdr *symtab_hdr)
8803 {
8804 /* There are 3 variations for LONGCALL1
8805 case 4-4-2; 16-bit on, optimize off or optimize for space
8806 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8807 ori ta, ta, lo12(symbol) ; LO12S0
8808 jral5 ta ;
8809
8810 case 4-4-4; 16-bit off, optimize don't care
8811 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8812 ori ta, ta, lo12(symbol) ; LO12S0
8813 jral ta ;
8814
8815 case 4-4-4; 16-bit on, optimize for speed
8816 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8817 ori ta, ta, lo12(symbol) ; LO12S0
8818 jral ta ;
8819 Check code for -mlong-calls output. */
8820
8821 /* Get the reloc for the address from which the register is
8822 being loaded. This reloc will tell us which function is
8823 actually being called. */
8824
8825 bfd_vma laddr;
8826 int seq_len; /* Original length of instruction sequence. */
8827 uint32_t insn;
8828 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8829 int pic_ext_target = 0;
8830 bfd_signed_vma foff;
8831 uint16_t insn16;
8832
8833 irelend = internal_relocs + sec->reloc_count;
8834 seq_len = GET_SEQ_LEN (irel->r_addend);
8835 laddr = irel->r_offset;
8836 *insn_len = seq_len;
8837
8838 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8839 R_NDS32_HI20_RELA, laddr);
8840 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8841 R_NDS32_LO12S0_ORI_RELA,
8842 laddr + 4);
8843
8844 if (hi_irelfn == irelend || lo_irelfn == irelend)
8845 {
8846 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
8847 irel->r_offset);
8848 return FALSE;
8849 }
8850
8851 /* Get the value of the symbol referred to by the reloc. */
8852 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8853 &pic_ext_target);
8854
8855 /* This condition only happened when symbol is undefined. */
8856 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8857 || foff >= CONSERVATIVE_24BIT_S1)
8858 return FALSE;
8859
8860 /* Relax to: jal symbol; 25_PCREL */
8861 /* For simplicity of coding, we are going to modify the section
8862 contents, the section relocs, and the BFD symbol table. We
8863 must tell the rest of the code not to free up this
8864 information. It would be possible to instead create a table
8865 of changes which have to be made, as is done in coff-mips.c;
8866 that would be more work, but would require less memory when
8867 the linker is run. */
8868
8869 /* Replace the long call with a jal. */
8870 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8871 R_NDS32_25_PCREL_RELA);
8872 irel->r_addend = hi_irelfn->r_addend;
8873
8874 /* We don't resolve this here but resolve it in relocate_section. */
8875 insn = INSN_JAL;
8876 bfd_putb32 (insn, contents + irel->r_offset);
8877
8878 hi_irelfn->r_info =
8879 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8880 lo_irelfn->r_info =
8881 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8882 *insn_len = 4;
8883
8884 if (seq_len & 0x2)
8885 {
8886 insn16 = NDS32_NOP16;
8887 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8888 lo_irelfn->r_info =
8889 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8890 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8891 *insn_len += 2;
8892 }
8893 return TRUE;
8894 }
8895
8896 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8897 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
8898
8899 static bfd_boolean
8900 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8901 Elf_Internal_Rela *internal_relocs, int *insn_len,
8902 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8903 Elf_Internal_Shdr *symtab_hdr)
8904 {
8905 /* bltz rt, .L1 ; LONGCALL2
8906 jal symbol ; 25_PCREL
8907 .L1: */
8908
8909 /* Get the reloc for the address from which the register is
8910 being loaded. This reloc will tell us which function is
8911 actually being called. */
8912
8913 bfd_vma laddr;
8914 uint32_t insn;
8915 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8916 int pic_ext_target = 0;
8917 bfd_signed_vma foff;
8918
8919 irelend = internal_relocs + sec->reloc_count;
8920 laddr = irel->r_offset;
8921 i1_irelfn =
8922 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8923 R_NDS32_25_PCREL_RELA, laddr + 4);
8924
8925 if (i1_irelfn == irelend)
8926 {
8927 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
8928 irel->r_offset);
8929 return FALSE;
8930 }
8931
8932 insn = bfd_getb32 (contents + laddr);
8933
8934 /* Get the value of the symbol referred to by the reloc. */
8935 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8936 &pic_ext_target);
8937
8938 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
8939 || foff >= CONSERVATIVE_16BIT_S1)
8940 return FALSE;
8941
8942 /* Relax to bgezal rt, label ; 17_PCREL
8943 or bltzal rt, label ; 17_PCREL */
8944
8945 /* Convert to complimentary conditional call. */
8946 insn = CONVERT_CONDITION_CALL (insn);
8947
8948 /* For simplicity of coding, we are going to modify the section
8949 contents, the section relocs, and the BFD symbol table. We
8950 must tell the rest of the code not to free up this
8951 information. It would be possible to instead create a table
8952 of changes which have to be made, as is done in coff-mips.c;
8953 that would be more work, but would require less memory when
8954 the linker is run. */
8955
8956 /* Clean unnessary relocations. */
8957 i1_irelfn->r_info =
8958 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8959 cond_irelfn =
8960 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8961 R_NDS32_17_PCREL_RELA, laddr);
8962 if (cond_irelfn != irelend)
8963 cond_irelfn->r_info =
8964 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
8965
8966 /* Replace the long call with a bgezal. */
8967 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8968 R_NDS32_17_PCREL_RELA);
8969 irel->r_addend = i1_irelfn->r_addend;
8970
8971 bfd_putb32 (insn, contents + irel->r_offset);
8972
8973 *insn_len = 4;
8974 return TRUE;
8975 }
8976
8977 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
8978
8979 static bfd_boolean
8980 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8981 Elf_Internal_Rela *internal_relocs, int *insn_len,
8982 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8983 Elf_Internal_Shdr *symtab_hdr)
8984 {
8985 /* There are 3 variations for LONGCALL3
8986 case 4-4-4-2; 16-bit on, optimize off or optimize for space
8987 bltz rt, $1 ; LONGCALL3
8988 sethi ta, hi20(symbol) ; HI20
8989 ori ta, ta, lo12(symbol) ; LO12S0
8990 jral5 ta ;
8991 $1
8992
8993 case 4-4-4-4; 16-bit off, optimize don't care
8994 bltz rt, $1 ; LONGCALL3
8995 sethi ta, hi20(symbol) ; HI20
8996 ori ta, ta, lo12(symbol) ; LO12S0
8997 jral ta ;
8998 $1
8999
9000 case 4-4-4-4; 16-bit on, optimize for speed
9001 bltz rt, $1 ; LONGCALL3
9002 sethi ta, hi20(symbol) ; HI20
9003 ori ta, ta, lo12(symbol) ; LO12S0
9004 jral ta ;
9005 $1 */
9006
9007 /* Get the reloc for the address from which the register is
9008 being loaded. This reloc will tell us which function is
9009 actually being called. */
9010
9011 bfd_vma laddr;
9012 int seq_len; /* Original length of instruction sequence. */
9013 uint32_t insn;
9014 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9015 int pic_ext_target = 0;
9016 bfd_signed_vma foff;
9017 uint16_t insn16;
9018
9019 irelend = internal_relocs + sec->reloc_count;
9020 seq_len = GET_SEQ_LEN (irel->r_addend);
9021 laddr = irel->r_offset;
9022 *insn_len = seq_len;
9023
9024 hi_irelfn =
9025 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9026 R_NDS32_HI20_RELA, laddr + 4);
9027 lo_irelfn =
9028 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9029 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9030
9031 if (hi_irelfn == irelend || lo_irelfn == irelend)
9032 {
9033 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
9034 irel->r_offset);
9035 return FALSE;
9036 }
9037
9038 /* Get the value of the symbol referred to by the reloc. */
9039 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9040 &pic_ext_target);
9041
9042 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9043 || foff >= CONSERVATIVE_24BIT_S1)
9044 return FALSE;
9045
9046 insn = bfd_getb32 (contents + laddr);
9047 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9048 {
9049 /* Relax to bgezal rt, label ; 17_PCREL
9050 or bltzal rt, label ; 17_PCREL */
9051
9052 /* Convert to complimentary conditional call. */
9053 insn = CONVERT_CONDITION_CALL (insn);
9054 bfd_putb32 (insn, contents + irel->r_offset);
9055
9056 *insn_len = 4;
9057 irel->r_info =
9058 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9059 hi_irelfn->r_info =
9060 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9061 lo_irelfn->r_info =
9062 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9063
9064 cond_irelfn =
9065 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9066 R_NDS32_17_PCREL_RELA, laddr);
9067 if (cond_irelfn != irelend)
9068 {
9069 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9070 R_NDS32_17_PCREL_RELA);
9071 cond_irelfn->r_addend = hi_irelfn->r_addend;
9072 }
9073
9074 if (seq_len & 0x2)
9075 {
9076 insn16 = NDS32_NOP16;
9077 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9078 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9079 R_NDS32_INSN16);
9080 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9081 insn_len += 2;
9082 }
9083 }
9084 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9085 {
9086 /* Relax to the following instruction sequence
9087 bltz rt, $1 ; LONGCALL2
9088 jal symbol ; 25_PCREL
9089 $1 */
9090 *insn_len = 8;
9091 insn = INSN_JAL;
9092 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9093
9094 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9095 R_NDS32_25_PCREL_RELA);
9096 irel->r_info =
9097 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9098
9099 lo_irelfn->r_info =
9100 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9101
9102 if (seq_len & 0x2)
9103 {
9104 insn16 = NDS32_NOP16;
9105 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9106 lo_irelfn->r_info =
9107 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9108 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9109 insn_len += 2;
9110 }
9111 }
9112 return TRUE;
9113 }
9114
9115 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
9116
9117 static bfd_boolean
9118 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9119 Elf_Internal_Rela *internal_relocs, int *insn_len,
9120 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9121 Elf_Internal_Shdr *symtab_hdr)
9122 {
9123 /* There are 3 variations for LONGJUMP1
9124 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9125 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9126 ori ta, ta, lo12(symbol) ; LO12S0
9127 jr5 ta ;
9128
9129 case 4-4-4; 16-bit off, optimize don't care
9130 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9131 ori ta, ta, lo12(symbol) ; LO12S0
9132 jr ta ;
9133
9134 case 4-4-4; 16-bit on, optimize for speed
9135 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9136 ori ta, ta, lo12(symbol) ; LO12S0
9137 jr ta ; */
9138
9139 /* Get the reloc for the address from which the register is
9140 being loaded. This reloc will tell us which function is
9141 actually being called. */
9142
9143 bfd_vma laddr;
9144 int seq_len; /* Original length of instruction sequence. */
9145 int insn16_on; /* 16-bit on/off. */
9146 uint32_t insn;
9147 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9148 int pic_ext_target = 0;
9149 bfd_signed_vma foff;
9150 uint16_t insn16;
9151 unsigned long reloc;
9152
9153 irelend = internal_relocs + sec->reloc_count;
9154 seq_len = GET_SEQ_LEN (irel->r_addend);
9155 laddr = irel->r_offset;
9156 *insn_len = seq_len;
9157 insn16_on = IS_16BIT_ON (irel->r_addend);
9158
9159 hi_irelfn =
9160 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9161 R_NDS32_HI20_RELA, laddr);
9162 lo_irelfn =
9163 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9164 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9165 if (hi_irelfn == irelend || lo_irelfn == irelend)
9166 {
9167 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
9168 irel->r_offset);
9169 return FALSE;
9170 }
9171
9172 /* Get the value of the symbol referred to by the reloc. */
9173 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9174 &pic_ext_target);
9175
9176 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9177 || foff < -CONSERVATIVE_24BIT_S1)
9178 return FALSE;
9179
9180 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9181 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9182 {
9183 /* j8 label */
9184 /* 16-bit on, but not optimized for speed. */
9185 reloc = R_NDS32_9_PCREL_RELA;
9186 insn16 = INSN_J8;
9187 bfd_putb16 (insn16, contents + irel->r_offset);
9188 *insn_len = 2;
9189 irel->r_info =
9190 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9191 }
9192 else
9193 {
9194 /* j label */
9195 reloc = R_NDS32_25_PCREL_RELA;
9196 insn = INSN_J;
9197 bfd_putb32 (insn, contents + irel->r_offset);
9198 *insn_len = 4;
9199 irel->r_info =
9200 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9201 irel->r_addend = 0;
9202 }
9203
9204 hi_irelfn->r_info =
9205 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9206 lo_irelfn->r_info =
9207 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9208
9209 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9210 {
9211 insn16 = NDS32_NOP16;
9212 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9213 lo_irelfn->r_info =
9214 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9215 R_NDS32_INSN16);
9216 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9217 *insn_len += 2;
9218 }
9219 return TRUE;
9220 }
9221
9222 /* Revert condition branch. This function does not check if the input
9223 instruction is condition branch or not. */
9224
9225 static void
9226 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9227 uint16_t *re_insn16, uint32_t *re_insn)
9228 {
9229 uint32_t comp_insn = 0;
9230 uint16_t comp_insn16 = 0;
9231
9232 if (insn)
9233 {
9234 if (N32_OP6 (insn) == N32_OP6_BR1)
9235 {
9236 /* beqs label. */
9237 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9238 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9239 {
9240 /* Insn can be contracted to 16-bit implied r5. */
9241 comp_insn16 =
9242 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9243 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9244 }
9245 }
9246 else if (N32_OP6 (insn) == N32_OP6_BR3)
9247 {
9248 /* bnec $ta, imm11, label. */
9249 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9250 }
9251 else
9252 {
9253 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9254 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9255 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9256 {
9257 if (N32_IS_RT3 (insn))
9258 {
9259 /* Insn can be contracted to 16-bit. */
9260 comp_insn16 =
9261 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9262 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9263 }
9264 else if (N32_RT5 (insn) == REG_R15)
9265 {
9266 /* Insn can be contracted to 16-bit. */
9267 comp_insn16 =
9268 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9269 }
9270 }
9271 }
9272 }
9273 else
9274 {
9275 switch ((insn16 & 0xf000) >> 12)
9276 {
9277 case 0xc:
9278 /* beqz38 or bnez38 */
9279 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9280 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9281 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9282 break;
9283
9284 case 0xd:
9285 /* beqs38 or bnes38 */
9286 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9287 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9288 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9289 | (REG_R5 << 15);
9290 break;
9291
9292 case 0xe:
9293 /* beqzS8 or bnezS8 */
9294 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9295 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9296 comp_insn |= REG_R15 << 20;
9297 break;
9298
9299 default:
9300 break;
9301 }
9302 }
9303 if (comp_insn && re_insn)
9304 *re_insn = comp_insn;
9305 if (comp_insn16 && re_insn16)
9306 *re_insn16 = comp_insn16;
9307 }
9308
9309 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
9310
9311 static bfd_boolean
9312 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9313 Elf_Internal_Rela *internal_relocs, int *insn_len,
9314 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9315 Elf_Internal_Shdr *symtab_hdr)
9316 {
9317 /* There are 3 variations for LONGJUMP2
9318 case 2-4; 1st insn convertible, 16-bit on,
9319 optimize off or optimize for space
9320 bnes38 rt, ra, $1 ; LONGJUMP2
9321 j label ; 25_PCREL
9322 $1:
9323
9324 case 4-4; 1st insn not convertible
9325 bne rt, ra, $1 ; LONGJUMP2
9326 j label ; 25_PCREL
9327 $1:
9328
9329 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9330 bne rt, ra, $1 ; LONGJUMP2
9331 j label ; 25_PCREL
9332 $1: */
9333
9334 /* Get the reloc for the address from which the register is
9335 being loaded. This reloc will tell us which function is
9336 actually being called. */
9337
9338 bfd_vma laddr;
9339 int seq_len; /* Original length of instruction sequence. */
9340 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9341 int pic_ext_target = 0, first_size;
9342 unsigned int i;
9343 bfd_signed_vma foff;
9344 uint32_t insn, re_insn = 0;
9345 uint16_t insn16, re_insn16 = 0;
9346 unsigned long reloc, cond_reloc;
9347
9348 enum elf_nds32_reloc_type checked_types[] =
9349 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9350
9351 irelend = internal_relocs + sec->reloc_count;
9352 seq_len = GET_SEQ_LEN (irel->r_addend);
9353 laddr = irel->r_offset;
9354 *insn_len = seq_len;
9355 first_size = (seq_len == 6) ? 2 : 4;
9356
9357 i2_irelfn =
9358 find_relocs_at_address_addr (irel, internal_relocs,
9359 irelend, R_NDS32_25_PCREL_RELA,
9360 laddr + first_size);
9361
9362 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9363 {
9364 cond_irelfn =
9365 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9366 checked_types[i], laddr);
9367 if (cond_irelfn != irelend)
9368 break;
9369 }
9370
9371 if (i2_irelfn == irelend || cond_irelfn == irelend)
9372 {
9373 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
9374 irel->r_offset);
9375 return FALSE;
9376 }
9377
9378 /* Get the value of the symbol referred to by the reloc. */
9379 foff =
9380 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9381 &pic_ext_target);
9382 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9383 || foff >= CONSERVATIVE_16BIT_S1)
9384 return FALSE;
9385
9386 /* Get the all corresponding instructions. */
9387 if (first_size == 4)
9388 {
9389 insn = bfd_getb32 (contents + laddr);
9390 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9391 }
9392 else
9393 {
9394 insn16 = bfd_getb16 (contents + laddr);
9395 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9396 }
9397
9398 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9399 && foff < ACCURATE_8BIT_S1 - first_size)
9400 {
9401 if (first_size == 4)
9402 {
9403 /* Don't convert it to 16-bit now, keep this as relaxable for
9404 ``label reloc; INSN16''. */
9405
9406 /* Save comp_insn32 to buffer. */
9407 bfd_putb32 (re_insn, contents + irel->r_offset);
9408 *insn_len = 4;
9409 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9410 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9411 cond_reloc = R_NDS32_INSN16;
9412 }
9413 else
9414 {
9415 bfd_putb16 (re_insn16, contents + irel->r_offset);
9416 *insn_len = 2;
9417 reloc = R_NDS32_9_PCREL_RELA;
9418 cond_reloc = R_NDS32_NONE;
9419 }
9420 }
9421 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9422 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9423 && foff < ACCURATE_14BIT_S1 - first_size))
9424 {
9425 /* beqs label ; 15_PCREL */
9426 bfd_putb32 (re_insn, contents + irel->r_offset);
9427 *insn_len = 4;
9428 reloc = R_NDS32_15_PCREL_RELA;
9429 cond_reloc = R_NDS32_NONE;
9430 }
9431 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9432 && foff >= -CONSERVATIVE_16BIT_S1
9433 && foff < CONSERVATIVE_16BIT_S1)
9434 {
9435 /* beqz label ; 17_PCREL */
9436 bfd_putb32 (re_insn, contents + irel->r_offset);
9437 *insn_len = 4;
9438 reloc = R_NDS32_17_PCREL_RELA;
9439 cond_reloc = R_NDS32_NONE;
9440 }
9441 else
9442 return FALSE;
9443
9444 /* Set all relocations. */
9445 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9446 irel->r_addend = i2_irelfn->r_addend;
9447
9448 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9449 cond_reloc);
9450 cond_irelfn->r_addend = 0;
9451
9452 if ((seq_len ^ *insn_len ) & 0x2)
9453 {
9454 insn16 = NDS32_NOP16;
9455 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9456 i2_irelfn->r_offset = 4;
9457 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9458 R_NDS32_INSN16);
9459 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9460 *insn_len += 2;
9461 }
9462 else
9463 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9464 R_NDS32_NONE);
9465 return TRUE;
9466 }
9467
9468 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
9469
9470 static bfd_boolean
9471 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9472 Elf_Internal_Rela *internal_relocs, int *insn_len,
9473 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9474 Elf_Internal_Shdr *symtab_hdr)
9475 {
9476 /* There are 5 variations for LONGJUMP3
9477 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9478 optimize off or optimize for space
9479 bnes38 rt, ra, $1 ; LONGJUMP3
9480 sethi ta, hi20(symbol) ; HI20
9481 ori ta, ta, lo12(symbol) ; LO12S0
9482 jr5 ta ;
9483 $1: ;
9484
9485 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9486 bnes38 rt, ra, $1 ; LONGJUMP3
9487 sethi ta, hi20(symbol) ; HI20
9488 ori ta, ta, lo12(symbol) ; LO12S0
9489 jr5 ta ;
9490 $1: ; LABEL
9491
9492 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9493 optimize off or optimize for space
9494 bne rt, ra, $1 ; LONGJUMP3
9495 sethi ta, hi20(symbol) ; HI20
9496 ori ta, ta, lo12(symbol) ; LO12S0
9497 jr5 ta ;
9498 $1: ;
9499
9500 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9501 16-bit off if no INSN16
9502 bne rt, ra, $1 ; LONGJUMP3
9503 sethi ta, hi20(symbol) ; HI20
9504 ori ta, ta, lo12(symbol) ; LO12S0
9505 jr ta ;
9506 $1: ;
9507
9508 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9509 16-bit off if no INSN16
9510 bne rt, ra, $1 ; LONGJUMP3
9511 sethi ta, hi20(symbol) ; HI20
9512 ori ta, ta, lo12(symbol) ; LO12S0
9513 jr ta ;
9514 $1: ; LABEL */
9515
9516 /* Get the reloc for the address from which the register is
9517 being loaded. This reloc will tell us which function is
9518 actually being called. */
9519 enum elf_nds32_reloc_type checked_types[] =
9520 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9521
9522 int reloc_off = 0, cond_removed = 0, convertible;
9523 bfd_vma laddr;
9524 int seq_len; /* Original length of instruction sequence. */
9525 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9526 int pic_ext_target = 0, first_size;
9527 unsigned int i;
9528 bfd_signed_vma foff;
9529 uint32_t insn, re_insn = 0;
9530 uint16_t insn16, re_insn16 = 0;
9531 unsigned long reloc, cond_reloc;
9532
9533 irelend = internal_relocs + sec->reloc_count;
9534 seq_len = GET_SEQ_LEN (irel->r_addend);
9535 laddr = irel->r_offset;
9536 *insn_len = seq_len;
9537
9538 convertible = IS_1ST_CONVERT (irel->r_addend);
9539
9540 if (convertible)
9541 first_size = 2;
9542 else
9543 first_size = 4;
9544
9545 /* Get all needed relocations. */
9546 hi_irelfn =
9547 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9548 R_NDS32_HI20_RELA, laddr + first_size);
9549 lo_irelfn =
9550 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9551 R_NDS32_LO12S0_ORI_RELA,
9552 laddr + first_size + 4);
9553
9554 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9555 {
9556 cond_irelfn =
9557 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9558 checked_types[i], laddr);
9559 if (cond_irelfn != irelend)
9560 break;
9561 }
9562
9563 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9564 {
9565 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
9566 irel->r_offset);
9567 return FALSE;
9568 }
9569
9570 /* Get the value of the symbol referred to by the reloc. */
9571 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9572 &pic_ext_target);
9573
9574 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9575 || foff >= CONSERVATIVE_24BIT_S1)
9576 return FALSE;
9577
9578 /* Get the all corresponding instructions. */
9579 if (first_size == 4)
9580 {
9581 insn = bfd_getb32 (contents + laddr);
9582 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9583 }
9584 else
9585 {
9586 insn16 = bfd_getb16 (contents + laddr);
9587 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9588 }
9589
9590 /* For simplicity of coding, we are going to modify the section
9591 contents, the section relocs, and the BFD symbol table. We
9592 must tell the rest of the code not to free up this
9593 information. It would be possible to instead create a table
9594 of changes which have to be made, as is done in coff-mips.c;
9595 that would be more work, but would require less memory when
9596 the linker is run. */
9597
9598 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9599 && foff < ACCURATE_8BIT_S1 - first_size)
9600 {
9601 if (!(seq_len & 0x2))
9602 {
9603 /* Don't convert it to 16-bit now, keep this as relaxable
9604 for ``label reloc; INSN1a''6. */
9605 /* Save comp_insn32 to buffer. */
9606 bfd_putb32 (re_insn, contents + irel->r_offset);
9607 *insn_len = 4;
9608 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9609 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9610 cond_reloc = R_NDS32_INSN16;
9611 }
9612 else
9613 {
9614 /* Not optimize for speed; convert sequence to 16-bit. */
9615 /* Save comp_insn16 to buffer. */
9616 bfd_putb16 (re_insn16, contents + irel->r_offset);
9617 *insn_len = 2;
9618 reloc = R_NDS32_9_PCREL_RELA;
9619 cond_reloc = R_NDS32_NONE;
9620 }
9621 cond_removed = 1;
9622 }
9623 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9624 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9625 && foff < ACCURATE_14BIT_S1 - first_size))
9626 {
9627 /* beqs label ; 15_PCREL */
9628 bfd_putb32 (re_insn, contents + irel->r_offset);
9629 *insn_len = 4;
9630 reloc = R_NDS32_15_PCREL_RELA;
9631 cond_reloc = R_NDS32_NONE;
9632 cond_removed = 1;
9633 }
9634 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9635 && foff >= -CONSERVATIVE_16BIT_S1
9636 && foff < CONSERVATIVE_16BIT_S1)
9637 {
9638 /* beqz label ; 17_PCREL */
9639 bfd_putb32 (re_insn, contents + irel->r_offset);
9640 *insn_len = 4;
9641 reloc = R_NDS32_17_PCREL_RELA;
9642 cond_reloc = R_NDS32_NONE;
9643 cond_removed = 1;
9644 }
9645 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9646 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9647 {
9648 /* Relax to one of the following 3 variations
9649
9650 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9651 for space
9652 bnes38 rt, $1 ; LONGJUMP2
9653 j label ; 25_PCREL
9654 $1
9655
9656 case 4-4; 1st insn not convertible, others don't care
9657 bne rt, ra, $1 ; LONGJUMP2
9658 j label ; 25_PCREL
9659 $1
9660
9661 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9662 bne rt, ra, $1 ; LONGJUMP2
9663 j label ; 25_PCREL
9664 $1 */
9665
9666 /* Offset for first instruction. */
9667
9668 /* Use j label as second instruction. */
9669 *insn_len = 4 + first_size;
9670 insn = INSN_J;
9671 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9672 reloc = R_NDS32_LONGJUMP2;
9673 cond_reloc = R_NDS32_25_PLTREL;
9674 }
9675 else
9676 return FALSE;
9677
9678 if (cond_removed == 1)
9679 {
9680 /* Set all relocations. */
9681 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9682 irel->r_addend = hi_irelfn->r_addend;
9683
9684 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9685 cond_reloc);
9686 cond_irelfn->r_addend = 0;
9687 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9688 R_NDS32_NONE);
9689 }
9690 else
9691 {
9692 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9693 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9694 cond_reloc);
9695 }
9696
9697 if ((seq_len ^ *insn_len ) & 0x2)
9698 {
9699 insn16 = NDS32_NOP16;
9700 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9701 lo_irelfn->r_offset = *insn_len;
9702 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9703 R_NDS32_INSN16);
9704 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9705 *insn_len += 2;
9706 }
9707 else
9708 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9709 R_NDS32_NONE);
9710 return TRUE;
9711 }
9712
9713 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
9714
9715 static bfd_boolean
9716 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9717 Elf_Internal_Rela *internal_relocs, int *insn_len,
9718 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9719 Elf_Internal_Shdr *symtab_hdr)
9720 {
9721 /* The pattern for LONGCALL4. Support for function cse.
9722 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9723 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9724 jral ta ; PTR_RES/EMPTY/INSN16 */
9725
9726 bfd_vma laddr;
9727 uint32_t insn;
9728 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9729 Elf_Internal_Rela *irelend;
9730 int pic_ext_target = 0;
9731 bfd_signed_vma foff;
9732
9733 irelend = internal_relocs + sec->reloc_count;
9734 laddr = irel->r_offset;
9735
9736 /* Get the reloc for the address from which the register is
9737 being loaded. This reloc will tell us which function is
9738 actually being called. */
9739 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9740 R_NDS32_HI20_RELA, laddr);
9741
9742 if (hi_irel == irelend)
9743 {
9744 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
9745 irel->r_offset);
9746 return FALSE;
9747 }
9748
9749 /* Get the value of the symbol referred to by the reloc. */
9750 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9751 &pic_ext_target);
9752
9753 /* This condition only happened when symbol is undefined. */
9754 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9755 || foff >= CONSERVATIVE_24BIT_S1)
9756 return FALSE;
9757
9758 /* Relax to: jal symbol; 25_PCREL */
9759 /* For simplicity of coding, we are going to modify the section
9760 contents, the section relocs, and the BFD symbol table. We
9761 must tell the rest of the code not to free up this
9762 information. It would be possible to instead create a table
9763 of changes which have to be made, as is done in coff-mips.c;
9764 that would be more work, but would require less memory when
9765 the linker is run. */
9766
9767 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9768 R_NDS32_PTR_RESOLVED, irel->r_addend);
9769 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9770 R_NDS32_EMPTY, irel->r_addend);
9771
9772 if (ptr_irel == irelend || em_irel == irelend)
9773 {
9774 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
9775 irel->r_offset);
9776 return FALSE;
9777 }
9778 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9779 insn = bfd_getb32 (contents + irel->r_addend);
9780 if (insn & 0x80000000)
9781 return FALSE;
9782
9783 /* Replace the long call with a jal. */
9784 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9785 R_NDS32_25_PCREL_RELA);
9786 ptr_irel->r_addend = 1;
9787
9788 /* We don't resolve this here but resolve it in relocate_section. */
9789 insn = INSN_JAL;
9790 bfd_putb32 (insn, contents + em_irel->r_offset);
9791
9792 irel->r_info =
9793 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9794
9795 /* If there is function cse, HI20 can not remove now. */
9796 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9797 R_NDS32_LONGCALL4, laddr);
9798 if (call_irel == irelend)
9799 {
9800 *insn_len = 0;
9801 hi_irel->r_info =
9802 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9803 }
9804
9805 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9806 R_NDS32_INSN16, irel->r_addend);
9807 if (insn_irel != irelend)
9808 insn_irel->r_info =
9809 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9810
9811 return TRUE;
9812 }
9813
9814 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
9815
9816 static bfd_boolean
9817 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9818 Elf_Internal_Rela *internal_relocs, int *insn_len,
9819 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9820 Elf_Internal_Shdr *symtab_hdr)
9821 {
9822 /* The pattern for LONGCALL5.
9823 bltz rt, .L1 ; LONGCALL5/17_PCREL
9824 jal symbol ; 25_PCREL
9825 .L1: */
9826
9827 bfd_vma laddr;
9828 uint32_t insn;
9829 Elf_Internal_Rela *cond_irel, *irelend;
9830 int pic_ext_target = 0;
9831 bfd_signed_vma foff;
9832
9833 irelend = internal_relocs + sec->reloc_count;
9834 laddr = irel->r_offset;
9835 insn = bfd_getb32 (contents + laddr);
9836
9837 /* Get the reloc for the address from which the register is
9838 being loaded. This reloc will tell us which function is
9839 actually being called. */
9840 cond_irel =
9841 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9842 R_NDS32_25_PCREL_RELA, irel->r_addend);
9843 if (cond_irel == irelend)
9844 {
9845 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
9846 irel->r_offset);
9847 return FALSE;
9848 }
9849
9850 /* Get the value of the symbol referred to by the reloc. */
9851 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9852 &pic_ext_target);
9853
9854 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9855 || foff >= CONSERVATIVE_16BIT_S1)
9856 return FALSE;
9857
9858 /* Relax to bgezal rt, label ; 17_PCREL
9859 or bltzal rt, label ; 17_PCREL */
9860
9861 /* Convert to complimentary conditional call. */
9862 insn = CONVERT_CONDITION_CALL (insn);
9863
9864 /* For simplicity of coding, we are going to modify the section
9865 contents, the section relocs, and the BFD symbol table. We
9866 must tell the rest of the code not to free up this
9867 information. It would be possible to instead create a table
9868 of changes which have to be made, as is done in coff-mips.c;
9869 that would be more work, but would require less memory when
9870 the linker is run. */
9871
9872 /* Modify relocation and contents. */
9873 cond_irel->r_info =
9874 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
9875
9876 /* Replace the long call with a bgezal. */
9877 bfd_putb32 (insn, contents + cond_irel->r_offset);
9878 *insn_len = 0;
9879
9880 /* Clean unnessary relocations. */
9881 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9882
9883 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9884 R_NDS32_17_PCREL_RELA, laddr);
9885 cond_irel->r_info =
9886 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
9887
9888 return TRUE;
9889 }
9890
9891 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
9892
9893 static bfd_boolean
9894 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9895 Elf_Internal_Rela *internal_relocs, int *insn_len,
9896 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9897 Elf_Internal_Shdr *symtab_hdr)
9898 {
9899 /* The pattern for LONGCALL6.
9900 bltz rt, .L1 ; LONGCALL6/17_PCREL
9901 sethi ta, hi20(symbol) ; HI20/PTR
9902 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9903 jral ta ; PTR_RES/EMPTY/INSN16
9904 .L1 */
9905
9906 bfd_vma laddr;
9907 uint32_t insn;
9908 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9909 int pic_ext_target = 0;
9910 bfd_signed_vma foff;
9911
9912 irelend = internal_relocs + sec->reloc_count;
9913 laddr = irel->r_offset;
9914
9915 /* Get the reloc for the address from which the register is
9916 being loaded. This reloc will tell us which function is
9917 actually being called. */
9918 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9919 R_NDS32_EMPTY, irel->r_addend);
9920
9921 if (em_irel == irelend)
9922 {
9923 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
9924 irel->r_offset);
9925 return FALSE;
9926 }
9927
9928 /* Get the value of the symbol referred to by the reloc. */
9929 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9930 &pic_ext_target);
9931
9932 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9933 || foff >= CONSERVATIVE_24BIT_S1)
9934 return FALSE;
9935
9936 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9937 insn = bfd_getb32 (contents + irel->r_addend);
9938 if (insn & 0x80000000)
9939 return FALSE;
9940
9941 insn = bfd_getb32 (contents + laddr);
9942 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9943 {
9944 /* Relax to bgezal rt, label ; 17_PCREL
9945 or bltzal rt, label ; 17_PCREL */
9946
9947 /* Convert to complimentary conditional call. */
9948 *insn_len = 0;
9949 insn = CONVERT_CONDITION_CALL (insn);
9950 bfd_putb32 (insn, contents + em_irel->r_offset);
9951
9952 em_irel->r_info =
9953 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
9954
9955 /* Set resolved relocation. */
9956 cond_irel =
9957 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9958 R_NDS32_PTR_RESOLVED, irel->r_addend);
9959 if (cond_irel == irelend)
9960 {
9961 _bfd_error_handler (unrecognized_reloc_msg, abfd,
9962 "R_NDS32_LONGCALL6", irel->r_offset);
9963 return FALSE;
9964 }
9965 cond_irel->r_addend = 1;
9966
9967 /* Clear relocations. */
9968
9969 irel->r_info =
9970 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9971
9972 cond_irel =
9973 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9974 R_NDS32_17_PCREL_RELA, laddr);
9975 if (cond_irel != irelend)
9976 cond_irel->r_info =
9977 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
9978
9979 cond_irel =
9980 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9981 R_NDS32_INSN16, irel->r_addend);
9982 if (cond_irel != irelend)
9983 cond_irel->r_info =
9984 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
9985
9986 }
9987 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9988 {
9989 /* Relax to the following instruction sequence
9990 bltz rt, .L1 ; LONGCALL2/17_PCREL
9991 jal symbol ; 25_PCREL/PTR_RES
9992 .L1 */
9993 *insn_len = 4;
9994 /* Convert instruction. */
9995 insn = INSN_JAL;
9996 bfd_putb32 (insn, contents + em_irel->r_offset);
9997
9998 /* Convert relocations. */
9999 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10000 R_NDS32_25_PCREL_RELA);
10001 irel->r_info =
10002 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
10003
10004 /* Set resolved relocation. */
10005 cond_irel =
10006 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10007 R_NDS32_PTR_RESOLVED, irel->r_addend);
10008 if (cond_irel == irelend)
10009 {
10010 _bfd_error_handler (unrecognized_reloc_msg, abfd,
10011 "R_NDS32_LONGCALL6", irel->r_offset);
10012 return FALSE;
10013 }
10014 cond_irel->r_addend = 1;
10015
10016 cond_irel =
10017 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10018 R_NDS32_INSN16, irel->r_addend);
10019 if (cond_irel != irelend)
10020 cond_irel->r_info =
10021 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10022 }
10023 return TRUE;
10024 }
10025
10026 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
10027
10028 static bfd_boolean
10029 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10030 Elf_Internal_Rela *internal_relocs, int *insn_len,
10031 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10032 Elf_Internal_Shdr *symtab_hdr)
10033 {
10034 /* The pattern for LONGJUMP4.
10035 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10036 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10037 jr ta ; PTR_RES/INSN16/EMPTY */
10038
10039 bfd_vma laddr;
10040 int seq_len; /* Original length of instruction sequence. */
10041 uint32_t insn;
10042 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10043 int pic_ext_target = 0;
10044 bfd_signed_vma foff;
10045
10046 irelend = internal_relocs + sec->reloc_count;
10047 seq_len = GET_SEQ_LEN (irel->r_addend);
10048 laddr = irel->r_offset;
10049 *insn_len = seq_len;
10050
10051 /* Get the reloc for the address from which the register is
10052 being loaded. This reloc will tell us which function is
10053 actually being called. */
10054
10055 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10056 R_NDS32_HI20_RELA, laddr);
10057
10058 if (hi_irel == irelend)
10059 {
10060 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
10061 irel->r_offset);
10062 return FALSE;
10063 }
10064
10065 /* Get the value of the symbol referred to by the reloc. */
10066 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10067 &pic_ext_target);
10068
10069 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10070 || foff < -CONSERVATIVE_24BIT_S1)
10071 return FALSE;
10072
10073 /* Convert it to "j label", it may be converted to j8 in the final
10074 pass of relaxation. Therefore, we do not consider this currently. */
10075 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10076 R_NDS32_PTR_RESOLVED, irel->r_addend);
10077 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10078 R_NDS32_EMPTY, irel->r_addend);
10079
10080 if (ptr_irel == irelend || em_irel == irelend)
10081 {
10082 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
10083 irel->r_offset);
10084 return FALSE;
10085 }
10086
10087 em_irel->r_info =
10088 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10089 ptr_irel->r_addend = 1;
10090
10091 /* Write instruction. */
10092 insn = INSN_J;
10093 bfd_putb32 (insn, contents + em_irel->r_offset);
10094
10095 /* Clear relocations. */
10096 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10097
10098 /* If there is function cse, HI20 can not remove now. */
10099 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10100 R_NDS32_LONGJUMP4, laddr);
10101 if (call_irel == irelend)
10102 {
10103 *insn_len = 0;
10104 hi_irel->r_info =
10105 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10106 }
10107
10108 return TRUE;
10109 }
10110
10111 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
10112
10113 static bfd_boolean
10114 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10115 Elf_Internal_Rela *internal_relocs, int *insn_len,
10116 int *seq_len, bfd_byte *contents,
10117 Elf_Internal_Sym *isymbuf,
10118 Elf_Internal_Shdr *symtab_hdr)
10119 {
10120 /* There are 2 variations for LONGJUMP5
10121 case 2-4; 1st insn convertible, 16-bit on.
10122 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10123 j label ; 25_PCREL/INSN16
10124 $1:
10125
10126 case 4-4; 1st insn not convertible
10127 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10128 j label ; 25_PCREL/INSN16
10129 .L1: */
10130
10131 bfd_vma laddr;
10132 Elf_Internal_Rela *cond_irel, *irelend;
10133 int pic_ext_target = 0;
10134 unsigned int i;
10135 bfd_signed_vma foff;
10136 uint32_t insn, re_insn = 0;
10137 uint16_t insn16, re_insn16 = 0;
10138 unsigned long reloc;
10139
10140 enum elf_nds32_reloc_type checked_types[] =
10141 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10142 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10143
10144 irelend = internal_relocs + sec->reloc_count;
10145 laddr = irel->r_offset;
10146
10147 /* Get the reloc for the address from which the register is
10148 being loaded. This reloc will tell us which function is
10149 actually being called. */
10150
10151 cond_irel =
10152 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10153 R_NDS32_25_PCREL_RELA, irel->r_addend);
10154 if (cond_irel == irelend)
10155 {
10156 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
10157 irel->r_offset);
10158 return FALSE;
10159 }
10160
10161 /* Get the value of the symbol referred to by the reloc. */
10162 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10163 &pic_ext_target);
10164
10165 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10166 || foff >= CONSERVATIVE_16BIT_S1)
10167 return FALSE;
10168
10169 /* Get the all corresponding instructions. */
10170 insn = bfd_getb32 (contents + laddr);
10171 /* Check instruction size. */
10172 if (insn & 0x80000000)
10173 {
10174 *seq_len = 0;
10175 insn16 = insn >> 16;
10176 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10177 }
10178 else
10179 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10180
10181 if (N32_OP6 (re_insn) == N32_OP6_BR1
10182 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10183 {
10184 /* beqs label ; 15_PCREL. */
10185 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10186 reloc = R_NDS32_15_PCREL_RELA;
10187 }
10188 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10189 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10190 {
10191 /* beqz label ; 17_PCREL. */
10192 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10193 reloc = R_NDS32_17_PCREL_RELA;
10194 }
10195 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10196 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10197 {
10198 /* beqc label ; 9_PCREL. */
10199 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10200 reloc = R_NDS32_WORD_9_PCREL_RELA;
10201 }
10202 else
10203 return FALSE;
10204
10205 /* Set all relocations. */
10206 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
10207
10208 /* Clean relocations. */
10209 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10210 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10211 {
10212 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10213 checked_types[i], laddr);
10214 if (cond_irel != irelend)
10215 {
10216 if (*seq_len == 0
10217 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10218 {
10219 /* If the branch instruction is 2 byte, it cannot remove
10220 directly. Only convert it to nop16 and remove it after
10221 checking alignment issue. */
10222 insn16 = NDS32_NOP16;
10223 bfd_putb16 (insn16, contents + laddr);
10224 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10225 }
10226 else
10227 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10228 R_NDS32_NONE);
10229 }
10230 }
10231 *insn_len = 0;
10232
10233 return TRUE;
10234 }
10235
10236 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
10237
10238 static bfd_boolean
10239 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10240 Elf_Internal_Rela *internal_relocs, int *insn_len,
10241 int *seq_len, bfd_byte *contents,
10242 Elf_Internal_Sym *isymbuf,
10243 Elf_Internal_Shdr *symtab_hdr)
10244 {
10245 /* There are 5 variations for LONGJUMP6
10246 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10247 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10248 sethi ta, hi20(symbol) ; HI20/PTR
10249 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10250 jr ta ; PTR_RES/INSN16/EMPTY
10251 .L1:
10252
10253 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10254 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10255 sethi ta, hi20(symbol) ; HI20/PTR
10256 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10257 jr ta ; PTR_RES/INSN16/EMPTY
10258 .L1: */
10259
10260 enum elf_nds32_reloc_type checked_types[] =
10261 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10262 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10263
10264 int reloc_off = 0, cond_removed = 0;
10265 bfd_vma laddr;
10266 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10267 int pic_ext_target = 0;
10268 unsigned int i;
10269 bfd_signed_vma foff;
10270 uint32_t insn, re_insn = 0;
10271 uint16_t insn16, re_insn16 = 0;
10272 unsigned long reloc;
10273
10274 irelend = internal_relocs + sec->reloc_count;
10275 laddr = irel->r_offset;
10276
10277 /* Get the reloc for the address from which the register is
10278 being loaded. This reloc will tell us which function is
10279 actually being called. */
10280 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10281 R_NDS32_EMPTY, irel->r_addend);
10282
10283 if (em_irel == irelend)
10284 {
10285 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
10286 irel->r_offset);
10287 return FALSE;
10288 }
10289
10290 /* Get the value of the symbol referred to by the reloc. */
10291 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10292 &pic_ext_target);
10293
10294 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10295 || foff >= CONSERVATIVE_24BIT_S1)
10296 return FALSE;
10297
10298 insn = bfd_getb32 (contents + laddr);
10299 /* Check instruction size. */
10300 if (insn & 0x80000000)
10301 {
10302 *seq_len = 0;
10303 insn16 = insn >> 16;
10304 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10305 }
10306 else
10307 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10308
10309 /* For simplicity of coding, we are going to modify the section
10310 contents, the section relocs, and the BFD symbol table. We
10311 must tell the rest of the code not to free up this
10312 information. It would be possible to instead create a table
10313 of changes which have to be made, as is done in coff-mips.c;
10314 that would be more work, but would require less memory when
10315 the linker is run. */
10316
10317 if (N32_OP6 (re_insn) == N32_OP6_BR1
10318 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10319 {
10320 /* beqs label ; 15_PCREL */
10321 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10322 reloc = R_NDS32_15_PCREL_RELA;
10323 cond_removed = 1;
10324 }
10325 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10326 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10327 {
10328 /* beqz label ; 17_PCREL */
10329 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10330 reloc = R_NDS32_17_PCREL_RELA;
10331 cond_removed = 1;
10332 }
10333 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10334 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10335 {
10336 /* Relax to one of the following 2 variations
10337
10338 case 2-4; 1st insn convertible, 16-bit on.
10339 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10340 j label ; 25_PCREL/INSN16
10341 $1:
10342
10343 case 4-4; 1st insn not convertible
10344 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10345 j label ; 25_PCREL/INSN16
10346 .L1: */
10347
10348 /* Use j label as second instruction. */
10349 insn = INSN_J;
10350 reloc = R_NDS32_25_PCREL_RELA;
10351 bfd_putb32 (insn, contents + em_irel->r_offset);
10352 }
10353 else
10354 return FALSE;
10355
10356 /* Set all relocations. */
10357 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
10358
10359 cond_irel =
10360 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10361 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10362 cond_irel->r_addend = 1;
10363
10364 /* Use INSN16 of first branch instruction to distinguish if keeping
10365 INSN16 of final instruction or not. */
10366 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10367 R_NDS32_INSN16, irel->r_offset);
10368 if (insn_irel == irelend)
10369 {
10370 /* Clean the final INSN16. */
10371 insn_irel =
10372 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10373 R_NDS32_INSN16, em_irel->r_offset);
10374 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10375 R_NDS32_NONE);
10376 }
10377
10378 if (cond_removed == 1)
10379 {
10380 *insn_len = 0;
10381
10382 /* Clear relocations. */
10383 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10384
10385 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10386 {
10387 cond_irel =
10388 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10389 checked_types[i], laddr);
10390 if (cond_irel != irelend)
10391 {
10392 if (*seq_len == 0
10393 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10394 {
10395 /* If the branch instruction is 2 byte, it cannot remove
10396 directly. Only convert it to nop16 and remove it after
10397 checking alignment issue. */
10398 insn16 = NDS32_NOP16;
10399 bfd_putb16 (insn16, contents + laddr);
10400 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10401 }
10402 else
10403 cond_irel->r_info =
10404 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10405 }
10406 }
10407 }
10408 else
10409 {
10410 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10411 R_NDS32_LONGJUMP5);
10412 }
10413
10414 return TRUE;
10415 }
10416
10417 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
10418
10419 static bfd_boolean
10420 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10421 Elf_Internal_Rela *internal_relocs, int *insn_len,
10422 int *seq_len, bfd_byte *contents,
10423 Elf_Internal_Sym *isymbuf,
10424 Elf_Internal_Shdr *symtab_hdr)
10425 {
10426 /* There are 2 variations for LONGJUMP5
10427 case 2-4; 1st insn convertible, 16-bit on.
10428 movi55 ta, imm11 ; LONGJUMP7/INSN16
10429 beq rt, ta, label ; 15_PCREL
10430
10431 case 4-4; 1st insn not convertible
10432 movi55 ta, imm11 ; LONGJUMP7/INSN16
10433 beq rt, ta, label ; 15_PCREL */
10434
10435 bfd_vma laddr;
10436 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10437 int pic_ext_target = 0;
10438 bfd_signed_vma foff;
10439 uint32_t insn, re_insn = 0;
10440 uint16_t insn16;
10441 uint32_t imm11;
10442
10443 irelend = internal_relocs + sec->reloc_count;
10444 laddr = irel->r_offset;
10445
10446 /* Get the reloc for the address from which the register is
10447 being loaded. This reloc will tell us which function is
10448 actually being called. */
10449
10450 cond_irel =
10451 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10452 R_NDS32_15_PCREL_RELA, irel->r_addend);
10453 if (cond_irel == irelend)
10454 {
10455 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
10456 irel->r_offset);
10457 return FALSE;
10458 }
10459
10460 /* Get the value of the symbol referred to by the reloc. */
10461 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10462 &pic_ext_target);
10463
10464 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10465 || foff >= CONSERVATIVE_8BIT_S1)
10466 return FALSE;
10467
10468 /* Get the first instruction for its size. */
10469 insn = bfd_getb32 (contents + laddr);
10470 if (insn & 0x80000000)
10471 {
10472 *seq_len = 0;
10473 /* Get the immediate from movi55. */
10474 imm11 = N16_IMM5S (insn >> 16);
10475 }
10476 else
10477 {
10478 /* Get the immediate from movi. */
10479 imm11 = N32_IMM20S (insn);
10480 }
10481
10482 /* Get the branch instruction. */
10483 insn = bfd_getb32 (contents + irel->r_addend);
10484 /* Convert instruction to BR3. */
10485 if ((insn >> 14) & 0x1)
10486 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10487 else
10488 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
10489
10490 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10491
10492 /* Set all relocations. */
10493 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10494 R_NDS32_WORD_9_PCREL_RELA);
10495
10496 /* Clean relocations. */
10497 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10498 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10499 R_NDS32_INSN16, irel->r_offset);
10500 if (insn_irel != irelend)
10501 {
10502 if (*seq_len == 0)
10503 {
10504 /* If the first insntruction is 16bit, convert it to nop16. */
10505 insn16 = NDS32_NOP16;
10506 bfd_putb16 (insn16, contents + laddr);
10507 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10508 }
10509 else
10510 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10511 R_NDS32_NONE);
10512 }
10513 *insn_len = 0;
10514
10515 return TRUE;
10516 }
10517
10518 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
10519
10520 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */
10521
10522 static bfd_boolean
10523 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10524 asection *sec, Elf_Internal_Rela *irel,
10525 Elf_Internal_Rela *internal_relocs, int *insn_len,
10526 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10527 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10528 {
10529 int eliminate_sethi = 0, range_type;
10530 unsigned int i;
10531 bfd_vma local_sda, laddr;
10532 int seq_len; /* Original length of instruction sequence. */
10533 uint32_t insn;
10534 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10535 bfd_vma access_addr = 0;
10536 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10537 enum elf_nds32_reloc_type checked_types[] =
10538 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10539 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10540 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10541 R_NDS32_TLS_LE_HI20
10542 };
10543
10544 irelend = internal_relocs + sec->reloc_count;
10545 seq_len = GET_SEQ_LEN (irel->r_addend);
10546 laddr = irel->r_offset;
10547 *insn_len = seq_len;
10548
10549 /* Get the high part relocation. */
10550 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
10551 {
10552 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10553 checked_types[i], laddr);
10554 if (hi_irelfn != irelend)
10555 break;
10556 }
10557
10558 if (hi_irelfn == irelend)
10559 {
10560 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
10561 irel->r_offset);
10562 return FALSE;
10563 }
10564
10565 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10566 nds32_elf_final_sda_base (sec->output_section->owner,
10567 link_info, &local_sda, FALSE);
10568
10569 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10570 {
10571 case R_NDS32_HI20_RELA:
10572 insn = bfd_getb32 (contents + laddr);
10573 access_addr =
10574 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10575
10576 if (range_type == NDS32_LOADSTORE_IMM)
10577 {
10578 struct elf_link_hash_entry *h = NULL;
10579 int indx;
10580
10581 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
10582 {
10583 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10584 h = elf_sym_hashes (abfd)[indx];
10585 }
10586
10587 if ((access_addr < CONSERVATIVE_20BIT)
10588 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10589 {
10590 eliminate_sethi = 1;
10591 break;
10592 }
10593
10594 /* This is avoid to relax symbol address which is fixed
10595 relocations. Ex: _stack. */
10596 if (h && bfd_is_abs_section (h->root.u.def.section))
10597 return FALSE;
10598 }
10599
10600 if (!load_store_relax)
10601 return FALSE;
10602
10603 /* Case for set gp register. */
10604 if (N32_RT5 (insn) == REG_GP)
10605 break;
10606
10607 if (range_type == NDS32_LOADSTORE_FLOAT_S
10608 || range_type == NDS32_LOADSTORE_FLOAT_D)
10609 {
10610 range_l = sdata_range[0][0];
10611 range_h = sdata_range[0][1];
10612 }
10613 else
10614 {
10615 range_l = sdata_range[1][0];
10616 range_h = sdata_range[1][1];
10617 }
10618 break;
10619
10620 case R_NDS32_GOT_HI20:
10621 access_addr =
10622 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10623
10624 /* If this symbol is not in .got, the return value will be -1.
10625 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10626 a negative offset is allowed. */
10627 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10628 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10629 eliminate_sethi = 1;
10630 break;
10631
10632 case R_NDS32_PLT_GOTREL_HI20:
10633 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10634 hi_irelfn, symtab_hdr);
10635
10636 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10637 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10638 eliminate_sethi = 1;
10639 break;
10640
10641 case R_NDS32_GOTOFF_HI20:
10642 access_addr =
10643 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10644
10645 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10646 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10647 eliminate_sethi = 1;
10648 break;
10649
10650 case R_NDS32_GOTPC_HI20:
10651 /* The access_addr must consider r_addend of hi_irel. */
10652 access_addr = sec->output_section->vma + sec->output_offset
10653 + irel->r_offset + hi_irelfn->r_addend;
10654
10655 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10656 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10657 eliminate_sethi = 1;
10658 break;
10659
10660 case R_NDS32_TLS_LE_HI20:
10661 access_addr =
10662 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10663 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10664 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10665 if ((range_type == NDS32_LOADSTORE_IMM)
10666 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10667 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10668 eliminate_sethi = 1;
10669 break;
10670
10671 default:
10672 return FALSE;
10673 }
10674
10675 /* Delete sethi instruction. */
10676 if (eliminate_sethi == 1
10677 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10678 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10679 {
10680 hi_irelfn->r_info =
10681 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10682 irel->r_info =
10683 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10684 *insn_len = 0;
10685 }
10686 return TRUE;
10687 }
10688
10689 /* Relax LO12 relocation for nds32_elf_relax_section. */
10690
10691 static void
10692 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10693 asection *sec, Elf_Internal_Rela *irel,
10694 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10695 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10696 {
10697 uint32_t insn;
10698 bfd_vma local_sda, laddr;
10699 unsigned long reloc;
10700 bfd_vma access_addr;
10701 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10702 Elf_Internal_Rela *irelfn = NULL, *irelend;
10703 struct elf_link_hash_entry *h = NULL;
10704 int indx;
10705
10706 /* For SDA base relative relaxation. */
10707 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10708 &local_sda, FALSE);
10709
10710 irelend = internal_relocs + sec->reloc_count;
10711 laddr = irel->r_offset;
10712 insn = bfd_getb32 (contents + laddr);
10713
10714 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10715 return;
10716
10717 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10718
10719 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10720 {
10721 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10722 h = elf_sym_hashes (abfd)[indx];
10723 }
10724
10725 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10726 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10727 {
10728 reloc = R_NDS32_20_RELA;
10729 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10730 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10731 bfd_putb32 (insn, contents + laddr);
10732 }
10733 /* This is avoid to relax symbol address which is fixed
10734 relocations. Ex: _stack. */
10735 else if (N32_OP6 (insn) == N32_OP6_ORI
10736 && h && bfd_is_abs_section (h->root.u.def.section))
10737 return;
10738 else
10739 {
10740 range_l = sdata_range[1][0];
10741 range_h = sdata_range[1][1];
10742 switch (ELF32_R_TYPE (irel->r_info))
10743 {
10744 case R_NDS32_LO12S0_RELA:
10745 reloc = R_NDS32_SDA19S0_RELA;
10746 break;
10747 case R_NDS32_LO12S1_RELA:
10748 reloc = R_NDS32_SDA18S1_RELA;
10749 break;
10750 case R_NDS32_LO12S2_RELA:
10751 reloc = R_NDS32_SDA17S2_RELA;
10752 break;
10753 case R_NDS32_LO12S2_DP_RELA:
10754 range_l = sdata_range[0][0];
10755 range_h = sdata_range[0][1];
10756 reloc = R_NDS32_SDA12S2_DP_RELA;
10757 break;
10758 case R_NDS32_LO12S2_SP_RELA:
10759 range_l = sdata_range[0][0];
10760 range_h = sdata_range[0][1];
10761 reloc = R_NDS32_SDA12S2_SP_RELA;
10762 break;
10763 default:
10764 return;
10765 }
10766
10767 /* There are range_h and range_l because linker has to promise
10768 all sections move cross one page together. */
10769 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10770 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10771 {
10772 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
10773 {
10774 /* Maybe we should add R_NDS32_INSN16 reloc type here
10775 or manually do some optimization. sethi can't be
10776 eliminated when updating $gp so the relative ori
10777 needs to be preserved. */
10778 return;
10779 }
10780 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10781 &insn))
10782 return;
10783 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10784 bfd_putb32 (insn, contents + laddr);
10785
10786 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10787 R_NDS32_INSN16);
10788 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10789 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10790 irelfn->r_info =
10791 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10792
10793 }
10794 }
10795 return;
10796 }
10797
10798 /* Relax low part of PIC instruction pattern. */
10799
10800 static void
10801 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10802 asection *sec, Elf_Internal_Rela *irel,
10803 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10804 Elf_Internal_Shdr *symtab_hdr)
10805 {
10806 uint32_t insn;
10807 bfd_vma local_sda, laddr;
10808 bfd_signed_vma foff;
10809 unsigned long reloc;
10810
10811 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10812 &local_sda, FALSE);
10813 laddr = irel->r_offset;
10814 insn = bfd_getb32 (contents + laddr);
10815
10816 if (N32_OP6 (insn) != N32_OP6_ORI)
10817 return;
10818
10819 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10820 {
10821 foff = calculate_got_memory_address (abfd, link_info, irel,
10822 symtab_hdr) - local_sda;
10823 reloc = R_NDS32_GOT20;
10824 }
10825 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10826 {
10827 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10828 symtab_hdr) - local_sda;
10829 reloc = R_NDS32_PLT_GOTREL_LO20;
10830 }
10831 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10832 {
10833 foff = calculate_memory_address (abfd, irel, isymbuf,
10834 symtab_hdr) - local_sda;
10835 reloc = R_NDS32_GOTOFF;
10836 }
10837 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10838 {
10839 foff = local_sda - sec->output_section->vma + sec->output_offset
10840 + irel->r_offset + irel->r_addend;
10841 reloc = R_NDS32_GOTPC20;
10842 }
10843 else
10844 return;
10845
10846 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10847 {
10848 /* Turn into MOVI. */
10849 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10850 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10851 bfd_putb32 (insn, contents + laddr);
10852 }
10853 }
10854
10855 /* Relax low part of LE TLS instruction pattern. */
10856
10857 static void
10858 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10859 Elf_Internal_Rela *irel,
10860 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10861 Elf_Internal_Shdr *symtab_hdr)
10862 {
10863 uint32_t insn;
10864 bfd_vma laddr;
10865 bfd_signed_vma foff;
10866 unsigned long reloc;
10867
10868 laddr = irel->r_offset;
10869 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10870 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10871 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10872 insn = bfd_getb32 (contents + laddr);
10873
10874 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10875 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10876 {
10877 /* Pattern sethi-ori transform to movi. */
10878 reloc = R_NDS32_TLS_LE_20;
10879 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10880 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10881 bfd_putb32 (insn, contents + laddr);
10882 }
10883 }
10884
10885 /* Relax LE TLS calculate address instruction pattern. */
10886
10887 static void
10888 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10889 asection *sec, Elf_Internal_Rela *irel,
10890 Elf_Internal_Rela *internal_relocs,
10891 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10892 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10893 {
10894 /* Local TLS non-pic
10895 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
10896 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
10897 add ra, ta, tp ; TLS_LE_ADD */
10898
10899 uint32_t insn;
10900 bfd_vma laddr;
10901 bfd_signed_vma foff;
10902 Elf_Internal_Rela *i1_irelfn, *irelend;
10903
10904 irelend = internal_relocs + sec->reloc_count;
10905 laddr = irel->r_offset;
10906 insn = bfd_getb32 (contents + laddr);
10907 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10908 R_NDS32_PTR_RESOLVED);
10909 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10910 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10911 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10912
10913 /* The range is +/-16k. */
10914 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10915 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10916 {
10917 /* Transform add to addi. */
10918 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10919 irel->r_info =
10920 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10921
10922 bfd_putb32 (insn, contents + laddr);
10923 if (i1_irelfn != irelend)
10924 {
10925 i1_irelfn->r_addend |= 1;
10926 *again = TRUE;
10927 }
10928 }
10929 }
10930
10931 /* Relax LE TLS load store instruction pattern. */
10932
10933 static void
10934 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10935 asection *sec, Elf_Internal_Rela *irel,
10936 Elf_Internal_Rela *internal_relocs,
10937 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10938 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10939 {
10940
10941 uint32_t insn;
10942 bfd_vma laddr;
10943 bfd_signed_vma foff;
10944 Elf_Internal_Rela *i1_irelfn, *irelend;
10945 int success = 0;
10946
10947 irelend = internal_relocs + sec->reloc_count;
10948 laddr = irel->r_offset;
10949 insn = bfd_getb32 (contents + laddr);
10950 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10951 R_NDS32_PTR_RESOLVED);
10952 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10953 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10954 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10955
10956 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
10957 {
10958 case (N32_OP6_MEM << 8) | N32_MEM_LB:
10959 case (N32_OP6_MEM << 8) | N32_MEM_SB:
10960 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10961 /* The range is +/-16k. */
10962 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10963 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10964 {
10965 insn =
10966 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10967 irel->r_info =
10968 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10969 success = 1;
10970 break;
10971 }
10972 /* Fall through. */
10973 case (N32_OP6_MEM << 8) | N32_MEM_LH:
10974 case (N32_OP6_MEM << 8) | N32_MEM_SH:
10975 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10976 /* The range is +/-32k. */
10977 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
10978 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
10979 {
10980 insn =
10981 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10982 irel->r_info =
10983 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
10984 success = 1;
10985 break;
10986 }
10987 /* Fall through. */
10988 case (N32_OP6_MEM << 8) | N32_MEM_LW:
10989 case (N32_OP6_MEM << 8) | N32_MEM_SW:
10990 /* The range is +/-64k. */
10991 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
10992 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
10993 {
10994 insn =
10995 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10996 irel->r_info =
10997 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
10998 success = 1;
10999 break;
11000 }
11001 /* Fall through. */
11002 default:
11003 break;
11004 }
11005
11006 if (success)
11007 {
11008 bfd_putb32 (insn, contents + laddr);
11009 if (i1_irelfn != irelend)
11010 {
11011 i1_irelfn->r_addend |= 1;
11012 *again = TRUE;
11013 }
11014 }
11015 }
11016
11017 /* Relax PTR relocation for nds32_elf_relax_section. */
11018
11019 static bfd_boolean
11020 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11021 Elf_Internal_Rela *internal_relocs, int *insn_len,
11022 int *seq_len, bfd_byte *contents)
11023 {
11024 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
11025
11026 irelend = internal_relocs + sec->reloc_count;
11027
11028 re_irel =
11029 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11030 R_NDS32_PTR_RESOLVED, irel->r_addend);
11031
11032 if (re_irel == irelend)
11033 {
11034 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
11035 irel->r_offset);
11036 return FALSE;
11037 }
11038
11039 if (re_irel->r_addend != 1)
11040 return FALSE;
11041
11042 /* Pointed target is relaxed and no longer needs this void *,
11043 change the type to NONE. */
11044 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11045
11046 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11047 not exist, it means only count 1 and remove it directly. */
11048 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11049 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11050 R_NDS32_PTR_COUNT);
11051 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11052 R_NDS32_PTR);
11053 if (count_irel != irelend)
11054 {
11055 if (--count_irel->r_addend > 0)
11056 return FALSE;
11057 }
11058
11059 if (ptr_irel != irelend)
11060 return FALSE;
11061
11062 /* If the PTR_COUNT is already 0, remove current instruction. */
11063 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11064 *insn_len = 0;
11065 return TRUE;
11066 }
11067
11068 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11069
11070 static void
11071 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11072 asection *sec, Elf_Internal_Rela *irel,
11073 Elf_Internal_Rela *internal_relocs,
11074 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11075 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11076 {
11077 uint32_t insn;
11078 bfd_signed_vma foff;
11079 Elf_Internal_Rela *i1_irelfn, *irelend;
11080 bfd_vma local_sda, laddr;
11081
11082 irelend = internal_relocs + sec->reloc_count;
11083 laddr = irel->r_offset;
11084 insn = bfd_getb32 (contents + laddr);
11085
11086 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11087 we need additional space. It might be help if we could
11088 borrow some space from instructions to be eliminated
11089 such as sethi, ori, add. */
11090 if (insn & 0x80000000)
11091 return;
11092
11093 if (nds32_elf_check_dup_relocs
11094 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11095 return;
11096
11097 i1_irelfn =
11098 find_relocs_at_address (irel, internal_relocs, irelend,
11099 R_NDS32_PTR_RESOLVED);
11100
11101 /* FIXIT 090606
11102 The boundary should be reduced since the .plt section hasn't
11103 been created and the address of specific entry is still unknown
11104 Maybe the range between the function call and the begin of the
11105 .text section can be used to decide if the .plt is in the range
11106 of function call. */
11107
11108 if (N32_OP6 (insn) == N32_OP6_ALU1
11109 && N32_SUB5 (insn) == N32_ALU1_ADD)
11110 {
11111 /* Get the value of the symbol referred to by the reloc. */
11112 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11113 &local_sda, FALSE);
11114 foff = (bfd_signed_vma) (calculate_plt_memory_address
11115 (abfd, link_info, isymbuf, irel,
11116 symtab_hdr) - local_sda);
11117 /* This condition only happened when symbol is undefined. */
11118 if (foff == 0)
11119 return;
11120
11121 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11122 return;
11123 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11124 R_NDS32_PLT_GOTREL_LO19);
11125 /* addi.gp */
11126 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
11127 }
11128 else if (N32_OP6 (insn) == N32_OP6_JREG
11129 && N32_SUB5 (insn) == N32_JREG_JRAL)
11130 {
11131 /* Get the value of the symbol referred to by the reloc. */
11132 foff =
11133 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11134 /* This condition only happened when symbol is undefined. */
11135 if (foff == 0)
11136 return;
11137 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11138 return;
11139 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11140 insn = INSN_JAL;
11141 }
11142 else
11143 return;
11144
11145 bfd_putb32 (insn, contents + laddr);
11146 if (i1_irelfn != irelend)
11147 {
11148 i1_irelfn->r_addend |= 1;
11149 *again = TRUE;
11150 }
11151 }
11152
11153 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11154
11155 static void
11156 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11157 asection *sec, Elf_Internal_Rela *irel,
11158 Elf_Internal_Rela *internal_relocs,
11159 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11160 bfd_boolean *again)
11161 {
11162 uint32_t insn;
11163 bfd_signed_vma foff;
11164 Elf_Internal_Rela *i1_irelfn, *irelend;
11165 bfd_vma local_sda, laddr;
11166
11167 irelend = internal_relocs + sec->reloc_count;
11168 laddr = irel->r_offset;
11169 insn = bfd_getb32 (contents + laddr);
11170 if (insn & 0x80000000)
11171 return;
11172
11173 if (nds32_elf_check_dup_relocs
11174 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11175 return;
11176
11177 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11178 R_NDS32_PTR_RESOLVED);
11179
11180 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11181 &local_sda, FALSE);
11182 foff = calculate_got_memory_address (abfd, link_info, irel,
11183 symtab_hdr) - local_sda;
11184
11185 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11186 {
11187 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11188 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11189 irel->r_info =
11190 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11191 bfd_putb32 (insn, contents + laddr);
11192 if (i1_irelfn != irelend)
11193 {
11194 i1_irelfn->r_addend |= 1;
11195 *again = TRUE;
11196 }
11197 }
11198 }
11199
11200 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11201
11202 static void
11203 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11204 asection *sec, Elf_Internal_Rela *irel,
11205 Elf_Internal_Rela *internal_relocs,
11206 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11207 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11208 {
11209 int opc_insn_gotoff;
11210 uint32_t insn;
11211 bfd_signed_vma foff;
11212 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11213 bfd_vma local_sda, laddr;
11214
11215 irelend = internal_relocs + sec->reloc_count;
11216 laddr = irel->r_offset;
11217 insn = bfd_getb32 (contents + laddr);
11218
11219 if (insn & 0x80000000)
11220 return;
11221
11222 if (nds32_elf_check_dup_relocs
11223 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11224 return;
11225
11226 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11227 R_NDS32_PTR_RESOLVED);
11228 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11229 &local_sda, FALSE);
11230 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11231 foff = foff - local_sda;
11232
11233 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11234 return;
11235
11236 /* Concatenate opcode and sub-opcode for switch case.
11237 It may be MEM or ALU1. */
11238 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11239 switch (opc_insn_gotoff)
11240 {
11241 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11242 /* 4-byte aligned. */
11243 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11244 irel->r_info =
11245 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11246 break;
11247 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11248 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11249 irel->r_info =
11250 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11251 break;
11252 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11253 /* 2-byte aligned. */
11254 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11255 irel->r_info =
11256 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11257 break;
11258 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11259 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
11260 irel->r_info =
11261 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11262 break;
11263 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11264 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
11265 irel->r_info =
11266 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11267 break;
11268 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11269 /* 1-byte aligned. */
11270 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11271 irel->r_info =
11272 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11273 break;
11274 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11275 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
11276 irel->r_info =
11277 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11278 break;
11279 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11280 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11281 irel->r_info =
11282 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11283 break;
11284 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11285 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
11286 irel->r_info =
11287 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11288 break;
11289 default:
11290 return;
11291 }
11292
11293 bfd_putb32 (insn, contents + laddr);
11294 if (i1_irelfn != irelend)
11295 {
11296 i1_irelfn->r_addend |= 1;
11297 *again = TRUE;
11298 }
11299 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11300 R_NDS32_INSN16)) != irelend)
11301 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11302
11303 }
11304
11305 static bfd_boolean
11306 nds32_relax_adjust_label (bfd *abfd, asection *sec,
11307 Elf_Internal_Rela *internal_relocs,
11308 bfd_byte *contents,
11309 nds32_elf_blank_t **relax_blank_list,
11310 int optimize, int opt_size)
11311 {
11312 /* This code block is used to adjust 4-byte alignment by relax a pair
11313 of instruction a time.
11314
11315 It recognizes three types of relocations.
11316 1. R_NDS32_LABEL - a alignment.
11317 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11318 3. is_16bit_NOP () - remove a 16-bit instruction. */
11319
11320 /* TODO: It seems currently implementation only support 4-byte alignment.
11321 We should handle any-alignment. */
11322
11323 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11324 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11325 Elf_Internal_Rela rel_temp;
11326 Elf_Internal_Rela *irelend;
11327 bfd_vma address;
11328 uint16_t insn16;
11329
11330 /* Checking for branch relaxation relies on the relocations to
11331 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11332 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11333 sizeof (Elf_Internal_Rela), compar_reloc);
11334
11335 irelend = internal_relocs + sec->reloc_count;
11336
11337 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11338 /* FIXME: Can we generate the right order in assembler?
11339 So we don't have to swapping them here. */
11340
11341 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11342 label_rel < irelend; label_rel++)
11343 {
11344 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11345 continue;
11346
11347 /* Find the first reloc has the same offset with label_rel. */
11348 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11349 insn_rel++;
11350
11351 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11352 insn_rel++)
11353 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11354 address. */
11355 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11356 break;
11357
11358 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11359 && insn_rel < label_rel)
11360 {
11361 /* Swap the two reloc if the R_NDS32_INSN16 is
11362 before R_NDS32_LABEL. */
11363 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11364 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11365 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11366 }
11367 }
11368
11369 label_rel = NULL;
11370 insn_rel = NULL;
11371 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11372 or higher, remove other R_NDS32_LABEL with lower alignment.
11373 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11374 then the R_NDS32_LABEL sequence is broke. */
11375 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11376 {
11377 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11378 {
11379 if (label_rel == NULL)
11380 {
11381 if (tmp_rel->r_addend < 2)
11382 label_rel = tmp_rel;
11383 continue;
11384 }
11385 else if (tmp_rel->r_addend > 1)
11386 {
11387 /* Remove all LABEL relocation from label_rel to tmp_rel
11388 including relocations with same offset as tmp_rel. */
11389 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11390 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11391 {
11392 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11393 && tmp2_rel->r_addend < 2)
11394 tmp2_rel->r_info =
11395 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11396 R_NDS32_NONE);
11397 }
11398 label_rel = NULL;
11399 }
11400 }
11401 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11402 {
11403 /* A new INSN16 which can be converted, so clear label_rel. */
11404 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11405 irelend, &insn16)
11406 || is_16bit_NOP (abfd, sec, tmp_rel))
11407 label_rel = NULL;
11408 }
11409 }
11410
11411 label_rel = NULL;
11412 insn_rel = NULL;
11413 /* Optimized for speed and nothing has not been relaxed.
11414 It's time to align labels.
11415 We may convert a 16-bit instruction right before a label to
11416 32-bit, in order to align the label if necessary
11417 all reloc entries has been sorted by r_offset. */
11418 for (irel = internal_relocs; irel < irelend; irel++)
11419 {
11420 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11421 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11422 continue;
11423
11424 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11425 {
11426 /* A new INSN16 found, resize the old one. */
11427 if (is_convert_32_to_16
11428 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11429 || is_16bit_NOP (abfd, sec, irel))
11430 {
11431 if (insn_rel)
11432 {
11433 /* Previous INSN16 reloc exists, reduce its
11434 size to 16-bit. */
11435 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11436 irelend, &insn16))
11437 {
11438 nds32_elf_write_16 (abfd, contents, insn_rel,
11439 internal_relocs, irelend, insn16);
11440
11441 if (!insert_nds32_elf_blank_recalc_total
11442 (relax_blank_list, insn_rel->r_offset + 2, 2))
11443 return FALSE;
11444 }
11445 else if (is_16bit_NOP (abfd, sec, insn_rel))
11446 {
11447 if (!insert_nds32_elf_blank_recalc_total
11448 (relax_blank_list, insn_rel->r_offset, 2))
11449 return FALSE;
11450 }
11451 insn_rel->r_info =
11452 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11453 }
11454 /* Save the new one for later use. */
11455 insn_rel = irel;
11456 }
11457 else
11458 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11459 R_NDS32_NONE);
11460 }
11461 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11462 {
11463 /* Search for label. */
11464 int force_relax = 0;
11465
11466 /* Label on 16-bit instruction or optimization
11467 needless, just reset this reloc. */
11468 insn16 = bfd_getb16 (contents + irel->r_offset);
11469 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11470 {
11471 irel->r_info =
11472 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11473 continue;
11474 }
11475
11476 address =
11477 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11478 irel->r_offset, 1);
11479
11480 if (!insn_rel)
11481 {
11482 /* Check if there is case which can not be aligned. */
11483 if (irel->r_addend == 2 && address & 0x2)
11484 return FALSE;
11485 continue;
11486 }
11487
11488 /* Try to align this label. */
11489
11490 if ((irel->r_addend & 0x1f) < 2)
11491 {
11492 /* Check if there is a INSN16 at the same address.
11493 Label_rel always seats before insn_rel after
11494 our sort. */
11495
11496 /* Search for INSN16 at LABEL location. If INSN16 is at
11497 same location and this LABEL alignment is lower than 2,
11498 the INSN16 can be converted to 2-byte. */
11499 for (tmp_rel = irel;
11500 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11501 tmp_rel++)
11502 {
11503 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11504 && (is_convert_32_to_16
11505 (abfd, sec, tmp_rel, internal_relocs,
11506 irelend, &insn16)
11507 || is_16bit_NOP (abfd, sec, tmp_rel)))
11508 {
11509 force_relax = 1;
11510 break;
11511 }
11512 }
11513 }
11514
11515 if (force_relax || irel->r_addend == 1 || address & 0x2)
11516 {
11517 /* Label not aligned. */
11518 /* Previous reloc exists, reduce its size to 16-bit. */
11519 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11520 internal_relocs, irelend, &insn16))
11521 {
11522 nds32_elf_write_16 (abfd, contents, insn_rel,
11523 internal_relocs, irelend, insn16);
11524
11525 if (!insert_nds32_elf_blank_recalc_total
11526 (relax_blank_list, insn_rel->r_offset + 2, 2))
11527 return FALSE;
11528 }
11529 else if (is_16bit_NOP (abfd, sec, insn_rel))
11530 {
11531 if (!insert_nds32_elf_blank_recalc_total
11532 (relax_blank_list, insn_rel->r_offset, 2))
11533 return FALSE;
11534 }
11535
11536 }
11537 /* INSN16 reloc is used. */
11538 insn_rel = NULL;
11539 }
11540 }
11541
11542 address =
11543 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11544 if (insn_rel && (address & 0x2 || opt_size))
11545 {
11546 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11547 irelend, &insn16))
11548 {
11549 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11550 irelend, insn16);
11551 if (!insert_nds32_elf_blank_recalc_total
11552 (relax_blank_list, insn_rel->r_offset + 2, 2))
11553 return FALSE;
11554 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11555 R_NDS32_NONE);
11556 }
11557 else if (is_16bit_NOP (abfd, sec, insn_rel))
11558 {
11559 if (!insert_nds32_elf_blank_recalc_total
11560 (relax_blank_list, insn_rel->r_offset, 2))
11561 return FALSE;
11562 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11563 R_NDS32_NONE);
11564 }
11565 }
11566 insn_rel = NULL;
11567 return TRUE;
11568 }
11569
11570 /* Pick relaxation round. */
11571
11572 static int
11573 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11574 struct elf_nds32_link_hash_table *table,
11575 struct bfd_link_info *link_info)
11576 {
11577 static asection *final_sec, *first_sec = NULL;
11578 static bfd_boolean normal_again = FALSE;
11579 static bfd_boolean set = FALSE;
11580 static bfd_boolean first = TRUE;
11581 int round_table[] = {
11582 NDS32_RELAX_NORMAL_ROUND,
11583 NDS32_RELAX_JUMP_IFC_ROUND,
11584 NDS32_RELAX_EX9_BUILD_ROUND,
11585 NDS32_RELAX_EX9_REPLACE_ROUND,
11586 };
11587 static int pass = 0;
11588 static int relax_round;
11589
11590 /* The new round. */
11591 if (init && first_sec == sec)
11592 {
11593 set = TRUE;
11594 normal_again = FALSE;
11595 }
11596
11597 if (first)
11598 {
11599 /* Run an empty run to get the final section. */
11600 relax_round = NDS32_RELAX_EMPTY_ROUND;
11601
11602 /* It has to enter relax again because we can
11603 not make sure what the final turn is. */
11604 *again = TRUE;
11605
11606 first = FALSE;
11607 first_sec = sec;
11608 }
11609
11610 if (!set)
11611 {
11612 /* Not reenter yet. */
11613 final_sec = sec;
11614 return relax_round;
11615 }
11616
11617 relax_round = round_table[pass];
11618
11619 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11620 normal_again = TRUE;
11621
11622 if (!init && final_sec == sec)
11623 {
11624 switch (relax_round)
11625 {
11626 case NDS32_RELAX_NORMAL_ROUND:
11627 if (!normal_again)
11628 {
11629 /* Normal relaxation done. */
11630 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11631 {
11632 pass++;
11633 *again = TRUE;
11634 }
11635 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11636 {
11637 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11638 *again = TRUE;
11639 }
11640 else if (table->ex9_import_file)
11641 {
11642 /* Import ex9 table. */
11643 if (table->update_ex9_table)
11644 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11645 else
11646 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11647 nds32_elf_ex9_import_table (link_info);
11648 *again = TRUE;
11649 }
11650 }
11651 break;
11652 case NDS32_RELAX_JUMP_IFC_ROUND:
11653 if (!nds32_elf_ifc_finish (link_info))
11654 _bfd_error_handler (_("error: Jump IFC Fail."));
11655 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11656 {
11657 pass++;
11658 *again = TRUE;
11659 }
11660 break;
11661 case NDS32_RELAX_EX9_BUILD_ROUND:
11662 nds32_elf_ex9_finish (link_info);
11663 pass++;
11664 *again = TRUE;
11665 break;
11666 case NDS32_RELAX_EX9_REPLACE_ROUND:
11667 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11668 {
11669 /* Do jump IFC optimization again. */
11670 if (!nds32_elf_ifc_finish (link_info))
11671 _bfd_error_handler (_("error: Jump IFC Fail."));
11672 }
11673 break;
11674 default:
11675 break;
11676 }
11677 }
11678
11679 return relax_round;
11680 }
11681
11682 static bfd_boolean
11683 nds32_elf_relax_section (bfd *abfd, asection *sec,
11684 struct bfd_link_info *link_info, bfd_boolean *again)
11685 {
11686 nds32_elf_blank_t *relax_blank_list = NULL;
11687 Elf_Internal_Shdr *symtab_hdr;
11688 Elf_Internal_Rela *internal_relocs;
11689 Elf_Internal_Rela *irel;
11690 Elf_Internal_Rela *irelend;
11691 Elf_Internal_Sym *isymbuf = NULL;
11692 bfd_byte *contents = NULL;
11693 bfd_boolean result = TRUE;
11694 int optimize = 0;
11695 int opt_size = 0;
11696 uint32_t insn;
11697 uint16_t insn16;
11698
11699 /* Target dependnet option. */
11700 struct elf_nds32_link_hash_table *table;
11701 int load_store_relax;
11702 int relax_round;
11703
11704 relax_blank_list = NULL;
11705
11706 *again = FALSE;
11707
11708 /* Nothing to do for
11709 * relocatable link or
11710 * non-relocatable section or
11711 * non-code section or
11712 * empty content or
11713 * no reloc entry. */
11714 if (bfd_link_relocatable (link_info)
11715 || (sec->flags & SEC_RELOC) == 0
11716 || (sec->flags & SEC_EXCLUDE) != 0
11717 || (sec->flags & SEC_CODE) == 0
11718 || sec->size == 0)
11719 return TRUE;
11720
11721 /* 09.12.11 Workaround. */
11722 /* We have to adjust align for R_NDS32_LABEL if needed.
11723 The adjust approach only can fix 2-byte align once. */
11724 if (sec->alignment_power > 2)
11725 return TRUE;
11726
11727 /* The optimization type to do. */
11728
11729 table = nds32_elf_hash_table (link_info);
11730 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11731 switch (relax_round)
11732 {
11733 case NDS32_RELAX_JUMP_IFC_ROUND:
11734 /* Here is the entrance of ifc jump relaxation. */
11735 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11736 return FALSE;
11737 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11738 return TRUE;
11739
11740 case NDS32_RELAX_EX9_BUILD_ROUND:
11741 /* Here is the entrance of ex9 relaxation. There are two pass of
11742 ex9 relaxation. The one is to traverse all instructions and build
11743 the hash table. The other one is to compare instructions and replace
11744 it by ex9.it. */
11745 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11746 return FALSE;
11747 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11748 return TRUE;
11749
11750 case NDS32_RELAX_EX9_REPLACE_ROUND:
11751 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11752 return FALSE;
11753 return TRUE;
11754
11755 case NDS32_RELAX_EMPTY_ROUND:
11756 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11757 return TRUE;
11758
11759 case NDS32_RELAX_NORMAL_ROUND:
11760 default:
11761 if (sec->reloc_count == 0)
11762 return TRUE;
11763 break;
11764 }
11765
11766 /* The begining of general relaxation. */
11767
11768 if (is_SDA_BASE_set == 0)
11769 {
11770 bfd_vma gp;
11771 is_SDA_BASE_set = 1;
11772 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11773 &gp, FALSE);
11774 relax_range_measurement (abfd);
11775 }
11776
11777 if (is_ITB_BASE_set == 0)
11778 {
11779 /* Set the _ITB_BASE_. */
11780 if (!nds32_elf_ex9_itb_base (link_info))
11781 {
11782 _bfd_error_handler (_("%pB: error: Cannot set _ITB_BASE_"), abfd);
11783 bfd_set_error (bfd_error_bad_value);
11784 }
11785 }
11786
11787 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11788 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11789 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11790 TRUE /* keep_memory */);
11791 if (internal_relocs == NULL)
11792 goto error_return;
11793
11794 irelend = internal_relocs + sec->reloc_count;
11795 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11796 irelend, R_NDS32_RELAX_ENTRY);
11797
11798 if (irel == irelend)
11799 return TRUE;
11800
11801 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11802 {
11803 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
11804 {
11805 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11806 return TRUE;
11807 }
11808
11809 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11810 optimize = 1;
11811
11812 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11813 opt_size = 1;
11814 }
11815
11816 load_store_relax = table->load_store_relax;
11817
11818 /* Get symbol table and section content. */
11819 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
11820 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11821 goto error_return;
11822
11823 /* Do relax loop only when finalize is not done.
11824 Take care of relaxable relocs except INSN16. */
11825 for (irel = internal_relocs; irel < irelend; irel++)
11826 {
11827 int seq_len; /* Original length of instruction sequence. */
11828 int insn_len = 0; /* Final length of instruction sequence. */
11829 bfd_boolean removed;
11830
11831 insn = 0;
11832 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11833 && (irel->r_addend & 0x1f) >= 2)
11834 optimize = 1;
11835
11836 /* Relocation Types
11837 R_NDS32_LONGCALL1 53
11838 R_NDS32_LONGCALL2 54
11839 R_NDS32_LONGCALL3 55
11840 R_NDS32_LONGJUMP1 56
11841 R_NDS32_LONGJUMP2 57
11842 R_NDS32_LONGJUMP3 58
11843 R_NDS32_LOADSTORE 59 */
11844 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11845 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11846 seq_len = GET_SEQ_LEN (irel->r_addend);
11847
11848 /* Relocation Types
11849 R_NDS32_LONGCALL4 107
11850 R_NDS32_LONGCALL5 108
11851 R_NDS32_LONGCALL6 109
11852 R_NDS32_LONGJUMP4 110
11853 R_NDS32_LONGJUMP5 111
11854 R_NDS32_LONGJUMP6 112
11855 R_NDS32_LONGJUMP7 113 */
11856 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11857 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11858 seq_len = 4;
11859
11860 /* Relocation Types
11861 R_NDS32_LO12S0_RELA 30
11862 R_NDS32_LO12S1_RELA 29
11863 R_NDS32_LO12S2_RELA 28
11864 R_NDS32_LO12S2_SP_RELA 71
11865 R_NDS32_LO12S2_DP_RELA 70
11866 R_NDS32_GOT_LO12 46
11867 R_NDS32_GOTOFF_LO12 50
11868 R_NDS32_PLTREL_LO12 65
11869 R_NDS32_PLT_GOTREL_LO12 67
11870 R_NDS32_17IFC_PCREL_RELA 96
11871 R_NDS32_GOT_SUFF 193
11872 R_NDS32_GOTOFF_SUFF 194
11873 R_NDS32_PLT_GOT_SUFF 195
11874 R_NDS32_MULCALL_SUFF 196
11875 R_NDS32_PTR 197 */
11876 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11877 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11878 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11879 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11880 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11881 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11882 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11883 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11884 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11885 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11886 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11887 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11888 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11889 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11890 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11891 seq_len = 0;
11892 else
11893 continue;
11894
11895 insn_len = seq_len;
11896 removed = FALSE;
11897
11898 switch (ELF32_R_TYPE (irel->r_info))
11899 {
11900 case R_NDS32_LONGCALL1:
11901 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11902 &insn_len, contents, isymbuf,
11903 symtab_hdr);
11904 break;
11905 case R_NDS32_LONGCALL2:
11906 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11907 &insn_len, contents, isymbuf,
11908 symtab_hdr);
11909 break;
11910 case R_NDS32_LONGCALL3:
11911 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11912 &insn_len, contents, isymbuf,
11913 symtab_hdr);
11914 break;
11915 case R_NDS32_LONGJUMP1:
11916 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11917 &insn_len, contents, isymbuf,
11918 symtab_hdr);
11919 break;
11920 case R_NDS32_LONGJUMP2:
11921 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11922 &insn_len, contents, isymbuf,
11923 symtab_hdr);
11924 break;
11925 case R_NDS32_LONGJUMP3:
11926 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11927 &insn_len, contents, isymbuf,
11928 symtab_hdr);
11929 break;
11930 case R_NDS32_LONGCALL4:
11931 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11932 &insn_len, contents, isymbuf,
11933 symtab_hdr);
11934 break;
11935 case R_NDS32_LONGCALL5:
11936 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
11937 &insn_len, contents, isymbuf,
11938 symtab_hdr);
11939 break;
11940 case R_NDS32_LONGCALL6:
11941 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
11942 &insn_len, contents, isymbuf,
11943 symtab_hdr);
11944 break;
11945 case R_NDS32_LONGJUMP4:
11946 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
11947 &insn_len, contents, isymbuf,
11948 symtab_hdr);
11949 break;
11950 case R_NDS32_LONGJUMP5:
11951 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
11952 &insn_len, &seq_len, contents,
11953 isymbuf, symtab_hdr);
11954 break;
11955 case R_NDS32_LONGJUMP6:
11956 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
11957 &insn_len, &seq_len, contents,
11958 isymbuf, symtab_hdr);
11959 break;
11960 case R_NDS32_LONGJUMP7:
11961 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
11962 &insn_len, &seq_len, contents,
11963 isymbuf, symtab_hdr);
11964 break;
11965 case R_NDS32_LOADSTORE:
11966 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
11967 internal_relocs, &insn_len,
11968 contents, isymbuf, symtab_hdr,
11969 load_store_relax);
11970 break;
11971 case R_NDS32_LO12S0_RELA:
11972 case R_NDS32_LO12S1_RELA:
11973 case R_NDS32_LO12S2_DP_RELA:
11974 case R_NDS32_LO12S2_SP_RELA:
11975 case R_NDS32_LO12S2_RELA:
11976 /* Relax for low part. */
11977 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
11978 contents, isymbuf, symtab_hdr);
11979
11980 /* It is impossible to delete blank, so just continue. */
11981 continue;
11982 case R_NDS32_GOT_LO12:
11983 case R_NDS32_GOTOFF_LO12:
11984 case R_NDS32_PLTREL_LO12:
11985 case R_NDS32_PLT_GOTREL_LO12:
11986 case R_NDS32_GOTPC_LO12:
11987 /* Relax for PIC gp-relative low part. */
11988 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
11989 isymbuf, symtab_hdr);
11990
11991 /* It is impossible to delete blank, so just continue. */
11992 continue;
11993 case R_NDS32_TLS_LE_LO12:
11994 /* Relax for LE TLS low part. */
11995 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
11996 isymbuf, symtab_hdr);
11997
11998 /* It is impossible to delete blank, so just continue. */
11999 continue;
12000 case R_NDS32_TLS_LE_ADD:
12001 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12002 contents, isymbuf, symtab_hdr, again);
12003 /* It is impossible to delete blank, so just continue. */
12004 continue;
12005 case R_NDS32_TLS_LE_LS:
12006 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12007 contents, isymbuf, symtab_hdr, again);
12008 continue;
12009 case R_NDS32_PTR:
12010 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12011 &insn_len, &seq_len, contents);
12012 break;
12013 case R_NDS32_PLT_GOT_SUFF:
12014 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12015 internal_relocs, contents,
12016 isymbuf, symtab_hdr, again);
12017 /* It is impossible to delete blank, so just continue. */
12018 continue;
12019 case R_NDS32_GOT_SUFF:
12020 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12021 internal_relocs, contents,
12022 symtab_hdr, again);
12023 /* It is impossible to delete blank, so just continue. */
12024 continue;
12025 case R_NDS32_GOTOFF_SUFF:
12026 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12027 internal_relocs, contents,
12028 isymbuf, symtab_hdr, again);
12029 /* It is impossible to delete blank, so just continue. */
12030 continue;
12031 default:
12032 continue;
12033
12034 }
12035 if (removed && seq_len - insn_len > 0)
12036 {
12037 if (!insert_nds32_elf_blank
12038 (&relax_blank_list, irel->r_offset + insn_len,
12039 seq_len - insn_len))
12040 goto error_return;
12041 *again = TRUE;
12042 }
12043 }
12044
12045 calc_nds32_blank_total (relax_blank_list);
12046
12047 if (table->relax_fp_as_gp)
12048 {
12049 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12050 irelend, isymbuf))
12051 goto error_return;
12052
12053 if (!*again)
12054 {
12055 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12056 irelend))
12057 goto error_return;
12058 }
12059 }
12060
12061 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12062
12063 if (!*again)
12064 {
12065 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12066 &relax_blank_list, optimize, opt_size))
12067 goto error_return;
12068 }
12069
12070 /* It doesn't matter optimize_for_space_no_align anymore.
12071 If object file is assembled with flag '-Os',
12072 the we don't adjust jump-destination on 4-byte boundary. */
12073
12074 if (relax_blank_list)
12075 {
12076 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12077 relax_blank_list = NULL;
12078 }
12079
12080 if (!*again)
12081 {
12082 /* Closing the section, so we don't relax it anymore. */
12083 bfd_vma sec_size_align;
12084 Elf_Internal_Rela *tmp_rel;
12085
12086 /* Pad to alignment boundary. Only handle current section alignment. */
12087 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12088 & ((-1U) << sec->alignment_power);
12089 if ((sec_size_align - sec->size) & 0x2)
12090 {
12091 insn16 = NDS32_NOP16;
12092 bfd_putb16 (insn16, contents + sec->size);
12093 sec->size += 2;
12094 }
12095
12096 while (sec_size_align != sec->size)
12097 {
12098 insn = NDS32_NOP32;
12099 bfd_putb32 (insn, contents + sec->size);
12100 sec->size += 4;
12101 }
12102
12103 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12104 irelend, R_NDS32_RELAX_ENTRY);
12105 if (tmp_rel != irelend)
12106 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12107
12108 clean_nds32_elf_blank ();
12109 }
12110
12111 finish:
12112 if (internal_relocs != NULL
12113 && elf_section_data (sec)->relocs != internal_relocs)
12114 free (internal_relocs);
12115
12116 if (contents != NULL
12117 && elf_section_data (sec)->this_hdr.contents != contents)
12118 free (contents);
12119
12120 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12121 free (isymbuf);
12122
12123 return result;
12124
12125 error_return:
12126 result = FALSE;
12127 goto finish;
12128 }
12129
12130 static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12131 {
12132 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12133 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12134 {NULL, 0, 0, 0, 0}
12135 };
12136
12137 static bfd_boolean
12138 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12139 struct bfd_link_info *info,
12140 void *finfo ATTRIBUTE_UNUSED,
12141 bfd_boolean (*func) (void *, const char *,
12142 Elf_Internal_Sym *,
12143 asection *,
12144 struct elf_link_hash_entry *)
12145 ATTRIBUTE_UNUSED)
12146 {
12147 FILE *sym_ld_script = NULL;
12148 struct elf_nds32_link_hash_table *table;
12149
12150 table = nds32_elf_hash_table (info);
12151 sym_ld_script = table->sym_ld_script;
12152
12153 if (check_start_export_sym)
12154 fprintf (sym_ld_script, "}\n");
12155
12156 return TRUE;
12157 }
12158
12159 static enum elf_reloc_type_class
12160 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12161 const asection *rel_sec ATTRIBUTE_UNUSED,
12162 const Elf_Internal_Rela *rela)
12163 {
12164 switch ((int) ELF32_R_TYPE (rela->r_info))
12165 {
12166 case R_NDS32_RELATIVE:
12167 return reloc_class_relative;
12168 case R_NDS32_JMP_SLOT:
12169 return reloc_class_plt;
12170 case R_NDS32_COPY:
12171 return reloc_class_copy;
12172 default:
12173 return reloc_class_normal;
12174 }
12175 }
12176
12177 /* Put target dependent option into info hash table. */
12178 void
12179 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12180 int relax_fp_as_gp,
12181 int eliminate_gc_relocs,
12182 FILE * sym_ld_script, int load_store_relax,
12183 int target_optimize, int relax_status,
12184 int relax_round, FILE * ex9_export_file,
12185 FILE * ex9_import_file,
12186 int update_ex9_table, int ex9_limit,
12187 bfd_boolean ex9_loop_aware,
12188 bfd_boolean ifc_loop_aware)
12189 {
12190 struct elf_nds32_link_hash_table *table;
12191
12192 table = nds32_elf_hash_table (link_info);
12193 if (table == NULL)
12194 return;
12195
12196 table->relax_fp_as_gp = relax_fp_as_gp;
12197 table->eliminate_gc_relocs = eliminate_gc_relocs;
12198 table->sym_ld_script = sym_ld_script;
12199 table ->load_store_relax = load_store_relax;
12200 table->target_optimize = target_optimize;
12201 table->relax_status = relax_status;
12202 table->relax_round = relax_round;
12203 table->ex9_export_file = ex9_export_file;
12204 table->ex9_import_file = ex9_import_file;
12205 table->update_ex9_table = update_ex9_table;
12206 table->ex9_limit = ex9_limit;
12207 table->ex9_loop_aware = ex9_loop_aware;
12208 table->ifc_loop_aware = ifc_loop_aware;
12209 }
12210 \f
12211 /* These functions and data-structures are used for fp-as-gp
12212 optimization. */
12213
12214 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */
12215 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12216 the read-only section and read-write section. */
12217 #define FAG_WINDOW (508 - 32)
12218
12219 /* An nds32_fag represent a gp-relative access.
12220 We find best fp-base by using a sliding window
12221 to find a base address which can cover most gp-access. */
12222 struct nds32_fag
12223 {
12224 struct nds32_fag *next; /* NULL-teminated linked list. */
12225 bfd_vma addr; /* The address of this fag. */
12226 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12227 It is used for applying FP7U2_FLAG. */
12228 int count; /* How many times this address is referred.
12229 There should be exactly `count' relocations
12230 in relas. */
12231 int relas_capcity; /* The buffer size of relas.
12232 We use an array instead of linked-list,
12233 and realloc is used to adjust buffer size. */
12234 };
12235
12236 static void
12237 nds32_fag_init (struct nds32_fag *head)
12238 {
12239 memset (head, 0, sizeof (struct nds32_fag));
12240 }
12241
12242 static void
12243 nds32_fag_verify (struct nds32_fag *head)
12244 {
12245 struct nds32_fag *iter;
12246 struct nds32_fag *prev;
12247
12248 prev = NULL;
12249 iter = head->next;
12250 while (iter)
12251 {
12252 if (prev && prev->addr >= iter->addr)
12253 puts ("Bug in fp-as-gp insertion.");
12254 prev = iter;
12255 iter = iter->next;
12256 }
12257 }
12258
12259 /* Insert a fag in ascending order.
12260 If a fag of the same address already exists,
12261 they are chained by relas array. */
12262
12263 static void
12264 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12265 Elf_Internal_Rela * rel)
12266 {
12267 struct nds32_fag *iter;
12268 struct nds32_fag *new_fag;
12269 const int INIT_RELAS_CAP = 4;
12270
12271 for (iter = head;
12272 iter->next && iter->next->addr <= addr;
12273 iter = iter->next)
12274 /* Find somewhere to insert. */ ;
12275
12276 /* `iter' will be equal to `head' if the list is empty. */
12277 if (iter != head && iter->addr == addr)
12278 {
12279 /* The address exists in the list.
12280 Insert `rel' into relocation list, relas. */
12281
12282 /* Check whether relas is big enough. */
12283 if (iter->count >= iter->relas_capcity)
12284 {
12285 iter->relas_capcity *= 2;
12286 iter->relas = bfd_realloc
12287 (iter->relas, iter->relas_capcity * sizeof (void *));
12288 }
12289 iter->relas[iter->count++] = rel;
12290 return;
12291 }
12292
12293 /* This is a new address. Create a fag node for it. */
12294 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12295 memset (new_fag, 0, sizeof (*new_fag));
12296 new_fag->addr = addr;
12297 new_fag->count = 1;
12298 new_fag->next = iter->next;
12299 new_fag->relas_capcity = INIT_RELAS_CAP;
12300 new_fag->relas = (Elf_Internal_Rela **)
12301 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12302 new_fag->relas[0] = rel;
12303 iter->next = new_fag;
12304
12305 nds32_fag_verify (head);
12306 }
12307
12308 static void
12309 nds32_fag_free_list (struct nds32_fag *head)
12310 {
12311 struct nds32_fag *iter;
12312
12313 iter = head->next;
12314 while (iter)
12315 {
12316 struct nds32_fag *tmp = iter;
12317 iter = iter->next;
12318 free (tmp->relas);
12319 tmp->relas = NULL;
12320 free (tmp);
12321 }
12322 }
12323
12324 /* Find the best fp-base address.
12325 The relocation associated with that address is returned,
12326 so we can track the symbol instead of a fixed address.
12327
12328 When relaxation, the address of an datum may change,
12329 because a text section is shrinked, so the data section
12330 moves forward. If the aligments of text and data section
12331 are different, their distance may change too.
12332 Therefore, tracking a fixed address is not appriate. */
12333
12334 static int
12335 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12336 {
12337 struct nds32_fag *base; /* First fag in the window. */
12338 struct nds32_fag *last; /* First fag outside the window. */
12339 int accu = 0; /* Usage accumulation. */
12340 struct nds32_fag *best; /* Best fag. */
12341 int baccu = 0; /* Best accumulation. */
12342
12343 /* Use first fag for initial, and find the last fag in the window.
12344
12345 In each iteration, we could simply subtract previous fag
12346 and accumulate following fags which are inside the window,
12347 untill we each the end. */
12348
12349 if (head->next == NULL)
12350 {
12351 *bestpp = NULL;
12352 return 0;
12353 }
12354
12355 /* Initialize base. */
12356 base = head->next;
12357 best = base;
12358 for (last = base;
12359 last && last->addr < base->addr + FAG_WINDOW;
12360 last = last->next)
12361 accu += last->count;
12362
12363 baccu = accu;
12364
12365 /* Record the best base in each iteration. */
12366 while (base->next)
12367 {
12368 accu -= base->count;
12369 base = base->next;
12370 /* Account fags in window. */
12371 for (/* Nothing. */;
12372 last && last->addr < base->addr + FAG_WINDOW;
12373 last = last->next)
12374 accu += last->count;
12375
12376 /* A better fp-base? */
12377 if (accu > baccu)
12378 {
12379 best = base;
12380 baccu = accu;
12381 }
12382 }
12383
12384 if (bestpp)
12385 *bestpp = best;
12386 return baccu;
12387 }
12388
12389 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12390 so we can convert it fo fp-relative access later.
12391 `best_fag' is the best fp-base. Only those inside the window
12392 of best_fag is applied the flag. */
12393
12394 static bfd_boolean
12395 nds32_fag_mark_relax (struct bfd_link_info *link_info,
12396 bfd *abfd, struct nds32_fag *best_fag,
12397 Elf_Internal_Rela *internal_relocs,
12398 Elf_Internal_Rela *irelend)
12399 {
12400 struct nds32_fag *ifag;
12401 bfd_vma best_fpbase, gp;
12402 bfd *output_bfd;
12403
12404 output_bfd = abfd->sections->output_section->owner;
12405 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12406 best_fpbase = best_fag->addr;
12407
12408 if (best_fpbase > gp + sdata_range[1][1]
12409 || best_fpbase < gp - sdata_range[1][0])
12410 return FALSE;
12411
12412 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12413 so we know they can be converted to lwi37.fp. */
12414 for (ifag = best_fag;
12415 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12416 {
12417 int i;
12418
12419 for (i = 0; i < ifag->count; i++)
12420 {
12421 Elf_Internal_Rela *insn16_rel;
12422 Elf_Internal_Rela *fag_rel;
12423
12424 fag_rel = ifag->relas[i];
12425
12426 /* Only if this is within the WINDOWS, FP7U2_FLAG
12427 is applied. */
12428
12429 insn16_rel = find_relocs_at_address
12430 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12431
12432 if (insn16_rel != irelend)
12433 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12434 }
12435 }
12436 return TRUE;
12437 }
12438
12439 /* Reset INSN16 to clean fp as gp. */
12440
12441 static void
12442 nds32_fag_unmark_relax (struct nds32_fag *fag,
12443 Elf_Internal_Rela *internal_relocs,
12444 Elf_Internal_Rela *irelend)
12445 {
12446 struct nds32_fag *ifag;
12447 int i;
12448 Elf_Internal_Rela *insn16_rel;
12449 Elf_Internal_Rela *fag_rel;
12450
12451 for (ifag = fag; ifag; ifag = ifag->next)
12452 {
12453 for (i = 0; i < ifag->count; i++)
12454 {
12455 fag_rel = ifag->relas[i];
12456
12457 /* Restore the INSN16 relocation. */
12458 insn16_rel = find_relocs_at_address
12459 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12460
12461 if (insn16_rel != irelend)
12462 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12463 }
12464 }
12465 }
12466
12467 /* This is the main function of fp-as-gp optimization.
12468 It should be called by relax_section. */
12469
12470 static bfd_boolean
12471 nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12472 bfd *abfd, asection *sec,
12473 Elf_Internal_Rela *internal_relocs,
12474 Elf_Internal_Rela *irelend,
12475 Elf_Internal_Sym *isymbuf)
12476 {
12477 Elf_Internal_Rela *begin_rel = NULL;
12478 Elf_Internal_Rela *irel;
12479 struct nds32_fag fag_head;
12480 Elf_Internal_Shdr *symtab_hdr;
12481 bfd_byte *contents;
12482 bfd_boolean ifc_inside = FALSE;
12483
12484 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12485
12486 /* Per-function fp-base selection.
12487 1. Create a list for all the gp-relative access.
12488 2. Base on those gp-relative address,
12489 find a fp-base which can cover most access.
12490 3. Use the fp-base for fp-as-gp relaxation.
12491
12492 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12493 we should
12494 1. delete the `la $fp, _FP_BASE_' instruction and
12495 2. not convert lwi.gp to lwi37.fp.
12496
12497 To delete the _FP_BASE_ instruction, we simply apply
12498 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12499
12500 To suppress the conversion, we simply NOT to apply
12501 R_NDS32_INSN16_FP7U2_FLAG flag. */
12502
12503 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12504
12505 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12506 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12507 return FALSE;
12508
12509 /* Check whether it is worth for fp-as-gp optimization,
12510 i.e., at least 3 gp-load.
12511
12512 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12513 apply this optimization. */
12514
12515 for (irel = internal_relocs; irel < irelend; irel++)
12516 {
12517 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12518 One we enter the begin of the region, we track all the LW/ST
12519 instructions, so when we leave the region, we try to find
12520 the best fp-base address for those LW/ST instructions. */
12521
12522 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12523 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12524 {
12525 /* Begin of the region. */
12526 if (begin_rel)
12527 /* xgettext:c-format */
12528 _bfd_error_handler (_("%pB: Nested OMIT_FP in %pA."), abfd, sec);
12529
12530 begin_rel = irel;
12531 nds32_fag_init (&fag_head);
12532 ifc_inside = FALSE;
12533 }
12534 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12535 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12536 {
12537 int accu;
12538 struct nds32_fag *best_fag, *tmp_fag;
12539 int dist;
12540
12541 /* End of the region.
12542 Check whether it is worth to do fp-as-gp. */
12543
12544 if (begin_rel == NULL)
12545 {
12546 /* xgettext:c-format */
12547 _bfd_error_handler (_("%pB: Unmatched OMIT_FP in %pA."), abfd, sec);
12548 continue;
12549 }
12550
12551 accu = nds32_fag_find_base (&fag_head, &best_fag);
12552
12553 /* Clean FP7U2_FLAG because they may set ever. */
12554 tmp_fag = fag_head.next;
12555 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12556
12557 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12558 if (accu < FAG_THRESHOLD
12559 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12560 internal_relocs, irelend))
12561 {
12562 /* Not worth to do fp-as-gp. */
12563 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12564 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12565 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12566 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12567 nds32_fag_free_list (&fag_head);
12568 begin_rel = NULL;
12569 continue;
12570 }
12571
12572 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12573 so we use it to record the distance to the reloction of best
12574 fp-base. */
12575 dist = best_fag->relas[0] - begin_rel;
12576 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12577 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12578 relocation. And get the base value when relocating. */
12579 begin_rel->r_addend &= (0x1 << 16) - 1;
12580 begin_rel->r_addend |= dist << 16;
12581
12582 nds32_fag_free_list (&fag_head);
12583 begin_rel = NULL;
12584 }
12585
12586 if (begin_rel == NULL || ifc_inside)
12587 /* Skip if we are not in the region of fp-as-gp. */
12588 continue;
12589
12590 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12591 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12592 {
12593 bfd_vma addr;
12594 uint32_t insn;
12595
12596 /* A gp-relative access is found. Insert it to the fag-list. */
12597
12598 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12599 insn = bfd_getb32 (contents + irel->r_offset);
12600 if (!N32_IS_RT3 (insn))
12601 continue;
12602
12603 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12604 nds32_fag_insert (&fag_head, addr, irel);
12605 }
12606 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12607 {
12608 begin_rel = NULL;
12609 }
12610 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12611 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12612 {
12613 /* Suppress fp as gp when encounter ifc. */
12614 ifc_inside = TRUE;
12615 }
12616 }
12617
12618 return TRUE;
12619 }
12620
12621 /* Remove unused `la $fp, _FD_BASE_' instruction. */
12622
12623 static bfd_boolean
12624 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12625 Elf_Internal_Rela *internal_relocs,
12626 Elf_Internal_Rela *irelend)
12627 {
12628 Elf_Internal_Rela *irel;
12629 Elf_Internal_Shdr *symtab_hdr;
12630 bfd_byte *contents = NULL;
12631 nds32_elf_blank_t *relax_blank_list = NULL;
12632 bfd_boolean result = TRUE;
12633 bfd_boolean unused_region = FALSE;
12634
12635 /*
12636 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12637 * R_NDS32_17IFC_PCREL_RELA
12638 * R_NDS32_10IFCU_PCREL_RELA
12639
12640 CASE??????????????
12641 */
12642
12643 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12644 nds32_get_section_contents (abfd, sec, &contents, TRUE);
12645
12646 for (irel = internal_relocs; irel < irelend; irel++)
12647 {
12648 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12649 we marked to in previous pass.
12650 DO NOT scan relocations again, since we've alreadly decided it
12651 and set the flag. */
12652 const char *syname;
12653 int syndx;
12654 uint32_t insn;
12655
12656 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12657 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12658 unused_region = TRUE;
12659 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12660 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12661 unused_region = FALSE;
12662
12663 /* We're not in the region. */
12664 if (!unused_region)
12665 continue;
12666
12667 /* _FP_BASE_ must be a GLOBAL symbol. */
12668 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12669 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12670 continue;
12671
12672 /* The symbol name must be _FP_BASE_. */
12673 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12674 if (strcmp (syname, FP_BASE_NAME) != 0)
12675 continue;
12676
12677 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12678 {
12679 /* addi.gp $fp, -256 */
12680 insn = bfd_getb32 (contents + irel->r_offset);
12681 if (insn != INSN_ADDIGP_TO_FP)
12682 continue;
12683 }
12684 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12685 {
12686 /* addi $fp, $gp, -256 */
12687 insn = bfd_getb32 (contents + irel->r_offset);
12688 if (insn != INSN_ADDI_GP_TO_FP)
12689 continue;
12690 }
12691 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12692 {
12693 /* movi $fp, FP_BASE */
12694 insn = bfd_getb32 (contents + irel->r_offset);
12695 if (insn != INSN_MOVI_TO_FP)
12696 continue;
12697 }
12698 else
12699 continue;
12700
12701 /* We got here because a FP_BASE instruction is found. */
12702 if (!insert_nds32_elf_blank_recalc_total
12703 (&relax_blank_list, irel->r_offset, 4))
12704 goto error_return;
12705 }
12706
12707 finish:
12708 if (relax_blank_list)
12709 {
12710 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12711 relax_blank_list = NULL;
12712 }
12713 return result;
12714
12715 error_return:
12716 result = FALSE;
12717 goto finish;
12718 }
12719
12720 /* This is a version of bfd_generic_get_relocated_section_contents.
12721 We need this variety because relaxation will modify the dwarf
12722 infomation. When there is undefined symbol reference error mesage,
12723 linker need to dump line number where the symbol be used. However
12724 the address is be relaxed, it can not get the original dwarf contents.
12725 The variety only modify function call for reading in the section. */
12726
12727 static bfd_byte *
12728 nds32_elf_get_relocated_section_contents (bfd *abfd,
12729 struct bfd_link_info *link_info,
12730 struct bfd_link_order *link_order,
12731 bfd_byte *data,
12732 bfd_boolean relocatable,
12733 asymbol **symbols)
12734 {
12735 bfd *input_bfd = link_order->u.indirect.section->owner;
12736 asection *input_section = link_order->u.indirect.section;
12737 long reloc_size;
12738 arelent **reloc_vector;
12739 long reloc_count;
12740
12741 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12742 if (reloc_size < 0)
12743 return NULL;
12744
12745 /* Read in the section. */
12746 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
12747 return NULL;
12748
12749 if (reloc_size == 0)
12750 return data;
12751
12752 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12753 if (reloc_vector == NULL)
12754 return NULL;
12755
12756 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12757 reloc_vector, symbols);
12758 if (reloc_count < 0)
12759 goto error_return;
12760
12761 if (reloc_count > 0)
12762 {
12763 arelent **parent;
12764 for (parent = reloc_vector; *parent != NULL; parent++)
12765 {
12766 char *error_message = NULL;
12767 asymbol *symbol;
12768 bfd_reloc_status_type r;
12769
12770 symbol = *(*parent)->sym_ptr_ptr;
12771 if (symbol->section && discarded_section (symbol->section))
12772 {
12773 bfd_byte *p;
12774 static reloc_howto_type none_howto
12775 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12776 "unused", FALSE, 0, 0, FALSE);
12777
12778 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12779 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12780 p);
12781 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12782 (*parent)->addend = 0;
12783 (*parent)->howto = &none_howto;
12784 r = bfd_reloc_ok;
12785 }
12786 else
12787 r = bfd_perform_relocation (input_bfd, *parent, data,
12788 input_section,
12789 relocatable ? abfd : NULL,
12790 &error_message);
12791
12792 if (relocatable)
12793 {
12794 asection *os = input_section->output_section;
12795
12796 /* A partial link, so keep the relocs. */
12797 os->orelocation[os->reloc_count] = *parent;
12798 os->reloc_count++;
12799 }
12800
12801 if (r != bfd_reloc_ok)
12802 {
12803 switch (r)
12804 {
12805 case bfd_reloc_undefined:
12806 (*link_info->callbacks->undefined_symbol)
12807 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12808 input_bfd, input_section, (*parent)->address, TRUE);
12809 break;
12810 case bfd_reloc_dangerous:
12811 BFD_ASSERT (error_message != NULL);
12812 (*link_info->callbacks->reloc_dangerous)
12813 (link_info, error_message,
12814 input_bfd, input_section, (*parent)->address);
12815 break;
12816 case bfd_reloc_overflow:
12817 (*link_info->callbacks->reloc_overflow)
12818 (link_info, NULL,
12819 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12820 (*parent)->howto->name, (*parent)->addend,
12821 input_bfd, input_section, (*parent)->address);
12822 break;
12823 case bfd_reloc_outofrange:
12824 /* PR ld/13730:
12825 This error can result when processing some partially
12826 complete binaries. Do not abort, but issue an error
12827 message instead. */
12828 link_info->callbacks->einfo
12829 /* xgettext:c-format */
12830 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
12831 abfd, input_section, * parent);
12832 goto error_return;
12833
12834 default:
12835 abort ();
12836 break;
12837 }
12838 }
12839 }
12840 }
12841
12842 free (reloc_vector);
12843 return data;
12844
12845 error_return:
12846 free (reloc_vector);
12847 return NULL;
12848 }
12849 \f
12850 /* Link-time IFC relaxation.
12851 In this optimization, we chains jump instructions
12852 of the same destination with ifcall. */
12853
12854
12855 /* List to save jal and j relocation. */
12856 struct elf_nds32_ifc_symbol_entry
12857 {
12858 asection *sec;
12859 struct elf_link_hash_entry *h;
12860 struct elf_nds32_ifc_irel_list *irel_head;
12861 unsigned long insn;
12862 int times;
12863 int enable; /* Apply ifc. */
12864 int ex9_enable; /* Apply ifc after ex9. */
12865 struct elf_nds32_ifc_symbol_entry *next;
12866 };
12867
12868 struct elf_nds32_ifc_irel_list
12869 {
12870 Elf_Internal_Rela *irel;
12871 asection *sec;
12872 bfd_vma addr;
12873 /* If this is set, then it is the last instruction for
12874 ifc-chain, so it must be keep for the actual branching. */
12875 int keep;
12876 struct elf_nds32_ifc_irel_list *next;
12877 };
12878
12879 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
12880
12881 /* Insert symbol of jal and j for ifc. */
12882
12883 static void
12884 nds32_elf_ifc_insert_symbol (asection *sec,
12885 struct elf_link_hash_entry *h,
12886 Elf_Internal_Rela *irel,
12887 unsigned long insn)
12888 {
12889 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
12890
12891 /* Check there is target of existing entry the same as the new one. */
12892 while (ptr != NULL)
12893 {
12894 if (((h == NULL && ptr->sec == sec
12895 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
12896 && ptr->irel_head->irel->r_addend == irel->r_addend)
12897 || h != NULL)
12898 && ptr->h == h
12899 && ptr->insn == insn)
12900 {
12901 /* The same target exist, so insert into list. */
12902 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
12903
12904 while (irel_list->next != NULL)
12905 irel_list = irel_list->next;
12906 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12907 irel_list = irel_list->next;
12908 irel_list->irel = irel;
12909 irel_list->keep = 1;
12910
12911 if (h == NULL)
12912 irel_list->sec = NULL;
12913 else
12914 irel_list->sec = sec;
12915 irel_list->next = NULL;
12916 return;
12917 }
12918 if (ptr->next == NULL)
12919 break;
12920 ptr = ptr->next;
12921 }
12922
12923 /* There is no same target entry, so build a new one. */
12924 if (ifc_symbol_head == NULL)
12925 {
12926 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12927 ptr = ifc_symbol_head;
12928 }
12929 else
12930 {
12931 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12932 ptr = ptr->next;
12933 }
12934
12935 ptr->h = h;
12936 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12937 ptr->irel_head->irel = irel;
12938 ptr->insn = insn;
12939 ptr->irel_head->keep = 1;
12940
12941 if (h == NULL)
12942 {
12943 /* Local symbols. */
12944 ptr->sec = sec;
12945 ptr->irel_head->sec = NULL;
12946 }
12947 else
12948 {
12949 /* Global symbol. */
12950 ptr->sec = NULL;
12951 ptr->irel_head->sec = sec;
12952 }
12953
12954 ptr->irel_head->next = NULL;
12955 ptr->times = 0;
12956 ptr->enable = 0;
12957 ptr->ex9_enable = 0;
12958 ptr->next = NULL;
12959 }
12960
12961 /* Gather all jal and j instructions. */
12962
12963 static bfd_boolean
12964 nds32_elf_ifc_calc (struct bfd_link_info *info,
12965 bfd *abfd, asection *sec)
12966 {
12967 Elf_Internal_Rela *internal_relocs;
12968 Elf_Internal_Rela *irelend;
12969 Elf_Internal_Rela *irel;
12970 Elf_Internal_Shdr *symtab_hdr;
12971 bfd_byte *contents = NULL;
12972 uint32_t insn, insn_with_reg;
12973 unsigned long r_symndx;
12974 struct elf_link_hash_entry *h;
12975 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
12976 struct elf_nds32_link_hash_table *table;
12977 bfd_boolean ifc_loop_aware;
12978
12979 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12980 TRUE /* keep_memory */);
12981 irelend = internal_relocs + sec->reloc_count;
12982 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12983
12984 /* Check if the object enable ifc. */
12985 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
12986 R_NDS32_RELAX_ENTRY);
12987
12988 if (irel == NULL
12989 || irel >= irelend
12990 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
12991 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
12992 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
12993 return TRUE;
12994
12995 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
12996 return FALSE;
12997
12998 table = nds32_elf_hash_table (info);
12999 ifc_loop_aware = table->ifc_loop_aware;
13000 while (irel != NULL && irel < irelend)
13001 {
13002 /* Traverse all relocation and gather all of them to build the list. */
13003
13004 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13005 {
13006 if (ifc_loop_aware == 1
13007 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13008 {
13009 /* Check the region if loop or not. If it is true and
13010 ifc-loop-aware is true, ignore the region till region end. */
13011 while (irel != NULL
13012 && irel < irelend
13013 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13014 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13015 irel++;
13016 }
13017 }
13018
13019 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13020 {
13021 insn = bfd_getb32 (contents + irel->r_offset);
13022 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13023 r_symndx = ELF32_R_SYM (irel->r_info);
13024 if (r_symndx < symtab_hdr->sh_info)
13025 {
13026 /* Local symbol. */
13027 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13028 }
13029 else
13030 {
13031 /* External symbol. */
13032 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13033 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13034 }
13035 }
13036 irel++;
13037 }
13038 return TRUE;
13039 }
13040
13041 /* Determine whether j and jal should be substituted. */
13042
13043 static void
13044 nds32_elf_ifc_filter (struct bfd_link_info *info)
13045 {
13046 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13047 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13048 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13049 struct elf_nds32_link_hash_table *table;
13050 int target_optimize;
13051 bfd_vma address;
13052
13053 table = nds32_elf_hash_table (info);
13054 target_optimize = table->target_optimize;
13055 while (ptr)
13056 {
13057 irel_ptr = ptr->irel_head;
13058 if (ptr->h == NULL)
13059 {
13060 /* Local symbol. */
13061 irel_keeper = irel_ptr;
13062 while (irel_ptr && irel_ptr->next)
13063 {
13064 /* Check there is jump target can be used. */
13065 if ((irel_ptr->next->irel->r_offset
13066 - irel_keeper->irel->r_offset) > 1022)
13067 irel_keeper = irel_ptr->next;
13068 else
13069 {
13070 ptr->enable = 1;
13071 irel_ptr->keep = 0;
13072 }
13073 irel_ptr = irel_ptr->next;
13074 }
13075 }
13076 else
13077 {
13078 /* Global symbol. */
13079 /* We have to get the absolute address and decide
13080 whether to keep it or not. */
13081 while (irel_ptr)
13082 {
13083 address = (irel_ptr->irel->r_offset
13084 + irel_ptr->sec->output_section->vma
13085 + irel_ptr->sec->output_offset);
13086 irel_ptr->addr = address;
13087 irel_ptr = irel_ptr->next;
13088 }
13089
13090 irel_ptr = ptr->irel_head;
13091 while (irel_ptr)
13092 {
13093 /* Sort by address. */
13094 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13095 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13096 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13097 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13098
13099 /* Get the smallest one. */
13100 while (irel_temp->next)
13101 {
13102 if (irel_temp->next->addr < irel_dest->addr)
13103 {
13104 irel_dest_prev = irel_temp;
13105 irel_dest = irel_temp->next;
13106 }
13107 irel_temp = irel_temp->next;
13108 }
13109
13110 if (irel_dest != irel_ptr)
13111 {
13112 if (irel_ptr_prev)
13113 irel_ptr_prev->next = irel_dest;
13114 if (irel_dest_prev)
13115 irel_dest_prev->next = irel_ptr;
13116 irel_temp = irel_ptr->next;
13117 irel_ptr->next = irel_dest->next;
13118 irel_dest->next = irel_temp;
13119 }
13120 irel_ptr_prev = irel_ptr;
13121 irel_ptr = irel_ptr->next;
13122 }
13123
13124 irel_ptr = ptr->irel_head;
13125 irel_keeper = irel_ptr;
13126 while (irel_ptr && irel_ptr->next)
13127 {
13128 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13129 irel_keeper = irel_ptr->next;
13130 else
13131 {
13132 ptr->enable = 1;
13133 irel_ptr->keep = 0;
13134 }
13135 irel_ptr = irel_ptr->next;
13136 }
13137 }
13138
13139 /* Ex9 enable. Reserve it for ex9. */
13140 if ((target_optimize & NDS32_RELAX_EX9_ON)
13141 && ptr->irel_head != irel_keeper)
13142 ptr->enable = 0;
13143 ptr = ptr->next;
13144 }
13145 }
13146
13147 /* Determine whether j and jal should be substituted after ex9 done. */
13148
13149 static void
13150 nds32_elf_ifc_filter_after_ex9 (void)
13151 {
13152 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13153 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13154
13155 while (ptr)
13156 {
13157 if (ptr->enable == 0)
13158 {
13159 /* Check whether ifc is applied or not. */
13160 irel_ptr = ptr->irel_head;
13161 ptr->ex9_enable = 1;
13162 while (irel_ptr)
13163 {
13164 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13165 {
13166 /* Ex9 already. */
13167 ptr->ex9_enable = 0;
13168 break;
13169 }
13170 irel_ptr = irel_ptr->next;
13171 }
13172 }
13173 ptr = ptr->next;
13174 }
13175 }
13176
13177 /* Wrapper to do ifc relaxation. */
13178
13179 bfd_boolean
13180 nds32_elf_ifc_finish (struct bfd_link_info *info)
13181 {
13182 int relax_status;
13183 struct elf_nds32_link_hash_table *table;
13184
13185 table = nds32_elf_hash_table (info);
13186 relax_status = table->relax_status;
13187
13188 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13189 nds32_elf_ifc_filter (info);
13190 else
13191 nds32_elf_ifc_filter_after_ex9 ();
13192
13193 if (!nds32_elf_ifc_replace (info))
13194 return FALSE;
13195
13196 if (table)
13197 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13198 return TRUE;
13199 }
13200
13201 /* Traverse the result of ifc filter and replace it with ifcall9. */
13202
13203 static bfd_boolean
13204 nds32_elf_ifc_replace (struct bfd_link_info *info)
13205 {
13206 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13207 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13208 nds32_elf_blank_t *relax_blank_list = NULL;
13209 bfd_byte *contents = NULL;
13210 Elf_Internal_Rela *internal_relocs;
13211 Elf_Internal_Rela *irel;
13212 Elf_Internal_Rela *irelend;
13213 unsigned short insn16 = INSN_IFCALL9;
13214 struct elf_nds32_link_hash_table *table;
13215 int relax_status;
13216
13217 table = nds32_elf_hash_table (info);
13218 relax_status = table->relax_status;
13219
13220 while (ptr)
13221 {
13222 /* Traverse the ifc gather list, and replace the
13223 filter entries by ifcall9. */
13224 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
13225 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13226 && ptr->ex9_enable == 1))
13227 {
13228 irel_ptr = ptr->irel_head;
13229 if (ptr->h == NULL)
13230 {
13231 /* Local symbol. */
13232 internal_relocs = _bfd_elf_link_read_relocs
13233 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13234 irelend = internal_relocs + ptr->sec->reloc_count;
13235
13236 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13237 &contents, TRUE))
13238 return FALSE;
13239
13240 while (irel_ptr)
13241 {
13242 if (irel_ptr->keep == 0 && irel_ptr->next)
13243 {
13244 /* The one can be replaced. We have to check whether
13245 there is any alignment point in the region. */
13246 irel = irel_ptr->irel;
13247 while (((irel_ptr->next->keep == 0
13248 && irel < irel_ptr->next->irel)
13249 || (irel_ptr->next->keep == 1 && irel < irelend))
13250 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13251 && (irel->r_addend & 0x1f) == 2))
13252 irel++;
13253 if (irel >= irelend
13254 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13255 && (irel->r_addend & 0x1f) == 2
13256 && ((irel->r_offset - get_nds32_elf_blank_total
13257 (&relax_blank_list, irel->r_offset, 1))
13258 & 0x02) == 0))
13259 {
13260 /* Replace by ifcall9. */
13261 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13262 if (!insert_nds32_elf_blank_recalc_total
13263 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13264 return FALSE;
13265 irel_ptr->irel->r_info =
13266 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13267 R_NDS32_10IFCU_PCREL_RELA);
13268 }
13269 }
13270 irel_ptr = irel_ptr->next;
13271 }
13272
13273 /* Delete the redundant code. */
13274 if (relax_blank_list)
13275 {
13276 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13277 relax_blank_list);
13278 relax_blank_list = NULL;
13279 }
13280 }
13281 else
13282 {
13283 /* Global symbol. */
13284 while (irel_ptr)
13285 {
13286 if (irel_ptr->keep == 0 && irel_ptr->next)
13287 {
13288 /* The one can be replaced, and we have to check
13289 whether there is any alignment point in the region. */
13290 internal_relocs = _bfd_elf_link_read_relocs
13291 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13292 TRUE /* keep_memory */);
13293 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13294 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13295 irel_ptr->sec, &contents,
13296 TRUE))
13297 return FALSE;
13298
13299 irel = irel_ptr->irel;
13300 while (((irel_ptr->sec == irel_ptr->next->sec
13301 && irel_ptr->next->keep == 0
13302 && irel < irel_ptr->next->irel)
13303 || ((irel_ptr->sec != irel_ptr->next->sec
13304 || irel_ptr->next->keep == 1)
13305 && irel < irelend))
13306 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13307 && (irel->r_addend & 0x1f) == 2))
13308 irel++;
13309 if (irel >= irelend
13310 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13311 && (irel->r_addend & 0x1f) == 2
13312 && ((irel->r_offset
13313 - get_nds32_elf_blank_total (&relax_blank_list,
13314 irel->r_offset, 1)) & 0x02) == 0))
13315 {
13316 /* Replace by ifcall9. */
13317 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13318 if (!insert_nds32_elf_blank_recalc_total
13319 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13320 return FALSE;
13321
13322 /* Delete the redundant code, and clear the relocation. */
13323 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13324 irel_ptr->sec,
13325 relax_blank_list);
13326 irel_ptr->irel->r_info =
13327 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13328 R_NDS32_10IFCU_PCREL_RELA);
13329 relax_blank_list = NULL;
13330 }
13331 }
13332
13333 irel_ptr = irel_ptr->next;
13334 }
13335 }
13336 }
13337 ptr = ptr->next;
13338 }
13339
13340 return TRUE;
13341 }
13342
13343 /* Relocate ifcall. */
13344
13345 static bfd_boolean
13346 nds32_elf_ifc_reloc (void)
13347 {
13348 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13349 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13350 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13351 bfd_vma relocation, address;
13352 unsigned short insn16;
13353 bfd_byte *contents = NULL;
13354 static bfd_boolean done = FALSE;
13355
13356 if (done)
13357 return TRUE;
13358
13359 done = TRUE;
13360
13361 while (ptr)
13362 {
13363 /* Check the entry is enable ifcall. */
13364 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13365 {
13366 /* Get the reserve jump. */
13367 irel_ptr = ptr->irel_head;
13368 while (irel_ptr)
13369 {
13370 if (irel_ptr->keep == 1)
13371 {
13372 irel_keeper = irel_ptr;
13373 break;
13374 }
13375 irel_ptr = irel_ptr->next;
13376 }
13377
13378 irel_ptr = ptr->irel_head;
13379 if (ptr->h == NULL)
13380 {
13381 /* Local symbol. */
13382 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13383 &contents, TRUE))
13384 return FALSE;
13385
13386 while (irel_ptr)
13387 {
13388 if (irel_ptr->keep == 0
13389 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13390 {
13391 relocation = irel_keeper->irel->r_offset;
13392 relocation = relocation - irel_ptr->irel->r_offset;
13393 while (irel_keeper && relocation > 1022)
13394 {
13395 irel_keeper = irel_keeper->next;
13396 if (irel_keeper && irel_keeper->keep == 1)
13397 {
13398 relocation = irel_keeper->irel->r_offset;
13399 relocation = relocation - irel_ptr->irel->r_offset;
13400 }
13401 }
13402 if (relocation > 1022)
13403 {
13404 /* Double check. */
13405 irel_keeper = ptr->irel_head;
13406 while (irel_keeper)
13407 {
13408 if (irel_keeper->keep == 1)
13409 {
13410 relocation = irel_keeper->irel->r_offset;
13411 relocation = relocation - irel_ptr->irel->r_offset;
13412 }
13413 if (relocation <= 1022)
13414 break;
13415 irel_keeper = irel_keeper->next;
13416 }
13417 if (!irel_keeper)
13418 return FALSE;
13419 }
13420 irel_ptr->irel->r_info =
13421 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13422 R_NDS32_NONE);
13423 insn16 = INSN_IFCALL9 | (relocation >> 1);
13424 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13425 }
13426 irel_ptr = irel_ptr->next;
13427 }
13428 }
13429 else
13430 {
13431 /* Global symbol. */
13432 while (irel_ptr)
13433 {
13434 if (irel_ptr->keep == 0
13435 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13436 {
13437 /* Get the distance between ifcall and jump. */
13438 relocation = (irel_keeper->irel->r_offset
13439 + irel_keeper->sec->output_section->vma
13440 + irel_keeper->sec->output_offset);
13441 address = (irel_ptr->irel->r_offset
13442 + irel_ptr->sec->output_section->vma
13443 + irel_ptr->sec->output_offset);
13444 relocation = relocation - address;
13445
13446 /* The distance is over ragne, find callee again. */
13447 while (irel_keeper && relocation > 1022)
13448 {
13449 irel_keeper = irel_keeper->next;
13450 if (irel_keeper && irel_keeper->keep ==1)
13451 {
13452 relocation = (irel_keeper->irel->r_offset
13453 + irel_keeper->sec->output_section->vma
13454 + irel_keeper->sec->output_offset);
13455 relocation = relocation - address;
13456 }
13457 }
13458
13459 if (relocation > 1022)
13460 {
13461 /* Double check. */
13462 irel_keeper = ptr->irel_head;
13463 while (irel_keeper)
13464 {
13465 if (irel_keeper->keep == 1)
13466 {
13467
13468 relocation = (irel_keeper->irel->r_offset
13469 + irel_keeper->sec->output_section->vma
13470 + irel_keeper->sec->output_offset);
13471 relocation = relocation - address;
13472 }
13473 if (relocation <= 1022)
13474 break;
13475 irel_keeper = irel_keeper->next;
13476 }
13477 if (!irel_keeper)
13478 return FALSE;
13479 }
13480 if (!nds32_get_section_contents
13481 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
13482 return FALSE;
13483 insn16 = INSN_IFCALL9 | (relocation >> 1);
13484 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13485 irel_ptr->irel->r_info =
13486 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13487 R_NDS32_NONE);
13488 }
13489 irel_ptr =irel_ptr->next;
13490 }
13491 }
13492 }
13493 ptr = ptr->next;
13494 }
13495
13496 return TRUE;
13497 }
13498
13499 /* End of IFC relaxation. */
13500 \f
13501 /* EX9 Instruction Table Relaxation. */
13502
13503 /* Global hash list. */
13504 struct elf_link_hash_entry_list
13505 {
13506 struct elf_link_hash_entry *h;
13507 struct elf_link_hash_entry_list *next;
13508 };
13509
13510 /* Save different destination but same insn. */
13511 struct elf_link_hash_entry_mul_list
13512 {
13513 /* Global symbol times. */
13514 int times;
13515 /* Save relocation for each global symbol but useful?? */
13516 Elf_Internal_Rela *irel;
13517 /* For sethi, two sethi may have the same high-part but different low-parts. */
13518 Elf_Internal_Rela rel_backup;
13519 struct elf_link_hash_entry_list *h_list;
13520 struct elf_link_hash_entry_mul_list *next;
13521 };
13522
13523 /* Instruction hash table. */
13524 struct elf_nds32_code_hash_entry
13525 {
13526 struct bfd_hash_entry root;
13527 int times;
13528 /* For insn that can use relocation or constant ex: sethi. */
13529 int const_insn;
13530 asection *sec;
13531 struct elf_link_hash_entry_mul_list *m_list;
13532 /* Using r_addend. */
13533 Elf_Internal_Rela *irel;
13534 /* Using r_info. */
13535 Elf_Internal_Rela rel_backup;
13536 };
13537
13538 /* Instruction count list. */
13539 struct elf_nds32_insn_times_entry
13540 {
13541 const char *string;
13542 int times;
13543 int order;
13544 asection *sec;
13545 struct elf_link_hash_entry_mul_list *m_list;
13546 Elf_Internal_Rela *irel;
13547 Elf_Internal_Rela rel_backup;
13548 struct elf_nds32_insn_times_entry *next;
13549 };
13550
13551 /* J and JAL symbol list. */
13552 struct elf_nds32_symbol_entry
13553 {
13554 char *string;
13555 unsigned long insn;
13556 struct elf_nds32_symbol_entry *next;
13557 };
13558
13559 /* Relocation list. */
13560 struct elf_nds32_irel_entry
13561 {
13562 Elf_Internal_Rela *irel;
13563 struct elf_nds32_irel_entry *next;
13564 };
13565
13566 /* ex9.it insn need to be fixed. */
13567 struct elf_nds32_ex9_refix
13568 {
13569 Elf_Internal_Rela *irel;
13570 asection *sec;
13571 struct elf_link_hash_entry *h;
13572 int order;
13573 struct elf_nds32_ex9_refix *next;
13574 };
13575
13576 static struct bfd_hash_table ex9_code_table;
13577 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13578 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13579
13580 /* EX9 hash function. */
13581
13582 static struct bfd_hash_entry *
13583 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13584 struct bfd_hash_table *table,
13585 const char *string)
13586 {
13587 struct elf_nds32_code_hash_entry *ret;
13588
13589 /* Allocate the structure if it has not already been allocated by a
13590 subclass. */
13591 if (entry == NULL)
13592 {
13593 entry = (struct bfd_hash_entry *)
13594 bfd_hash_allocate (table, sizeof (*ret));
13595 if (entry == NULL)
13596 return entry;
13597 }
13598
13599 /* Call the allocation method of the superclass. */
13600 entry = bfd_hash_newfunc (entry, table, string);
13601 if (entry == NULL)
13602 return entry;
13603
13604 ret = (struct elf_nds32_code_hash_entry*) entry;
13605 ret->times = 0;
13606 ret->const_insn = 0;
13607 ret->m_list = NULL;
13608 ret->sec = NULL;
13609 ret->irel = NULL;
13610 return &ret->root;
13611 }
13612
13613 /* Insert ex9 entry
13614 this insert must be stable sorted by times. */
13615
13616 static void
13617 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13618 {
13619 struct elf_nds32_insn_times_entry *temp;
13620 struct elf_nds32_insn_times_entry *temp2;
13621
13622 if (ex9_insn_head == NULL)
13623 {
13624 ex9_insn_head = ptr;
13625 ptr->next = NULL;
13626 }
13627 else
13628 {
13629 temp = ex9_insn_head;
13630 temp2 = ex9_insn_head;
13631 while (temp->next &&
13632 (temp->next->times >= ptr->times
13633 || temp->times == -1))
13634 {
13635 if (temp->times == -1)
13636 temp2 = temp;
13637 temp = temp->next;
13638 }
13639 if (ptr->times > temp->times && temp->times != -1)
13640 {
13641 ptr->next = temp;
13642 if (temp2->times == -1)
13643 temp2->next = ptr;
13644 else
13645 ex9_insn_head = ptr;
13646 }
13647 else if (temp->next == NULL)
13648 {
13649 temp->next = ptr;
13650 ptr->next = NULL;
13651 }
13652 else
13653 {
13654 ptr->next = temp->next;
13655 temp->next = ptr;
13656 }
13657 }
13658 }
13659
13660 /* Examine each insn times in hash table.
13661 Handle multi-link hash entry.
13662
13663 TODO: This function doesn't assign so much info since it is fake. */
13664
13665 static int
13666 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13667 {
13668 struct elf_nds32_insn_times_entry *ptr;
13669 int times;
13670
13671 if (h->m_list == NULL)
13672 {
13673 /* Local symbol insn or insn without relocation. */
13674 if (h->times < 3)
13675 return TRUE;
13676
13677 ptr = (struct elf_nds32_insn_times_entry *)
13678 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13679 ptr->times = h->times;
13680 ptr->string = h->root.string;
13681 ptr->m_list = NULL;
13682 ptr->sec = h->sec;
13683 ptr->irel = h->irel;
13684 ptr->rel_backup = h->rel_backup;
13685 nds32_elf_ex9_insert_entry (ptr);
13686 }
13687 else
13688 {
13689 /* Global symbol insn. */
13690 /* Only sethi insn has multiple m_list. */
13691 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13692
13693 times = 0;
13694 while (m_list)
13695 {
13696 times += m_list->times;
13697 m_list = m_list->next;
13698 }
13699 if (times >= 3)
13700 {
13701 m_list = h->m_list;
13702 ptr = (struct elf_nds32_insn_times_entry *)
13703 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13704 ptr->times = times; /* Use the total times. */
13705 ptr->string = h->root.string;
13706 ptr->m_list = m_list;
13707 ptr->sec = h->sec;
13708 ptr->irel = m_list->irel;
13709 ptr->rel_backup = m_list->rel_backup;
13710 nds32_elf_ex9_insert_entry (ptr);
13711 }
13712 if (h->const_insn == 1)
13713 {
13714 /* sethi with constant value. */
13715 if (h->times < 3)
13716 return TRUE;
13717
13718 ptr = (struct elf_nds32_insn_times_entry *)
13719 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13720 ptr->times = h->times;
13721 ptr->string = h->root.string;
13722 ptr->m_list = NULL;
13723 ptr->sec = NULL;
13724 ptr->irel = NULL;
13725 ptr->rel_backup = h->rel_backup;
13726 nds32_elf_ex9_insert_entry (ptr);
13727 }
13728 }
13729 return TRUE;
13730 }
13731
13732 /* Count each insn times in hash table.
13733 Handle multi-link hash entry. */
13734
13735 static int
13736 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13737 {
13738 int reservation, times;
13739 unsigned long relocation, min_relocation;
13740 struct elf_nds32_insn_times_entry *ptr;
13741
13742 if (h->m_list == NULL)
13743 {
13744 /* Local symbol insn or insn without relocation. */
13745 if (h->times < 3)
13746 return TRUE;
13747 ptr = (struct elf_nds32_insn_times_entry *)
13748 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13749 ptr->times = h->times;
13750 ptr->string = h->root.string;
13751 ptr->m_list = NULL;
13752 ptr->sec = h->sec;
13753 ptr->irel = h->irel;
13754 ptr->rel_backup = h->rel_backup;
13755 nds32_elf_ex9_insert_entry (ptr);
13756 }
13757 else
13758 {
13759 /* Global symbol insn. */
13760 /* Only sethi insn has multiple m_list. */
13761 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13762
13763 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13764 && m_list->next != NULL)
13765 {
13766 /* Sethi insn has different symbol or addend but has same hi20. */
13767 times = 0;
13768 reservation = 1;
13769 relocation = 0;
13770 min_relocation = 0xffffffff;
13771 while (m_list)
13772 {
13773 /* Get the minimum sethi address
13774 and calculate how many entry the sethi-list have to use. */
13775 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
13776 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
13777 && (m_list->h_list->h->root.u.def.section != NULL
13778 && m_list->h_list->h->root.u.def.section->output_section != NULL))
13779 {
13780 relocation = (m_list->h_list->h->root.u.def.value +
13781 m_list->h_list->h->root.u.def.section->output_section->vma +
13782 m_list->h_list->h->root.u.def.section->output_offset);
13783 relocation += m_list->irel->r_addend;
13784 }
13785 else
13786 relocation = 0;
13787 if (relocation < min_relocation)
13788 min_relocation = relocation;
13789 times += m_list->times;
13790 m_list = m_list->next;
13791 }
13792 if (min_relocation < ex9_relax_size)
13793 reservation = (min_relocation >> 12) + 1;
13794 else
13795 reservation = (min_relocation >> 12)
13796 - ((min_relocation - ex9_relax_size) >> 12) + 1;
13797 if (reservation < (times / 3))
13798 {
13799 /* Efficient enough to use ex9. */
13800 int i;
13801
13802 for (i = reservation ; i > 0; i--)
13803 {
13804 /* Allocate number of reservation ex9 entry. */
13805 ptr = (struct elf_nds32_insn_times_entry *)
13806 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13807 ptr->times = h->m_list->times / reservation;
13808 ptr->string = h->root.string;
13809 ptr->m_list = h->m_list;
13810 ptr->sec = h->sec;
13811 ptr->irel = h->m_list->irel;
13812 ptr->rel_backup = h->m_list->rel_backup;
13813 nds32_elf_ex9_insert_entry (ptr);
13814 }
13815 }
13816 }
13817 else
13818 {
13819 /* Normal global symbol that means no different address symbol
13820 using same ex9 entry. */
13821 if (m_list->times >= 3)
13822 {
13823 ptr = (struct elf_nds32_insn_times_entry *)
13824 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13825 ptr->times = m_list->times;
13826 ptr->string = h->root.string;
13827 ptr->m_list = h->m_list;
13828 ptr->sec = h->sec;
13829 ptr->irel = h->m_list->irel;
13830 ptr->rel_backup = h->m_list->rel_backup;
13831 nds32_elf_ex9_insert_entry (ptr);
13832 }
13833 }
13834
13835 if (h->const_insn == 1)
13836 {
13837 /* sethi with constant value. */
13838 if (h->times < 3)
13839 return TRUE;
13840
13841 ptr = (struct elf_nds32_insn_times_entry *)
13842 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13843 ptr->times = h->times;
13844 ptr->string = h->root.string;
13845 ptr->m_list = NULL;
13846 ptr->sec = NULL;
13847 ptr->irel = NULL;
13848 ptr->rel_backup = h->rel_backup;
13849 nds32_elf_ex9_insert_entry (ptr);
13850 }
13851 }
13852
13853 return TRUE;
13854 }
13855
13856 /* Hash table traverse function. */
13857
13858 static void
13859 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
13860 {
13861 unsigned int i;
13862
13863 ex9_code_table.frozen = 1;
13864 for (i = 0; i < ex9_code_table.size; i++)
13865 {
13866 struct bfd_hash_entry *p;
13867
13868 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
13869 if (!func ((struct elf_nds32_code_hash_entry *) p))
13870 goto out;
13871 }
13872 out:
13873 ex9_code_table.frozen = 0;
13874 }
13875
13876
13877 /* Give order number to insn list. */
13878
13879 static void
13880 nds32_elf_order_insn_times (struct bfd_link_info *info)
13881 {
13882 struct elf_nds32_insn_times_entry *ex9_insn;
13883 struct elf_nds32_insn_times_entry *temp = NULL;
13884 struct elf_nds32_link_hash_table *table;
13885 int ex9_limit;
13886 int number = 0;
13887
13888 if (ex9_insn_head == NULL)
13889 return;
13890
13891 /* The max number of entries is 512. */
13892 ex9_insn = ex9_insn_head;
13893 table = nds32_elf_hash_table (info);
13894 ex9_limit = table->ex9_limit;
13895
13896 ex9_insn = ex9_insn_head;
13897
13898 while (ex9_insn != NULL && number < ex9_limit)
13899 {
13900 ex9_insn->order = number;
13901 number++;
13902 temp = ex9_insn;
13903 ex9_insn = ex9_insn->next;
13904 }
13905
13906 if (ex9_insn && temp)
13907 temp->next = NULL;
13908
13909 while (ex9_insn != NULL)
13910 {
13911 /* Free useless entry. */
13912 temp = ex9_insn;
13913 ex9_insn = ex9_insn->next;
13914 free (temp);
13915 }
13916 }
13917
13918 /* Build .ex9.itable section. */
13919
13920 static void
13921 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
13922 {
13923 asection *table_sec;
13924 struct elf_nds32_insn_times_entry *ptr;
13925 bfd *it_abfd;
13926 int number = 0;
13927 bfd_byte *contents = NULL;
13928
13929 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
13930 it_abfd = it_abfd->link.next)
13931 {
13932 /* Find the section .ex9.itable, and put all entries into it. */
13933 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
13934 if (table_sec != NULL)
13935 {
13936 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
13937 return;
13938
13939 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13940 number++;
13941
13942 table_sec->size = number * 4;
13943
13944 if (number == 0)
13945 return;
13946
13947 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
13948 number = 0;
13949 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13950 {
13951 long val;
13952
13953 val = strtol (ptr->string, NULL, 16);
13954 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
13955 number++;
13956 }
13957 break;
13958 }
13959 }
13960 }
13961
13962 /* Get insn with regs according to relocation type. */
13963
13964 static void
13965 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
13966 uint32_t insn, uint32_t *insn_with_reg)
13967 {
13968 reloc_howto_type *howto = NULL;
13969
13970 if (irel == NULL
13971 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13972 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13973 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13974 {
13975 *insn_with_reg = insn;
13976 return;
13977 }
13978
13979 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13980 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
13981 }
13982
13983 /* Mask number of address bits according to relocation. */
13984
13985 static unsigned long
13986 nds32_elf_irel_mask (Elf_Internal_Rela *irel)
13987 {
13988 reloc_howto_type *howto = NULL;
13989
13990 if (irel == NULL
13991 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13992 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13993 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13994 return 0;
13995
13996 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13997 return howto->dst_mask;
13998 }
13999
14000 static void
14001 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14002 struct elf_nds32_irel_entry *irel_ptr)
14003 {
14004 if (*irel_list == NULL)
14005 {
14006 *irel_list = irel_ptr;
14007 irel_ptr->next = NULL;
14008 }
14009 else
14010 {
14011 irel_ptr->next = *irel_list;
14012 *irel_list = irel_ptr;
14013 }
14014 }
14015
14016 static void
14017 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14018 struct elf_link_hash_entry *h, int order)
14019 {
14020 struct elf_nds32_ex9_refix *ptr;
14021
14022 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14023 ptr->sec = sec;
14024 ptr->irel = irel;
14025 ptr->h = h;
14026 ptr->order = order;
14027 ptr->next = NULL;
14028
14029 if (ex9_refix_head == NULL)
14030 ex9_refix_head = ptr;
14031 else
14032 {
14033 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14034
14035 while (temp->next != NULL)
14036 temp = temp->next;
14037 temp->next = ptr;
14038 }
14039 }
14040
14041 enum
14042 {
14043 DATA_EXIST = 1,
14044 CLEAN_PRE = 1 << 1,
14045 PUSH_PRE = 1 << 2
14046 };
14047
14048 /* Check relocation type if supporting for ex9. */
14049
14050 static int
14051 nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14052 Elf_Internal_Rela **irel,
14053 Elf_Internal_Rela *irelend,
14054 nds32_elf_blank_t *relax_blank_list,
14055 asection *sec,bfd_vma *off,
14056 bfd_byte *contents)
14057 {
14058 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14059 bfd_boolean nested_ex9, nested_loop;
14060 bfd_boolean ex9_loop_aware;
14061 /* We use the highest 1 byte of result to record
14062 how many bytes location counter has to move. */
14063 int result = 0;
14064 Elf_Internal_Rela *irel_save = NULL;
14065 struct elf_nds32_link_hash_table *table;
14066
14067 table = nds32_elf_hash_table (info);
14068 ex9_loop_aware = table->ex9_loop_aware;
14069
14070 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14071 {
14072 switch (ELF32_R_TYPE ((*irel)->r_info))
14073 {
14074 case R_NDS32_RELAX_REGION_BEGIN:
14075 /* Ignore code block. */
14076 nested_ex9 = FALSE;
14077 nested_loop = FALSE;
14078 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14079 || (ex9_loop_aware
14080 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14081 {
14082 /* Check the region if loop or not. If it is true and
14083 ex9-loop-aware is true, ignore the region till region end. */
14084 /* To save the status for in .no_relax ex9 region and
14085 loop region to conform the block can do ex9 relaxation. */
14086 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14087 nested_loop = (ex9_loop_aware
14088 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14089 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14090 {
14091 (*irel)++;
14092 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14093 {
14094 /* There may be nested region. */
14095 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14096 nested_ex9 = TRUE;
14097 else if (ex9_loop_aware
14098 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14099 nested_loop = TRUE;
14100 }
14101 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14102 {
14103 /* The end of region. */
14104 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14105 nested_ex9 = FALSE;
14106 else if (ex9_loop_aware
14107 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14108 nested_loop = FALSE;
14109 }
14110 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
14111 && ((*irel)->r_addend & 0x1f) == 2)
14112 {
14113 /* Alignment exist in the region. */
14114 result |= CLEAN_PRE;
14115 if (((*irel)->r_offset -
14116 get_nds32_elf_blank_total (&relax_blank_list,
14117 (*irel)->r_offset, 0)) & 0x02)
14118 result |= PUSH_PRE;
14119 }
14120 }
14121 if ((*irel) >= irelend)
14122 *off = sec->size;
14123 else
14124 *off = (*irel)->r_offset;
14125
14126 /* The final instruction in the region, regard this one as data to ignore it. */
14127 result |= DATA_EXIST;
14128 return result;
14129 }
14130 break;
14131
14132 case R_NDS32_LABEL:
14133 if (((*irel)->r_addend & 0x1f) == 2)
14134 {
14135 /* Check this point is align and decide to do ex9 or not. */
14136 result |= CLEAN_PRE;
14137 if (((*irel)->r_offset -
14138 get_nds32_elf_blank_total (&relax_blank_list,
14139 (*irel)->r_offset, 0)) & 0x02)
14140 result |= PUSH_PRE;
14141 }
14142 break;
14143 case R_NDS32_32_RELA:
14144 /* Data. */
14145 result |= (4 << 24);
14146 result |= DATA_EXIST;
14147 break;
14148 case R_NDS32_16_RELA:
14149 /* Data. */
14150 result |= (2 << 24);
14151 result |= DATA_EXIST;
14152 break;
14153 case R_NDS32_DATA:
14154 /* Data. */
14155 /* The least code alignment is 2. If the data is only one byte,
14156 we have to shift one more byte. */
14157 if ((*irel)->r_addend == 1)
14158 result |= ((*irel)->r_addend << 25) ;
14159 else
14160 result |= ((*irel)->r_addend << 24) ;
14161
14162 result |= DATA_EXIST;
14163 break;
14164
14165 case R_NDS32_25_PCREL_RELA:
14166 case R_NDS32_SDA16S3_RELA:
14167 case R_NDS32_SDA15S3_RELA:
14168 case R_NDS32_SDA15S3:
14169 case R_NDS32_SDA17S2_RELA:
14170 case R_NDS32_SDA15S2_RELA:
14171 case R_NDS32_SDA12S2_SP_RELA:
14172 case R_NDS32_SDA12S2_DP_RELA:
14173 case R_NDS32_SDA15S2:
14174 case R_NDS32_SDA18S1_RELA:
14175 case R_NDS32_SDA15S1_RELA:
14176 case R_NDS32_SDA15S1:
14177 case R_NDS32_SDA19S0_RELA:
14178 case R_NDS32_SDA15S0_RELA:
14179 case R_NDS32_SDA15S0:
14180 case R_NDS32_HI20_RELA:
14181 case R_NDS32_LO12S0_ORI_RELA:
14182 case R_NDS32_LO12S0_RELA:
14183 case R_NDS32_LO12S1_RELA:
14184 case R_NDS32_LO12S2_RELA:
14185 /* These relocation is supported ex9 relaxation currently. */
14186 /* We have to save the relocation for using later, since we have
14187 to check there is any alignment in the same address. */
14188 irel_save = *irel;
14189 break;
14190 default:
14191 /* Not support relocations. */
14192 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
14193 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14194 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
14195 {
14196 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14197 But we have to consider if there is any side-effect. */
14198 if (!(result & DATA_EXIST))
14199 {
14200 /* We have to confirm there is no data relocation in the
14201 same address. In general case, this won't happen. */
14202 /* We have to do ex9 conservative, for those relocation not
14203 considerd we ignore instruction. */
14204 result |= DATA_EXIST;
14205 if (*(contents + *off) & 0x80)
14206 result |= (2 << 24);
14207 else
14208 result |= (4 << 24);
14209 break;
14210 }
14211 }
14212 }
14213 if ((*irel) < irelend
14214 && ((*irel) + 1) < irelend
14215 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14216 /* There are relocations pointing to the same address, we have to
14217 check all of them. */
14218 (*irel)++;
14219 else
14220 {
14221 if (irel_save)
14222 *irel = irel_save;
14223 return result;
14224 }
14225 }
14226 return result;
14227 }
14228
14229 /* Replace with ex9 instruction. */
14230
14231 static bfd_boolean
14232 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14233 nds32_elf_blank_t **relax_blank_list,
14234 struct elf_nds32_irel_entry *pre_irel_ptr,
14235 struct elf_nds32_irel_entry **irel_list)
14236 {
14237 if (insn16 != 0)
14238 {
14239 /* Implement the ex9 relaxation. */
14240 bfd_putb16 (insn16, contents + pre_off);
14241 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14242 pre_off + 2, 2))
14243 return FALSE;
14244 if (pre_irel_ptr != NULL)
14245 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14246 }
14247 return TRUE;
14248 }
14249
14250 /* Replace input file instruction which is in ex9 itable. */
14251
14252 static bfd_boolean
14253 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14254 {
14255 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14256 bfd_byte *contents = NULL;
14257 bfd_vma off;
14258 uint16_t insn16, insn_ex9;
14259 /* `pre_*' are used to track previous instruction that can use ex9.it. */
14260 bfd_vma pre_off = -1;
14261 uint16_t pre_insn16 = 0;
14262 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14263 Elf_Internal_Rela *internal_relocs;
14264 Elf_Internal_Rela *irel;
14265 Elf_Internal_Rela *irelend;
14266 Elf_Internal_Shdr *symtab_hdr;
14267 Elf_Internal_Sym *isym = NULL;
14268 nds32_elf_blank_t *relax_blank_list = NULL;
14269 uint32_t insn = 0;
14270 uint32_t insn_with_reg = 0;
14271 uint32_t it_insn;
14272 uint32_t it_insn_with_reg;
14273 unsigned long r_symndx;
14274 asection *isec;
14275 struct elf_nds32_irel_entry *irel_list = NULL;
14276 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14277 int data_flag, do_replace, save_irel;
14278 struct elf_link_hash_entry_list *h_list;
14279
14280
14281 /* Load section instructions, relocations, and symbol table. */
14282 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
14283 || !nds32_get_local_syms (abfd, sec, &isym))
14284 return FALSE;
14285 internal_relocs =
14286 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
14287 irelend = internal_relocs + sec->reloc_count;
14288 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14289
14290 off = 0;
14291
14292 /* Check if the object enable ex9. */
14293 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14294 irelend, R_NDS32_RELAX_ENTRY);
14295
14296 /* Check this section trigger ex9 relaxation. */
14297 if (irel == NULL
14298 || irel >= irelend
14299 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14300 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14301 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14302 return TRUE;
14303
14304 irel = internal_relocs;
14305
14306 /* Check alignment and fetch proper relocation. */
14307 while (off < sec->size)
14308 {
14309 struct elf_link_hash_entry *h = NULL;
14310 struct elf_nds32_irel_entry *irel_ptr = NULL;
14311
14312 /* Syn the instruction and the relocation. */
14313 while (irel != NULL && irel < irelend && irel->r_offset < off)
14314 irel++;
14315
14316 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14317 relax_blank_list, sec,
14318 &off, contents);
14319 if (data_flag & PUSH_PRE)
14320 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14321 &relax_blank_list, pre_irel_ptr,
14322 &irel_list))
14323 return FALSE;
14324
14325 if (data_flag & CLEAN_PRE)
14326 {
14327 pre_off = 0;
14328 pre_insn16 = 0;
14329 pre_irel_ptr = NULL;
14330 }
14331 if (data_flag & DATA_EXIST)
14332 {
14333 /* We save the move offset in the highest byte. */
14334 off += (data_flag >> 24);
14335 continue;
14336 }
14337
14338 if (*(contents + off) & 0x80)
14339 {
14340 /* 2-byte instruction. */
14341 off += 2;
14342 continue;
14343 }
14344
14345 /* Load the instruction and its opcode with register for comparing. */
14346 ex9_insn = ex9_insn_head;
14347 insn = bfd_getb32 (contents + off);
14348 insn_with_reg = 0;
14349 while (ex9_insn)
14350 {
14351 it_insn = strtol (ex9_insn->string, NULL, 16);
14352 it_insn_with_reg = 0;
14353 do_replace = 0;
14354 save_irel = 0;
14355
14356 if (irel != NULL && irel < irelend && irel->r_offset == off)
14357 {
14358 /* Insn with relocation. */
14359 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14360
14361 if (ex9_insn->irel != NULL)
14362 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14363 &it_insn_with_reg);
14364
14365 if (ex9_insn->irel != NULL
14366 && (ELF32_R_TYPE (irel->r_info) ==
14367 ELF32_R_TYPE (ex9_insn->irel->r_info))
14368 && (insn_with_reg == it_insn_with_reg))
14369 {
14370 /* Insn relocation and format is the same as table entry. */
14371
14372 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14373 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14374 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14375 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14376 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14377 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14378 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14379 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14380 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14381 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14382 && ELF32_R_TYPE (irel->r_info) <=
14383 R_NDS32_SDA12S2_SP_RELA)
14384 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14385 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14386 {
14387 r_symndx = ELF32_R_SYM (irel->r_info);
14388 if (r_symndx < symtab_hdr->sh_info)
14389 {
14390 /* Local symbol. */
14391 int shndx = isym[r_symndx].st_shndx;
14392
14393 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14394 if (ex9_insn->sec == isec
14395 && ex9_insn->irel->r_addend == irel->r_addend
14396 && ex9_insn->irel->r_info == irel->r_info)
14397 {
14398 do_replace = 1;
14399 save_irel = 1;
14400 }
14401 }
14402 else
14403 {
14404 /* External symbol. */
14405 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14406 if (ex9_insn->m_list)
14407 {
14408 h_list = ex9_insn->m_list->h_list;
14409 while (h_list)
14410 {
14411 if (h == h_list->h
14412 && (ex9_insn->m_list->irel->r_addend ==
14413 irel->r_addend))
14414 {
14415 do_replace = 1;
14416 save_irel = 1;
14417 break;
14418 }
14419 h_list = h_list->next;
14420 }
14421 }
14422 }
14423 }
14424 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14425 {
14426 r_symndx = ELF32_R_SYM (irel->r_info);
14427 if (r_symndx < symtab_hdr->sh_info)
14428 {
14429 /* Local symbols. Compare its base symbol and offset. */
14430 int shndx = isym[r_symndx].st_shndx;
14431
14432 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14433 if (ex9_insn->sec == isec
14434 && ex9_insn->irel->r_addend == irel->r_addend
14435 && ex9_insn->irel->r_info == irel->r_info)
14436 {
14437 do_replace = 1;
14438 save_irel = 1;
14439 }
14440 }
14441 else
14442 {
14443 /* External symbol. */
14444 struct elf_link_hash_entry_mul_list *m_list;
14445
14446 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14447 m_list = ex9_insn->m_list;
14448
14449 while (m_list)
14450 {
14451 h_list = m_list->h_list;
14452
14453 while (h_list)
14454 {
14455 if (h == h_list->h
14456 && (m_list->irel->r_addend
14457 == irel->r_addend))
14458 {
14459 do_replace = 1;
14460 save_irel = 1;
14461 if (ex9_insn->next
14462 && ex9_insn->m_list
14463 && ex9_insn->m_list == ex9_insn->next->m_list)
14464 {
14465 /* sethi multiple entry must be fixed */
14466 nds32_elf_ex9_insert_fix (sec, irel,
14467 h, ex9_insn->order);
14468 }
14469 break;
14470 }
14471 h_list = h_list->next;
14472 }
14473 m_list = m_list->next;
14474 }
14475 }
14476 }
14477 }
14478
14479 /* Import table: Check the symbol hash table and the
14480 jump target. Only R_NDS32_25_PCREL_RELA now. */
14481 else if (ex9_insn->times == -1
14482 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14483 {
14484 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14485 if (insn_with_reg == it_insn_with_reg)
14486 {
14487 char code[10];
14488 bfd_vma relocation;
14489
14490 r_symndx = ELF32_R_SYM (irel->r_info);
14491 if (r_symndx >= symtab_hdr->sh_info)
14492 {
14493 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14494 if ((h->root.type == bfd_link_hash_defined
14495 || h->root.type == bfd_link_hash_defweak)
14496 && h->root.u.def.section != NULL
14497 && h->root.u.def.section->output_section != NULL
14498 && h->root.u.def.section->gc_mark == 1
14499 && bfd_is_abs_section (h->root.u.def.section)
14500 && h->root.u.def.value > sec->size)
14501 {
14502 relocation = h->root.u.def.value +
14503 h->root.u.def.section->output_section->vma +
14504 h->root.u.def.section->output_offset;
14505 relocation += irel->r_addend;
14506 insn = insn_with_reg
14507 | ((relocation >> 1) & 0xffffff);
14508 snprintf (code, sizeof (code), "%08x", insn);
14509 if (strcmp (code, ex9_insn->string) == 0)
14510 {
14511 do_replace = 1;
14512 save_irel = 1;
14513 }
14514 }
14515 }
14516 }
14517 }
14518 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14519 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14520 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
14521 {
14522 /* These relocations do not have to relocate contens, so it can
14523 be regard as instruction without relocation. */
14524 if (insn == it_insn && ex9_insn->irel == NULL)
14525 do_replace = 1;
14526 }
14527 }
14528 else
14529 {
14530 /* Instruction without relocation, we only
14531 have to compare their byte code. */
14532 if (insn == it_insn && ex9_insn->irel == NULL)
14533 do_replace = 1;
14534 }
14535
14536 /* Insntruction match so replacing the code here. */
14537 if (do_replace == 1)
14538 {
14539 /* There are two formats of ex9 instruction. */
14540 if (ex9_insn->order < 32)
14541 insn_ex9 = INSN_EX9_IT_2;
14542 else
14543 insn_ex9 = INSN_EX9_IT_1;
14544 insn16 = insn_ex9 | ex9_insn->order;
14545
14546 /* Insert ex9 instruction. */
14547 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14548 &relax_blank_list, pre_irel_ptr,
14549 &irel_list);
14550 pre_off = off;
14551 pre_insn16 = insn16;
14552
14553 if (save_irel)
14554 {
14555 /* For instuction with relocation do relax. */
14556 irel_ptr = (struct elf_nds32_irel_entry *)
14557 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14558 irel_ptr->irel = irel;
14559 irel_ptr->next = NULL;
14560 pre_irel_ptr = irel_ptr;
14561 }
14562 else
14563 pre_irel_ptr = NULL;
14564 break;
14565 }
14566 ex9_insn = ex9_insn->next;
14567 }
14568 off += 4;
14569 }
14570
14571 /* Insert ex9 instruction. */
14572 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14573 &relax_blank_list, pre_irel_ptr,
14574 &irel_list);
14575
14576 /* Delete the redundant code. */
14577 if (relax_blank_list)
14578 {
14579 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14580 relax_blank_list = NULL;
14581 }
14582
14583 /* Clear the relocation that is replaced by ex9. */
14584 while (irel_list)
14585 {
14586 struct elf_nds32_irel_entry *irel_ptr;
14587
14588 irel_ptr = irel_list;
14589 irel_list = irel_ptr->next;
14590 irel_ptr->irel->r_info =
14591 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14592 free (irel_ptr);
14593 }
14594 return TRUE;
14595 }
14596
14597 /* Initialize ex9 hash table. */
14598
14599 int
14600 nds32_elf_ex9_init (void)
14601 {
14602 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14603 sizeof (struct elf_nds32_code_hash_entry),
14604 1023))
14605 {
14606 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
14607 return FALSE;
14608 }
14609 return TRUE;
14610 }
14611
14612 /* Predict how many bytes will be relaxed with ex9 and ifc. */
14613
14614 static void
14615 nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14616 {
14617 struct elf_nds32_insn_times_entry *ex9_insn;
14618 struct elf_nds32_insn_times_entry *temp;
14619 int target_optimize;
14620 struct elf_nds32_link_hash_table *table;
14621
14622 if (ex9_insn_head == NULL)
14623 return;
14624
14625 table = nds32_elf_hash_table (info);
14626 target_optimize = table->target_optimize;
14627 ex9_insn = ex9_insn_head;
14628 while (ex9_insn)
14629 {
14630 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14631 temp = ex9_insn;
14632 ex9_insn = ex9_insn->next;
14633 free (temp);
14634 }
14635 ex9_insn_head = NULL;
14636
14637 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14638 {
14639 /* Examine ifc reduce size. */
14640 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14641 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14642 int size = 0;
14643
14644 while (ifc_ent)
14645 {
14646 if (ifc_ent->enable == 0)
14647 {
14648 /* Not ifc yet. */
14649 irel_ptr = ifc_ent->irel_head;
14650 while (irel_ptr)
14651 {
14652 size += 2;
14653 irel_ptr = irel_ptr->next;
14654 }
14655 }
14656 size -= 2;
14657 ifc_ent = ifc_ent->next;
14658 }
14659 ex9_relax_size += size;
14660 }
14661 }
14662
14663 /* Finish ex9 table. */
14664
14665 void
14666 nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14667 {
14668 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14669 nds32_elf_order_insn_times (link_info);
14670 nds32_elf_ex9_total_relax (link_info);
14671 /* Traverse the hash table and count its times. */
14672 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14673 nds32_elf_order_insn_times (link_info);
14674 nds32_elf_ex9_build_itable (link_info);
14675 }
14676
14677 /* Relocate the entries in ex9 table. */
14678
14679 static bfd_vma
14680 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14681 struct bfd_link_info *link_info)
14682 {
14683 Elf_Internal_Sym *isym = NULL;
14684 bfd_vma relocation = -1;
14685 struct elf_link_hash_entry *h;
14686
14687 if (ptr->m_list != NULL)
14688 {
14689 /* Global symbol. */
14690 h = ptr->m_list->h_list->h;
14691 if ((h->root.type == bfd_link_hash_defined
14692 || h->root.type == bfd_link_hash_defweak)
14693 && h->root.u.def.section != NULL
14694 && h->root.u.def.section->output_section != NULL)
14695 {
14696
14697 relocation = h->root.u.def.value +
14698 h->root.u.def.section->output_section->vma +
14699 h->root.u.def.section->output_offset;
14700 relocation += ptr->m_list->irel->r_addend;
14701 }
14702 else
14703 relocation = 0;
14704 }
14705 else if (ptr->sec !=NULL)
14706 {
14707 /* Local symbol. */
14708 Elf_Internal_Sym sym;
14709 asection *sec = NULL;
14710 asection isec;
14711 asection *isec_ptr = &isec;
14712 Elf_Internal_Rela irel_backup = *(ptr->irel);
14713 asection *sec_backup = ptr->sec;
14714 bfd *abfd = ptr->sec->owner;
14715
14716 if (!nds32_get_local_syms (abfd, sec, &isym))
14717 return FALSE;
14718 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14719
14720 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14721 if (sec != NULL)
14722 *isec_ptr = *sec;
14723 sym = *isym;
14724
14725 /* The purpose is same as elf_link_input_bfd. */
14726 if (isec_ptr != NULL
14727 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14728 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14729 {
14730 sym.st_value =
14731 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14732 elf_section_data (isec_ptr)->sec_info,
14733 isym->st_value);
14734 }
14735 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14736 &ptr->sec, ptr->irel);
14737 if (ptr->irel != NULL)
14738 relocation += ptr->irel->r_addend;
14739
14740 /* Restore origin value since there may be some insntructions that
14741 could not be replaced with ex9.it. */
14742 *(ptr->irel) = irel_backup;
14743 ptr->sec = sec_backup;
14744 }
14745
14746 return relocation;
14747 }
14748
14749 /* Import ex9 table and build list. */
14750
14751 void
14752 nds32_elf_ex9_import_table (struct bfd_link_info *info)
14753 {
14754 int num = 0;
14755 bfd_byte *contents;
14756 FILE *ex9_import_file;
14757 int update_ex9_table;
14758 struct elf_nds32_link_hash_table *table;
14759
14760 table = nds32_elf_hash_table (info);
14761 ex9_import_file = table->ex9_import_file;
14762 rewind (table->ex9_import_file);
14763
14764 contents = bfd_malloc (sizeof (bfd_byte) * 4);
14765
14766 /* Read instructions from the input file and build the list. */
14767 while (!feof (ex9_import_file))
14768 {
14769 unsigned long insn;
14770 char *code;
14771 struct elf_nds32_insn_times_entry *ptr;
14772 size_t nread;
14773
14774 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
14775 /* Ignore the final byte 0x0a. */
14776 if (nread < 1)
14777 break;
14778 insn = bfd_getb32 (contents);
14779 code = bfd_malloc (sizeof (char) * 9);
14780 snprintf (code, 9, "%08lx", (insn & 0xffffffff));
14781 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14782 ptr->string = code;
14783 ptr->order = num;
14784 ptr->times = -1;
14785 ptr->sec = NULL;
14786 ptr->m_list = NULL;
14787 ptr->rel_backup.r_offset = 0;
14788 ptr->rel_backup.r_info = 0;
14789 ptr->rel_backup.r_addend = 0;
14790 ptr->irel = NULL;
14791 ptr->next = NULL;
14792 nds32_elf_ex9_insert_entry (ptr);
14793 num++;
14794 }
14795
14796 update_ex9_table = table->update_ex9_table;
14797 if (update_ex9_table == 1)
14798 {
14799 /* It has to consider of sethi need to use multiple page
14800 but it not be done yet. */
14801 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14802 nds32_elf_order_insn_times (info);
14803 }
14804 }
14805
14806 /* Export ex9 table. */
14807
14808 static void
14809 nds32_elf_ex9_export (struct bfd_link_info *info,
14810 bfd_byte *contents, int size)
14811 {
14812 FILE *ex9_export_file;
14813 struct elf_nds32_link_hash_table *table;
14814
14815 table = nds32_elf_hash_table (info);
14816 ex9_export_file = table->ex9_export_file;
14817 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
14818 fclose (ex9_export_file);
14819 }
14820
14821 /* Adjust relocations of J and JAL in ex9.itable.
14822 Export ex9 table. */
14823
14824 static void
14825 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
14826 {
14827 asection *table_sec = NULL;
14828 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14829 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
14830 bfd *it_abfd;
14831 uint32_t insn, insn_with_reg, source_insn;
14832 bfd_byte *contents = NULL, *source_contents = NULL;
14833 int size = 0;
14834 bfd_vma gp;
14835 int shift, update_ex9_table, offset = 0;
14836 reloc_howto_type *howto = NULL;
14837 Elf_Internal_Rela rel_backup;
14838 unsigned short insn_ex9;
14839 struct elf_nds32_link_hash_table *table;
14840 FILE *ex9_export_file;
14841 static bfd_boolean done = FALSE;
14842
14843 if (done)
14844 return;
14845
14846 done = TRUE;
14847
14848 table = nds32_elf_hash_table (link_info);
14849 if (table)
14850 table->relax_status |= NDS32_RELAX_EX9_DONE;
14851
14852
14853 update_ex9_table = table->update_ex9_table;
14854 /* Generated ex9.itable exactly. */
14855 if (update_ex9_table == 0)
14856 {
14857 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
14858 it_abfd = it_abfd->link.next)
14859 {
14860 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14861 if (table_sec != NULL)
14862 break;
14863 }
14864
14865 if (table_sec != NULL)
14866 {
14867 bfd *output_bfd;
14868
14869 output_bfd = table_sec->output_section->owner;
14870 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14871 if (table_sec->size == 0)
14872 return;
14873
14874 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
14875 return;
14876 }
14877 }
14878 else
14879 {
14880 /* Set gp. */
14881 bfd *output_bfd;
14882
14883 output_bfd = link_info->input_bfds->sections->output_section->owner;
14884 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14885 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
14886 }
14887
14888 /* Relocate instruction. */
14889 while (ex9_insn)
14890 {
14891 bfd_vma relocation, min_relocation = 0xffffffff;
14892
14893 insn = strtol (ex9_insn->string, NULL, 16);
14894 insn_with_reg = 0;
14895 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
14896 {
14897 if (ex9_insn->m_list)
14898 rel_backup = ex9_insn->m_list->rel_backup;
14899 else
14900 rel_backup = ex9_insn->rel_backup;
14901
14902 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
14903 howto =
14904 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
14905 (rel_backup.r_info));
14906 shift = howto->rightshift;
14907 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
14908 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
14909 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
14910 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
14911 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
14912 {
14913 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14914 insn =
14915 insn_with_reg | ((relocation >> shift) &
14916 nds32_elf_irel_mask (&rel_backup));
14917 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14918 }
14919 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
14920 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
14921 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
14922 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
14923 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
14924 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
14925 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
14926 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
14927 {
14928 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14929 insn =
14930 insn_with_reg | (((relocation - gp) >> shift) &
14931 nds32_elf_irel_mask (&rel_backup));
14932 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14933 }
14934 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
14935 {
14936 /* Sethi may be multiple entry for one insn. */
14937 if (ex9_insn->next && ex9_insn->m_list
14938 && ex9_insn->m_list == ex9_insn->next->m_list)
14939 {
14940 struct elf_link_hash_entry_mul_list *m_list;
14941 struct elf_nds32_ex9_refix *fix_ptr;
14942 struct elf_link_hash_entry *h;
14943
14944 temp_ptr = ex9_insn;
14945 temp_ptr2 = ex9_insn;
14946 m_list = ex9_insn->m_list;
14947 while (m_list)
14948 {
14949 h = m_list->h_list->h;
14950 relocation = h->root.u.def.value +
14951 h->root.u.def.section->output_section->vma +
14952 h->root.u.def.section->output_offset;
14953 relocation += m_list->irel->r_addend;
14954
14955 if (relocation < min_relocation)
14956 min_relocation = relocation;
14957 m_list = m_list->next;
14958 }
14959 relocation = min_relocation;
14960
14961 /* Put insntruction into ex9 table. */
14962 insn = insn_with_reg
14963 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
14964 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14965 relocation = relocation + 0x1000; /* hi20 */
14966
14967 while (ex9_insn->next && ex9_insn->m_list
14968 && ex9_insn->m_list == ex9_insn->next->m_list)
14969 {
14970 /* Multiple sethi. */
14971 ex9_insn = ex9_insn->next;
14972 size += 4;
14973 insn =
14974 insn_with_reg | ((relocation >> shift) &
14975 nds32_elf_irel_mask (&rel_backup));
14976 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14977 relocation = relocation + 0x1000; /* hi20 */
14978 }
14979
14980 fix_ptr = ex9_refix_head;
14981 while (fix_ptr)
14982 {
14983 /* Fix ex9 insn. */
14984 /* temp_ptr2 points to the head of multiple sethi. */
14985 temp_ptr = temp_ptr2;
14986 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
14987 {
14988 fix_ptr = fix_ptr->next;
14989 }
14990 if (fix_ptr->order != temp_ptr->order)
14991 break;
14992
14993 /* Set source insn. */
14994 relocation =
14995 fix_ptr->h->root.u.def.value +
14996 fix_ptr->h->root.u.def.section->output_section->vma +
14997 fix_ptr->h->root.u.def.section->output_offset;
14998 relocation += fix_ptr->irel->r_addend;
14999 /* sethi imm is imm20s. */
15000 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15001
15002 while (temp_ptr)
15003 {
15004 /* Match entry and source code. */
15005 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15006 if (insn == source_insn)
15007 {
15008 /* Fix the ex9 insn. */
15009 if (temp_ptr->order != fix_ptr->order)
15010 {
15011 if (!nds32_get_section_contents
15012 (fix_ptr->sec->owner, fix_ptr->sec,
15013 &source_contents, TRUE))
15014 _bfd_error_handler
15015 (_("Linker: error cannot fixed ex9 relocation \n"));
15016 if (temp_ptr->order < 32)
15017 insn_ex9 = INSN_EX9_IT_2;
15018 else
15019 insn_ex9 = INSN_EX9_IT_1;
15020 insn_ex9 = insn_ex9 | temp_ptr->order;
15021 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15022 }
15023 break;
15024 }
15025 else
15026 {
15027 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15028 _bfd_error_handler
15029 (_("Linker: error cannot fixed ex9 relocation \n"));
15030 else
15031 temp_ptr = temp_ptr->next;
15032 }
15033 }
15034 fix_ptr = fix_ptr->next;
15035 }
15036 }
15037 else
15038 {
15039 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15040 insn = insn_with_reg
15041 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15042 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15043 }
15044 }
15045 }
15046 else
15047 {
15048 /* Insn without relocation does not have to be fixed
15049 if need to update export table. */
15050 if (update_ex9_table == 1)
15051 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15052 }
15053 ex9_insn = ex9_insn->next;
15054 size += 4;
15055 }
15056
15057 ex9_export_file = table->ex9_export_file;
15058 if (ex9_export_file != NULL)
15059 nds32_elf_ex9_export (link_info, contents, table_sec->size);
15060 else if (update_ex9_table == 1)
15061 {
15062 table->ex9_export_file = table->ex9_import_file;
15063 rewind (table->ex9_export_file);
15064 nds32_elf_ex9_export (link_info, contents, size);
15065 }
15066 }
15067
15068 /* Generate ex9 hash table. */
15069
15070 static bfd_boolean
15071 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
15072 struct bfd_link_info *link_info)
15073 {
15074 Elf_Internal_Rela *internal_relocs;
15075 Elf_Internal_Rela *irelend;
15076 Elf_Internal_Rela *irel;
15077 Elf_Internal_Rela *jrel;
15078 Elf_Internal_Rela rel_backup;
15079 Elf_Internal_Shdr *symtab_hdr;
15080 Elf_Internal_Sym *isym = NULL;
15081 asection *isec;
15082 struct elf_link_hash_entry **sym_hashes;
15083 bfd_byte *contents = NULL;
15084 bfd_vma off = 0;
15085 unsigned long r_symndx;
15086 uint32_t insn, insn_with_reg;
15087 struct elf_link_hash_entry *h;
15088 int data_flag, shift, align;
15089 bfd_vma relocation;
15090 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15091 reloc_howto_type *howto = NULL;
15092
15093 sym_hashes = elf_sym_hashes (abfd);
15094 /* Load section instructions, relocations, and symbol table. */
15095 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
15096 return FALSE;
15097
15098 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15099 TRUE /* keep_memory */);
15100 irelend = internal_relocs + sec->reloc_count;
15101 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15102 if (!nds32_get_local_syms (abfd, sec, &isym))
15103 return FALSE;
15104
15105 /* Check the object if enable ex9. */
15106 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15107 R_NDS32_RELAX_ENTRY);
15108
15109 /* Check this section trigger ex9 relaxation. */
15110 if (irel == NULL
15111 || irel >= irelend
15112 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15113 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15114 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15115 return TRUE;
15116
15117 irel = internal_relocs;
15118
15119 /* Push each insn into hash table. */
15120 while (off < sec->size)
15121 {
15122 char code[10];
15123 struct elf_nds32_code_hash_entry *entry;
15124
15125 while (irel != NULL && irel < irelend && irel->r_offset < off)
15126 irel++;
15127
15128 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15129 NULL, sec, &off, contents);
15130 if (data_flag & DATA_EXIST)
15131 {
15132 /* We save the move offset in the highest byte. */
15133 off += (data_flag >> 24);
15134 continue;
15135 }
15136
15137 if (*(contents + off) & 0x80)
15138 {
15139 off += 2;
15140 }
15141 else
15142 {
15143 h = NULL;
15144 isec = NULL;
15145 jrel = NULL;
15146 rel_backup.r_info = 0;
15147 rel_backup.r_offset = 0;
15148 rel_backup.r_addend = 0;
15149 /* Load the instruction and its opcode with register for comparing. */
15150 insn = bfd_getb32 (contents + off);
15151 insn_with_reg = 0;
15152 if (irel != NULL && irel < irelend && irel->r_offset == off)
15153 {
15154 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15155 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15156 shift = howto->rightshift;
15157 align = (1 << shift) - 1;
15158 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15159 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15160 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15161 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15162 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15163 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15164 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15165 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15166 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15167 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15168 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15169 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15170 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15171 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15172 {
15173 r_symndx = ELF32_R_SYM (irel->r_info);
15174 jrel = irel;
15175 rel_backup = *irel;
15176 if (r_symndx < symtab_hdr->sh_info)
15177 {
15178 /* Local symbol. */
15179 int shndx = isym[r_symndx].st_shndx;
15180
15181 bfd_vma st_value = (isym + r_symndx)->st_value;
15182 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15183 relocation = (isec->output_section->vma + isec->output_offset
15184 + st_value + irel->r_addend);
15185 }
15186 else
15187 {
15188 /* External symbol. */
15189 bfd_boolean warned ATTRIBUTE_UNUSED;
15190 bfd_boolean ignored ATTRIBUTE_UNUSED;
15191 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15192 asection *sym_sec;
15193
15194 /* Maybe there is a better way to get h and relocation */
15195 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15196 r_symndx, symtab_hdr, sym_hashes,
15197 h, sym_sec, relocation,
15198 unresolved_reloc, warned, ignored);
15199 relocation += irel->r_addend;
15200 if ((h->root.type != bfd_link_hash_defined
15201 && h->root.type != bfd_link_hash_defweak)
15202 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
15203 {
15204 off += 4;
15205 continue;
15206 }
15207 }
15208
15209 /* Check for gp relative instruction alignment. */
15210 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15211 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15212 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15213 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15214 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15215 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15216 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15217 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15218 {
15219 bfd_vma gp;
15220 bfd *output_bfd = sec->output_section->owner;
15221 bfd_reloc_status_type r;
15222
15223 /* If the symbol is in the abs section, the out_bfd will be null.
15224 This happens when the relocation has a symbol@GOTOFF. */
15225 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15226 if (r != bfd_reloc_ok)
15227 {
15228 off += 4;
15229 continue;
15230 }
15231
15232 relocation -= gp;
15233
15234 /* Make sure alignment is correct. */
15235 if (relocation & align)
15236 {
15237 /* Incorrect alignment. */
15238 _bfd_error_handler
15239 /* xgettext:c-format */
15240 (_("%pB: warning: unaligned small data access "
15241 "for entry: {%Ld, %Ld, %Ld}, addr = %#Lx, align = %#x"),
15242 abfd, irel->r_offset,
15243 irel->r_info, irel->r_addend, relocation, align);
15244 off += 4;
15245 continue;
15246 }
15247 }
15248
15249 insn = insn_with_reg
15250 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15251 }
15252 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
15253 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15254 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
15255 {
15256 /* These relocations do not have to relocate contens, so it can
15257 be regard as instruction without relocation. */
15258 }
15259 else
15260 {
15261 off += 4;
15262 continue;
15263 }
15264 }
15265
15266 snprintf (code, sizeof (code), "%08x", insn);
15267 /* Copy "code". */
15268 entry = (struct elf_nds32_code_hash_entry*)
15269 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15270 if (entry == NULL)
15271 {
15272 _bfd_error_handler
15273 (_("failed creating ex9.it %s hash table entry"), code);
15274 return FALSE;
15275 }
15276 if (h)
15277 {
15278 if (h->root.type == bfd_link_hash_undefined)
15279 return TRUE;
15280 /* Global symbol. */
15281 /* In order to do sethi with different symbol but same value. */
15282 if (entry->m_list == NULL)
15283 {
15284 struct elf_link_hash_entry_mul_list *m_list_new;
15285 struct elf_link_hash_entry_list *h_list_new;
15286
15287 m_list_new = (struct elf_link_hash_entry_mul_list *)
15288 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15289 h_list_new = (struct elf_link_hash_entry_list *)
15290 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15291 entry->m_list = m_list_new;
15292 m_list_new->h_list = h_list_new;
15293 m_list_new->rel_backup = rel_backup;
15294 m_list_new->times = 1;
15295 m_list_new->irel = jrel;
15296 m_list_new->next = NULL;
15297 h_list_new->h = h;
15298 h_list_new->next = NULL;
15299 }
15300 else
15301 {
15302 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15303 struct elf_link_hash_entry_list *h_list;
15304
15305 while (m_list)
15306 {
15307 /* Build the different symbols that point to the same address. */
15308 h_list = m_list->h_list;
15309 if (h_list->h->root.u.def.value == h->root.u.def.value
15310 && h_list->h->root.u.def.section->output_section->vma
15311 == h->root.u.def.section->output_section->vma
15312 && h_list->h->root.u.def.section->output_offset
15313 == h->root.u.def.section->output_offset
15314 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15315 {
15316 m_list->times++;
15317 m_list->irel = jrel;
15318 while (h_list->h != h && h_list->next)
15319 h_list = h_list->next;
15320 if (h_list->h != h)
15321 {
15322 struct elf_link_hash_entry_list *h_list_new;
15323
15324 h_list_new = (struct elf_link_hash_entry_list *)
15325 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15326 h_list->next = h_list_new;
15327 h_list_new->h = h;
15328 h_list_new->next = NULL;
15329 }
15330 break;
15331 }
15332 /* The sethi case may have different address but the
15333 hi20 is the same. */
15334 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15335 && m_list->next == NULL)
15336 {
15337 struct elf_link_hash_entry_mul_list *m_list_new;
15338 struct elf_link_hash_entry_list *h_list_new;
15339
15340 m_list_new = (struct elf_link_hash_entry_mul_list *)
15341 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15342 h_list_new = (struct elf_link_hash_entry_list *)
15343 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15344 m_list->next = m_list_new;
15345 m_list_new->h_list = h_list_new;
15346 m_list_new->rel_backup = rel_backup;
15347 m_list_new->times = 1;
15348 m_list_new->irel = jrel;
15349 m_list_new->next = NULL;
15350 h_list_new->h = h;
15351 h_list_new->next = NULL;
15352 break;
15353 }
15354 m_list = m_list->next;
15355 }
15356 if (!m_list)
15357 {
15358 off += 4;
15359 continue;
15360 }
15361 }
15362 }
15363 else
15364 {
15365 /* Local symbol and insn without relocation*/
15366 entry->times++;
15367 entry->rel_backup = rel_backup;
15368 }
15369
15370 /* Use in sethi insn with constant and global symbol in same format. */
15371 if (!jrel)
15372 entry->const_insn = 1;
15373 else
15374 entry->irel = jrel;
15375 entry->sec = isec;
15376 off += 4;
15377 }
15378 }
15379 return TRUE;
15380 }
15381
15382 /* Set the _ITB_BASE, and point it to ex9 table. */
15383
15384 bfd_boolean
15385 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15386 {
15387 bfd *abfd;
15388 asection *sec;
15389 bfd *output_bfd = NULL;
15390 struct bfd_link_hash_entry *bh = NULL;
15391
15392 if (is_ITB_BASE_set == 1)
15393 return TRUE;
15394
15395 is_ITB_BASE_set = 1;
15396
15397 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15398
15399 if (bh && (bh->type == bfd_link_hash_defined
15400 || bh->type == bfd_link_hash_defweak))
15401 return TRUE;
15402
15403 for (abfd = link_info->input_bfds; abfd != NULL;
15404 abfd = abfd->link.next)
15405 {
15406 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15407 if (sec != NULL)
15408 {
15409 output_bfd = sec->output_section->owner;
15410 break;
15411 }
15412 }
15413 if (output_bfd == NULL)
15414 {
15415 output_bfd = link_info->output_bfd;
15416 if (output_bfd->sections == NULL)
15417 return TRUE;
15418 else
15419 sec = bfd_abs_section_ptr;
15420 }
15421 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15422 FALSE, FALSE, TRUE);
15423 return (_bfd_generic_link_add_one_symbol
15424 (link_info, output_bfd, "_ITB_BASE_",
15425 BSF_GLOBAL | BSF_WEAK, sec, 0,
15426 (const char *) NULL, FALSE, get_elf_backend_data
15427 (output_bfd)->collect, &bh));
15428 } /* End EX9.IT */
15429 \f
15430
15431 #define ELF_ARCH bfd_arch_nds32
15432 #define ELF_MACHINE_CODE EM_NDS32
15433 #define ELF_MAXPAGESIZE 0x1000
15434 #define ELF_TARGET_ID NDS32_ELF_DATA
15435
15436 #define TARGET_BIG_SYM nds32_elf32_be_vec
15437 #define TARGET_BIG_NAME "elf32-nds32be"
15438 #define TARGET_LITTLE_SYM nds32_elf32_le_vec
15439 #define TARGET_LITTLE_NAME "elf32-nds32le"
15440
15441 #define elf_info_to_howto nds32_info_to_howto
15442 #define elf_info_to_howto_rel nds32_info_to_howto_rel
15443
15444 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15445 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15446 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15447 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15448 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15449
15450 #define bfd_elf32_mkobject nds32_elf_mkobject
15451 #define elf_backend_action_discarded nds32_elf_action_discarded
15452 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15453 #define elf_backend_check_relocs nds32_elf_check_relocs
15454 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15455 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15456 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15457 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15458 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15459 #define elf_backend_relocate_section nds32_elf_relocate_section
15460 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15461 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15462 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15463 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15464 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15465 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15466 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15467 #define elf_backend_object_p nds32_elf_object_p
15468 #define elf_backend_final_write_processing nds32_elf_final_write_processing
15469 #define elf_backend_special_sections nds32_elf_special_sections
15470 #define bfd_elf32_bfd_get_relocated_section_contents \
15471 nds32_elf_get_relocated_section_contents
15472
15473 #define elf_backend_can_gc_sections 1
15474 #define elf_backend_can_refcount 1
15475 #define elf_backend_want_got_plt 1
15476 #define elf_backend_plt_readonly 1
15477 #define elf_backend_want_plt_sym 0
15478 #define elf_backend_got_header_size 12
15479 #define elf_backend_may_use_rel_p 1
15480 #define elf_backend_default_use_rela_p 1
15481 #define elf_backend_may_use_rela_p 1
15482 #define elf_backend_dtrel_excludes_plt 1
15483
15484 #include "elf32-target.h"
15485
15486 #undef ELF_MAXPAGESIZE
15487 #define ELF_MAXPAGESIZE 0x2000
15488
15489 #undef TARGET_BIG_SYM
15490 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec
15491 #undef TARGET_BIG_NAME
15492 #define TARGET_BIG_NAME "elf32-nds32be-linux"
15493 #undef TARGET_LITTLE_SYM
15494 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
15495 #undef TARGET_LITTLE_NAME
15496 #define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15497 #undef elf32_bed
15498 #define elf32_bed elf32_nds32_lin_bed
15499
15500 #include "elf32-target.h"
GDB Binutils - Deliverables
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