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BFD whitespace fixes
[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011-2017 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "sysdep.h"
21 #include "bfd.h"
22 #include "bfd_stdint.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rl78.h"
26 #include "libiberty.h"
27
28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
35 asection *, bfd *, char **);
36
37 /* FIXME: We could omit the SHIFT parameter, it is always zero. */
38 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
40 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
41
42 /* Note that the relocations around 0x7f are internal to this file;
43 feel free to move them as needed to avoid conflicts with published
44 relocation numbers. */
45
46 static reloc_howto_type rl78_elf_howto_table [] =
47 {
48 RL78REL (NONE, 3, 0, 0, dont, FALSE),
49 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
50 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
51 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
52 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
53 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
54 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
55 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
56 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
60 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
61 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
62 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
63 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
64 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
65 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
67
68 EMPTY_HOWTO (0x13),
69 EMPTY_HOWTO (0x14),
70 EMPTY_HOWTO (0x15),
71 EMPTY_HOWTO (0x16),
72 EMPTY_HOWTO (0x17),
73 EMPTY_HOWTO (0x18),
74 EMPTY_HOWTO (0x19),
75 EMPTY_HOWTO (0x1a),
76 EMPTY_HOWTO (0x1b),
77 EMPTY_HOWTO (0x1c),
78 EMPTY_HOWTO (0x1d),
79 EMPTY_HOWTO (0x1e),
80 EMPTY_HOWTO (0x1f),
81
82 EMPTY_HOWTO (0x20),
83 EMPTY_HOWTO (0x21),
84 EMPTY_HOWTO (0x22),
85 EMPTY_HOWTO (0x23),
86 EMPTY_HOWTO (0x24),
87 EMPTY_HOWTO (0x25),
88 EMPTY_HOWTO (0x26),
89 EMPTY_HOWTO (0x27),
90 EMPTY_HOWTO (0x28),
91 EMPTY_HOWTO (0x29),
92 EMPTY_HOWTO (0x2a),
93 EMPTY_HOWTO (0x2b),
94 EMPTY_HOWTO (0x2c),
95 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
96
97 EMPTY_HOWTO (0x2e),
98 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
99 EMPTY_HOWTO (0x30),
100 EMPTY_HOWTO (0x31),
101 EMPTY_HOWTO (0x32),
102 EMPTY_HOWTO (0x33),
103 EMPTY_HOWTO (0x34),
104 EMPTY_HOWTO (0x35),
105 EMPTY_HOWTO (0x36),
106 EMPTY_HOWTO (0x37),
107 EMPTY_HOWTO (0x38),
108 EMPTY_HOWTO (0x39),
109 EMPTY_HOWTO (0x3a),
110 EMPTY_HOWTO (0x3b),
111 EMPTY_HOWTO (0x3c),
112 EMPTY_HOWTO (0x3d),
113 EMPTY_HOWTO (0x3e),
114 EMPTY_HOWTO (0x3f),
115 EMPTY_HOWTO (0x40),
116
117 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
119 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
122 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
134
135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
136
137 EMPTY_HOWTO (0x52),
138 EMPTY_HOWTO (0x53),
139 EMPTY_HOWTO (0x54),
140 EMPTY_HOWTO (0x55),
141 EMPTY_HOWTO (0x56),
142 EMPTY_HOWTO (0x57),
143 EMPTY_HOWTO (0x58),
144 EMPTY_HOWTO (0x59),
145 EMPTY_HOWTO (0x5a),
146 EMPTY_HOWTO (0x5b),
147 EMPTY_HOWTO (0x5c),
148 EMPTY_HOWTO (0x5d),
149 EMPTY_HOWTO (0x5e),
150 EMPTY_HOWTO (0x5f),
151 EMPTY_HOWTO (0x60),
152 EMPTY_HOWTO (0x61),
153 EMPTY_HOWTO (0x62),
154 EMPTY_HOWTO (0x63),
155 EMPTY_HOWTO (0x64),
156 EMPTY_HOWTO (0x65),
157 EMPTY_HOWTO (0x66),
158 EMPTY_HOWTO (0x67),
159 EMPTY_HOWTO (0x68),
160 EMPTY_HOWTO (0x69),
161 EMPTY_HOWTO (0x6a),
162 EMPTY_HOWTO (0x6b),
163 EMPTY_HOWTO (0x6c),
164 EMPTY_HOWTO (0x6d),
165 EMPTY_HOWTO (0x6e),
166 EMPTY_HOWTO (0x6f),
167 EMPTY_HOWTO (0x70),
168 EMPTY_HOWTO (0x71),
169 EMPTY_HOWTO (0x72),
170 EMPTY_HOWTO (0x73),
171 EMPTY_HOWTO (0x74),
172 EMPTY_HOWTO (0x75),
173 EMPTY_HOWTO (0x76),
174 EMPTY_HOWTO (0x77),
175
176 EMPTY_HOWTO (0x78),
177 EMPTY_HOWTO (0x79),
178 EMPTY_HOWTO (0x7a),
179 EMPTY_HOWTO (0x7b),
180 EMPTY_HOWTO (0x7c),
181 EMPTY_HOWTO (0x7d),
182 EMPTY_HOWTO (0x7e),
183 EMPTY_HOWTO (0x7f),
184
185 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
186 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
187 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
188 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
189 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
191 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
192 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
194 EMPTY_HOWTO (0x89),
195 EMPTY_HOWTO (0x8a),
196 EMPTY_HOWTO (0x8b),
197 EMPTY_HOWTO (0x8c),
198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
199 EMPTY_HOWTO (0x8e),
200 EMPTY_HOWTO (0x8f),
201 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
202 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
203 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
204 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
205 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
208 };
209 \f
210 /* Map BFD reloc types to RL78 ELF reloc types. */
211
212 struct rl78_reloc_map
213 {
214 bfd_reloc_code_real_type bfd_reloc_val;
215 unsigned int rl78_reloc_val;
216 };
217
218 static const struct rl78_reloc_map rl78_reloc_map [] =
219 {
220 { BFD_RELOC_NONE, R_RL78_NONE },
221 { BFD_RELOC_8, R_RL78_DIR8S },
222 { BFD_RELOC_16, R_RL78_DIR16S },
223 { BFD_RELOC_24, R_RL78_DIR24S },
224 { BFD_RELOC_32, R_RL78_DIR32 },
225 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
226 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
227 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
228 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
229 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
230 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
231 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
232 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
233 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
234 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
235 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
236 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
237 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
238 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
239 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
240 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
241 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
242 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
243 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
244 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
245 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
246 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
247 };
248
249 static reloc_howto_type *
250 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
251 bfd_reloc_code_real_type code)
252 {
253 unsigned int i;
254
255 if (code == BFD_RELOC_RL78_32_OP)
256 return rl78_elf_howto_table + R_RL78_DIR32;
257
258 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
259 if (rl78_reloc_map [i].bfd_reloc_val == code)
260 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
261
262 return NULL;
263 }
264
265 static reloc_howto_type *
266 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
267 {
268 unsigned int i;
269
270 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
271 if (rl78_elf_howto_table[i].name != NULL
272 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
273 return rl78_elf_howto_table + i;
274
275 return NULL;
276 }
277
278 /* Set the howto pointer for an RL78 ELF reloc. */
279
280 static void
281 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
282 arelent * cache_ptr,
283 Elf_Internal_Rela * dst)
284 {
285 unsigned int r_type;
286
287 r_type = ELF32_R_TYPE (dst->r_info);
288 if (r_type >= (unsigned int) R_RL78_max)
289 {
290 /* xgettext:c-format */
291 _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
292 r_type = 0;
293 }
294 cache_ptr->howto = rl78_elf_howto_table + r_type;
295 }
296 \f
297 static bfd_vma
298 get_symbol_value (const char * name,
299 struct bfd_link_info * info,
300 bfd * input_bfd,
301 asection * input_section,
302 int offset)
303 {
304 struct bfd_link_hash_entry * h;
305
306 if (info == NULL)
307 return 0;
308
309 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
310
311 if (h == NULL
312 || (h->type != bfd_link_hash_defined
313 && h->type != bfd_link_hash_defweak))
314 {
315 (*info->callbacks->undefined_symbol)
316 (info, name, input_bfd, input_section, offset, TRUE);
317 return 0;
318 }
319
320 return (h->u.def.value
321 + h->u.def.section->output_section->vma
322 + h->u.def.section->output_offset);
323 }
324
325 static bfd_vma
326 get_romstart (struct bfd_link_info * info,
327 bfd * abfd,
328 asection * sec,
329 int offset)
330 {
331 static bfd_boolean cached = FALSE;
332 static bfd_vma cached_value = 0;
333
334 if (!cached)
335 {
336 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
337 cached = TRUE;
338 }
339 return cached_value;
340 }
341
342 static bfd_vma
343 get_ramstart (struct bfd_link_info * info,
344 bfd * abfd,
345 asection * sec,
346 int offset)
347 {
348 static bfd_boolean cached = FALSE;
349 static bfd_vma cached_value = 0;
350
351 if (!cached)
352 {
353 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
354 cached = TRUE;
355 }
356 return cached_value;
357 }
358
359 #define NUM_STACK_ENTRIES 16
360 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
361 static unsigned int rl78_stack_top;
362
363 #define RL78_STACK_PUSH(val) \
364 do \
365 { \
366 if (rl78_stack_top < NUM_STACK_ENTRIES) \
367 rl78_stack [rl78_stack_top ++] = (val); \
368 else \
369 _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
370 } \
371 while (0)
372
373 #define RL78_STACK_POP(dest) \
374 do \
375 { \
376 if (rl78_stack_top > 0) \
377 (dest) = rl78_stack [-- rl78_stack_top];\
378 else \
379 { \
380 _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
381 (dest) = 0; \
382 } \
383 } \
384 while (0)
385
386 /* Special handling for RL78 complex relocs. Returns the
387 value of the reloc, or 0 for relocs which do not generate
388 a result. SYMVAL is the value of the symbol for relocs
389 which use a symbolic argument. */
390
391 static bfd_vma
392 rl78_compute_complex_reloc (unsigned long r_type,
393 bfd_vma symval,
394 asection * input_section)
395 {
396 int32_t tmp1, tmp2;
397 bfd_vma relocation;
398
399 switch (r_type)
400 {
401 default:
402 return 0;
403
404 case R_RL78_ABS24S_PCREL:
405 case R_RL78_ABS16S_PCREL:
406 case R_RL78_ABS8S_PCREL:
407 RL78_STACK_POP (relocation);
408 relocation -= input_section->output_section->vma + input_section->output_offset;
409 return relocation;
410
411 case R_RL78_ABS32:
412 case R_RL78_ABS32_REV:
413 case R_RL78_ABS16:
414 case R_RL78_ABS16_REV:
415 case R_RL78_ABS16S:
416 case R_RL78_ABS16U:
417 case R_RL78_ABS8:
418 case R_RL78_ABS8U:
419 case R_RL78_ABS8S:
420 RL78_STACK_POP (relocation);
421 return relocation;
422
423 case R_RL78_ABS16UL:
424 case R_RL78_ABS8UL:
425 RL78_STACK_POP (relocation);
426 return relocation >> 2;
427
428 case R_RL78_ABS16UW:
429 case R_RL78_ABS8UW:
430 RL78_STACK_POP (relocation);
431 return relocation >> 1;
432
433 /* The rest of the relocs compute values and then push them onto the stack. */
434 case R_RL78_OPramtop:
435 case R_RL78_OPromtop:
436 case R_RL78_SYM:
437 RL78_STACK_PUSH (symval);
438 return 0;
439
440 case R_RL78_OPneg:
441 RL78_STACK_POP (tmp1);
442 tmp1 = - tmp1;
443 RL78_STACK_PUSH (tmp1);
444 return 0;
445
446 case R_RL78_OPadd:
447 RL78_STACK_POP (tmp2);
448 RL78_STACK_POP (tmp1);
449 tmp1 += tmp2;
450 RL78_STACK_PUSH (tmp1);
451 return 0;
452
453 case R_RL78_OPsub:
454 /* For the expression "A - B", the assembler pushes A,
455 then B, then OPSUB. So the first op we pop is B, not A. */
456 RL78_STACK_POP (tmp2); /* B */
457 RL78_STACK_POP (tmp1); /* A */
458 tmp1 -= tmp2; /* A - B */
459 RL78_STACK_PUSH (tmp1);
460 return 0;
461
462 case R_RL78_OPmul:
463 RL78_STACK_POP (tmp2);
464 RL78_STACK_POP (tmp1);
465 tmp1 *= tmp2;
466 RL78_STACK_PUSH (tmp1);
467 return 0;
468
469 case R_RL78_OPdiv:
470 RL78_STACK_POP (tmp2);
471 RL78_STACK_POP (tmp1);
472 tmp1 /= tmp2;
473 RL78_STACK_PUSH (tmp1);
474 return 0;
475
476 case R_RL78_OPshla:
477 RL78_STACK_POP (tmp2);
478 RL78_STACK_POP (tmp1);
479 tmp1 <<= tmp2;
480 RL78_STACK_PUSH (tmp1);
481 return 0;
482
483 case R_RL78_OPshra:
484 RL78_STACK_POP (tmp2);
485 RL78_STACK_POP (tmp1);
486 tmp1 >>= tmp2;
487 RL78_STACK_PUSH (tmp1);
488 return 0;
489
490 case R_RL78_OPsctsize:
491 RL78_STACK_PUSH (input_section->size);
492 return 0;
493
494 case R_RL78_OPscttop:
495 RL78_STACK_PUSH (input_section->output_section->vma);
496 return 0;
497
498 case R_RL78_OPand:
499 RL78_STACK_POP (tmp2);
500 RL78_STACK_POP (tmp1);
501 tmp1 &= tmp2;
502 RL78_STACK_PUSH (tmp1);
503 return 0;
504
505 case R_RL78_OPor:
506 RL78_STACK_POP (tmp2);
507 RL78_STACK_POP (tmp1);
508 tmp1 |= tmp2;
509 RL78_STACK_PUSH (tmp1);
510 return 0;
511
512 case R_RL78_OPxor:
513 RL78_STACK_POP (tmp2);
514 RL78_STACK_POP (tmp1);
515 tmp1 ^= tmp2;
516 RL78_STACK_PUSH (tmp1);
517 return 0;
518
519 case R_RL78_OPnot:
520 RL78_STACK_POP (tmp1);
521 tmp1 = ~ tmp1;
522 RL78_STACK_PUSH (tmp1);
523 return 0;
524
525 case R_RL78_OPmod:
526 RL78_STACK_POP (tmp2);
527 RL78_STACK_POP (tmp1);
528 tmp1 %= tmp2;
529 RL78_STACK_PUSH (tmp1);
530 return 0;
531 }
532 }
533
534 #undef RL78_STACK_PUSH
535 #undef RL78_STACK_POP
536
537 #define OP(i) (contents[reloc->address + (i)])
538
539 static bfd_reloc_status_type
540 rl78_special_reloc (bfd * input_bfd,
541 arelent * reloc,
542 asymbol * symbol,
543 void * data,
544 asection * input_section,
545 bfd * output_bfd ATTRIBUTE_UNUSED,
546 char ** error_message ATTRIBUTE_UNUSED)
547 {
548 bfd_reloc_status_type r = bfd_reloc_ok;
549 bfd_vma relocation = 0;
550 unsigned long r_type = reloc->howto->type;
551 bfd_byte * contents = data;
552
553 /* If necessary, compute the symbolic value of the relocation. */
554 switch (r_type)
555 {
556 case R_RL78_SYM:
557 relocation = (symbol->value
558 + symbol->section->output_section->vma
559 + symbol->section->output_offset
560 + reloc->addend);
561 break;
562
563 case R_RL78_OPromtop:
564 relocation = get_romstart (NULL, input_bfd, input_section,
565 reloc->address);
566 break;
567
568 case R_RL78_OPramtop:
569 relocation = get_ramstart (NULL, input_bfd, input_section,
570 reloc->address);
571 break;
572 }
573
574 /* Get the value of the relocation. */
575 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
576
577 /* If the relocation alters the contents of the section then apply it now.
578 Note - since this function is called from
579 bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
580 and not from the linker, we do not perform any range checking. The
581 clients who are calling us are only interested in some relocated section
582 contents, and not any linkage problems that might occur later. */
583 switch (r_type)
584 {
585 case R_RL78_ABS32:
586 OP (0) = relocation;
587 OP (1) = relocation >> 8;
588 OP (2) = relocation >> 16;
589 OP (3) = relocation >> 24;
590 break;
591
592 case R_RL78_ABS32_REV:
593 OP (3) = relocation;
594 OP (2) = relocation >> 8;
595 OP (1) = relocation >> 16;
596 OP (0) = relocation >> 24;
597 break;
598
599 case R_RL78_ABS24S_PCREL:
600 case R_RL78_ABS24S:
601 OP (0) = relocation;
602 OP (1) = relocation >> 8;
603 OP (2) = relocation >> 16;
604 break;
605
606 case R_RL78_ABS16_REV:
607 OP (1) = relocation;
608 OP (0) = relocation >> 8;
609 break;
610
611 case R_RL78_ABS16S_PCREL:
612 case R_RL78_ABS16:
613 case R_RL78_ABS16S:
614 case R_RL78_ABS16U:
615 case R_RL78_ABS16UL:
616 case R_RL78_ABS16UW:
617 OP (0) = relocation;
618 OP (1) = relocation >> 8;
619 break;
620
621 case R_RL78_ABS8S_PCREL:
622 case R_RL78_ABS8:
623 case R_RL78_ABS8U:
624 case R_RL78_ABS8UL:
625 case R_RL78_ABS8UW:
626 case R_RL78_ABS8S:
627 OP (0) = relocation;
628 break;
629
630 default:
631 break;
632 }
633
634 return r;
635 }
636
637 #undef OP
638 #define OP(i) (contents[rel->r_offset + (i)])
639
640 /* Relocate an RL78 ELF section.
641 There is some attempt to make this function usable for many architectures,
642 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
643 if only to serve as a learning tool.
644
645 The RELOCATE_SECTION function is called by the new ELF backend linker
646 to handle the relocations for a section.
647
648 The relocs are always passed as Rela structures; if the section
649 actually uses Rel structures, the r_addend field will always be
650 zero.
651
652 This function is responsible for adjusting the section contents as
653 necessary, and (if using Rela relocs and generating a relocatable
654 output file) adjusting the reloc addend as necessary.
655
656 This function does not have to worry about setting the reloc
657 address or the reloc symbol index.
658
659 LOCAL_SYMS is a pointer to the swapped in local symbols.
660
661 LOCAL_SECTIONS is an array giving the section in the input file
662 corresponding to the st_shndx field of each local symbol.
663
664 The global hash table entry for the global symbols can be found
665 via elf_sym_hashes (input_bfd).
666
667 When generating relocatable output, this function must handle
668 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
669 going to be the section symbol corresponding to the output
670 section, which means that the addend must be adjusted
671 accordingly. */
672
673 static bfd_boolean
674 rl78_elf_relocate_section
675 (bfd * output_bfd,
676 struct bfd_link_info * info,
677 bfd * input_bfd,
678 asection * input_section,
679 bfd_byte * contents,
680 Elf_Internal_Rela * relocs,
681 Elf_Internal_Sym * local_syms,
682 asection ** local_sections)
683 {
684 Elf_Internal_Shdr * symtab_hdr;
685 struct elf_link_hash_entry ** sym_hashes;
686 Elf_Internal_Rela * rel;
687 Elf_Internal_Rela * relend;
688 asection *splt;
689
690 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
691 sym_hashes = elf_sym_hashes (input_bfd);
692 relend = relocs + input_section->reloc_count;
693
694 splt = elf_hash_table (info)->splt;
695
696 for (rel = relocs; rel < relend; rel ++)
697 {
698 reloc_howto_type * howto;
699 unsigned long r_symndx;
700 Elf_Internal_Sym * sym;
701 asection * sec;
702 struct elf_link_hash_entry * h;
703 bfd_vma relocation;
704 bfd_reloc_status_type r;
705 const char * name = NULL;
706 bfd_boolean unresolved_reloc = TRUE;
707 int r_type;
708
709 r_type = ELF32_R_TYPE (rel->r_info);
710 r_symndx = ELF32_R_SYM (rel->r_info);
711
712 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
713 h = NULL;
714 sym = NULL;
715 sec = NULL;
716 relocation = 0;
717
718 if (r_symndx < symtab_hdr->sh_info)
719 {
720 sym = local_syms + r_symndx;
721 sec = local_sections [r_symndx];
722 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
723
724 name = bfd_elf_string_from_elf_section
725 (input_bfd, symtab_hdr->sh_link, sym->st_name);
726 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
727 }
728 else
729 {
730 bfd_boolean warned ATTRIBUTE_UNUSED;
731 bfd_boolean ignored ATTRIBUTE_UNUSED;
732
733 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
734 r_symndx, symtab_hdr, sym_hashes, h,
735 sec, relocation, unresolved_reloc,
736 warned, ignored);
737
738 name = h->root.root.string;
739 }
740
741 if (sec != NULL && discarded_section (sec))
742 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
743 rel, 1, relend, howto, 0, contents);
744
745 if (bfd_link_relocatable (info))
746 {
747 /* This is a relocatable link. We don't have to change
748 anything, unless the reloc is against a section symbol,
749 in which case we have to adjust according to where the
750 section symbol winds up in the output section. */
751 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
752 rel->r_addend += sec->output_offset;
753 continue;
754 }
755
756 switch (ELF32_R_TYPE (rel->r_info))
757 {
758 case R_RL78_DIR16S:
759 {
760 bfd_vma *plt_offset;
761
762 if (h != NULL)
763 plt_offset = &h->plt.offset;
764 else
765 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
766
767 if (! valid_16bit_address (relocation))
768 {
769 /* If this is the first time we've processed this symbol,
770 fill in the plt entry with the correct symbol address. */
771 if ((*plt_offset & 1) == 0)
772 {
773 unsigned int x;
774
775 x = 0x000000ec; /* br !!abs24 */
776 x |= (relocation << 8) & 0xffffff00;
777 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
778 *plt_offset |= 1;
779 }
780
781 relocation = (splt->output_section->vma
782 + splt->output_offset
783 + (*plt_offset & -2));
784 if (name)
785 {
786 char *newname = bfd_malloc (strlen(name)+5);
787 strcpy (newname, name);
788 strcat(newname, ".plt");
789 _bfd_generic_link_add_one_symbol (info,
790 input_bfd,
791 newname,
792 BSF_FUNCTION | BSF_WEAK,
793 splt,
794 (*plt_offset & -2),
795 0,
796 1,
797 0,
798 0);
799 }
800 }
801 }
802 break;
803 }
804
805 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
806 /* If the symbol is undefined and weak
807 then the relocation resolves to zero. */
808 relocation = 0;
809 else
810 {
811 if (howto->pc_relative)
812 {
813 relocation -= (input_section->output_section->vma
814 + input_section->output_offset
815 + rel->r_offset);
816 relocation -= bfd_get_reloc_size (howto);
817 }
818
819 relocation += rel->r_addend;
820 }
821
822 r = bfd_reloc_ok;
823
824 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
825
826 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
827 switch (r_type)
828 {
829 case R_RL78_NONE:
830 break;
831
832 case R_RL78_RH_RELAX:
833 break;
834
835 case R_RL78_DIR8S_PCREL:
836 RANGE (-128, 127);
837 OP (0) = relocation;
838 break;
839
840 case R_RL78_DIR8S:
841 RANGE (-128, 255);
842 OP (0) = relocation;
843 break;
844
845 case R_RL78_DIR8U:
846 RANGE (0, 255);
847 OP (0) = relocation;
848 break;
849
850 case R_RL78_DIR16S_PCREL:
851 RANGE (-32768, 32767);
852 OP (0) = relocation;
853 OP (1) = relocation >> 8;
854 break;
855
856 case R_RL78_DIR16S:
857 if ((relocation & 0xf0000) == 0xf0000)
858 relocation &= 0xffff;
859 RANGE (-32768, 65535);
860 OP (0) = relocation;
861 OP (1) = relocation >> 8;
862 break;
863
864 case R_RL78_DIR16U:
865 RANGE (0, 65536);
866 OP (0) = relocation;
867 OP (1) = relocation >> 8;
868 break;
869
870 case R_RL78_DIR16:
871 RANGE (-32768, 65536);
872 OP (0) = relocation;
873 OP (1) = relocation >> 8;
874 break;
875
876 case R_RL78_DIR16_REV:
877 RANGE (-32768, 65536);
878 OP (1) = relocation;
879 OP (0) = relocation >> 8;
880 break;
881
882 case R_RL78_DIR3U_PCREL:
883 RANGE (3, 10);
884 OP (0) &= 0xf8;
885 OP (0) |= relocation & 0x07;
886 break;
887
888 case R_RL78_DIR24S_PCREL:
889 RANGE (-0x800000, 0x7fffff);
890 OP (0) = relocation;
891 OP (1) = relocation >> 8;
892 OP (2) = relocation >> 16;
893 break;
894
895 case R_RL78_DIR24S:
896 RANGE (-0x800000, 0x7fffff);
897 OP (0) = relocation;
898 OP (1) = relocation >> 8;
899 OP (2) = relocation >> 16;
900 break;
901
902 case R_RL78_DIR32:
903 OP (0) = relocation;
904 OP (1) = relocation >> 8;
905 OP (2) = relocation >> 16;
906 OP (3) = relocation >> 24;
907 break;
908
909 case R_RL78_DIR32_REV:
910 OP (3) = relocation;
911 OP (2) = relocation >> 8;
912 OP (1) = relocation >> 16;
913 OP (0) = relocation >> 24;
914 break;
915
916 case R_RL78_RH_SFR:
917 RANGE (0xfff00, 0xfffff);
918 OP (0) = relocation & 0xff;
919 break;
920
921 case R_RL78_RH_SADDR:
922 RANGE (0xffe20, 0xfff1f);
923 OP (0) = relocation & 0xff;
924 break;
925
926 /* Complex reloc handling: */
927 case R_RL78_ABS32:
928 case R_RL78_ABS32_REV:
929 case R_RL78_ABS24S_PCREL:
930 case R_RL78_ABS24S:
931 case R_RL78_ABS16:
932 case R_RL78_ABS16_REV:
933 case R_RL78_ABS16S_PCREL:
934 case R_RL78_ABS16S:
935 case R_RL78_ABS16U:
936 case R_RL78_ABS16UL:
937 case R_RL78_ABS16UW:
938 case R_RL78_ABS8:
939 case R_RL78_ABS8U:
940 case R_RL78_ABS8UL:
941 case R_RL78_ABS8UW:
942 case R_RL78_ABS8S_PCREL:
943 case R_RL78_ABS8S:
944 case R_RL78_OPneg:
945 case R_RL78_OPadd:
946 case R_RL78_OPsub:
947 case R_RL78_OPmul:
948 case R_RL78_OPdiv:
949 case R_RL78_OPshla:
950 case R_RL78_OPshra:
951 case R_RL78_OPsctsize:
952 case R_RL78_OPscttop:
953 case R_RL78_OPand:
954 case R_RL78_OPor:
955 case R_RL78_OPxor:
956 case R_RL78_OPnot:
957 case R_RL78_OPmod:
958 relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
959
960 switch (r_type)
961 {
962 case R_RL78_ABS32:
963 OP (0) = relocation;
964 OP (1) = relocation >> 8;
965 OP (2) = relocation >> 16;
966 OP (3) = relocation >> 24;
967 break;
968
969 case R_RL78_ABS32_REV:
970 OP (3) = relocation;
971 OP (2) = relocation >> 8;
972 OP (1) = relocation >> 16;
973 OP (0) = relocation >> 24;
974 break;
975
976 case R_RL78_ABS24S_PCREL:
977 case R_RL78_ABS24S:
978 RANGE (-0x800000, 0x7fffff);
979 OP (0) = relocation;
980 OP (1) = relocation >> 8;
981 OP (2) = relocation >> 16;
982 break;
983
984 case R_RL78_ABS16:
985 RANGE (-32768, 65535);
986 OP (0) = relocation;
987 OP (1) = relocation >> 8;
988 break;
989
990 case R_RL78_ABS16_REV:
991 RANGE (-32768, 65535);
992 OP (1) = relocation;
993 OP (0) = relocation >> 8;
994 break;
995
996 case R_RL78_ABS16S_PCREL:
997 case R_RL78_ABS16S:
998 RANGE (-32768, 32767);
999 OP (0) = relocation;
1000 OP (1) = relocation >> 8;
1001 break;
1002
1003 case R_RL78_ABS16U:
1004 case R_RL78_ABS16UL:
1005 case R_RL78_ABS16UW:
1006 RANGE (0, 65536);
1007 OP (0) = relocation;
1008 OP (1) = relocation >> 8;
1009 break;
1010
1011 case R_RL78_ABS8:
1012 RANGE (-128, 255);
1013 OP (0) = relocation;
1014 break;
1015
1016 case R_RL78_ABS8U:
1017 case R_RL78_ABS8UL:
1018 case R_RL78_ABS8UW:
1019 RANGE (0, 255);
1020 OP (0) = relocation;
1021 break;
1022
1023 case R_RL78_ABS8S_PCREL:
1024 case R_RL78_ABS8S:
1025 RANGE (-128, 127);
1026 OP (0) = relocation;
1027 break;
1028
1029 default:
1030 break;
1031 }
1032 break;
1033
1034 case R_RL78_SYM:
1035 if (r_symndx < symtab_hdr->sh_info)
1036 relocation = sec->output_section->vma + sec->output_offset
1037 + sym->st_value + rel->r_addend;
1038 else if (h != NULL
1039 && (h->root.type == bfd_link_hash_defined
1040 || h->root.type == bfd_link_hash_defweak))
1041 relocation = h->root.u.def.value
1042 + sec->output_section->vma
1043 + sec->output_offset
1044 + rel->r_addend;
1045 else
1046 {
1047 relocation = 0;
1048 if (h->root.type != bfd_link_hash_undefweak)
1049 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
1050 }
1051 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1052 break;
1053
1054 case R_RL78_OPromtop:
1055 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset);
1056 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1057 break;
1058
1059 case R_RL78_OPramtop:
1060 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1061 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1062 break;
1063
1064 default:
1065 r = bfd_reloc_notsupported;
1066 break;
1067 }
1068
1069 if (r != bfd_reloc_ok)
1070 {
1071 const char * msg = NULL;
1072
1073 switch (r)
1074 {
1075 case bfd_reloc_overflow:
1076 /* Catch the case of a missing function declaration
1077 and emit a more helpful error message. */
1078 if (r_type == R_RL78_DIR24S_PCREL)
1079 /* xgettext:c-format */
1080 msg = _("%B(%A): error: call to undefined function '%s'");
1081 else
1082 (*info->callbacks->reloc_overflow)
1083 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1084 input_bfd, input_section, rel->r_offset);
1085 break;
1086
1087 case bfd_reloc_undefined:
1088 (*info->callbacks->undefined_symbol)
1089 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
1090 break;
1091
1092 case bfd_reloc_other:
1093 /* xgettext:c-format */
1094 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1095 break;
1096
1097 case bfd_reloc_outofrange:
1098 /* xgettext:c-format */
1099 msg = _("%B(%A): internal error: out of range error");
1100 break;
1101
1102 case bfd_reloc_notsupported:
1103 /* xgettext:c-format */
1104 msg = _("%B(%A): internal error: unsupported relocation error");
1105 break;
1106
1107 case bfd_reloc_dangerous:
1108 /* xgettext:c-format */
1109 msg = _("%B(%A): internal error: dangerous relocation");
1110 break;
1111
1112 default:
1113 /* xgettext:c-format */
1114 msg = _("%B(%A): internal error: unknown error");
1115 break;
1116 }
1117
1118 if (msg)
1119 _bfd_error_handler (msg, input_bfd, input_section, name);
1120 }
1121 }
1122
1123 return TRUE;
1124 }
1125 \f
1126 /* Function to set the ELF flag bits. */
1127
1128 static bfd_boolean
1129 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1130 {
1131 elf_elfheader (abfd)->e_flags = flags;
1132 elf_flags_init (abfd) = TRUE;
1133 return TRUE;
1134 }
1135
1136 static bfd_boolean no_warn_mismatch = FALSE;
1137
1138 void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1139
1140 void
1141 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1142 {
1143 no_warn_mismatch = user_no_warn_mismatch;
1144 }
1145
1146 static const char *
1147 rl78_cpu_name (flagword flags)
1148 {
1149 switch (flags & E_FLAG_RL78_CPU_MASK)
1150 {
1151 default: return "";
1152 case E_FLAG_RL78_G10: return "G10";
1153 case E_FLAG_RL78_G13: return "G13";
1154 case E_FLAG_RL78_G14: return "G14";
1155 }
1156 }
1157
1158 /* Merge backend specific data from an object file to the output
1159 object file when linking. */
1160
1161 static bfd_boolean
1162 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
1163 {
1164 bfd *obfd = info->output_bfd;
1165 flagword new_flags;
1166 flagword old_flags;
1167 bfd_boolean error = FALSE;
1168
1169 new_flags = elf_elfheader (ibfd)->e_flags;
1170 old_flags = elf_elfheader (obfd)->e_flags;
1171
1172 if (!elf_flags_init (obfd))
1173 {
1174 /* First call, no flags set. */
1175 elf_flags_init (obfd) = TRUE;
1176 elf_elfheader (obfd)->e_flags = new_flags;
1177 }
1178 else if (old_flags != new_flags)
1179 {
1180 flagword changed_flags = old_flags ^ new_flags;
1181
1182 if (changed_flags & E_FLAG_RL78_CPU_MASK)
1183 {
1184 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1185 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
1186
1187 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1188 /* It does not matter what new_cpu may have. */;
1189 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1190 {
1191 if (in_cpu == E_FLAG_RL78_G10)
1192 {
1193 /* G10 files can only be linked with other G10 files.
1194 If the output is set to "any" this means that it is
1195 a G14 file that does not use hardware multiply/divide,
1196 but that is still incompatible with the G10 ABI. */
1197 error = TRUE;
1198
1199 _bfd_error_handler
1200 /* xgettext:c-format */
1201 (_("RL78 ABI conflict: G10 file %B cannot be linked"
1202 " with %s file %B"),
1203 ibfd, rl78_cpu_name (out_cpu), obfd);
1204 }
1205 else
1206 {
1207 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1208 old_flags |= in_cpu;
1209 elf_elfheader (obfd)->e_flags = old_flags;
1210 }
1211 }
1212 else
1213 {
1214 error = TRUE;
1215
1216 _bfd_error_handler
1217 /* xgettext:c-format */
1218 (_("RL78 ABI conflict: cannot link %s file %B with %s file %B"),
1219 rl78_cpu_name (in_cpu), ibfd,
1220 rl78_cpu_name (out_cpu), obfd);
1221 }
1222 }
1223
1224 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1225 {
1226 _bfd_error_handler
1227 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1228
1229 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1230 /* xgettext:c-format */
1231 _bfd_error_handler (_("- %B is 64-bit, %B is not"),
1232 obfd, ibfd);
1233 else
1234 /* xgettext:c-format */
1235 _bfd_error_handler (_("- %B is 64-bit, %B is not"),
1236 ibfd, obfd);
1237 error = TRUE;
1238 }
1239 }
1240
1241 return !error;
1242 }
1243 \f
1244 static bfd_boolean
1245 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1246 {
1247 FILE * file = (FILE *) ptr;
1248 flagword flags;
1249
1250 BFD_ASSERT (abfd != NULL && ptr != NULL);
1251
1252 /* Print normal ELF private data. */
1253 _bfd_elf_print_private_bfd_data (abfd, ptr);
1254
1255 flags = elf_elfheader (abfd)->e_flags;
1256 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1257
1258 if (flags & E_FLAG_RL78_CPU_MASK)
1259 fprintf (file, " [%s]", rl78_cpu_name (flags));
1260
1261 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1262 fprintf (file, _(" [64-bit doubles]"));
1263
1264 fputc ('\n', file);
1265 return TRUE;
1266 }
1267
1268 /* Return the MACH for an e_flags value. */
1269
1270 static int
1271 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
1272 {
1273 return bfd_mach_rl78;
1274 }
1275
1276 static bfd_boolean
1277 rl78_elf_object_p (bfd * abfd)
1278 {
1279 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1280 elf32_rl78_machine (abfd));
1281 return TRUE;
1282 }
1283 \f
1284 /* support PLT for 16-bit references to 24-bit functions. */
1285
1286 /* We support 16-bit pointers to code above 64k by generating a thunk
1287 below 64k containing a JMP instruction to the final address. */
1288
1289 static bfd_boolean
1290 rl78_elf_check_relocs
1291 (bfd * abfd,
1292 struct bfd_link_info * info,
1293 asection * sec,
1294 const Elf_Internal_Rela * relocs)
1295 {
1296 Elf_Internal_Shdr * symtab_hdr;
1297 struct elf_link_hash_entry ** sym_hashes;
1298 const Elf_Internal_Rela * rel;
1299 const Elf_Internal_Rela * rel_end;
1300 bfd_vma *local_plt_offsets;
1301 asection *splt;
1302 bfd *dynobj;
1303
1304 if (bfd_link_relocatable (info))
1305 return TRUE;
1306
1307 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1308 sym_hashes = elf_sym_hashes (abfd);
1309 local_plt_offsets = elf_local_got_offsets (abfd);
1310 dynobj = elf_hash_table(info)->dynobj;
1311
1312 rel_end = relocs + sec->reloc_count;
1313 for (rel = relocs; rel < rel_end; rel++)
1314 {
1315 struct elf_link_hash_entry *h;
1316 unsigned long r_symndx;
1317 bfd_vma *offset;
1318
1319 r_symndx = ELF32_R_SYM (rel->r_info);
1320 if (r_symndx < symtab_hdr->sh_info)
1321 h = NULL;
1322 else
1323 {
1324 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1325 while (h->root.type == bfd_link_hash_indirect
1326 || h->root.type == bfd_link_hash_warning)
1327 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1328 }
1329
1330 switch (ELF32_R_TYPE (rel->r_info))
1331 {
1332 /* This relocation describes a 16-bit pointer to a function.
1333 We may need to allocate a thunk in low memory; reserve memory
1334 for it now. */
1335 case R_RL78_DIR16S:
1336 if (dynobj == NULL)
1337 elf_hash_table (info)->dynobj = dynobj = abfd;
1338 splt = elf_hash_table (info)->splt;
1339 if (splt == NULL)
1340 {
1341 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1342 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1343 | SEC_READONLY | SEC_CODE);
1344 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1345 flags);
1346 elf_hash_table (info)->splt = splt;
1347 if (splt == NULL
1348 || ! bfd_set_section_alignment (dynobj, splt, 1))
1349 return FALSE;
1350 }
1351
1352 if (h != NULL)
1353 offset = &h->plt.offset;
1354 else
1355 {
1356 if (local_plt_offsets == NULL)
1357 {
1358 size_t size;
1359 unsigned int i;
1360
1361 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1362 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1363 if (local_plt_offsets == NULL)
1364 return FALSE;
1365 elf_local_got_offsets (abfd) = local_plt_offsets;
1366
1367 for (i = 0; i < symtab_hdr->sh_info; i++)
1368 local_plt_offsets[i] = (bfd_vma) -1;
1369 }
1370 offset = &local_plt_offsets[r_symndx];
1371 }
1372
1373 if (*offset == (bfd_vma) -1)
1374 {
1375 *offset = splt->size;
1376 splt->size += 4;
1377 }
1378 break;
1379 }
1380 }
1381
1382 return TRUE;
1383 }
1384
1385 /* This must exist if dynobj is ever set. */
1386
1387 static bfd_boolean
1388 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1389 struct bfd_link_info *info)
1390 {
1391 bfd *dynobj;
1392 asection *splt;
1393
1394 if (!elf_hash_table (info)->dynamic_sections_created)
1395 return TRUE;
1396
1397 /* As an extra sanity check, verify that all plt entries have been
1398 filled in. However, relaxing might have changed the relocs so
1399 that some plt entries don't get filled in, so we have to skip
1400 this check if we're relaxing. Unfortunately, check_relocs is
1401 called before relaxation. */
1402
1403 if (info->relax_trip > 0)
1404 return TRUE;
1405
1406 dynobj = elf_hash_table (info)->dynobj;
1407 splt = elf_hash_table (info)->splt;
1408 if (dynobj != NULL && splt != NULL)
1409 {
1410 bfd_byte *contents = splt->contents;
1411 unsigned int i, size = splt->size;
1412
1413 for (i = 0; i < size; i += 4)
1414 {
1415 unsigned int x = bfd_get_32 (dynobj, contents + i);
1416 BFD_ASSERT (x != 0);
1417 }
1418 }
1419
1420 return TRUE;
1421 }
1422
1423 static bfd_boolean
1424 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1425 struct bfd_link_info *info)
1426 {
1427 bfd *dynobj;
1428 asection *splt;
1429
1430 if (bfd_link_relocatable (info))
1431 return TRUE;
1432
1433 dynobj = elf_hash_table (info)->dynobj;
1434 if (dynobj == NULL)
1435 return TRUE;
1436
1437 splt = elf_hash_table (info)->splt;
1438 BFD_ASSERT (splt != NULL);
1439
1440 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1441 if (splt->contents == NULL)
1442 return FALSE;
1443
1444 return TRUE;
1445 }
1446
1447 \f
1448
1449 /* Handle relaxing. */
1450
1451 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1452 is within the low 64k, remove any entry for it in the plt. */
1453
1454 struct relax_plt_data
1455 {
1456 asection *splt;
1457 bfd_boolean *again;
1458 };
1459
1460 static bfd_boolean
1461 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
1462 {
1463 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1464
1465 if (h->plt.offset != (bfd_vma) -1)
1466 {
1467 bfd_vma address;
1468
1469 if (h->root.type == bfd_link_hash_undefined
1470 || h->root.type == bfd_link_hash_undefweak)
1471 address = 0;
1472 else
1473 address = (h->root.u.def.section->output_section->vma
1474 + h->root.u.def.section->output_offset
1475 + h->root.u.def.value);
1476
1477 if (valid_16bit_address (address))
1478 {
1479 h->plt.offset = -1;
1480 data->splt->size -= 4;
1481 *data->again = TRUE;
1482 }
1483 }
1484
1485 return TRUE;
1486 }
1487
1488 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1489 previously had a plt entry, give it a new entry offset. */
1490
1491 static bfd_boolean
1492 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
1493 {
1494 bfd_vma *entry = (bfd_vma *) xdata;
1495
1496 if (h->plt.offset != (bfd_vma) -1)
1497 {
1498 h->plt.offset = *entry;
1499 *entry += 4;
1500 }
1501
1502 return TRUE;
1503 }
1504
1505 static bfd_boolean
1506 rl78_elf_relax_plt_section (bfd *dynobj,
1507 asection *splt,
1508 struct bfd_link_info *info,
1509 bfd_boolean *again)
1510 {
1511 struct relax_plt_data relax_plt_data;
1512 bfd *ibfd;
1513
1514 /* Assume nothing changes. */
1515 *again = FALSE;
1516
1517 if (bfd_link_relocatable (info))
1518 return TRUE;
1519
1520 /* We only relax the .plt section at the moment. */
1521 if (dynobj != elf_hash_table (info)->dynobj
1522 || strcmp (splt->name, ".plt") != 0)
1523 return TRUE;
1524
1525 /* Quick check for an empty plt. */
1526 if (splt->size == 0)
1527 return TRUE;
1528
1529 /* Map across all global symbols; see which ones happen to
1530 fall in the low 64k. */
1531 relax_plt_data.splt = splt;
1532 relax_plt_data.again = again;
1533 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1534 &relax_plt_data);
1535
1536 /* Likewise for local symbols, though that's somewhat less convenient
1537 as we have to walk the list of input bfds and swap in symbol data. */
1538 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1539 {
1540 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1541 Elf_Internal_Shdr *symtab_hdr;
1542 Elf_Internal_Sym *isymbuf = NULL;
1543 unsigned int idx;
1544
1545 if (! local_plt_offsets)
1546 continue;
1547
1548 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1549 if (symtab_hdr->sh_info != 0)
1550 {
1551 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1552 if (isymbuf == NULL)
1553 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1554 symtab_hdr->sh_info, 0,
1555 NULL, NULL, NULL);
1556 if (isymbuf == NULL)
1557 return FALSE;
1558 }
1559
1560 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1561 {
1562 Elf_Internal_Sym *isym;
1563 asection *tsec;
1564 bfd_vma address;
1565
1566 if (local_plt_offsets[idx] == (bfd_vma) -1)
1567 continue;
1568
1569 isym = &isymbuf[idx];
1570 if (isym->st_shndx == SHN_UNDEF)
1571 continue;
1572 else if (isym->st_shndx == SHN_ABS)
1573 tsec = bfd_abs_section_ptr;
1574 else if (isym->st_shndx == SHN_COMMON)
1575 tsec = bfd_com_section_ptr;
1576 else
1577 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1578
1579 address = (tsec->output_section->vma
1580 + tsec->output_offset
1581 + isym->st_value);
1582 if (valid_16bit_address (address))
1583 {
1584 local_plt_offsets[idx] = -1;
1585 splt->size -= 4;
1586 *again = TRUE;
1587 }
1588 }
1589
1590 if (isymbuf != NULL
1591 && symtab_hdr->contents != (unsigned char *) isymbuf)
1592 {
1593 if (! info->keep_memory)
1594 free (isymbuf);
1595 else
1596 {
1597 /* Cache the symbols for elf_link_input_bfd. */
1598 symtab_hdr->contents = (unsigned char *) isymbuf;
1599 }
1600 }
1601 }
1602
1603 /* If we changed anything, walk the symbols again to reallocate
1604 .plt entry addresses. */
1605 if (*again && splt->size > 0)
1606 {
1607 bfd_vma entry = 0;
1608
1609 elf_link_hash_traverse (elf_hash_table (info),
1610 rl78_relax_plt_realloc, &entry);
1611
1612 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1613 {
1614 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1615 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1616 unsigned int idx;
1617
1618 if (! local_plt_offsets)
1619 continue;
1620
1621 for (idx = 0; idx < nlocals; ++idx)
1622 if (local_plt_offsets[idx] != (bfd_vma) -1)
1623 {
1624 local_plt_offsets[idx] = entry;
1625 entry += 4;
1626 }
1627 }
1628 }
1629
1630 return TRUE;
1631 }
1632
1633 /* Delete some bytes from a section while relaxing. */
1634
1635 static bfd_boolean
1636 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1637 Elf_Internal_Rela *alignment_rel, int force_snip)
1638 {
1639 Elf_Internal_Shdr * symtab_hdr;
1640 unsigned int sec_shndx;
1641 bfd_byte * contents;
1642 Elf_Internal_Rela * irel;
1643 Elf_Internal_Rela * irelend;
1644 Elf_Internal_Sym * isym;
1645 Elf_Internal_Sym * isymend;
1646 bfd_vma toaddr;
1647 unsigned int symcount;
1648 struct elf_link_hash_entry ** sym_hashes;
1649 struct elf_link_hash_entry ** end_hashes;
1650
1651 if (!alignment_rel)
1652 force_snip = 1;
1653
1654 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1655
1656 contents = elf_section_data (sec)->this_hdr.contents;
1657
1658 /* The deletion must stop at the next alignment boundary, if
1659 ALIGNMENT_REL is non-NULL. */
1660 toaddr = sec->size;
1661 if (alignment_rel)
1662 toaddr = alignment_rel->r_offset;
1663
1664 irel = elf_section_data (sec)->relocs;
1665 if (irel == NULL)
1666 {
1667 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1668 irel = elf_section_data (sec)->relocs;
1669 }
1670
1671 irelend = irel + sec->reloc_count;
1672
1673 /* Actually delete the bytes. */
1674 memmove (contents + addr, contents + addr + count,
1675 (size_t) (toaddr - addr - count));
1676
1677 /* If we don't have an alignment marker to worry about, we can just
1678 shrink the section. Otherwise, we have to fill in the newly
1679 created gap with NOP insns (0x03). */
1680 if (force_snip)
1681 sec->size -= count;
1682 else
1683 memset (contents + toaddr - count, 0x03, count);
1684
1685 /* Adjust all the relocs. */
1686 for (; irel && irel < irelend; irel++)
1687 {
1688 /* Get the new reloc address. */
1689 if (irel->r_offset > addr
1690 && (irel->r_offset < toaddr
1691 || (force_snip && irel->r_offset == toaddr)))
1692 irel->r_offset -= count;
1693
1694 /* If we see an ALIGN marker at the end of the gap, we move it
1695 to the beginning of the gap, since marking these gaps is what
1696 they're for. */
1697 if (irel->r_offset == toaddr
1698 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1699 && irel->r_addend & RL78_RELAXA_ALIGN)
1700 irel->r_offset -= count;
1701 }
1702
1703 /* Adjust the local symbols defined in this section. */
1704 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1705 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1706 isymend = isym + symtab_hdr->sh_info;
1707
1708 for (; isym < isymend; isym++)
1709 {
1710 /* If the symbol is in the range of memory we just moved, we
1711 have to adjust its value. */
1712 if (isym->st_shndx == sec_shndx
1713 && isym->st_value > addr
1714 && isym->st_value < toaddr)
1715 isym->st_value -= count;
1716
1717 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1718 *end* is in the moved bytes but it's *start* isn't), then we
1719 must adjust its size. */
1720 if (isym->st_shndx == sec_shndx
1721 && isym->st_value < addr
1722 && isym->st_value + isym->st_size > addr
1723 && isym->st_value + isym->st_size < toaddr)
1724 isym->st_size -= count;
1725 }
1726
1727 /* Now adjust the global symbols defined in this section. */
1728 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1729 - symtab_hdr->sh_info);
1730 sym_hashes = elf_sym_hashes (abfd);
1731 end_hashes = sym_hashes + symcount;
1732
1733 for (; sym_hashes < end_hashes; sym_hashes++)
1734 {
1735 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1736
1737 if ((sym_hash->root.type == bfd_link_hash_defined
1738 || sym_hash->root.type == bfd_link_hash_defweak)
1739 && sym_hash->root.u.def.section == sec)
1740 {
1741 /* As above, adjust the value if needed. */
1742 if (sym_hash->root.u.def.value > addr
1743 && sym_hash->root.u.def.value < toaddr)
1744 sym_hash->root.u.def.value -= count;
1745
1746 /* As above, adjust the size if needed. */
1747 if (sym_hash->root.u.def.value < addr
1748 && sym_hash->root.u.def.value + sym_hash->size > addr
1749 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1750 sym_hash->size -= count;
1751 }
1752 }
1753
1754 return TRUE;
1755 }
1756
1757 /* Used to sort relocs by address. If relocs have the same address,
1758 we maintain their relative order, except that R_RL78_RH_RELAX
1759 alignment relocs must be the first reloc for any given address. */
1760
1761 static void
1762 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1763 {
1764 int i;
1765 bfd_boolean again;
1766 bfd_boolean swappit;
1767
1768 /* This is almost a classic bubblesort. It's the slowest sort, but
1769 we're taking advantage of the fact that the relocations are
1770 mostly in order already (the assembler emits them that way) and
1771 we need relocs with the same address to remain in the same
1772 relative order. */
1773 again = TRUE;
1774 while (again)
1775 {
1776 again = FALSE;
1777 for (i = 0; i < count - 1; i ++)
1778 {
1779 if (r[i].r_offset > r[i + 1].r_offset)
1780 swappit = TRUE;
1781 else if (r[i].r_offset < r[i + 1].r_offset)
1782 swappit = FALSE;
1783 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1784 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1785 swappit = TRUE;
1786 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1787 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1788 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1789 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1790 swappit = TRUE;
1791 else
1792 swappit = FALSE;
1793
1794 if (swappit)
1795 {
1796 Elf_Internal_Rela tmp;
1797
1798 tmp = r[i];
1799 r[i] = r[i + 1];
1800 r[i + 1] = tmp;
1801 /* If we do move a reloc back, re-scan to see if it
1802 needs to be moved even further back. This avoids
1803 most of the O(n^2) behavior for our cases. */
1804 if (i > 0)
1805 i -= 2;
1806 again = TRUE;
1807 }
1808 }
1809 }
1810 }
1811
1812
1813 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1814 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1815 lrel, abfd, sec, link_info, scale)
1816
1817 static bfd_vma
1818 rl78_offset_for_reloc (bfd * abfd,
1819 Elf_Internal_Rela * rel,
1820 Elf_Internal_Shdr * symtab_hdr,
1821 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1822 Elf_Internal_Sym * intsyms,
1823 Elf_Internal_Rela ** lrel,
1824 bfd * input_bfd,
1825 asection * input_section,
1826 struct bfd_link_info * info,
1827 int * scale)
1828 {
1829 bfd_vma symval;
1830
1831 *scale = 1;
1832
1833 /* REL is the first of 1..N relocations. We compute the symbol
1834 value for each relocation, then combine them if needed. LREL
1835 gets a pointer to the last relocation used. */
1836 while (1)
1837 {
1838 unsigned long r_type;
1839
1840 /* Get the value of the symbol referred to by the reloc. */
1841 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1842 {
1843 /* A local symbol. */
1844 Elf_Internal_Sym *isym;
1845 asection *ssec;
1846
1847 isym = intsyms + ELF32_R_SYM (rel->r_info);
1848
1849 if (isym->st_shndx == SHN_UNDEF)
1850 ssec = bfd_und_section_ptr;
1851 else if (isym->st_shndx == SHN_ABS)
1852 ssec = bfd_abs_section_ptr;
1853 else if (isym->st_shndx == SHN_COMMON)
1854 ssec = bfd_com_section_ptr;
1855 else
1856 ssec = bfd_section_from_elf_index (abfd,
1857 isym->st_shndx);
1858
1859 /* Initial symbol value. */
1860 symval = isym->st_value;
1861
1862 /* GAS may have made this symbol relative to a section, in
1863 which case, we have to add the addend to find the
1864 symbol. */
1865 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1866 symval += rel->r_addend;
1867
1868 if (ssec)
1869 {
1870 if ((ssec->flags & SEC_MERGE)
1871 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1872 symval = _bfd_merged_section_offset (abfd, & ssec,
1873 elf_section_data (ssec)->sec_info,
1874 symval);
1875 }
1876
1877 /* Now make the offset relative to where the linker is putting it. */
1878 if (ssec)
1879 symval +=
1880 ssec->output_section->vma + ssec->output_offset;
1881
1882 symval += rel->r_addend;
1883 }
1884 else
1885 {
1886 unsigned long indx;
1887 struct elf_link_hash_entry * h;
1888
1889 /* An external symbol. */
1890 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1891 h = elf_sym_hashes (abfd)[indx];
1892 BFD_ASSERT (h != NULL);
1893
1894 if (h->root.type != bfd_link_hash_defined
1895 && h->root.type != bfd_link_hash_defweak)
1896 {
1897 /* This appears to be a reference to an undefined
1898 symbol. Just ignore it--it will be caught by the
1899 regular reloc processing. */
1900 if (lrel)
1901 *lrel = rel;
1902 return 0;
1903 }
1904
1905 symval = (h->root.u.def.value
1906 + h->root.u.def.section->output_section->vma
1907 + h->root.u.def.section->output_offset);
1908
1909 symval += rel->r_addend;
1910 }
1911
1912 r_type = ELF32_R_TYPE (rel->r_info);
1913 switch (r_type)
1914 {
1915 case R_RL78_SYM:
1916 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1917 break;
1918
1919 case R_RL78_OPromtop:
1920 symval = get_romstart (info, input_bfd, input_section, rel->r_offset);
1921 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1922 break;
1923
1924 case R_RL78_OPramtop:
1925 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1926 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1927 break;
1928
1929 case R_RL78_OPneg:
1930 case R_RL78_OPadd:
1931 case R_RL78_OPsub:
1932 case R_RL78_OPmul:
1933 case R_RL78_OPdiv:
1934 case R_RL78_OPshla:
1935 case R_RL78_OPshra:
1936 case R_RL78_OPsctsize:
1937 case R_RL78_OPscttop:
1938 case R_RL78_OPand:
1939 case R_RL78_OPor:
1940 case R_RL78_OPxor:
1941 case R_RL78_OPnot:
1942 case R_RL78_OPmod:
1943 (void) rl78_compute_complex_reloc (r_type, 0, input_section);
1944 break;
1945
1946 case R_RL78_DIR16UL:
1947 case R_RL78_DIR8UL:
1948 case R_RL78_ABS16UL:
1949 case R_RL78_ABS8UL:
1950 *scale = 4;
1951 goto reloc_computes_value;
1952
1953 case R_RL78_DIR16UW:
1954 case R_RL78_DIR8UW:
1955 case R_RL78_ABS16UW:
1956 case R_RL78_ABS8UW:
1957 *scale = 2;
1958 goto reloc_computes_value;
1959
1960 default:
1961 reloc_computes_value:
1962 symval = rl78_compute_complex_reloc (r_type, symval, input_section);
1963 /* Fall through. */
1964 case R_RL78_DIR32:
1965 case R_RL78_DIR24S:
1966 case R_RL78_DIR16:
1967 case R_RL78_DIR16U:
1968 case R_RL78_DIR16S:
1969 case R_RL78_DIR24S_PCREL:
1970 case R_RL78_DIR16S_PCREL:
1971 case R_RL78_DIR8S_PCREL:
1972 if (lrel)
1973 *lrel = rel;
1974 return symval;
1975 }
1976
1977 rel ++;
1978 }
1979 }
1980
1981 struct {
1982 int prefix; /* or -1 for "no prefix" */
1983 int insn; /* or -1 for "end of list" */
1984 int insn_for_saddr; /* or -1 for "no alternative" */
1985 int insn_for_sfr; /* or -1 for "no alternative" */
1986 } relax_addr16[] = {
1987 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1988 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1989 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1990 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1991
1992 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1993 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1994 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1995 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1996 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1997 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1998 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1999 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
2000
2001 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
2002 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
2003 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
2004 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
2005 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
2006
2007 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
2008 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
2009 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
2010 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
2011
2012 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
2013 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
2014 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
2015
2016 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
2017 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
2018 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
2019 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
2020 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
2021 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
2022
2023 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
2024
2025 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
2026 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
2027 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
2028 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
2029 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
2030 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
2031 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
2032 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
2033
2034 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
2035 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
2036 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
2037 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
2038 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
2039 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
2040 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
2041 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
2042
2043 { -1, -1, -1, -1 }
2044 };
2045
2046 /* Relax one section. */
2047
2048 static bfd_boolean
2049 rl78_elf_relax_section
2050 (bfd * abfd,
2051 asection * sec,
2052 struct bfd_link_info * link_info,
2053 bfd_boolean * again)
2054 {
2055 Elf_Internal_Shdr * symtab_hdr;
2056 Elf_Internal_Shdr * shndx_hdr;
2057 Elf_Internal_Rela * internal_relocs;
2058 Elf_Internal_Rela * free_relocs = NULL;
2059 Elf_Internal_Rela * irel;
2060 Elf_Internal_Rela * srel;
2061 Elf_Internal_Rela * irelend;
2062 Elf_Internal_Rela * next_alignment;
2063 bfd_byte * contents = NULL;
2064 bfd_byte * free_contents = NULL;
2065 Elf_Internal_Sym * intsyms = NULL;
2066 Elf_Internal_Sym * free_intsyms = NULL;
2067 Elf_External_Sym_Shndx * shndx_buf = NULL;
2068 bfd_vma pc;
2069 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2070 int pcrel ATTRIBUTE_UNUSED = 0;
2071 int code ATTRIBUTE_UNUSED = 0;
2072 int section_alignment_glue;
2073 int scale;
2074
2075 if (abfd == elf_hash_table (link_info)->dynobj
2076 && strcmp (sec->name, ".plt") == 0)
2077 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2078
2079 /* Assume nothing changes. */
2080 *again = FALSE;
2081
2082 /* We don't have to do anything for a relocatable link, if
2083 this section does not have relocs, or if this is not a
2084 code section. */
2085 if (bfd_link_relocatable (link_info)
2086 || (sec->flags & SEC_RELOC) == 0
2087 || sec->reloc_count == 0
2088 || (sec->flags & SEC_CODE) == 0)
2089 return TRUE;
2090
2091 symtab_hdr = & elf_symtab_hdr (abfd);
2092 if (elf_symtab_shndx_list (abfd))
2093 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2094 else
2095 shndx_hdr = NULL;
2096
2097 /* Get the section contents. */
2098 if (elf_section_data (sec)->this_hdr.contents != NULL)
2099 contents = elf_section_data (sec)->this_hdr.contents;
2100 /* Go get them off disk. */
2101 else
2102 {
2103 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2104 goto error_return;
2105 elf_section_data (sec)->this_hdr.contents = contents;
2106 }
2107
2108 /* Read this BFD's symbols. */
2109 /* Get cached copy if it exists. */
2110 if (symtab_hdr->contents != NULL)
2111 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2112 else
2113 {
2114 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2115 symtab_hdr->contents = (bfd_byte *) intsyms;
2116 }
2117
2118 if (shndx_hdr && shndx_hdr->sh_size != 0)
2119 {
2120 bfd_size_type amt;
2121
2122 amt = symtab_hdr->sh_info;
2123 amt *= sizeof (Elf_External_Sym_Shndx);
2124 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2125 if (shndx_buf == NULL)
2126 goto error_return;
2127 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2128 || bfd_bread (shndx_buf, amt, abfd) != amt)
2129 goto error_return;
2130 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2131 }
2132
2133 /* Get a copy of the native relocations. */
2134 internal_relocs = (_bfd_elf_link_read_relocs
2135 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
2136 link_info->keep_memory));
2137 if (internal_relocs == NULL)
2138 goto error_return;
2139 if (! link_info->keep_memory)
2140 free_relocs = internal_relocs;
2141
2142 /* The RL_ relocs must be just before the operand relocs they go
2143 with, so we must sort them to guarantee this. We use bubblesort
2144 instead of qsort so we can guarantee that relocs with the same
2145 address remain in the same relative order. */
2146 reloc_bubblesort (internal_relocs, sec->reloc_count);
2147
2148 /* Walk through them looking for relaxing opportunities. */
2149 irelend = internal_relocs + sec->reloc_count;
2150
2151
2152 /* This will either be NULL or a pointer to the next alignment
2153 relocation. */
2154 next_alignment = internal_relocs;
2155
2156 /* We calculate worst case shrinkage caused by alignment directives.
2157 No fool-proof, but better than either ignoring the problem or
2158 doing heavy duty analysis of all the alignment markers in all
2159 input sections. */
2160 section_alignment_glue = 0;
2161 for (irel = internal_relocs; irel < irelend; irel++)
2162 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2163 && irel->r_addend & RL78_RELAXA_ALIGN)
2164 {
2165 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2166
2167 if (section_alignment_glue < this_glue)
2168 section_alignment_glue = this_glue;
2169 }
2170 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2171 shrinkage. */
2172 section_alignment_glue *= 2;
2173
2174 for (irel = internal_relocs; irel < irelend; irel++)
2175 {
2176 unsigned char *insn;
2177 int nrelocs;
2178
2179 /* The insns we care about are all marked with one of these. */
2180 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2181 continue;
2182
2183 if (irel->r_addend & RL78_RELAXA_ALIGN
2184 || next_alignment == internal_relocs)
2185 {
2186 /* When we delete bytes, we need to maintain all the alignments
2187 indicated. In addition, we need to be careful about relaxing
2188 jumps across alignment boundaries - these displacements
2189 *grow* when we delete bytes. For now, don't shrink
2190 displacements across an alignment boundary, just in case.
2191 Note that this only affects relocations to the same
2192 section. */
2193 next_alignment += 2;
2194 while (next_alignment < irelend
2195 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2196 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2197 next_alignment ++;
2198 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2199 next_alignment = NULL;
2200 }
2201
2202 /* When we hit alignment markers, see if we've shrunk enough
2203 before them to reduce the gap without violating the alignment
2204 requirements. */
2205 if (irel->r_addend & RL78_RELAXA_ALIGN)
2206 {
2207 /* At this point, the next relocation *should* be the ELIGN
2208 end marker. */
2209 Elf_Internal_Rela *erel = irel + 1;
2210 unsigned int alignment, nbytes;
2211
2212 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2213 continue;
2214 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2215 continue;
2216
2217 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2218
2219 if (erel->r_offset - irel->r_offset < alignment)
2220 continue;
2221
2222 nbytes = erel->r_offset - irel->r_offset;
2223 nbytes /= alignment;
2224 nbytes *= alignment;
2225
2226 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2227 next_alignment, erel->r_offset == sec->size);
2228 *again = TRUE;
2229
2230 continue;
2231 }
2232
2233 if (irel->r_addend & RL78_RELAXA_ELIGN)
2234 continue;
2235
2236 insn = contents + irel->r_offset;
2237
2238 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2239
2240 /* At this point, we have an insn that is a candidate for linker
2241 relaxation. There are NRELOCS relocs following that may be
2242 relaxed, although each reloc may be made of more than one
2243 reloc entry (such as gp-rel symbols). */
2244
2245 /* Get the value of the symbol referred to by the reloc. Just
2246 in case this is the last reloc in the list, use the RL's
2247 addend to choose between this reloc (no addend) or the next
2248 (yes addend, which means at least one following reloc). */
2249
2250 /* srel points to the "current" reloction for this insn -
2251 actually the last reloc for a given operand, which is the one
2252 we need to update. We check the relaxations in the same
2253 order that the relocations happen, so we'll just push it
2254 along as we go. */
2255 srel = irel;
2256
2257 pc = sec->output_section->vma + sec->output_offset
2258 + srel->r_offset;
2259
2260 #define GET_RELOC \
2261 BFD_ASSERT (nrelocs > 0); \
2262 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2263 pcrel = symval - pc + srel->r_addend; \
2264 nrelocs --;
2265
2266 #define SNIPNR(offset, nbytes) \
2267 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2268
2269 #define SNIP(offset, nbytes, newtype) \
2270 SNIPNR (offset, nbytes); \
2271 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2272
2273 /* The order of these bit tests must match the order that the
2274 relocs appear in. Since we sorted those by offset, we can
2275 predict them. */
2276
2277 /*----------------------------------------------------------------------*/
2278 /* EF ad BR $rel8 pcrel
2279 ED al ah BR !abs16 abs
2280 EE al ah BR $!rel16 pcrel
2281 EC al ah as BR !!abs20 abs
2282
2283 FD al ah CALL !abs16 abs
2284 FE al ah CALL $!rel16 pcrel
2285 FC al ah as CALL !!abs20 abs
2286
2287 DC ad BC $rel8
2288 DE ad BNC $rel8
2289 DD ad BZ $rel8
2290 DF ad BNZ $rel8
2291 61 C3 ad BH $rel8
2292 61 D3 ad BNH $rel8
2293 61 C8 EF ad SKC ; BR $rel8
2294 61 D8 EF ad SKNC ; BR $rel8
2295 61 E8 EF ad SKZ ; BR $rel8
2296 61 F8 EF ad SKNZ ; BR $rel8
2297 61 E3 EF ad SKH ; BR $rel8
2298 61 F3 EF ad SKNH ; BR $rel8
2299 */
2300
2301 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
2302 {
2303 /* SKIP opcodes that skip non-branches will have a relax tag
2304 but no corresponding symbol to relax against; we just
2305 skip those. */
2306 if (irel->r_addend & RL78_RELAXA_RNUM)
2307 {
2308 GET_RELOC;
2309 }
2310
2311 switch (insn[0])
2312 {
2313 case 0xdc: /* BC */
2314 case 0xdd: /* BZ */
2315 case 0xde: /* BNC */
2316 case 0xdf: /* BNZ */
2317 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */
2318 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */
2319 {
2320 /* This is a "long" conditional as generated by gas:
2321 DC 03 EE ad.dr */
2322 if (pcrel < 127
2323 && pcrel > -127)
2324 {
2325 insn[0] ^= 0x02; /* invert conditional */
2326 SNIPNR (4, 1);
2327 SNIP (1, 2, R_RL78_DIR8S_PCREL);
2328 insn[1] = pcrel;
2329 *again = TRUE;
2330 }
2331 }
2332 break;
2333
2334 case 0xec: /* BR !!abs20 */
2335
2336 if (pcrel < 127
2337 && pcrel > -127)
2338 {
2339 insn[0] = 0xef;
2340 insn[1] = pcrel;
2341 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2342 *again = TRUE;
2343 }
2344 else if (symval < 65536)
2345 {
2346 insn[0] = 0xed;
2347 insn[1] = symval & 0xff;
2348 insn[2] = symval >> 8;
2349 SNIP (2, 1, R_RL78_DIR16U);
2350 *again = TRUE;
2351 }
2352 else if (pcrel < 32767
2353 && pcrel > -32767)
2354 {
2355 insn[0] = 0xee;
2356 insn[1] = pcrel & 0xff;
2357 insn[2] = pcrel >> 8;
2358 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2359 *again = TRUE;
2360 }
2361 break;
2362
2363 case 0xee: /* BR $!pcrel16 */
2364 case 0xed: /* BR $!abs16 */
2365 if (pcrel < 127
2366 && pcrel > -127)
2367 {
2368 insn[0] = 0xef;
2369 insn[1] = pcrel;
2370 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2371 *again = TRUE;
2372 }
2373 break;
2374
2375 case 0xfc: /* CALL !!abs20 */
2376 if (symval < 65536)
2377 {
2378 insn[0] = 0xfd;
2379 insn[1] = symval & 0xff;
2380 insn[2] = symval >> 8;
2381 SNIP (2, 1, R_RL78_DIR16U);
2382 *again = TRUE;
2383 }
2384 else if (pcrel < 32767
2385 && pcrel > -32767)
2386 {
2387 insn[0] = 0xfe;
2388 insn[1] = pcrel & 0xff;
2389 insn[2] = pcrel >> 8;
2390 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2391 *again = TRUE;
2392 }
2393 break;
2394
2395 case 0x61: /* PREFIX */
2396 /* For SKIP/BR, we change the BR opcode and delete the
2397 SKIP. That way, we don't have to find and change the
2398 relocation for the BR. */
2399 /* Note that, for the case where we're skipping some
2400 other insn, we have no "other" reloc but that's safe
2401 here anyway. */
2402 switch (insn[1])
2403 {
2404 case 0xd3: /* BNH */
2405 case 0xc3: /* BH */
2406 if (insn[2] == 0x03 && insn[3] == 0xee
2407 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */
2408 {
2409 /* Another long branch by gas:
2410 61 D3 03 EE ad.dr */
2411 if (pcrel < 127
2412 && pcrel > -127)
2413 {
2414 insn[1] ^= 0x10; /* invert conditional */
2415 SNIPNR (5, 1);
2416 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2417 insn[2] = pcrel;
2418 *again = TRUE;
2419 }
2420 }
2421 break;
2422
2423 case 0xc8: /* SKC */
2424 if (insn[2] == 0xef)
2425 {
2426 insn[2] = 0xde; /* BNC */
2427 SNIPNR (0, 2);
2428 }
2429 break;
2430
2431 case 0xd8: /* SKNC */
2432 if (insn[2] == 0xef)
2433 {
2434 insn[2] = 0xdc; /* BC */
2435 SNIPNR (0, 2);
2436 }
2437 break;
2438
2439 case 0xe8: /* SKZ */
2440 if (insn[2] == 0xef)
2441 {
2442 insn[2] = 0xdf; /* BNZ */
2443 SNIPNR (0, 2);
2444 }
2445 break;
2446
2447 case 0xf8: /* SKNZ */
2448 if (insn[2] == 0xef)
2449 {
2450 insn[2] = 0xdd; /* BZ */
2451 SNIPNR (0, 2);
2452 }
2453 break;
2454
2455 case 0xe3: /* SKH */
2456 if (insn[2] == 0xef)
2457 {
2458 insn[2] = 0xd3; /* BNH */
2459 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2460 }
2461 break;
2462
2463 case 0xf3: /* SKNH */
2464 if (insn[2] == 0xef)
2465 {
2466 insn[2] = 0xc3; /* BH */
2467 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2468 }
2469 break;
2470 }
2471 break;
2472 }
2473 }
2474
2475 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2476 && nrelocs > 0)
2477 {
2478 /*----------------------------------------------------------------------*/
2479 /* Some insns have both a 16-bit address operand and an 8-bit
2480 variant if the address is within a special range:
2481
2482 Address 16-bit operand SADDR range SFR range
2483 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2484 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2485
2486 The RELAX_ADDR16[] array has the insn encodings for the
2487 16-bit operand version, as well as the SFR and SADDR
2488 variants. We only need to replace the encodings and
2489 adjust the operand.
2490
2491 Note: we intentionally do not attempt to decode and skip
2492 any ES: prefix, as adding ES: means the addr16 (likely)
2493 no longer points to saddr/sfr space.
2494 */
2495
2496 int is_sfr;
2497 int is_saddr;
2498 int idx;
2499 int poff;
2500
2501 GET_RELOC;
2502
2503 if (0xffe20 <= symval && symval <= 0xfffff)
2504 {
2505
2506 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2507 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2508
2509 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2510 {
2511 if (relax_addr16[idx].prefix != -1
2512 && insn[0] == relax_addr16[idx].prefix
2513 && insn[1] == relax_addr16[idx].insn)
2514 {
2515 poff = 1;
2516 }
2517 else if (relax_addr16[idx].prefix == -1
2518 && insn[0] == relax_addr16[idx].insn)
2519 {
2520 poff = 0;
2521 }
2522 else
2523 continue;
2524
2525 /* We have a matched insn, and poff is 0 or 1 depending
2526 on the base pattern size. */
2527
2528 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2529 {
2530 insn[poff] = relax_addr16[idx].insn_for_sfr;
2531 SNIP (poff+2, 1, R_RL78_RH_SFR);
2532 }
2533
2534 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2535 {
2536 insn[poff] = relax_addr16[idx].insn_for_saddr;
2537 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2538 }
2539 }
2540 }
2541 }
2542 /*----------------------------------------------------------------------*/
2543 }
2544
2545 return TRUE;
2546
2547 error_return:
2548 if (free_relocs != NULL)
2549 free (free_relocs);
2550
2551 if (free_contents != NULL)
2552 free (free_contents);
2553
2554 if (shndx_buf != NULL)
2555 {
2556 shndx_hdr->contents = NULL;
2557 free (shndx_buf);
2558 }
2559
2560 if (free_intsyms != NULL)
2561 free (free_intsyms);
2562
2563 return TRUE;
2564 }
2565
2566 \f
2567
2568 #define ELF_ARCH bfd_arch_rl78
2569 #define ELF_MACHINE_CODE EM_RL78
2570 #define ELF_MAXPAGESIZE 0x1000
2571
2572 #define TARGET_LITTLE_SYM rl78_elf32_vec
2573 #define TARGET_LITTLE_NAME "elf32-rl78"
2574
2575 #define elf_info_to_howto_rel NULL
2576 #define elf_info_to_howto rl78_info_to_howto_rela
2577 #define elf_backend_object_p rl78_elf_object_p
2578 #define elf_backend_relocate_section rl78_elf_relocate_section
2579 #define elf_symbol_leading_char ('_')
2580 #define elf_backend_can_gc_sections 1
2581
2582 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2583 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2584 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2585 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2586 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2587
2588 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2589 #define elf_backend_check_relocs rl78_elf_check_relocs
2590 #define elf_backend_always_size_sections \
2591 rl78_elf_always_size_sections
2592 #define elf_backend_finish_dynamic_sections \
2593 rl78_elf_finish_dynamic_sections
2594
2595 #include "elf32-target.h"
GDB Binutils - Deliverables
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