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[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011-2018 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "bfd.h"
23 #include "bfd_stdint.h"
24 #include "libbfd.h"
25 #include "elf-bfd.h"
26 #include "elf/rl78.h"
27 #include "libiberty.h"
28
29 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
30
31 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
32 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
33 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
34
35 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
36 asection *, bfd *, char **);
37
38 /* FIXME: We could omit the SHIFT parameter, it is always zero. */
39 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
40 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
41 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
42
43 /* Note that the relocations around 0x7f are internal to this file;
44 feel free to move them as needed to avoid conflicts with published
45 relocation numbers. */
46
47 static reloc_howto_type rl78_elf_howto_table [] =
48 {
49 RL78REL (NONE, 3, 0, 0, dont, FALSE),
50 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
51 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
52 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
53 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
54 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
55 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
56 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
57 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
58 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
59 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
60 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
61 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
62 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
63 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
64 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
65 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
66 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
67 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
68
69 EMPTY_HOWTO (0x13),
70 EMPTY_HOWTO (0x14),
71 EMPTY_HOWTO (0x15),
72 EMPTY_HOWTO (0x16),
73 EMPTY_HOWTO (0x17),
74 EMPTY_HOWTO (0x18),
75 EMPTY_HOWTO (0x19),
76 EMPTY_HOWTO (0x1a),
77 EMPTY_HOWTO (0x1b),
78 EMPTY_HOWTO (0x1c),
79 EMPTY_HOWTO (0x1d),
80 EMPTY_HOWTO (0x1e),
81 EMPTY_HOWTO (0x1f),
82
83 EMPTY_HOWTO (0x20),
84 EMPTY_HOWTO (0x21),
85 EMPTY_HOWTO (0x22),
86 EMPTY_HOWTO (0x23),
87 EMPTY_HOWTO (0x24),
88 EMPTY_HOWTO (0x25),
89 EMPTY_HOWTO (0x26),
90 EMPTY_HOWTO (0x27),
91 EMPTY_HOWTO (0x28),
92 EMPTY_HOWTO (0x29),
93 EMPTY_HOWTO (0x2a),
94 EMPTY_HOWTO (0x2b),
95 EMPTY_HOWTO (0x2c),
96 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
97
98 EMPTY_HOWTO (0x2e),
99 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
100 EMPTY_HOWTO (0x30),
101 EMPTY_HOWTO (0x31),
102 EMPTY_HOWTO (0x32),
103 EMPTY_HOWTO (0x33),
104 EMPTY_HOWTO (0x34),
105 EMPTY_HOWTO (0x35),
106 EMPTY_HOWTO (0x36),
107 EMPTY_HOWTO (0x37),
108 EMPTY_HOWTO (0x38),
109 EMPTY_HOWTO (0x39),
110 EMPTY_HOWTO (0x3a),
111 EMPTY_HOWTO (0x3b),
112 EMPTY_HOWTO (0x3c),
113 EMPTY_HOWTO (0x3d),
114 EMPTY_HOWTO (0x3e),
115 EMPTY_HOWTO (0x3f),
116 EMPTY_HOWTO (0x40),
117
118 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
119 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
120 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
121 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
122 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
123 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
124 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
125 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
126 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
127 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
128 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
129 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
130 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
131 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
132 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
133 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
134 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
135
136 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
137
138 EMPTY_HOWTO (0x52),
139 EMPTY_HOWTO (0x53),
140 EMPTY_HOWTO (0x54),
141 EMPTY_HOWTO (0x55),
142 EMPTY_HOWTO (0x56),
143 EMPTY_HOWTO (0x57),
144 EMPTY_HOWTO (0x58),
145 EMPTY_HOWTO (0x59),
146 EMPTY_HOWTO (0x5a),
147 EMPTY_HOWTO (0x5b),
148 EMPTY_HOWTO (0x5c),
149 EMPTY_HOWTO (0x5d),
150 EMPTY_HOWTO (0x5e),
151 EMPTY_HOWTO (0x5f),
152 EMPTY_HOWTO (0x60),
153 EMPTY_HOWTO (0x61),
154 EMPTY_HOWTO (0x62),
155 EMPTY_HOWTO (0x63),
156 EMPTY_HOWTO (0x64),
157 EMPTY_HOWTO (0x65),
158 EMPTY_HOWTO (0x66),
159 EMPTY_HOWTO (0x67),
160 EMPTY_HOWTO (0x68),
161 EMPTY_HOWTO (0x69),
162 EMPTY_HOWTO (0x6a),
163 EMPTY_HOWTO (0x6b),
164 EMPTY_HOWTO (0x6c),
165 EMPTY_HOWTO (0x6d),
166 EMPTY_HOWTO (0x6e),
167 EMPTY_HOWTO (0x6f),
168 EMPTY_HOWTO (0x70),
169 EMPTY_HOWTO (0x71),
170 EMPTY_HOWTO (0x72),
171 EMPTY_HOWTO (0x73),
172 EMPTY_HOWTO (0x74),
173 EMPTY_HOWTO (0x75),
174 EMPTY_HOWTO (0x76),
175 EMPTY_HOWTO (0x77),
176
177 EMPTY_HOWTO (0x78),
178 EMPTY_HOWTO (0x79),
179 EMPTY_HOWTO (0x7a),
180 EMPTY_HOWTO (0x7b),
181 EMPTY_HOWTO (0x7c),
182 EMPTY_HOWTO (0x7d),
183 EMPTY_HOWTO (0x7e),
184 EMPTY_HOWTO (0x7f),
185
186 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
187 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
188 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
189 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
190 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
191 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
192 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
193 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
194 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
195 EMPTY_HOWTO (0x89),
196 EMPTY_HOWTO (0x8a),
197 EMPTY_HOWTO (0x8b),
198 EMPTY_HOWTO (0x8c),
199 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
200 EMPTY_HOWTO (0x8e),
201 EMPTY_HOWTO (0x8f),
202 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
203 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
204 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
205 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
206 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
207 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
208 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
209 };
210 \f
211 /* Map BFD reloc types to RL78 ELF reloc types. */
212
213 struct rl78_reloc_map
214 {
215 bfd_reloc_code_real_type bfd_reloc_val;
216 unsigned int rl78_reloc_val;
217 };
218
219 static const struct rl78_reloc_map rl78_reloc_map [] =
220 {
221 { BFD_RELOC_NONE, R_RL78_NONE },
222 { BFD_RELOC_8, R_RL78_DIR8S },
223 { BFD_RELOC_16, R_RL78_DIR16S },
224 { BFD_RELOC_24, R_RL78_DIR24S },
225 { BFD_RELOC_32, R_RL78_DIR32 },
226 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
227 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
228 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
229 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
230 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
231 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
232 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
233 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
234 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
235 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
236 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
237 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
238 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
239 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
240 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
241 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
242 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
243 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
244 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
245 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
246 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
247 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
248 };
249
250 static reloc_howto_type *
251 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
252 bfd_reloc_code_real_type code)
253 {
254 unsigned int i;
255
256 if (code == BFD_RELOC_RL78_32_OP)
257 return rl78_elf_howto_table + R_RL78_DIR32;
258
259 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
260 if (rl78_reloc_map [i].bfd_reloc_val == code)
261 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
262
263 return NULL;
264 }
265
266 static reloc_howto_type *
267 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
268 {
269 unsigned int i;
270
271 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
272 if (rl78_elf_howto_table[i].name != NULL
273 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
274 return rl78_elf_howto_table + i;
275
276 return NULL;
277 }
278
279 /* Set the howto pointer for an RL78 ELF reloc. */
280
281 static void
282 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
283 arelent * cache_ptr,
284 Elf_Internal_Rela * dst)
285 {
286 unsigned int r_type;
287
288 r_type = ELF32_R_TYPE (dst->r_info);
289 if (r_type >= (unsigned int) R_RL78_max)
290 {
291 /* xgettext:c-format */
292 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
293 abfd, r_type);
294 r_type = 0;
295 }
296 cache_ptr->howto = rl78_elf_howto_table + r_type;
297 }
298 \f
299 static bfd_vma
300 get_symbol_value (const char * name,
301 struct bfd_link_info * info,
302 bfd * input_bfd,
303 asection * input_section,
304 int offset)
305 {
306 struct bfd_link_hash_entry * h;
307
308 if (info == NULL)
309 return 0;
310
311 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
312
313 if (h == NULL
314 || (h->type != bfd_link_hash_defined
315 && h->type != bfd_link_hash_defweak))
316 {
317 (*info->callbacks->undefined_symbol)
318 (info, name, input_bfd, input_section, offset, TRUE);
319 return 0;
320 }
321
322 return (h->u.def.value
323 + h->u.def.section->output_section->vma
324 + h->u.def.section->output_offset);
325 }
326
327 static bfd_vma
328 get_romstart (struct bfd_link_info * info,
329 bfd * abfd,
330 asection * sec,
331 int offset)
332 {
333 static bfd_boolean cached = FALSE;
334 static bfd_vma cached_value = 0;
335
336 if (!cached)
337 {
338 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
339 cached = TRUE;
340 }
341 return cached_value;
342 }
343
344 static bfd_vma
345 get_ramstart (struct bfd_link_info * info,
346 bfd * abfd,
347 asection * sec,
348 int offset)
349 {
350 static bfd_boolean cached = FALSE;
351 static bfd_vma cached_value = 0;
352
353 if (!cached)
354 {
355 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
356 cached = TRUE;
357 }
358 return cached_value;
359 }
360
361 #define NUM_STACK_ENTRIES 16
362 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
363 static unsigned int rl78_stack_top;
364
365 #define RL78_STACK_PUSH(val) \
366 do \
367 { \
368 if (rl78_stack_top < NUM_STACK_ENTRIES) \
369 rl78_stack [rl78_stack_top ++] = (val); \
370 else \
371 _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
372 } \
373 while (0)
374
375 #define RL78_STACK_POP(dest) \
376 do \
377 { \
378 if (rl78_stack_top > 0) \
379 (dest) = rl78_stack [-- rl78_stack_top];\
380 else \
381 { \
382 _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
383 (dest) = 0; \
384 } \
385 } \
386 while (0)
387
388 /* Special handling for RL78 complex relocs. Returns the
389 value of the reloc, or 0 for relocs which do not generate
390 a result. SYMVAL is the value of the symbol for relocs
391 which use a symbolic argument. */
392
393 static bfd_vma
394 rl78_compute_complex_reloc (unsigned long r_type,
395 bfd_vma symval,
396 asection * input_section)
397 {
398 int32_t tmp1, tmp2;
399 bfd_vma relocation;
400
401 switch (r_type)
402 {
403 default:
404 return 0;
405
406 case R_RL78_ABS24S_PCREL:
407 case R_RL78_ABS16S_PCREL:
408 case R_RL78_ABS8S_PCREL:
409 RL78_STACK_POP (relocation);
410 relocation -= input_section->output_section->vma + input_section->output_offset;
411 return relocation;
412
413 case R_RL78_ABS32:
414 case R_RL78_ABS32_REV:
415 case R_RL78_ABS16:
416 case R_RL78_ABS16_REV:
417 case R_RL78_ABS16S:
418 case R_RL78_ABS16U:
419 case R_RL78_ABS8:
420 case R_RL78_ABS8U:
421 case R_RL78_ABS8S:
422 RL78_STACK_POP (relocation);
423 return relocation;
424
425 case R_RL78_ABS16UL:
426 case R_RL78_ABS8UL:
427 RL78_STACK_POP (relocation);
428 return relocation >> 2;
429
430 case R_RL78_ABS16UW:
431 case R_RL78_ABS8UW:
432 RL78_STACK_POP (relocation);
433 return relocation >> 1;
434
435 /* The rest of the relocs compute values and then push them onto the stack. */
436 case R_RL78_OPramtop:
437 case R_RL78_OPromtop:
438 case R_RL78_SYM:
439 RL78_STACK_PUSH (symval);
440 return 0;
441
442 case R_RL78_OPneg:
443 RL78_STACK_POP (tmp1);
444 tmp1 = - tmp1;
445 RL78_STACK_PUSH (tmp1);
446 return 0;
447
448 case R_RL78_OPadd:
449 RL78_STACK_POP (tmp2);
450 RL78_STACK_POP (tmp1);
451 tmp1 += tmp2;
452 RL78_STACK_PUSH (tmp1);
453 return 0;
454
455 case R_RL78_OPsub:
456 /* For the expression "A - B", the assembler pushes A,
457 then B, then OPSUB. So the first op we pop is B, not A. */
458 RL78_STACK_POP (tmp2); /* B */
459 RL78_STACK_POP (tmp1); /* A */
460 tmp1 -= tmp2; /* A - B */
461 RL78_STACK_PUSH (tmp1);
462 return 0;
463
464 case R_RL78_OPmul:
465 RL78_STACK_POP (tmp2);
466 RL78_STACK_POP (tmp1);
467 tmp1 *= tmp2;
468 RL78_STACK_PUSH (tmp1);
469 return 0;
470
471 case R_RL78_OPdiv:
472 RL78_STACK_POP (tmp2);
473 RL78_STACK_POP (tmp1);
474 tmp1 /= tmp2;
475 RL78_STACK_PUSH (tmp1);
476 return 0;
477
478 case R_RL78_OPshla:
479 RL78_STACK_POP (tmp2);
480 RL78_STACK_POP (tmp1);
481 tmp1 <<= tmp2;
482 RL78_STACK_PUSH (tmp1);
483 return 0;
484
485 case R_RL78_OPshra:
486 RL78_STACK_POP (tmp2);
487 RL78_STACK_POP (tmp1);
488 tmp1 >>= tmp2;
489 RL78_STACK_PUSH (tmp1);
490 return 0;
491
492 case R_RL78_OPsctsize:
493 RL78_STACK_PUSH (input_section->size);
494 return 0;
495
496 case R_RL78_OPscttop:
497 RL78_STACK_PUSH (input_section->output_section->vma);
498 return 0;
499
500 case R_RL78_OPand:
501 RL78_STACK_POP (tmp2);
502 RL78_STACK_POP (tmp1);
503 tmp1 &= tmp2;
504 RL78_STACK_PUSH (tmp1);
505 return 0;
506
507 case R_RL78_OPor:
508 RL78_STACK_POP (tmp2);
509 RL78_STACK_POP (tmp1);
510 tmp1 |= tmp2;
511 RL78_STACK_PUSH (tmp1);
512 return 0;
513
514 case R_RL78_OPxor:
515 RL78_STACK_POP (tmp2);
516 RL78_STACK_POP (tmp1);
517 tmp1 ^= tmp2;
518 RL78_STACK_PUSH (tmp1);
519 return 0;
520
521 case R_RL78_OPnot:
522 RL78_STACK_POP (tmp1);
523 tmp1 = ~ tmp1;
524 RL78_STACK_PUSH (tmp1);
525 return 0;
526
527 case R_RL78_OPmod:
528 RL78_STACK_POP (tmp2);
529 RL78_STACK_POP (tmp1);
530 tmp1 %= tmp2;
531 RL78_STACK_PUSH (tmp1);
532 return 0;
533 }
534 }
535
536 #undef RL78_STACK_PUSH
537 #undef RL78_STACK_POP
538
539 #define OP(i) (contents[reloc->address + (i)])
540
541 static bfd_reloc_status_type
542 rl78_special_reloc (bfd * input_bfd,
543 arelent * reloc,
544 asymbol * symbol,
545 void * data,
546 asection * input_section,
547 bfd * output_bfd ATTRIBUTE_UNUSED,
548 char ** error_message ATTRIBUTE_UNUSED)
549 {
550 bfd_reloc_status_type r = bfd_reloc_ok;
551 bfd_vma relocation = 0;
552 unsigned long r_type = reloc->howto->type;
553 bfd_byte * contents = data;
554
555 /* If necessary, compute the symbolic value of the relocation. */
556 switch (r_type)
557 {
558 case R_RL78_SYM:
559 relocation = (symbol->value
560 + symbol->section->output_section->vma
561 + symbol->section->output_offset
562 + reloc->addend);
563 break;
564
565 case R_RL78_OPromtop:
566 relocation = get_romstart (NULL, input_bfd, input_section,
567 reloc->address);
568 break;
569
570 case R_RL78_OPramtop:
571 relocation = get_ramstart (NULL, input_bfd, input_section,
572 reloc->address);
573 break;
574 }
575
576 /* Get the value of the relocation. */
577 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
578
579 /* If the relocation alters the contents of the section then apply it now.
580 Note - since this function is called from
581 bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
582 and not from the linker, we do not perform any range checking. The
583 clients who are calling us are only interested in some relocated section
584 contents, and not any linkage problems that might occur later. */
585 switch (r_type)
586 {
587 case R_RL78_ABS32:
588 OP (0) = relocation;
589 OP (1) = relocation >> 8;
590 OP (2) = relocation >> 16;
591 OP (3) = relocation >> 24;
592 break;
593
594 case R_RL78_ABS32_REV:
595 OP (3) = relocation;
596 OP (2) = relocation >> 8;
597 OP (1) = relocation >> 16;
598 OP (0) = relocation >> 24;
599 break;
600
601 case R_RL78_ABS24S_PCREL:
602 case R_RL78_ABS24S:
603 OP (0) = relocation;
604 OP (1) = relocation >> 8;
605 OP (2) = relocation >> 16;
606 break;
607
608 case R_RL78_ABS16_REV:
609 OP (1) = relocation;
610 OP (0) = relocation >> 8;
611 break;
612
613 case R_RL78_ABS16S_PCREL:
614 case R_RL78_ABS16:
615 case R_RL78_ABS16S:
616 case R_RL78_ABS16U:
617 case R_RL78_ABS16UL:
618 case R_RL78_ABS16UW:
619 OP (0) = relocation;
620 OP (1) = relocation >> 8;
621 break;
622
623 case R_RL78_ABS8S_PCREL:
624 case R_RL78_ABS8:
625 case R_RL78_ABS8U:
626 case R_RL78_ABS8UL:
627 case R_RL78_ABS8UW:
628 case R_RL78_ABS8S:
629 OP (0) = relocation;
630 break;
631
632 default:
633 break;
634 }
635
636 return r;
637 }
638
639 #undef OP
640 #define OP(i) (contents[rel->r_offset + (i)])
641
642 /* Relocate an RL78 ELF section.
643 There is some attempt to make this function usable for many architectures,
644 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
645 if only to serve as a learning tool.
646
647 The RELOCATE_SECTION function is called by the new ELF backend linker
648 to handle the relocations for a section.
649
650 The relocs are always passed as Rela structures; if the section
651 actually uses Rel structures, the r_addend field will always be
652 zero.
653
654 This function is responsible for adjusting the section contents as
655 necessary, and (if using Rela relocs and generating a relocatable
656 output file) adjusting the reloc addend as necessary.
657
658 This function does not have to worry about setting the reloc
659 address or the reloc symbol index.
660
661 LOCAL_SYMS is a pointer to the swapped in local symbols.
662
663 LOCAL_SECTIONS is an array giving the section in the input file
664 corresponding to the st_shndx field of each local symbol.
665
666 The global hash table entry for the global symbols can be found
667 via elf_sym_hashes (input_bfd).
668
669 When generating relocatable output, this function must handle
670 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
671 going to be the section symbol corresponding to the output
672 section, which means that the addend must be adjusted
673 accordingly. */
674
675 static bfd_boolean
676 rl78_elf_relocate_section
677 (bfd * output_bfd,
678 struct bfd_link_info * info,
679 bfd * input_bfd,
680 asection * input_section,
681 bfd_byte * contents,
682 Elf_Internal_Rela * relocs,
683 Elf_Internal_Sym * local_syms,
684 asection ** local_sections)
685 {
686 Elf_Internal_Shdr * symtab_hdr;
687 struct elf_link_hash_entry ** sym_hashes;
688 Elf_Internal_Rela * rel;
689 Elf_Internal_Rela * relend;
690 asection *splt;
691
692 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
693 sym_hashes = elf_sym_hashes (input_bfd);
694 relend = relocs + input_section->reloc_count;
695
696 splt = elf_hash_table (info)->splt;
697
698 for (rel = relocs; rel < relend; rel ++)
699 {
700 reloc_howto_type * howto;
701 unsigned long r_symndx;
702 Elf_Internal_Sym * sym;
703 asection * sec;
704 struct elf_link_hash_entry * h;
705 bfd_vma relocation;
706 bfd_reloc_status_type r;
707 const char * name = NULL;
708 bfd_boolean unresolved_reloc = TRUE;
709 int r_type;
710
711 r_type = ELF32_R_TYPE (rel->r_info);
712 r_symndx = ELF32_R_SYM (rel->r_info);
713
714 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
715 h = NULL;
716 sym = NULL;
717 sec = NULL;
718 relocation = 0;
719
720 if (r_symndx < symtab_hdr->sh_info)
721 {
722 sym = local_syms + r_symndx;
723 sec = local_sections [r_symndx];
724 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
725
726 name = bfd_elf_string_from_elf_section
727 (input_bfd, symtab_hdr->sh_link, sym->st_name);
728 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
729 }
730 else
731 {
732 bfd_boolean warned ATTRIBUTE_UNUSED;
733 bfd_boolean ignored ATTRIBUTE_UNUSED;
734
735 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
736 r_symndx, symtab_hdr, sym_hashes, h,
737 sec, relocation, unresolved_reloc,
738 warned, ignored);
739
740 name = h->root.root.string;
741 }
742
743 if (sec != NULL && discarded_section (sec))
744 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
745 rel, 1, relend, howto, 0, contents);
746
747 if (bfd_link_relocatable (info))
748 {
749 /* This is a relocatable link. We don't have to change
750 anything, unless the reloc is against a section symbol,
751 in which case we have to adjust according to where the
752 section symbol winds up in the output section. */
753 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
754 rel->r_addend += sec->output_offset;
755 continue;
756 }
757
758 switch (ELF32_R_TYPE (rel->r_info))
759 {
760 case R_RL78_DIR16S:
761 {
762 bfd_vma *plt_offset;
763
764 if (h != NULL)
765 plt_offset = &h->plt.offset;
766 else
767 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
768
769 if (! valid_16bit_address (relocation))
770 {
771 /* If this is the first time we've processed this symbol,
772 fill in the plt entry with the correct symbol address. */
773 if ((*plt_offset & 1) == 0)
774 {
775 unsigned int x;
776
777 x = 0x000000ec; /* br !!abs24 */
778 x |= (relocation << 8) & 0xffffff00;
779 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
780 *plt_offset |= 1;
781 }
782
783 relocation = (splt->output_section->vma
784 + splt->output_offset
785 + (*plt_offset & -2));
786 if (name)
787 {
788 char *newname = bfd_malloc (strlen(name)+5);
789 strcpy (newname, name);
790 strcat(newname, ".plt");
791 _bfd_generic_link_add_one_symbol (info,
792 input_bfd,
793 newname,
794 BSF_FUNCTION | BSF_WEAK,
795 splt,
796 (*plt_offset & -2),
797 0,
798 1,
799 0,
800 0);
801 }
802 }
803 }
804 break;
805 }
806
807 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
808 /* If the symbol is undefined and weak
809 then the relocation resolves to zero. */
810 relocation = 0;
811 else
812 {
813 if (howto->pc_relative)
814 {
815 relocation -= (input_section->output_section->vma
816 + input_section->output_offset
817 + rel->r_offset);
818 relocation -= bfd_get_reloc_size (howto);
819 }
820
821 relocation += rel->r_addend;
822 }
823
824 r = bfd_reloc_ok;
825
826 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
827
828 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
829 switch (r_type)
830 {
831 case R_RL78_NONE:
832 break;
833
834 case R_RL78_RH_RELAX:
835 break;
836
837 case R_RL78_DIR8S_PCREL:
838 RANGE (-128, 127);
839 OP (0) = relocation;
840 break;
841
842 case R_RL78_DIR8S:
843 RANGE (-128, 255);
844 OP (0) = relocation;
845 break;
846
847 case R_RL78_DIR8U:
848 RANGE (0, 255);
849 OP (0) = relocation;
850 break;
851
852 case R_RL78_DIR16S_PCREL:
853 RANGE (-32768, 32767);
854 OP (0) = relocation;
855 OP (1) = relocation >> 8;
856 break;
857
858 case R_RL78_DIR16S:
859 if ((relocation & 0xf0000) == 0xf0000)
860 relocation &= 0xffff;
861 RANGE (-32768, 65535);
862 OP (0) = relocation;
863 OP (1) = relocation >> 8;
864 break;
865
866 case R_RL78_DIR16U:
867 RANGE (0, 65536);
868 OP (0) = relocation;
869 OP (1) = relocation >> 8;
870 break;
871
872 case R_RL78_DIR16:
873 RANGE (-32768, 65536);
874 OP (0) = relocation;
875 OP (1) = relocation >> 8;
876 break;
877
878 case R_RL78_DIR16_REV:
879 RANGE (-32768, 65536);
880 OP (1) = relocation;
881 OP (0) = relocation >> 8;
882 break;
883
884 case R_RL78_DIR3U_PCREL:
885 RANGE (3, 10);
886 OP (0) &= 0xf8;
887 OP (0) |= relocation & 0x07;
888 break;
889
890 case R_RL78_DIR24S_PCREL:
891 RANGE (-0x800000, 0x7fffff);
892 OP (0) = relocation;
893 OP (1) = relocation >> 8;
894 OP (2) = relocation >> 16;
895 break;
896
897 case R_RL78_DIR24S:
898 RANGE (-0x800000, 0x7fffff);
899 OP (0) = relocation;
900 OP (1) = relocation >> 8;
901 OP (2) = relocation >> 16;
902 break;
903
904 case R_RL78_DIR32:
905 OP (0) = relocation;
906 OP (1) = relocation >> 8;
907 OP (2) = relocation >> 16;
908 OP (3) = relocation >> 24;
909 break;
910
911 case R_RL78_DIR32_REV:
912 OP (3) = relocation;
913 OP (2) = relocation >> 8;
914 OP (1) = relocation >> 16;
915 OP (0) = relocation >> 24;
916 break;
917
918 case R_RL78_RH_SFR:
919 RANGE (0xfff00, 0xfffff);
920 OP (0) = relocation & 0xff;
921 break;
922
923 case R_RL78_RH_SADDR:
924 RANGE (0xffe20, 0xfff1f);
925 OP (0) = relocation & 0xff;
926 break;
927
928 /* Complex reloc handling: */
929 case R_RL78_ABS32:
930 case R_RL78_ABS32_REV:
931 case R_RL78_ABS24S_PCREL:
932 case R_RL78_ABS24S:
933 case R_RL78_ABS16:
934 case R_RL78_ABS16_REV:
935 case R_RL78_ABS16S_PCREL:
936 case R_RL78_ABS16S:
937 case R_RL78_ABS16U:
938 case R_RL78_ABS16UL:
939 case R_RL78_ABS16UW:
940 case R_RL78_ABS8:
941 case R_RL78_ABS8U:
942 case R_RL78_ABS8UL:
943 case R_RL78_ABS8UW:
944 case R_RL78_ABS8S_PCREL:
945 case R_RL78_ABS8S:
946 case R_RL78_OPneg:
947 case R_RL78_OPadd:
948 case R_RL78_OPsub:
949 case R_RL78_OPmul:
950 case R_RL78_OPdiv:
951 case R_RL78_OPshla:
952 case R_RL78_OPshra:
953 case R_RL78_OPsctsize:
954 case R_RL78_OPscttop:
955 case R_RL78_OPand:
956 case R_RL78_OPor:
957 case R_RL78_OPxor:
958 case R_RL78_OPnot:
959 case R_RL78_OPmod:
960 relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
961
962 switch (r_type)
963 {
964 case R_RL78_ABS32:
965 OP (0) = relocation;
966 OP (1) = relocation >> 8;
967 OP (2) = relocation >> 16;
968 OP (3) = relocation >> 24;
969 break;
970
971 case R_RL78_ABS32_REV:
972 OP (3) = relocation;
973 OP (2) = relocation >> 8;
974 OP (1) = relocation >> 16;
975 OP (0) = relocation >> 24;
976 break;
977
978 case R_RL78_ABS24S_PCREL:
979 case R_RL78_ABS24S:
980 RANGE (-0x800000, 0x7fffff);
981 OP (0) = relocation;
982 OP (1) = relocation >> 8;
983 OP (2) = relocation >> 16;
984 break;
985
986 case R_RL78_ABS16:
987 RANGE (-32768, 65535);
988 OP (0) = relocation;
989 OP (1) = relocation >> 8;
990 break;
991
992 case R_RL78_ABS16_REV:
993 RANGE (-32768, 65535);
994 OP (1) = relocation;
995 OP (0) = relocation >> 8;
996 break;
997
998 case R_RL78_ABS16S_PCREL:
999 case R_RL78_ABS16S:
1000 RANGE (-32768, 32767);
1001 OP (0) = relocation;
1002 OP (1) = relocation >> 8;
1003 break;
1004
1005 case R_RL78_ABS16U:
1006 case R_RL78_ABS16UL:
1007 case R_RL78_ABS16UW:
1008 RANGE (0, 65536);
1009 OP (0) = relocation;
1010 OP (1) = relocation >> 8;
1011 break;
1012
1013 case R_RL78_ABS8:
1014 RANGE (-128, 255);
1015 OP (0) = relocation;
1016 break;
1017
1018 case R_RL78_ABS8U:
1019 case R_RL78_ABS8UL:
1020 case R_RL78_ABS8UW:
1021 RANGE (0, 255);
1022 OP (0) = relocation;
1023 break;
1024
1025 case R_RL78_ABS8S_PCREL:
1026 case R_RL78_ABS8S:
1027 RANGE (-128, 127);
1028 OP (0) = relocation;
1029 break;
1030
1031 default:
1032 break;
1033 }
1034 break;
1035
1036 case R_RL78_SYM:
1037 if (r_symndx < symtab_hdr->sh_info)
1038 relocation = sec->output_section->vma + sec->output_offset
1039 + sym->st_value + rel->r_addend;
1040 else if (h != NULL
1041 && (h->root.type == bfd_link_hash_defined
1042 || h->root.type == bfd_link_hash_defweak))
1043 relocation = h->root.u.def.value
1044 + sec->output_section->vma
1045 + sec->output_offset
1046 + rel->r_addend;
1047 else
1048 {
1049 relocation = 0;
1050 if (h->root.type != bfd_link_hash_undefweak)
1051 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
1052 }
1053 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1054 break;
1055
1056 case R_RL78_OPromtop:
1057 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset);
1058 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1059 break;
1060
1061 case R_RL78_OPramtop:
1062 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1063 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1064 break;
1065
1066 default:
1067 r = bfd_reloc_notsupported;
1068 break;
1069 }
1070
1071 if (r != bfd_reloc_ok)
1072 {
1073 const char * msg = NULL;
1074
1075 switch (r)
1076 {
1077 case bfd_reloc_overflow:
1078 /* Catch the case of a missing function declaration
1079 and emit a more helpful error message. */
1080 if (r_type == R_RL78_DIR24S_PCREL)
1081 /* xgettext:c-format */
1082 msg = _("%pB(%pA): error: call to undefined function '%s'");
1083 else
1084 (*info->callbacks->reloc_overflow)
1085 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1086 input_bfd, input_section, rel->r_offset);
1087 break;
1088
1089 case bfd_reloc_undefined:
1090 (*info->callbacks->undefined_symbol)
1091 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
1092 break;
1093
1094 case bfd_reloc_other:
1095 /* xgettext:c-format */
1096 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area");
1097 break;
1098
1099 case bfd_reloc_outofrange:
1100 /* xgettext:c-format */
1101 msg = _("%pB(%pA): internal error: out of range error");
1102 break;
1103
1104 case bfd_reloc_notsupported:
1105 /* xgettext:c-format */
1106 msg = _("%pB(%pA): internal error: unsupported relocation error");
1107 break;
1108
1109 case bfd_reloc_dangerous:
1110 /* xgettext:c-format */
1111 msg = _("%pB(%pA): internal error: dangerous relocation");
1112 break;
1113
1114 default:
1115 /* xgettext:c-format */
1116 msg = _("%pB(%pA): internal error: unknown error");
1117 break;
1118 }
1119
1120 if (msg)
1121 _bfd_error_handler (msg, input_bfd, input_section, name);
1122 }
1123 }
1124
1125 return TRUE;
1126 }
1127 \f
1128 /* Function to set the ELF flag bits. */
1129
1130 static bfd_boolean
1131 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1132 {
1133 elf_elfheader (abfd)->e_flags = flags;
1134 elf_flags_init (abfd) = TRUE;
1135 return TRUE;
1136 }
1137
1138 static bfd_boolean no_warn_mismatch = FALSE;
1139
1140 void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1141
1142 void
1143 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1144 {
1145 no_warn_mismatch = user_no_warn_mismatch;
1146 }
1147
1148 static const char *
1149 rl78_cpu_name (flagword flags)
1150 {
1151 switch (flags & E_FLAG_RL78_CPU_MASK)
1152 {
1153 default: return "";
1154 case E_FLAG_RL78_G10: return "G10";
1155 case E_FLAG_RL78_G13: return "G13";
1156 case E_FLAG_RL78_G14: return "G14";
1157 }
1158 }
1159
1160 /* Merge backend specific data from an object file to the output
1161 object file when linking. */
1162
1163 static bfd_boolean
1164 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
1165 {
1166 bfd *obfd = info->output_bfd;
1167 flagword new_flags;
1168 flagword old_flags;
1169 bfd_boolean error = FALSE;
1170
1171 new_flags = elf_elfheader (ibfd)->e_flags;
1172 old_flags = elf_elfheader (obfd)->e_flags;
1173
1174 if (!elf_flags_init (obfd))
1175 {
1176 /* First call, no flags set. */
1177 elf_flags_init (obfd) = TRUE;
1178 elf_elfheader (obfd)->e_flags = new_flags;
1179 }
1180 else if (old_flags != new_flags)
1181 {
1182 flagword changed_flags = old_flags ^ new_flags;
1183
1184 if (changed_flags & E_FLAG_RL78_CPU_MASK)
1185 {
1186 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1187 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
1188
1189 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1190 /* It does not matter what new_cpu may have. */;
1191 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1192 {
1193 if (in_cpu == E_FLAG_RL78_G10)
1194 {
1195 /* G10 files can only be linked with other G10 files.
1196 If the output is set to "any" this means that it is
1197 a G14 file that does not use hardware multiply/divide,
1198 but that is still incompatible with the G10 ABI. */
1199 error = TRUE;
1200
1201 _bfd_error_handler
1202 /* xgettext:c-format */
1203 (_("RL78 ABI conflict: G10 file %pB cannot be linked"
1204 " with %s file %pB"),
1205 ibfd, rl78_cpu_name (out_cpu), obfd);
1206 }
1207 else
1208 {
1209 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1210 old_flags |= in_cpu;
1211 elf_elfheader (obfd)->e_flags = old_flags;
1212 }
1213 }
1214 else
1215 {
1216 error = TRUE;
1217
1218 _bfd_error_handler
1219 /* xgettext:c-format */
1220 (_("RL78 ABI conflict: cannot link %s file %pB with %s file %pB"),
1221 rl78_cpu_name (in_cpu), ibfd,
1222 rl78_cpu_name (out_cpu), obfd);
1223 }
1224 }
1225
1226 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1227 {
1228 _bfd_error_handler
1229 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1230
1231 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1232 /* xgettext:c-format */
1233 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"),
1234 obfd, ibfd);
1235 else
1236 /* xgettext:c-format */
1237 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"),
1238 ibfd, obfd);
1239 error = TRUE;
1240 }
1241 }
1242
1243 return !error;
1244 }
1245 \f
1246 static bfd_boolean
1247 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1248 {
1249 FILE * file = (FILE *) ptr;
1250 flagword flags;
1251
1252 BFD_ASSERT (abfd != NULL && ptr != NULL);
1253
1254 /* Print normal ELF private data. */
1255 _bfd_elf_print_private_bfd_data (abfd, ptr);
1256
1257 flags = elf_elfheader (abfd)->e_flags;
1258 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1259
1260 if (flags & E_FLAG_RL78_CPU_MASK)
1261 fprintf (file, " [%s]", rl78_cpu_name (flags));
1262
1263 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1264 fprintf (file, _(" [64-bit doubles]"));
1265
1266 fputc ('\n', file);
1267 return TRUE;
1268 }
1269
1270 /* Return the MACH for an e_flags value. */
1271
1272 static int
1273 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
1274 {
1275 return bfd_mach_rl78;
1276 }
1277
1278 static bfd_boolean
1279 rl78_elf_object_p (bfd * abfd)
1280 {
1281 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1282 elf32_rl78_machine (abfd));
1283 return TRUE;
1284 }
1285 \f
1286 /* support PLT for 16-bit references to 24-bit functions. */
1287
1288 /* We support 16-bit pointers to code above 64k by generating a thunk
1289 below 64k containing a JMP instruction to the final address. */
1290
1291 static bfd_boolean
1292 rl78_elf_check_relocs
1293 (bfd * abfd,
1294 struct bfd_link_info * info,
1295 asection * sec,
1296 const Elf_Internal_Rela * relocs)
1297 {
1298 Elf_Internal_Shdr * symtab_hdr;
1299 struct elf_link_hash_entry ** sym_hashes;
1300 const Elf_Internal_Rela * rel;
1301 const Elf_Internal_Rela * rel_end;
1302 bfd_vma *local_plt_offsets;
1303 asection *splt;
1304 bfd *dynobj;
1305
1306 if (bfd_link_relocatable (info))
1307 return TRUE;
1308
1309 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1310 sym_hashes = elf_sym_hashes (abfd);
1311 local_plt_offsets = elf_local_got_offsets (abfd);
1312 dynobj = elf_hash_table(info)->dynobj;
1313
1314 rel_end = relocs + sec->reloc_count;
1315 for (rel = relocs; rel < rel_end; rel++)
1316 {
1317 struct elf_link_hash_entry *h;
1318 unsigned long r_symndx;
1319 bfd_vma *offset;
1320
1321 r_symndx = ELF32_R_SYM (rel->r_info);
1322 if (r_symndx < symtab_hdr->sh_info)
1323 h = NULL;
1324 else
1325 {
1326 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1327 while (h->root.type == bfd_link_hash_indirect
1328 || h->root.type == bfd_link_hash_warning)
1329 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1330 }
1331
1332 switch (ELF32_R_TYPE (rel->r_info))
1333 {
1334 /* This relocation describes a 16-bit pointer to a function.
1335 We may need to allocate a thunk in low memory; reserve memory
1336 for it now. */
1337 case R_RL78_DIR16S:
1338 if (dynobj == NULL)
1339 elf_hash_table (info)->dynobj = dynobj = abfd;
1340 splt = elf_hash_table (info)->splt;
1341 if (splt == NULL)
1342 {
1343 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1344 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1345 | SEC_READONLY | SEC_CODE);
1346 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1347 flags);
1348 elf_hash_table (info)->splt = splt;
1349 if (splt == NULL
1350 || ! bfd_set_section_alignment (dynobj, splt, 1))
1351 return FALSE;
1352 }
1353
1354 if (h != NULL)
1355 offset = &h->plt.offset;
1356 else
1357 {
1358 if (local_plt_offsets == NULL)
1359 {
1360 size_t size;
1361 unsigned int i;
1362
1363 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1364 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1365 if (local_plt_offsets == NULL)
1366 return FALSE;
1367 elf_local_got_offsets (abfd) = local_plt_offsets;
1368
1369 for (i = 0; i < symtab_hdr->sh_info; i++)
1370 local_plt_offsets[i] = (bfd_vma) -1;
1371 }
1372 offset = &local_plt_offsets[r_symndx];
1373 }
1374
1375 if (*offset == (bfd_vma) -1)
1376 {
1377 *offset = splt->size;
1378 splt->size += 4;
1379 }
1380 break;
1381 }
1382 }
1383
1384 return TRUE;
1385 }
1386
1387 /* This must exist if dynobj is ever set. */
1388
1389 static bfd_boolean
1390 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1391 struct bfd_link_info *info)
1392 {
1393 bfd *dynobj;
1394 asection *splt;
1395
1396 if (!elf_hash_table (info)->dynamic_sections_created)
1397 return TRUE;
1398
1399 /* As an extra sanity check, verify that all plt entries have been
1400 filled in. However, relaxing might have changed the relocs so
1401 that some plt entries don't get filled in, so we have to skip
1402 this check if we're relaxing. Unfortunately, check_relocs is
1403 called before relaxation. */
1404
1405 if (info->relax_trip > 0)
1406 return TRUE;
1407
1408 dynobj = elf_hash_table (info)->dynobj;
1409 splt = elf_hash_table (info)->splt;
1410 if (dynobj != NULL && splt != NULL)
1411 {
1412 bfd_byte *contents = splt->contents;
1413 unsigned int i, size = splt->size;
1414
1415 for (i = 0; i < size; i += 4)
1416 {
1417 unsigned int x = bfd_get_32 (dynobj, contents + i);
1418 BFD_ASSERT (x != 0);
1419 }
1420 }
1421
1422 return TRUE;
1423 }
1424
1425 static bfd_boolean
1426 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1427 struct bfd_link_info *info)
1428 {
1429 bfd *dynobj;
1430 asection *splt;
1431
1432 if (bfd_link_relocatable (info))
1433 return TRUE;
1434
1435 dynobj = elf_hash_table (info)->dynobj;
1436 if (dynobj == NULL)
1437 return TRUE;
1438
1439 splt = elf_hash_table (info)->splt;
1440 BFD_ASSERT (splt != NULL);
1441
1442 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1443 if (splt->contents == NULL)
1444 return FALSE;
1445
1446 return TRUE;
1447 }
1448
1449 \f
1450
1451 /* Handle relaxing. */
1452
1453 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1454 is within the low 64k, remove any entry for it in the plt. */
1455
1456 struct relax_plt_data
1457 {
1458 asection *splt;
1459 bfd_boolean *again;
1460 };
1461
1462 static bfd_boolean
1463 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
1464 {
1465 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1466
1467 if (h->plt.offset != (bfd_vma) -1)
1468 {
1469 bfd_vma address;
1470
1471 if (h->root.type == bfd_link_hash_undefined
1472 || h->root.type == bfd_link_hash_undefweak)
1473 address = 0;
1474 else
1475 address = (h->root.u.def.section->output_section->vma
1476 + h->root.u.def.section->output_offset
1477 + h->root.u.def.value);
1478
1479 if (valid_16bit_address (address))
1480 {
1481 h->plt.offset = -1;
1482 data->splt->size -= 4;
1483 *data->again = TRUE;
1484 }
1485 }
1486
1487 return TRUE;
1488 }
1489
1490 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1491 previously had a plt entry, give it a new entry offset. */
1492
1493 static bfd_boolean
1494 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
1495 {
1496 bfd_vma *entry = (bfd_vma *) xdata;
1497
1498 if (h->plt.offset != (bfd_vma) -1)
1499 {
1500 h->plt.offset = *entry;
1501 *entry += 4;
1502 }
1503
1504 return TRUE;
1505 }
1506
1507 static bfd_boolean
1508 rl78_elf_relax_plt_section (bfd *dynobj,
1509 asection *splt,
1510 struct bfd_link_info *info,
1511 bfd_boolean *again)
1512 {
1513 struct relax_plt_data relax_plt_data;
1514 bfd *ibfd;
1515
1516 /* Assume nothing changes. */
1517 *again = FALSE;
1518
1519 if (bfd_link_relocatable (info))
1520 return TRUE;
1521
1522 /* We only relax the .plt section at the moment. */
1523 if (dynobj != elf_hash_table (info)->dynobj
1524 || strcmp (splt->name, ".plt") != 0)
1525 return TRUE;
1526
1527 /* Quick check for an empty plt. */
1528 if (splt->size == 0)
1529 return TRUE;
1530
1531 /* Map across all global symbols; see which ones happen to
1532 fall in the low 64k. */
1533 relax_plt_data.splt = splt;
1534 relax_plt_data.again = again;
1535 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1536 &relax_plt_data);
1537
1538 /* Likewise for local symbols, though that's somewhat less convenient
1539 as we have to walk the list of input bfds and swap in symbol data. */
1540 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1541 {
1542 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1543 Elf_Internal_Shdr *symtab_hdr;
1544 Elf_Internal_Sym *isymbuf = NULL;
1545 unsigned int idx;
1546
1547 if (! local_plt_offsets)
1548 continue;
1549
1550 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1551 if (symtab_hdr->sh_info != 0)
1552 {
1553 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1554 if (isymbuf == NULL)
1555 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1556 symtab_hdr->sh_info, 0,
1557 NULL, NULL, NULL);
1558 if (isymbuf == NULL)
1559 return FALSE;
1560 }
1561
1562 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1563 {
1564 Elf_Internal_Sym *isym;
1565 asection *tsec;
1566 bfd_vma address;
1567
1568 if (local_plt_offsets[idx] == (bfd_vma) -1)
1569 continue;
1570
1571 isym = &isymbuf[idx];
1572 if (isym->st_shndx == SHN_UNDEF)
1573 continue;
1574 else if (isym->st_shndx == SHN_ABS)
1575 tsec = bfd_abs_section_ptr;
1576 else if (isym->st_shndx == SHN_COMMON)
1577 tsec = bfd_com_section_ptr;
1578 else
1579 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1580
1581 address = (tsec->output_section->vma
1582 + tsec->output_offset
1583 + isym->st_value);
1584 if (valid_16bit_address (address))
1585 {
1586 local_plt_offsets[idx] = -1;
1587 splt->size -= 4;
1588 *again = TRUE;
1589 }
1590 }
1591
1592 if (isymbuf != NULL
1593 && symtab_hdr->contents != (unsigned char *) isymbuf)
1594 {
1595 if (! info->keep_memory)
1596 free (isymbuf);
1597 else
1598 {
1599 /* Cache the symbols for elf_link_input_bfd. */
1600 symtab_hdr->contents = (unsigned char *) isymbuf;
1601 }
1602 }
1603 }
1604
1605 /* If we changed anything, walk the symbols again to reallocate
1606 .plt entry addresses. */
1607 if (*again && splt->size > 0)
1608 {
1609 bfd_vma entry = 0;
1610
1611 elf_link_hash_traverse (elf_hash_table (info),
1612 rl78_relax_plt_realloc, &entry);
1613
1614 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1615 {
1616 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1617 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1618 unsigned int idx;
1619
1620 if (! local_plt_offsets)
1621 continue;
1622
1623 for (idx = 0; idx < nlocals; ++idx)
1624 if (local_plt_offsets[idx] != (bfd_vma) -1)
1625 {
1626 local_plt_offsets[idx] = entry;
1627 entry += 4;
1628 }
1629 }
1630 }
1631
1632 return TRUE;
1633 }
1634
1635 /* Delete some bytes from a section while relaxing. */
1636
1637 static bfd_boolean
1638 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1639 Elf_Internal_Rela *alignment_rel, int force_snip)
1640 {
1641 Elf_Internal_Shdr * symtab_hdr;
1642 unsigned int sec_shndx;
1643 bfd_byte * contents;
1644 Elf_Internal_Rela * irel;
1645 Elf_Internal_Rela * irelend;
1646 Elf_Internal_Sym * isym;
1647 Elf_Internal_Sym * isymend;
1648 bfd_vma toaddr;
1649 unsigned int symcount;
1650 struct elf_link_hash_entry ** sym_hashes;
1651 struct elf_link_hash_entry ** end_hashes;
1652
1653 if (!alignment_rel)
1654 force_snip = 1;
1655
1656 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1657
1658 contents = elf_section_data (sec)->this_hdr.contents;
1659
1660 /* The deletion must stop at the next alignment boundary, if
1661 ALIGNMENT_REL is non-NULL. */
1662 toaddr = sec->size;
1663 if (alignment_rel)
1664 toaddr = alignment_rel->r_offset;
1665
1666 irel = elf_section_data (sec)->relocs;
1667 if (irel == NULL)
1668 {
1669 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1670 irel = elf_section_data (sec)->relocs;
1671 }
1672
1673 irelend = irel + sec->reloc_count;
1674
1675 /* Actually delete the bytes. */
1676 memmove (contents + addr, contents + addr + count,
1677 (size_t) (toaddr - addr - count));
1678
1679 /* If we don't have an alignment marker to worry about, we can just
1680 shrink the section. Otherwise, we have to fill in the newly
1681 created gap with NOP insns (0x03). */
1682 if (force_snip)
1683 sec->size -= count;
1684 else
1685 memset (contents + toaddr - count, 0x03, count);
1686
1687 /* Adjust all the relocs. */
1688 for (; irel && irel < irelend; irel++)
1689 {
1690 /* Get the new reloc address. */
1691 if (irel->r_offset > addr
1692 && (irel->r_offset < toaddr
1693 || (force_snip && irel->r_offset == toaddr)))
1694 irel->r_offset -= count;
1695
1696 /* If we see an ALIGN marker at the end of the gap, we move it
1697 to the beginning of the gap, since marking these gaps is what
1698 they're for. */
1699 if (irel->r_offset == toaddr
1700 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1701 && irel->r_addend & RL78_RELAXA_ALIGN)
1702 irel->r_offset -= count;
1703 }
1704
1705 /* Adjust the local symbols defined in this section. */
1706 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1707 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1708 isymend = isym + symtab_hdr->sh_info;
1709
1710 for (; isym < isymend; isym++)
1711 {
1712 /* If the symbol is in the range of memory we just moved, we
1713 have to adjust its value. */
1714 if (isym->st_shndx == sec_shndx
1715 && isym->st_value > addr
1716 && isym->st_value < toaddr)
1717 isym->st_value -= count;
1718
1719 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1720 *end* is in the moved bytes but it's *start* isn't), then we
1721 must adjust its size. */
1722 if (isym->st_shndx == sec_shndx
1723 && isym->st_value < addr
1724 && isym->st_value + isym->st_size > addr
1725 && isym->st_value + isym->st_size < toaddr)
1726 isym->st_size -= count;
1727 }
1728
1729 /* Now adjust the global symbols defined in this section. */
1730 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1731 - symtab_hdr->sh_info);
1732 sym_hashes = elf_sym_hashes (abfd);
1733 end_hashes = sym_hashes + symcount;
1734
1735 for (; sym_hashes < end_hashes; sym_hashes++)
1736 {
1737 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1738
1739 if ((sym_hash->root.type == bfd_link_hash_defined
1740 || sym_hash->root.type == bfd_link_hash_defweak)
1741 && sym_hash->root.u.def.section == sec)
1742 {
1743 /* As above, adjust the value if needed. */
1744 if (sym_hash->root.u.def.value > addr
1745 && sym_hash->root.u.def.value < toaddr)
1746 sym_hash->root.u.def.value -= count;
1747
1748 /* As above, adjust the size if needed. */
1749 if (sym_hash->root.u.def.value < addr
1750 && sym_hash->root.u.def.value + sym_hash->size > addr
1751 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1752 sym_hash->size -= count;
1753 }
1754 }
1755
1756 return TRUE;
1757 }
1758
1759 /* Used to sort relocs by address. If relocs have the same address,
1760 we maintain their relative order, except that R_RL78_RH_RELAX
1761 alignment relocs must be the first reloc for any given address. */
1762
1763 static void
1764 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1765 {
1766 int i;
1767 bfd_boolean again;
1768 bfd_boolean swappit;
1769
1770 /* This is almost a classic bubblesort. It's the slowest sort, but
1771 we're taking advantage of the fact that the relocations are
1772 mostly in order already (the assembler emits them that way) and
1773 we need relocs with the same address to remain in the same
1774 relative order. */
1775 again = TRUE;
1776 while (again)
1777 {
1778 again = FALSE;
1779 for (i = 0; i < count - 1; i ++)
1780 {
1781 if (r[i].r_offset > r[i + 1].r_offset)
1782 swappit = TRUE;
1783 else if (r[i].r_offset < r[i + 1].r_offset)
1784 swappit = FALSE;
1785 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1786 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1787 swappit = TRUE;
1788 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1789 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1790 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1791 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1792 swappit = TRUE;
1793 else
1794 swappit = FALSE;
1795
1796 if (swappit)
1797 {
1798 Elf_Internal_Rela tmp;
1799
1800 tmp = r[i];
1801 r[i] = r[i + 1];
1802 r[i + 1] = tmp;
1803 /* If we do move a reloc back, re-scan to see if it
1804 needs to be moved even further back. This avoids
1805 most of the O(n^2) behavior for our cases. */
1806 if (i > 0)
1807 i -= 2;
1808 again = TRUE;
1809 }
1810 }
1811 }
1812 }
1813
1814
1815 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1816 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1817 lrel, abfd, sec, link_info, scale)
1818
1819 static bfd_vma
1820 rl78_offset_for_reloc (bfd * abfd,
1821 Elf_Internal_Rela * rel,
1822 Elf_Internal_Shdr * symtab_hdr,
1823 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1824 Elf_Internal_Sym * intsyms,
1825 Elf_Internal_Rela ** lrel,
1826 bfd * input_bfd,
1827 asection * input_section,
1828 struct bfd_link_info * info,
1829 int * scale)
1830 {
1831 bfd_vma symval;
1832
1833 *scale = 1;
1834
1835 /* REL is the first of 1..N relocations. We compute the symbol
1836 value for each relocation, then combine them if needed. LREL
1837 gets a pointer to the last relocation used. */
1838 while (1)
1839 {
1840 unsigned long r_type;
1841
1842 /* Get the value of the symbol referred to by the reloc. */
1843 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1844 {
1845 /* A local symbol. */
1846 Elf_Internal_Sym *isym;
1847 asection *ssec;
1848
1849 isym = intsyms + ELF32_R_SYM (rel->r_info);
1850
1851 if (isym->st_shndx == SHN_UNDEF)
1852 ssec = bfd_und_section_ptr;
1853 else if (isym->st_shndx == SHN_ABS)
1854 ssec = bfd_abs_section_ptr;
1855 else if (isym->st_shndx == SHN_COMMON)
1856 ssec = bfd_com_section_ptr;
1857 else
1858 ssec = bfd_section_from_elf_index (abfd,
1859 isym->st_shndx);
1860
1861 /* Initial symbol value. */
1862 symval = isym->st_value;
1863
1864 /* GAS may have made this symbol relative to a section, in
1865 which case, we have to add the addend to find the
1866 symbol. */
1867 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1868 symval += rel->r_addend;
1869
1870 if (ssec)
1871 {
1872 if ((ssec->flags & SEC_MERGE)
1873 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1874 symval = _bfd_merged_section_offset (abfd, & ssec,
1875 elf_section_data (ssec)->sec_info,
1876 symval);
1877 }
1878
1879 /* Now make the offset relative to where the linker is putting it. */
1880 if (ssec)
1881 symval +=
1882 ssec->output_section->vma + ssec->output_offset;
1883
1884 symval += rel->r_addend;
1885 }
1886 else
1887 {
1888 unsigned long indx;
1889 struct elf_link_hash_entry * h;
1890
1891 /* An external symbol. */
1892 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1893 h = elf_sym_hashes (abfd)[indx];
1894 BFD_ASSERT (h != NULL);
1895
1896 if (h->root.type != bfd_link_hash_defined
1897 && h->root.type != bfd_link_hash_defweak)
1898 {
1899 /* This appears to be a reference to an undefined
1900 symbol. Just ignore it--it will be caught by the
1901 regular reloc processing. */
1902 if (lrel)
1903 *lrel = rel;
1904 return 0;
1905 }
1906
1907 symval = (h->root.u.def.value
1908 + h->root.u.def.section->output_section->vma
1909 + h->root.u.def.section->output_offset);
1910
1911 symval += rel->r_addend;
1912 }
1913
1914 r_type = ELF32_R_TYPE (rel->r_info);
1915 switch (r_type)
1916 {
1917 case R_RL78_SYM:
1918 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1919 break;
1920
1921 case R_RL78_OPromtop:
1922 symval = get_romstart (info, input_bfd, input_section, rel->r_offset);
1923 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1924 break;
1925
1926 case R_RL78_OPramtop:
1927 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1928 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1929 break;
1930
1931 case R_RL78_OPneg:
1932 case R_RL78_OPadd:
1933 case R_RL78_OPsub:
1934 case R_RL78_OPmul:
1935 case R_RL78_OPdiv:
1936 case R_RL78_OPshla:
1937 case R_RL78_OPshra:
1938 case R_RL78_OPsctsize:
1939 case R_RL78_OPscttop:
1940 case R_RL78_OPand:
1941 case R_RL78_OPor:
1942 case R_RL78_OPxor:
1943 case R_RL78_OPnot:
1944 case R_RL78_OPmod:
1945 (void) rl78_compute_complex_reloc (r_type, 0, input_section);
1946 break;
1947
1948 case R_RL78_DIR16UL:
1949 case R_RL78_DIR8UL:
1950 case R_RL78_ABS16UL:
1951 case R_RL78_ABS8UL:
1952 *scale = 4;
1953 goto reloc_computes_value;
1954
1955 case R_RL78_DIR16UW:
1956 case R_RL78_DIR8UW:
1957 case R_RL78_ABS16UW:
1958 case R_RL78_ABS8UW:
1959 *scale = 2;
1960 goto reloc_computes_value;
1961
1962 default:
1963 reloc_computes_value:
1964 symval = rl78_compute_complex_reloc (r_type, symval, input_section);
1965 /* Fall through. */
1966 case R_RL78_DIR32:
1967 case R_RL78_DIR24S:
1968 case R_RL78_DIR16:
1969 case R_RL78_DIR16U:
1970 case R_RL78_DIR16S:
1971 case R_RL78_DIR24S_PCREL:
1972 case R_RL78_DIR16S_PCREL:
1973 case R_RL78_DIR8S_PCREL:
1974 if (lrel)
1975 *lrel = rel;
1976 return symval;
1977 }
1978
1979 rel ++;
1980 }
1981 }
1982
1983 struct {
1984 int prefix; /* or -1 for "no prefix" */
1985 int insn; /* or -1 for "end of list" */
1986 int insn_for_saddr; /* or -1 for "no alternative" */
1987 int insn_for_sfr; /* or -1 for "no alternative" */
1988 } relax_addr16[] = {
1989 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1990 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1991 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1992 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1993
1994 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1995 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1996 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1997 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1998 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1999 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
2000 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
2001 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
2002
2003 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
2004 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
2005 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
2006 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
2007 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
2008
2009 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
2010 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
2011 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
2012 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
2013
2014 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
2015 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
2016 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
2017
2018 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
2019 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
2020 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
2021 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
2022 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
2023 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
2024
2025 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
2026
2027 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
2028 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
2029 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
2030 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
2031 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
2032 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
2033 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
2034 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
2035
2036 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
2037 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
2038 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
2039 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
2040 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
2041 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
2042 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
2043 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
2044
2045 { -1, -1, -1, -1 }
2046 };
2047
2048 /* Relax one section. */
2049
2050 static bfd_boolean
2051 rl78_elf_relax_section
2052 (bfd * abfd,
2053 asection * sec,
2054 struct bfd_link_info * link_info,
2055 bfd_boolean * again)
2056 {
2057 Elf_Internal_Shdr * symtab_hdr;
2058 Elf_Internal_Shdr * shndx_hdr;
2059 Elf_Internal_Rela * internal_relocs;
2060 Elf_Internal_Rela * free_relocs = NULL;
2061 Elf_Internal_Rela * irel;
2062 Elf_Internal_Rela * srel;
2063 Elf_Internal_Rela * irelend;
2064 Elf_Internal_Rela * next_alignment;
2065 bfd_byte * contents = NULL;
2066 bfd_byte * free_contents = NULL;
2067 Elf_Internal_Sym * intsyms = NULL;
2068 Elf_Internal_Sym * free_intsyms = NULL;
2069 Elf_External_Sym_Shndx * shndx_buf = NULL;
2070 bfd_vma pc;
2071 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2072 int pcrel ATTRIBUTE_UNUSED = 0;
2073 int code ATTRIBUTE_UNUSED = 0;
2074 int section_alignment_glue;
2075 int scale;
2076
2077 if (abfd == elf_hash_table (link_info)->dynobj
2078 && strcmp (sec->name, ".plt") == 0)
2079 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2080
2081 /* Assume nothing changes. */
2082 *again = FALSE;
2083
2084 /* We don't have to do anything for a relocatable link, if
2085 this section does not have relocs, or if this is not a
2086 code section. */
2087 if (bfd_link_relocatable (link_info)
2088 || (sec->flags & SEC_RELOC) == 0
2089 || sec->reloc_count == 0
2090 || (sec->flags & SEC_CODE) == 0)
2091 return TRUE;
2092
2093 symtab_hdr = & elf_symtab_hdr (abfd);
2094 if (elf_symtab_shndx_list (abfd))
2095 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2096 else
2097 shndx_hdr = NULL;
2098
2099 /* Get the section contents. */
2100 if (elf_section_data (sec)->this_hdr.contents != NULL)
2101 contents = elf_section_data (sec)->this_hdr.contents;
2102 /* Go get them off disk. */
2103 else
2104 {
2105 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2106 goto error_return;
2107 elf_section_data (sec)->this_hdr.contents = contents;
2108 }
2109
2110 /* Read this BFD's symbols. */
2111 /* Get cached copy if it exists. */
2112 if (symtab_hdr->contents != NULL)
2113 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2114 else
2115 {
2116 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2117 symtab_hdr->contents = (bfd_byte *) intsyms;
2118 }
2119
2120 if (shndx_hdr && shndx_hdr->sh_size != 0)
2121 {
2122 bfd_size_type amt;
2123
2124 amt = symtab_hdr->sh_info;
2125 amt *= sizeof (Elf_External_Sym_Shndx);
2126 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2127 if (shndx_buf == NULL)
2128 goto error_return;
2129 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2130 || bfd_bread (shndx_buf, amt, abfd) != amt)
2131 goto error_return;
2132 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2133 }
2134
2135 /* Get a copy of the native relocations. */
2136 internal_relocs = (_bfd_elf_link_read_relocs
2137 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
2138 link_info->keep_memory));
2139 if (internal_relocs == NULL)
2140 goto error_return;
2141 if (! link_info->keep_memory)
2142 free_relocs = internal_relocs;
2143
2144 /* The RL_ relocs must be just before the operand relocs they go
2145 with, so we must sort them to guarantee this. We use bubblesort
2146 instead of qsort so we can guarantee that relocs with the same
2147 address remain in the same relative order. */
2148 reloc_bubblesort (internal_relocs, sec->reloc_count);
2149
2150 /* Walk through them looking for relaxing opportunities. */
2151 irelend = internal_relocs + sec->reloc_count;
2152
2153
2154 /* This will either be NULL or a pointer to the next alignment
2155 relocation. */
2156 next_alignment = internal_relocs;
2157
2158 /* We calculate worst case shrinkage caused by alignment directives.
2159 No fool-proof, but better than either ignoring the problem or
2160 doing heavy duty analysis of all the alignment markers in all
2161 input sections. */
2162 section_alignment_glue = 0;
2163 for (irel = internal_relocs; irel < irelend; irel++)
2164 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2165 && irel->r_addend & RL78_RELAXA_ALIGN)
2166 {
2167 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2168
2169 if (section_alignment_glue < this_glue)
2170 section_alignment_glue = this_glue;
2171 }
2172 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2173 shrinkage. */
2174 section_alignment_glue *= 2;
2175
2176 for (irel = internal_relocs; irel < irelend; irel++)
2177 {
2178 unsigned char *insn;
2179 int nrelocs;
2180
2181 /* The insns we care about are all marked with one of these. */
2182 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2183 continue;
2184
2185 if (irel->r_addend & RL78_RELAXA_ALIGN
2186 || next_alignment == internal_relocs)
2187 {
2188 /* When we delete bytes, we need to maintain all the alignments
2189 indicated. In addition, we need to be careful about relaxing
2190 jumps across alignment boundaries - these displacements
2191 *grow* when we delete bytes. For now, don't shrink
2192 displacements across an alignment boundary, just in case.
2193 Note that this only affects relocations to the same
2194 section. */
2195 next_alignment += 2;
2196 while (next_alignment < irelend
2197 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2198 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2199 next_alignment ++;
2200 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2201 next_alignment = NULL;
2202 }
2203
2204 /* When we hit alignment markers, see if we've shrunk enough
2205 before them to reduce the gap without violating the alignment
2206 requirements. */
2207 if (irel->r_addend & RL78_RELAXA_ALIGN)
2208 {
2209 /* At this point, the next relocation *should* be the ELIGN
2210 end marker. */
2211 Elf_Internal_Rela *erel = irel + 1;
2212 unsigned int alignment, nbytes;
2213
2214 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2215 continue;
2216 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2217 continue;
2218
2219 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2220
2221 if (erel->r_offset - irel->r_offset < alignment)
2222 continue;
2223
2224 nbytes = erel->r_offset - irel->r_offset;
2225 nbytes /= alignment;
2226 nbytes *= alignment;
2227
2228 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2229 next_alignment, erel->r_offset == sec->size);
2230 *again = TRUE;
2231
2232 continue;
2233 }
2234
2235 if (irel->r_addend & RL78_RELAXA_ELIGN)
2236 continue;
2237
2238 insn = contents + irel->r_offset;
2239
2240 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2241
2242 /* At this point, we have an insn that is a candidate for linker
2243 relaxation. There are NRELOCS relocs following that may be
2244 relaxed, although each reloc may be made of more than one
2245 reloc entry (such as gp-rel symbols). */
2246
2247 /* Get the value of the symbol referred to by the reloc. Just
2248 in case this is the last reloc in the list, use the RL's
2249 addend to choose between this reloc (no addend) or the next
2250 (yes addend, which means at least one following reloc). */
2251
2252 /* srel points to the "current" reloction for this insn -
2253 actually the last reloc for a given operand, which is the one
2254 we need to update. We check the relaxations in the same
2255 order that the relocations happen, so we'll just push it
2256 along as we go. */
2257 srel = irel;
2258
2259 pc = sec->output_section->vma + sec->output_offset
2260 + srel->r_offset;
2261
2262 #define GET_RELOC \
2263 BFD_ASSERT (nrelocs > 0); \
2264 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2265 pcrel = symval - pc + srel->r_addend; \
2266 nrelocs --;
2267
2268 #define SNIPNR(offset, nbytes) \
2269 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2270
2271 #define SNIP(offset, nbytes, newtype) \
2272 SNIPNR (offset, nbytes); \
2273 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2274
2275 /* The order of these bit tests must match the order that the
2276 relocs appear in. Since we sorted those by offset, we can
2277 predict them. */
2278
2279 /*----------------------------------------------------------------------*/
2280 /* EF ad BR $rel8 pcrel
2281 ED al ah BR !abs16 abs
2282 EE al ah BR $!rel16 pcrel
2283 EC al ah as BR !!abs20 abs
2284
2285 FD al ah CALL !abs16 abs
2286 FE al ah CALL $!rel16 pcrel
2287 FC al ah as CALL !!abs20 abs
2288
2289 DC ad BC $rel8
2290 DE ad BNC $rel8
2291 DD ad BZ $rel8
2292 DF ad BNZ $rel8
2293 61 C3 ad BH $rel8
2294 61 D3 ad BNH $rel8
2295 61 C8 EF ad SKC ; BR $rel8
2296 61 D8 EF ad SKNC ; BR $rel8
2297 61 E8 EF ad SKZ ; BR $rel8
2298 61 F8 EF ad SKNZ ; BR $rel8
2299 61 E3 EF ad SKH ; BR $rel8
2300 61 F3 EF ad SKNH ; BR $rel8
2301 */
2302
2303 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
2304 {
2305 /* SKIP opcodes that skip non-branches will have a relax tag
2306 but no corresponding symbol to relax against; we just
2307 skip those. */
2308 if (irel->r_addend & RL78_RELAXA_RNUM)
2309 {
2310 GET_RELOC;
2311 }
2312
2313 switch (insn[0])
2314 {
2315 case 0xdc: /* BC */
2316 case 0xdd: /* BZ */
2317 case 0xde: /* BNC */
2318 case 0xdf: /* BNZ */
2319 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */
2320 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */
2321 {
2322 /* This is a "long" conditional as generated by gas:
2323 DC 03 EE ad.dr */
2324 if (pcrel < 127
2325 && pcrel > -127)
2326 {
2327 insn[0] ^= 0x02; /* invert conditional */
2328 SNIPNR (4, 1);
2329 SNIP (1, 2, R_RL78_DIR8S_PCREL);
2330 insn[1] = pcrel;
2331 *again = TRUE;
2332 }
2333 }
2334 break;
2335
2336 case 0xec: /* BR !!abs20 */
2337
2338 if (pcrel < 127
2339 && pcrel > -127)
2340 {
2341 insn[0] = 0xef;
2342 insn[1] = pcrel;
2343 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2344 *again = TRUE;
2345 }
2346 else if (symval < 65536)
2347 {
2348 insn[0] = 0xed;
2349 insn[1] = symval & 0xff;
2350 insn[2] = symval >> 8;
2351 SNIP (2, 1, R_RL78_DIR16U);
2352 *again = TRUE;
2353 }
2354 else if (pcrel < 32767
2355 && pcrel > -32767)
2356 {
2357 insn[0] = 0xee;
2358 insn[1] = pcrel & 0xff;
2359 insn[2] = pcrel >> 8;
2360 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2361 *again = TRUE;
2362 }
2363 break;
2364
2365 case 0xee: /* BR $!pcrel16 */
2366 case 0xed: /* BR $!abs16 */
2367 if (pcrel < 127
2368 && pcrel > -127)
2369 {
2370 insn[0] = 0xef;
2371 insn[1] = pcrel;
2372 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2373 *again = TRUE;
2374 }
2375 break;
2376
2377 case 0xfc: /* CALL !!abs20 */
2378 if (symval < 65536)
2379 {
2380 insn[0] = 0xfd;
2381 insn[1] = symval & 0xff;
2382 insn[2] = symval >> 8;
2383 SNIP (2, 1, R_RL78_DIR16U);
2384 *again = TRUE;
2385 }
2386 else if (pcrel < 32767
2387 && pcrel > -32767)
2388 {
2389 insn[0] = 0xfe;
2390 insn[1] = pcrel & 0xff;
2391 insn[2] = pcrel >> 8;
2392 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2393 *again = TRUE;
2394 }
2395 break;
2396
2397 case 0x61: /* PREFIX */
2398 /* For SKIP/BR, we change the BR opcode and delete the
2399 SKIP. That way, we don't have to find and change the
2400 relocation for the BR. */
2401 /* Note that, for the case where we're skipping some
2402 other insn, we have no "other" reloc but that's safe
2403 here anyway. */
2404 switch (insn[1])
2405 {
2406 case 0xd3: /* BNH */
2407 case 0xc3: /* BH */
2408 if (insn[2] == 0x03 && insn[3] == 0xee
2409 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */
2410 {
2411 /* Another long branch by gas:
2412 61 D3 03 EE ad.dr */
2413 if (pcrel < 127
2414 && pcrel > -127)
2415 {
2416 insn[1] ^= 0x10; /* invert conditional */
2417 SNIPNR (5, 1);
2418 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2419 insn[2] = pcrel;
2420 *again = TRUE;
2421 }
2422 }
2423 break;
2424
2425 case 0xc8: /* SKC */
2426 if (insn[2] == 0xef)
2427 {
2428 insn[2] = 0xde; /* BNC */
2429 SNIPNR (0, 2);
2430 }
2431 break;
2432
2433 case 0xd8: /* SKNC */
2434 if (insn[2] == 0xef)
2435 {
2436 insn[2] = 0xdc; /* BC */
2437 SNIPNR (0, 2);
2438 }
2439 break;
2440
2441 case 0xe8: /* SKZ */
2442 if (insn[2] == 0xef)
2443 {
2444 insn[2] = 0xdf; /* BNZ */
2445 SNIPNR (0, 2);
2446 }
2447 break;
2448
2449 case 0xf8: /* SKNZ */
2450 if (insn[2] == 0xef)
2451 {
2452 insn[2] = 0xdd; /* BZ */
2453 SNIPNR (0, 2);
2454 }
2455 break;
2456
2457 case 0xe3: /* SKH */
2458 if (insn[2] == 0xef)
2459 {
2460 insn[2] = 0xd3; /* BNH */
2461 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2462 }
2463 break;
2464
2465 case 0xf3: /* SKNH */
2466 if (insn[2] == 0xef)
2467 {
2468 insn[2] = 0xc3; /* BH */
2469 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2470 }
2471 break;
2472 }
2473 break;
2474 }
2475 }
2476
2477 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2478 && nrelocs > 0)
2479 {
2480 /*----------------------------------------------------------------------*/
2481 /* Some insns have both a 16-bit address operand and an 8-bit
2482 variant if the address is within a special range:
2483
2484 Address 16-bit operand SADDR range SFR range
2485 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2486 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2487
2488 The RELAX_ADDR16[] array has the insn encodings for the
2489 16-bit operand version, as well as the SFR and SADDR
2490 variants. We only need to replace the encodings and
2491 adjust the operand.
2492
2493 Note: we intentionally do not attempt to decode and skip
2494 any ES: prefix, as adding ES: means the addr16 (likely)
2495 no longer points to saddr/sfr space.
2496 */
2497
2498 int is_sfr;
2499 int is_saddr;
2500 int idx;
2501 int poff;
2502
2503 GET_RELOC;
2504
2505 if (0xffe20 <= symval && symval <= 0xfffff)
2506 {
2507
2508 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2509 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2510
2511 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2512 {
2513 if (relax_addr16[idx].prefix != -1
2514 && insn[0] == relax_addr16[idx].prefix
2515 && insn[1] == relax_addr16[idx].insn)
2516 {
2517 poff = 1;
2518 }
2519 else if (relax_addr16[idx].prefix == -1
2520 && insn[0] == relax_addr16[idx].insn)
2521 {
2522 poff = 0;
2523 }
2524 else
2525 continue;
2526
2527 /* We have a matched insn, and poff is 0 or 1 depending
2528 on the base pattern size. */
2529
2530 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2531 {
2532 insn[poff] = relax_addr16[idx].insn_for_sfr;
2533 SNIP (poff+2, 1, R_RL78_RH_SFR);
2534 }
2535
2536 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2537 {
2538 insn[poff] = relax_addr16[idx].insn_for_saddr;
2539 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2540 }
2541 }
2542 }
2543 }
2544 /*----------------------------------------------------------------------*/
2545 }
2546
2547 return TRUE;
2548
2549 error_return:
2550 if (free_relocs != NULL)
2551 free (free_relocs);
2552
2553 if (free_contents != NULL)
2554 free (free_contents);
2555
2556 if (shndx_buf != NULL)
2557 {
2558 shndx_hdr->contents = NULL;
2559 free (shndx_buf);
2560 }
2561
2562 if (free_intsyms != NULL)
2563 free (free_intsyms);
2564
2565 return TRUE;
2566 }
2567
2568 \f
2569
2570 #define ELF_ARCH bfd_arch_rl78
2571 #define ELF_MACHINE_CODE EM_RL78
2572 #define ELF_MAXPAGESIZE 0x1000
2573
2574 #define TARGET_LITTLE_SYM rl78_elf32_vec
2575 #define TARGET_LITTLE_NAME "elf32-rl78"
2576
2577 #define elf_info_to_howto_rel NULL
2578 #define elf_info_to_howto rl78_info_to_howto_rela
2579 #define elf_backend_object_p rl78_elf_object_p
2580 #define elf_backend_relocate_section rl78_elf_relocate_section
2581 #define elf_symbol_leading_char ('_')
2582 #define elf_backend_can_gc_sections 1
2583
2584 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2585 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2586 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2587 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2588 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2589
2590 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2591 #define elf_backend_check_relocs rl78_elf_check_relocs
2592 #define elf_backend_always_size_sections \
2593 rl78_elf_always_size_sections
2594 #define elf_backend_finish_dynamic_sections \
2595 rl78_elf_finish_dynamic_sections
2596
2597 #include "elf32-target.h"
GDB Binutils - Deliverables
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