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Copyright update for binutils
[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "sysdep.h"
21 #include "bfd.h"
22 #include "bfd_stdint.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rl78.h"
26 #include "libiberty.h"
27
28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
35 asection *, bfd *, char **);
36
37 /* FIXME: We could omit the SHIFT parameter, it is always zero. */
38 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
40 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
41
42 /* Note that the relocations around 0x7f are internal to this file;
43 feel free to move them as needed to avoid conflicts with published
44 relocation numbers. */
45
46 static reloc_howto_type rl78_elf_howto_table [] =
47 {
48 RL78REL (NONE, 3, 0, 0, dont, FALSE),
49 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
50 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
51 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
52 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
53 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
54 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
55 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
56 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
60 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
61 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
62 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
63 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
64 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
65 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
67
68 EMPTY_HOWTO (0x13),
69 EMPTY_HOWTO (0x14),
70 EMPTY_HOWTO (0x15),
71 EMPTY_HOWTO (0x16),
72 EMPTY_HOWTO (0x17),
73 EMPTY_HOWTO (0x18),
74 EMPTY_HOWTO (0x19),
75 EMPTY_HOWTO (0x1a),
76 EMPTY_HOWTO (0x1b),
77 EMPTY_HOWTO (0x1c),
78 EMPTY_HOWTO (0x1d),
79 EMPTY_HOWTO (0x1e),
80 EMPTY_HOWTO (0x1f),
81
82 EMPTY_HOWTO (0x20),
83 EMPTY_HOWTO (0x21),
84 EMPTY_HOWTO (0x22),
85 EMPTY_HOWTO (0x23),
86 EMPTY_HOWTO (0x24),
87 EMPTY_HOWTO (0x25),
88 EMPTY_HOWTO (0x26),
89 EMPTY_HOWTO (0x27),
90 EMPTY_HOWTO (0x28),
91 EMPTY_HOWTO (0x29),
92 EMPTY_HOWTO (0x2a),
93 EMPTY_HOWTO (0x2b),
94 EMPTY_HOWTO (0x2c),
95 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
96
97 EMPTY_HOWTO (0x2e),
98 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
99 EMPTY_HOWTO (0x30),
100 EMPTY_HOWTO (0x31),
101 EMPTY_HOWTO (0x32),
102 EMPTY_HOWTO (0x33),
103 EMPTY_HOWTO (0x34),
104 EMPTY_HOWTO (0x35),
105 EMPTY_HOWTO (0x36),
106 EMPTY_HOWTO (0x37),
107 EMPTY_HOWTO (0x38),
108 EMPTY_HOWTO (0x39),
109 EMPTY_HOWTO (0x3a),
110 EMPTY_HOWTO (0x3b),
111 EMPTY_HOWTO (0x3c),
112 EMPTY_HOWTO (0x3d),
113 EMPTY_HOWTO (0x3e),
114 EMPTY_HOWTO (0x3f),
115 EMPTY_HOWTO (0x40),
116
117 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
119 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
122 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
134
135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
136
137 EMPTY_HOWTO (0x52),
138 EMPTY_HOWTO (0x53),
139 EMPTY_HOWTO (0x54),
140 EMPTY_HOWTO (0x55),
141 EMPTY_HOWTO (0x56),
142 EMPTY_HOWTO (0x57),
143 EMPTY_HOWTO (0x58),
144 EMPTY_HOWTO (0x59),
145 EMPTY_HOWTO (0x5a),
146 EMPTY_HOWTO (0x5b),
147 EMPTY_HOWTO (0x5c),
148 EMPTY_HOWTO (0x5d),
149 EMPTY_HOWTO (0x5e),
150 EMPTY_HOWTO (0x5f),
151 EMPTY_HOWTO (0x60),
152 EMPTY_HOWTO (0x61),
153 EMPTY_HOWTO (0x62),
154 EMPTY_HOWTO (0x63),
155 EMPTY_HOWTO (0x64),
156 EMPTY_HOWTO (0x65),
157 EMPTY_HOWTO (0x66),
158 EMPTY_HOWTO (0x67),
159 EMPTY_HOWTO (0x68),
160 EMPTY_HOWTO (0x69),
161 EMPTY_HOWTO (0x6a),
162 EMPTY_HOWTO (0x6b),
163 EMPTY_HOWTO (0x6c),
164 EMPTY_HOWTO (0x6d),
165 EMPTY_HOWTO (0x6e),
166 EMPTY_HOWTO (0x6f),
167 EMPTY_HOWTO (0x70),
168 EMPTY_HOWTO (0x71),
169 EMPTY_HOWTO (0x72),
170 EMPTY_HOWTO (0x73),
171 EMPTY_HOWTO (0x74),
172 EMPTY_HOWTO (0x75),
173 EMPTY_HOWTO (0x76),
174 EMPTY_HOWTO (0x77),
175
176 EMPTY_HOWTO (0x78),
177 EMPTY_HOWTO (0x79),
178 EMPTY_HOWTO (0x7a),
179 EMPTY_HOWTO (0x7b),
180 EMPTY_HOWTO (0x7c),
181 EMPTY_HOWTO (0x7d),
182 EMPTY_HOWTO (0x7e),
183 EMPTY_HOWTO (0x7f),
184
185 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
186 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
187 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
188 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
189 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
191 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
192 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
194 EMPTY_HOWTO (0x89),
195 EMPTY_HOWTO (0x8a),
196 EMPTY_HOWTO (0x8b),
197 EMPTY_HOWTO (0x8c),
198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
199 EMPTY_HOWTO (0x8e),
200 EMPTY_HOWTO (0x8f),
201 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
202 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
203 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
204 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
205 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
208 };
209 \f
210 /* Map BFD reloc types to RL78 ELF reloc types. */
211
212 struct rl78_reloc_map
213 {
214 bfd_reloc_code_real_type bfd_reloc_val;
215 unsigned int rl78_reloc_val;
216 };
217
218 static const struct rl78_reloc_map rl78_reloc_map [] =
219 {
220 { BFD_RELOC_NONE, R_RL78_NONE },
221 { BFD_RELOC_8, R_RL78_DIR8S },
222 { BFD_RELOC_16, R_RL78_DIR16S },
223 { BFD_RELOC_24, R_RL78_DIR24S },
224 { BFD_RELOC_32, R_RL78_DIR32 },
225 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
226 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
227 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
228 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
229 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
230 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
231 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
232 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
233 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
234 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
235 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
236 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
237 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
238 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
239 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
240 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
241 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
242 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
243 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
244 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
245 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
246 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
247 };
248
249 static reloc_howto_type *
250 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
251 bfd_reloc_code_real_type code)
252 {
253 unsigned int i;
254
255 if (code == BFD_RELOC_RL78_32_OP)
256 return rl78_elf_howto_table + R_RL78_DIR32;
257
258 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
259 if (rl78_reloc_map [i].bfd_reloc_val == code)
260 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
261
262 return NULL;
263 }
264
265 static reloc_howto_type *
266 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
267 {
268 unsigned int i;
269
270 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
271 if (rl78_elf_howto_table[i].name != NULL
272 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
273 return rl78_elf_howto_table + i;
274
275 return NULL;
276 }
277
278 /* Set the howto pointer for an RL78 ELF reloc. */
279
280 static void
281 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
282 arelent * cache_ptr,
283 Elf_Internal_Rela * dst)
284 {
285 unsigned int r_type;
286
287 r_type = ELF32_R_TYPE (dst->r_info);
288 if (r_type >= (unsigned int) R_RL78_max)
289 {
290 _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
291 r_type = 0;
292 }
293 cache_ptr->howto = rl78_elf_howto_table + r_type;
294 }
295 \f
296 static bfd_vma
297 get_symbol_value (const char * name,
298 bfd_reloc_status_type * status,
299 struct bfd_link_info * info,
300 bfd * input_bfd,
301 asection * input_section,
302 int offset)
303 {
304 struct bfd_link_hash_entry * h;
305
306 if (info == NULL)
307 return 0;
308
309 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
310
311 if (h == NULL
312 || (h->type != bfd_link_hash_defined
313 && h->type != bfd_link_hash_defweak))
314 {
315 bfd_reloc_status_type res;
316
317 res = info->callbacks->undefined_symbol
318 (info, name, input_bfd, input_section, offset, TRUE);
319 if (status)
320 * status = res;
321 return 0;
322 }
323
324 return (h->u.def.value
325 + h->u.def.section->output_section->vma
326 + h->u.def.section->output_offset);
327 }
328
329 static bfd_vma
330 get_romstart (bfd_reloc_status_type * status,
331 struct bfd_link_info * info,
332 bfd * abfd,
333 asection * sec,
334 int offset)
335 {
336 static bfd_boolean cached = FALSE;
337 static bfd_vma cached_value = 0;
338 static bfd_reloc_status_type cached_status;
339
340 if (!cached)
341 {
342 cached_value = get_symbol_value ("_start", & cached_status, info, abfd, sec, offset);
343 cached = TRUE;
344 }
345 if (status)
346 * status = cached_status;
347 return cached_value;
348 }
349
350 static bfd_vma
351 get_ramstart (bfd_reloc_status_type * status,
352 struct bfd_link_info * info,
353 bfd * abfd,
354 asection * sec,
355 int offset)
356 {
357 static bfd_boolean cached = FALSE;
358 static bfd_vma cached_value = 0;
359 static bfd_reloc_status_type cached_status;
360
361 if (!cached)
362 {
363 cached_value = get_symbol_value ("__datastart", & cached_status, info, abfd, sec, offset);
364 cached = TRUE;
365 }
366 if (status)
367 * status = cached_status;
368 return cached_value;
369 }
370
371 #define NUM_STACK_ENTRIES 16
372 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
373 static unsigned int rl78_stack_top;
374
375 #define RL78_STACK_PUSH(val) \
376 do \
377 { \
378 if (rl78_stack_top < NUM_STACK_ENTRIES) \
379 rl78_stack [rl78_stack_top ++] = (val); \
380 else \
381 _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
382 } \
383 while (0)
384
385 #define RL78_STACK_POP(dest) \
386 do \
387 { \
388 if (rl78_stack_top > 0) \
389 (dest) = rl78_stack [-- rl78_stack_top];\
390 else \
391 { \
392 _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
393 (dest) = 0; \
394 } \
395 } \
396 while (0)
397
398 /* Special handling for RL78 complex relocs. Returns the
399 value of the reloc, or 0 for relocs which do not generate
400 a result. SYMVAL is the value of the symbol for relocs
401 which use a symbolic argument. */
402
403 static bfd_vma
404 rl78_compute_complex_reloc (unsigned long r_type,
405 bfd_vma symval,
406 asection * input_section)
407 {
408 int32_t tmp1, tmp2;
409 bfd_vma relocation;
410
411 switch (r_type)
412 {
413 default:
414 return 0;
415
416 case R_RL78_ABS24S_PCREL:
417 case R_RL78_ABS16S_PCREL:
418 case R_RL78_ABS8S_PCREL:
419 RL78_STACK_POP (relocation);
420 relocation -= input_section->output_section->vma + input_section->output_offset;
421 return relocation;
422
423 case R_RL78_ABS32:
424 case R_RL78_ABS32_REV:
425 case R_RL78_ABS16:
426 case R_RL78_ABS16_REV:
427 case R_RL78_ABS16S:
428 case R_RL78_ABS16U:
429 case R_RL78_ABS8:
430 case R_RL78_ABS8U:
431 case R_RL78_ABS8S:
432 RL78_STACK_POP (relocation);
433 return relocation;
434
435 case R_RL78_ABS16UL:
436 case R_RL78_ABS8UL:
437 RL78_STACK_POP (relocation);
438 return relocation >> 2;
439
440 case R_RL78_ABS16UW:
441 case R_RL78_ABS8UW:
442 RL78_STACK_POP (relocation);
443 return relocation >> 1;
444
445 /* The rest of the relocs compute values and then push them onto the stack. */
446 case R_RL78_OPramtop:
447 case R_RL78_OPromtop:
448 case R_RL78_SYM:
449 RL78_STACK_PUSH (symval);
450 return 0;
451
452 case R_RL78_OPneg:
453 RL78_STACK_POP (tmp1);
454 tmp1 = - tmp1;
455 RL78_STACK_PUSH (tmp1);
456 return 0;
457
458 case R_RL78_OPadd:
459 RL78_STACK_POP (tmp2);
460 RL78_STACK_POP (tmp1);
461 tmp1 += tmp2;
462 RL78_STACK_PUSH (tmp1);
463 return 0;
464
465 case R_RL78_OPsub:
466 /* For the expression "A - B", the assembler pushes A,
467 then B, then OPSUB. So the first op we pop is B, not A. */
468 RL78_STACK_POP (tmp2); /* B */
469 RL78_STACK_POP (tmp1); /* A */
470 tmp1 -= tmp2; /* A - B */
471 RL78_STACK_PUSH (tmp1);
472 return 0;
473
474 case R_RL78_OPmul:
475 RL78_STACK_POP (tmp2);
476 RL78_STACK_POP (tmp1);
477 tmp1 *= tmp2;
478 RL78_STACK_PUSH (tmp1);
479 return 0;
480
481 case R_RL78_OPdiv:
482 RL78_STACK_POP (tmp2);
483 RL78_STACK_POP (tmp1);
484 tmp1 /= tmp2;
485 RL78_STACK_PUSH (tmp1);
486 return 0;
487
488 case R_RL78_OPshla:
489 RL78_STACK_POP (tmp2);
490 RL78_STACK_POP (tmp1);
491 tmp1 <<= tmp2;
492 RL78_STACK_PUSH (tmp1);
493 return 0;
494
495 case R_RL78_OPshra:
496 RL78_STACK_POP (tmp2);
497 RL78_STACK_POP (tmp1);
498 tmp1 >>= tmp2;
499 RL78_STACK_PUSH (tmp1);
500 return 0;
501
502 case R_RL78_OPsctsize:
503 RL78_STACK_PUSH (input_section->size);
504 return 0;
505
506 case R_RL78_OPscttop:
507 RL78_STACK_PUSH (input_section->output_section->vma);
508 return 0;
509
510 case R_RL78_OPand:
511 RL78_STACK_POP (tmp2);
512 RL78_STACK_POP (tmp1);
513 tmp1 &= tmp2;
514 RL78_STACK_PUSH (tmp1);
515 return 0;
516
517 case R_RL78_OPor:
518 RL78_STACK_POP (tmp2);
519 RL78_STACK_POP (tmp1);
520 tmp1 |= tmp2;
521 RL78_STACK_PUSH (tmp1);
522 return 0;
523
524 case R_RL78_OPxor:
525 RL78_STACK_POP (tmp2);
526 RL78_STACK_POP (tmp1);
527 tmp1 ^= tmp2;
528 RL78_STACK_PUSH (tmp1);
529 return 0;
530
531 case R_RL78_OPnot:
532 RL78_STACK_POP (tmp1);
533 tmp1 = ~ tmp1;
534 RL78_STACK_PUSH (tmp1);
535 return 0;
536
537 case R_RL78_OPmod:
538 RL78_STACK_POP (tmp2);
539 RL78_STACK_POP (tmp1);
540 tmp1 %= tmp2;
541 RL78_STACK_PUSH (tmp1);
542 return 0;
543 }
544 }
545
546 #undef RL78_STACK_PUSH
547 #undef RL78_STACK_POP
548
549 #define OP(i) (contents[reloc->address + (i)])
550
551 static bfd_reloc_status_type
552 rl78_special_reloc (bfd * input_bfd,
553 arelent * reloc,
554 asymbol * symbol,
555 void * data,
556 asection * input_section,
557 bfd * output_bfd ATTRIBUTE_UNUSED,
558 char ** error_message ATTRIBUTE_UNUSED)
559 {
560 bfd_reloc_status_type r = bfd_reloc_ok;
561 bfd_vma relocation = 0;
562 unsigned long r_type = reloc->howto->type;
563 bfd_byte * contents = data;
564
565 /* If necessary, compute the symbolic value of the relocation. */
566 switch (r_type)
567 {
568 case R_RL78_SYM:
569 relocation = (symbol->value
570 + symbol->section->output_section->vma
571 + symbol->section->output_offset
572 + reloc->addend);
573 break;
574
575 case R_RL78_OPromtop:
576 relocation = get_romstart (&r, NULL, input_bfd, input_section,
577 reloc->address);
578 break;
579
580 case R_RL78_OPramtop:
581 relocation = get_ramstart (&r, NULL, input_bfd, input_section,
582 reloc->address);
583 break;
584 }
585
586 /* Get the value of the relocation. */
587 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
588
589 /* If the relocation alters the contents of the section then apply it now.
590 Note - since this function is called from
591 bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
592 and not from the linker, we do not perform any range checking. The
593 clients who are calling us are only interested in some relocated section
594 contents, and not any linkage problems that might occur later. */
595 switch (r_type)
596 {
597 case R_RL78_ABS32:
598 OP (0) = relocation;
599 OP (1) = relocation >> 8;
600 OP (2) = relocation >> 16;
601 OP (3) = relocation >> 24;
602 break;
603
604 case R_RL78_ABS32_REV:
605 OP (3) = relocation;
606 OP (2) = relocation >> 8;
607 OP (1) = relocation >> 16;
608 OP (0) = relocation >> 24;
609 break;
610
611 case R_RL78_ABS24S_PCREL:
612 case R_RL78_ABS24S:
613 OP (0) = relocation;
614 OP (1) = relocation >> 8;
615 OP (2) = relocation >> 16;
616 break;
617
618 case R_RL78_ABS16_REV:
619 OP (1) = relocation;
620 OP (0) = relocation >> 8;
621 break;
622
623 case R_RL78_ABS16S_PCREL:
624 case R_RL78_ABS16:
625 case R_RL78_ABS16S:
626 case R_RL78_ABS16U:
627 case R_RL78_ABS16UL:
628 case R_RL78_ABS16UW:
629 OP (0) = relocation;
630 OP (1) = relocation >> 8;
631 break;
632
633 case R_RL78_ABS8S_PCREL:
634 case R_RL78_ABS8:
635 case R_RL78_ABS8U:
636 case R_RL78_ABS8UL:
637 case R_RL78_ABS8UW:
638 case R_RL78_ABS8S:
639 OP (0) = relocation;
640 break;
641
642 default:
643 break;
644 }
645
646 return r;
647 }
648
649 #undef OP
650 #define OP(i) (contents[rel->r_offset + (i)])
651
652 /* Relocate an RL78 ELF section.
653 There is some attempt to make this function usable for many architectures,
654 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
655 if only to serve as a learning tool.
656
657 The RELOCATE_SECTION function is called by the new ELF backend linker
658 to handle the relocations for a section.
659
660 The relocs are always passed as Rela structures; if the section
661 actually uses Rel structures, the r_addend field will always be
662 zero.
663
664 This function is responsible for adjusting the section contents as
665 necessary, and (if using Rela relocs and generating a relocatable
666 output file) adjusting the reloc addend as necessary.
667
668 This function does not have to worry about setting the reloc
669 address or the reloc symbol index.
670
671 LOCAL_SYMS is a pointer to the swapped in local symbols.
672
673 LOCAL_SECTIONS is an array giving the section in the input file
674 corresponding to the st_shndx field of each local symbol.
675
676 The global hash table entry for the global symbols can be found
677 via elf_sym_hashes (input_bfd).
678
679 When generating relocatable output, this function must handle
680 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
681 going to be the section symbol corresponding to the output
682 section, which means that the addend must be adjusted
683 accordingly. */
684
685 static bfd_boolean
686 rl78_elf_relocate_section
687 (bfd * output_bfd,
688 struct bfd_link_info * info,
689 bfd * input_bfd,
690 asection * input_section,
691 bfd_byte * contents,
692 Elf_Internal_Rela * relocs,
693 Elf_Internal_Sym * local_syms,
694 asection ** local_sections)
695 {
696 Elf_Internal_Shdr * symtab_hdr;
697 struct elf_link_hash_entry ** sym_hashes;
698 Elf_Internal_Rela * rel;
699 Elf_Internal_Rela * relend;
700 bfd *dynobj;
701 asection *splt;
702
703 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
704 sym_hashes = elf_sym_hashes (input_bfd);
705 relend = relocs + input_section->reloc_count;
706
707 dynobj = elf_hash_table (info)->dynobj;
708 splt = NULL;
709 if (dynobj != NULL)
710 splt = bfd_get_linker_section (dynobj, ".plt");
711
712 for (rel = relocs; rel < relend; rel ++)
713 {
714 reloc_howto_type * howto;
715 unsigned long r_symndx;
716 Elf_Internal_Sym * sym;
717 asection * sec;
718 struct elf_link_hash_entry * h;
719 bfd_vma relocation;
720 bfd_reloc_status_type r;
721 const char * name = NULL;
722 bfd_boolean unresolved_reloc = TRUE;
723 int r_type;
724
725 r_type = ELF32_R_TYPE (rel->r_info);
726 r_symndx = ELF32_R_SYM (rel->r_info);
727
728 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
729 h = NULL;
730 sym = NULL;
731 sec = NULL;
732 relocation = 0;
733
734 if (r_symndx < symtab_hdr->sh_info)
735 {
736 sym = local_syms + r_symndx;
737 sec = local_sections [r_symndx];
738 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
739
740 name = bfd_elf_string_from_elf_section
741 (input_bfd, symtab_hdr->sh_link, sym->st_name);
742 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
743 }
744 else
745 {
746 bfd_boolean warned ATTRIBUTE_UNUSED;
747 bfd_boolean ignored ATTRIBUTE_UNUSED;
748
749 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
750 r_symndx, symtab_hdr, sym_hashes, h,
751 sec, relocation, unresolved_reloc,
752 warned, ignored);
753
754 name = h->root.root.string;
755 }
756
757 if (sec != NULL && discarded_section (sec))
758 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
759 rel, 1, relend, howto, 0, contents);
760
761 if (bfd_link_relocatable (info))
762 {
763 /* This is a relocatable link. We don't have to change
764 anything, unless the reloc is against a section symbol,
765 in which case we have to adjust according to where the
766 section symbol winds up in the output section. */
767 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
768 rel->r_addend += sec->output_offset;
769 continue;
770 }
771
772 switch (ELF32_R_TYPE (rel->r_info))
773 {
774 case R_RL78_DIR16S:
775 {
776 bfd_vma *plt_offset;
777
778 if (h != NULL)
779 plt_offset = &h->plt.offset;
780 else
781 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
782
783 if (! valid_16bit_address (relocation))
784 {
785 /* If this is the first time we've processed this symbol,
786 fill in the plt entry with the correct symbol address. */
787 if ((*plt_offset & 1) == 0)
788 {
789 unsigned int x;
790
791 x = 0x000000ec; /* br !!abs24 */
792 x |= (relocation << 8) & 0xffffff00;
793 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
794 *plt_offset |= 1;
795 }
796
797 relocation = (splt->output_section->vma
798 + splt->output_offset
799 + (*plt_offset & -2));
800 if (name)
801 {
802 char *newname = bfd_malloc (strlen(name)+5);
803 strcpy (newname, name);
804 strcat(newname, ".plt");
805 _bfd_generic_link_add_one_symbol (info,
806 input_bfd,
807 newname,
808 BSF_FUNCTION | BSF_WEAK,
809 splt,
810 (*plt_offset & -2),
811 0,
812 1,
813 0,
814 0);
815 }
816 }
817 }
818 break;
819 }
820
821 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
822 /* If the symbol is undefined and weak
823 then the relocation resolves to zero. */
824 relocation = 0;
825 else
826 {
827 if (howto->pc_relative)
828 {
829 relocation -= (input_section->output_section->vma
830 + input_section->output_offset
831 + rel->r_offset);
832 relocation -= bfd_get_reloc_size (howto);
833 }
834
835 relocation += rel->r_addend;
836 }
837
838 r = bfd_reloc_ok;
839
840 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
841
842 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
843 switch (r_type)
844 {
845 case R_RL78_NONE:
846 break;
847
848 case R_RL78_RH_RELAX:
849 break;
850
851 case R_RL78_DIR8S_PCREL:
852 RANGE (-128, 127);
853 OP (0) = relocation;
854 break;
855
856 case R_RL78_DIR8S:
857 RANGE (-128, 255);
858 OP (0) = relocation;
859 break;
860
861 case R_RL78_DIR8U:
862 RANGE (0, 255);
863 OP (0) = relocation;
864 break;
865
866 case R_RL78_DIR16S_PCREL:
867 RANGE (-32768, 32767);
868 OP (0) = relocation;
869 OP (1) = relocation >> 8;
870 break;
871
872 case R_RL78_DIR16S:
873 if ((relocation & 0xf0000) == 0xf0000)
874 relocation &= 0xffff;
875 RANGE (-32768, 65535);
876 OP (0) = relocation;
877 OP (1) = relocation >> 8;
878 break;
879
880 case R_RL78_DIR16U:
881 RANGE (0, 65536);
882 OP (0) = relocation;
883 OP (1) = relocation >> 8;
884 break;
885
886 case R_RL78_DIR16:
887 RANGE (-32768, 65536);
888 OP (0) = relocation;
889 OP (1) = relocation >> 8;
890 break;
891
892 case R_RL78_DIR16_REV:
893 RANGE (-32768, 65536);
894 OP (1) = relocation;
895 OP (0) = relocation >> 8;
896 break;
897
898 case R_RL78_DIR3U_PCREL:
899 RANGE (3, 10);
900 OP (0) &= 0xf8;
901 OP (0) |= relocation & 0x07;
902 break;
903
904 case R_RL78_DIR24S_PCREL:
905 RANGE (-0x800000, 0x7fffff);
906 OP (0) = relocation;
907 OP (1) = relocation >> 8;
908 OP (2) = relocation >> 16;
909 break;
910
911 case R_RL78_DIR24S:
912 RANGE (-0x800000, 0x7fffff);
913 OP (0) = relocation;
914 OP (1) = relocation >> 8;
915 OP (2) = relocation >> 16;
916 break;
917
918 case R_RL78_DIR32:
919 OP (0) = relocation;
920 OP (1) = relocation >> 8;
921 OP (2) = relocation >> 16;
922 OP (3) = relocation >> 24;
923 break;
924
925 case R_RL78_DIR32_REV:
926 OP (3) = relocation;
927 OP (2) = relocation >> 8;
928 OP (1) = relocation >> 16;
929 OP (0) = relocation >> 24;
930 break;
931
932 case R_RL78_RH_SFR:
933 RANGE (0xfff00, 0xfffff);
934 OP (0) = relocation & 0xff;
935 break;
936
937 case R_RL78_RH_SADDR:
938 RANGE (0xffe20, 0xfff1f);
939 OP (0) = relocation & 0xff;
940 break;
941
942 /* Complex reloc handling: */
943 case R_RL78_ABS32:
944 case R_RL78_ABS32_REV:
945 case R_RL78_ABS24S_PCREL:
946 case R_RL78_ABS24S:
947 case R_RL78_ABS16:
948 case R_RL78_ABS16_REV:
949 case R_RL78_ABS16S_PCREL:
950 case R_RL78_ABS16S:
951 case R_RL78_ABS16U:
952 case R_RL78_ABS16UL:
953 case R_RL78_ABS16UW:
954 case R_RL78_ABS8:
955 case R_RL78_ABS8U:
956 case R_RL78_ABS8UL:
957 case R_RL78_ABS8UW:
958 case R_RL78_ABS8S_PCREL:
959 case R_RL78_ABS8S:
960 case R_RL78_OPneg:
961 case R_RL78_OPadd:
962 case R_RL78_OPsub:
963 case R_RL78_OPmul:
964 case R_RL78_OPdiv:
965 case R_RL78_OPshla:
966 case R_RL78_OPshra:
967 case R_RL78_OPsctsize:
968 case R_RL78_OPscttop:
969 case R_RL78_OPand:
970 case R_RL78_OPor:
971 case R_RL78_OPxor:
972 case R_RL78_OPnot:
973 case R_RL78_OPmod:
974 relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
975
976 switch (r_type)
977 {
978 case R_RL78_ABS32:
979 OP (0) = relocation;
980 OP (1) = relocation >> 8;
981 OP (2) = relocation >> 16;
982 OP (3) = relocation >> 24;
983 break;
984
985 case R_RL78_ABS32_REV:
986 OP (3) = relocation;
987 OP (2) = relocation >> 8;
988 OP (1) = relocation >> 16;
989 OP (0) = relocation >> 24;
990 break;
991
992 case R_RL78_ABS24S_PCREL:
993 case R_RL78_ABS24S:
994 RANGE (-0x800000, 0x7fffff);
995 OP (0) = relocation;
996 OP (1) = relocation >> 8;
997 OP (2) = relocation >> 16;
998 break;
999
1000 case R_RL78_ABS16:
1001 RANGE (-32768, 65535);
1002 OP (0) = relocation;
1003 OP (1) = relocation >> 8;
1004 break;
1005
1006 case R_RL78_ABS16_REV:
1007 RANGE (-32768, 65535);
1008 OP (1) = relocation;
1009 OP (0) = relocation >> 8;
1010 break;
1011
1012 case R_RL78_ABS16S_PCREL:
1013 case R_RL78_ABS16S:
1014 RANGE (-32768, 32767);
1015 OP (0) = relocation;
1016 OP (1) = relocation >> 8;
1017 break;
1018
1019 case R_RL78_ABS16U:
1020 case R_RL78_ABS16UL:
1021 case R_RL78_ABS16UW:
1022 RANGE (0, 65536);
1023 OP (0) = relocation;
1024 OP (1) = relocation >> 8;
1025 break;
1026
1027 case R_RL78_ABS8:
1028 RANGE (-128, 255);
1029 OP (0) = relocation;
1030 break;
1031
1032 case R_RL78_ABS8U:
1033 case R_RL78_ABS8UL:
1034 case R_RL78_ABS8UW:
1035 RANGE (0, 255);
1036 OP (0) = relocation;
1037 break;
1038
1039 case R_RL78_ABS8S_PCREL:
1040 case R_RL78_ABS8S:
1041 RANGE (-128, 127);
1042 OP (0) = relocation;
1043 break;
1044
1045 default:
1046 break;
1047 }
1048 break;
1049
1050 case R_RL78_SYM:
1051 if (r_symndx < symtab_hdr->sh_info)
1052 relocation = sec->output_section->vma + sec->output_offset
1053 + sym->st_value + rel->r_addend;
1054 else if (h != NULL
1055 && (h->root.type == bfd_link_hash_defined
1056 || h->root.type == bfd_link_hash_defweak))
1057 relocation = h->root.u.def.value
1058 + sec->output_section->vma
1059 + sec->output_offset
1060 + rel->r_addend;
1061 else
1062 {
1063 relocation = 0;
1064 if (h->root.type != bfd_link_hash_undefweak)
1065 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
1066 }
1067 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1068 break;
1069
1070 case R_RL78_OPromtop:
1071 relocation = get_romstart (&r, info, input_bfd, input_section, rel->r_offset);
1072 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1073 break;
1074
1075 case R_RL78_OPramtop:
1076 relocation = get_ramstart (&r, info, input_bfd, input_section, rel->r_offset);
1077 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1078 break;
1079
1080 default:
1081 r = bfd_reloc_notsupported;
1082 break;
1083 }
1084
1085 if (r != bfd_reloc_ok)
1086 {
1087 const char * msg = NULL;
1088
1089 switch (r)
1090 {
1091 case bfd_reloc_overflow:
1092 /* Catch the case of a missing function declaration
1093 and emit a more helpful error message. */
1094 if (r_type == R_RL78_DIR24S_PCREL)
1095 msg = _("%B(%A): error: call to undefined function '%s'");
1096 else
1097 r = info->callbacks->reloc_overflow
1098 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1099 input_bfd, input_section, rel->r_offset);
1100 break;
1101
1102 case bfd_reloc_undefined:
1103 r = info->callbacks->undefined_symbol
1104 (info, name, input_bfd, input_section, rel->r_offset,
1105 TRUE);
1106 break;
1107
1108 case bfd_reloc_other:
1109 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1110 break;
1111
1112 case bfd_reloc_outofrange:
1113 msg = _("%B(%A): internal error: out of range error");
1114 break;
1115
1116 case bfd_reloc_notsupported:
1117 msg = _("%B(%A): internal error: unsupported relocation error");
1118 break;
1119
1120 case bfd_reloc_dangerous:
1121 msg = _("%B(%A): internal error: dangerous relocation");
1122 break;
1123
1124 default:
1125 msg = _("%B(%A): internal error: unknown error");
1126 break;
1127 }
1128
1129 if (msg)
1130 _bfd_error_handler (msg, input_bfd, input_section, name);
1131
1132 if (! r)
1133 return FALSE;
1134 }
1135 }
1136
1137 return TRUE;
1138 }
1139 \f
1140 /* Function to set the ELF flag bits. */
1141
1142 static bfd_boolean
1143 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1144 {
1145 elf_elfheader (abfd)->e_flags = flags;
1146 elf_flags_init (abfd) = TRUE;
1147 return TRUE;
1148 }
1149
1150 static bfd_boolean no_warn_mismatch = FALSE;
1151
1152 void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1153
1154 void
1155 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1156 {
1157 no_warn_mismatch = user_no_warn_mismatch;
1158 }
1159
1160 static const char *
1161 rl78_cpu_name (flagword flags)
1162 {
1163 switch (flags & E_FLAG_RL78_CPU_MASK)
1164 {
1165 default: return "";
1166 case E_FLAG_RL78_G10: return "G10";
1167 case E_FLAG_RL78_G13: return "G13";
1168 case E_FLAG_RL78_G14: return "G14";
1169 }
1170 }
1171
1172 /* Merge backend specific data from an object file to the output
1173 object file when linking. */
1174
1175 static bfd_boolean
1176 rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1177 {
1178 flagword new_flags;
1179 flagword old_flags;
1180 bfd_boolean error = FALSE;
1181
1182 new_flags = elf_elfheader (ibfd)->e_flags;
1183 old_flags = elf_elfheader (obfd)->e_flags;
1184
1185 if (!elf_flags_init (obfd))
1186 {
1187 /* First call, no flags set. */
1188 elf_flags_init (obfd) = TRUE;
1189 elf_elfheader (obfd)->e_flags = new_flags;
1190 }
1191 else if (old_flags != new_flags)
1192 {
1193 flagword changed_flags = old_flags ^ new_flags;
1194
1195 if (changed_flags & E_FLAG_RL78_CPU_MASK)
1196 {
1197 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1198 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
1199
1200 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1201 /* It does not matter what new_cpu may have. */;
1202 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1203 {
1204 if (in_cpu == E_FLAG_RL78_G10)
1205 {
1206 /* G10 files can only be linked with other G10 files.
1207 If the output is set to "any" this means that it is
1208 a G14 file that does not use hardware multiply/divide,
1209 but that is still incompatible with the G10 ABI. */
1210 error = TRUE;
1211
1212 (*_bfd_error_handler)
1213 (_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"),
1214 bfd_get_filename (ibfd),
1215 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1216 }
1217 else
1218 {
1219 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1220 old_flags |= in_cpu;
1221 elf_elfheader (obfd)->e_flags = old_flags;
1222 }
1223 }
1224 else
1225 {
1226 error = TRUE;
1227
1228 (*_bfd_error_handler)
1229 (_("RL78 ABI conflict: cannot link %s file %s with %s file %s"),
1230 rl78_cpu_name (in_cpu), bfd_get_filename (ibfd),
1231 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1232 }
1233 }
1234
1235 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1236 {
1237 (*_bfd_error_handler)
1238 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1239
1240 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1241 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1242 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1243 else
1244 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1245 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1246 error = TRUE;
1247 }
1248 }
1249
1250 return !error;
1251 }
1252 \f
1253 static bfd_boolean
1254 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1255 {
1256 FILE * file = (FILE *) ptr;
1257 flagword flags;
1258
1259 BFD_ASSERT (abfd != NULL && ptr != NULL);
1260
1261 /* Print normal ELF private data. */
1262 _bfd_elf_print_private_bfd_data (abfd, ptr);
1263
1264 flags = elf_elfheader (abfd)->e_flags;
1265 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1266
1267 if (flags & E_FLAG_RL78_CPU_MASK)
1268 fprintf (file, " [%s]", rl78_cpu_name (flags));
1269
1270 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1271 fprintf (file, _(" [64-bit doubles]"));
1272
1273 fputc ('\n', file);
1274 return TRUE;
1275 }
1276
1277 /* Return the MACH for an e_flags value. */
1278
1279 static int
1280 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
1281 {
1282 return bfd_mach_rl78;
1283 }
1284
1285 static bfd_boolean
1286 rl78_elf_object_p (bfd * abfd)
1287 {
1288 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1289 elf32_rl78_machine (abfd));
1290 return TRUE;
1291 }
1292 \f
1293 /* support PLT for 16-bit references to 24-bit functions. */
1294
1295 /* We support 16-bit pointers to code above 64k by generating a thunk
1296 below 64k containing a JMP instruction to the final address. */
1297
1298 static bfd_boolean
1299 rl78_elf_check_relocs
1300 (bfd * abfd,
1301 struct bfd_link_info * info,
1302 asection * sec,
1303 const Elf_Internal_Rela * relocs)
1304 {
1305 Elf_Internal_Shdr * symtab_hdr;
1306 struct elf_link_hash_entry ** sym_hashes;
1307 const Elf_Internal_Rela * rel;
1308 const Elf_Internal_Rela * rel_end;
1309 bfd_vma *local_plt_offsets;
1310 asection *splt;
1311 bfd *dynobj;
1312
1313 if (bfd_link_relocatable (info))
1314 return TRUE;
1315
1316 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1317 sym_hashes = elf_sym_hashes (abfd);
1318 local_plt_offsets = elf_local_got_offsets (abfd);
1319 splt = NULL;
1320 dynobj = elf_hash_table(info)->dynobj;
1321
1322 rel_end = relocs + sec->reloc_count;
1323 for (rel = relocs; rel < rel_end; rel++)
1324 {
1325 struct elf_link_hash_entry *h;
1326 unsigned long r_symndx;
1327 bfd_vma *offset;
1328
1329 r_symndx = ELF32_R_SYM (rel->r_info);
1330 if (r_symndx < symtab_hdr->sh_info)
1331 h = NULL;
1332 else
1333 {
1334 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1335 while (h->root.type == bfd_link_hash_indirect
1336 || h->root.type == bfd_link_hash_warning)
1337 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1338
1339 /* PR15323, ref flags aren't set for references in the same
1340 object. */
1341 h->root.non_ir_ref = 1;
1342 }
1343
1344 switch (ELF32_R_TYPE (rel->r_info))
1345 {
1346 /* This relocation describes a 16-bit pointer to a function.
1347 We may need to allocate a thunk in low memory; reserve memory
1348 for it now. */
1349 case R_RL78_DIR16S:
1350 if (dynobj == NULL)
1351 elf_hash_table (info)->dynobj = dynobj = abfd;
1352 if (splt == NULL)
1353 {
1354 splt = bfd_get_linker_section (dynobj, ".plt");
1355 if (splt == NULL)
1356 {
1357 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1358 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1359 | SEC_READONLY | SEC_CODE);
1360 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1361 flags);
1362 if (splt == NULL
1363 || ! bfd_set_section_alignment (dynobj, splt, 1))
1364 return FALSE;
1365 }
1366 }
1367
1368 if (h != NULL)
1369 offset = &h->plt.offset;
1370 else
1371 {
1372 if (local_plt_offsets == NULL)
1373 {
1374 size_t size;
1375 unsigned int i;
1376
1377 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1378 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1379 if (local_plt_offsets == NULL)
1380 return FALSE;
1381 elf_local_got_offsets (abfd) = local_plt_offsets;
1382
1383 for (i = 0; i < symtab_hdr->sh_info; i++)
1384 local_plt_offsets[i] = (bfd_vma) -1;
1385 }
1386 offset = &local_plt_offsets[r_symndx];
1387 }
1388
1389 if (*offset == (bfd_vma) -1)
1390 {
1391 *offset = splt->size;
1392 splt->size += 4;
1393 }
1394 break;
1395 }
1396 }
1397
1398 return TRUE;
1399 }
1400
1401 /* This must exist if dynobj is ever set. */
1402
1403 static bfd_boolean
1404 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1405 struct bfd_link_info *info)
1406 {
1407 bfd *dynobj;
1408 asection *splt;
1409
1410 if (!elf_hash_table (info)->dynamic_sections_created)
1411 return TRUE;
1412
1413 /* As an extra sanity check, verify that all plt entries have been
1414 filled in. However, relaxing might have changed the relocs so
1415 that some plt entries don't get filled in, so we have to skip
1416 this check if we're relaxing. Unfortunately, check_relocs is
1417 called before relaxation. */
1418
1419 if (info->relax_trip > 0)
1420 return TRUE;
1421
1422 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1423 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
1424 {
1425 bfd_byte *contents = splt->contents;
1426 unsigned int i, size = splt->size;
1427
1428 for (i = 0; i < size; i += 4)
1429 {
1430 unsigned int x = bfd_get_32 (dynobj, contents + i);
1431 BFD_ASSERT (x != 0);
1432 }
1433 }
1434
1435 return TRUE;
1436 }
1437
1438 static bfd_boolean
1439 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1440 struct bfd_link_info *info)
1441 {
1442 bfd *dynobj;
1443 asection *splt;
1444
1445 if (bfd_link_relocatable (info))
1446 return TRUE;
1447
1448 dynobj = elf_hash_table (info)->dynobj;
1449 if (dynobj == NULL)
1450 return TRUE;
1451
1452 splt = bfd_get_linker_section (dynobj, ".plt");
1453 BFD_ASSERT (splt != NULL);
1454
1455 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1456 if (splt->contents == NULL)
1457 return FALSE;
1458
1459 return TRUE;
1460 }
1461
1462 \f
1463
1464 /* Handle relaxing. */
1465
1466 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1467 is within the low 64k, remove any entry for it in the plt. */
1468
1469 struct relax_plt_data
1470 {
1471 asection *splt;
1472 bfd_boolean *again;
1473 };
1474
1475 static bfd_boolean
1476 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
1477 {
1478 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1479
1480 if (h->plt.offset != (bfd_vma) -1)
1481 {
1482 bfd_vma address;
1483
1484 if (h->root.type == bfd_link_hash_undefined
1485 || h->root.type == bfd_link_hash_undefweak)
1486 address = 0;
1487 else
1488 address = (h->root.u.def.section->output_section->vma
1489 + h->root.u.def.section->output_offset
1490 + h->root.u.def.value);
1491
1492 if (valid_16bit_address (address))
1493 {
1494 h->plt.offset = -1;
1495 data->splt->size -= 4;
1496 *data->again = TRUE;
1497 }
1498 }
1499
1500 return TRUE;
1501 }
1502
1503 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1504 previously had a plt entry, give it a new entry offset. */
1505
1506 static bfd_boolean
1507 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
1508 {
1509 bfd_vma *entry = (bfd_vma *) xdata;
1510
1511 if (h->plt.offset != (bfd_vma) -1)
1512 {
1513 h->plt.offset = *entry;
1514 *entry += 4;
1515 }
1516
1517 return TRUE;
1518 }
1519
1520 static bfd_boolean
1521 rl78_elf_relax_plt_section (bfd *dynobj,
1522 asection *splt,
1523 struct bfd_link_info *info,
1524 bfd_boolean *again)
1525 {
1526 struct relax_plt_data relax_plt_data;
1527 bfd *ibfd;
1528
1529 /* Assume nothing changes. */
1530 *again = FALSE;
1531
1532 if (bfd_link_relocatable (info))
1533 return TRUE;
1534
1535 /* We only relax the .plt section at the moment. */
1536 if (dynobj != elf_hash_table (info)->dynobj
1537 || strcmp (splt->name, ".plt") != 0)
1538 return TRUE;
1539
1540 /* Quick check for an empty plt. */
1541 if (splt->size == 0)
1542 return TRUE;
1543
1544 /* Map across all global symbols; see which ones happen to
1545 fall in the low 64k. */
1546 relax_plt_data.splt = splt;
1547 relax_plt_data.again = again;
1548 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1549 &relax_plt_data);
1550
1551 /* Likewise for local symbols, though that's somewhat less convenient
1552 as we have to walk the list of input bfds and swap in symbol data. */
1553 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1554 {
1555 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1556 Elf_Internal_Shdr *symtab_hdr;
1557 Elf_Internal_Sym *isymbuf = NULL;
1558 unsigned int idx;
1559
1560 if (! local_plt_offsets)
1561 continue;
1562
1563 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1564 if (symtab_hdr->sh_info != 0)
1565 {
1566 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1567 if (isymbuf == NULL)
1568 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1569 symtab_hdr->sh_info, 0,
1570 NULL, NULL, NULL);
1571 if (isymbuf == NULL)
1572 return FALSE;
1573 }
1574
1575 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1576 {
1577 Elf_Internal_Sym *isym;
1578 asection *tsec;
1579 bfd_vma address;
1580
1581 if (local_plt_offsets[idx] == (bfd_vma) -1)
1582 continue;
1583
1584 isym = &isymbuf[idx];
1585 if (isym->st_shndx == SHN_UNDEF)
1586 continue;
1587 else if (isym->st_shndx == SHN_ABS)
1588 tsec = bfd_abs_section_ptr;
1589 else if (isym->st_shndx == SHN_COMMON)
1590 tsec = bfd_com_section_ptr;
1591 else
1592 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1593
1594 address = (tsec->output_section->vma
1595 + tsec->output_offset
1596 + isym->st_value);
1597 if (valid_16bit_address (address))
1598 {
1599 local_plt_offsets[idx] = -1;
1600 splt->size -= 4;
1601 *again = TRUE;
1602 }
1603 }
1604
1605 if (isymbuf != NULL
1606 && symtab_hdr->contents != (unsigned char *) isymbuf)
1607 {
1608 if (! info->keep_memory)
1609 free (isymbuf);
1610 else
1611 {
1612 /* Cache the symbols for elf_link_input_bfd. */
1613 symtab_hdr->contents = (unsigned char *) isymbuf;
1614 }
1615 }
1616 }
1617
1618 /* If we changed anything, walk the symbols again to reallocate
1619 .plt entry addresses. */
1620 if (*again && splt->size > 0)
1621 {
1622 bfd_vma entry = 0;
1623
1624 elf_link_hash_traverse (elf_hash_table (info),
1625 rl78_relax_plt_realloc, &entry);
1626
1627 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1628 {
1629 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1630 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1631 unsigned int idx;
1632
1633 if (! local_plt_offsets)
1634 continue;
1635
1636 for (idx = 0; idx < nlocals; ++idx)
1637 if (local_plt_offsets[idx] != (bfd_vma) -1)
1638 {
1639 local_plt_offsets[idx] = entry;
1640 entry += 4;
1641 }
1642 }
1643 }
1644
1645 return TRUE;
1646 }
1647
1648 /* Delete some bytes from a section while relaxing. */
1649
1650 static bfd_boolean
1651 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1652 Elf_Internal_Rela *alignment_rel, int force_snip)
1653 {
1654 Elf_Internal_Shdr * symtab_hdr;
1655 unsigned int sec_shndx;
1656 bfd_byte * contents;
1657 Elf_Internal_Rela * irel;
1658 Elf_Internal_Rela * irelend;
1659 Elf_Internal_Sym * isym;
1660 Elf_Internal_Sym * isymend;
1661 bfd_vma toaddr;
1662 unsigned int symcount;
1663 struct elf_link_hash_entry ** sym_hashes;
1664 struct elf_link_hash_entry ** end_hashes;
1665
1666 if (!alignment_rel)
1667 force_snip = 1;
1668
1669 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1670
1671 contents = elf_section_data (sec)->this_hdr.contents;
1672
1673 /* The deletion must stop at the next alignment boundary, if
1674 ALIGNMENT_REL is non-NULL. */
1675 toaddr = sec->size;
1676 if (alignment_rel)
1677 toaddr = alignment_rel->r_offset;
1678
1679 irel = elf_section_data (sec)->relocs;
1680 if (irel == NULL)
1681 {
1682 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1683 irel = elf_section_data (sec)->relocs;
1684 }
1685
1686 irelend = irel + sec->reloc_count;
1687
1688 /* Actually delete the bytes. */
1689 memmove (contents + addr, contents + addr + count,
1690 (size_t) (toaddr - addr - count));
1691
1692 /* If we don't have an alignment marker to worry about, we can just
1693 shrink the section. Otherwise, we have to fill in the newly
1694 created gap with NOP insns (0x03). */
1695 if (force_snip)
1696 sec->size -= count;
1697 else
1698 memset (contents + toaddr - count, 0x03, count);
1699
1700 /* Adjust all the relocs. */
1701 for (; irel && irel < irelend; irel++)
1702 {
1703 /* Get the new reloc address. */
1704 if (irel->r_offset > addr
1705 && (irel->r_offset < toaddr
1706 || (force_snip && irel->r_offset == toaddr)))
1707 irel->r_offset -= count;
1708
1709 /* If we see an ALIGN marker at the end of the gap, we move it
1710 to the beginning of the gap, since marking these gaps is what
1711 they're for. */
1712 if (irel->r_offset == toaddr
1713 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1714 && irel->r_addend & RL78_RELAXA_ALIGN)
1715 irel->r_offset -= count;
1716 }
1717
1718 /* Adjust the local symbols defined in this section. */
1719 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1720 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1721 isymend = isym + symtab_hdr->sh_info;
1722
1723 for (; isym < isymend; isym++)
1724 {
1725 /* If the symbol is in the range of memory we just moved, we
1726 have to adjust its value. */
1727 if (isym->st_shndx == sec_shndx
1728 && isym->st_value > addr
1729 && isym->st_value < toaddr)
1730 isym->st_value -= count;
1731
1732 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1733 *end* is in the moved bytes but it's *start* isn't), then we
1734 must adjust its size. */
1735 if (isym->st_shndx == sec_shndx
1736 && isym->st_value < addr
1737 && isym->st_value + isym->st_size > addr
1738 && isym->st_value + isym->st_size < toaddr)
1739 isym->st_size -= count;
1740 }
1741
1742 /* Now adjust the global symbols defined in this section. */
1743 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1744 - symtab_hdr->sh_info);
1745 sym_hashes = elf_sym_hashes (abfd);
1746 end_hashes = sym_hashes + symcount;
1747
1748 for (; sym_hashes < end_hashes; sym_hashes++)
1749 {
1750 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1751
1752 if ((sym_hash->root.type == bfd_link_hash_defined
1753 || sym_hash->root.type == bfd_link_hash_defweak)
1754 && sym_hash->root.u.def.section == sec)
1755 {
1756 /* As above, adjust the value if needed. */
1757 if (sym_hash->root.u.def.value > addr
1758 && sym_hash->root.u.def.value < toaddr)
1759 sym_hash->root.u.def.value -= count;
1760
1761 /* As above, adjust the size if needed. */
1762 if (sym_hash->root.u.def.value < addr
1763 && sym_hash->root.u.def.value + sym_hash->size > addr
1764 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1765 sym_hash->size -= count;
1766 }
1767 }
1768
1769 return TRUE;
1770 }
1771
1772 /* Used to sort relocs by address. If relocs have the same address,
1773 we maintain their relative order, except that R_RL78_RH_RELAX
1774 alignment relocs must be the first reloc for any given address. */
1775
1776 static void
1777 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1778 {
1779 int i;
1780 bfd_boolean again;
1781 bfd_boolean swappit;
1782
1783 /* This is almost a classic bubblesort. It's the slowest sort, but
1784 we're taking advantage of the fact that the relocations are
1785 mostly in order already (the assembler emits them that way) and
1786 we need relocs with the same address to remain in the same
1787 relative order. */
1788 again = TRUE;
1789 while (again)
1790 {
1791 again = FALSE;
1792 for (i = 0; i < count - 1; i ++)
1793 {
1794 if (r[i].r_offset > r[i + 1].r_offset)
1795 swappit = TRUE;
1796 else if (r[i].r_offset < r[i + 1].r_offset)
1797 swappit = FALSE;
1798 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1799 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1800 swappit = TRUE;
1801 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1802 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1803 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1804 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1805 swappit = TRUE;
1806 else
1807 swappit = FALSE;
1808
1809 if (swappit)
1810 {
1811 Elf_Internal_Rela tmp;
1812
1813 tmp = r[i];
1814 r[i] = r[i + 1];
1815 r[i + 1] = tmp;
1816 /* If we do move a reloc back, re-scan to see if it
1817 needs to be moved even further back. This avoids
1818 most of the O(n^2) behavior for our cases. */
1819 if (i > 0)
1820 i -= 2;
1821 again = TRUE;
1822 }
1823 }
1824 }
1825 }
1826
1827
1828 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1829 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1830 lrel, abfd, sec, link_info, scale)
1831
1832 static bfd_vma
1833 rl78_offset_for_reloc (bfd * abfd,
1834 Elf_Internal_Rela * rel,
1835 Elf_Internal_Shdr * symtab_hdr,
1836 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1837 Elf_Internal_Sym * intsyms,
1838 Elf_Internal_Rela ** lrel,
1839 bfd * input_bfd,
1840 asection * input_section,
1841 struct bfd_link_info * info,
1842 int * scale)
1843 {
1844 bfd_vma symval;
1845
1846 *scale = 1;
1847
1848 /* REL is the first of 1..N relocations. We compute the symbol
1849 value for each relocation, then combine them if needed. LREL
1850 gets a pointer to the last relocation used. */
1851 while (1)
1852 {
1853 unsigned long r_type;
1854
1855 /* Get the value of the symbol referred to by the reloc. */
1856 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1857 {
1858 /* A local symbol. */
1859 Elf_Internal_Sym *isym;
1860 asection *ssec;
1861
1862 isym = intsyms + ELF32_R_SYM (rel->r_info);
1863
1864 if (isym->st_shndx == SHN_UNDEF)
1865 ssec = bfd_und_section_ptr;
1866 else if (isym->st_shndx == SHN_ABS)
1867 ssec = bfd_abs_section_ptr;
1868 else if (isym->st_shndx == SHN_COMMON)
1869 ssec = bfd_com_section_ptr;
1870 else
1871 ssec = bfd_section_from_elf_index (abfd,
1872 isym->st_shndx);
1873
1874 /* Initial symbol value. */
1875 symval = isym->st_value;
1876
1877 /* GAS may have made this symbol relative to a section, in
1878 which case, we have to add the addend to find the
1879 symbol. */
1880 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1881 symval += rel->r_addend;
1882
1883 if (ssec)
1884 {
1885 if ((ssec->flags & SEC_MERGE)
1886 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1887 symval = _bfd_merged_section_offset (abfd, & ssec,
1888 elf_section_data (ssec)->sec_info,
1889 symval);
1890 }
1891
1892 /* Now make the offset relative to where the linker is putting it. */
1893 if (ssec)
1894 symval +=
1895 ssec->output_section->vma + ssec->output_offset;
1896
1897 symval += rel->r_addend;
1898 }
1899 else
1900 {
1901 unsigned long indx;
1902 struct elf_link_hash_entry * h;
1903
1904 /* An external symbol. */
1905 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1906 h = elf_sym_hashes (abfd)[indx];
1907 BFD_ASSERT (h != NULL);
1908
1909 if (h->root.type != bfd_link_hash_defined
1910 && h->root.type != bfd_link_hash_defweak)
1911 {
1912 /* This appears to be a reference to an undefined
1913 symbol. Just ignore it--it will be caught by the
1914 regular reloc processing. */
1915 if (lrel)
1916 *lrel = rel;
1917 return 0;
1918 }
1919
1920 symval = (h->root.u.def.value
1921 + h->root.u.def.section->output_section->vma
1922 + h->root.u.def.section->output_offset);
1923
1924 symval += rel->r_addend;
1925 }
1926
1927 r_type = ELF32_R_TYPE (rel->r_info);
1928 switch (r_type)
1929 {
1930 case R_RL78_SYM:
1931 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1932 break;
1933
1934 case R_RL78_OPromtop:
1935 symval = get_romstart (NULL, info, input_bfd, input_section, rel->r_offset);
1936 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1937 break;
1938
1939 case R_RL78_OPramtop:
1940 symval = get_ramstart (NULL, info, input_bfd, input_section, rel->r_offset);
1941 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1942 break;
1943
1944 case R_RL78_OPneg:
1945 case R_RL78_OPadd:
1946 case R_RL78_OPsub:
1947 case R_RL78_OPmul:
1948 case R_RL78_OPdiv:
1949 case R_RL78_OPshla:
1950 case R_RL78_OPshra:
1951 case R_RL78_OPsctsize:
1952 case R_RL78_OPscttop:
1953 case R_RL78_OPand:
1954 case R_RL78_OPor:
1955 case R_RL78_OPxor:
1956 case R_RL78_OPnot:
1957 case R_RL78_OPmod:
1958 (void) rl78_compute_complex_reloc (r_type, 0, input_section);
1959 break;
1960
1961 case R_RL78_DIR16UL:
1962 case R_RL78_DIR8UL:
1963 case R_RL78_ABS16UL:
1964 case R_RL78_ABS8UL:
1965 *scale = 4;
1966 goto reloc_computes_value;
1967
1968 case R_RL78_DIR16UW:
1969 case R_RL78_DIR8UW:
1970 case R_RL78_ABS16UW:
1971 case R_RL78_ABS8UW:
1972 *scale = 2;
1973 goto reloc_computes_value;
1974
1975 default:
1976 reloc_computes_value:
1977 symval = rl78_compute_complex_reloc (r_type, symval, input_section);
1978 case R_RL78_DIR32:
1979 case R_RL78_DIR24S:
1980 case R_RL78_DIR16:
1981 case R_RL78_DIR16U:
1982 case R_RL78_DIR16S:
1983 case R_RL78_DIR24S_PCREL:
1984 case R_RL78_DIR16S_PCREL:
1985 case R_RL78_DIR8S_PCREL:
1986 if (lrel)
1987 *lrel = rel;
1988 return symval;
1989 }
1990
1991 rel ++;
1992 }
1993 }
1994
1995 struct {
1996 int prefix; /* or -1 for "no prefix" */
1997 int insn; /* or -1 for "end of list" */
1998 int insn_for_saddr; /* or -1 for "no alternative" */
1999 int insn_for_sfr; /* or -1 for "no alternative" */
2000 } relax_addr16[] = {
2001 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
2002 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
2003 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
2004 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
2005
2006 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
2007 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
2008 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
2009 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
2010 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
2011 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
2012 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
2013 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
2014
2015 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
2016 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
2017 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
2018 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
2019 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
2020
2021 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
2022 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
2023 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
2024 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
2025
2026 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
2027 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
2028 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
2029
2030 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
2031 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
2032 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
2033 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
2034 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
2035 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
2036
2037 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
2038
2039 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
2040 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
2041 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
2042 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
2043 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
2044 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
2045 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
2046 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
2047
2048 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
2049 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
2050 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
2051 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
2052 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
2053 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
2054 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
2055 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
2056
2057 { -1, -1, -1, -1 }
2058 };
2059
2060 /* Relax one section. */
2061
2062 static bfd_boolean
2063 rl78_elf_relax_section
2064 (bfd * abfd,
2065 asection * sec,
2066 struct bfd_link_info * link_info,
2067 bfd_boolean * again)
2068 {
2069 Elf_Internal_Shdr * symtab_hdr;
2070 Elf_Internal_Shdr * shndx_hdr;
2071 Elf_Internal_Rela * internal_relocs;
2072 Elf_Internal_Rela * free_relocs = NULL;
2073 Elf_Internal_Rela * irel;
2074 Elf_Internal_Rela * srel;
2075 Elf_Internal_Rela * irelend;
2076 Elf_Internal_Rela * next_alignment;
2077 bfd_byte * contents = NULL;
2078 bfd_byte * free_contents = NULL;
2079 Elf_Internal_Sym * intsyms = NULL;
2080 Elf_Internal_Sym * free_intsyms = NULL;
2081 Elf_External_Sym_Shndx * shndx_buf = NULL;
2082 bfd_vma pc;
2083 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2084 int pcrel ATTRIBUTE_UNUSED = 0;
2085 int code ATTRIBUTE_UNUSED = 0;
2086 int section_alignment_glue;
2087 int scale;
2088
2089 if (abfd == elf_hash_table (link_info)->dynobj
2090 && strcmp (sec->name, ".plt") == 0)
2091 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2092
2093 /* Assume nothing changes. */
2094 *again = FALSE;
2095
2096 /* We don't have to do anything for a relocatable link, if
2097 this section does not have relocs, or if this is not a
2098 code section. */
2099 if (bfd_link_relocatable (link_info)
2100 || (sec->flags & SEC_RELOC) == 0
2101 || sec->reloc_count == 0
2102 || (sec->flags & SEC_CODE) == 0)
2103 return TRUE;
2104
2105 symtab_hdr = & elf_symtab_hdr (abfd);
2106 if (elf_symtab_shndx_list (abfd))
2107 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2108 else
2109 shndx_hdr = NULL;
2110
2111 /* Get the section contents. */
2112 if (elf_section_data (sec)->this_hdr.contents != NULL)
2113 contents = elf_section_data (sec)->this_hdr.contents;
2114 /* Go get them off disk. */
2115 else
2116 {
2117 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2118 goto error_return;
2119 elf_section_data (sec)->this_hdr.contents = contents;
2120 }
2121
2122 /* Read this BFD's symbols. */
2123 /* Get cached copy if it exists. */
2124 if (symtab_hdr->contents != NULL)
2125 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2126 else
2127 {
2128 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2129 symtab_hdr->contents = (bfd_byte *) intsyms;
2130 }
2131
2132 if (shndx_hdr && shndx_hdr->sh_size != 0)
2133 {
2134 bfd_size_type amt;
2135
2136 amt = symtab_hdr->sh_info;
2137 amt *= sizeof (Elf_External_Sym_Shndx);
2138 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2139 if (shndx_buf == NULL)
2140 goto error_return;
2141 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2142 || bfd_bread (shndx_buf, amt, abfd) != amt)
2143 goto error_return;
2144 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2145 }
2146
2147 /* Get a copy of the native relocations. */
2148 internal_relocs = (_bfd_elf_link_read_relocs
2149 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
2150 link_info->keep_memory));
2151 if (internal_relocs == NULL)
2152 goto error_return;
2153 if (! link_info->keep_memory)
2154 free_relocs = internal_relocs;
2155
2156 /* The RL_ relocs must be just before the operand relocs they go
2157 with, so we must sort them to guarantee this. We use bubblesort
2158 instead of qsort so we can guarantee that relocs with the same
2159 address remain in the same relative order. */
2160 reloc_bubblesort (internal_relocs, sec->reloc_count);
2161
2162 /* Walk through them looking for relaxing opportunities. */
2163 irelend = internal_relocs + sec->reloc_count;
2164
2165
2166 /* This will either be NULL or a pointer to the next alignment
2167 relocation. */
2168 next_alignment = internal_relocs;
2169
2170 /* We calculate worst case shrinkage caused by alignment directives.
2171 No fool-proof, but better than either ignoring the problem or
2172 doing heavy duty analysis of all the alignment markers in all
2173 input sections. */
2174 section_alignment_glue = 0;
2175 for (irel = internal_relocs; irel < irelend; irel++)
2176 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2177 && irel->r_addend & RL78_RELAXA_ALIGN)
2178 {
2179 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2180
2181 if (section_alignment_glue < this_glue)
2182 section_alignment_glue = this_glue;
2183 }
2184 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2185 shrinkage. */
2186 section_alignment_glue *= 2;
2187
2188 for (irel = internal_relocs; irel < irelend; irel++)
2189 {
2190 unsigned char *insn;
2191 int nrelocs;
2192
2193 /* The insns we care about are all marked with one of these. */
2194 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2195 continue;
2196
2197 if (irel->r_addend & RL78_RELAXA_ALIGN
2198 || next_alignment == internal_relocs)
2199 {
2200 /* When we delete bytes, we need to maintain all the alignments
2201 indicated. In addition, we need to be careful about relaxing
2202 jumps across alignment boundaries - these displacements
2203 *grow* when we delete bytes. For now, don't shrink
2204 displacements across an alignment boundary, just in case.
2205 Note that this only affects relocations to the same
2206 section. */
2207 next_alignment += 2;
2208 while (next_alignment < irelend
2209 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2210 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2211 next_alignment ++;
2212 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2213 next_alignment = NULL;
2214 }
2215
2216 /* When we hit alignment markers, see if we've shrunk enough
2217 before them to reduce the gap without violating the alignment
2218 requirements. */
2219 if (irel->r_addend & RL78_RELAXA_ALIGN)
2220 {
2221 /* At this point, the next relocation *should* be the ELIGN
2222 end marker. */
2223 Elf_Internal_Rela *erel = irel + 1;
2224 unsigned int alignment, nbytes;
2225
2226 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2227 continue;
2228 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2229 continue;
2230
2231 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2232
2233 if (erel->r_offset - irel->r_offset < alignment)
2234 continue;
2235
2236 nbytes = erel->r_offset - irel->r_offset;
2237 nbytes /= alignment;
2238 nbytes *= alignment;
2239
2240 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2241 next_alignment, erel->r_offset == sec->size);
2242 *again = TRUE;
2243
2244 continue;
2245 }
2246
2247 if (irel->r_addend & RL78_RELAXA_ELIGN)
2248 continue;
2249
2250 insn = contents + irel->r_offset;
2251
2252 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2253
2254 /* At this point, we have an insn that is a candidate for linker
2255 relaxation. There are NRELOCS relocs following that may be
2256 relaxed, although each reloc may be made of more than one
2257 reloc entry (such as gp-rel symbols). */
2258
2259 /* Get the value of the symbol referred to by the reloc. Just
2260 in case this is the last reloc in the list, use the RL's
2261 addend to choose between this reloc (no addend) or the next
2262 (yes addend, which means at least one following reloc). */
2263
2264 /* srel points to the "current" reloction for this insn -
2265 actually the last reloc for a given operand, which is the one
2266 we need to update. We check the relaxations in the same
2267 order that the relocations happen, so we'll just push it
2268 along as we go. */
2269 srel = irel;
2270
2271 pc = sec->output_section->vma + sec->output_offset
2272 + srel->r_offset;
2273
2274 #define GET_RELOC \
2275 BFD_ASSERT (nrelocs > 0); \
2276 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2277 pcrel = symval - pc + srel->r_addend; \
2278 nrelocs --;
2279
2280 #define SNIPNR(offset, nbytes) \
2281 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2282
2283 #define SNIP(offset, nbytes, newtype) \
2284 SNIPNR (offset, nbytes); \
2285 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2286
2287 /* The order of these bit tests must match the order that the
2288 relocs appear in. Since we sorted those by offset, we can
2289 predict them. */
2290
2291 /*----------------------------------------------------------------------*/
2292 /* EF ad BR $rel8 pcrel
2293 ED al ah BR !abs16 abs
2294 EE al ah BR $!rel16 pcrel
2295 EC al ah as BR !!abs20 abs
2296
2297 FD al ah CALL !abs16 abs
2298 FE al ah CALL $!rel16 pcrel
2299 FC al ah as CALL !!abs20 abs
2300
2301 DC ad BC $rel8
2302 DE ad BNC $rel8
2303 DD ad BZ $rel8
2304 DF ad BNZ $rel8
2305 61 C3 ad BH $rel8
2306 61 D3 ad BNH $rel8
2307 61 C8 EF ad SKC ; BR $rel8
2308 61 D8 EF ad SKNC ; BR $rel8
2309 61 E8 EF ad SKZ ; BR $rel8
2310 61 F8 EF ad SKNZ ; BR $rel8
2311 61 E3 EF ad SKH ; BR $rel8
2312 61 F3 EF ad SKNH ; BR $rel8
2313 */
2314
2315 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
2316 {
2317 /* SKIP opcodes that skip non-branches will have a relax tag
2318 but no corresponding symbol to relax against; we just
2319 skip those. */
2320 if (irel->r_addend & RL78_RELAXA_RNUM)
2321 {
2322 GET_RELOC;
2323 }
2324
2325 switch (insn[0])
2326 {
2327 case 0xdc: /* BC */
2328 case 0xdd: /* BZ */
2329 case 0xde: /* BNC */
2330 case 0xdf: /* BNZ */
2331 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */
2332 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */
2333 {
2334 /* This is a "long" conditional as generated by gas:
2335 DC 03 EE ad.dr */
2336 if (pcrel < 127
2337 && pcrel > -127)
2338 {
2339 insn[0] ^= 0x02; /* invert conditional */
2340 SNIPNR (4, 1);
2341 SNIP (1, 2, R_RL78_DIR8S_PCREL);
2342 insn[1] = pcrel;
2343 *again = TRUE;
2344 }
2345 }
2346 break;
2347
2348 case 0xec: /* BR !!abs20 */
2349
2350 if (pcrel < 127
2351 && pcrel > -127)
2352 {
2353 insn[0] = 0xef;
2354 insn[1] = pcrel;
2355 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2356 *again = TRUE;
2357 }
2358 else if (symval < 65536)
2359 {
2360 insn[0] = 0xed;
2361 insn[1] = symval & 0xff;
2362 insn[2] = symval >> 8;
2363 SNIP (2, 1, R_RL78_DIR16U);
2364 *again = TRUE;
2365 }
2366 else if (pcrel < 32767
2367 && pcrel > -32767)
2368 {
2369 insn[0] = 0xee;
2370 insn[1] = pcrel & 0xff;
2371 insn[2] = pcrel >> 8;
2372 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2373 *again = TRUE;
2374 }
2375 break;
2376
2377 case 0xee: /* BR $!pcrel16 */
2378 case 0xed: /* BR $!abs16 */
2379 if (pcrel < 127
2380 && pcrel > -127)
2381 {
2382 insn[0] = 0xef;
2383 insn[1] = pcrel;
2384 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2385 *again = TRUE;
2386 }
2387 break;
2388
2389 case 0xfc: /* CALL !!abs20 */
2390 if (symval < 65536)
2391 {
2392 insn[0] = 0xfd;
2393 insn[1] = symval & 0xff;
2394 insn[2] = symval >> 8;
2395 SNIP (2, 1, R_RL78_DIR16U);
2396 *again = TRUE;
2397 }
2398 else if (pcrel < 32767
2399 && pcrel > -32767)
2400 {
2401 insn[0] = 0xfe;
2402 insn[1] = pcrel & 0xff;
2403 insn[2] = pcrel >> 8;
2404 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2405 *again = TRUE;
2406 }
2407 break;
2408
2409 case 0x61: /* PREFIX */
2410 /* For SKIP/BR, we change the BR opcode and delete the
2411 SKIP. That way, we don't have to find and change the
2412 relocation for the BR. */
2413 /* Note that, for the case where we're skipping some
2414 other insn, we have no "other" reloc but that's safe
2415 here anyway. */
2416 switch (insn[1])
2417 {
2418 case 0xd3: /* BNH */
2419 case 0xc3: /* BH */
2420 if (insn[2] == 0x03 && insn[3] == 0xee
2421 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */
2422 {
2423 /* Another long branch by gas:
2424 61 D3 03 EE ad.dr */
2425 if (pcrel < 127
2426 && pcrel > -127)
2427 {
2428 insn[1] ^= 0x10; /* invert conditional */
2429 SNIPNR (5, 1);
2430 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2431 insn[2] = pcrel;
2432 *again = TRUE;
2433 }
2434 }
2435 break;
2436
2437 case 0xc8: /* SKC */
2438 if (insn[2] == 0xef)
2439 {
2440 insn[2] = 0xde; /* BNC */
2441 SNIPNR (0, 2);
2442 }
2443 break;
2444
2445 case 0xd8: /* SKNC */
2446 if (insn[2] == 0xef)
2447 {
2448 insn[2] = 0xdc; /* BC */
2449 SNIPNR (0, 2);
2450 }
2451 break;
2452
2453 case 0xe8: /* SKZ */
2454 if (insn[2] == 0xef)
2455 {
2456 insn[2] = 0xdf; /* BNZ */
2457 SNIPNR (0, 2);
2458 }
2459 break;
2460
2461 case 0xf8: /* SKNZ */
2462 if (insn[2] == 0xef)
2463 {
2464 insn[2] = 0xdd; /* BZ */
2465 SNIPNR (0, 2);
2466 }
2467 break;
2468
2469 case 0xe3: /* SKH */
2470 if (insn[2] == 0xef)
2471 {
2472 insn[2] = 0xd3; /* BNH */
2473 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2474 }
2475 break;
2476
2477 case 0xf3: /* SKNH */
2478 if (insn[2] == 0xef)
2479 {
2480 insn[2] = 0xc3; /* BH */
2481 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2482 }
2483 break;
2484 }
2485 break;
2486 }
2487 }
2488
2489 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2490 && nrelocs > 0)
2491 {
2492 /*----------------------------------------------------------------------*/
2493 /* Some insns have both a 16-bit address operand and an 8-bit
2494 variant if the address is within a special range:
2495
2496 Address 16-bit operand SADDR range SFR range
2497 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2498 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2499
2500 The RELAX_ADDR16[] array has the insn encodings for the
2501 16-bit operand version, as well as the SFR and SADDR
2502 variants. We only need to replace the encodings and
2503 adjust the operand.
2504
2505 Note: we intentionally do not attempt to decode and skip
2506 any ES: prefix, as adding ES: means the addr16 (likely)
2507 no longer points to saddr/sfr space.
2508 */
2509
2510 int is_sfr;
2511 int is_saddr;
2512 int idx;
2513 int poff;
2514
2515 GET_RELOC;
2516
2517 if (0xffe20 <= symval && symval <= 0xfffff)
2518 {
2519
2520 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2521 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2522
2523 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2524 {
2525 if (relax_addr16[idx].prefix != -1
2526 && insn[0] == relax_addr16[idx].prefix
2527 && insn[1] == relax_addr16[idx].insn)
2528 {
2529 poff = 1;
2530 }
2531 else if (relax_addr16[idx].prefix == -1
2532 && insn[0] == relax_addr16[idx].insn)
2533 {
2534 poff = 0;
2535 }
2536 else
2537 continue;
2538
2539 /* We have a matched insn, and poff is 0 or 1 depending
2540 on the base pattern size. */
2541
2542 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2543 {
2544 insn[poff] = relax_addr16[idx].insn_for_sfr;
2545 SNIP (poff+2, 1, R_RL78_RH_SFR);
2546 }
2547
2548 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2549 {
2550 insn[poff] = relax_addr16[idx].insn_for_saddr;
2551 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2552 }
2553 }
2554 }
2555 }
2556 /*----------------------------------------------------------------------*/
2557 }
2558
2559 return TRUE;
2560
2561 error_return:
2562 if (free_relocs != NULL)
2563 free (free_relocs);
2564
2565 if (free_contents != NULL)
2566 free (free_contents);
2567
2568 if (shndx_buf != NULL)
2569 {
2570 shndx_hdr->contents = NULL;
2571 free (shndx_buf);
2572 }
2573
2574 if (free_intsyms != NULL)
2575 free (free_intsyms);
2576
2577 return TRUE;
2578 }
2579
2580 \f
2581
2582 #define ELF_ARCH bfd_arch_rl78
2583 #define ELF_MACHINE_CODE EM_RL78
2584 #define ELF_MAXPAGESIZE 0x1000
2585
2586 #define TARGET_LITTLE_SYM rl78_elf32_vec
2587 #define TARGET_LITTLE_NAME "elf32-rl78"
2588
2589 #define elf_info_to_howto_rel NULL
2590 #define elf_info_to_howto rl78_info_to_howto_rela
2591 #define elf_backend_object_p rl78_elf_object_p
2592 #define elf_backend_relocate_section rl78_elf_relocate_section
2593 #define elf_symbol_leading_char ('_')
2594 #define elf_backend_can_gc_sections 1
2595
2596 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2597 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2598 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2599 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2600 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2601
2602 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2603 #define elf_backend_check_relocs rl78_elf_check_relocs
2604 #define elf_backend_always_size_sections \
2605 rl78_elf_always_size_sections
2606 #define elf_backend_finish_dynamic_sections \
2607 rl78_elf_finish_dynamic_sections
2608
2609 #include "elf32-target.h"
GDB Binutils - Deliverables
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