cpu/ChangeLog

   1 2020-07-04  Nick Clifton  <nickc@redhat.com>
   2
   3         Binutils 2.35 branch created.
   4
   5 2020-06-25 David Faust  <david.faust@oracle.com>
   6
   7         * bpf.cpu (f-offset16): Change type from INT to HI.
   8         (dxli): Simplify memory access.
   9         (dxsi): Likewise.
  10         (define-endian-insn): Update c-call in semantics.
  11         (dlabs) Likewise.
  12         (dlind) Likewise.
  13
  14 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  15
  16         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  17         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  18
  19 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  20
  21         * mep.opc (print_slot_insn): Pass the insn endianness to
  22         cgen_get_insn_value.
  23
  24 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  25             David Faust <david.faust@oracle.com>
  26
  27         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  28         (define-alu-insn-mov): Likewise.
  29         (daib): Likewise.
  30         (define-alu-instructions): Likewise.
  31         (define-endian-insn): Likewise.
  32         (define-lddw): Likewise.
  33         (dlabs): Likewise.
  34         (dlind): Likewise.
  35         (dxli): Likewise.
  36         (dxsi): Likewise.
  37         (dsti): Likewise.
  38         (define-ldstx-insns): Likewise.
  39         (define-st-insns): Likewise.
  40         (define-cond-jump-insn): Likewise.
  41         (dcji): Likewise.
  42         (define-condjump-insns): Likewise.
  43         (define-call-insn): Likewise.
  44         (ja): Likewise.
  45         ("exit"): Likewise.
  46         (define-atomic-insns): Likewise.
  47         (sem-exchange-and-add): New macro.
  48         * bpf.cpu ("brkpt"): New instruction.
  49         (bpfbf): Set word-bitsize to 32 and insn-endian big.
  50         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
  51         (h-pc): Expand definition.
  52         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
  53
  54 2020-05-21  Alan Modra  <amodra@gmail.com>
  55
  56         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
  57         "if (x) free (x)" with "free (x)".
  58
  59 2020-05-19  Stafford Horne  <shorne@gmail.com>
  60
  61         PR 25184
  62         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
  63         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
  64         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
  65         * or1kcommon.cpu (h-fdr): Remove hardware.
  66         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
  67         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
  68         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
  69         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
  70         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
  71
  72 2020-02-16  David Faust  <david.faust@oracle.com>
  73
  74         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
  75         (dcji) New version with support for JMP32
  76
  77 2020-02-03  Alan Modra  <amodra@gmail.com>
  78
  79         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
  80
  81 2020-02-01  Alan Modra  <amodra@gmail.com>
  82
  83         * frv.cpu (f-u12): Multiply rather than left shift signed values.
  84         (f-label16, f-label24): Likewise.
  85
  86 2020-01-30  Alan Modra  <amodra@gmail.com>
  87
  88         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
  89         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
  90         (f-dst32-rn-prefixed-QI): Likewise.
  91         (f-dsp-32-s32): Mask before shifting left.
  92         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
  93         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
  94         shifting left.
  95         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
  96         (h-gr-SI): Mask before shifting.
  97
  98 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  99
 100         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 101         (neg and neg32) use OP_SRC_K even if they operate only in
 102         registers.
 103
 104 2020-01-18  Nick Clifton  <nickc@redhat.com>
 105
 106         Binutils 2.34 branch created.
 107
 108 2020-01-13  Alan Modra  <amodra@gmail.com>
 109
 110         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 111         left shift signed values.
 112
 113 2020-01-06  Alan Modra  <amodra@gmail.com>
 114
 115         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 116         bits before shifting rather than masking after shifting.
 117         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 118         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 119         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 120         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 121
 122 2020-01-04  Alan Modra  <amodra@gmail.com>
 123
 124         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 125         (f-disp16, f-disp24): Likewise.
 126
 127 2019-12-23  Alan Modra  <amodra@gmail.com>
 128
 129         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 130
 131 2019-12-20  Alan Modra  <amodra@gmail.com>
 132
 133         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 134
 135 2019-12-17  Alan Modra  <amodra@gmail.com>
 136
 137         * bpf.cpu (f-imm64): Avoid signed overflow.
 138
 139 2019-12-16  Alan Modra  <amodra@gmail.com>
 140
 141         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 142
 143 2019-12-11  Alan Modra  <amodra@gmail.com>
 144
 145         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 146         * lm32.cpu (f-branch, f-vall): Likewise.
 147         * m32.cpu (f-lab-8-16): Likewise.
 148
 149 2019-12-11  Alan Modra  <amodra@gmail.com>
 150
 151         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 152         shift left to avoid UB on left shift of negative values.
 153
 154 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 155
 156         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 157
 158 2019-09-09  Phil Blundell  <pb@pbcl.net>
 159
 160         binutils 2.33 branch created.
 161
 162 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 163
 164         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 165         %a and %ctx.
 166
 167 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 168
 169         * bpf.cpu (dlabs): New pmacro.
 170         (dlind): Likewise.
 171
 172 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 173
 174         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 175         explicit 'dst' argument.
 176
 177 2019-06-13  Stafford Horne  <shorne@gmail.com>
 178
 179         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 180
 181 2019-06-13  Stafford Horne  <shorne@gmail.com>
 182
 183         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 184         (l-adrp): Improve comment.
 185
 186 2019-06-13  Stafford Horne  <shorne@gmail.com>
 187
 188         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 189         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 190         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 191         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 192         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 193         float-setflag-unordered-symantics): New pmacro for instruction
 194         symantics.
 195         (float-setflag-insn): Update to use float-setflag-insn-base.
 196         (float-setflag-unordered-insn): New pmacro for generating instructions.
 197
 198 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 199             Stafford Horne  <shorne@gmail.com>
 200
 201         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 202         (ORFPX-MACHS): Removed pmacro.
 203         * or1k.opc (or1k_cgen_insn_supported): New function.
 204         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 205         (parse_regpair, print_regpair): New functions.
 206         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 207         and add comments.
 208         (h-fdr): Update comment to indicate or64.
 209         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 210         (h-fd32r): New hardware for 64-bit fpu registers.
 211         (h-i64r): New hardware for 64-bit int registers.
 212         * or1korbis.cpu (f-resv-8-1): New field.
 213         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 214         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 215         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 216         (h-roff1): New hardware.
 217         (double-field-and-ops mnemonic): New pmacro to generate operations
 218         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 219         (float-regreg-insn): Update single precision generator to MACH
 220         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 221         (float-setflag-insn): Update single precision generator to MACH
 222         ORFPX32-MACHS.  Fix double instructions from single to double
 223         precision.  Add generator for or32 64-bit instructions.
 224         (float-cust-insn cust-num): Update single precision generator to MACH
 225         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 226         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 227         ORFPX32-MACHS.
 228         (lf-rem-d): Fix operation from mod to rem.
 229         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 230         (lf-itof-d): Fix operands from single to double.
 231         (lf-ftoi-d): Update operand mode from DI to WI.
 232
 233 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 234
 235         * bpf.cpu: New file.
 236         * bpf.opc: Likewise.
 237
 238 2018-06-24  Nick Clifton  <nickc@redhat.com>
 239
 240         2.32 branch created.
 241
 242 2018-10-05  Richard Henderson  <rth@twiddle.net>
 243             Stafford Horne  <shorne@gmail.com>
 244
 245         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 246         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 247         (l-mul): Fix overflow support and indentation.
 248         (l-mulu): Fix overflow support and indentation.
 249         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 250         (l-div); Remove incorrect carry behavior.
 251         (l-divu): Fix carry and overflow behavior.
 252         (l-mac): Add overflow support.
 253         (l-msb, l-msbu): Add carry and overflow support.
 254
 255 2018-10-05  Richard Henderson  <rth@twiddle.net>
 256
 257         * or1k.opc (parse_disp26): Add support for plta() relocations.
 258         (parse_disp21): New function.
 259         (or1k_rclass): New enum.
 260         (or1k_rtype): New enum.
 261         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 262         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 263         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 264         * or1korbis.cpu (f-disp26): Don't assume SI.
 265         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 266         (insn-opcode): Add ADRP.
 267         (l-adrp): New instruction.
 268
 269 2018-10-05  Richard Henderson  <rth@twiddle.net>
 270
 271         * or1k.opc: Add RTYPE_ enum.
 272         (INVALID_STORE_RELOC): New string.
 273         (or1k_imm16_relocs): New array array.
 274         (parse_reloc): New static function that just does the parsing.
 275         (parse_imm16): New static function for generic parsing.
 276         (parse_simm16): Change to just call parse_imm16.
 277         (parse_simm16_split): New function.
 278         (parse_uimm16): Change to call parse_imm16.
 279         (parse_uimm16_split): New function.
 280         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 281         (uimm16-split): Change to use new uimm16_split.
 282
 283 2018-07-24  Alan Modra  <amodra@gmail.com>
 284
 285         PR 23430
 286         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 287
 288 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 289
 290         * or1kcommon.cpu (spr-reg-info): Typo fix.
 291
 292 2018-03-03  Alan Modra  <amodra@gmail.com>
 293
 294         * frv.opc: Include opintl.h.
 295         (add_next_to_vliw): Use opcodes_error_handler to print error.
 296         Standardize error message.
 297         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 298
 299 2018-01-13  Nick Clifton  <nickc@redhat.com>
 300
 301         2.30 branch created.
 302
 303 2017-03-15  Stafford Horne  <shorne@gmail.com>
 304
 305         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 306
 307 2016-10-06  Alan Modra  <amodra@gmail.com>
 308
 309         * mep.opc (expand_string): Add fall through comment.
 310
 311 2016-03-03  Alan Modra  <amodra@gmail.com>
 312
 313         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 314         at what is really going on.
 315
 316 2016-03-02  Alan Modra  <amodra@gmail.com>
 317
 318         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 319
 320 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 321
 322         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 323         a constant to better align disassembler output.
 324
 325 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 326
 327         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 328
 329 2014-06-12  Alan Modra  <amodra@gmail.com>
 330
 331         * or1k.opc: Whitespace fixes.
 332
 333 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 334
 335         * or1korbis.cpu (h-atomic-reserve): New hardware.
 336         (h-atomic-address): Likewise.
 337         (insn-opcode): Add opcodes for LWA and SWA.
 338         (atomic-reserve): New operand.
 339         (atomic-address): Likewise.
 340         (l-lwa, l-swa): New instructions.
 341         (l-lbs): Fix typo in comment.
 342         (store-insn): Clear atomic reserve on store to atomic-address.
 343         Fix register names in fmt field.
 344
 345 2014-04-22  Christian Svensson  <blue@cmd.nu>
 346
 347         * openrisc.cpu: Delete.
 348         * openrisc.opc: Delete.
 349         * or1k.cpu: New file.
 350         * or1k.opc: New file.
 351         * or1kcommon.cpu: New file.
 352         * or1korbis.cpu: New file.
 353         * or1korfpx.cpu: New file.
 354
 355 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 356
 357         * epiphany.opc: Remove +x file mode.
 358
 359 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 360
 361         PR binutils/15241
 362         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 363         TLBVADDR, TLBPADDR and TLBBADVADDR.
 364
 365 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 366             Joern Rennecke  <joern.rennecke@embecosm.com>
 367
 368         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 369         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 370         (testset-insn): Add NO_DIS attribute to t.l.
 371         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 372         (move-insns): Add NO-DIS attribute to cmov.l.
 373         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 374         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 375         (op-rrr): Add NO-DIS attribute to .l.
 376         (shift-rrr): Add NO-DIS attribute to .l.
 377         (op-shift-rri): Add NO-DIS attribute to i32.l.
 378         (bitrl, movtl): Add NO-DIS attribute.
 379         (op-iextrrr): Add NO-DIS attribute to .l
 380         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 381         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 382
 383 2012-02-27  Alan Modra  <amodra@gmail.com>
 384
 385         * mt.opc (print_dollarhex): Trim values to 32 bits.
 386
 387 2011-12-15  Nick Clifton  <nickc@redhat.com>
 388
 389         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 390         hosts.
 391
 392 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 393
 394         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 395         Cast value before printing it as a long.
 396         (parse_postindex): Fix type of valuep.
 397
 398 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 399
 400         * cpu/epiphany.cpu: New file.
 401         * cpu/epiphany.opc: New file.
 402
 403 2011-08-22  Nick Clifton  <nickc@redhat.com>
 404
 405         * fr30.cpu: Newly contributed file.
 406         * fr30.opc: Likewise.
 407         * ip2k.cpu: Likewise.
 408         * ip2k.opc: Likewise.
 409         * mep-avc.cpu: Likewise.
 410         * mep-avc2.cpu: Likewise.
 411         * mep-c5.cpu: Likewise.
 412         * mep-core.cpu: Likewise.
 413         * mep-default.cpu: Likewise.
 414         * mep-ext-cop.cpu: Likewise.
 415         * mep-fmax.cpu: Likewise.
 416         * mep-h1.cpu: Likewise.
 417         * mep-ivc2.cpu: Likewise.
 418         * mep-rhcop.cpu: Likewise.
 419         * mep-sample-ucidsp.cpu: Likewise.
 420         * mep.cpu: Likewise.
 421         * mep.opc: Likewise.
 422         * openrisc.cpu: Likewise.
 423         * openrisc.opc: Likewise.
 424         * xstormy16.cpu: Likewise.
 425         * xstormy16.opc: Likewise.
 426
 427 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 428
 429         * frv.opc: #undef DEBUG.
 430
 431 2010-07-03  DJ Delorie  <dj@delorie.com>
 432
 433         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 434
 435 2010-02-11  Doug Evans  <dje@sebabeach.org>
 436
 437         * m32r.cpu (HASH-PREFIX): Delete.
 438         (duhpo, dshpo): New pmacros.
 439         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 440         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 441         attribute, define with dshpo.
 442         (uimm24): Delete HASH-PREFIX attribute.
 443         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 444         (print_signed_with_hash_prefix): New function.
 445         (print_unsigned_with_hash_prefix): New function.
 446         * xc16x.cpu (dowh): New pmacro.
 447         (upof16): Define with dowh, specify print handler.
 448         (qbit, qlobit, qhibit): Ditto.
 449         (upag16): Ditto.
 450         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 451         (print_with_dot_prefix): New functions.
 452         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 453
 454 2010-01-24  Doug Evans  <dje@sebabeach.org>
 455
 456         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 457         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 458         conditional-floating-point-conversion, ne-floating-point-conversion,
 459         float-parallel-mul-add-double-semantics): Ditto.
 460
 461 2010-01-05  Doug Evans  <dje@sebabeach.org>
 462
 463         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 464         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 465
 466 2010-01-02  Doug Evans  <dje@sebabeach.org>
 467
 468         * m32c.opc (parse_signed16): Fix typo.
 469
 470 2009-12-11  Nick Clifton  <nickc@redhat.com>
 471
 472         * frv.opc: Fix shadowed variable warnings.
 473         * m32c.opc: Fix shadowed variable warnings.
 474
 475 2009-11-14  Doug Evans  <dje@sebabeach.org>
 476
 477         Must use VOID expression in VOID context.
 478         * xc16x.cpu (mov4): Fix mode of `sequence'.
 479         (mov9, mov10): Ditto.
 480         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 481         (callr, callseg, calls, trap, rets, reti): Ditto.
 482         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 483         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 484         (exts, exts1, extsr, extsr1, prior): Ditto.
 485
 486 2009-10-23  Doug Evans  <dje@sebabeach.org>
 487
 488         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 489         cgen-ops.h -> cgen/basic-ops.h.
 490
 491 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 492
 493         * m32r.cpu (stb-plus): Typo fix.
 494
 495 2009-09-23  Doug Evans  <dje@sebabeach.org>
 496
 497         * m32r.cpu (sth-plus): Fix address mode and calculation.
 498         (stb-plus): Ditto.
 499         (clrpsw): Fix mask calculation.
 500         (bset, bclr, btst): Make mode in bit calculation match expression.
 501
 502         * xc16x.cpu (rtl-version): Set to 0.8.
 503         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 504         make uppercase.  Remove unnecessary name-prefix spec.
 505         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 506         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 507         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 508         (h-cr): New hardware.
 509         (muls): Comment out parts that won't compile, add fixme.
 510         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 511         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 512         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 513
 514 2009-07-16  Doug Evans  <dje@sebabeach.org>
 515
 516         * cpu/simplify.inc (*): One line doc strings don't need \n.
 517         (df): Invoke define-full-ifield instead of claiming it's an alias.
 518         (dno): Define.
 519         (dnop): Mark as deprecated.
 520
 521 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 522
 523         * m32c.opc (parse_lab_5_3): Use correct enum.
 524
 525 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 526
 527         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 528         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 529         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 530         arguments of "operation" to DI using "mode" and the new pmacros.
 531
 532 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 533
 534         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 535         of number 2, PID.
 536
 537 2008-12-23  Jon Beniston <jon@beniston.com>
 538
 539         * lm32.cpu: New file.
 540         * lm32.opc: New file.
 541
 542 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 543
 544         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 545         to source.
 546
 547 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 548
 549         * cris.cpu (movs, movu): Use result of extension operation when
 550         updating flags.
 551
 552 2007-07-04  Nick Clifton  <nickc@redhat.com>
 553
 554         * cris.cpu: Update copyright notice to refer to GPLv3.
 555         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 556         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 557         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 558         xc16x.opc: Likewise.
 559         * iq2000.cpu: Fix copyright notice to refer to FSF.
 560
 561 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 562
 563         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 564
 565 2007-04-20  Nick Clifton  <nickc@redhat.com>
 566
 567         * xc16x.cpu: Restore after accidentally overwriting this file with
 568         xc16x.opc.
 569
 570 2007-03-29  DJ Delorie  <dj@redhat.com>
 571
 572         * m32c.cpu (Imm-8-s4n): Fix print hook.
 573         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 574         (arith-jnz-imm4-dst-defn): Make relaxable.
 575         (arith-jnz16-imm4-dst-defn): Fix encodings.
 576
 577 2007-03-20  DJ Delorie  <dj@redhat.com>
 578
 579         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 580         mem20): New.
 581         (src16-16-20-An-relative-*): New.
 582         (dst16-*-20-An-relative-*): New.
 583         (dst16-16-16sa-*): New
 584         (dst16-16-16ar-*): New
 585         (dst32-16-16sa-Unprefixed-*): New
 586         (jsri): Fix operands.
 587         (setzx): Fix encoding.
 588
 589 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 590
 591         * m32r.opc: Formatting.
 592
 593 2006-05-22  Nick Clifton  <nickc@redhat.com>
 594
 595         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 596
 597 2006-04-10  DJ Delorie  <dj@redhat.com>
 598
 599         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 600         decides if this function accepts symbolic constants or not.
 601         (parse_signed_bitbase): Likewise.
 602         (parse_unsigned_bitbase8): Pass the new parameter.
 603         (parse_unsigned_bitbase11): Likewise.
 604         (parse_unsigned_bitbase16): Likewise.
 605         (parse_unsigned_bitbase19): Likewise.
 606         (parse_unsigned_bitbase27): Likewise.
 607         (parse_signed_bitbase8): Likewise.
 608         (parse_signed_bitbase11): Likewise.
 609         (parse_signed_bitbase19): Likewise.
 610
 611 2006-03-13  DJ Delorie  <dj@redhat.com>
 612
 613         * m32c.cpu (Bit3-S): New.
 614         (btst:s): New.
 615         * m32c.opc (parse_bit3_S): New.
 616
 617         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 618         (btst): Add optional :G suffix for MACH32.
 619         (or.b:S): New.
 620         (pop.w:G): Add optional :G suffix for MACH16.
 621         (push.b.imm): Fix syntax.
 622
 623 2006-03-10  DJ Delorie  <dj@redhat.com>
 624
 625         * m32c.cpu (mul.l): New.
 626         (mulu.l): New.
 627
 628 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 629
 630         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 631         an error message otherwise.
 632         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 633         Fix up comments to correctly describe the functions.
 634
 635 2006-02-24  DJ Delorie  <dj@redhat.com>
 636
 637         * m32c.cpu (RL_TYPE): New attribute, with macros.
 638         (Lab-8-24): Add RELAX.
 639         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 640         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 641         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 642         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 643         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 644         attribute.
 645         (jsri16, jsri32): Add 1ADDR attribute.
 646         (jsr32.w, jsr32.a): Add JUMP attribute.
 647
 648 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 649             Anil Paranjape   <anilp1@kpitcummins.com>
 650             Shilin Shakti    <shilins@kpitcummins.com>
 651
 652         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 653         description.
 654         * xc16x.opc: New file containing supporting XC16C routines.
 655
 656 2006-02-10  Nick Clifton  <nickc@redhat.com>
 657
 658         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 659
 660 2006-01-06  DJ Delorie  <dj@redhat.com>
 661
 662         * m32c.cpu (mov.w:q): Fix mode.
 663         (push32.b.imm): Likewise, for the comment.
 664
 665 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 666
 667         Second part of ms1 to mt renaming.
 668         * mt.cpu (define-arch, define-isa): Set name to mt.
 669         (define-mach): Adjust.
 670         * mt.opc (CGEN_ASM_HASH): Update.
 671         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 672         (parse_loopsize, parse_imm16): Adjust.
 673
 674 2005-12-13  DJ Delorie  <dj@redhat.com>
 675
 676         * m32c.cpu (jsri): Fix order so register names aren't treated as
 677         symbols.
 678         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 679         indexwd, indexws): Fix encodings.
 680
 681 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 682
 683         * mt.cpu: Rename from ms1.cpu.
 684         * mt.opc: Rename from ms1.opc.
 685
 686 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 687
 688         * cris.cpu (simplecris-common-writable-specregs)
 689         (simplecris-common-readable-specregs): Split from
 690         simplecris-common-specregs.  All users changed.
 691         (cris-implemented-writable-specregs-v0)
 692         (cris-implemented-readable-specregs-v0): Similar from
 693         cris-implemented-specregs-v0.
 694         (cris-implemented-writable-specregs-v3)
 695         (cris-implemented-readable-specregs-v3)
 696         (cris-implemented-writable-specregs-v8)
 697         (cris-implemented-readable-specregs-v8)
 698         (cris-implemented-writable-specregs-v10)
 699         (cris-implemented-readable-specregs-v10)
 700         (cris-implemented-writable-specregs-v32)
 701         (cris-implemented-readable-specregs-v32): Similar.
 702         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 703         insns and specializations.
 704
 705 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 706
 707         Add ms2
 708         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 709         model.
 710         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 711         f-cb2incr, f-rc3): New fields.
 712         (LOOP): New instruction.
 713         (JAL-HAZARD): New hazard.
 714         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 715         New operands.
 716         (mul, muli, dbnz, iflush): Enable for ms2
 717         (jal, reti): Has JAL-HAZARD.
 718         (ldctxt, ldfb, stfb): Only ms1.
 719         (fbcb): Only ms1,ms1-003.
 720         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 721         fbcbincrs, mfbcbincrs): Enable for ms2.
 722         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 723         * ms1.opc (parse_loopsize): New.
 724         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 725         (print_pcrel): New.
 726
 727 2005-10-28  Dave Brolley  <brolley@redhat.com>
 728
 729         Contribute the following change:
 730         2003-09-24  Dave Brolley  <brolley@redhat.com>
 731
 732         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 733         CGEN_ATTR_VALUE_TYPE.
 734         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 735         Use cgen_bitset_intersect_p.
 736
 737 2005-10-27  DJ Delorie  <dj@redhat.com>
 738
 739         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 740         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 741         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 742         imm operand is needed.
 743         (adjnz, sbjnz): Pass the right operands.
 744         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 745         unary-insn): Add -g variants for opcodes that need to support :G.
 746         (not.BW:G, push.BW:G): Call it.
 747         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 748         stzx16-imm8-imm8-abs16): Fix operand typos.
 749         * m32c.opc (m32c_asm_hash): Support bnCND.
 750         (parse_signed4n, print_signed4n): New.
 751
 752 2005-10-26  DJ Delorie  <dj@redhat.com>
 753
 754         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 755         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 756         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 757         dsp8[sp] is signed.
 758         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 759         (mov.BW:S r0,r1): Fix typo r1l->r1.
 760         (tst): Allow :G suffix.
 761         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 762
 763 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 764
 765         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 766
 767 2005-10-25  DJ Delorie  <dj@redhat.com>
 768
 769         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 770         making one a macro of the other.
 771
 772 2005-10-21  DJ Delorie  <dj@redhat.com>
 773
 774         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 775         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 776         indexld, indexls): .w variants have `1' bit.
 777         (rot32.b): QI, not SI.
 778         (rot32.w): HI, not SI.
 779         (xchg16): HI for .w variant.
 780
 781 2005-10-19  Nick Clifton  <nickc@redhat.com>
 782
 783         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 784
 785 2005-10-18  Andreas Schwab  <schwab@suse.de>
 786
 787         * m32r.opc (parse_slo16): Better version of previous patch.
 788
 789 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 790
 791         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 792         size.
 793
 794 2005-07-25  DJ Delorie  <dj@redhat.com>
 795
 796         * m32c.opc (parse_unsigned8): Add %dsp8().
 797         (parse_signed8): Add %hi8().
 798         (parse_unsigned16): Add %dsp16().
 799         (parse_signed16): Add %lo16() and %hi16().
 800         (parse_lab_5_3): Make valuep a bfd_vma *.
 801
 802 2005-07-18  Nick Clifton  <nickc@redhat.com>
 803
 804         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 805         components.
 806         (f-lab32-jmp-s): Fix insertion sequence.
 807         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 808         (Dsp-40-s8): Make parameter be signed.
 809         (Dsp-40-s16): Likewise.
 810         (Dsp-48-s8): Likewise.
 811         (Dsp-48-s16): Likewise.
 812         (Imm-13-u3): Likewise. (Despite its name!)
 813         (BitBase16-16-s8): Make the parameter be unsigned.
 814         (BitBase16-8-u11-S): Likewise.
 815         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 816         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 817         relaxation.
 818
 819         * m32c.opc: Fix formatting.
 820         Use safe-ctype.h instead of ctype.h
 821         Move duplicated code sequences into a macro.
 822         Fix compile time warnings about signedness mismatches.
 823         Remove dead code.
 824         (parse_lab_5_3): New parser function.
 825
 826 2005-07-16  Jim Blandy  <jimb@redhat.com>
 827
 828         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 829         to represent isa sets.
 830
 831 2005-07-15  Jim Blandy  <jimb@redhat.com>
 832
 833         * m32c.cpu, m32c.opc: Fix copyright.
 834
 835 2005-07-14  Jim Blandy  <jimb@redhat.com>
 836
 837         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 838
 839 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 840
 841         * ms1.opc (print_dollarhex): Correct format string.
 842
 843 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 844
 845         * iq2000.cpu: Include from binutils cpu dir.
 846
 847 2005-07-05  Nick Clifton  <nickc@redhat.com>
 848
 849         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 850         unsigned in order to avoid compile time warnings about sign
 851         conflicts.
 852
 853         * ms1.opc (parse_*): Likewise.
 854         (parse_imm16): Use a "void *" as it is passed both signed and
 855         unsigned arguments.
 856
 857 2005-07-01  Nick Clifton  <nickc@redhat.com>
 858
 859         * frv.opc: Update to ISO C90 function declaration style.
 860         * iq2000.opc: Likewise.
 861         * m32r.opc: Likewise.
 862         * sh.opc: Likewise.
 863
 864 2005-06-15  Dave Brolley  <brolley@redhat.com>
 865
 866         Contributed by Red Hat.
 867         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 868         * ms1.opc: New file.  Written by Stan Cox.
 869
 870 2005-05-10  Nick Clifton  <nickc@redhat.com>
 871
 872         * Update the address and phone number of the FSF organization in
 873         the GPL notices in the following files:
 874         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 875         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 876         sh64-media.cpu, simplify.inc
 877
 878 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 879
 880         * frv.opc (parse_A): Warning fix.
 881
 882 2005-02-23  Nick Clifton  <nickc@redhat.com>
 883
 884         * frv.opc: Fixed compile time warnings about differing signed'ness
 885         of pointers passed to functions.
 886         * m32r.opc: Likewise.
 887
 888 2005-02-11  Nick Clifton  <nickc@redhat.com>
 889
 890         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 891         'bfd_vma *' in order avoid compile time warning message.
 892
 893 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 894
 895         * cris.cpu (mstep): Add missing insn.
 896
 897 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 898
 899         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 900         * frv.cpu: Add support for TLS annotations in loads and calll.
 901         * frv.opc (parse_symbolic_address): New.
 902         (parse_ldd_annotation): New.
 903         (parse_call_annotation): New.
 904         (parse_ld_annotation): New.
 905         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 906         Introduce TLS relocations.
 907         (parse_d12, parse_s12, parse_u12): Likewise.
 908         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 909         (parse_call_label, print_at): New.
 910
 911 2004-12-21  Mikael Starvik  <starvik@axis.com>
 912
 913         * cris.cpu (cris-set-mem): Correct integral write semantics.
 914
 915 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 916
 917         * cris.cpu: New file.
 918
 919 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 920
 921         * iq2000.cpu: Added quotes around macro arguments so that they
 922         will work with newer versions of guile.
 923
 924 2004-10-27  Nick Clifton  <nickc@redhat.com>
 925
 926         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 927         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 928         operand.
 929         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 930         with guile.
 931
 932 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 933
 934         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 935
 936 2004-05-15  Nick Clifton  <nickc@redhat.com>
 937
 938         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 939
 940 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 941
 942         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 943
 944 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 945
 946         * frv.cpu (define-arch frv): Add fr450 mach.
 947         (define-mach fr450): New.
 948         (define-model fr450): New.  Add profile units to every fr450 insn.
 949         (define-attr UNIT): Add MDCUTSSI.
 950         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 951         (define-attr AUDIO): New boolean.
 952         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 953         (f-LRA-null, f-TLBPR-null): New fields.
 954         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 955         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 956         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 957         (LRA-null, TLBPR-null): New macros.
 958         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 959         (load-real-address): New macro.
 960         (lrai, lrad, tlbpr): New instructions.
 961         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 962         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 963         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 964         (media-low-clear-semantics, media-scope-limit-semantics)
 965         (media-quad-limit, media-quad-shift): New macros.
 966         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 967         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 968         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 969         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 970         (fr450_unit_mapping): New array.
 971         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 972         for new MDCUTSSI unit.
 973         (fr450_check_insn_major_constraints): New function.
 974         (check_insn_major_constraints): Use it.
 975
 976 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 977
 978         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 979         (scutss): Change unit to I0.
 980         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 981         (mqsaths): Fix FR400-MAJOR categorization.
 982         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 983         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 984         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 985         combinations.
 986
 987 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 988
 989         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 990         (rstb, rsth, rst, rstd, rstq): Delete.
 991         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 992
 993 2004-02-23  Nick Clifton  <nickc@redhat.com>
 994
 995         * Apply these patches from Renesas:
 996
 997         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 998
 999         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1000         disassembling codes for 0x*2 addresses.
1001
1002         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1003
1004         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1005
1006         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1007
1008         * cpu/m32r.cpu : Add new model m32r2.
1009         Add new instructions.
1010         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1011         Changed PIPE attr of push from O to OS.
1012         Care for Little-endian of M32R.
1013         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1014         Care for Little-endian of M32R.
1015         (parse_slo16): signed extension for value.
1016
1017 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1018
1019         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1020         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1021
1022         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1023         written by Ben Elliston.
1024
1025 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1026
1027         * frv.cpu (UNIT): Add IACC.
1028         (iacc-multiply-r-r): Use it.
1029         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1030         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1031
1032 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1033
1034         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1035         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1036         cut&paste errors in shifting/truncating numerical operands.
1037         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1038         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1039         (parse_uslo16): Likewise.
1040         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1041         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1042         (parse_s12): Likewise.
1043         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1044         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1045         (parse_uslo16): Likewise.
1046         (parse_uhi16): Parse gothi and gotfuncdeschi.
1047         (parse_d12): Parse got12 and gotfuncdesc12.
1048         (parse_s12): Likewise.
1049
1050 2003-10-10  Dave Brolley  <brolley@redhat.com>
1051
1052         * frv.cpu (dnpmop): New p-macro.
1053         (GRdoublek): Use dnpmop.
1054         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1055         (store-double-r-r): Use (.sym regtype doublek).
1056         (r-store-double): Ditto.
1057         (store-double-r-r-u): Ditto.
1058         (conditional-store-double): Ditto.
1059         (conditional-store-double-u): Ditto.
1060         (store-double-r-simm): Ditto.
1061         (fmovs): Assign to UNIT FMALL.
1062
1063 2003-10-06  Dave Brolley  <brolley@redhat.com>
1064
1065         * frv.cpu, frv.opc: Add support for fr550.
1066
1067 2003-09-24  Dave Brolley  <brolley@redhat.com>
1068
1069         * frv.cpu (u-commit): New modelling unit for fr500.
1070         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1071         (commit-r): Use u-commit model for fr500.
1072         (commit): Ditto.
1073         (conditional-float-binary-op): Take profiling data as an argument.
1074         Update callers.
1075         (ne-float-binary-op): Ditto.
1076
1077 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1078
1079         * frv.cpu (nldqi): Delete unimplemented instruction.
1080
1081 2003-09-12  Dave Brolley  <brolley@redhat.com>
1082
1083         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1084         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1085         frv_ref_SI to get input register referenced for profiling.
1086         (clear-ne-flag-all): Pass insn profiling in as an argument.
1087         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1088
1089 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1090
1091         * frv.cpu: Typographical corrections.
1092
1093 2003-09-09  Dave Brolley  <brolley@redhat.com>
1094
1095         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1096         (conditional-media-dual-complex, media-quad-complex): Likewise.
1097
1098 2003-09-04  Dave Brolley  <brolley@redhat.com>
1099
1100         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1101         Update all callers.
1102         (conditional-register-transfer): Ditto.
1103         (cache-preload): Ditto.
1104         (floating-point-conversion): Ditto.
1105         (floating-point-neg): Ditto.
1106         (float-abs): Ditto.
1107         (float-binary-op-s): Ditto.
1108         (conditional-float-binary-op): Ditto.
1109         (ne-float-binary-op): Ditto.
1110         (float-dual-arith): Ditto.
1111         (ne-float-dual-arith): Ditto.
1112
1113 2003-09-03  Dave Brolley  <brolley@redhat.com>
1114
1115         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1116         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1117         MCLRACC-1.
1118         (A): Removed operand.
1119         (A0,A1): New operands replace operand A.
1120         (mnop): Now a real insn
1121         (mclracc): Removed insn.
1122         (mclracc-0, mclracc-1): New insns replace mclracc.
1123         (all insns): Use new UNIT attributes.
1124
1125 2003-08-21  Nick Clifton  <nickc@redhat.com>
1126
1127         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1128         and u-media-dual-btoh with output parameter.
1129         (cmbtoh): Add profiling hack.
1130
1131 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1132
1133         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1134
1135 2003-06-10  Doug Evans  <dje@sebabeach.org>
1136
1137         * frv.cpu: Add IDOC attribute.
1138
1139 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1140
1141         Contributed by Red Hat.
1142         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1143         Stan Cox, and Frank Ch. Eigler.
1144         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1145         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1146         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1147         * iq10.cpu: New file.  Written by Jeff Johnston.
1148
1149 2003-06-05  Nick Clifton  <nickc@redhat.com>
1150
1151         * frv.cpu (FRintieven): New operand.  An even-numbered only
1152         version of the FRinti operand.
1153         (FRintjeven): Likewise for FRintj.
1154         (FRintkeven): Likewise for FRintk.
1155         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1156         media-quad-arith-sat-semantics, media-quad-arith-sat,
1157         conditional-media-quad-arith-sat, mdunpackh,
1158         media-quad-multiply-semantics, media-quad-multiply,
1159         conditional-media-quad-multiply, media-quad-complex-i,
1160         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1161         conditional-media-quad-multiply-acc, munpackh,
1162         media-quad-multiply-cross-acc-semantics, mdpackh,
1163         media-quad-multiply-cross-acc, mbtoh-semantics,
1164         media-quad-cross-multiply-cross-acc-semantics,
1165         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1166         media-quad-cross-multiply-acc-semantics, cmbtoh,
1167         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1168         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1169         cmhtob): Use new operands.
1170         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1171         (parse_even_register): New function.
1172
1173 2003-06-03  Nick Clifton  <nickc@redhat.com>
1174
1175         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1176         immediate value not unsigned.
1177
1178 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1179
1180         Contributed by Red Hat.
1181         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1182         and Eric Christopher.
1183         * frv.opc: New file.  Written by Catherine Moore, and Dave
1184         Brolley.
1185         * simplify.inc: New file.  Written by Doug Evans.
1186
1187 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1188
1189         * New file.
1190
1191 \f
1192 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1193
1194 Copying and distribution of this file, with or without modification,
1195 are permitted in any medium without royalty provided the copyright
1196 notice and this notice are preserved.
1197
1198 Local Variables:
1199 mode: change-log
1200 left-margin: 8
1201 fill-column: 74
1202 version-control: never
1203 End: