cpu/ChangeLog

   1 2019-09-09  Phil Blundell  <pb@pbcl.net>
   2
   3         binutils 2.33 branch created.
   4
   5 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
   6
   7         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
   8         %a and %ctx.
   9
  10 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
  11
  12         * bpf.cpu (dlabs): New pmacro.
  13         (dlind): Likewise.
  14
  15 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
  16
  17         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
  18         explicit 'dst' argument.
  19
  20 2019-06-13  Stafford Horne  <shorne@gmail.com>
  21
  22         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
  23
  24 2019-06-13  Stafford Horne  <shorne@gmail.com>
  25
  26         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  27         (l-adrp): Improve comment.
  28
  29 2019-06-13  Stafford Horne  <shorne@gmail.com>
  30
  31         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
  32         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  33         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  34         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  35         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  36         float-setflag-unordered-symantics): New pmacro for instruction
  37         symantics.
  38         (float-setflag-insn): Update to use float-setflag-insn-base.
  39         (float-setflag-unordered-insn): New pmacro for generating instructions.
  40
  41 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
  42             Stafford Horne  <shorne@gmail.com>
  43
  44         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
  45         (ORFPX-MACHS): Removed pmacro.
  46         * or1k.opc (or1k_cgen_insn_supported): New function.
  47         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
  48         (parse_regpair, print_regpair): New functions.
  49         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  50         and add comments.
  51         (h-fdr): Update comment to indicate or64.
  52         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  53         (h-fd32r): New hardware for 64-bit fpu registers.
  54         (h-i64r): New hardware for 64-bit int registers.
  55         * or1korbis.cpu (f-resv-8-1): New field.
  56         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  57         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  58         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  59         (h-roff1): New hardware.
  60         (double-field-and-ops mnemonic): New pmacro to generate operations
  61         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  62         (float-regreg-insn): Update single precision generator to MACH
  63         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  64         (float-setflag-insn): Update single precision generator to MACH
  65         ORFPX32-MACHS.  Fix double instructions from single to double
  66         precision.  Add generator for or32 64-bit instructions.
  67         (float-cust-insn cust-num): Update single precision generator to MACH
  68         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  69         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  70         ORFPX32-MACHS.
  71         (lf-rem-d): Fix operation from mod to rem.
  72         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
  73         (lf-itof-d): Fix operands from single to double.
  74         (lf-ftoi-d): Update operand mode from DI to WI.
  75
  76 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
  77
  78         * bpf.cpu: New file.
  79         * bpf.opc: Likewise.
  80
  81 2018-06-24  Nick Clifton  <nickc@redhat.com>
  82
  83         2.32 branch created.
  84
  85 2018-10-05  Richard Henderson  <rth@twiddle.net>
  86             Stafford Horne  <shorne@gmail.com>
  87
  88         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
  89         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
  90         (l-mul): Fix overflow support and indentation.
  91         (l-mulu): Fix overflow support and indentation.
  92         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
  93         (l-div); Remove incorrect carry behavior.
  94         (l-divu): Fix carry and overflow behavior.
  95         (l-mac): Add overflow support.
  96         (l-msb, l-msbu): Add carry and overflow support.
  97
  98 2018-10-05  Richard Henderson  <rth@twiddle.net>
  99
 100         * or1k.opc (parse_disp26): Add support for plta() relocations.
 101         (parse_disp21): New function.
 102         (or1k_rclass): New enum.
 103         (or1k_rtype): New enum.
 104         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 105         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 106         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 107         * or1korbis.cpu (f-disp26): Don't assume SI.
 108         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 109         (insn-opcode): Add ADRP.
 110         (l-adrp): New instruction.
 111
 112 2018-10-05  Richard Henderson  <rth@twiddle.net>
 113
 114         * or1k.opc: Add RTYPE_ enum.
 115         (INVALID_STORE_RELOC): New string.
 116         (or1k_imm16_relocs): New array array.
 117         (parse_reloc): New static function that just does the parsing.
 118         (parse_imm16): New static function for generic parsing.
 119         (parse_simm16): Change to just call parse_imm16.
 120         (parse_simm16_split): New function.
 121         (parse_uimm16): Change to call parse_imm16.
 122         (parse_uimm16_split): New function.
 123         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 124         (uimm16-split): Change to use new uimm16_split.
 125
 126 2018-07-24  Alan Modra  <amodra@gmail.com>
 127
 128         PR 23430
 129         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 130
 131 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 132
 133         * or1kcommon.cpu (spr-reg-info): Typo fix.
 134
 135 2018-03-03  Alan Modra  <amodra@gmail.com>
 136
 137         * frv.opc: Include opintl.h.
 138         (add_next_to_vliw): Use opcodes_error_handler to print error.
 139         Standardize error message.
 140         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 141
 142 2018-01-13  Nick Clifton  <nickc@redhat.com>
 143
 144         2.30 branch created.
 145
 146 2017-03-15  Stafford Horne  <shorne@gmail.com>
 147
 148         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 149
 150 2016-10-06  Alan Modra  <amodra@gmail.com>
 151
 152         * mep.opc (expand_string): Add fall through comment.
 153
 154 2016-03-03  Alan Modra  <amodra@gmail.com>
 155
 156         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 157         at what is really going on.
 158
 159 2016-03-02  Alan Modra  <amodra@gmail.com>
 160
 161         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 162
 163 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 164
 165         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 166         a constant to better align disassembler output.
 167
 168 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 169
 170         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 171
 172 2014-06-12  Alan Modra  <amodra@gmail.com>
 173
 174         * or1k.opc: Whitespace fixes.
 175
 176 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 177
 178         * or1korbis.cpu (h-atomic-reserve): New hardware.
 179         (h-atomic-address): Likewise.
 180         (insn-opcode): Add opcodes for LWA and SWA.
 181         (atomic-reserve): New operand.
 182         (atomic-address): Likewise.
 183         (l-lwa, l-swa): New instructions.
 184         (l-lbs): Fix typo in comment.
 185         (store-insn): Clear atomic reserve on store to atomic-address.
 186         Fix register names in fmt field.
 187
 188 2014-04-22  Christian Svensson  <blue@cmd.nu>
 189
 190         * openrisc.cpu: Delete.
 191         * openrisc.opc: Delete.
 192         * or1k.cpu: New file.
 193         * or1k.opc: New file.
 194         * or1kcommon.cpu: New file.
 195         * or1korbis.cpu: New file.
 196         * or1korfpx.cpu: New file.
 197
 198 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 199
 200         * epiphany.opc: Remove +x file mode.
 201
 202 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 203
 204         PR binutils/15241
 205         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 206         TLBVADDR, TLBPADDR and TLBBADVADDR.
 207
 208 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 209             Joern Rennecke  <joern.rennecke@embecosm.com>
 210
 211         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 212         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 213         (testset-insn): Add NO_DIS attribute to t.l.
 214         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 215         (move-insns): Add NO-DIS attribute to cmov.l.
 216         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 217         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 218         (op-rrr): Add NO-DIS attribute to .l.
 219         (shift-rrr): Add NO-DIS attribute to .l.
 220         (op-shift-rri): Add NO-DIS attribute to i32.l.
 221         (bitrl, movtl): Add NO-DIS attribute.
 222         (op-iextrrr): Add NO-DIS attribute to .l
 223         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 224         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 225
 226 2012-02-27  Alan Modra  <amodra@gmail.com>
 227
 228         * mt.opc (print_dollarhex): Trim values to 32 bits.
 229
 230 2011-12-15  Nick Clifton  <nickc@redhat.com>
 231
 232         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 233         hosts.
 234
 235 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 236
 237         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 238         Cast value before printing it as a long.
 239         (parse_postindex): Fix type of valuep.
 240
 241 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 242
 243         * cpu/epiphany.cpu: New file.
 244         * cpu/epiphany.opc: New file.
 245
 246 2011-08-22  Nick Clifton  <nickc@redhat.com>
 247
 248         * fr30.cpu: Newly contributed file.
 249         * fr30.opc: Likewise.
 250         * ip2k.cpu: Likewise.
 251         * ip2k.opc: Likewise.
 252         * mep-avc.cpu: Likewise.
 253         * mep-avc2.cpu: Likewise.
 254         * mep-c5.cpu: Likewise.
 255         * mep-core.cpu: Likewise.
 256         * mep-default.cpu: Likewise.
 257         * mep-ext-cop.cpu: Likewise.
 258         * mep-fmax.cpu: Likewise.
 259         * mep-h1.cpu: Likewise.
 260         * mep-ivc2.cpu: Likewise.
 261         * mep-rhcop.cpu: Likewise.
 262         * mep-sample-ucidsp.cpu: Likewise.
 263         * mep.cpu: Likewise.
 264         * mep.opc: Likewise.
 265         * openrisc.cpu: Likewise.
 266         * openrisc.opc: Likewise.
 267         * xstormy16.cpu: Likewise.
 268         * xstormy16.opc: Likewise.
 269
 270 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 271
 272         * frv.opc: #undef DEBUG.
 273
 274 2010-07-03  DJ Delorie  <dj@delorie.com>
 275
 276         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 277
 278 2010-02-11  Doug Evans  <dje@sebabeach.org>
 279
 280         * m32r.cpu (HASH-PREFIX): Delete.
 281         (duhpo, dshpo): New pmacros.
 282         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 283         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 284         attribute, define with dshpo.
 285         (uimm24): Delete HASH-PREFIX attribute.
 286         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 287         (print_signed_with_hash_prefix): New function.
 288         (print_unsigned_with_hash_prefix): New function.
 289         * xc16x.cpu (dowh): New pmacro.
 290         (upof16): Define with dowh, specify print handler.
 291         (qbit, qlobit, qhibit): Ditto.
 292         (upag16): Ditto.
 293         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 294         (print_with_dot_prefix): New functions.
 295         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 296
 297 2010-01-24  Doug Evans  <dje@sebabeach.org>
 298
 299         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 300         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 301         conditional-floating-point-conversion, ne-floating-point-conversion,
 302         float-parallel-mul-add-double-semantics): Ditto.
 303
 304 2010-01-05  Doug Evans  <dje@sebabeach.org>
 305
 306         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 307         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 308
 309 2010-01-02  Doug Evans  <dje@sebabeach.org>
 310
 311         * m32c.opc (parse_signed16): Fix typo.
 312
 313 2009-12-11  Nick Clifton  <nickc@redhat.com>
 314
 315         * frv.opc: Fix shadowed variable warnings.
 316         * m32c.opc: Fix shadowed variable warnings.
 317
 318 2009-11-14  Doug Evans  <dje@sebabeach.org>
 319
 320         Must use VOID expression in VOID context.
 321         * xc16x.cpu (mov4): Fix mode of `sequence'.
 322         (mov9, mov10): Ditto.
 323         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 324         (callr, callseg, calls, trap, rets, reti): Ditto.
 325         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 326         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 327         (exts, exts1, extsr, extsr1, prior): Ditto.
 328
 329 2009-10-23  Doug Evans  <dje@sebabeach.org>
 330
 331         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 332         cgen-ops.h -> cgen/basic-ops.h.
 333
 334 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 335
 336         * m32r.cpu (stb-plus): Typo fix.
 337
 338 2009-09-23  Doug Evans  <dje@sebabeach.org>
 339
 340         * m32r.cpu (sth-plus): Fix address mode and calculation.
 341         (stb-plus): Ditto.
 342         (clrpsw): Fix mask calculation.
 343         (bset, bclr, btst): Make mode in bit calculation match expression.
 344
 345         * xc16x.cpu (rtl-version): Set to 0.8.
 346         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 347         make uppercase.  Remove unnecessary name-prefix spec.
 348         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 349         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 350         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 351         (h-cr): New hardware.
 352         (muls): Comment out parts that won't compile, add fixme.
 353         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 354         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 355         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 356
 357 2009-07-16  Doug Evans  <dje@sebabeach.org>
 358
 359         * cpu/simplify.inc (*): One line doc strings don't need \n.
 360         (df): Invoke define-full-ifield instead of claiming it's an alias.
 361         (dno): Define.
 362         (dnop): Mark as deprecated.
 363
 364 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 365
 366         * m32c.opc (parse_lab_5_3): Use correct enum.
 367
 368 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 369
 370         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 371         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 372         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 373         arguments of "operation" to DI using "mode" and the new pmacros.
 374
 375 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 376
 377         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 378         of number 2, PID.
 379
 380 2008-12-23  Jon Beniston <jon@beniston.com>
 381
 382         * lm32.cpu: New file.
 383         * lm32.opc: New file.
 384
 385 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 386
 387         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 388         to source.
 389
 390 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 391
 392         * cris.cpu (movs, movu): Use result of extension operation when
 393         updating flags.
 394
 395 2007-07-04  Nick Clifton  <nickc@redhat.com>
 396
 397         * cris.cpu: Update copyright notice to refer to GPLv3.
 398         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 399         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 400         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 401         xc16x.opc: Likewise.
 402         * iq2000.cpu: Fix copyright notice to refer to FSF.
 403
 404 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 405
 406         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 407
 408 2007-04-20  Nick Clifton  <nickc@redhat.com>
 409
 410         * xc16x.cpu: Restore after accidentally overwriting this file with
 411         xc16x.opc.
 412
 413 2007-03-29  DJ Delorie  <dj@redhat.com>
 414
 415         * m32c.cpu (Imm-8-s4n): Fix print hook.
 416         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 417         (arith-jnz-imm4-dst-defn): Make relaxable.
 418         (arith-jnz16-imm4-dst-defn): Fix encodings.
 419
 420 2007-03-20  DJ Delorie  <dj@redhat.com>
 421
 422         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 423         mem20): New.
 424         (src16-16-20-An-relative-*): New.
 425         (dst16-*-20-An-relative-*): New.
 426         (dst16-16-16sa-*): New
 427         (dst16-16-16ar-*): New
 428         (dst32-16-16sa-Unprefixed-*): New
 429         (jsri): Fix operands.
 430         (setzx): Fix encoding.
 431
 432 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 433
 434         * m32r.opc: Formatting.
 435
 436 2006-05-22  Nick Clifton  <nickc@redhat.com>
 437
 438         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 439
 440 2006-04-10  DJ Delorie  <dj@redhat.com>
 441
 442         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 443         decides if this function accepts symbolic constants or not.
 444         (parse_signed_bitbase): Likewise.
 445         (parse_unsigned_bitbase8): Pass the new parameter.
 446         (parse_unsigned_bitbase11): Likewise.
 447         (parse_unsigned_bitbase16): Likewise.
 448         (parse_unsigned_bitbase19): Likewise.
 449         (parse_unsigned_bitbase27): Likewise.
 450         (parse_signed_bitbase8): Likewise.
 451         (parse_signed_bitbase11): Likewise.
 452         (parse_signed_bitbase19): Likewise.
 453
 454 2006-03-13  DJ Delorie  <dj@redhat.com>
 455
 456         * m32c.cpu (Bit3-S): New.
 457         (btst:s): New.
 458         * m32c.opc (parse_bit3_S): New.
 459
 460         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 461         (btst): Add optional :G suffix for MACH32.
 462         (or.b:S): New.
 463         (pop.w:G): Add optional :G suffix for MACH16.
 464         (push.b.imm): Fix syntax.
 465
 466 2006-03-10  DJ Delorie  <dj@redhat.com>
 467
 468         * m32c.cpu (mul.l): New.
 469         (mulu.l): New.
 470
 471 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 472
 473         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 474         an error message otherwise.
 475         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 476         Fix up comments to correctly describe the functions.
 477
 478 2006-02-24  DJ Delorie  <dj@redhat.com>
 479
 480         * m32c.cpu (RL_TYPE): New attribute, with macros.
 481         (Lab-8-24): Add RELAX.
 482         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 483         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 484         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 485         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 486         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 487         attribute.
 488         (jsri16, jsri32): Add 1ADDR attribute.
 489         (jsr32.w, jsr32.a): Add JUMP attribute.
 490
 491 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 492             Anil Paranjape   <anilp1@kpitcummins.com>
 493             Shilin Shakti    <shilins@kpitcummins.com>
 494
 495         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 496         description.
 497         * xc16x.opc: New file containing supporting XC16C routines.
 498
 499 2006-02-10  Nick Clifton  <nickc@redhat.com>
 500
 501         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 502
 503 2006-01-06  DJ Delorie  <dj@redhat.com>
 504
 505         * m32c.cpu (mov.w:q): Fix mode.
 506         (push32.b.imm): Likewise, for the comment.
 507
 508 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 509
 510         Second part of ms1 to mt renaming.
 511         * mt.cpu (define-arch, define-isa): Set name to mt.
 512         (define-mach): Adjust.
 513         * mt.opc (CGEN_ASM_HASH): Update.
 514         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 515         (parse_loopsize, parse_imm16): Adjust.
 516
 517 2005-12-13  DJ Delorie  <dj@redhat.com>
 518
 519         * m32c.cpu (jsri): Fix order so register names aren't treated as
 520         symbols.
 521         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 522         indexwd, indexws): Fix encodings.
 523
 524 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 525
 526         * mt.cpu: Rename from ms1.cpu.
 527         * mt.opc: Rename from ms1.opc.
 528
 529 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 530
 531         * cris.cpu (simplecris-common-writable-specregs)
 532         (simplecris-common-readable-specregs): Split from
 533         simplecris-common-specregs.  All users changed.
 534         (cris-implemented-writable-specregs-v0)
 535         (cris-implemented-readable-specregs-v0): Similar from
 536         cris-implemented-specregs-v0.
 537         (cris-implemented-writable-specregs-v3)
 538         (cris-implemented-readable-specregs-v3)
 539         (cris-implemented-writable-specregs-v8)
 540         (cris-implemented-readable-specregs-v8)
 541         (cris-implemented-writable-specregs-v10)
 542         (cris-implemented-readable-specregs-v10)
 543         (cris-implemented-writable-specregs-v32)
 544         (cris-implemented-readable-specregs-v32): Similar.
 545         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 546         insns and specializations.
 547
 548 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 549
 550         Add ms2
 551         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 552         model.
 553         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 554         f-cb2incr, f-rc3): New fields.
 555         (LOOP): New instruction.
 556         (JAL-HAZARD): New hazard.
 557         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 558         New operands.
 559         (mul, muli, dbnz, iflush): Enable for ms2
 560         (jal, reti): Has JAL-HAZARD.
 561         (ldctxt, ldfb, stfb): Only ms1.
 562         (fbcb): Only ms1,ms1-003.
 563         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 564         fbcbincrs, mfbcbincrs): Enable for ms2.
 565         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 566         * ms1.opc (parse_loopsize): New.
 567         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 568         (print_pcrel): New.
 569
 570 2005-10-28  Dave Brolley  <brolley@redhat.com>
 571
 572         Contribute the following change:
 573         2003-09-24  Dave Brolley  <brolley@redhat.com>
 574
 575         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 576         CGEN_ATTR_VALUE_TYPE.
 577         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 578         Use cgen_bitset_intersect_p.
 579
 580 2005-10-27  DJ Delorie  <dj@redhat.com>
 581
 582         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 583         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 584         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 585         imm operand is needed.
 586         (adjnz, sbjnz): Pass the right operands.
 587         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 588         unary-insn): Add -g variants for opcodes that need to support :G.
 589         (not.BW:G, push.BW:G): Call it.
 590         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 591         stzx16-imm8-imm8-abs16): Fix operand typos.
 592         * m32c.opc (m32c_asm_hash): Support bnCND.
 593         (parse_signed4n, print_signed4n): New.
 594
 595 2005-10-26  DJ Delorie  <dj@redhat.com>
 596
 597         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 598         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 599         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 600         dsp8[sp] is signed.
 601         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 602         (mov.BW:S r0,r1): Fix typo r1l->r1.
 603         (tst): Allow :G suffix.
 604         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 605
 606 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 607
 608         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 609
 610 2005-10-25  DJ Delorie  <dj@redhat.com>
 611
 612         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 613         making one a macro of the other.
 614
 615 2005-10-21  DJ Delorie  <dj@redhat.com>
 616
 617         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 618         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 619         indexld, indexls): .w variants have `1' bit.
 620         (rot32.b): QI, not SI.
 621         (rot32.w): HI, not SI.
 622         (xchg16): HI for .w variant.
 623
 624 2005-10-19  Nick Clifton  <nickc@redhat.com>
 625
 626         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 627
 628 2005-10-18  Andreas Schwab  <schwab@suse.de>
 629
 630         * m32r.opc (parse_slo16): Better version of previous patch.
 631
 632 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 633
 634         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 635         size.
 636
 637 2005-07-25  DJ Delorie  <dj@redhat.com>
 638
 639         * m32c.opc (parse_unsigned8): Add %dsp8().
 640         (parse_signed8): Add %hi8().
 641         (parse_unsigned16): Add %dsp16().
 642         (parse_signed16): Add %lo16() and %hi16().
 643         (parse_lab_5_3): Make valuep a bfd_vma *.
 644
 645 2005-07-18  Nick Clifton  <nickc@redhat.com>
 646
 647         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 648         components.
 649         (f-lab32-jmp-s): Fix insertion sequence.
 650         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 651         (Dsp-40-s8): Make parameter be signed.
 652         (Dsp-40-s16): Likewise.
 653         (Dsp-48-s8): Likewise.
 654         (Dsp-48-s16): Likewise.
 655         (Imm-13-u3): Likewise. (Despite its name!)
 656         (BitBase16-16-s8): Make the parameter be unsigned.
 657         (BitBase16-8-u11-S): Likewise.
 658         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 659         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 660         relaxation.
 661
 662         * m32c.opc: Fix formatting.
 663         Use safe-ctype.h instead of ctype.h
 664         Move duplicated code sequences into a macro.
 665         Fix compile time warnings about signedness mismatches.
 666         Remove dead code.
 667         (parse_lab_5_3): New parser function.
 668
 669 2005-07-16  Jim Blandy  <jimb@redhat.com>
 670
 671         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 672         to represent isa sets.
 673
 674 2005-07-15  Jim Blandy  <jimb@redhat.com>
 675
 676         * m32c.cpu, m32c.opc: Fix copyright.
 677
 678 2005-07-14  Jim Blandy  <jimb@redhat.com>
 679
 680         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 681
 682 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 683
 684         * ms1.opc (print_dollarhex): Correct format string.
 685
 686 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 687
 688         * iq2000.cpu: Include from binutils cpu dir.
 689
 690 2005-07-05  Nick Clifton  <nickc@redhat.com>
 691
 692         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 693         unsigned in order to avoid compile time warnings about sign
 694         conflicts.
 695
 696         * ms1.opc (parse_*): Likewise.
 697         (parse_imm16): Use a "void *" as it is passed both signed and
 698         unsigned arguments.
 699
 700 2005-07-01  Nick Clifton  <nickc@redhat.com>
 701
 702         * frv.opc: Update to ISO C90 function declaration style.
 703         * iq2000.opc: Likewise.
 704         * m32r.opc: Likewise.
 705         * sh.opc: Likewise.
 706
 707 2005-06-15  Dave Brolley  <brolley@redhat.com>
 708
 709         Contributed by Red Hat.
 710         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 711         * ms1.opc: New file.  Written by Stan Cox.
 712
 713 2005-05-10  Nick Clifton  <nickc@redhat.com>
 714
 715         * Update the address and phone number of the FSF organization in
 716         the GPL notices in the following files:
 717         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 718         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 719         sh64-media.cpu, simplify.inc
 720
 721 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 722
 723         * frv.opc (parse_A): Warning fix.
 724
 725 2005-02-23  Nick Clifton  <nickc@redhat.com>
 726
 727         * frv.opc: Fixed compile time warnings about differing signed'ness
 728         of pointers passed to functions.
 729         * m32r.opc: Likewise.
 730
 731 2005-02-11  Nick Clifton  <nickc@redhat.com>
 732
 733         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 734         'bfd_vma *' in order avoid compile time warning message.
 735
 736 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 737
 738         * cris.cpu (mstep): Add missing insn.
 739
 740 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 741
 742         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 743         * frv.cpu: Add support for TLS annotations in loads and calll.
 744         * frv.opc (parse_symbolic_address): New.
 745         (parse_ldd_annotation): New.
 746         (parse_call_annotation): New.
 747         (parse_ld_annotation): New.
 748         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 749         Introduce TLS relocations.
 750         (parse_d12, parse_s12, parse_u12): Likewise.
 751         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 752         (parse_call_label, print_at): New.
 753
 754 2004-12-21  Mikael Starvik  <starvik@axis.com>
 755
 756         * cris.cpu (cris-set-mem): Correct integral write semantics.
 757
 758 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 759
 760         * cris.cpu: New file.
 761
 762 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 763
 764         * iq2000.cpu: Added quotes around macro arguments so that they
 765         will work with newer versions of guile.
 766
 767 2004-10-27  Nick Clifton  <nickc@redhat.com>
 768
 769         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 770         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 771         operand.
 772         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 773         with guile.
 774
 775 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 776
 777         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 778
 779 2004-05-15  Nick Clifton  <nickc@redhat.com>
 780
 781         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 782
 783 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 784
 785         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 786
 787 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 788
 789         * frv.cpu (define-arch frv): Add fr450 mach.
 790         (define-mach fr450): New.
 791         (define-model fr450): New.  Add profile units to every fr450 insn.
 792         (define-attr UNIT): Add MDCUTSSI.
 793         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 794         (define-attr AUDIO): New boolean.
 795         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 796         (f-LRA-null, f-TLBPR-null): New fields.
 797         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 798         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 799         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 800         (LRA-null, TLBPR-null): New macros.
 801         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 802         (load-real-address): New macro.
 803         (lrai, lrad, tlbpr): New instructions.
 804         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 805         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 806         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 807         (media-low-clear-semantics, media-scope-limit-semantics)
 808         (media-quad-limit, media-quad-shift): New macros.
 809         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 810         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 811         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 812         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 813         (fr450_unit_mapping): New array.
 814         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 815         for new MDCUTSSI unit.
 816         (fr450_check_insn_major_constraints): New function.
 817         (check_insn_major_constraints): Use it.
 818
 819 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 820
 821         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 822         (scutss): Change unit to I0.
 823         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 824         (mqsaths): Fix FR400-MAJOR categorization.
 825         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 826         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 827         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 828         combinations.
 829
 830 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 831
 832         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 833         (rstb, rsth, rst, rstd, rstq): Delete.
 834         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 835
 836 2004-02-23  Nick Clifton  <nickc@redhat.com>
 837
 838         * Apply these patches from Renesas:
 839
 840         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 841
 842         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 843         disassembling codes for 0x*2 addresses.
 844
 845         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 846
 847         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 848
 849         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 850
 851         * cpu/m32r.cpu : Add new model m32r2.
 852         Add new instructions.
 853         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 854         Changed PIPE attr of push from O to OS.
 855         Care for Little-endian of M32R.
 856         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 857         Care for Little-endian of M32R.
 858         (parse_slo16): signed extension for value.
 859
 860 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 861
 862         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 863         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 864
 865         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 866         written by Ben Elliston.
 867
 868 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 869
 870         * frv.cpu (UNIT): Add IACC.
 871         (iacc-multiply-r-r): Use it.
 872         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 873         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 874
 875 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 876
 877         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 878         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 879         cut&paste errors in shifting/truncating numerical operands.
 880         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 881         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 882         (parse_uslo16): Likewise.
 883         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 884         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 885         (parse_s12): Likewise.
 886         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 887         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 888         (parse_uslo16): Likewise.
 889         (parse_uhi16): Parse gothi and gotfuncdeschi.
 890         (parse_d12): Parse got12 and gotfuncdesc12.
 891         (parse_s12): Likewise.
 892
 893 2003-10-10  Dave Brolley  <brolley@redhat.com>
 894
 895         * frv.cpu (dnpmop): New p-macro.
 896         (GRdoublek): Use dnpmop.
 897         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 898         (store-double-r-r): Use (.sym regtype doublek).
 899         (r-store-double): Ditto.
 900         (store-double-r-r-u): Ditto.
 901         (conditional-store-double): Ditto.
 902         (conditional-store-double-u): Ditto.
 903         (store-double-r-simm): Ditto.
 904         (fmovs): Assign to UNIT FMALL.
 905
 906 2003-10-06  Dave Brolley  <brolley@redhat.com>
 907
 908         * frv.cpu, frv.opc: Add support for fr550.
 909
 910 2003-09-24  Dave Brolley  <brolley@redhat.com>
 911
 912         * frv.cpu (u-commit): New modelling unit for fr500.
 913         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 914         (commit-r): Use u-commit model for fr500.
 915         (commit): Ditto.
 916         (conditional-float-binary-op): Take profiling data as an argument.
 917         Update callers.
 918         (ne-float-binary-op): Ditto.
 919
 920 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 921
 922         * frv.cpu (nldqi): Delete unimplemented instruction.
 923
 924 2003-09-12  Dave Brolley  <brolley@redhat.com>
 925
 926         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 927         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 928         frv_ref_SI to get input register referenced for profiling.
 929         (clear-ne-flag-all): Pass insn profiling in as an argument.
 930         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 931
 932 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 933
 934         * frv.cpu: Typographical corrections.
 935
 936 2003-09-09  Dave Brolley  <brolley@redhat.com>
 937
 938         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 939         (conditional-media-dual-complex, media-quad-complex): Likewise.
 940
 941 2003-09-04  Dave Brolley  <brolley@redhat.com>
 942
 943         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 944         Update all callers.
 945         (conditional-register-transfer): Ditto.
 946         (cache-preload): Ditto.
 947         (floating-point-conversion): Ditto.
 948         (floating-point-neg): Ditto.
 949         (float-abs): Ditto.
 950         (float-binary-op-s): Ditto.
 951         (conditional-float-binary-op): Ditto.
 952         (ne-float-binary-op): Ditto.
 953         (float-dual-arith): Ditto.
 954         (ne-float-dual-arith): Ditto.
 955
 956 2003-09-03  Dave Brolley  <brolley@redhat.com>
 957
 958         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 959         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 960         MCLRACC-1.
 961         (A): Removed operand.
 962         (A0,A1): New operands replace operand A.
 963         (mnop): Now a real insn
 964         (mclracc): Removed insn.
 965         (mclracc-0, mclracc-1): New insns replace mclracc.
 966         (all insns): Use new UNIT attributes.
 967
 968 2003-08-21  Nick Clifton  <nickc@redhat.com>
 969
 970         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 971         and u-media-dual-btoh with output parameter.
 972         (cmbtoh): Add profiling hack.
 973
 974 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 975
 976         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 977
 978 2003-06-10  Doug Evans  <dje@sebabeach.org>
 979
 980         * frv.cpu: Add IDOC attribute.
 981
 982 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 983
 984         Contributed by Red Hat.
 985         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 986         Stan Cox, and Frank Ch. Eigler.
 987         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 988         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 989         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 990         * iq10.cpu: New file.  Written by Jeff Johnston.
 991
 992 2003-06-05  Nick Clifton  <nickc@redhat.com>
 993
 994         * frv.cpu (FRintieven): New operand.  An even-numbered only
 995         version of the FRinti operand.
 996         (FRintjeven): Likewise for FRintj.
 997         (FRintkeven): Likewise for FRintk.
 998         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 999         media-quad-arith-sat-semantics, media-quad-arith-sat,
1000         conditional-media-quad-arith-sat, mdunpackh,
1001         media-quad-multiply-semantics, media-quad-multiply,
1002         conditional-media-quad-multiply, media-quad-complex-i,
1003         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1004         conditional-media-quad-multiply-acc, munpackh,
1005         media-quad-multiply-cross-acc-semantics, mdpackh,
1006         media-quad-multiply-cross-acc, mbtoh-semantics,
1007         media-quad-cross-multiply-cross-acc-semantics,
1008         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1009         media-quad-cross-multiply-acc-semantics, cmbtoh,
1010         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1011         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1012         cmhtob): Use new operands.
1013         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1014         (parse_even_register): New function.
1015
1016 2003-06-03  Nick Clifton  <nickc@redhat.com>
1017
1018         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1019         immediate value not unsigned.
1020
1021 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1022
1023         Contributed by Red Hat.
1024         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1025         and Eric Christopher.
1026         * frv.opc: New file.  Written by Catherine Moore, and Dave
1027         Brolley.
1028         * simplify.inc: New file.  Written by Doug Evans.
1029
1030 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1031
1032         * New file.
1033
1034 \f
1035 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1036
1037 Copying and distribution of this file, with or without modification,
1038 are permitted in any medium without royalty provided the copyright
1039 notice and this notice are preserved.
1040
1041 Local Variables:
1042 mode: change-log
1043 left-margin: 8
1044 fill-column: 74
1045 version-control: never
1046 End: