39739d5c53ab8770bcfb2ab94e25ce1bb50c6861
[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2006-03-13 DJ Delorie <dj@redhat.com>
2
3 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
4 (btst): Add optional :G suffix for MACH32.
5 (or.b:S): New.
6 (pop.w:G): Add optional :G suffix for MACH16.
7 (push.b.imm): Fix syntax.
8
9 2006-03-10 DJ Delorie <dj@redhat.com>
10
11 * m32c.cpu (mul.l): New.
12 (mulu.l): New.
13
14 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
15
16 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
17 an error message otherwise.
18 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
19 Fix up comments to correctly describe the functions.
20
21 2006-02-24 DJ Delorie <dj@redhat.com>
22
23 * m32c.cpu (RL_TYPE): New attribute, with macros.
24 (Lab-8-24): Add RELAX.
25 (unary-insn-defn-g, binary-arith-imm-dst-defn,
26 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
27 (binary-arith-src-dst-defn): Add 2ADDR attribute.
28 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
29 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
30 attribute.
31 (jsri16, jsri32): Add 1ADDR attribute.
32 (jsr32.w, jsr32.a): Add JUMP attribute.
33
34 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
35 Anil Paranjape <anilp1@kpitcummins.com>
36 Shilin Shakti <shilins@kpitcummins.com>
37
38 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
39 description.
40 * xc16x.opc: New file containing supporting XC16C routines.
41
42 2006-02-10 Nick Clifton <nickc@redhat.com>
43
44 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
45
46 2006-01-06 DJ Delorie <dj@redhat.com>
47
48 * m32c.cpu (mov.w:q): Fix mode.
49 (push32.b.imm): Likewise, for the comment.
50
51 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
52
53 Second part of ms1 to mt renaming.
54 * mt.cpu (define-arch, define-isa): Set name to mt.
55 (define-mach): Adjust.
56 * mt.opc (CGEN_ASM_HASH): Update.
57 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
58 (parse_loopsize, parse_imm16): Adjust.
59
60 2005-12-13 DJ Delorie <dj@redhat.com>
61
62 * m32c.cpu (jsri): Fix order so register names aren't treated as
63 symbols.
64 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
65 indexwd, indexws): Fix encodings.
66
67 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
68
69 * mt.cpu: Rename from ms1.cpu.
70 * mt.opc: Rename from ms1.opc.
71
72 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
73
74 * cris.cpu (simplecris-common-writable-specregs)
75 (simplecris-common-readable-specregs): Split from
76 simplecris-common-specregs. All users changed.
77 (cris-implemented-writable-specregs-v0)
78 (cris-implemented-readable-specregs-v0): Similar from
79 cris-implemented-specregs-v0.
80 (cris-implemented-writable-specregs-v3)
81 (cris-implemented-readable-specregs-v3)
82 (cris-implemented-writable-specregs-v8)
83 (cris-implemented-readable-specregs-v8)
84 (cris-implemented-writable-specregs-v10)
85 (cris-implemented-readable-specregs-v10)
86 (cris-implemented-writable-specregs-v32)
87 (cris-implemented-readable-specregs-v32): Similar.
88 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
89 insns and specializations.
90
91 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
92
93 Add ms2
94 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
95 model.
96 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
97 f-cb2incr, f-rc3): New fields.
98 (LOOP): New instruction.
99 (JAL-HAZARD): New hazard.
100 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
101 New operands.
102 (mul, muli, dbnz, iflush): Enable for ms2
103 (jal, reti): Has JAL-HAZARD.
104 (ldctxt, ldfb, stfb): Only ms1.
105 (fbcb): Only ms1,ms1-003.
106 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
107 fbcbincrs, mfbcbincrs): Enable for ms2.
108 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
109 * ms1.opc (parse_loopsize): New.
110 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
111 (print_pcrel): New.
112
113 2005-10-28 Dave Brolley <brolley@redhat.com>
114
115 Contribute the following change:
116 2003-09-24 Dave Brolley <brolley@redhat.com>
117
118 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
119 CGEN_ATTR_VALUE_TYPE.
120 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
121 Use cgen_bitset_intersect_p.
122
123 2005-10-27 DJ Delorie <dj@redhat.com>
124
125 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
126 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
127 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
128 imm operand is needed.
129 (adjnz, sbjnz): Pass the right operands.
130 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
131 unary-insn): Add -g variants for opcodes that need to support :G.
132 (not.BW:G, push.BW:G): Call it.
133 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
134 stzx16-imm8-imm8-abs16): Fix operand typos.
135 * m32c.opc (m32c_asm_hash): Support bnCND.
136 (parse_signed4n, print_signed4n): New.
137
138 2005-10-26 DJ Delorie <dj@redhat.com>
139
140 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
141 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
142 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
143 dsp8[sp] is signed.
144 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
145 (mov.BW:S r0,r1): Fix typo r1l->r1.
146 (tst): Allow :G suffix.
147 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
148
149 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
150
151 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
152
153 2005-10-25 DJ Delorie <dj@redhat.com>
154
155 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
156 making one a macro of the other.
157
158 2005-10-21 DJ Delorie <dj@redhat.com>
159
160 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
161 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
162 indexld, indexls): .w variants have `1' bit.
163 (rot32.b): QI, not SI.
164 (rot32.w): HI, not SI.
165 (xchg16): HI for .w variant.
166
167 2005-10-19 Nick Clifton <nickc@redhat.com>
168
169 * m32r.opc (parse_slo16): Fix bad application of previous patch.
170
171 2005-10-18 Andreas Schwab <schwab@suse.de>
172
173 * m32r.opc (parse_slo16): Better version of previous patch.
174
175 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
176
177 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
178 size.
179
180 2005-07-25 DJ Delorie <dj@redhat.com>
181
182 * m32c.opc (parse_unsigned8): Add %dsp8().
183 (parse_signed8): Add %hi8().
184 (parse_unsigned16): Add %dsp16().
185 (parse_signed16): Add %lo16() and %hi16().
186 (parse_lab_5_3): Make valuep a bfd_vma *.
187
188 2005-07-18 Nick Clifton <nickc@redhat.com>
189
190 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
191 components.
192 (f-lab32-jmp-s): Fix insertion sequence.
193 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
194 (Dsp-40-s8): Make parameter be signed.
195 (Dsp-40-s16): Likewise.
196 (Dsp-48-s8): Likewise.
197 (Dsp-48-s16): Likewise.
198 (Imm-13-u3): Likewise. (Despite its name!)
199 (BitBase16-16-s8): Make the parameter be unsigned.
200 (BitBase16-8-u11-S): Likewise.
201 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
202 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
203 relaxation.
204
205 * m32c.opc: Fix formatting.
206 Use safe-ctype.h instead of ctype.h
207 Move duplicated code sequences into a macro.
208 Fix compile time warnings about signedness mismatches.
209 Remove dead code.
210 (parse_lab_5_3): New parser function.
211
212 2005-07-16 Jim Blandy <jimb@redhat.com>
213
214 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
215 to represent isa sets.
216
217 2005-07-15 Jim Blandy <jimb@redhat.com>
218
219 * m32c.cpu, m32c.opc: Fix copyright.
220
221 2005-07-14 Jim Blandy <jimb@redhat.com>
222
223 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
224
225 2005-07-14 Alan Modra <amodra@bigpond.net.au>
226
227 * ms1.opc (print_dollarhex): Correct format string.
228
229 2005-07-06 Alan Modra <amodra@bigpond.net.au>
230
231 * iq2000.cpu: Include from binutils cpu dir.
232
233 2005-07-05 Nick Clifton <nickc@redhat.com>
234
235 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
236 unsigned in order to avoid compile time warnings about sign
237 conflicts.
238
239 * ms1.opc (parse_*): Likewise.
240 (parse_imm16): Use a "void *" as it is passed both signed and
241 unsigned arguments.
242
243 2005-07-01 Nick Clifton <nickc@redhat.com>
244
245 * frv.opc: Update to ISO C90 function declaration style.
246 * iq2000.opc: Likewise.
247 * m32r.opc: Likewise.
248 * sh.opc: Likewise.
249
250 2005-06-15 Dave Brolley <brolley@redhat.com>
251
252 Contributed by Red Hat.
253 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
254 * ms1.opc: New file. Written by Stan Cox.
255
256 2005-05-10 Nick Clifton <nickc@redhat.com>
257
258 * Update the address and phone number of the FSF organization in
259 the GPL notices in the following files:
260 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
261 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
262 sh64-media.cpu, simplify.inc
263
264 2005-02-24 Alan Modra <amodra@bigpond.net.au>
265
266 * frv.opc (parse_A): Warning fix.
267
268 2005-02-23 Nick Clifton <nickc@redhat.com>
269
270 * frv.opc: Fixed compile time warnings about differing signed'ness
271 of pointers passed to functions.
272 * m32r.opc: Likewise.
273
274 2005-02-11 Nick Clifton <nickc@redhat.com>
275
276 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
277 'bfd_vma *' in order avoid compile time warning message.
278
279 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
280
281 * cris.cpu (mstep): Add missing insn.
282
283 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
284
285 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
286 * frv.cpu: Add support for TLS annotations in loads and calll.
287 * frv.opc (parse_symbolic_address): New.
288 (parse_ldd_annotation): New.
289 (parse_call_annotation): New.
290 (parse_ld_annotation): New.
291 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
292 Introduce TLS relocations.
293 (parse_d12, parse_s12, parse_u12): Likewise.
294 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
295 (parse_call_label, print_at): New.
296
297 2004-12-21 Mikael Starvik <starvik@axis.com>
298
299 * cris.cpu (cris-set-mem): Correct integral write semantics.
300
301 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
302
303 * cris.cpu: New file.
304
305 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
306
307 * iq2000.cpu: Added quotes around macro arguments so that they
308 will work with newer versions of guile.
309
310 2004-10-27 Nick Clifton <nickc@redhat.com>
311
312 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
313 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
314 operand.
315 * iq2000.cpu (dnop index): Rename to _index to avoid complications
316 with guile.
317
318 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
319
320 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
321
322 2004-05-15 Nick Clifton <nickc@redhat.com>
323
324 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
325
326 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
327
328 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
329
330 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
331
332 * frv.cpu (define-arch frv): Add fr450 mach.
333 (define-mach fr450): New.
334 (define-model fr450): New. Add profile units to every fr450 insn.
335 (define-attr UNIT): Add MDCUTSSI.
336 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
337 (define-attr AUDIO): New boolean.
338 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
339 (f-LRA-null, f-TLBPR-null): New fields.
340 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
341 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
342 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
343 (LRA-null, TLBPR-null): New macros.
344 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
345 (load-real-address): New macro.
346 (lrai, lrad, tlbpr): New instructions.
347 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
348 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
349 (mdcutssi): Change UNIT attribute to MDCUTSSI.
350 (media-low-clear-semantics, media-scope-limit-semantics)
351 (media-quad-limit, media-quad-shift): New macros.
352 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
353 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
354 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
355 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
356 (fr450_unit_mapping): New array.
357 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
358 for new MDCUTSSI unit.
359 (fr450_check_insn_major_constraints): New function.
360 (check_insn_major_constraints): Use it.
361
362 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
363
364 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
365 (scutss): Change unit to I0.
366 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
367 (mqsaths): Fix FR400-MAJOR categorization.
368 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
369 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
370 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
371 combinations.
372
373 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
374
375 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
376 (rstb, rsth, rst, rstd, rstq): Delete.
377 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
378
379 2004-02-23 Nick Clifton <nickc@redhat.com>
380
381 * Apply these patches from Renesas:
382
383 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
384
385 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
386 disassembling codes for 0x*2 addresses.
387
388 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
389
390 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
391
392 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
393
394 * cpu/m32r.cpu : Add new model m32r2.
395 Add new instructions.
396 Replace occurrances of 'Mitsubishi' with 'Renesas'.
397 Changed PIPE attr of push from O to OS.
398 Care for Little-endian of M32R.
399 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
400 Care for Little-endian of M32R.
401 (parse_slo16): signed extension for value.
402
403 2004-02-20 Andrew Cagney <cagney@redhat.com>
404
405 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
406 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
407
408 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
409 written by Ben Elliston.
410
411 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
412
413 * frv.cpu (UNIT): Add IACC.
414 (iacc-multiply-r-r): Use it.
415 * frv.opc (fr400_unit_mapping): Add entry for IACC.
416 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
417
418 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
419
420 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
421 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
422 cut&paste errors in shifting/truncating numerical operands.
423 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
424 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
425 (parse_uslo16): Likewise.
426 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
427 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
428 (parse_s12): Likewise.
429 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
430 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
431 (parse_uslo16): Likewise.
432 (parse_uhi16): Parse gothi and gotfuncdeschi.
433 (parse_d12): Parse got12 and gotfuncdesc12.
434 (parse_s12): Likewise.
435
436 2003-10-10 Dave Brolley <brolley@redhat.com>
437
438 * frv.cpu (dnpmop): New p-macro.
439 (GRdoublek): Use dnpmop.
440 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
441 (store-double-r-r): Use (.sym regtype doublek).
442 (r-store-double): Ditto.
443 (store-double-r-r-u): Ditto.
444 (conditional-store-double): Ditto.
445 (conditional-store-double-u): Ditto.
446 (store-double-r-simm): Ditto.
447 (fmovs): Assign to UNIT FMALL.
448
449 2003-10-06 Dave Brolley <brolley@redhat.com>
450
451 * frv.cpu, frv.opc: Add support for fr550.
452
453 2003-09-24 Dave Brolley <brolley@redhat.com>
454
455 * frv.cpu (u-commit): New modelling unit for fr500.
456 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
457 (commit-r): Use u-commit model for fr500.
458 (commit): Ditto.
459 (conditional-float-binary-op): Take profiling data as an argument.
460 Update callers.
461 (ne-float-binary-op): Ditto.
462
463 2003-09-19 Michael Snyder <msnyder@redhat.com>
464
465 * frv.cpu (nldqi): Delete unimplemented instruction.
466
467 2003-09-12 Dave Brolley <brolley@redhat.com>
468
469 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
470 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
471 frv_ref_SI to get input register referenced for profiling.
472 (clear-ne-flag-all): Pass insn profiling in as an argument.
473 (clrgr,clrfr,clrga,clrfa): Add profiling information.
474
475 2003-09-11 Michael Snyder <msnyder@redhat.com>
476
477 * frv.cpu: Typographical corrections.
478
479 2003-09-09 Dave Brolley <brolley@redhat.com>
480
481 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
482 (conditional-media-dual-complex, media-quad-complex): Likewise.
483
484 2003-09-04 Dave Brolley <brolley@redhat.com>
485
486 * frv.cpu (register-transfer): Pass in all attributes in on argument.
487 Update all callers.
488 (conditional-register-transfer): Ditto.
489 (cache-preload): Ditto.
490 (floating-point-conversion): Ditto.
491 (floating-point-neg): Ditto.
492 (float-abs): Ditto.
493 (float-binary-op-s): Ditto.
494 (conditional-float-binary-op): Ditto.
495 (ne-float-binary-op): Ditto.
496 (float-dual-arith): Ditto.
497 (ne-float-dual-arith): Ditto.
498
499 2003-09-03 Dave Brolley <brolley@redhat.com>
500
501 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
502 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
503 MCLRACC-1.
504 (A): Removed operand.
505 (A0,A1): New operands replace operand A.
506 (mnop): Now a real insn
507 (mclracc): Removed insn.
508 (mclracc-0, mclracc-1): New insns replace mclracc.
509 (all insns): Use new UNIT attributes.
510
511 2003-08-21 Nick Clifton <nickc@redhat.com>
512
513 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
514 and u-media-dual-btoh with output parameter.
515 (cmbtoh): Add profiling hack.
516
517 2003-08-19 Michael Snyder <msnyder@redhat.com>
518
519 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
520
521 2003-06-10 Doug Evans <dje@sebabeach.org>
522
523 * frv.cpu: Add IDOC attribute.
524
525 2003-06-06 Andrew Cagney <cagney@redhat.com>
526
527 Contributed by Red Hat.
528 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
529 Stan Cox, and Frank Ch. Eigler.
530 * iq2000.opc: New file. Written by Ben Elliston, Frank
531 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
532 * iq2000m.cpu: New file. Written by Jeff Johnston.
533 * iq10.cpu: New file. Written by Jeff Johnston.
534
535 2003-06-05 Nick Clifton <nickc@redhat.com>
536
537 * frv.cpu (FRintieven): New operand. An even-numbered only
538 version of the FRinti operand.
539 (FRintjeven): Likewise for FRintj.
540 (FRintkeven): Likewise for FRintk.
541 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
542 media-quad-arith-sat-semantics, media-quad-arith-sat,
543 conditional-media-quad-arith-sat, mdunpackh,
544 media-quad-multiply-semantics, media-quad-multiply,
545 conditional-media-quad-multiply, media-quad-complex-i,
546 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
547 conditional-media-quad-multiply-acc, munpackh,
548 media-quad-multiply-cross-acc-semantics, mdpackh,
549 media-quad-multiply-cross-acc, mbtoh-semantics,
550 media-quad-cross-multiply-cross-acc-semantics,
551 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
552 media-quad-cross-multiply-acc-semantics, cmbtoh,
553 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
554 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
555 cmhtob): Use new operands.
556 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
557 (parse_even_register): New function.
558
559 2003-06-03 Nick Clifton <nickc@redhat.com>
560
561 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
562 immediate value not unsigned.
563
564 2003-06-03 Andrew Cagney <cagney@redhat.com>
565
566 Contributed by Red Hat.
567 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
568 and Eric Christopher.
569 * frv.opc: New file. Written by Catherine Moore, and Dave
570 Brolley.
571 * simplify.inc: New file. Written by Doug Evans.
572
573 2003-05-02 Andrew Cagney <cagney@redhat.com>
574
575 * New file.
576
577 \f
578 Local Variables:
579 mode: change-log
580 left-margin: 8
581 fill-column: 74
582 version-control: never
583 End:
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