cpu/ChangeLog

   1 2020-01-30  Alan Modra  <amodra@gmail.com>
   2
   3         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
   4         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
   5         (f-dst32-rn-prefixed-QI): Likewise.
   6         (f-dsp-32-s32): Mask before shifting left.
   7         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
   8         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
   9         shifting left.
  10         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
  11         (h-gr-SI): Mask before shifting.
  12
  13 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  14
  15         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
  16         (neg and neg32) use OP_SRC_K even if they operate only in
  17         registers.
  18
  19 2020-01-18  Nick Clifton  <nickc@redhat.com>
  20
  21         Binutils 2.34 branch created.
  22
  23 2020-01-13  Alan Modra  <amodra@gmail.com>
  24
  25         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
  26         left shift signed values.
  27
  28 2020-01-06  Alan Modra  <amodra@gmail.com>
  29
  30         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
  31         bits before shifting rather than masking after shifting.
  32         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
  33         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
  34         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
  35         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
  36
  37 2020-01-04  Alan Modra  <amodra@gmail.com>
  38
  39         * m32r.cpu (f-disp8): Avoid left shift of negative values.
  40         (f-disp16, f-disp24): Likewise.
  41
  42 2019-12-23  Alan Modra  <amodra@gmail.com>
  43
  44         * iq2000.cpu (f-offset): Avoid left shift of negative values.
  45
  46 2019-12-20  Alan Modra  <amodra@gmail.com>
  47
  48         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
  49
  50 2019-12-17  Alan Modra  <amodra@gmail.com>
  51
  52         * bpf.cpu (f-imm64): Avoid signed overflow.
  53
  54 2019-12-16  Alan Modra  <amodra@gmail.com>
  55
  56         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
  57
  58 2019-12-11  Alan Modra  <amodra@gmail.com>
  59
  60         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
  61         * lm32.cpu (f-branch, f-vall): Likewise.
  62         * m32.cpu (f-lab-8-16): Likewise.
  63
  64 2019-12-11  Alan Modra  <amodra@gmail.com>
  65
  66         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
  67         shift left to avoid UB on left shift of negative values.
  68
  69 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
  70
  71         * bpf.cpu: Fix comment describing the 128-bit instruction format.
  72
  73 2019-09-09  Phil Blundell  <pb@pbcl.net>
  74
  75         binutils 2.33 branch created.
  76
  77 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
  78
  79         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
  80         %a and %ctx.
  81
  82 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
  83
  84         * bpf.cpu (dlabs): New pmacro.
  85         (dlind): Likewise.
  86
  87 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
  88
  89         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
  90         explicit 'dst' argument.
  91
  92 2019-06-13  Stafford Horne  <shorne@gmail.com>
  93
  94         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
  95
  96 2019-06-13  Stafford Horne  <shorne@gmail.com>
  97
  98         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  99         (l-adrp): Improve comment.
 100
 101 2019-06-13  Stafford Horne  <shorne@gmail.com>
 102
 103         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 104         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 105         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 106         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 107         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 108         float-setflag-unordered-symantics): New pmacro for instruction
 109         symantics.
 110         (float-setflag-insn): Update to use float-setflag-insn-base.
 111         (float-setflag-unordered-insn): New pmacro for generating instructions.
 112
 113 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 114             Stafford Horne  <shorne@gmail.com>
 115
 116         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 117         (ORFPX-MACHS): Removed pmacro.
 118         * or1k.opc (or1k_cgen_insn_supported): New function.
 119         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 120         (parse_regpair, print_regpair): New functions.
 121         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 122         and add comments.
 123         (h-fdr): Update comment to indicate or64.
 124         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 125         (h-fd32r): New hardware for 64-bit fpu registers.
 126         (h-i64r): New hardware for 64-bit int registers.
 127         * or1korbis.cpu (f-resv-8-1): New field.
 128         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 129         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 130         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 131         (h-roff1): New hardware.
 132         (double-field-and-ops mnemonic): New pmacro to generate operations
 133         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 134         (float-regreg-insn): Update single precision generator to MACH
 135         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 136         (float-setflag-insn): Update single precision generator to MACH
 137         ORFPX32-MACHS.  Fix double instructions from single to double
 138         precision.  Add generator for or32 64-bit instructions.
 139         (float-cust-insn cust-num): Update single precision generator to MACH
 140         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 141         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 142         ORFPX32-MACHS.
 143         (lf-rem-d): Fix operation from mod to rem.
 144         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 145         (lf-itof-d): Fix operands from single to double.
 146         (lf-ftoi-d): Update operand mode from DI to WI.
 147
 148 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 149
 150         * bpf.cpu: New file.
 151         * bpf.opc: Likewise.
 152
 153 2018-06-24  Nick Clifton  <nickc@redhat.com>
 154
 155         2.32 branch created.
 156
 157 2018-10-05  Richard Henderson  <rth@twiddle.net>
 158             Stafford Horne  <shorne@gmail.com>
 159
 160         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 161         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 162         (l-mul): Fix overflow support and indentation.
 163         (l-mulu): Fix overflow support and indentation.
 164         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 165         (l-div); Remove incorrect carry behavior.
 166         (l-divu): Fix carry and overflow behavior.
 167         (l-mac): Add overflow support.
 168         (l-msb, l-msbu): Add carry and overflow support.
 169
 170 2018-10-05  Richard Henderson  <rth@twiddle.net>
 171
 172         * or1k.opc (parse_disp26): Add support for plta() relocations.
 173         (parse_disp21): New function.
 174         (or1k_rclass): New enum.
 175         (or1k_rtype): New enum.
 176         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 177         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 178         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 179         * or1korbis.cpu (f-disp26): Don't assume SI.
 180         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 181         (insn-opcode): Add ADRP.
 182         (l-adrp): New instruction.
 183
 184 2018-10-05  Richard Henderson  <rth@twiddle.net>
 185
 186         * or1k.opc: Add RTYPE_ enum.
 187         (INVALID_STORE_RELOC): New string.
 188         (or1k_imm16_relocs): New array array.
 189         (parse_reloc): New static function that just does the parsing.
 190         (parse_imm16): New static function for generic parsing.
 191         (parse_simm16): Change to just call parse_imm16.
 192         (parse_simm16_split): New function.
 193         (parse_uimm16): Change to call parse_imm16.
 194         (parse_uimm16_split): New function.
 195         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 196         (uimm16-split): Change to use new uimm16_split.
 197
 198 2018-07-24  Alan Modra  <amodra@gmail.com>
 199
 200         PR 23430
 201         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 202
 203 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 204
 205         * or1kcommon.cpu (spr-reg-info): Typo fix.
 206
 207 2018-03-03  Alan Modra  <amodra@gmail.com>
 208
 209         * frv.opc: Include opintl.h.
 210         (add_next_to_vliw): Use opcodes_error_handler to print error.
 211         Standardize error message.
 212         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 213
 214 2018-01-13  Nick Clifton  <nickc@redhat.com>
 215
 216         2.30 branch created.
 217
 218 2017-03-15  Stafford Horne  <shorne@gmail.com>
 219
 220         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 221
 222 2016-10-06  Alan Modra  <amodra@gmail.com>
 223
 224         * mep.opc (expand_string): Add fall through comment.
 225
 226 2016-03-03  Alan Modra  <amodra@gmail.com>
 227
 228         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 229         at what is really going on.
 230
 231 2016-03-02  Alan Modra  <amodra@gmail.com>
 232
 233         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 234
 235 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 236
 237         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 238         a constant to better align disassembler output.
 239
 240 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 241
 242         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 243
 244 2014-06-12  Alan Modra  <amodra@gmail.com>
 245
 246         * or1k.opc: Whitespace fixes.
 247
 248 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 249
 250         * or1korbis.cpu (h-atomic-reserve): New hardware.
 251         (h-atomic-address): Likewise.
 252         (insn-opcode): Add opcodes for LWA and SWA.
 253         (atomic-reserve): New operand.
 254         (atomic-address): Likewise.
 255         (l-lwa, l-swa): New instructions.
 256         (l-lbs): Fix typo in comment.
 257         (store-insn): Clear atomic reserve on store to atomic-address.
 258         Fix register names in fmt field.
 259
 260 2014-04-22  Christian Svensson  <blue@cmd.nu>
 261
 262         * openrisc.cpu: Delete.
 263         * openrisc.opc: Delete.
 264         * or1k.cpu: New file.
 265         * or1k.opc: New file.
 266         * or1kcommon.cpu: New file.
 267         * or1korbis.cpu: New file.
 268         * or1korfpx.cpu: New file.
 269
 270 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 271
 272         * epiphany.opc: Remove +x file mode.
 273
 274 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 275
 276         PR binutils/15241
 277         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 278         TLBVADDR, TLBPADDR and TLBBADVADDR.
 279
 280 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 281             Joern Rennecke  <joern.rennecke@embecosm.com>
 282
 283         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 284         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 285         (testset-insn): Add NO_DIS attribute to t.l.
 286         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 287         (move-insns): Add NO-DIS attribute to cmov.l.
 288         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 289         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 290         (op-rrr): Add NO-DIS attribute to .l.
 291         (shift-rrr): Add NO-DIS attribute to .l.
 292         (op-shift-rri): Add NO-DIS attribute to i32.l.
 293         (bitrl, movtl): Add NO-DIS attribute.
 294         (op-iextrrr): Add NO-DIS attribute to .l
 295         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 296         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 297
 298 2012-02-27  Alan Modra  <amodra@gmail.com>
 299
 300         * mt.opc (print_dollarhex): Trim values to 32 bits.
 301
 302 2011-12-15  Nick Clifton  <nickc@redhat.com>
 303
 304         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 305         hosts.
 306
 307 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 308
 309         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 310         Cast value before printing it as a long.
 311         (parse_postindex): Fix type of valuep.
 312
 313 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 314
 315         * cpu/epiphany.cpu: New file.
 316         * cpu/epiphany.opc: New file.
 317
 318 2011-08-22  Nick Clifton  <nickc@redhat.com>
 319
 320         * fr30.cpu: Newly contributed file.
 321         * fr30.opc: Likewise.
 322         * ip2k.cpu: Likewise.
 323         * ip2k.opc: Likewise.
 324         * mep-avc.cpu: Likewise.
 325         * mep-avc2.cpu: Likewise.
 326         * mep-c5.cpu: Likewise.
 327         * mep-core.cpu: Likewise.
 328         * mep-default.cpu: Likewise.
 329         * mep-ext-cop.cpu: Likewise.
 330         * mep-fmax.cpu: Likewise.
 331         * mep-h1.cpu: Likewise.
 332         * mep-ivc2.cpu: Likewise.
 333         * mep-rhcop.cpu: Likewise.
 334         * mep-sample-ucidsp.cpu: Likewise.
 335         * mep.cpu: Likewise.
 336         * mep.opc: Likewise.
 337         * openrisc.cpu: Likewise.
 338         * openrisc.opc: Likewise.
 339         * xstormy16.cpu: Likewise.
 340         * xstormy16.opc: Likewise.
 341
 342 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 343
 344         * frv.opc: #undef DEBUG.
 345
 346 2010-07-03  DJ Delorie  <dj@delorie.com>
 347
 348         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 349
 350 2010-02-11  Doug Evans  <dje@sebabeach.org>
 351
 352         * m32r.cpu (HASH-PREFIX): Delete.
 353         (duhpo, dshpo): New pmacros.
 354         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 355         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 356         attribute, define with dshpo.
 357         (uimm24): Delete HASH-PREFIX attribute.
 358         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 359         (print_signed_with_hash_prefix): New function.
 360         (print_unsigned_with_hash_prefix): New function.
 361         * xc16x.cpu (dowh): New pmacro.
 362         (upof16): Define with dowh, specify print handler.
 363         (qbit, qlobit, qhibit): Ditto.
 364         (upag16): Ditto.
 365         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 366         (print_with_dot_prefix): New functions.
 367         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 368
 369 2010-01-24  Doug Evans  <dje@sebabeach.org>
 370
 371         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 372         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 373         conditional-floating-point-conversion, ne-floating-point-conversion,
 374         float-parallel-mul-add-double-semantics): Ditto.
 375
 376 2010-01-05  Doug Evans  <dje@sebabeach.org>
 377
 378         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 379         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 380
 381 2010-01-02  Doug Evans  <dje@sebabeach.org>
 382
 383         * m32c.opc (parse_signed16): Fix typo.
 384
 385 2009-12-11  Nick Clifton  <nickc@redhat.com>
 386
 387         * frv.opc: Fix shadowed variable warnings.
 388         * m32c.opc: Fix shadowed variable warnings.
 389
 390 2009-11-14  Doug Evans  <dje@sebabeach.org>
 391
 392         Must use VOID expression in VOID context.
 393         * xc16x.cpu (mov4): Fix mode of `sequence'.
 394         (mov9, mov10): Ditto.
 395         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 396         (callr, callseg, calls, trap, rets, reti): Ditto.
 397         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 398         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 399         (exts, exts1, extsr, extsr1, prior): Ditto.
 400
 401 2009-10-23  Doug Evans  <dje@sebabeach.org>
 402
 403         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 404         cgen-ops.h -> cgen/basic-ops.h.
 405
 406 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 407
 408         * m32r.cpu (stb-plus): Typo fix.
 409
 410 2009-09-23  Doug Evans  <dje@sebabeach.org>
 411
 412         * m32r.cpu (sth-plus): Fix address mode and calculation.
 413         (stb-plus): Ditto.
 414         (clrpsw): Fix mask calculation.
 415         (bset, bclr, btst): Make mode in bit calculation match expression.
 416
 417         * xc16x.cpu (rtl-version): Set to 0.8.
 418         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 419         make uppercase.  Remove unnecessary name-prefix spec.
 420         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 421         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 422         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 423         (h-cr): New hardware.
 424         (muls): Comment out parts that won't compile, add fixme.
 425         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 426         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 427         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 428
 429 2009-07-16  Doug Evans  <dje@sebabeach.org>
 430
 431         * cpu/simplify.inc (*): One line doc strings don't need \n.
 432         (df): Invoke define-full-ifield instead of claiming it's an alias.
 433         (dno): Define.
 434         (dnop): Mark as deprecated.
 435
 436 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 437
 438         * m32c.opc (parse_lab_5_3): Use correct enum.
 439
 440 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 441
 442         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 443         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 444         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 445         arguments of "operation" to DI using "mode" and the new pmacros.
 446
 447 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 448
 449         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 450         of number 2, PID.
 451
 452 2008-12-23  Jon Beniston <jon@beniston.com>
 453
 454         * lm32.cpu: New file.
 455         * lm32.opc: New file.
 456
 457 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 458
 459         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 460         to source.
 461
 462 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 463
 464         * cris.cpu (movs, movu): Use result of extension operation when
 465         updating flags.
 466
 467 2007-07-04  Nick Clifton  <nickc@redhat.com>
 468
 469         * cris.cpu: Update copyright notice to refer to GPLv3.
 470         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 471         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 472         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 473         xc16x.opc: Likewise.
 474         * iq2000.cpu: Fix copyright notice to refer to FSF.
 475
 476 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 477
 478         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 479
 480 2007-04-20  Nick Clifton  <nickc@redhat.com>
 481
 482         * xc16x.cpu: Restore after accidentally overwriting this file with
 483         xc16x.opc.
 484
 485 2007-03-29  DJ Delorie  <dj@redhat.com>
 486
 487         * m32c.cpu (Imm-8-s4n): Fix print hook.
 488         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 489         (arith-jnz-imm4-dst-defn): Make relaxable.
 490         (arith-jnz16-imm4-dst-defn): Fix encodings.
 491
 492 2007-03-20  DJ Delorie  <dj@redhat.com>
 493
 494         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 495         mem20): New.
 496         (src16-16-20-An-relative-*): New.
 497         (dst16-*-20-An-relative-*): New.
 498         (dst16-16-16sa-*): New
 499         (dst16-16-16ar-*): New
 500         (dst32-16-16sa-Unprefixed-*): New
 501         (jsri): Fix operands.
 502         (setzx): Fix encoding.
 503
 504 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 505
 506         * m32r.opc: Formatting.
 507
 508 2006-05-22  Nick Clifton  <nickc@redhat.com>
 509
 510         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 511
 512 2006-04-10  DJ Delorie  <dj@redhat.com>
 513
 514         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 515         decides if this function accepts symbolic constants or not.
 516         (parse_signed_bitbase): Likewise.
 517         (parse_unsigned_bitbase8): Pass the new parameter.
 518         (parse_unsigned_bitbase11): Likewise.
 519         (parse_unsigned_bitbase16): Likewise.
 520         (parse_unsigned_bitbase19): Likewise.
 521         (parse_unsigned_bitbase27): Likewise.
 522         (parse_signed_bitbase8): Likewise.
 523         (parse_signed_bitbase11): Likewise.
 524         (parse_signed_bitbase19): Likewise.
 525
 526 2006-03-13  DJ Delorie  <dj@redhat.com>
 527
 528         * m32c.cpu (Bit3-S): New.
 529         (btst:s): New.
 530         * m32c.opc (parse_bit3_S): New.
 531
 532         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 533         (btst): Add optional :G suffix for MACH32.
 534         (or.b:S): New.
 535         (pop.w:G): Add optional :G suffix for MACH16.
 536         (push.b.imm): Fix syntax.
 537
 538 2006-03-10  DJ Delorie  <dj@redhat.com>
 539
 540         * m32c.cpu (mul.l): New.
 541         (mulu.l): New.
 542
 543 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 544
 545         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 546         an error message otherwise.
 547         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 548         Fix up comments to correctly describe the functions.
 549
 550 2006-02-24  DJ Delorie  <dj@redhat.com>
 551
 552         * m32c.cpu (RL_TYPE): New attribute, with macros.
 553         (Lab-8-24): Add RELAX.
 554         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 555         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 556         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 557         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 558         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 559         attribute.
 560         (jsri16, jsri32): Add 1ADDR attribute.
 561         (jsr32.w, jsr32.a): Add JUMP attribute.
 562
 563 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 564             Anil Paranjape   <anilp1@kpitcummins.com>
 565             Shilin Shakti    <shilins@kpitcummins.com>
 566
 567         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 568         description.
 569         * xc16x.opc: New file containing supporting XC16C routines.
 570
 571 2006-02-10  Nick Clifton  <nickc@redhat.com>
 572
 573         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 574
 575 2006-01-06  DJ Delorie  <dj@redhat.com>
 576
 577         * m32c.cpu (mov.w:q): Fix mode.
 578         (push32.b.imm): Likewise, for the comment.
 579
 580 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 581
 582         Second part of ms1 to mt renaming.
 583         * mt.cpu (define-arch, define-isa): Set name to mt.
 584         (define-mach): Adjust.
 585         * mt.opc (CGEN_ASM_HASH): Update.
 586         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 587         (parse_loopsize, parse_imm16): Adjust.
 588
 589 2005-12-13  DJ Delorie  <dj@redhat.com>
 590
 591         * m32c.cpu (jsri): Fix order so register names aren't treated as
 592         symbols.
 593         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 594         indexwd, indexws): Fix encodings.
 595
 596 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 597
 598         * mt.cpu: Rename from ms1.cpu.
 599         * mt.opc: Rename from ms1.opc.
 600
 601 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 602
 603         * cris.cpu (simplecris-common-writable-specregs)
 604         (simplecris-common-readable-specregs): Split from
 605         simplecris-common-specregs.  All users changed.
 606         (cris-implemented-writable-specregs-v0)
 607         (cris-implemented-readable-specregs-v0): Similar from
 608         cris-implemented-specregs-v0.
 609         (cris-implemented-writable-specregs-v3)
 610         (cris-implemented-readable-specregs-v3)
 611         (cris-implemented-writable-specregs-v8)
 612         (cris-implemented-readable-specregs-v8)
 613         (cris-implemented-writable-specregs-v10)
 614         (cris-implemented-readable-specregs-v10)
 615         (cris-implemented-writable-specregs-v32)
 616         (cris-implemented-readable-specregs-v32): Similar.
 617         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 618         insns and specializations.
 619
 620 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 621
 622         Add ms2
 623         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 624         model.
 625         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 626         f-cb2incr, f-rc3): New fields.
 627         (LOOP): New instruction.
 628         (JAL-HAZARD): New hazard.
 629         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 630         New operands.
 631         (mul, muli, dbnz, iflush): Enable for ms2
 632         (jal, reti): Has JAL-HAZARD.
 633         (ldctxt, ldfb, stfb): Only ms1.
 634         (fbcb): Only ms1,ms1-003.
 635         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 636         fbcbincrs, mfbcbincrs): Enable for ms2.
 637         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 638         * ms1.opc (parse_loopsize): New.
 639         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 640         (print_pcrel): New.
 641
 642 2005-10-28  Dave Brolley  <brolley@redhat.com>
 643
 644         Contribute the following change:
 645         2003-09-24  Dave Brolley  <brolley@redhat.com>
 646
 647         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 648         CGEN_ATTR_VALUE_TYPE.
 649         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 650         Use cgen_bitset_intersect_p.
 651
 652 2005-10-27  DJ Delorie  <dj@redhat.com>
 653
 654         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 655         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 656         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 657         imm operand is needed.
 658         (adjnz, sbjnz): Pass the right operands.
 659         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 660         unary-insn): Add -g variants for opcodes that need to support :G.
 661         (not.BW:G, push.BW:G): Call it.
 662         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 663         stzx16-imm8-imm8-abs16): Fix operand typos.
 664         * m32c.opc (m32c_asm_hash): Support bnCND.
 665         (parse_signed4n, print_signed4n): New.
 666
 667 2005-10-26  DJ Delorie  <dj@redhat.com>
 668
 669         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 670         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 671         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 672         dsp8[sp] is signed.
 673         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 674         (mov.BW:S r0,r1): Fix typo r1l->r1.
 675         (tst): Allow :G suffix.
 676         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 677
 678 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 679
 680         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 681
 682 2005-10-25  DJ Delorie  <dj@redhat.com>
 683
 684         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 685         making one a macro of the other.
 686
 687 2005-10-21  DJ Delorie  <dj@redhat.com>
 688
 689         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 690         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 691         indexld, indexls): .w variants have `1' bit.
 692         (rot32.b): QI, not SI.
 693         (rot32.w): HI, not SI.
 694         (xchg16): HI for .w variant.
 695
 696 2005-10-19  Nick Clifton  <nickc@redhat.com>
 697
 698         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 699
 700 2005-10-18  Andreas Schwab  <schwab@suse.de>
 701
 702         * m32r.opc (parse_slo16): Better version of previous patch.
 703
 704 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 705
 706         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 707         size.
 708
 709 2005-07-25  DJ Delorie  <dj@redhat.com>
 710
 711         * m32c.opc (parse_unsigned8): Add %dsp8().
 712         (parse_signed8): Add %hi8().
 713         (parse_unsigned16): Add %dsp16().
 714         (parse_signed16): Add %lo16() and %hi16().
 715         (parse_lab_5_3): Make valuep a bfd_vma *.
 716
 717 2005-07-18  Nick Clifton  <nickc@redhat.com>
 718
 719         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 720         components.
 721         (f-lab32-jmp-s): Fix insertion sequence.
 722         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 723         (Dsp-40-s8): Make parameter be signed.
 724         (Dsp-40-s16): Likewise.
 725         (Dsp-48-s8): Likewise.
 726         (Dsp-48-s16): Likewise.
 727         (Imm-13-u3): Likewise. (Despite its name!)
 728         (BitBase16-16-s8): Make the parameter be unsigned.
 729         (BitBase16-8-u11-S): Likewise.
 730         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 731         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 732         relaxation.
 733
 734         * m32c.opc: Fix formatting.
 735         Use safe-ctype.h instead of ctype.h
 736         Move duplicated code sequences into a macro.
 737         Fix compile time warnings about signedness mismatches.
 738         Remove dead code.
 739         (parse_lab_5_3): New parser function.
 740
 741 2005-07-16  Jim Blandy  <jimb@redhat.com>
 742
 743         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 744         to represent isa sets.
 745
 746 2005-07-15  Jim Blandy  <jimb@redhat.com>
 747
 748         * m32c.cpu, m32c.opc: Fix copyright.
 749
 750 2005-07-14  Jim Blandy  <jimb@redhat.com>
 751
 752         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 753
 754 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 755
 756         * ms1.opc (print_dollarhex): Correct format string.
 757
 758 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 759
 760         * iq2000.cpu: Include from binutils cpu dir.
 761
 762 2005-07-05  Nick Clifton  <nickc@redhat.com>
 763
 764         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 765         unsigned in order to avoid compile time warnings about sign
 766         conflicts.
 767
 768         * ms1.opc (parse_*): Likewise.
 769         (parse_imm16): Use a "void *" as it is passed both signed and
 770         unsigned arguments.
 771
 772 2005-07-01  Nick Clifton  <nickc@redhat.com>
 773
 774         * frv.opc: Update to ISO C90 function declaration style.
 775         * iq2000.opc: Likewise.
 776         * m32r.opc: Likewise.
 777         * sh.opc: Likewise.
 778
 779 2005-06-15  Dave Brolley  <brolley@redhat.com>
 780
 781         Contributed by Red Hat.
 782         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 783         * ms1.opc: New file.  Written by Stan Cox.
 784
 785 2005-05-10  Nick Clifton  <nickc@redhat.com>
 786
 787         * Update the address and phone number of the FSF organization in
 788         the GPL notices in the following files:
 789         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 790         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 791         sh64-media.cpu, simplify.inc
 792
 793 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 794
 795         * frv.opc (parse_A): Warning fix.
 796
 797 2005-02-23  Nick Clifton  <nickc@redhat.com>
 798
 799         * frv.opc: Fixed compile time warnings about differing signed'ness
 800         of pointers passed to functions.
 801         * m32r.opc: Likewise.
 802
 803 2005-02-11  Nick Clifton  <nickc@redhat.com>
 804
 805         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 806         'bfd_vma *' in order avoid compile time warning message.
 807
 808 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 809
 810         * cris.cpu (mstep): Add missing insn.
 811
 812 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 813
 814         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 815         * frv.cpu: Add support for TLS annotations in loads and calll.
 816         * frv.opc (parse_symbolic_address): New.
 817         (parse_ldd_annotation): New.
 818         (parse_call_annotation): New.
 819         (parse_ld_annotation): New.
 820         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 821         Introduce TLS relocations.
 822         (parse_d12, parse_s12, parse_u12): Likewise.
 823         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 824         (parse_call_label, print_at): New.
 825
 826 2004-12-21  Mikael Starvik  <starvik@axis.com>
 827
 828         * cris.cpu (cris-set-mem): Correct integral write semantics.
 829
 830 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 831
 832         * cris.cpu: New file.
 833
 834 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 835
 836         * iq2000.cpu: Added quotes around macro arguments so that they
 837         will work with newer versions of guile.
 838
 839 2004-10-27  Nick Clifton  <nickc@redhat.com>
 840
 841         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 842         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 843         operand.
 844         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 845         with guile.
 846
 847 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 848
 849         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 850
 851 2004-05-15  Nick Clifton  <nickc@redhat.com>
 852
 853         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 854
 855 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 856
 857         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 858
 859 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 860
 861         * frv.cpu (define-arch frv): Add fr450 mach.
 862         (define-mach fr450): New.
 863         (define-model fr450): New.  Add profile units to every fr450 insn.
 864         (define-attr UNIT): Add MDCUTSSI.
 865         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 866         (define-attr AUDIO): New boolean.
 867         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 868         (f-LRA-null, f-TLBPR-null): New fields.
 869         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 870         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 871         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 872         (LRA-null, TLBPR-null): New macros.
 873         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 874         (load-real-address): New macro.
 875         (lrai, lrad, tlbpr): New instructions.
 876         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 877         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 878         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 879         (media-low-clear-semantics, media-scope-limit-semantics)
 880         (media-quad-limit, media-quad-shift): New macros.
 881         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 882         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 883         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 884         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 885         (fr450_unit_mapping): New array.
 886         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 887         for new MDCUTSSI unit.
 888         (fr450_check_insn_major_constraints): New function.
 889         (check_insn_major_constraints): Use it.
 890
 891 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 892
 893         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 894         (scutss): Change unit to I0.
 895         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 896         (mqsaths): Fix FR400-MAJOR categorization.
 897         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 898         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 899         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 900         combinations.
 901
 902 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 903
 904         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 905         (rstb, rsth, rst, rstd, rstq): Delete.
 906         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 907
 908 2004-02-23  Nick Clifton  <nickc@redhat.com>
 909
 910         * Apply these patches from Renesas:
 911
 912         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 913
 914         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 915         disassembling codes for 0x*2 addresses.
 916
 917         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 918
 919         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 920
 921         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 922
 923         * cpu/m32r.cpu : Add new model m32r2.
 924         Add new instructions.
 925         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 926         Changed PIPE attr of push from O to OS.
 927         Care for Little-endian of M32R.
 928         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 929         Care for Little-endian of M32R.
 930         (parse_slo16): signed extension for value.
 931
 932 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 933
 934         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 935         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 936
 937         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 938         written by Ben Elliston.
 939
 940 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 941
 942         * frv.cpu (UNIT): Add IACC.
 943         (iacc-multiply-r-r): Use it.
 944         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 945         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 946
 947 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 948
 949         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 950         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 951         cut&paste errors in shifting/truncating numerical operands.
 952         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 953         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 954         (parse_uslo16): Likewise.
 955         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 956         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 957         (parse_s12): Likewise.
 958         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 959         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 960         (parse_uslo16): Likewise.
 961         (parse_uhi16): Parse gothi and gotfuncdeschi.
 962         (parse_d12): Parse got12 and gotfuncdesc12.
 963         (parse_s12): Likewise.
 964
 965 2003-10-10  Dave Brolley  <brolley@redhat.com>
 966
 967         * frv.cpu (dnpmop): New p-macro.
 968         (GRdoublek): Use dnpmop.
 969         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 970         (store-double-r-r): Use (.sym regtype doublek).
 971         (r-store-double): Ditto.
 972         (store-double-r-r-u): Ditto.
 973         (conditional-store-double): Ditto.
 974         (conditional-store-double-u): Ditto.
 975         (store-double-r-simm): Ditto.
 976         (fmovs): Assign to UNIT FMALL.
 977
 978 2003-10-06  Dave Brolley  <brolley@redhat.com>
 979
 980         * frv.cpu, frv.opc: Add support for fr550.
 981
 982 2003-09-24  Dave Brolley  <brolley@redhat.com>
 983
 984         * frv.cpu (u-commit): New modelling unit for fr500.
 985         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 986         (commit-r): Use u-commit model for fr500.
 987         (commit): Ditto.
 988         (conditional-float-binary-op): Take profiling data as an argument.
 989         Update callers.
 990         (ne-float-binary-op): Ditto.
 991
 992 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 993
 994         * frv.cpu (nldqi): Delete unimplemented instruction.
 995
 996 2003-09-12  Dave Brolley  <brolley@redhat.com>
 997
 998         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 999         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1000         frv_ref_SI to get input register referenced for profiling.
1001         (clear-ne-flag-all): Pass insn profiling in as an argument.
1002         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1003
1004 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1005
1006         * frv.cpu: Typographical corrections.
1007
1008 2003-09-09  Dave Brolley  <brolley@redhat.com>
1009
1010         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1011         (conditional-media-dual-complex, media-quad-complex): Likewise.
1012
1013 2003-09-04  Dave Brolley  <brolley@redhat.com>
1014
1015         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1016         Update all callers.
1017         (conditional-register-transfer): Ditto.
1018         (cache-preload): Ditto.
1019         (floating-point-conversion): Ditto.
1020         (floating-point-neg): Ditto.
1021         (float-abs): Ditto.
1022         (float-binary-op-s): Ditto.
1023         (conditional-float-binary-op): Ditto.
1024         (ne-float-binary-op): Ditto.
1025         (float-dual-arith): Ditto.
1026         (ne-float-dual-arith): Ditto.
1027
1028 2003-09-03  Dave Brolley  <brolley@redhat.com>
1029
1030         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1031         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1032         MCLRACC-1.
1033         (A): Removed operand.
1034         (A0,A1): New operands replace operand A.
1035         (mnop): Now a real insn
1036         (mclracc): Removed insn.
1037         (mclracc-0, mclracc-1): New insns replace mclracc.
1038         (all insns): Use new UNIT attributes.
1039
1040 2003-08-21  Nick Clifton  <nickc@redhat.com>
1041
1042         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1043         and u-media-dual-btoh with output parameter.
1044         (cmbtoh): Add profiling hack.
1045
1046 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1047
1048         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1049
1050 2003-06-10  Doug Evans  <dje@sebabeach.org>
1051
1052         * frv.cpu: Add IDOC attribute.
1053
1054 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1055
1056         Contributed by Red Hat.
1057         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1058         Stan Cox, and Frank Ch. Eigler.
1059         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1060         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1061         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1062         * iq10.cpu: New file.  Written by Jeff Johnston.
1063
1064 2003-06-05  Nick Clifton  <nickc@redhat.com>
1065
1066         * frv.cpu (FRintieven): New operand.  An even-numbered only
1067         version of the FRinti operand.
1068         (FRintjeven): Likewise for FRintj.
1069         (FRintkeven): Likewise for FRintk.
1070         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1071         media-quad-arith-sat-semantics, media-quad-arith-sat,
1072         conditional-media-quad-arith-sat, mdunpackh,
1073         media-quad-multiply-semantics, media-quad-multiply,
1074         conditional-media-quad-multiply, media-quad-complex-i,
1075         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1076         conditional-media-quad-multiply-acc, munpackh,
1077         media-quad-multiply-cross-acc-semantics, mdpackh,
1078         media-quad-multiply-cross-acc, mbtoh-semantics,
1079         media-quad-cross-multiply-cross-acc-semantics,
1080         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1081         media-quad-cross-multiply-acc-semantics, cmbtoh,
1082         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1083         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1084         cmhtob): Use new operands.
1085         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1086         (parse_even_register): New function.
1087
1088 2003-06-03  Nick Clifton  <nickc@redhat.com>
1089
1090         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1091         immediate value not unsigned.
1092
1093 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1094
1095         Contributed by Red Hat.
1096         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1097         and Eric Christopher.
1098         * frv.opc: New file.  Written by Catherine Moore, and Dave
1099         Brolley.
1100         * simplify.inc: New file.  Written by Doug Evans.
1101
1102 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1103
1104         * New file.
1105
1106 \f
1107 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1108
1109 Copying and distribution of this file, with or without modification,
1110 are permitted in any medium without royalty provided the copyright
1111 notice and this notice are preserved.
1112
1113 Local Variables:
1114 mode: change-log
1115 left-margin: 8
1116 fill-column: 74
1117 version-control: never
1118 End: