opcodes error messages
[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2018-03-03 Alan Modra <amodra@gmail.com>
2
3 * frv.opc: Include opintl.h.
4 (add_next_to_vliw): Use opcodes_error_handler to print error.
5 Standardize error message.
6 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
7
8 2018-01-13 Nick Clifton <nickc@redhat.com>
9
10 2.30 branch created.
11
12 2017-03-15 Stafford Horne <shorne@gmail.com>
13
14 * or1kcommon.cpu: Add pc set semantics to also update ppc.
15
16 2016-10-06 Alan Modra <amodra@gmail.com>
17
18 * mep.opc (expand_string): Add fall through comment.
19
20 2016-03-03 Alan Modra <amodra@gmail.com>
21
22 * fr30.cpu (f-m4): Replace bogus comment with a better guess
23 at what is really going on.
24
25 2016-03-02 Alan Modra <amodra@gmail.com>
26
27 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
28
29 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
30
31 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
32 a constant to better align disassembler output.
33
34 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
35
36 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
37
38 2014-06-12 Alan Modra <amodra@gmail.com>
39
40 * or1k.opc: Whitespace fixes.
41
42 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
43
44 * or1korbis.cpu (h-atomic-reserve): New hardware.
45 (h-atomic-address): Likewise.
46 (insn-opcode): Add opcodes for LWA and SWA.
47 (atomic-reserve): New operand.
48 (atomic-address): Likewise.
49 (l-lwa, l-swa): New instructions.
50 (l-lbs): Fix typo in comment.
51 (store-insn): Clear atomic reserve on store to atomic-address.
52 Fix register names in fmt field.
53
54 2014-04-22 Christian Svensson <blue@cmd.nu>
55
56 * openrisc.cpu: Delete.
57 * openrisc.opc: Delete.
58 * or1k.cpu: New file.
59 * or1k.opc: New file.
60 * or1kcommon.cpu: New file.
61 * or1korbis.cpu: New file.
62 * or1korfpx.cpu: New file.
63
64 2013-12-07 Mike Frysinger <vapier@gentoo.org>
65
66 * epiphany.opc: Remove +x file mode.
67
68 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
69
70 PR binutils/15241
71 * lm32.cpu (Control and status registers): Add CFG2, PSW,
72 TLBVADDR, TLBPADDR and TLBBADVADDR.
73
74 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
75 Joern Rennecke <joern.rennecke@embecosm.com>
76
77 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
78 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
79 (testset-insn): Add NO_DIS attribute to t.l.
80 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
81 (move-insns): Add NO-DIS attribute to cmov.l.
82 (op-mmr-movts): Add NO-DIS attribute to movts.l.
83 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
84 (op-rrr): Add NO-DIS attribute to .l.
85 (shift-rrr): Add NO-DIS attribute to .l.
86 (op-shift-rri): Add NO-DIS attribute to i32.l.
87 (bitrl, movtl): Add NO-DIS attribute.
88 (op-iextrrr): Add NO-DIS attribute to .l
89 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
90 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
91
92 2012-02-27 Alan Modra <amodra@gmail.com>
93
94 * mt.opc (print_dollarhex): Trim values to 32 bits.
95
96 2011-12-15 Nick Clifton <nickc@redhat.com>
97
98 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
99 hosts.
100
101 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
102
103 * epiphany.opc (parse_branch_addr): Fix type of valuep.
104 Cast value before printing it as a long.
105 (parse_postindex): Fix type of valuep.
106
107 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
108
109 * cpu/epiphany.cpu: New file.
110 * cpu/epiphany.opc: New file.
111
112 2011-08-22 Nick Clifton <nickc@redhat.com>
113
114 * fr30.cpu: Newly contributed file.
115 * fr30.opc: Likewise.
116 * ip2k.cpu: Likewise.
117 * ip2k.opc: Likewise.
118 * mep-avc.cpu: Likewise.
119 * mep-avc2.cpu: Likewise.
120 * mep-c5.cpu: Likewise.
121 * mep-core.cpu: Likewise.
122 * mep-default.cpu: Likewise.
123 * mep-ext-cop.cpu: Likewise.
124 * mep-fmax.cpu: Likewise.
125 * mep-h1.cpu: Likewise.
126 * mep-ivc2.cpu: Likewise.
127 * mep-rhcop.cpu: Likewise.
128 * mep-sample-ucidsp.cpu: Likewise.
129 * mep.cpu: Likewise.
130 * mep.opc: Likewise.
131 * openrisc.cpu: Likewise.
132 * openrisc.opc: Likewise.
133 * xstormy16.cpu: Likewise.
134 * xstormy16.opc: Likewise.
135
136 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
137
138 * frv.opc: #undef DEBUG.
139
140 2010-07-03 DJ Delorie <dj@delorie.com>
141
142 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
143
144 2010-02-11 Doug Evans <dje@sebabeach.org>
145
146 * m32r.cpu (HASH-PREFIX): Delete.
147 (duhpo, dshpo): New pmacros.
148 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
149 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
150 attribute, define with dshpo.
151 (uimm24): Delete HASH-PREFIX attribute.
152 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
153 (print_signed_with_hash_prefix): New function.
154 (print_unsigned_with_hash_prefix): New function.
155 * xc16x.cpu (dowh): New pmacro.
156 (upof16): Define with dowh, specify print handler.
157 (qbit, qlobit, qhibit): Ditto.
158 (upag16): Ditto.
159 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
160 (print_with_dot_prefix): New functions.
161 (print_with_pof_prefix, print_with_pag_prefix): New functions.
162
163 2010-01-24 Doug Evans <dje@sebabeach.org>
164
165 * frv.cpu (floating-point-conversion): Update call to fp conv op.
166 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
167 conditional-floating-point-conversion, ne-floating-point-conversion,
168 float-parallel-mul-add-double-semantics): Ditto.
169
170 2010-01-05 Doug Evans <dje@sebabeach.org>
171
172 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
173 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
174
175 2010-01-02 Doug Evans <dje@sebabeach.org>
176
177 * m32c.opc (parse_signed16): Fix typo.
178
179 2009-12-11 Nick Clifton <nickc@redhat.com>
180
181 * frv.opc: Fix shadowed variable warnings.
182 * m32c.opc: Fix shadowed variable warnings.
183
184 2009-11-14 Doug Evans <dje@sebabeach.org>
185
186 Must use VOID expression in VOID context.
187 * xc16x.cpu (mov4): Fix mode of `sequence'.
188 (mov9, mov10): Ditto.
189 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
190 (callr, callseg, calls, trap, rets, reti): Ditto.
191 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
192 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
193 (exts, exts1, extsr, extsr1, prior): Ditto.
194
195 2009-10-23 Doug Evans <dje@sebabeach.org>
196
197 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
198 cgen-ops.h -> cgen/basic-ops.h.
199
200 2009-09-25 Alan Modra <amodra@bigpond.net.au>
201
202 * m32r.cpu (stb-plus): Typo fix.
203
204 2009-09-23 Doug Evans <dje@sebabeach.org>
205
206 * m32r.cpu (sth-plus): Fix address mode and calculation.
207 (stb-plus): Ditto.
208 (clrpsw): Fix mask calculation.
209 (bset, bclr, btst): Make mode in bit calculation match expression.
210
211 * xc16x.cpu (rtl-version): Set to 0.8.
212 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
213 make uppercase. Remove unnecessary name-prefix spec.
214 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
215 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
216 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
217 (h-cr): New hardware.
218 (muls): Comment out parts that won't compile, add fixme.
219 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
220 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
221 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
222
223 2009-07-16 Doug Evans <dje@sebabeach.org>
224
225 * cpu/simplify.inc (*): One line doc strings don't need \n.
226 (df): Invoke define-full-ifield instead of claiming it's an alias.
227 (dno): Define.
228 (dnop): Mark as deprecated.
229
230 2009-06-22 Alan Modra <amodra@bigpond.net.au>
231
232 * m32c.opc (parse_lab_5_3): Use correct enum.
233
234 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
235
236 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
237 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
238 (media-arith-sat-semantics): Explicitly sign- or zero-extend
239 arguments of "operation" to DI using "mode" and the new pmacros.
240
241 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
242
243 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
244 of number 2, PID.
245
246 2008-12-23 Jon Beniston <jon@beniston.com>
247
248 * lm32.cpu: New file.
249 * lm32.opc: New file.
250
251 2008-01-29 Alan Modra <amodra@bigpond.net.au>
252
253 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
254 to source.
255
256 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
257
258 * cris.cpu (movs, movu): Use result of extension operation when
259 updating flags.
260
261 2007-07-04 Nick Clifton <nickc@redhat.com>
262
263 * cris.cpu: Update copyright notice to refer to GPLv3.
264 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
265 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
266 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
267 xc16x.opc: Likewise.
268 * iq2000.cpu: Fix copyright notice to refer to FSF.
269
270 2007-04-30 Mark Salter <msalter@sadr.localdomain>
271
272 * frv.cpu (spr-names): Support new coprocessor SPR registers.
273
274 2007-04-20 Nick Clifton <nickc@redhat.com>
275
276 * xc16x.cpu: Restore after accidentally overwriting this file with
277 xc16x.opc.
278
279 2007-03-29 DJ Delorie <dj@redhat.com>
280
281 * m32c.cpu (Imm-8-s4n): Fix print hook.
282 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
283 (arith-jnz-imm4-dst-defn): Make relaxable.
284 (arith-jnz16-imm4-dst-defn): Fix encodings.
285
286 2007-03-20 DJ Delorie <dj@redhat.com>
287
288 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
289 mem20): New.
290 (src16-16-20-An-relative-*): New.
291 (dst16-*-20-An-relative-*): New.
292 (dst16-16-16sa-*): New
293 (dst16-16-16ar-*): New
294 (dst32-16-16sa-Unprefixed-*): New
295 (jsri): Fix operands.
296 (setzx): Fix encoding.
297
298 2007-03-08 Alan Modra <amodra@bigpond.net.au>
299
300 * m32r.opc: Formatting.
301
302 2006-05-22 Nick Clifton <nickc@redhat.com>
303
304 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
305
306 2006-04-10 DJ Delorie <dj@redhat.com>
307
308 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
309 decides if this function accepts symbolic constants or not.
310 (parse_signed_bitbase): Likewise.
311 (parse_unsigned_bitbase8): Pass the new parameter.
312 (parse_unsigned_bitbase11): Likewise.
313 (parse_unsigned_bitbase16): Likewise.
314 (parse_unsigned_bitbase19): Likewise.
315 (parse_unsigned_bitbase27): Likewise.
316 (parse_signed_bitbase8): Likewise.
317 (parse_signed_bitbase11): Likewise.
318 (parse_signed_bitbase19): Likewise.
319
320 2006-03-13 DJ Delorie <dj@redhat.com>
321
322 * m32c.cpu (Bit3-S): New.
323 (btst:s): New.
324 * m32c.opc (parse_bit3_S): New.
325
326 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
327 (btst): Add optional :G suffix for MACH32.
328 (or.b:S): New.
329 (pop.w:G): Add optional :G suffix for MACH16.
330 (push.b.imm): Fix syntax.
331
332 2006-03-10 DJ Delorie <dj@redhat.com>
333
334 * m32c.cpu (mul.l): New.
335 (mulu.l): New.
336
337 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
338
339 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
340 an error message otherwise.
341 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
342 Fix up comments to correctly describe the functions.
343
344 2006-02-24 DJ Delorie <dj@redhat.com>
345
346 * m32c.cpu (RL_TYPE): New attribute, with macros.
347 (Lab-8-24): Add RELAX.
348 (unary-insn-defn-g, binary-arith-imm-dst-defn,
349 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
350 (binary-arith-src-dst-defn): Add 2ADDR attribute.
351 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
352 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
353 attribute.
354 (jsri16, jsri32): Add 1ADDR attribute.
355 (jsr32.w, jsr32.a): Add JUMP attribute.
356
357 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
358 Anil Paranjape <anilp1@kpitcummins.com>
359 Shilin Shakti <shilins@kpitcummins.com>
360
361 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
362 description.
363 * xc16x.opc: New file containing supporting XC16C routines.
364
365 2006-02-10 Nick Clifton <nickc@redhat.com>
366
367 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
368
369 2006-01-06 DJ Delorie <dj@redhat.com>
370
371 * m32c.cpu (mov.w:q): Fix mode.
372 (push32.b.imm): Likewise, for the comment.
373
374 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
375
376 Second part of ms1 to mt renaming.
377 * mt.cpu (define-arch, define-isa): Set name to mt.
378 (define-mach): Adjust.
379 * mt.opc (CGEN_ASM_HASH): Update.
380 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
381 (parse_loopsize, parse_imm16): Adjust.
382
383 2005-12-13 DJ Delorie <dj@redhat.com>
384
385 * m32c.cpu (jsri): Fix order so register names aren't treated as
386 symbols.
387 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
388 indexwd, indexws): Fix encodings.
389
390 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
391
392 * mt.cpu: Rename from ms1.cpu.
393 * mt.opc: Rename from ms1.opc.
394
395 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
396
397 * cris.cpu (simplecris-common-writable-specregs)
398 (simplecris-common-readable-specregs): Split from
399 simplecris-common-specregs. All users changed.
400 (cris-implemented-writable-specregs-v0)
401 (cris-implemented-readable-specregs-v0): Similar from
402 cris-implemented-specregs-v0.
403 (cris-implemented-writable-specregs-v3)
404 (cris-implemented-readable-specregs-v3)
405 (cris-implemented-writable-specregs-v8)
406 (cris-implemented-readable-specregs-v8)
407 (cris-implemented-writable-specregs-v10)
408 (cris-implemented-readable-specregs-v10)
409 (cris-implemented-writable-specregs-v32)
410 (cris-implemented-readable-specregs-v32): Similar.
411 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
412 insns and specializations.
413
414 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
415
416 Add ms2
417 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
418 model.
419 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
420 f-cb2incr, f-rc3): New fields.
421 (LOOP): New instruction.
422 (JAL-HAZARD): New hazard.
423 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
424 New operands.
425 (mul, muli, dbnz, iflush): Enable for ms2
426 (jal, reti): Has JAL-HAZARD.
427 (ldctxt, ldfb, stfb): Only ms1.
428 (fbcb): Only ms1,ms1-003.
429 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
430 fbcbincrs, mfbcbincrs): Enable for ms2.
431 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
432 * ms1.opc (parse_loopsize): New.
433 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
434 (print_pcrel): New.
435
436 2005-10-28 Dave Brolley <brolley@redhat.com>
437
438 Contribute the following change:
439 2003-09-24 Dave Brolley <brolley@redhat.com>
440
441 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
442 CGEN_ATTR_VALUE_TYPE.
443 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
444 Use cgen_bitset_intersect_p.
445
446 2005-10-27 DJ Delorie <dj@redhat.com>
447
448 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
449 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
450 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
451 imm operand is needed.
452 (adjnz, sbjnz): Pass the right operands.
453 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
454 unary-insn): Add -g variants for opcodes that need to support :G.
455 (not.BW:G, push.BW:G): Call it.
456 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
457 stzx16-imm8-imm8-abs16): Fix operand typos.
458 * m32c.opc (m32c_asm_hash): Support bnCND.
459 (parse_signed4n, print_signed4n): New.
460
461 2005-10-26 DJ Delorie <dj@redhat.com>
462
463 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
464 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
465 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
466 dsp8[sp] is signed.
467 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
468 (mov.BW:S r0,r1): Fix typo r1l->r1.
469 (tst): Allow :G suffix.
470 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
471
472 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
473
474 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
475
476 2005-10-25 DJ Delorie <dj@redhat.com>
477
478 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
479 making one a macro of the other.
480
481 2005-10-21 DJ Delorie <dj@redhat.com>
482
483 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
484 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
485 indexld, indexls): .w variants have `1' bit.
486 (rot32.b): QI, not SI.
487 (rot32.w): HI, not SI.
488 (xchg16): HI for .w variant.
489
490 2005-10-19 Nick Clifton <nickc@redhat.com>
491
492 * m32r.opc (parse_slo16): Fix bad application of previous patch.
493
494 2005-10-18 Andreas Schwab <schwab@suse.de>
495
496 * m32r.opc (parse_slo16): Better version of previous patch.
497
498 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
499
500 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
501 size.
502
503 2005-07-25 DJ Delorie <dj@redhat.com>
504
505 * m32c.opc (parse_unsigned8): Add %dsp8().
506 (parse_signed8): Add %hi8().
507 (parse_unsigned16): Add %dsp16().
508 (parse_signed16): Add %lo16() and %hi16().
509 (parse_lab_5_3): Make valuep a bfd_vma *.
510
511 2005-07-18 Nick Clifton <nickc@redhat.com>
512
513 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
514 components.
515 (f-lab32-jmp-s): Fix insertion sequence.
516 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
517 (Dsp-40-s8): Make parameter be signed.
518 (Dsp-40-s16): Likewise.
519 (Dsp-48-s8): Likewise.
520 (Dsp-48-s16): Likewise.
521 (Imm-13-u3): Likewise. (Despite its name!)
522 (BitBase16-16-s8): Make the parameter be unsigned.
523 (BitBase16-8-u11-S): Likewise.
524 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
525 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
526 relaxation.
527
528 * m32c.opc: Fix formatting.
529 Use safe-ctype.h instead of ctype.h
530 Move duplicated code sequences into a macro.
531 Fix compile time warnings about signedness mismatches.
532 Remove dead code.
533 (parse_lab_5_3): New parser function.
534
535 2005-07-16 Jim Blandy <jimb@redhat.com>
536
537 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
538 to represent isa sets.
539
540 2005-07-15 Jim Blandy <jimb@redhat.com>
541
542 * m32c.cpu, m32c.opc: Fix copyright.
543
544 2005-07-14 Jim Blandy <jimb@redhat.com>
545
546 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
547
548 2005-07-14 Alan Modra <amodra@bigpond.net.au>
549
550 * ms1.opc (print_dollarhex): Correct format string.
551
552 2005-07-06 Alan Modra <amodra@bigpond.net.au>
553
554 * iq2000.cpu: Include from binutils cpu dir.
555
556 2005-07-05 Nick Clifton <nickc@redhat.com>
557
558 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
559 unsigned in order to avoid compile time warnings about sign
560 conflicts.
561
562 * ms1.opc (parse_*): Likewise.
563 (parse_imm16): Use a "void *" as it is passed both signed and
564 unsigned arguments.
565
566 2005-07-01 Nick Clifton <nickc@redhat.com>
567
568 * frv.opc: Update to ISO C90 function declaration style.
569 * iq2000.opc: Likewise.
570 * m32r.opc: Likewise.
571 * sh.opc: Likewise.
572
573 2005-06-15 Dave Brolley <brolley@redhat.com>
574
575 Contributed by Red Hat.
576 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
577 * ms1.opc: New file. Written by Stan Cox.
578
579 2005-05-10 Nick Clifton <nickc@redhat.com>
580
581 * Update the address and phone number of the FSF organization in
582 the GPL notices in the following files:
583 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
584 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
585 sh64-media.cpu, simplify.inc
586
587 2005-02-24 Alan Modra <amodra@bigpond.net.au>
588
589 * frv.opc (parse_A): Warning fix.
590
591 2005-02-23 Nick Clifton <nickc@redhat.com>
592
593 * frv.opc: Fixed compile time warnings about differing signed'ness
594 of pointers passed to functions.
595 * m32r.opc: Likewise.
596
597 2005-02-11 Nick Clifton <nickc@redhat.com>
598
599 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
600 'bfd_vma *' in order avoid compile time warning message.
601
602 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
603
604 * cris.cpu (mstep): Add missing insn.
605
606 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
607
608 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
609 * frv.cpu: Add support for TLS annotations in loads and calll.
610 * frv.opc (parse_symbolic_address): New.
611 (parse_ldd_annotation): New.
612 (parse_call_annotation): New.
613 (parse_ld_annotation): New.
614 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
615 Introduce TLS relocations.
616 (parse_d12, parse_s12, parse_u12): Likewise.
617 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
618 (parse_call_label, print_at): New.
619
620 2004-12-21 Mikael Starvik <starvik@axis.com>
621
622 * cris.cpu (cris-set-mem): Correct integral write semantics.
623
624 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
625
626 * cris.cpu: New file.
627
628 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
629
630 * iq2000.cpu: Added quotes around macro arguments so that they
631 will work with newer versions of guile.
632
633 2004-10-27 Nick Clifton <nickc@redhat.com>
634
635 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
636 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
637 operand.
638 * iq2000.cpu (dnop index): Rename to _index to avoid complications
639 with guile.
640
641 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
642
643 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
644
645 2004-05-15 Nick Clifton <nickc@redhat.com>
646
647 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
648
649 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
650
651 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
652
653 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
654
655 * frv.cpu (define-arch frv): Add fr450 mach.
656 (define-mach fr450): New.
657 (define-model fr450): New. Add profile units to every fr450 insn.
658 (define-attr UNIT): Add MDCUTSSI.
659 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
660 (define-attr AUDIO): New boolean.
661 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
662 (f-LRA-null, f-TLBPR-null): New fields.
663 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
664 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
665 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
666 (LRA-null, TLBPR-null): New macros.
667 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
668 (load-real-address): New macro.
669 (lrai, lrad, tlbpr): New instructions.
670 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
671 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
672 (mdcutssi): Change UNIT attribute to MDCUTSSI.
673 (media-low-clear-semantics, media-scope-limit-semantics)
674 (media-quad-limit, media-quad-shift): New macros.
675 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
676 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
677 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
678 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
679 (fr450_unit_mapping): New array.
680 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
681 for new MDCUTSSI unit.
682 (fr450_check_insn_major_constraints): New function.
683 (check_insn_major_constraints): Use it.
684
685 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
686
687 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
688 (scutss): Change unit to I0.
689 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
690 (mqsaths): Fix FR400-MAJOR categorization.
691 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
692 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
693 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
694 combinations.
695
696 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
697
698 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
699 (rstb, rsth, rst, rstd, rstq): Delete.
700 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
701
702 2004-02-23 Nick Clifton <nickc@redhat.com>
703
704 * Apply these patches from Renesas:
705
706 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
707
708 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
709 disassembling codes for 0x*2 addresses.
710
711 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
712
713 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
714
715 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
716
717 * cpu/m32r.cpu : Add new model m32r2.
718 Add new instructions.
719 Replace occurrances of 'Mitsubishi' with 'Renesas'.
720 Changed PIPE attr of push from O to OS.
721 Care for Little-endian of M32R.
722 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
723 Care for Little-endian of M32R.
724 (parse_slo16): signed extension for value.
725
726 2004-02-20 Andrew Cagney <cagney@redhat.com>
727
728 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
729 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
730
731 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
732 written by Ben Elliston.
733
734 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
735
736 * frv.cpu (UNIT): Add IACC.
737 (iacc-multiply-r-r): Use it.
738 * frv.opc (fr400_unit_mapping): Add entry for IACC.
739 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
740
741 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
742
743 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
744 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
745 cut&paste errors in shifting/truncating numerical operands.
746 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
747 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
748 (parse_uslo16): Likewise.
749 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
750 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
751 (parse_s12): Likewise.
752 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
753 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
754 (parse_uslo16): Likewise.
755 (parse_uhi16): Parse gothi and gotfuncdeschi.
756 (parse_d12): Parse got12 and gotfuncdesc12.
757 (parse_s12): Likewise.
758
759 2003-10-10 Dave Brolley <brolley@redhat.com>
760
761 * frv.cpu (dnpmop): New p-macro.
762 (GRdoublek): Use dnpmop.
763 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
764 (store-double-r-r): Use (.sym regtype doublek).
765 (r-store-double): Ditto.
766 (store-double-r-r-u): Ditto.
767 (conditional-store-double): Ditto.
768 (conditional-store-double-u): Ditto.
769 (store-double-r-simm): Ditto.
770 (fmovs): Assign to UNIT FMALL.
771
772 2003-10-06 Dave Brolley <brolley@redhat.com>
773
774 * frv.cpu, frv.opc: Add support for fr550.
775
776 2003-09-24 Dave Brolley <brolley@redhat.com>
777
778 * frv.cpu (u-commit): New modelling unit for fr500.
779 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
780 (commit-r): Use u-commit model for fr500.
781 (commit): Ditto.
782 (conditional-float-binary-op): Take profiling data as an argument.
783 Update callers.
784 (ne-float-binary-op): Ditto.
785
786 2003-09-19 Michael Snyder <msnyder@redhat.com>
787
788 * frv.cpu (nldqi): Delete unimplemented instruction.
789
790 2003-09-12 Dave Brolley <brolley@redhat.com>
791
792 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
793 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
794 frv_ref_SI to get input register referenced for profiling.
795 (clear-ne-flag-all): Pass insn profiling in as an argument.
796 (clrgr,clrfr,clrga,clrfa): Add profiling information.
797
798 2003-09-11 Michael Snyder <msnyder@redhat.com>
799
800 * frv.cpu: Typographical corrections.
801
802 2003-09-09 Dave Brolley <brolley@redhat.com>
803
804 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
805 (conditional-media-dual-complex, media-quad-complex): Likewise.
806
807 2003-09-04 Dave Brolley <brolley@redhat.com>
808
809 * frv.cpu (register-transfer): Pass in all attributes in on argument.
810 Update all callers.
811 (conditional-register-transfer): Ditto.
812 (cache-preload): Ditto.
813 (floating-point-conversion): Ditto.
814 (floating-point-neg): Ditto.
815 (float-abs): Ditto.
816 (float-binary-op-s): Ditto.
817 (conditional-float-binary-op): Ditto.
818 (ne-float-binary-op): Ditto.
819 (float-dual-arith): Ditto.
820 (ne-float-dual-arith): Ditto.
821
822 2003-09-03 Dave Brolley <brolley@redhat.com>
823
824 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
825 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
826 MCLRACC-1.
827 (A): Removed operand.
828 (A0,A1): New operands replace operand A.
829 (mnop): Now a real insn
830 (mclracc): Removed insn.
831 (mclracc-0, mclracc-1): New insns replace mclracc.
832 (all insns): Use new UNIT attributes.
833
834 2003-08-21 Nick Clifton <nickc@redhat.com>
835
836 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
837 and u-media-dual-btoh with output parameter.
838 (cmbtoh): Add profiling hack.
839
840 2003-08-19 Michael Snyder <msnyder@redhat.com>
841
842 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
843
844 2003-06-10 Doug Evans <dje@sebabeach.org>
845
846 * frv.cpu: Add IDOC attribute.
847
848 2003-06-06 Andrew Cagney <cagney@redhat.com>
849
850 Contributed by Red Hat.
851 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
852 Stan Cox, and Frank Ch. Eigler.
853 * iq2000.opc: New file. Written by Ben Elliston, Frank
854 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
855 * iq2000m.cpu: New file. Written by Jeff Johnston.
856 * iq10.cpu: New file. Written by Jeff Johnston.
857
858 2003-06-05 Nick Clifton <nickc@redhat.com>
859
860 * frv.cpu (FRintieven): New operand. An even-numbered only
861 version of the FRinti operand.
862 (FRintjeven): Likewise for FRintj.
863 (FRintkeven): Likewise for FRintk.
864 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
865 media-quad-arith-sat-semantics, media-quad-arith-sat,
866 conditional-media-quad-arith-sat, mdunpackh,
867 media-quad-multiply-semantics, media-quad-multiply,
868 conditional-media-quad-multiply, media-quad-complex-i,
869 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
870 conditional-media-quad-multiply-acc, munpackh,
871 media-quad-multiply-cross-acc-semantics, mdpackh,
872 media-quad-multiply-cross-acc, mbtoh-semantics,
873 media-quad-cross-multiply-cross-acc-semantics,
874 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
875 media-quad-cross-multiply-acc-semantics, cmbtoh,
876 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
877 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
878 cmhtob): Use new operands.
879 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
880 (parse_even_register): New function.
881
882 2003-06-03 Nick Clifton <nickc@redhat.com>
883
884 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
885 immediate value not unsigned.
886
887 2003-06-03 Andrew Cagney <cagney@redhat.com>
888
889 Contributed by Red Hat.
890 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
891 and Eric Christopher.
892 * frv.opc: New file. Written by Catherine Moore, and Dave
893 Brolley.
894 * simplify.inc: New file. Written by Doug Evans.
895
896 2003-05-02 Andrew Cagney <cagney@redhat.com>
897
898 * New file.
899
900 \f
901 Copyright (C) 2003-2012 Free Software Foundation, Inc.
902
903 Copying and distribution of this file, with or without modification,
904 are permitted in any medium without royalty provided the copyright
905 notice and this notice are preserved.
906
907 Local Variables:
908 mode: change-log
909 left-margin: 8
910 fill-column: 74
911 version-control: never
912 End:
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