Fix shift left warning at source
[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2016-03-02 Alan Modra <amodra@gmail.com>
2
3 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
4
5 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
6
7 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
8 a constant to better align disassembler output.
9
10 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
11
12 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
13
14 2014-06-12 Alan Modra <amodra@gmail.com>
15
16 * or1k.opc: Whitespace fixes.
17
18 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
19
20 * or1korbis.cpu (h-atomic-reserve): New hardware.
21 (h-atomic-address): Likewise.
22 (insn-opcode): Add opcodes for LWA and SWA.
23 (atomic-reserve): New operand.
24 (atomic-address): Likewise.
25 (l-lwa, l-swa): New instructions.
26 (l-lbs): Fix typo in comment.
27 (store-insn): Clear atomic reserve on store to atomic-address.
28 Fix register names in fmt field.
29
30 2014-04-22 Christian Svensson <blue@cmd.nu>
31
32 * openrisc.cpu: Delete.
33 * openrisc.opc: Delete.
34 * or1k.cpu: New file.
35 * or1k.opc: New file.
36 * or1kcommon.cpu: New file.
37 * or1korbis.cpu: New file.
38 * or1korfpx.cpu: New file.
39
40 2013-12-07 Mike Frysinger <vapier@gentoo.org>
41
42 * epiphany.opc: Remove +x file mode.
43
44 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
45
46 PR binutils/15241
47 * lm32.cpu (Control and status registers): Add CFG2, PSW,
48 TLBVADDR, TLBPADDR and TLBBADVADDR.
49
50 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
51 Joern Rennecke <joern.rennecke@embecosm.com>
52
53 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
54 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
55 (testset-insn): Add NO_DIS attribute to t.l.
56 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
57 (move-insns): Add NO-DIS attribute to cmov.l.
58 (op-mmr-movts): Add NO-DIS attribute to movts.l.
59 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
60 (op-rrr): Add NO-DIS attribute to .l.
61 (shift-rrr): Add NO-DIS attribute to .l.
62 (op-shift-rri): Add NO-DIS attribute to i32.l.
63 (bitrl, movtl): Add NO-DIS attribute.
64 (op-iextrrr): Add NO-DIS attribute to .l
65 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
66 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
67
68 2012-02-27 Alan Modra <amodra@gmail.com>
69
70 * mt.opc (print_dollarhex): Trim values to 32 bits.
71
72 2011-12-15 Nick Clifton <nickc@redhat.com>
73
74 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
75 hosts.
76
77 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
78
79 * epiphany.opc (parse_branch_addr): Fix type of valuep.
80 Cast value before printing it as a long.
81 (parse_postindex): Fix type of valuep.
82
83 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
84
85 * cpu/epiphany.cpu: New file.
86 * cpu/epiphany.opc: New file.
87
88 2011-08-22 Nick Clifton <nickc@redhat.com>
89
90 * fr30.cpu: Newly contributed file.
91 * fr30.opc: Likewise.
92 * ip2k.cpu: Likewise.
93 * ip2k.opc: Likewise.
94 * mep-avc.cpu: Likewise.
95 * mep-avc2.cpu: Likewise.
96 * mep-c5.cpu: Likewise.
97 * mep-core.cpu: Likewise.
98 * mep-default.cpu: Likewise.
99 * mep-ext-cop.cpu: Likewise.
100 * mep-fmax.cpu: Likewise.
101 * mep-h1.cpu: Likewise.
102 * mep-ivc2.cpu: Likewise.
103 * mep-rhcop.cpu: Likewise.
104 * mep-sample-ucidsp.cpu: Likewise.
105 * mep.cpu: Likewise.
106 * mep.opc: Likewise.
107 * openrisc.cpu: Likewise.
108 * openrisc.opc: Likewise.
109 * xstormy16.cpu: Likewise.
110 * xstormy16.opc: Likewise.
111
112 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
113
114 * frv.opc: #undef DEBUG.
115
116 2010-07-03 DJ Delorie <dj@delorie.com>
117
118 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
119
120 2010-02-11 Doug Evans <dje@sebabeach.org>
121
122 * m32r.cpu (HASH-PREFIX): Delete.
123 (duhpo, dshpo): New pmacros.
124 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
125 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
126 attribute, define with dshpo.
127 (uimm24): Delete HASH-PREFIX attribute.
128 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
129 (print_signed_with_hash_prefix): New function.
130 (print_unsigned_with_hash_prefix): New function.
131 * xc16x.cpu (dowh): New pmacro.
132 (upof16): Define with dowh, specify print handler.
133 (qbit, qlobit, qhibit): Ditto.
134 (upag16): Ditto.
135 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
136 (print_with_dot_prefix): New functions.
137 (print_with_pof_prefix, print_with_pag_prefix): New functions.
138
139 2010-01-24 Doug Evans <dje@sebabeach.org>
140
141 * frv.cpu (floating-point-conversion): Update call to fp conv op.
142 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
143 conditional-floating-point-conversion, ne-floating-point-conversion,
144 float-parallel-mul-add-double-semantics): Ditto.
145
146 2010-01-05 Doug Evans <dje@sebabeach.org>
147
148 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
149 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
150
151 2010-01-02 Doug Evans <dje@sebabeach.org>
152
153 * m32c.opc (parse_signed16): Fix typo.
154
155 2009-12-11 Nick Clifton <nickc@redhat.com>
156
157 * frv.opc: Fix shadowed variable warnings.
158 * m32c.opc: Fix shadowed variable warnings.
159
160 2009-11-14 Doug Evans <dje@sebabeach.org>
161
162 Must use VOID expression in VOID context.
163 * xc16x.cpu (mov4): Fix mode of `sequence'.
164 (mov9, mov10): Ditto.
165 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
166 (callr, callseg, calls, trap, rets, reti): Ditto.
167 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
168 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
169 (exts, exts1, extsr, extsr1, prior): Ditto.
170
171 2009-10-23 Doug Evans <dje@sebabeach.org>
172
173 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
174 cgen-ops.h -> cgen/basic-ops.h.
175
176 2009-09-25 Alan Modra <amodra@bigpond.net.au>
177
178 * m32r.cpu (stb-plus): Typo fix.
179
180 2009-09-23 Doug Evans <dje@sebabeach.org>
181
182 * m32r.cpu (sth-plus): Fix address mode and calculation.
183 (stb-plus): Ditto.
184 (clrpsw): Fix mask calculation.
185 (bset, bclr, btst): Make mode in bit calculation match expression.
186
187 * xc16x.cpu (rtl-version): Set to 0.8.
188 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
189 make uppercase. Remove unnecessary name-prefix spec.
190 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
191 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
192 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
193 (h-cr): New hardware.
194 (muls): Comment out parts that won't compile, add fixme.
195 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
196 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
197 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
198
199 2009-07-16 Doug Evans <dje@sebabeach.org>
200
201 * cpu/simplify.inc (*): One line doc strings don't need \n.
202 (df): Invoke define-full-ifield instead of claiming it's an alias.
203 (dno): Define.
204 (dnop): Mark as deprecated.
205
206 2009-06-22 Alan Modra <amodra@bigpond.net.au>
207
208 * m32c.opc (parse_lab_5_3): Use correct enum.
209
210 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
211
212 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
213 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
214 (media-arith-sat-semantics): Explicitly sign- or zero-extend
215 arguments of "operation" to DI using "mode" and the new pmacros.
216
217 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
218
219 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
220 of number 2, PID.
221
222 2008-12-23 Jon Beniston <jon@beniston.com>
223
224 * lm32.cpu: New file.
225 * lm32.opc: New file.
226
227 2008-01-29 Alan Modra <amodra@bigpond.net.au>
228
229 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
230 to source.
231
232 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
233
234 * cris.cpu (movs, movu): Use result of extension operation when
235 updating flags.
236
237 2007-07-04 Nick Clifton <nickc@redhat.com>
238
239 * cris.cpu: Update copyright notice to refer to GPLv3.
240 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
241 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
242 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
243 xc16x.opc: Likewise.
244 * iq2000.cpu: Fix copyright notice to refer to FSF.
245
246 2007-04-30 Mark Salter <msalter@sadr.localdomain>
247
248 * frv.cpu (spr-names): Support new coprocessor SPR registers.
249
250 2007-04-20 Nick Clifton <nickc@redhat.com>
251
252 * xc16x.cpu: Restore after accidentally overwriting this file with
253 xc16x.opc.
254
255 2007-03-29 DJ Delorie <dj@redhat.com>
256
257 * m32c.cpu (Imm-8-s4n): Fix print hook.
258 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
259 (arith-jnz-imm4-dst-defn): Make relaxable.
260 (arith-jnz16-imm4-dst-defn): Fix encodings.
261
262 2007-03-20 DJ Delorie <dj@redhat.com>
263
264 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
265 mem20): New.
266 (src16-16-20-An-relative-*): New.
267 (dst16-*-20-An-relative-*): New.
268 (dst16-16-16sa-*): New
269 (dst16-16-16ar-*): New
270 (dst32-16-16sa-Unprefixed-*): New
271 (jsri): Fix operands.
272 (setzx): Fix encoding.
273
274 2007-03-08 Alan Modra <amodra@bigpond.net.au>
275
276 * m32r.opc: Formatting.
277
278 2006-05-22 Nick Clifton <nickc@redhat.com>
279
280 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
281
282 2006-04-10 DJ Delorie <dj@redhat.com>
283
284 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
285 decides if this function accepts symbolic constants or not.
286 (parse_signed_bitbase): Likewise.
287 (parse_unsigned_bitbase8): Pass the new parameter.
288 (parse_unsigned_bitbase11): Likewise.
289 (parse_unsigned_bitbase16): Likewise.
290 (parse_unsigned_bitbase19): Likewise.
291 (parse_unsigned_bitbase27): Likewise.
292 (parse_signed_bitbase8): Likewise.
293 (parse_signed_bitbase11): Likewise.
294 (parse_signed_bitbase19): Likewise.
295
296 2006-03-13 DJ Delorie <dj@redhat.com>
297
298 * m32c.cpu (Bit3-S): New.
299 (btst:s): New.
300 * m32c.opc (parse_bit3_S): New.
301
302 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
303 (btst): Add optional :G suffix for MACH32.
304 (or.b:S): New.
305 (pop.w:G): Add optional :G suffix for MACH16.
306 (push.b.imm): Fix syntax.
307
308 2006-03-10 DJ Delorie <dj@redhat.com>
309
310 * m32c.cpu (mul.l): New.
311 (mulu.l): New.
312
313 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
314
315 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
316 an error message otherwise.
317 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
318 Fix up comments to correctly describe the functions.
319
320 2006-02-24 DJ Delorie <dj@redhat.com>
321
322 * m32c.cpu (RL_TYPE): New attribute, with macros.
323 (Lab-8-24): Add RELAX.
324 (unary-insn-defn-g, binary-arith-imm-dst-defn,
325 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
326 (binary-arith-src-dst-defn): Add 2ADDR attribute.
327 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
328 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
329 attribute.
330 (jsri16, jsri32): Add 1ADDR attribute.
331 (jsr32.w, jsr32.a): Add JUMP attribute.
332
333 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
334 Anil Paranjape <anilp1@kpitcummins.com>
335 Shilin Shakti <shilins@kpitcummins.com>
336
337 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
338 description.
339 * xc16x.opc: New file containing supporting XC16C routines.
340
341 2006-02-10 Nick Clifton <nickc@redhat.com>
342
343 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
344
345 2006-01-06 DJ Delorie <dj@redhat.com>
346
347 * m32c.cpu (mov.w:q): Fix mode.
348 (push32.b.imm): Likewise, for the comment.
349
350 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
351
352 Second part of ms1 to mt renaming.
353 * mt.cpu (define-arch, define-isa): Set name to mt.
354 (define-mach): Adjust.
355 * mt.opc (CGEN_ASM_HASH): Update.
356 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
357 (parse_loopsize, parse_imm16): Adjust.
358
359 2005-12-13 DJ Delorie <dj@redhat.com>
360
361 * m32c.cpu (jsri): Fix order so register names aren't treated as
362 symbols.
363 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
364 indexwd, indexws): Fix encodings.
365
366 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
367
368 * mt.cpu: Rename from ms1.cpu.
369 * mt.opc: Rename from ms1.opc.
370
371 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
372
373 * cris.cpu (simplecris-common-writable-specregs)
374 (simplecris-common-readable-specregs): Split from
375 simplecris-common-specregs. All users changed.
376 (cris-implemented-writable-specregs-v0)
377 (cris-implemented-readable-specregs-v0): Similar from
378 cris-implemented-specregs-v0.
379 (cris-implemented-writable-specregs-v3)
380 (cris-implemented-readable-specregs-v3)
381 (cris-implemented-writable-specregs-v8)
382 (cris-implemented-readable-specregs-v8)
383 (cris-implemented-writable-specregs-v10)
384 (cris-implemented-readable-specregs-v10)
385 (cris-implemented-writable-specregs-v32)
386 (cris-implemented-readable-specregs-v32): Similar.
387 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
388 insns and specializations.
389
390 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
391
392 Add ms2
393 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
394 model.
395 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
396 f-cb2incr, f-rc3): New fields.
397 (LOOP): New instruction.
398 (JAL-HAZARD): New hazard.
399 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
400 New operands.
401 (mul, muli, dbnz, iflush): Enable for ms2
402 (jal, reti): Has JAL-HAZARD.
403 (ldctxt, ldfb, stfb): Only ms1.
404 (fbcb): Only ms1,ms1-003.
405 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
406 fbcbincrs, mfbcbincrs): Enable for ms2.
407 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
408 * ms1.opc (parse_loopsize): New.
409 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
410 (print_pcrel): New.
411
412 2005-10-28 Dave Brolley <brolley@redhat.com>
413
414 Contribute the following change:
415 2003-09-24 Dave Brolley <brolley@redhat.com>
416
417 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
418 CGEN_ATTR_VALUE_TYPE.
419 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
420 Use cgen_bitset_intersect_p.
421
422 2005-10-27 DJ Delorie <dj@redhat.com>
423
424 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
425 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
426 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
427 imm operand is needed.
428 (adjnz, sbjnz): Pass the right operands.
429 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
430 unary-insn): Add -g variants for opcodes that need to support :G.
431 (not.BW:G, push.BW:G): Call it.
432 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
433 stzx16-imm8-imm8-abs16): Fix operand typos.
434 * m32c.opc (m32c_asm_hash): Support bnCND.
435 (parse_signed4n, print_signed4n): New.
436
437 2005-10-26 DJ Delorie <dj@redhat.com>
438
439 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
440 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
441 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
442 dsp8[sp] is signed.
443 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
444 (mov.BW:S r0,r1): Fix typo r1l->r1.
445 (tst): Allow :G suffix.
446 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
447
448 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
449
450 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
451
452 2005-10-25 DJ Delorie <dj@redhat.com>
453
454 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
455 making one a macro of the other.
456
457 2005-10-21 DJ Delorie <dj@redhat.com>
458
459 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
460 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
461 indexld, indexls): .w variants have `1' bit.
462 (rot32.b): QI, not SI.
463 (rot32.w): HI, not SI.
464 (xchg16): HI for .w variant.
465
466 2005-10-19 Nick Clifton <nickc@redhat.com>
467
468 * m32r.opc (parse_slo16): Fix bad application of previous patch.
469
470 2005-10-18 Andreas Schwab <schwab@suse.de>
471
472 * m32r.opc (parse_slo16): Better version of previous patch.
473
474 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
475
476 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
477 size.
478
479 2005-07-25 DJ Delorie <dj@redhat.com>
480
481 * m32c.opc (parse_unsigned8): Add %dsp8().
482 (parse_signed8): Add %hi8().
483 (parse_unsigned16): Add %dsp16().
484 (parse_signed16): Add %lo16() and %hi16().
485 (parse_lab_5_3): Make valuep a bfd_vma *.
486
487 2005-07-18 Nick Clifton <nickc@redhat.com>
488
489 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
490 components.
491 (f-lab32-jmp-s): Fix insertion sequence.
492 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
493 (Dsp-40-s8): Make parameter be signed.
494 (Dsp-40-s16): Likewise.
495 (Dsp-48-s8): Likewise.
496 (Dsp-48-s16): Likewise.
497 (Imm-13-u3): Likewise. (Despite its name!)
498 (BitBase16-16-s8): Make the parameter be unsigned.
499 (BitBase16-8-u11-S): Likewise.
500 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
501 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
502 relaxation.
503
504 * m32c.opc: Fix formatting.
505 Use safe-ctype.h instead of ctype.h
506 Move duplicated code sequences into a macro.
507 Fix compile time warnings about signedness mismatches.
508 Remove dead code.
509 (parse_lab_5_3): New parser function.
510
511 2005-07-16 Jim Blandy <jimb@redhat.com>
512
513 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
514 to represent isa sets.
515
516 2005-07-15 Jim Blandy <jimb@redhat.com>
517
518 * m32c.cpu, m32c.opc: Fix copyright.
519
520 2005-07-14 Jim Blandy <jimb@redhat.com>
521
522 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
523
524 2005-07-14 Alan Modra <amodra@bigpond.net.au>
525
526 * ms1.opc (print_dollarhex): Correct format string.
527
528 2005-07-06 Alan Modra <amodra@bigpond.net.au>
529
530 * iq2000.cpu: Include from binutils cpu dir.
531
532 2005-07-05 Nick Clifton <nickc@redhat.com>
533
534 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
535 unsigned in order to avoid compile time warnings about sign
536 conflicts.
537
538 * ms1.opc (parse_*): Likewise.
539 (parse_imm16): Use a "void *" as it is passed both signed and
540 unsigned arguments.
541
542 2005-07-01 Nick Clifton <nickc@redhat.com>
543
544 * frv.opc: Update to ISO C90 function declaration style.
545 * iq2000.opc: Likewise.
546 * m32r.opc: Likewise.
547 * sh.opc: Likewise.
548
549 2005-06-15 Dave Brolley <brolley@redhat.com>
550
551 Contributed by Red Hat.
552 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
553 * ms1.opc: New file. Written by Stan Cox.
554
555 2005-05-10 Nick Clifton <nickc@redhat.com>
556
557 * Update the address and phone number of the FSF organization in
558 the GPL notices in the following files:
559 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
560 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
561 sh64-media.cpu, simplify.inc
562
563 2005-02-24 Alan Modra <amodra@bigpond.net.au>
564
565 * frv.opc (parse_A): Warning fix.
566
567 2005-02-23 Nick Clifton <nickc@redhat.com>
568
569 * frv.opc: Fixed compile time warnings about differing signed'ness
570 of pointers passed to functions.
571 * m32r.opc: Likewise.
572
573 2005-02-11 Nick Clifton <nickc@redhat.com>
574
575 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
576 'bfd_vma *' in order avoid compile time warning message.
577
578 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
579
580 * cris.cpu (mstep): Add missing insn.
581
582 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
583
584 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
585 * frv.cpu: Add support for TLS annotations in loads and calll.
586 * frv.opc (parse_symbolic_address): New.
587 (parse_ldd_annotation): New.
588 (parse_call_annotation): New.
589 (parse_ld_annotation): New.
590 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
591 Introduce TLS relocations.
592 (parse_d12, parse_s12, parse_u12): Likewise.
593 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
594 (parse_call_label, print_at): New.
595
596 2004-12-21 Mikael Starvik <starvik@axis.com>
597
598 * cris.cpu (cris-set-mem): Correct integral write semantics.
599
600 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
601
602 * cris.cpu: New file.
603
604 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
605
606 * iq2000.cpu: Added quotes around macro arguments so that they
607 will work with newer versions of guile.
608
609 2004-10-27 Nick Clifton <nickc@redhat.com>
610
611 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
612 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
613 operand.
614 * iq2000.cpu (dnop index): Rename to _index to avoid complications
615 with guile.
616
617 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
618
619 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
620
621 2004-05-15 Nick Clifton <nickc@redhat.com>
622
623 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
624
625 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
626
627 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
628
629 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
630
631 * frv.cpu (define-arch frv): Add fr450 mach.
632 (define-mach fr450): New.
633 (define-model fr450): New. Add profile units to every fr450 insn.
634 (define-attr UNIT): Add MDCUTSSI.
635 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
636 (define-attr AUDIO): New boolean.
637 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
638 (f-LRA-null, f-TLBPR-null): New fields.
639 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
640 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
641 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
642 (LRA-null, TLBPR-null): New macros.
643 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
644 (load-real-address): New macro.
645 (lrai, lrad, tlbpr): New instructions.
646 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
647 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
648 (mdcutssi): Change UNIT attribute to MDCUTSSI.
649 (media-low-clear-semantics, media-scope-limit-semantics)
650 (media-quad-limit, media-quad-shift): New macros.
651 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
652 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
653 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
654 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
655 (fr450_unit_mapping): New array.
656 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
657 for new MDCUTSSI unit.
658 (fr450_check_insn_major_constraints): New function.
659 (check_insn_major_constraints): Use it.
660
661 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
662
663 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
664 (scutss): Change unit to I0.
665 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
666 (mqsaths): Fix FR400-MAJOR categorization.
667 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
668 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
669 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
670 combinations.
671
672 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
673
674 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
675 (rstb, rsth, rst, rstd, rstq): Delete.
676 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
677
678 2004-02-23 Nick Clifton <nickc@redhat.com>
679
680 * Apply these patches from Renesas:
681
682 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
683
684 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
685 disassembling codes for 0x*2 addresses.
686
687 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
688
689 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
690
691 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
692
693 * cpu/m32r.cpu : Add new model m32r2.
694 Add new instructions.
695 Replace occurrances of 'Mitsubishi' with 'Renesas'.
696 Changed PIPE attr of push from O to OS.
697 Care for Little-endian of M32R.
698 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
699 Care for Little-endian of M32R.
700 (parse_slo16): signed extension for value.
701
702 2004-02-20 Andrew Cagney <cagney@redhat.com>
703
704 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
705 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
706
707 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
708 written by Ben Elliston.
709
710 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
711
712 * frv.cpu (UNIT): Add IACC.
713 (iacc-multiply-r-r): Use it.
714 * frv.opc (fr400_unit_mapping): Add entry for IACC.
715 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
716
717 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
718
719 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
720 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
721 cut&paste errors in shifting/truncating numerical operands.
722 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
723 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
724 (parse_uslo16): Likewise.
725 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
726 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
727 (parse_s12): Likewise.
728 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
729 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
730 (parse_uslo16): Likewise.
731 (parse_uhi16): Parse gothi and gotfuncdeschi.
732 (parse_d12): Parse got12 and gotfuncdesc12.
733 (parse_s12): Likewise.
734
735 2003-10-10 Dave Brolley <brolley@redhat.com>
736
737 * frv.cpu (dnpmop): New p-macro.
738 (GRdoublek): Use dnpmop.
739 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
740 (store-double-r-r): Use (.sym regtype doublek).
741 (r-store-double): Ditto.
742 (store-double-r-r-u): Ditto.
743 (conditional-store-double): Ditto.
744 (conditional-store-double-u): Ditto.
745 (store-double-r-simm): Ditto.
746 (fmovs): Assign to UNIT FMALL.
747
748 2003-10-06 Dave Brolley <brolley@redhat.com>
749
750 * frv.cpu, frv.opc: Add support for fr550.
751
752 2003-09-24 Dave Brolley <brolley@redhat.com>
753
754 * frv.cpu (u-commit): New modelling unit for fr500.
755 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
756 (commit-r): Use u-commit model for fr500.
757 (commit): Ditto.
758 (conditional-float-binary-op): Take profiling data as an argument.
759 Update callers.
760 (ne-float-binary-op): Ditto.
761
762 2003-09-19 Michael Snyder <msnyder@redhat.com>
763
764 * frv.cpu (nldqi): Delete unimplemented instruction.
765
766 2003-09-12 Dave Brolley <brolley@redhat.com>
767
768 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
769 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
770 frv_ref_SI to get input register referenced for profiling.
771 (clear-ne-flag-all): Pass insn profiling in as an argument.
772 (clrgr,clrfr,clrga,clrfa): Add profiling information.
773
774 2003-09-11 Michael Snyder <msnyder@redhat.com>
775
776 * frv.cpu: Typographical corrections.
777
778 2003-09-09 Dave Brolley <brolley@redhat.com>
779
780 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
781 (conditional-media-dual-complex, media-quad-complex): Likewise.
782
783 2003-09-04 Dave Brolley <brolley@redhat.com>
784
785 * frv.cpu (register-transfer): Pass in all attributes in on argument.
786 Update all callers.
787 (conditional-register-transfer): Ditto.
788 (cache-preload): Ditto.
789 (floating-point-conversion): Ditto.
790 (floating-point-neg): Ditto.
791 (float-abs): Ditto.
792 (float-binary-op-s): Ditto.
793 (conditional-float-binary-op): Ditto.
794 (ne-float-binary-op): Ditto.
795 (float-dual-arith): Ditto.
796 (ne-float-dual-arith): Ditto.
797
798 2003-09-03 Dave Brolley <brolley@redhat.com>
799
800 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
801 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
802 MCLRACC-1.
803 (A): Removed operand.
804 (A0,A1): New operands replace operand A.
805 (mnop): Now a real insn
806 (mclracc): Removed insn.
807 (mclracc-0, mclracc-1): New insns replace mclracc.
808 (all insns): Use new UNIT attributes.
809
810 2003-08-21 Nick Clifton <nickc@redhat.com>
811
812 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
813 and u-media-dual-btoh with output parameter.
814 (cmbtoh): Add profiling hack.
815
816 2003-08-19 Michael Snyder <msnyder@redhat.com>
817
818 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
819
820 2003-06-10 Doug Evans <dje@sebabeach.org>
821
822 * frv.cpu: Add IDOC attribute.
823
824 2003-06-06 Andrew Cagney <cagney@redhat.com>
825
826 Contributed by Red Hat.
827 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
828 Stan Cox, and Frank Ch. Eigler.
829 * iq2000.opc: New file. Written by Ben Elliston, Frank
830 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
831 * iq2000m.cpu: New file. Written by Jeff Johnston.
832 * iq10.cpu: New file. Written by Jeff Johnston.
833
834 2003-06-05 Nick Clifton <nickc@redhat.com>
835
836 * frv.cpu (FRintieven): New operand. An even-numbered only
837 version of the FRinti operand.
838 (FRintjeven): Likewise for FRintj.
839 (FRintkeven): Likewise for FRintk.
840 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
841 media-quad-arith-sat-semantics, media-quad-arith-sat,
842 conditional-media-quad-arith-sat, mdunpackh,
843 media-quad-multiply-semantics, media-quad-multiply,
844 conditional-media-quad-multiply, media-quad-complex-i,
845 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
846 conditional-media-quad-multiply-acc, munpackh,
847 media-quad-multiply-cross-acc-semantics, mdpackh,
848 media-quad-multiply-cross-acc, mbtoh-semantics,
849 media-quad-cross-multiply-cross-acc-semantics,
850 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
851 media-quad-cross-multiply-acc-semantics, cmbtoh,
852 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
853 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
854 cmhtob): Use new operands.
855 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
856 (parse_even_register): New function.
857
858 2003-06-03 Nick Clifton <nickc@redhat.com>
859
860 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
861 immediate value not unsigned.
862
863 2003-06-03 Andrew Cagney <cagney@redhat.com>
864
865 Contributed by Red Hat.
866 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
867 and Eric Christopher.
868 * frv.opc: New file. Written by Catherine Moore, and Dave
869 Brolley.
870 * simplify.inc: New file. Written by Doug Evans.
871
872 2003-05-02 Andrew Cagney <cagney@redhat.com>
873
874 * New file.
875
876 \f
877 Copyright (C) 2003-2012 Free Software Foundation, Inc.
878
879 Copying and distribution of this file, with or without modification,
880 are permitted in any medium without royalty provided the copyright
881 notice and this notice are preserved.
882
883 Local Variables:
884 mode: change-log
885 left-margin: 8
886 fill-column: 74
887 version-control: never
888 End:
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