cpu/ChangeLog

   1 2005-12-13  DJ Delorie  <dj@redhat.com>
   2
   3         * m32c.cpu (jsri): Fix order so register names aren't treated as
   4         symbols.
   5         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
   6         indexwd, indexws): Fix encodings.
   7
   8 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
   9
  10         * mt.cpu: Rename from ms1.cpu.
  11         * mt.opc: Rename from ms1.opc.
  12
  13 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
  14
  15         * cris.cpu (simplecris-common-writable-specregs)
  16         (simplecris-common-readable-specregs): Split from
  17         simplecris-common-specregs.  All users changed.
  18         (cris-implemented-writable-specregs-v0)
  19         (cris-implemented-readable-specregs-v0): Similar from
  20         cris-implemented-specregs-v0.
  21         (cris-implemented-writable-specregs-v3)
  22         (cris-implemented-readable-specregs-v3)
  23         (cris-implemented-writable-specregs-v8)
  24         (cris-implemented-readable-specregs-v8)
  25         (cris-implemented-writable-specregs-v10)
  26         (cris-implemented-readable-specregs-v10)
  27         (cris-implemented-writable-specregs-v32)
  28         (cris-implemented-readable-specregs-v32): Similar.
  29         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
  30         insns and specializations.
  31
  32 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
  33
  34         Add ms2
  35         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
  36         model.
  37         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
  38         f-cb2incr, f-rc3): New fields.
  39         (LOOP): New instruction.
  40         (JAL-HAZARD): New hazard.
  41         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
  42         New operands.
  43         (mul, muli, dbnz, iflush): Enable for ms2
  44         (jal, reti): Has JAL-HAZARD.
  45         (ldctxt, ldfb, stfb): Only ms1.
  46         (fbcb): Only ms1,ms1-003.
  47         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
  48         fbcbincrs, mfbcbincrs): Enable for ms2.
  49         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
  50         * ms1.opc (parse_loopsize): New.
  51         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
  52         (print_pcrel): New.
  53
  54 2005-10-28  Dave Brolley  <brolley@redhat.com>
  55
  56         Contribute the following change:
  57         2003-09-24  Dave Brolley  <brolley@redhat.com>
  58
  59         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
  60         CGEN_ATTR_VALUE_TYPE.
  61         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
  62         Use cgen_bitset_intersect_p.
  63
  64 2005-10-27  DJ Delorie  <dj@redhat.com>
  65
  66         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
  67         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
  68         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
  69         imm operand is needed.
  70         (adjnz, sbjnz): Pass the right operands.
  71         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
  72         unary-insn): Add -g variants for opcodes that need to support :G.
  73         (not.BW:G, push.BW:G): Call it.
  74         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
  75         stzx16-imm8-imm8-abs16): Fix operand typos.
  76         * m32c.opc (m32c_asm_hash): Support bnCND.
  77         (parse_signed4n, print_signed4n): New.
  78
  79 2005-10-26  DJ Delorie  <dj@redhat.com>
  80
  81         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
  82         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
  83         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
  84         dsp8[sp] is signed.
  85         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
  86         (mov.BW:S r0,r1): Fix typo r1l->r1.
  87         (tst): Allow :G suffix.
  88         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
  89
  90 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  91
  92         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
  93
  94 2005-10-25  DJ Delorie  <dj@redhat.com>
  95
  96         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
  97         making one a macro of the other.
  98
  99 2005-10-21  DJ Delorie  <dj@redhat.com>
 100
 101         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 102         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 103         indexld, indexls): .w variants have `1' bit.
 104         (rot32.b): QI, not SI.
 105         (rot32.w): HI, not SI.
 106         (xchg16): HI for .w variant.
 107
 108 2005-10-19  Nick Clifton  <nickc@redhat.com>
 109
 110         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 111
 112 2005-10-18  Andreas Schwab  <schwab@suse.de>
 113
 114         * m32r.opc (parse_slo16): Better version of previous patch.
 115
 116 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 117
 118         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 119         size.
 120
 121 2005-07-25  DJ Delorie  <dj@redhat.com>
 122
 123         * m32c.opc (parse_unsigned8): Add %dsp8().
 124         (parse_signed8): Add %hi8().
 125         (parse_unsigned16): Add %dsp16().
 126         (parse_signed16): Add %lo16() and %hi16().
 127         (parse_lab_5_3): Make valuep a bfd_vma *.
 128
 129 2005-07-18  Nick Clifton  <nickc@redhat.com>
 130
 131         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 132         components.
 133         (f-lab32-jmp-s): Fix insertion sequence.
 134         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 135         (Dsp-40-s8): Make parameter be signed.
 136         (Dsp-40-s16): Likewise.
 137         (Dsp-48-s8): Likewise.
 138         (Dsp-48-s16): Likewise.
 139         (Imm-13-u3): Likewise. (Despite its name!)
 140         (BitBase16-16-s8): Make the parameter be unsigned.
 141         (BitBase16-8-u11-S): Likewise.
 142         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 143         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 144         relaxation.
 145
 146         * m32c.opc: Fix formatting.
 147         Use safe-ctype.h instead of ctype.h
 148         Move duplicated code sequences into a macro.
 149         Fix compile time warnings about signedness mismatches.
 150         Remove dead code.
 151         (parse_lab_5_3): New parser function.
 152
 153 2005-07-16  Jim Blandy  <jimb@redhat.com>
 154
 155         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 156         to represent isa sets.
 157
 158 2005-07-15  Jim Blandy  <jimb@redhat.com>
 159
 160         * m32c.cpu, m32c.opc: Fix copyright.
 161
 162 2005-07-14  Jim Blandy  <jimb@redhat.com>
 163
 164         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 165
 166 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 167
 168         * ms1.opc (print_dollarhex): Correct format string.
 169
 170 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 171
 172         * iq2000.cpu: Include from binutils cpu dir.
 173
 174 2005-07-05  Nick Clifton  <nickc@redhat.com>
 175
 176         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 177         unsigned in order to avoid compile time warnings about sign
 178         conflicts.
 179
 180         * ms1.opc (parse_*): Likewise.
 181         (parse_imm16): Use a "void *" as it is passed both signed and
 182         unsigned arguments.
 183
 184 2005-07-01  Nick Clifton  <nickc@redhat.com>
 185
 186         * frv.opc: Update to ISO C90 function declaration style.
 187         * iq2000.opc: Likewise.
 188         * m32r.opc: Likewise.
 189         * sh.opc: Likewise.
 190
 191 2005-06-15  Dave Brolley  <brolley@redhat.com>
 192
 193         Contributed by Red Hat.
 194         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 195         * ms1.opc: New file.  Written by Stan Cox.
 196
 197 2005-05-10  Nick Clifton  <nickc@redhat.com>
 198
 199         * Update the address and phone number of the FSF organization in
 200         the GPL notices in the following files:
 201         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 202         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 203         sh64-media.cpu, simplify.inc
 204
 205 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 206
 207         * frv.opc (parse_A): Warning fix.
 208
 209 2005-02-23  Nick Clifton  <nickc@redhat.com>
 210
 211         * frv.opc: Fixed compile time warnings about differing signed'ness
 212         of pointers passed to functions.
 213         * m32r.opc: Likewise.
 214
 215 2005-02-11  Nick Clifton  <nickc@redhat.com>
 216
 217         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 218         'bfd_vma *' in order avoid compile time warning message.
 219
 220 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 221
 222         * cris.cpu (mstep): Add missing insn.
 223
 224 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 225
 226         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 227         * frv.cpu: Add support for TLS annotations in loads and calll.
 228         * frv.opc (parse_symbolic_address): New.
 229         (parse_ldd_annotation): New.
 230         (parse_call_annotation): New.
 231         (parse_ld_annotation): New.
 232         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 233         Introduce TLS relocations.
 234         (parse_d12, parse_s12, parse_u12): Likewise.
 235         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 236         (parse_call_label, print_at): New.
 237
 238 2004-12-21  Mikael Starvik  <starvik@axis.com>
 239
 240         * cris.cpu (cris-set-mem): Correct integral write semantics.
 241
 242 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 243
 244         * cris.cpu: New file.
 245
 246 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 247
 248         * iq2000.cpu: Added quotes around macro arguments so that they
 249         will work with newer versions of guile.
 250
 251 2004-10-27  Nick Clifton  <nickc@redhat.com>
 252
 253         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 254         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 255         operand.
 256         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 257         with guile.
 258
 259 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 260
 261         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 262
 263 2004-05-15  Nick Clifton  <nickc@redhat.com>
 264
 265         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 266
 267 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 268
 269         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 270
 271 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 272
 273         * frv.cpu (define-arch frv): Add fr450 mach.
 274         (define-mach fr450): New.
 275         (define-model fr450): New.  Add profile units to every fr450 insn.
 276         (define-attr UNIT): Add MDCUTSSI.
 277         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 278         (define-attr AUDIO): New boolean.
 279         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 280         (f-LRA-null, f-TLBPR-null): New fields.
 281         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 282         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 283         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 284         (LRA-null, TLBPR-null): New macros.
 285         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 286         (load-real-address): New macro.
 287         (lrai, lrad, tlbpr): New instructions.
 288         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 289         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 290         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 291         (media-low-clear-semantics, media-scope-limit-semantics)
 292         (media-quad-limit, media-quad-shift): New macros.
 293         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 294         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 295         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 296         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 297         (fr450_unit_mapping): New array.
 298         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 299         for new MDCUTSSI unit.
 300         (fr450_check_insn_major_constraints): New function.
 301         (check_insn_major_constraints): Use it.
 302
 303 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 304
 305         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 306         (scutss): Change unit to I0.
 307         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 308         (mqsaths): Fix FR400-MAJOR categorization.
 309         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 310         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 311         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 312         combinations.
 313
 314 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 315
 316         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 317         (rstb, rsth, rst, rstd, rstq): Delete.
 318         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 319
 320 2004-02-23  Nick Clifton  <nickc@redhat.com>
 321
 322         * Apply these patches from Renesas:
 323
 324         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 325
 326         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 327         disassembling codes for 0x*2 addresses.
 328
 329         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 330
 331         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 332
 333         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 334
 335         * cpu/m32r.cpu : Add new model m32r2.
 336         Add new instructions.
 337         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 338         Changed PIPE attr of push from O to OS.
 339         Care for Little-endian of M32R.
 340         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 341         Care for Little-endian of M32R.
 342         (parse_slo16): signed extension for value.
 343
 344 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 345
 346         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 347         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 348
 349         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 350         written by Ben Elliston.
 351
 352 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 353
 354         * frv.cpu (UNIT): Add IACC.
 355         (iacc-multiply-r-r): Use it.
 356         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 357         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 358
 359 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 360
 361         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 362         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 363         cut&paste errors in shifting/truncating numerical operands.
 364         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 365         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 366         (parse_uslo16): Likewise.
 367         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 368         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 369         (parse_s12): Likewise.
 370         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 371         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 372         (parse_uslo16): Likewise.
 373         (parse_uhi16): Parse gothi and gotfuncdeschi.
 374         (parse_d12): Parse got12 and gotfuncdesc12.
 375         (parse_s12): Likewise.
 376
 377 2003-10-10  Dave Brolley  <brolley@redhat.com>
 378
 379         * frv.cpu (dnpmop): New p-macro.
 380         (GRdoublek): Use dnpmop.
 381         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 382         (store-double-r-r): Use (.sym regtype doublek).
 383         (r-store-double): Ditto.
 384         (store-double-r-r-u): Ditto.
 385         (conditional-store-double): Ditto.
 386         (conditional-store-double-u): Ditto.
 387         (store-double-r-simm): Ditto.
 388         (fmovs): Assign to UNIT FMALL.
 389
 390 2003-10-06  Dave Brolley  <brolley@redhat.com>
 391
 392         * frv.cpu, frv.opc: Add support for fr550.
 393
 394 2003-09-24  Dave Brolley  <brolley@redhat.com>
 395
 396         * frv.cpu (u-commit): New modelling unit for fr500.
 397         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 398         (commit-r): Use u-commit model for fr500.
 399         (commit): Ditto.
 400         (conditional-float-binary-op): Take profiling data as an argument.
 401         Update callers.
 402         (ne-float-binary-op): Ditto.
 403
 404 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 405
 406         * frv.cpu (nldqi): Delete unimplemented instruction.
 407
 408 2003-09-12  Dave Brolley  <brolley@redhat.com>
 409
 410         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 411         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 412         frv_ref_SI to get input register referenced for profiling.
 413         (clear-ne-flag-all): Pass insn profiling in as an argument.
 414         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 415
 416 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 417
 418         * frv.cpu: Typographical corrections.
 419
 420 2003-09-09  Dave Brolley  <brolley@redhat.com>
 421
 422         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 423         (conditional-media-dual-complex, media-quad-complex): Likewise.
 424
 425 2003-09-04  Dave Brolley  <brolley@redhat.com>
 426
 427         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 428         Update all callers.
 429         (conditional-register-transfer): Ditto.
 430         (cache-preload): Ditto.
 431         (floating-point-conversion): Ditto.
 432         (floating-point-neg): Ditto.
 433         (float-abs): Ditto.
 434         (float-binary-op-s): Ditto.
 435         (conditional-float-binary-op): Ditto.
 436         (ne-float-binary-op): Ditto.
 437         (float-dual-arith): Ditto.
 438         (ne-float-dual-arith): Ditto.
 439
 440 2003-09-03  Dave Brolley  <brolley@redhat.com>
 441
 442         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 443         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 444         MCLRACC-1.
 445         (A): Removed operand.
 446         (A0,A1): New operands replace operand A.
 447         (mnop): Now a real insn
 448         (mclracc): Removed insn.
 449         (mclracc-0, mclracc-1): New insns replace mclracc.
 450         (all insns): Use new UNIT attributes.
 451
 452 2003-08-21  Nick Clifton  <nickc@redhat.com>
 453
 454         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 455         and u-media-dual-btoh with output parameter.
 456         (cmbtoh): Add profiling hack.
 457
 458 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 459
 460         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 461
 462 2003-06-10  Doug Evans  <dje@sebabeach.org>
 463
 464         * frv.cpu: Add IDOC attribute.
 465
 466 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 467
 468         Contributed by Red Hat.
 469         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 470         Stan Cox, and Frank Ch. Eigler.
 471         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 472         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 473         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 474         * iq10.cpu: New file.  Written by Jeff Johnston.
 475
 476 2003-06-05  Nick Clifton  <nickc@redhat.com>
 477
 478         * frv.cpu (FRintieven): New operand.  An even-numbered only
 479         version of the FRinti operand.
 480         (FRintjeven): Likewise for FRintj.
 481         (FRintkeven): Likewise for FRintk.
 482         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 483         media-quad-arith-sat-semantics, media-quad-arith-sat,
 484         conditional-media-quad-arith-sat, mdunpackh,
 485         media-quad-multiply-semantics, media-quad-multiply,
 486         conditional-media-quad-multiply, media-quad-complex-i,
 487         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 488         conditional-media-quad-multiply-acc, munpackh,
 489         media-quad-multiply-cross-acc-semantics, mdpackh,
 490         media-quad-multiply-cross-acc, mbtoh-semantics,
 491         media-quad-cross-multiply-cross-acc-semantics,
 492         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 493         media-quad-cross-multiply-acc-semantics, cmbtoh,
 494         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 495         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 496         cmhtob): Use new operands.
 497         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
 498         (parse_even_register): New function.
 499
 500 2003-06-03  Nick Clifton  <nickc@redhat.com>
 501
 502         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
 503         immediate value not unsigned.
 504
 505 2003-06-03  Andrew Cagney  <cagney@redhat.com>
 506
 507         Contributed by Red Hat.
 508         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
 509         and Eric Christopher.
 510         * frv.opc: New file.  Written by Catherine Moore, and Dave
 511         Brolley.
 512         * simplify.inc: New file.  Written by Doug Evans.
 513
 514 2003-05-02  Andrew Cagney  <cagney@redhat.com>
 515
 516         * New file.
 517
 518 \f
 519 Local Variables:
 520 mode: change-log
 521 left-margin: 8
 522 fill-column: 74
 523 version-control: never
 524 End: