Correct fr30 comment
[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2016-03-03 Alan Modra <amodra@gmail.com>
2
3 * fr30.cpu (f-m4): Replace bogus comment with a better guess
4 at what is really going on.
5
6 2016-03-02 Alan Modra <amodra@gmail.com>
7
8 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
9
10 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
11
12 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
13 a constant to better align disassembler output.
14
15 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
16
17 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
18
19 2014-06-12 Alan Modra <amodra@gmail.com>
20
21 * or1k.opc: Whitespace fixes.
22
23 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
24
25 * or1korbis.cpu (h-atomic-reserve): New hardware.
26 (h-atomic-address): Likewise.
27 (insn-opcode): Add opcodes for LWA and SWA.
28 (atomic-reserve): New operand.
29 (atomic-address): Likewise.
30 (l-lwa, l-swa): New instructions.
31 (l-lbs): Fix typo in comment.
32 (store-insn): Clear atomic reserve on store to atomic-address.
33 Fix register names in fmt field.
34
35 2014-04-22 Christian Svensson <blue@cmd.nu>
36
37 * openrisc.cpu: Delete.
38 * openrisc.opc: Delete.
39 * or1k.cpu: New file.
40 * or1k.opc: New file.
41 * or1kcommon.cpu: New file.
42 * or1korbis.cpu: New file.
43 * or1korfpx.cpu: New file.
44
45 2013-12-07 Mike Frysinger <vapier@gentoo.org>
46
47 * epiphany.opc: Remove +x file mode.
48
49 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
50
51 PR binutils/15241
52 * lm32.cpu (Control and status registers): Add CFG2, PSW,
53 TLBVADDR, TLBPADDR and TLBBADVADDR.
54
55 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
56 Joern Rennecke <joern.rennecke@embecosm.com>
57
58 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
59 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
60 (testset-insn): Add NO_DIS attribute to t.l.
61 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
62 (move-insns): Add NO-DIS attribute to cmov.l.
63 (op-mmr-movts): Add NO-DIS attribute to movts.l.
64 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
65 (op-rrr): Add NO-DIS attribute to .l.
66 (shift-rrr): Add NO-DIS attribute to .l.
67 (op-shift-rri): Add NO-DIS attribute to i32.l.
68 (bitrl, movtl): Add NO-DIS attribute.
69 (op-iextrrr): Add NO-DIS attribute to .l
70 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
71 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
72
73 2012-02-27 Alan Modra <amodra@gmail.com>
74
75 * mt.opc (print_dollarhex): Trim values to 32 bits.
76
77 2011-12-15 Nick Clifton <nickc@redhat.com>
78
79 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
80 hosts.
81
82 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
83
84 * epiphany.opc (parse_branch_addr): Fix type of valuep.
85 Cast value before printing it as a long.
86 (parse_postindex): Fix type of valuep.
87
88 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
89
90 * cpu/epiphany.cpu: New file.
91 * cpu/epiphany.opc: New file.
92
93 2011-08-22 Nick Clifton <nickc@redhat.com>
94
95 * fr30.cpu: Newly contributed file.
96 * fr30.opc: Likewise.
97 * ip2k.cpu: Likewise.
98 * ip2k.opc: Likewise.
99 * mep-avc.cpu: Likewise.
100 * mep-avc2.cpu: Likewise.
101 * mep-c5.cpu: Likewise.
102 * mep-core.cpu: Likewise.
103 * mep-default.cpu: Likewise.
104 * mep-ext-cop.cpu: Likewise.
105 * mep-fmax.cpu: Likewise.
106 * mep-h1.cpu: Likewise.
107 * mep-ivc2.cpu: Likewise.
108 * mep-rhcop.cpu: Likewise.
109 * mep-sample-ucidsp.cpu: Likewise.
110 * mep.cpu: Likewise.
111 * mep.opc: Likewise.
112 * openrisc.cpu: Likewise.
113 * openrisc.opc: Likewise.
114 * xstormy16.cpu: Likewise.
115 * xstormy16.opc: Likewise.
116
117 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
118
119 * frv.opc: #undef DEBUG.
120
121 2010-07-03 DJ Delorie <dj@delorie.com>
122
123 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
124
125 2010-02-11 Doug Evans <dje@sebabeach.org>
126
127 * m32r.cpu (HASH-PREFIX): Delete.
128 (duhpo, dshpo): New pmacros.
129 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
130 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
131 attribute, define with dshpo.
132 (uimm24): Delete HASH-PREFIX attribute.
133 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
134 (print_signed_with_hash_prefix): New function.
135 (print_unsigned_with_hash_prefix): New function.
136 * xc16x.cpu (dowh): New pmacro.
137 (upof16): Define with dowh, specify print handler.
138 (qbit, qlobit, qhibit): Ditto.
139 (upag16): Ditto.
140 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
141 (print_with_dot_prefix): New functions.
142 (print_with_pof_prefix, print_with_pag_prefix): New functions.
143
144 2010-01-24 Doug Evans <dje@sebabeach.org>
145
146 * frv.cpu (floating-point-conversion): Update call to fp conv op.
147 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
148 conditional-floating-point-conversion, ne-floating-point-conversion,
149 float-parallel-mul-add-double-semantics): Ditto.
150
151 2010-01-05 Doug Evans <dje@sebabeach.org>
152
153 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
154 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
155
156 2010-01-02 Doug Evans <dje@sebabeach.org>
157
158 * m32c.opc (parse_signed16): Fix typo.
159
160 2009-12-11 Nick Clifton <nickc@redhat.com>
161
162 * frv.opc: Fix shadowed variable warnings.
163 * m32c.opc: Fix shadowed variable warnings.
164
165 2009-11-14 Doug Evans <dje@sebabeach.org>
166
167 Must use VOID expression in VOID context.
168 * xc16x.cpu (mov4): Fix mode of `sequence'.
169 (mov9, mov10): Ditto.
170 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
171 (callr, callseg, calls, trap, rets, reti): Ditto.
172 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
173 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
174 (exts, exts1, extsr, extsr1, prior): Ditto.
175
176 2009-10-23 Doug Evans <dje@sebabeach.org>
177
178 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
179 cgen-ops.h -> cgen/basic-ops.h.
180
181 2009-09-25 Alan Modra <amodra@bigpond.net.au>
182
183 * m32r.cpu (stb-plus): Typo fix.
184
185 2009-09-23 Doug Evans <dje@sebabeach.org>
186
187 * m32r.cpu (sth-plus): Fix address mode and calculation.
188 (stb-plus): Ditto.
189 (clrpsw): Fix mask calculation.
190 (bset, bclr, btst): Make mode in bit calculation match expression.
191
192 * xc16x.cpu (rtl-version): Set to 0.8.
193 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
194 make uppercase. Remove unnecessary name-prefix spec.
195 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
196 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
197 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
198 (h-cr): New hardware.
199 (muls): Comment out parts that won't compile, add fixme.
200 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
201 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
202 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
203
204 2009-07-16 Doug Evans <dje@sebabeach.org>
205
206 * cpu/simplify.inc (*): One line doc strings don't need \n.
207 (df): Invoke define-full-ifield instead of claiming it's an alias.
208 (dno): Define.
209 (dnop): Mark as deprecated.
210
211 2009-06-22 Alan Modra <amodra@bigpond.net.au>
212
213 * m32c.opc (parse_lab_5_3): Use correct enum.
214
215 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
216
217 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
218 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
219 (media-arith-sat-semantics): Explicitly sign- or zero-extend
220 arguments of "operation" to DI using "mode" and the new pmacros.
221
222 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
223
224 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
225 of number 2, PID.
226
227 2008-12-23 Jon Beniston <jon@beniston.com>
228
229 * lm32.cpu: New file.
230 * lm32.opc: New file.
231
232 2008-01-29 Alan Modra <amodra@bigpond.net.au>
233
234 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
235 to source.
236
237 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
238
239 * cris.cpu (movs, movu): Use result of extension operation when
240 updating flags.
241
242 2007-07-04 Nick Clifton <nickc@redhat.com>
243
244 * cris.cpu: Update copyright notice to refer to GPLv3.
245 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
246 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
247 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
248 xc16x.opc: Likewise.
249 * iq2000.cpu: Fix copyright notice to refer to FSF.
250
251 2007-04-30 Mark Salter <msalter@sadr.localdomain>
252
253 * frv.cpu (spr-names): Support new coprocessor SPR registers.
254
255 2007-04-20 Nick Clifton <nickc@redhat.com>
256
257 * xc16x.cpu: Restore after accidentally overwriting this file with
258 xc16x.opc.
259
260 2007-03-29 DJ Delorie <dj@redhat.com>
261
262 * m32c.cpu (Imm-8-s4n): Fix print hook.
263 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
264 (arith-jnz-imm4-dst-defn): Make relaxable.
265 (arith-jnz16-imm4-dst-defn): Fix encodings.
266
267 2007-03-20 DJ Delorie <dj@redhat.com>
268
269 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
270 mem20): New.
271 (src16-16-20-An-relative-*): New.
272 (dst16-*-20-An-relative-*): New.
273 (dst16-16-16sa-*): New
274 (dst16-16-16ar-*): New
275 (dst32-16-16sa-Unprefixed-*): New
276 (jsri): Fix operands.
277 (setzx): Fix encoding.
278
279 2007-03-08 Alan Modra <amodra@bigpond.net.au>
280
281 * m32r.opc: Formatting.
282
283 2006-05-22 Nick Clifton <nickc@redhat.com>
284
285 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
286
287 2006-04-10 DJ Delorie <dj@redhat.com>
288
289 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
290 decides if this function accepts symbolic constants or not.
291 (parse_signed_bitbase): Likewise.
292 (parse_unsigned_bitbase8): Pass the new parameter.
293 (parse_unsigned_bitbase11): Likewise.
294 (parse_unsigned_bitbase16): Likewise.
295 (parse_unsigned_bitbase19): Likewise.
296 (parse_unsigned_bitbase27): Likewise.
297 (parse_signed_bitbase8): Likewise.
298 (parse_signed_bitbase11): Likewise.
299 (parse_signed_bitbase19): Likewise.
300
301 2006-03-13 DJ Delorie <dj@redhat.com>
302
303 * m32c.cpu (Bit3-S): New.
304 (btst:s): New.
305 * m32c.opc (parse_bit3_S): New.
306
307 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
308 (btst): Add optional :G suffix for MACH32.
309 (or.b:S): New.
310 (pop.w:G): Add optional :G suffix for MACH16.
311 (push.b.imm): Fix syntax.
312
313 2006-03-10 DJ Delorie <dj@redhat.com>
314
315 * m32c.cpu (mul.l): New.
316 (mulu.l): New.
317
318 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
319
320 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
321 an error message otherwise.
322 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
323 Fix up comments to correctly describe the functions.
324
325 2006-02-24 DJ Delorie <dj@redhat.com>
326
327 * m32c.cpu (RL_TYPE): New attribute, with macros.
328 (Lab-8-24): Add RELAX.
329 (unary-insn-defn-g, binary-arith-imm-dst-defn,
330 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
331 (binary-arith-src-dst-defn): Add 2ADDR attribute.
332 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
333 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
334 attribute.
335 (jsri16, jsri32): Add 1ADDR attribute.
336 (jsr32.w, jsr32.a): Add JUMP attribute.
337
338 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
339 Anil Paranjape <anilp1@kpitcummins.com>
340 Shilin Shakti <shilins@kpitcummins.com>
341
342 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
343 description.
344 * xc16x.opc: New file containing supporting XC16C routines.
345
346 2006-02-10 Nick Clifton <nickc@redhat.com>
347
348 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
349
350 2006-01-06 DJ Delorie <dj@redhat.com>
351
352 * m32c.cpu (mov.w:q): Fix mode.
353 (push32.b.imm): Likewise, for the comment.
354
355 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
356
357 Second part of ms1 to mt renaming.
358 * mt.cpu (define-arch, define-isa): Set name to mt.
359 (define-mach): Adjust.
360 * mt.opc (CGEN_ASM_HASH): Update.
361 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
362 (parse_loopsize, parse_imm16): Adjust.
363
364 2005-12-13 DJ Delorie <dj@redhat.com>
365
366 * m32c.cpu (jsri): Fix order so register names aren't treated as
367 symbols.
368 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
369 indexwd, indexws): Fix encodings.
370
371 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
372
373 * mt.cpu: Rename from ms1.cpu.
374 * mt.opc: Rename from ms1.opc.
375
376 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
377
378 * cris.cpu (simplecris-common-writable-specregs)
379 (simplecris-common-readable-specregs): Split from
380 simplecris-common-specregs. All users changed.
381 (cris-implemented-writable-specregs-v0)
382 (cris-implemented-readable-specregs-v0): Similar from
383 cris-implemented-specregs-v0.
384 (cris-implemented-writable-specregs-v3)
385 (cris-implemented-readable-specregs-v3)
386 (cris-implemented-writable-specregs-v8)
387 (cris-implemented-readable-specregs-v8)
388 (cris-implemented-writable-specregs-v10)
389 (cris-implemented-readable-specregs-v10)
390 (cris-implemented-writable-specregs-v32)
391 (cris-implemented-readable-specregs-v32): Similar.
392 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
393 insns and specializations.
394
395 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
396
397 Add ms2
398 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
399 model.
400 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
401 f-cb2incr, f-rc3): New fields.
402 (LOOP): New instruction.
403 (JAL-HAZARD): New hazard.
404 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
405 New operands.
406 (mul, muli, dbnz, iflush): Enable for ms2
407 (jal, reti): Has JAL-HAZARD.
408 (ldctxt, ldfb, stfb): Only ms1.
409 (fbcb): Only ms1,ms1-003.
410 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
411 fbcbincrs, mfbcbincrs): Enable for ms2.
412 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
413 * ms1.opc (parse_loopsize): New.
414 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
415 (print_pcrel): New.
416
417 2005-10-28 Dave Brolley <brolley@redhat.com>
418
419 Contribute the following change:
420 2003-09-24 Dave Brolley <brolley@redhat.com>
421
422 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
423 CGEN_ATTR_VALUE_TYPE.
424 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
425 Use cgen_bitset_intersect_p.
426
427 2005-10-27 DJ Delorie <dj@redhat.com>
428
429 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
430 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
431 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
432 imm operand is needed.
433 (adjnz, sbjnz): Pass the right operands.
434 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
435 unary-insn): Add -g variants for opcodes that need to support :G.
436 (not.BW:G, push.BW:G): Call it.
437 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
438 stzx16-imm8-imm8-abs16): Fix operand typos.
439 * m32c.opc (m32c_asm_hash): Support bnCND.
440 (parse_signed4n, print_signed4n): New.
441
442 2005-10-26 DJ Delorie <dj@redhat.com>
443
444 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
445 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
446 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
447 dsp8[sp] is signed.
448 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
449 (mov.BW:S r0,r1): Fix typo r1l->r1.
450 (tst): Allow :G suffix.
451 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
452
453 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
454
455 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
456
457 2005-10-25 DJ Delorie <dj@redhat.com>
458
459 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
460 making one a macro of the other.
461
462 2005-10-21 DJ Delorie <dj@redhat.com>
463
464 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
465 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
466 indexld, indexls): .w variants have `1' bit.
467 (rot32.b): QI, not SI.
468 (rot32.w): HI, not SI.
469 (xchg16): HI for .w variant.
470
471 2005-10-19 Nick Clifton <nickc@redhat.com>
472
473 * m32r.opc (parse_slo16): Fix bad application of previous patch.
474
475 2005-10-18 Andreas Schwab <schwab@suse.de>
476
477 * m32r.opc (parse_slo16): Better version of previous patch.
478
479 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
480
481 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
482 size.
483
484 2005-07-25 DJ Delorie <dj@redhat.com>
485
486 * m32c.opc (parse_unsigned8): Add %dsp8().
487 (parse_signed8): Add %hi8().
488 (parse_unsigned16): Add %dsp16().
489 (parse_signed16): Add %lo16() and %hi16().
490 (parse_lab_5_3): Make valuep a bfd_vma *.
491
492 2005-07-18 Nick Clifton <nickc@redhat.com>
493
494 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
495 components.
496 (f-lab32-jmp-s): Fix insertion sequence.
497 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
498 (Dsp-40-s8): Make parameter be signed.
499 (Dsp-40-s16): Likewise.
500 (Dsp-48-s8): Likewise.
501 (Dsp-48-s16): Likewise.
502 (Imm-13-u3): Likewise. (Despite its name!)
503 (BitBase16-16-s8): Make the parameter be unsigned.
504 (BitBase16-8-u11-S): Likewise.
505 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
506 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
507 relaxation.
508
509 * m32c.opc: Fix formatting.
510 Use safe-ctype.h instead of ctype.h
511 Move duplicated code sequences into a macro.
512 Fix compile time warnings about signedness mismatches.
513 Remove dead code.
514 (parse_lab_5_3): New parser function.
515
516 2005-07-16 Jim Blandy <jimb@redhat.com>
517
518 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
519 to represent isa sets.
520
521 2005-07-15 Jim Blandy <jimb@redhat.com>
522
523 * m32c.cpu, m32c.opc: Fix copyright.
524
525 2005-07-14 Jim Blandy <jimb@redhat.com>
526
527 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
528
529 2005-07-14 Alan Modra <amodra@bigpond.net.au>
530
531 * ms1.opc (print_dollarhex): Correct format string.
532
533 2005-07-06 Alan Modra <amodra@bigpond.net.au>
534
535 * iq2000.cpu: Include from binutils cpu dir.
536
537 2005-07-05 Nick Clifton <nickc@redhat.com>
538
539 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
540 unsigned in order to avoid compile time warnings about sign
541 conflicts.
542
543 * ms1.opc (parse_*): Likewise.
544 (parse_imm16): Use a "void *" as it is passed both signed and
545 unsigned arguments.
546
547 2005-07-01 Nick Clifton <nickc@redhat.com>
548
549 * frv.opc: Update to ISO C90 function declaration style.
550 * iq2000.opc: Likewise.
551 * m32r.opc: Likewise.
552 * sh.opc: Likewise.
553
554 2005-06-15 Dave Brolley <brolley@redhat.com>
555
556 Contributed by Red Hat.
557 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
558 * ms1.opc: New file. Written by Stan Cox.
559
560 2005-05-10 Nick Clifton <nickc@redhat.com>
561
562 * Update the address and phone number of the FSF organization in
563 the GPL notices in the following files:
564 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
565 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
566 sh64-media.cpu, simplify.inc
567
568 2005-02-24 Alan Modra <amodra@bigpond.net.au>
569
570 * frv.opc (parse_A): Warning fix.
571
572 2005-02-23 Nick Clifton <nickc@redhat.com>
573
574 * frv.opc: Fixed compile time warnings about differing signed'ness
575 of pointers passed to functions.
576 * m32r.opc: Likewise.
577
578 2005-02-11 Nick Clifton <nickc@redhat.com>
579
580 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
581 'bfd_vma *' in order avoid compile time warning message.
582
583 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
584
585 * cris.cpu (mstep): Add missing insn.
586
587 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
588
589 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
590 * frv.cpu: Add support for TLS annotations in loads and calll.
591 * frv.opc (parse_symbolic_address): New.
592 (parse_ldd_annotation): New.
593 (parse_call_annotation): New.
594 (parse_ld_annotation): New.
595 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
596 Introduce TLS relocations.
597 (parse_d12, parse_s12, parse_u12): Likewise.
598 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
599 (parse_call_label, print_at): New.
600
601 2004-12-21 Mikael Starvik <starvik@axis.com>
602
603 * cris.cpu (cris-set-mem): Correct integral write semantics.
604
605 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
606
607 * cris.cpu: New file.
608
609 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
610
611 * iq2000.cpu: Added quotes around macro arguments so that they
612 will work with newer versions of guile.
613
614 2004-10-27 Nick Clifton <nickc@redhat.com>
615
616 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
617 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
618 operand.
619 * iq2000.cpu (dnop index): Rename to _index to avoid complications
620 with guile.
621
622 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
623
624 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
625
626 2004-05-15 Nick Clifton <nickc@redhat.com>
627
628 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
629
630 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
631
632 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
633
634 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
635
636 * frv.cpu (define-arch frv): Add fr450 mach.
637 (define-mach fr450): New.
638 (define-model fr450): New. Add profile units to every fr450 insn.
639 (define-attr UNIT): Add MDCUTSSI.
640 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
641 (define-attr AUDIO): New boolean.
642 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
643 (f-LRA-null, f-TLBPR-null): New fields.
644 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
645 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
646 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
647 (LRA-null, TLBPR-null): New macros.
648 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
649 (load-real-address): New macro.
650 (lrai, lrad, tlbpr): New instructions.
651 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
652 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
653 (mdcutssi): Change UNIT attribute to MDCUTSSI.
654 (media-low-clear-semantics, media-scope-limit-semantics)
655 (media-quad-limit, media-quad-shift): New macros.
656 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
657 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
658 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
659 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
660 (fr450_unit_mapping): New array.
661 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
662 for new MDCUTSSI unit.
663 (fr450_check_insn_major_constraints): New function.
664 (check_insn_major_constraints): Use it.
665
666 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
667
668 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
669 (scutss): Change unit to I0.
670 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
671 (mqsaths): Fix FR400-MAJOR categorization.
672 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
673 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
674 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
675 combinations.
676
677 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
678
679 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
680 (rstb, rsth, rst, rstd, rstq): Delete.
681 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
682
683 2004-02-23 Nick Clifton <nickc@redhat.com>
684
685 * Apply these patches from Renesas:
686
687 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
688
689 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
690 disassembling codes for 0x*2 addresses.
691
692 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
693
694 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
695
696 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
697
698 * cpu/m32r.cpu : Add new model m32r2.
699 Add new instructions.
700 Replace occurrances of 'Mitsubishi' with 'Renesas'.
701 Changed PIPE attr of push from O to OS.
702 Care for Little-endian of M32R.
703 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
704 Care for Little-endian of M32R.
705 (parse_slo16): signed extension for value.
706
707 2004-02-20 Andrew Cagney <cagney@redhat.com>
708
709 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
710 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
711
712 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
713 written by Ben Elliston.
714
715 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
716
717 * frv.cpu (UNIT): Add IACC.
718 (iacc-multiply-r-r): Use it.
719 * frv.opc (fr400_unit_mapping): Add entry for IACC.
720 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
721
722 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
723
724 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
725 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
726 cut&paste errors in shifting/truncating numerical operands.
727 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
728 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
729 (parse_uslo16): Likewise.
730 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
731 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
732 (parse_s12): Likewise.
733 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
734 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
735 (parse_uslo16): Likewise.
736 (parse_uhi16): Parse gothi and gotfuncdeschi.
737 (parse_d12): Parse got12 and gotfuncdesc12.
738 (parse_s12): Likewise.
739
740 2003-10-10 Dave Brolley <brolley@redhat.com>
741
742 * frv.cpu (dnpmop): New p-macro.
743 (GRdoublek): Use dnpmop.
744 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
745 (store-double-r-r): Use (.sym regtype doublek).
746 (r-store-double): Ditto.
747 (store-double-r-r-u): Ditto.
748 (conditional-store-double): Ditto.
749 (conditional-store-double-u): Ditto.
750 (store-double-r-simm): Ditto.
751 (fmovs): Assign to UNIT FMALL.
752
753 2003-10-06 Dave Brolley <brolley@redhat.com>
754
755 * frv.cpu, frv.opc: Add support for fr550.
756
757 2003-09-24 Dave Brolley <brolley@redhat.com>
758
759 * frv.cpu (u-commit): New modelling unit for fr500.
760 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
761 (commit-r): Use u-commit model for fr500.
762 (commit): Ditto.
763 (conditional-float-binary-op): Take profiling data as an argument.
764 Update callers.
765 (ne-float-binary-op): Ditto.
766
767 2003-09-19 Michael Snyder <msnyder@redhat.com>
768
769 * frv.cpu (nldqi): Delete unimplemented instruction.
770
771 2003-09-12 Dave Brolley <brolley@redhat.com>
772
773 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
774 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
775 frv_ref_SI to get input register referenced for profiling.
776 (clear-ne-flag-all): Pass insn profiling in as an argument.
777 (clrgr,clrfr,clrga,clrfa): Add profiling information.
778
779 2003-09-11 Michael Snyder <msnyder@redhat.com>
780
781 * frv.cpu: Typographical corrections.
782
783 2003-09-09 Dave Brolley <brolley@redhat.com>
784
785 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
786 (conditional-media-dual-complex, media-quad-complex): Likewise.
787
788 2003-09-04 Dave Brolley <brolley@redhat.com>
789
790 * frv.cpu (register-transfer): Pass in all attributes in on argument.
791 Update all callers.
792 (conditional-register-transfer): Ditto.
793 (cache-preload): Ditto.
794 (floating-point-conversion): Ditto.
795 (floating-point-neg): Ditto.
796 (float-abs): Ditto.
797 (float-binary-op-s): Ditto.
798 (conditional-float-binary-op): Ditto.
799 (ne-float-binary-op): Ditto.
800 (float-dual-arith): Ditto.
801 (ne-float-dual-arith): Ditto.
802
803 2003-09-03 Dave Brolley <brolley@redhat.com>
804
805 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
806 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
807 MCLRACC-1.
808 (A): Removed operand.
809 (A0,A1): New operands replace operand A.
810 (mnop): Now a real insn
811 (mclracc): Removed insn.
812 (mclracc-0, mclracc-1): New insns replace mclracc.
813 (all insns): Use new UNIT attributes.
814
815 2003-08-21 Nick Clifton <nickc@redhat.com>
816
817 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
818 and u-media-dual-btoh with output parameter.
819 (cmbtoh): Add profiling hack.
820
821 2003-08-19 Michael Snyder <msnyder@redhat.com>
822
823 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
824
825 2003-06-10 Doug Evans <dje@sebabeach.org>
826
827 * frv.cpu: Add IDOC attribute.
828
829 2003-06-06 Andrew Cagney <cagney@redhat.com>
830
831 Contributed by Red Hat.
832 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
833 Stan Cox, and Frank Ch. Eigler.
834 * iq2000.opc: New file. Written by Ben Elliston, Frank
835 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
836 * iq2000m.cpu: New file. Written by Jeff Johnston.
837 * iq10.cpu: New file. Written by Jeff Johnston.
838
839 2003-06-05 Nick Clifton <nickc@redhat.com>
840
841 * frv.cpu (FRintieven): New operand. An even-numbered only
842 version of the FRinti operand.
843 (FRintjeven): Likewise for FRintj.
844 (FRintkeven): Likewise for FRintk.
845 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
846 media-quad-arith-sat-semantics, media-quad-arith-sat,
847 conditional-media-quad-arith-sat, mdunpackh,
848 media-quad-multiply-semantics, media-quad-multiply,
849 conditional-media-quad-multiply, media-quad-complex-i,
850 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
851 conditional-media-quad-multiply-acc, munpackh,
852 media-quad-multiply-cross-acc-semantics, mdpackh,
853 media-quad-multiply-cross-acc, mbtoh-semantics,
854 media-quad-cross-multiply-cross-acc-semantics,
855 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
856 media-quad-cross-multiply-acc-semantics, cmbtoh,
857 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
858 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
859 cmhtob): Use new operands.
860 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
861 (parse_even_register): New function.
862
863 2003-06-03 Nick Clifton <nickc@redhat.com>
864
865 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
866 immediate value not unsigned.
867
868 2003-06-03 Andrew Cagney <cagney@redhat.com>
869
870 Contributed by Red Hat.
871 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
872 and Eric Christopher.
873 * frv.opc: New file. Written by Catherine Moore, and Dave
874 Brolley.
875 * simplify.inc: New file. Written by Doug Evans.
876
877 2003-05-02 Andrew Cagney <cagney@redhat.com>
878
879 * New file.
880
881 \f
882 Copyright (C) 2003-2012 Free Software Foundation, Inc.
883
884 Copying and distribution of this file, with or without modification,
885 are permitted in any medium without royalty provided the copyright
886 notice and this notice are preserved.
887
888 Local Variables:
889 mode: change-log
890 left-margin: 8
891 fill-column: 74
892 version-control: never
893 End:
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