cpu/ChangeLog

   1 2020-05-19  Stafford Horne  <shorne@gmail.com>
   2
   3         PR 25184
   4         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
   5         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
   6         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
   7         * or1kcommon.cpu (h-fdr): Remove hardware.
   8         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
   9         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
  10         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
  11         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
  12         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
  13
  14 2020-02-16  David Faust  <david.faust@oracle.com>
  15
  16         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
  17         (dcji) New version with support for JMP32
  18
  19 2020-02-03  Alan Modra  <amodra@gmail.com>
  20
  21         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
  22
  23 2020-02-01  Alan Modra  <amodra@gmail.com>
  24
  25         * frv.cpu (f-u12): Multiply rather than left shift signed values.
  26         (f-label16, f-label24): Likewise.
  27
  28 2020-01-30  Alan Modra  <amodra@gmail.com>
  29
  30         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
  31         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
  32         (f-dst32-rn-prefixed-QI): Likewise.
  33         (f-dsp-32-s32): Mask before shifting left.
  34         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
  35         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
  36         shifting left.
  37         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
  38         (h-gr-SI): Mask before shifting.
  39
  40 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  41
  42         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
  43         (neg and neg32) use OP_SRC_K even if they operate only in
  44         registers.
  45
  46 2020-01-18  Nick Clifton  <nickc@redhat.com>
  47
  48         Binutils 2.34 branch created.
  49
  50 2020-01-13  Alan Modra  <amodra@gmail.com>
  51
  52         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
  53         left shift signed values.
  54
  55 2020-01-06  Alan Modra  <amodra@gmail.com>
  56
  57         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
  58         bits before shifting rather than masking after shifting.
  59         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
  60         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
  61         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
  62         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
  63
  64 2020-01-04  Alan Modra  <amodra@gmail.com>
  65
  66         * m32r.cpu (f-disp8): Avoid left shift of negative values.
  67         (f-disp16, f-disp24): Likewise.
  68
  69 2019-12-23  Alan Modra  <amodra@gmail.com>
  70
  71         * iq2000.cpu (f-offset): Avoid left shift of negative values.
  72
  73 2019-12-20  Alan Modra  <amodra@gmail.com>
  74
  75         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
  76
  77 2019-12-17  Alan Modra  <amodra@gmail.com>
  78
  79         * bpf.cpu (f-imm64): Avoid signed overflow.
  80
  81 2019-12-16  Alan Modra  <amodra@gmail.com>
  82
  83         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
  84
  85 2019-12-11  Alan Modra  <amodra@gmail.com>
  86
  87         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
  88         * lm32.cpu (f-branch, f-vall): Likewise.
  89         * m32.cpu (f-lab-8-16): Likewise.
  90
  91 2019-12-11  Alan Modra  <amodra@gmail.com>
  92
  93         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
  94         shift left to avoid UB on left shift of negative values.
  95
  96 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
  97
  98         * bpf.cpu: Fix comment describing the 128-bit instruction format.
  99
 100 2019-09-09  Phil Blundell  <pb@pbcl.net>
 101
 102         binutils 2.33 branch created.
 103
 104 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 105
 106         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 107         %a and %ctx.
 108
 109 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 110
 111         * bpf.cpu (dlabs): New pmacro.
 112         (dlind): Likewise.
 113
 114 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 115
 116         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 117         explicit 'dst' argument.
 118
 119 2019-06-13  Stafford Horne  <shorne@gmail.com>
 120
 121         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 122
 123 2019-06-13  Stafford Horne  <shorne@gmail.com>
 124
 125         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 126         (l-adrp): Improve comment.
 127
 128 2019-06-13  Stafford Horne  <shorne@gmail.com>
 129
 130         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 131         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 132         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 133         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 134         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 135         float-setflag-unordered-symantics): New pmacro for instruction
 136         symantics.
 137         (float-setflag-insn): Update to use float-setflag-insn-base.
 138         (float-setflag-unordered-insn): New pmacro for generating instructions.
 139
 140 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 141             Stafford Horne  <shorne@gmail.com>
 142
 143         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 144         (ORFPX-MACHS): Removed pmacro.
 145         * or1k.opc (or1k_cgen_insn_supported): New function.
 146         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 147         (parse_regpair, print_regpair): New functions.
 148         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 149         and add comments.
 150         (h-fdr): Update comment to indicate or64.
 151         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 152         (h-fd32r): New hardware for 64-bit fpu registers.
 153         (h-i64r): New hardware for 64-bit int registers.
 154         * or1korbis.cpu (f-resv-8-1): New field.
 155         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 156         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 157         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 158         (h-roff1): New hardware.
 159         (double-field-and-ops mnemonic): New pmacro to generate operations
 160         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 161         (float-regreg-insn): Update single precision generator to MACH
 162         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 163         (float-setflag-insn): Update single precision generator to MACH
 164         ORFPX32-MACHS.  Fix double instructions from single to double
 165         precision.  Add generator for or32 64-bit instructions.
 166         (float-cust-insn cust-num): Update single precision generator to MACH
 167         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 168         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 169         ORFPX32-MACHS.
 170         (lf-rem-d): Fix operation from mod to rem.
 171         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 172         (lf-itof-d): Fix operands from single to double.
 173         (lf-ftoi-d): Update operand mode from DI to WI.
 174
 175 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 176
 177         * bpf.cpu: New file.
 178         * bpf.opc: Likewise.
 179
 180 2018-06-24  Nick Clifton  <nickc@redhat.com>
 181
 182         2.32 branch created.
 183
 184 2018-10-05  Richard Henderson  <rth@twiddle.net>
 185             Stafford Horne  <shorne@gmail.com>
 186
 187         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 188         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 189         (l-mul): Fix overflow support and indentation.
 190         (l-mulu): Fix overflow support and indentation.
 191         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 192         (l-div); Remove incorrect carry behavior.
 193         (l-divu): Fix carry and overflow behavior.
 194         (l-mac): Add overflow support.
 195         (l-msb, l-msbu): Add carry and overflow support.
 196
 197 2018-10-05  Richard Henderson  <rth@twiddle.net>
 198
 199         * or1k.opc (parse_disp26): Add support for plta() relocations.
 200         (parse_disp21): New function.
 201         (or1k_rclass): New enum.
 202         (or1k_rtype): New enum.
 203         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 204         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 205         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 206         * or1korbis.cpu (f-disp26): Don't assume SI.
 207         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 208         (insn-opcode): Add ADRP.
 209         (l-adrp): New instruction.
 210
 211 2018-10-05  Richard Henderson  <rth@twiddle.net>
 212
 213         * or1k.opc: Add RTYPE_ enum.
 214         (INVALID_STORE_RELOC): New string.
 215         (or1k_imm16_relocs): New array array.
 216         (parse_reloc): New static function that just does the parsing.
 217         (parse_imm16): New static function for generic parsing.
 218         (parse_simm16): Change to just call parse_imm16.
 219         (parse_simm16_split): New function.
 220         (parse_uimm16): Change to call parse_imm16.
 221         (parse_uimm16_split): New function.
 222         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 223         (uimm16-split): Change to use new uimm16_split.
 224
 225 2018-07-24  Alan Modra  <amodra@gmail.com>
 226
 227         PR 23430
 228         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 229
 230 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 231
 232         * or1kcommon.cpu (spr-reg-info): Typo fix.
 233
 234 2018-03-03  Alan Modra  <amodra@gmail.com>
 235
 236         * frv.opc: Include opintl.h.
 237         (add_next_to_vliw): Use opcodes_error_handler to print error.
 238         Standardize error message.
 239         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 240
 241 2018-01-13  Nick Clifton  <nickc@redhat.com>
 242
 243         2.30 branch created.
 244
 245 2017-03-15  Stafford Horne  <shorne@gmail.com>
 246
 247         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 248
 249 2016-10-06  Alan Modra  <amodra@gmail.com>
 250
 251         * mep.opc (expand_string): Add fall through comment.
 252
 253 2016-03-03  Alan Modra  <amodra@gmail.com>
 254
 255         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 256         at what is really going on.
 257
 258 2016-03-02  Alan Modra  <amodra@gmail.com>
 259
 260         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 261
 262 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 263
 264         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 265         a constant to better align disassembler output.
 266
 267 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 268
 269         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 270
 271 2014-06-12  Alan Modra  <amodra@gmail.com>
 272
 273         * or1k.opc: Whitespace fixes.
 274
 275 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 276
 277         * or1korbis.cpu (h-atomic-reserve): New hardware.
 278         (h-atomic-address): Likewise.
 279         (insn-opcode): Add opcodes for LWA and SWA.
 280         (atomic-reserve): New operand.
 281         (atomic-address): Likewise.
 282         (l-lwa, l-swa): New instructions.
 283         (l-lbs): Fix typo in comment.
 284         (store-insn): Clear atomic reserve on store to atomic-address.
 285         Fix register names in fmt field.
 286
 287 2014-04-22  Christian Svensson  <blue@cmd.nu>
 288
 289         * openrisc.cpu: Delete.
 290         * openrisc.opc: Delete.
 291         * or1k.cpu: New file.
 292         * or1k.opc: New file.
 293         * or1kcommon.cpu: New file.
 294         * or1korbis.cpu: New file.
 295         * or1korfpx.cpu: New file.
 296
 297 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 298
 299         * epiphany.opc: Remove +x file mode.
 300
 301 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 302
 303         PR binutils/15241
 304         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 305         TLBVADDR, TLBPADDR and TLBBADVADDR.
 306
 307 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 308             Joern Rennecke  <joern.rennecke@embecosm.com>
 309
 310         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 311         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 312         (testset-insn): Add NO_DIS attribute to t.l.
 313         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 314         (move-insns): Add NO-DIS attribute to cmov.l.
 315         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 316         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 317         (op-rrr): Add NO-DIS attribute to .l.
 318         (shift-rrr): Add NO-DIS attribute to .l.
 319         (op-shift-rri): Add NO-DIS attribute to i32.l.
 320         (bitrl, movtl): Add NO-DIS attribute.
 321         (op-iextrrr): Add NO-DIS attribute to .l
 322         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 323         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 324
 325 2012-02-27  Alan Modra  <amodra@gmail.com>
 326
 327         * mt.opc (print_dollarhex): Trim values to 32 bits.
 328
 329 2011-12-15  Nick Clifton  <nickc@redhat.com>
 330
 331         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 332         hosts.
 333
 334 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 335
 336         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 337         Cast value before printing it as a long.
 338         (parse_postindex): Fix type of valuep.
 339
 340 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 341
 342         * cpu/epiphany.cpu: New file.
 343         * cpu/epiphany.opc: New file.
 344
 345 2011-08-22  Nick Clifton  <nickc@redhat.com>
 346
 347         * fr30.cpu: Newly contributed file.
 348         * fr30.opc: Likewise.
 349         * ip2k.cpu: Likewise.
 350         * ip2k.opc: Likewise.
 351         * mep-avc.cpu: Likewise.
 352         * mep-avc2.cpu: Likewise.
 353         * mep-c5.cpu: Likewise.
 354         * mep-core.cpu: Likewise.
 355         * mep-default.cpu: Likewise.
 356         * mep-ext-cop.cpu: Likewise.
 357         * mep-fmax.cpu: Likewise.
 358         * mep-h1.cpu: Likewise.
 359         * mep-ivc2.cpu: Likewise.
 360         * mep-rhcop.cpu: Likewise.
 361         * mep-sample-ucidsp.cpu: Likewise.
 362         * mep.cpu: Likewise.
 363         * mep.opc: Likewise.
 364         * openrisc.cpu: Likewise.
 365         * openrisc.opc: Likewise.
 366         * xstormy16.cpu: Likewise.
 367         * xstormy16.opc: Likewise.
 368
 369 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 370
 371         * frv.opc: #undef DEBUG.
 372
 373 2010-07-03  DJ Delorie  <dj@delorie.com>
 374
 375         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 376
 377 2010-02-11  Doug Evans  <dje@sebabeach.org>
 378
 379         * m32r.cpu (HASH-PREFIX): Delete.
 380         (duhpo, dshpo): New pmacros.
 381         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 382         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 383         attribute, define with dshpo.
 384         (uimm24): Delete HASH-PREFIX attribute.
 385         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 386         (print_signed_with_hash_prefix): New function.
 387         (print_unsigned_with_hash_prefix): New function.
 388         * xc16x.cpu (dowh): New pmacro.
 389         (upof16): Define with dowh, specify print handler.
 390         (qbit, qlobit, qhibit): Ditto.
 391         (upag16): Ditto.
 392         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 393         (print_with_dot_prefix): New functions.
 394         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 395
 396 2010-01-24  Doug Evans  <dje@sebabeach.org>
 397
 398         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 399         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 400         conditional-floating-point-conversion, ne-floating-point-conversion,
 401         float-parallel-mul-add-double-semantics): Ditto.
 402
 403 2010-01-05  Doug Evans  <dje@sebabeach.org>
 404
 405         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 406         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 407
 408 2010-01-02  Doug Evans  <dje@sebabeach.org>
 409
 410         * m32c.opc (parse_signed16): Fix typo.
 411
 412 2009-12-11  Nick Clifton  <nickc@redhat.com>
 413
 414         * frv.opc: Fix shadowed variable warnings.
 415         * m32c.opc: Fix shadowed variable warnings.
 416
 417 2009-11-14  Doug Evans  <dje@sebabeach.org>
 418
 419         Must use VOID expression in VOID context.
 420         * xc16x.cpu (mov4): Fix mode of `sequence'.
 421         (mov9, mov10): Ditto.
 422         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 423         (callr, callseg, calls, trap, rets, reti): Ditto.
 424         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 425         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 426         (exts, exts1, extsr, extsr1, prior): Ditto.
 427
 428 2009-10-23  Doug Evans  <dje@sebabeach.org>
 429
 430         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 431         cgen-ops.h -> cgen/basic-ops.h.
 432
 433 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 434
 435         * m32r.cpu (stb-plus): Typo fix.
 436
 437 2009-09-23  Doug Evans  <dje@sebabeach.org>
 438
 439         * m32r.cpu (sth-plus): Fix address mode and calculation.
 440         (stb-plus): Ditto.
 441         (clrpsw): Fix mask calculation.
 442         (bset, bclr, btst): Make mode in bit calculation match expression.
 443
 444         * xc16x.cpu (rtl-version): Set to 0.8.
 445         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 446         make uppercase.  Remove unnecessary name-prefix spec.
 447         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 448         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 449         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 450         (h-cr): New hardware.
 451         (muls): Comment out parts that won't compile, add fixme.
 452         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 453         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 454         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 455
 456 2009-07-16  Doug Evans  <dje@sebabeach.org>
 457
 458         * cpu/simplify.inc (*): One line doc strings don't need \n.
 459         (df): Invoke define-full-ifield instead of claiming it's an alias.
 460         (dno): Define.
 461         (dnop): Mark as deprecated.
 462
 463 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 464
 465         * m32c.opc (parse_lab_5_3): Use correct enum.
 466
 467 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 468
 469         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 470         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 471         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 472         arguments of "operation" to DI using "mode" and the new pmacros.
 473
 474 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 475
 476         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 477         of number 2, PID.
 478
 479 2008-12-23  Jon Beniston <jon@beniston.com>
 480
 481         * lm32.cpu: New file.
 482         * lm32.opc: New file.
 483
 484 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 485
 486         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 487         to source.
 488
 489 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 490
 491         * cris.cpu (movs, movu): Use result of extension operation when
 492         updating flags.
 493
 494 2007-07-04  Nick Clifton  <nickc@redhat.com>
 495
 496         * cris.cpu: Update copyright notice to refer to GPLv3.
 497         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 498         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 499         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 500         xc16x.opc: Likewise.
 501         * iq2000.cpu: Fix copyright notice to refer to FSF.
 502
 503 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 504
 505         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 506
 507 2007-04-20  Nick Clifton  <nickc@redhat.com>
 508
 509         * xc16x.cpu: Restore after accidentally overwriting this file with
 510         xc16x.opc.
 511
 512 2007-03-29  DJ Delorie  <dj@redhat.com>
 513
 514         * m32c.cpu (Imm-8-s4n): Fix print hook.
 515         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 516         (arith-jnz-imm4-dst-defn): Make relaxable.
 517         (arith-jnz16-imm4-dst-defn): Fix encodings.
 518
 519 2007-03-20  DJ Delorie  <dj@redhat.com>
 520
 521         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 522         mem20): New.
 523         (src16-16-20-An-relative-*): New.
 524         (dst16-*-20-An-relative-*): New.
 525         (dst16-16-16sa-*): New
 526         (dst16-16-16ar-*): New
 527         (dst32-16-16sa-Unprefixed-*): New
 528         (jsri): Fix operands.
 529         (setzx): Fix encoding.
 530
 531 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 532
 533         * m32r.opc: Formatting.
 534
 535 2006-05-22  Nick Clifton  <nickc@redhat.com>
 536
 537         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 538
 539 2006-04-10  DJ Delorie  <dj@redhat.com>
 540
 541         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 542         decides if this function accepts symbolic constants or not.
 543         (parse_signed_bitbase): Likewise.
 544         (parse_unsigned_bitbase8): Pass the new parameter.
 545         (parse_unsigned_bitbase11): Likewise.
 546         (parse_unsigned_bitbase16): Likewise.
 547         (parse_unsigned_bitbase19): Likewise.
 548         (parse_unsigned_bitbase27): Likewise.
 549         (parse_signed_bitbase8): Likewise.
 550         (parse_signed_bitbase11): Likewise.
 551         (parse_signed_bitbase19): Likewise.
 552
 553 2006-03-13  DJ Delorie  <dj@redhat.com>
 554
 555         * m32c.cpu (Bit3-S): New.
 556         (btst:s): New.
 557         * m32c.opc (parse_bit3_S): New.
 558
 559         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 560         (btst): Add optional :G suffix for MACH32.
 561         (or.b:S): New.
 562         (pop.w:G): Add optional :G suffix for MACH16.
 563         (push.b.imm): Fix syntax.
 564
 565 2006-03-10  DJ Delorie  <dj@redhat.com>
 566
 567         * m32c.cpu (mul.l): New.
 568         (mulu.l): New.
 569
 570 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 571
 572         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 573         an error message otherwise.
 574         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 575         Fix up comments to correctly describe the functions.
 576
 577 2006-02-24  DJ Delorie  <dj@redhat.com>
 578
 579         * m32c.cpu (RL_TYPE): New attribute, with macros.
 580         (Lab-8-24): Add RELAX.
 581         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 582         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 583         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 584         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 585         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 586         attribute.
 587         (jsri16, jsri32): Add 1ADDR attribute.
 588         (jsr32.w, jsr32.a): Add JUMP attribute.
 589
 590 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 591             Anil Paranjape   <anilp1@kpitcummins.com>
 592             Shilin Shakti    <shilins@kpitcummins.com>
 593
 594         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 595         description.
 596         * xc16x.opc: New file containing supporting XC16C routines.
 597
 598 2006-02-10  Nick Clifton  <nickc@redhat.com>
 599
 600         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 601
 602 2006-01-06  DJ Delorie  <dj@redhat.com>
 603
 604         * m32c.cpu (mov.w:q): Fix mode.
 605         (push32.b.imm): Likewise, for the comment.
 606
 607 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 608
 609         Second part of ms1 to mt renaming.
 610         * mt.cpu (define-arch, define-isa): Set name to mt.
 611         (define-mach): Adjust.
 612         * mt.opc (CGEN_ASM_HASH): Update.
 613         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 614         (parse_loopsize, parse_imm16): Adjust.
 615
 616 2005-12-13  DJ Delorie  <dj@redhat.com>
 617
 618         * m32c.cpu (jsri): Fix order so register names aren't treated as
 619         symbols.
 620         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 621         indexwd, indexws): Fix encodings.
 622
 623 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 624
 625         * mt.cpu: Rename from ms1.cpu.
 626         * mt.opc: Rename from ms1.opc.
 627
 628 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 629
 630         * cris.cpu (simplecris-common-writable-specregs)
 631         (simplecris-common-readable-specregs): Split from
 632         simplecris-common-specregs.  All users changed.
 633         (cris-implemented-writable-specregs-v0)
 634         (cris-implemented-readable-specregs-v0): Similar from
 635         cris-implemented-specregs-v0.
 636         (cris-implemented-writable-specregs-v3)
 637         (cris-implemented-readable-specregs-v3)
 638         (cris-implemented-writable-specregs-v8)
 639         (cris-implemented-readable-specregs-v8)
 640         (cris-implemented-writable-specregs-v10)
 641         (cris-implemented-readable-specregs-v10)
 642         (cris-implemented-writable-specregs-v32)
 643         (cris-implemented-readable-specregs-v32): Similar.
 644         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 645         insns and specializations.
 646
 647 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 648
 649         Add ms2
 650         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 651         model.
 652         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 653         f-cb2incr, f-rc3): New fields.
 654         (LOOP): New instruction.
 655         (JAL-HAZARD): New hazard.
 656         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 657         New operands.
 658         (mul, muli, dbnz, iflush): Enable for ms2
 659         (jal, reti): Has JAL-HAZARD.
 660         (ldctxt, ldfb, stfb): Only ms1.
 661         (fbcb): Only ms1,ms1-003.
 662         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 663         fbcbincrs, mfbcbincrs): Enable for ms2.
 664         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 665         * ms1.opc (parse_loopsize): New.
 666         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 667         (print_pcrel): New.
 668
 669 2005-10-28  Dave Brolley  <brolley@redhat.com>
 670
 671         Contribute the following change:
 672         2003-09-24  Dave Brolley  <brolley@redhat.com>
 673
 674         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 675         CGEN_ATTR_VALUE_TYPE.
 676         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 677         Use cgen_bitset_intersect_p.
 678
 679 2005-10-27  DJ Delorie  <dj@redhat.com>
 680
 681         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 682         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 683         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 684         imm operand is needed.
 685         (adjnz, sbjnz): Pass the right operands.
 686         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 687         unary-insn): Add -g variants for opcodes that need to support :G.
 688         (not.BW:G, push.BW:G): Call it.
 689         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 690         stzx16-imm8-imm8-abs16): Fix operand typos.
 691         * m32c.opc (m32c_asm_hash): Support bnCND.
 692         (parse_signed4n, print_signed4n): New.
 693
 694 2005-10-26  DJ Delorie  <dj@redhat.com>
 695
 696         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 697         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 698         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 699         dsp8[sp] is signed.
 700         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 701         (mov.BW:S r0,r1): Fix typo r1l->r1.
 702         (tst): Allow :G suffix.
 703         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 704
 705 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 706
 707         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 708
 709 2005-10-25  DJ Delorie  <dj@redhat.com>
 710
 711         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 712         making one a macro of the other.
 713
 714 2005-10-21  DJ Delorie  <dj@redhat.com>
 715
 716         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 717         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 718         indexld, indexls): .w variants have `1' bit.
 719         (rot32.b): QI, not SI.
 720         (rot32.w): HI, not SI.
 721         (xchg16): HI for .w variant.
 722
 723 2005-10-19  Nick Clifton  <nickc@redhat.com>
 724
 725         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 726
 727 2005-10-18  Andreas Schwab  <schwab@suse.de>
 728
 729         * m32r.opc (parse_slo16): Better version of previous patch.
 730
 731 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 732
 733         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 734         size.
 735
 736 2005-07-25  DJ Delorie  <dj@redhat.com>
 737
 738         * m32c.opc (parse_unsigned8): Add %dsp8().
 739         (parse_signed8): Add %hi8().
 740         (parse_unsigned16): Add %dsp16().
 741         (parse_signed16): Add %lo16() and %hi16().
 742         (parse_lab_5_3): Make valuep a bfd_vma *.
 743
 744 2005-07-18  Nick Clifton  <nickc@redhat.com>
 745
 746         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 747         components.
 748         (f-lab32-jmp-s): Fix insertion sequence.
 749         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 750         (Dsp-40-s8): Make parameter be signed.
 751         (Dsp-40-s16): Likewise.
 752         (Dsp-48-s8): Likewise.
 753         (Dsp-48-s16): Likewise.
 754         (Imm-13-u3): Likewise. (Despite its name!)
 755         (BitBase16-16-s8): Make the parameter be unsigned.
 756         (BitBase16-8-u11-S): Likewise.
 757         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 758         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 759         relaxation.
 760
 761         * m32c.opc: Fix formatting.
 762         Use safe-ctype.h instead of ctype.h
 763         Move duplicated code sequences into a macro.
 764         Fix compile time warnings about signedness mismatches.
 765         Remove dead code.
 766         (parse_lab_5_3): New parser function.
 767
 768 2005-07-16  Jim Blandy  <jimb@redhat.com>
 769
 770         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 771         to represent isa sets.
 772
 773 2005-07-15  Jim Blandy  <jimb@redhat.com>
 774
 775         * m32c.cpu, m32c.opc: Fix copyright.
 776
 777 2005-07-14  Jim Blandy  <jimb@redhat.com>
 778
 779         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 780
 781 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 782
 783         * ms1.opc (print_dollarhex): Correct format string.
 784
 785 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 786
 787         * iq2000.cpu: Include from binutils cpu dir.
 788
 789 2005-07-05  Nick Clifton  <nickc@redhat.com>
 790
 791         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 792         unsigned in order to avoid compile time warnings about sign
 793         conflicts.
 794
 795         * ms1.opc (parse_*): Likewise.
 796         (parse_imm16): Use a "void *" as it is passed both signed and
 797         unsigned arguments.
 798
 799 2005-07-01  Nick Clifton  <nickc@redhat.com>
 800
 801         * frv.opc: Update to ISO C90 function declaration style.
 802         * iq2000.opc: Likewise.
 803         * m32r.opc: Likewise.
 804         * sh.opc: Likewise.
 805
 806 2005-06-15  Dave Brolley  <brolley@redhat.com>
 807
 808         Contributed by Red Hat.
 809         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 810         * ms1.opc: New file.  Written by Stan Cox.
 811
 812 2005-05-10  Nick Clifton  <nickc@redhat.com>
 813
 814         * Update the address and phone number of the FSF organization in
 815         the GPL notices in the following files:
 816         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 817         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 818         sh64-media.cpu, simplify.inc
 819
 820 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 821
 822         * frv.opc (parse_A): Warning fix.
 823
 824 2005-02-23  Nick Clifton  <nickc@redhat.com>
 825
 826         * frv.opc: Fixed compile time warnings about differing signed'ness
 827         of pointers passed to functions.
 828         * m32r.opc: Likewise.
 829
 830 2005-02-11  Nick Clifton  <nickc@redhat.com>
 831
 832         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 833         'bfd_vma *' in order avoid compile time warning message.
 834
 835 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 836
 837         * cris.cpu (mstep): Add missing insn.
 838
 839 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 840
 841         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 842         * frv.cpu: Add support for TLS annotations in loads and calll.
 843         * frv.opc (parse_symbolic_address): New.
 844         (parse_ldd_annotation): New.
 845         (parse_call_annotation): New.
 846         (parse_ld_annotation): New.
 847         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 848         Introduce TLS relocations.
 849         (parse_d12, parse_s12, parse_u12): Likewise.
 850         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 851         (parse_call_label, print_at): New.
 852
 853 2004-12-21  Mikael Starvik  <starvik@axis.com>
 854
 855         * cris.cpu (cris-set-mem): Correct integral write semantics.
 856
 857 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 858
 859         * cris.cpu: New file.
 860
 861 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 862
 863         * iq2000.cpu: Added quotes around macro arguments so that they
 864         will work with newer versions of guile.
 865
 866 2004-10-27  Nick Clifton  <nickc@redhat.com>
 867
 868         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 869         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 870         operand.
 871         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 872         with guile.
 873
 874 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 875
 876         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 877
 878 2004-05-15  Nick Clifton  <nickc@redhat.com>
 879
 880         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 881
 882 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 883
 884         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 885
 886 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 887
 888         * frv.cpu (define-arch frv): Add fr450 mach.
 889         (define-mach fr450): New.
 890         (define-model fr450): New.  Add profile units to every fr450 insn.
 891         (define-attr UNIT): Add MDCUTSSI.
 892         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 893         (define-attr AUDIO): New boolean.
 894         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 895         (f-LRA-null, f-TLBPR-null): New fields.
 896         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 897         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 898         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 899         (LRA-null, TLBPR-null): New macros.
 900         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 901         (load-real-address): New macro.
 902         (lrai, lrad, tlbpr): New instructions.
 903         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 904         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 905         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 906         (media-low-clear-semantics, media-scope-limit-semantics)
 907         (media-quad-limit, media-quad-shift): New macros.
 908         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 909         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 910         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 911         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 912         (fr450_unit_mapping): New array.
 913         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 914         for new MDCUTSSI unit.
 915         (fr450_check_insn_major_constraints): New function.
 916         (check_insn_major_constraints): Use it.
 917
 918 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 919
 920         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 921         (scutss): Change unit to I0.
 922         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 923         (mqsaths): Fix FR400-MAJOR categorization.
 924         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 925         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 926         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 927         combinations.
 928
 929 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 930
 931         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 932         (rstb, rsth, rst, rstd, rstq): Delete.
 933         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 934
 935 2004-02-23  Nick Clifton  <nickc@redhat.com>
 936
 937         * Apply these patches from Renesas:
 938
 939         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 940
 941         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 942         disassembling codes for 0x*2 addresses.
 943
 944         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 945
 946         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 947
 948         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 949
 950         * cpu/m32r.cpu : Add new model m32r2.
 951         Add new instructions.
 952         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 953         Changed PIPE attr of push from O to OS.
 954         Care for Little-endian of M32R.
 955         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 956         Care for Little-endian of M32R.
 957         (parse_slo16): signed extension for value.
 958
 959 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 960
 961         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 962         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 963
 964         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 965         written by Ben Elliston.
 966
 967 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 968
 969         * frv.cpu (UNIT): Add IACC.
 970         (iacc-multiply-r-r): Use it.
 971         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 972         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 973
 974 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 975
 976         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 977         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 978         cut&paste errors in shifting/truncating numerical operands.
 979         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 980         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 981         (parse_uslo16): Likewise.
 982         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 983         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 984         (parse_s12): Likewise.
 985         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 986         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 987         (parse_uslo16): Likewise.
 988         (parse_uhi16): Parse gothi and gotfuncdeschi.
 989         (parse_d12): Parse got12 and gotfuncdesc12.
 990         (parse_s12): Likewise.
 991
 992 2003-10-10  Dave Brolley  <brolley@redhat.com>
 993
 994         * frv.cpu (dnpmop): New p-macro.
 995         (GRdoublek): Use dnpmop.
 996         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 997         (store-double-r-r): Use (.sym regtype doublek).
 998         (r-store-double): Ditto.
 999         (store-double-r-r-u): Ditto.
1000         (conditional-store-double): Ditto.
1001         (conditional-store-double-u): Ditto.
1002         (store-double-r-simm): Ditto.
1003         (fmovs): Assign to UNIT FMALL.
1004
1005 2003-10-06  Dave Brolley  <brolley@redhat.com>
1006
1007         * frv.cpu, frv.opc: Add support for fr550.
1008
1009 2003-09-24  Dave Brolley  <brolley@redhat.com>
1010
1011         * frv.cpu (u-commit): New modelling unit for fr500.
1012         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1013         (commit-r): Use u-commit model for fr500.
1014         (commit): Ditto.
1015         (conditional-float-binary-op): Take profiling data as an argument.
1016         Update callers.
1017         (ne-float-binary-op): Ditto.
1018
1019 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1020
1021         * frv.cpu (nldqi): Delete unimplemented instruction.
1022
1023 2003-09-12  Dave Brolley  <brolley@redhat.com>
1024
1025         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1026         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1027         frv_ref_SI to get input register referenced for profiling.
1028         (clear-ne-flag-all): Pass insn profiling in as an argument.
1029         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1030
1031 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1032
1033         * frv.cpu: Typographical corrections.
1034
1035 2003-09-09  Dave Brolley  <brolley@redhat.com>
1036
1037         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1038         (conditional-media-dual-complex, media-quad-complex): Likewise.
1039
1040 2003-09-04  Dave Brolley  <brolley@redhat.com>
1041
1042         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1043         Update all callers.
1044         (conditional-register-transfer): Ditto.
1045         (cache-preload): Ditto.
1046         (floating-point-conversion): Ditto.
1047         (floating-point-neg): Ditto.
1048         (float-abs): Ditto.
1049         (float-binary-op-s): Ditto.
1050         (conditional-float-binary-op): Ditto.
1051         (ne-float-binary-op): Ditto.
1052         (float-dual-arith): Ditto.
1053         (ne-float-dual-arith): Ditto.
1054
1055 2003-09-03  Dave Brolley  <brolley@redhat.com>
1056
1057         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1058         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1059         MCLRACC-1.
1060         (A): Removed operand.
1061         (A0,A1): New operands replace operand A.
1062         (mnop): Now a real insn
1063         (mclracc): Removed insn.
1064         (mclracc-0, mclracc-1): New insns replace mclracc.
1065         (all insns): Use new UNIT attributes.
1066
1067 2003-08-21  Nick Clifton  <nickc@redhat.com>
1068
1069         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1070         and u-media-dual-btoh with output parameter.
1071         (cmbtoh): Add profiling hack.
1072
1073 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1074
1075         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1076
1077 2003-06-10  Doug Evans  <dje@sebabeach.org>
1078
1079         * frv.cpu: Add IDOC attribute.
1080
1081 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1082
1083         Contributed by Red Hat.
1084         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1085         Stan Cox, and Frank Ch. Eigler.
1086         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1087         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1088         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1089         * iq10.cpu: New file.  Written by Jeff Johnston.
1090
1091 2003-06-05  Nick Clifton  <nickc@redhat.com>
1092
1093         * frv.cpu (FRintieven): New operand.  An even-numbered only
1094         version of the FRinti operand.
1095         (FRintjeven): Likewise for FRintj.
1096         (FRintkeven): Likewise for FRintk.
1097         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1098         media-quad-arith-sat-semantics, media-quad-arith-sat,
1099         conditional-media-quad-arith-sat, mdunpackh,
1100         media-quad-multiply-semantics, media-quad-multiply,
1101         conditional-media-quad-multiply, media-quad-complex-i,
1102         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1103         conditional-media-quad-multiply-acc, munpackh,
1104         media-quad-multiply-cross-acc-semantics, mdpackh,
1105         media-quad-multiply-cross-acc, mbtoh-semantics,
1106         media-quad-cross-multiply-cross-acc-semantics,
1107         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1108         media-quad-cross-multiply-acc-semantics, cmbtoh,
1109         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1110         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1111         cmhtob): Use new operands.
1112         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1113         (parse_even_register): New function.
1114
1115 2003-06-03  Nick Clifton  <nickc@redhat.com>
1116
1117         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1118         immediate value not unsigned.
1119
1120 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1121
1122         Contributed by Red Hat.
1123         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1124         and Eric Christopher.
1125         * frv.opc: New file.  Written by Catherine Moore, and Dave
1126         Brolley.
1127         * simplify.inc: New file.  Written by Doug Evans.
1128
1129 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1130
1131         * New file.
1132
1133 \f
1134 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1135
1136 Copying and distribution of this file, with or without modification,
1137 are permitted in any medium without royalty provided the copyright
1138 notice and this notice are preserved.
1139
1140 Local Variables:
1141 mode: change-log
1142 left-margin: 8
1143 fill-column: 74
1144 version-control: never
1145 End: