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[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
2
3 Add ms2
4 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
5 model.
6 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
7 f-cb2incr, f-rc3): New fields.
8 (LOOP): New instruction.
9 (JAL-HAZARD): New hazard.
10 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
11 New operands.
12 (mul, muli, dbnz, iflush): Enable for ms2
13 (jal, reti): Has JAL-HAZARD.
14 (ldctxt, ldfb, stfb): Only ms1.
15 (fbcb): Only ms1,ms1-003.
16 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
17 fbcbincrs, mfbcbincrs): Enable for ms2.
18 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
19 * ms1.opc (parse_loopsize): New.
20 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
21 (print_pcrel): New.
22
23 2005-10-28 Dave Brolley <brolley@redhat.com>
24
25 Contribute the following change:
26 2003-09-24 Dave Brolley <brolley@redhat.com>
27
28 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
29 CGEN_ATTR_VALUE_TYPE.
30 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
31 Use cgen_bitset_intersect_p.
32
33 2005-10-27 DJ Delorie <dj@redhat.com>
34
35 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
36 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
37 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
38 imm operand is needed.
39 (adjnz, sbjnz): Pass the right operands.
40 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
41 unary-insn): Add -g variants for opcodes that need to support :G.
42 (not.BW:G, push.BW:G): Call it.
43 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
44 stzx16-imm8-imm8-abs16): Fix operand typos.
45 * m32c.opc (m32c_asm_hash): Support bnCND.
46 (parse_signed4n, print_signed4n): New.
47
48 2005-10-26 DJ Delorie <dj@redhat.com>
49
50 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
51 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
52 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
53 dsp8[sp] is signed.
54 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
55 (mov.BW:S r0,r1): Fix typo r1l->r1.
56 (tst): Allow :G suffix.
57 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
58
59 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
60
61 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
62
63 2005-10-25 DJ Delorie <dj@redhat.com>
64
65 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
66 making one a macro of the other.
67
68 2005-10-21 DJ Delorie <dj@redhat.com>
69
70 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
71 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
72 indexld, indexls): .w variants have `1' bit.
73 (rot32.b): QI, not SI.
74 (rot32.w): HI, not SI.
75 (xchg16): HI for .w variant.
76
77 2005-10-19 Nick Clifton <nickc@redhat.com>
78
79 * m32r.opc (parse_slo16): Fix bad application of previous patch.
80
81 2005-10-18 Andreas Schwab <schwab@suse.de>
82
83 * m32r.opc (parse_slo16): Better version of previous patch.
84
85 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
86
87 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
88 size.
89
90 2005-07-25 DJ Delorie <dj@redhat.com>
91
92 * m32c.opc (parse_unsigned8): Add %dsp8().
93 (parse_signed8): Add %hi8().
94 (parse_unsigned16): Add %dsp16().
95 (parse_signed16): Add %lo16() and %hi16().
96 (parse_lab_5_3): Make valuep a bfd_vma *.
97
98 2005-07-18 Nick Clifton <nickc@redhat.com>
99
100 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
101 components.
102 (f-lab32-jmp-s): Fix insertion sequence.
103 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
104 (Dsp-40-s8): Make parameter be signed.
105 (Dsp-40-s16): Likewise.
106 (Dsp-48-s8): Likewise.
107 (Dsp-48-s16): Likewise.
108 (Imm-13-u3): Likewise. (Despite its name!)
109 (BitBase16-16-s8): Make the parameter be unsigned.
110 (BitBase16-8-u11-S): Likewise.
111 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
112 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
113 relaxation.
114
115 * m32c.opc: Fix formatting.
116 Use safe-ctype.h instead of ctype.h
117 Move duplicated code sequences into a macro.
118 Fix compile time warnings about signedness mismatches.
119 Remove dead code.
120 (parse_lab_5_3): New parser function.
121
122 2005-07-16 Jim Blandy <jimb@redhat.com>
123
124 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
125 to represent isa sets.
126
127 2005-07-15 Jim Blandy <jimb@redhat.com>
128
129 * m32c.cpu, m32c.opc: Fix copyright.
130
131 2005-07-14 Jim Blandy <jimb@redhat.com>
132
133 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
134
135 2005-07-14 Alan Modra <amodra@bigpond.net.au>
136
137 * ms1.opc (print_dollarhex): Correct format string.
138
139 2005-07-06 Alan Modra <amodra@bigpond.net.au>
140
141 * iq2000.cpu: Include from binutils cpu dir.
142
143 2005-07-05 Nick Clifton <nickc@redhat.com>
144
145 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
146 unsigned in order to avoid compile time warnings about sign
147 conflicts.
148
149 * ms1.opc (parse_*): Likewise.
150 (parse_imm16): Use a "void *" as it is passed both signed and
151 unsigned arguments.
152
153 2005-07-01 Nick Clifton <nickc@redhat.com>
154
155 * frv.opc: Update to ISO C90 function declaration style.
156 * iq2000.opc: Likewise.
157 * m32r.opc: Likewise.
158 * sh.opc: Likewise.
159
160 2005-06-15 Dave Brolley <brolley@redhat.com>
161
162 Contributed by Red Hat.
163 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
164 * ms1.opc: New file. Written by Stan Cox.
165
166 2005-05-10 Nick Clifton <nickc@redhat.com>
167
168 * Update the address and phone number of the FSF organization in
169 the GPL notices in the following files:
170 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
171 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
172 sh64-media.cpu, simplify.inc
173
174 2005-02-24 Alan Modra <amodra@bigpond.net.au>
175
176 * frv.opc (parse_A): Warning fix.
177
178 2005-02-23 Nick Clifton <nickc@redhat.com>
179
180 * frv.opc: Fixed compile time warnings about differing signed'ness
181 of pointers passed to functions.
182 * m32r.opc: Likewise.
183
184 2005-02-11 Nick Clifton <nickc@redhat.com>
185
186 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
187 'bfd_vma *' in order avoid compile time warning message.
188
189 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
190
191 * cris.cpu (mstep): Add missing insn.
192
193 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
194
195 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
196 * frv.cpu: Add support for TLS annotations in loads and calll.
197 * frv.opc (parse_symbolic_address): New.
198 (parse_ldd_annotation): New.
199 (parse_call_annotation): New.
200 (parse_ld_annotation): New.
201 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
202 Introduce TLS relocations.
203 (parse_d12, parse_s12, parse_u12): Likewise.
204 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
205 (parse_call_label, print_at): New.
206
207 2004-12-21 Mikael Starvik <starvik@axis.com>
208
209 * cris.cpu (cris-set-mem): Correct integral write semantics.
210
211 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
212
213 * cris.cpu: New file.
214
215 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
216
217 * iq2000.cpu: Added quotes around macro arguments so that they
218 will work with newer versions of guile.
219
220 2004-10-27 Nick Clifton <nickc@redhat.com>
221
222 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
223 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
224 operand.
225 * iq2000.cpu (dnop index): Rename to _index to avoid complications
226 with guile.
227
228 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
229
230 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
231
232 2004-05-15 Nick Clifton <nickc@redhat.com>
233
234 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
235
236 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
237
238 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
239
240 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
241
242 * frv.cpu (define-arch frv): Add fr450 mach.
243 (define-mach fr450): New.
244 (define-model fr450): New. Add profile units to every fr450 insn.
245 (define-attr UNIT): Add MDCUTSSI.
246 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
247 (define-attr AUDIO): New boolean.
248 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
249 (f-LRA-null, f-TLBPR-null): New fields.
250 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
251 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
252 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
253 (LRA-null, TLBPR-null): New macros.
254 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
255 (load-real-address): New macro.
256 (lrai, lrad, tlbpr): New instructions.
257 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
258 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
259 (mdcutssi): Change UNIT attribute to MDCUTSSI.
260 (media-low-clear-semantics, media-scope-limit-semantics)
261 (media-quad-limit, media-quad-shift): New macros.
262 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
263 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
264 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
265 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
266 (fr450_unit_mapping): New array.
267 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
268 for new MDCUTSSI unit.
269 (fr450_check_insn_major_constraints): New function.
270 (check_insn_major_constraints): Use it.
271
272 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
273
274 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
275 (scutss): Change unit to I0.
276 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
277 (mqsaths): Fix FR400-MAJOR categorization.
278 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
279 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
280 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
281 combinations.
282
283 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
284
285 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
286 (rstb, rsth, rst, rstd, rstq): Delete.
287 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
288
289 2004-02-23 Nick Clifton <nickc@redhat.com>
290
291 * Apply these patches from Renesas:
292
293 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
294
295 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
296 disassembling codes for 0x*2 addresses.
297
298 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
299
300 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
301
302 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
303
304 * cpu/m32r.cpu : Add new model m32r2.
305 Add new instructions.
306 Replace occurrances of 'Mitsubishi' with 'Renesas'.
307 Changed PIPE attr of push from O to OS.
308 Care for Little-endian of M32R.
309 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
310 Care for Little-endian of M32R.
311 (parse_slo16): signed extension for value.
312
313 2004-02-20 Andrew Cagney <cagney@redhat.com>
314
315 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
316 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
317
318 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
319 written by Ben Elliston.
320
321 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
322
323 * frv.cpu (UNIT): Add IACC.
324 (iacc-multiply-r-r): Use it.
325 * frv.opc (fr400_unit_mapping): Add entry for IACC.
326 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
327
328 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
329
330 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
331 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
332 cut&paste errors in shifting/truncating numerical operands.
333 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
334 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
335 (parse_uslo16): Likewise.
336 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
337 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
338 (parse_s12): Likewise.
339 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
340 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
341 (parse_uslo16): Likewise.
342 (parse_uhi16): Parse gothi and gotfuncdeschi.
343 (parse_d12): Parse got12 and gotfuncdesc12.
344 (parse_s12): Likewise.
345
346 2003-10-10 Dave Brolley <brolley@redhat.com>
347
348 * frv.cpu (dnpmop): New p-macro.
349 (GRdoublek): Use dnpmop.
350 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
351 (store-double-r-r): Use (.sym regtype doublek).
352 (r-store-double): Ditto.
353 (store-double-r-r-u): Ditto.
354 (conditional-store-double): Ditto.
355 (conditional-store-double-u): Ditto.
356 (store-double-r-simm): Ditto.
357 (fmovs): Assign to UNIT FMALL.
358
359 2003-10-06 Dave Brolley <brolley@redhat.com>
360
361 * frv.cpu, frv.opc: Add support for fr550.
362
363 2003-09-24 Dave Brolley <brolley@redhat.com>
364
365 * frv.cpu (u-commit): New modelling unit for fr500.
366 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
367 (commit-r): Use u-commit model for fr500.
368 (commit): Ditto.
369 (conditional-float-binary-op): Take profiling data as an argument.
370 Update callers.
371 (ne-float-binary-op): Ditto.
372
373 2003-09-19 Michael Snyder <msnyder@redhat.com>
374
375 * frv.cpu (nldqi): Delete unimplemented instruction.
376
377 2003-09-12 Dave Brolley <brolley@redhat.com>
378
379 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
380 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
381 frv_ref_SI to get input register referenced for profiling.
382 (clear-ne-flag-all): Pass insn profiling in as an argument.
383 (clrgr,clrfr,clrga,clrfa): Add profiling information.
384
385 2003-09-11 Michael Snyder <msnyder@redhat.com>
386
387 * frv.cpu: Typographical corrections.
388
389 2003-09-09 Dave Brolley <brolley@redhat.com>
390
391 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
392 (conditional-media-dual-complex, media-quad-complex): Likewise.
393
394 2003-09-04 Dave Brolley <brolley@redhat.com>
395
396 * frv.cpu (register-transfer): Pass in all attributes in on argument.
397 Update all callers.
398 (conditional-register-transfer): Ditto.
399 (cache-preload): Ditto.
400 (floating-point-conversion): Ditto.
401 (floating-point-neg): Ditto.
402 (float-abs): Ditto.
403 (float-binary-op-s): Ditto.
404 (conditional-float-binary-op): Ditto.
405 (ne-float-binary-op): Ditto.
406 (float-dual-arith): Ditto.
407 (ne-float-dual-arith): Ditto.
408
409 2003-09-03 Dave Brolley <brolley@redhat.com>
410
411 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
412 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
413 MCLRACC-1.
414 (A): Removed operand.
415 (A0,A1): New operands replace operand A.
416 (mnop): Now a real insn
417 (mclracc): Removed insn.
418 (mclracc-0, mclracc-1): New insns replace mclracc.
419 (all insns): Use new UNIT attributes.
420
421 2003-08-21 Nick Clifton <nickc@redhat.com>
422
423 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
424 and u-media-dual-btoh with output parameter.
425 (cmbtoh): Add profiling hack.
426
427 2003-08-19 Michael Snyder <msnyder@redhat.com>
428
429 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
430
431 2003-06-10 Doug Evans <dje@sebabeach.org>
432
433 * frv.cpu: Add IDOC attribute.
434
435 2003-06-06 Andrew Cagney <cagney@redhat.com>
436
437 Contributed by Red Hat.
438 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
439 Stan Cox, and Frank Ch. Eigler.
440 * iq2000.opc: New file. Written by Ben Elliston, Frank
441 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
442 * iq2000m.cpu: New file. Written by Jeff Johnston.
443 * iq10.cpu: New file. Written by Jeff Johnston.
444
445 2003-06-05 Nick Clifton <nickc@redhat.com>
446
447 * frv.cpu (FRintieven): New operand. An even-numbered only
448 version of the FRinti operand.
449 (FRintjeven): Likewise for FRintj.
450 (FRintkeven): Likewise for FRintk.
451 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
452 media-quad-arith-sat-semantics, media-quad-arith-sat,
453 conditional-media-quad-arith-sat, mdunpackh,
454 media-quad-multiply-semantics, media-quad-multiply,
455 conditional-media-quad-multiply, media-quad-complex-i,
456 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
457 conditional-media-quad-multiply-acc, munpackh,
458 media-quad-multiply-cross-acc-semantics, mdpackh,
459 media-quad-multiply-cross-acc, mbtoh-semantics,
460 media-quad-cross-multiply-cross-acc-semantics,
461 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
462 media-quad-cross-multiply-acc-semantics, cmbtoh,
463 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
464 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
465 cmhtob): Use new operands.
466 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
467 (parse_even_register): New function.
468
469 2003-06-03 Nick Clifton <nickc@redhat.com>
470
471 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
472 immediate value not unsigned.
473
474 2003-06-03 Andrew Cagney <cagney@redhat.com>
475
476 Contributed by Red Hat.
477 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
478 and Eric Christopher.
479 * frv.opc: New file. Written by Catherine Moore, and Dave
480 Brolley.
481 * simplify.inc: New file. Written by Doug Evans.
482
483 2003-05-02 Andrew Cagney <cagney@redhat.com>
484
485 * New file.
486
487 \f
488 Local Variables:
489 mode: change-log
490 left-margin: 8
491 fill-column: 74
492 version-control: never
493 End:
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