* m32r.opc: Formatting.
[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2007-03-08 Alan Modra <amodra@bigpond.net.au>
2
3 * m32r.opc: Formatting.
4
5 2006-05-22 Nick Clifton <nickc@redhat.com>
6
7 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
8
9 2006-04-10 DJ Delorie <dj@redhat.com>
10
11 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
12 decides if this function accepts symbolic constants or not.
13 (parse_signed_bitbase): Likewise.
14 (parse_unsigned_bitbase8): Pass the new parameter.
15 (parse_unsigned_bitbase11): Likewise.
16 (parse_unsigned_bitbase16): Likewise.
17 (parse_unsigned_bitbase19): Likewise.
18 (parse_unsigned_bitbase27): Likewise.
19 (parse_signed_bitbase8): Likewise.
20 (parse_signed_bitbase11): Likewise.
21 (parse_signed_bitbase19): Likewise.
22
23 2006-03-13 DJ Delorie <dj@redhat.com>
24
25 * m32c.cpu (Bit3-S): New.
26 (btst:s): New.
27 * m32c.opc (parse_bit3_S): New.
28
29 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
30 (btst): Add optional :G suffix for MACH32.
31 (or.b:S): New.
32 (pop.w:G): Add optional :G suffix for MACH16.
33 (push.b.imm): Fix syntax.
34
35 2006-03-10 DJ Delorie <dj@redhat.com>
36
37 * m32c.cpu (mul.l): New.
38 (mulu.l): New.
39
40 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
41
42 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
43 an error message otherwise.
44 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
45 Fix up comments to correctly describe the functions.
46
47 2006-02-24 DJ Delorie <dj@redhat.com>
48
49 * m32c.cpu (RL_TYPE): New attribute, with macros.
50 (Lab-8-24): Add RELAX.
51 (unary-insn-defn-g, binary-arith-imm-dst-defn,
52 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
53 (binary-arith-src-dst-defn): Add 2ADDR attribute.
54 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
55 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
56 attribute.
57 (jsri16, jsri32): Add 1ADDR attribute.
58 (jsr32.w, jsr32.a): Add JUMP attribute.
59
60 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
61 Anil Paranjape <anilp1@kpitcummins.com>
62 Shilin Shakti <shilins@kpitcummins.com>
63
64 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
65 description.
66 * xc16x.opc: New file containing supporting XC16C routines.
67
68 2006-02-10 Nick Clifton <nickc@redhat.com>
69
70 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
71
72 2006-01-06 DJ Delorie <dj@redhat.com>
73
74 * m32c.cpu (mov.w:q): Fix mode.
75 (push32.b.imm): Likewise, for the comment.
76
77 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
78
79 Second part of ms1 to mt renaming.
80 * mt.cpu (define-arch, define-isa): Set name to mt.
81 (define-mach): Adjust.
82 * mt.opc (CGEN_ASM_HASH): Update.
83 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
84 (parse_loopsize, parse_imm16): Adjust.
85
86 2005-12-13 DJ Delorie <dj@redhat.com>
87
88 * m32c.cpu (jsri): Fix order so register names aren't treated as
89 symbols.
90 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
91 indexwd, indexws): Fix encodings.
92
93 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
94
95 * mt.cpu: Rename from ms1.cpu.
96 * mt.opc: Rename from ms1.opc.
97
98 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
99
100 * cris.cpu (simplecris-common-writable-specregs)
101 (simplecris-common-readable-specregs): Split from
102 simplecris-common-specregs. All users changed.
103 (cris-implemented-writable-specregs-v0)
104 (cris-implemented-readable-specregs-v0): Similar from
105 cris-implemented-specregs-v0.
106 (cris-implemented-writable-specregs-v3)
107 (cris-implemented-readable-specregs-v3)
108 (cris-implemented-writable-specregs-v8)
109 (cris-implemented-readable-specregs-v8)
110 (cris-implemented-writable-specregs-v10)
111 (cris-implemented-readable-specregs-v10)
112 (cris-implemented-writable-specregs-v32)
113 (cris-implemented-readable-specregs-v32): Similar.
114 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
115 insns and specializations.
116
117 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
118
119 Add ms2
120 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
121 model.
122 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
123 f-cb2incr, f-rc3): New fields.
124 (LOOP): New instruction.
125 (JAL-HAZARD): New hazard.
126 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
127 New operands.
128 (mul, muli, dbnz, iflush): Enable for ms2
129 (jal, reti): Has JAL-HAZARD.
130 (ldctxt, ldfb, stfb): Only ms1.
131 (fbcb): Only ms1,ms1-003.
132 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
133 fbcbincrs, mfbcbincrs): Enable for ms2.
134 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
135 * ms1.opc (parse_loopsize): New.
136 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
137 (print_pcrel): New.
138
139 2005-10-28 Dave Brolley <brolley@redhat.com>
140
141 Contribute the following change:
142 2003-09-24 Dave Brolley <brolley@redhat.com>
143
144 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
145 CGEN_ATTR_VALUE_TYPE.
146 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
147 Use cgen_bitset_intersect_p.
148
149 2005-10-27 DJ Delorie <dj@redhat.com>
150
151 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
152 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
153 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
154 imm operand is needed.
155 (adjnz, sbjnz): Pass the right operands.
156 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
157 unary-insn): Add -g variants for opcodes that need to support :G.
158 (not.BW:G, push.BW:G): Call it.
159 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
160 stzx16-imm8-imm8-abs16): Fix operand typos.
161 * m32c.opc (m32c_asm_hash): Support bnCND.
162 (parse_signed4n, print_signed4n): New.
163
164 2005-10-26 DJ Delorie <dj@redhat.com>
165
166 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
167 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
168 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
169 dsp8[sp] is signed.
170 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
171 (mov.BW:S r0,r1): Fix typo r1l->r1.
172 (tst): Allow :G suffix.
173 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
174
175 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
176
177 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
178
179 2005-10-25 DJ Delorie <dj@redhat.com>
180
181 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
182 making one a macro of the other.
183
184 2005-10-21 DJ Delorie <dj@redhat.com>
185
186 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
187 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
188 indexld, indexls): .w variants have `1' bit.
189 (rot32.b): QI, not SI.
190 (rot32.w): HI, not SI.
191 (xchg16): HI for .w variant.
192
193 2005-10-19 Nick Clifton <nickc@redhat.com>
194
195 * m32r.opc (parse_slo16): Fix bad application of previous patch.
196
197 2005-10-18 Andreas Schwab <schwab@suse.de>
198
199 * m32r.opc (parse_slo16): Better version of previous patch.
200
201 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
202
203 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
204 size.
205
206 2005-07-25 DJ Delorie <dj@redhat.com>
207
208 * m32c.opc (parse_unsigned8): Add %dsp8().
209 (parse_signed8): Add %hi8().
210 (parse_unsigned16): Add %dsp16().
211 (parse_signed16): Add %lo16() and %hi16().
212 (parse_lab_5_3): Make valuep a bfd_vma *.
213
214 2005-07-18 Nick Clifton <nickc@redhat.com>
215
216 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
217 components.
218 (f-lab32-jmp-s): Fix insertion sequence.
219 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
220 (Dsp-40-s8): Make parameter be signed.
221 (Dsp-40-s16): Likewise.
222 (Dsp-48-s8): Likewise.
223 (Dsp-48-s16): Likewise.
224 (Imm-13-u3): Likewise. (Despite its name!)
225 (BitBase16-16-s8): Make the parameter be unsigned.
226 (BitBase16-8-u11-S): Likewise.
227 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
228 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
229 relaxation.
230
231 * m32c.opc: Fix formatting.
232 Use safe-ctype.h instead of ctype.h
233 Move duplicated code sequences into a macro.
234 Fix compile time warnings about signedness mismatches.
235 Remove dead code.
236 (parse_lab_5_3): New parser function.
237
238 2005-07-16 Jim Blandy <jimb@redhat.com>
239
240 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
241 to represent isa sets.
242
243 2005-07-15 Jim Blandy <jimb@redhat.com>
244
245 * m32c.cpu, m32c.opc: Fix copyright.
246
247 2005-07-14 Jim Blandy <jimb@redhat.com>
248
249 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
250
251 2005-07-14 Alan Modra <amodra@bigpond.net.au>
252
253 * ms1.opc (print_dollarhex): Correct format string.
254
255 2005-07-06 Alan Modra <amodra@bigpond.net.au>
256
257 * iq2000.cpu: Include from binutils cpu dir.
258
259 2005-07-05 Nick Clifton <nickc@redhat.com>
260
261 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
262 unsigned in order to avoid compile time warnings about sign
263 conflicts.
264
265 * ms1.opc (parse_*): Likewise.
266 (parse_imm16): Use a "void *" as it is passed both signed and
267 unsigned arguments.
268
269 2005-07-01 Nick Clifton <nickc@redhat.com>
270
271 * frv.opc: Update to ISO C90 function declaration style.
272 * iq2000.opc: Likewise.
273 * m32r.opc: Likewise.
274 * sh.opc: Likewise.
275
276 2005-06-15 Dave Brolley <brolley@redhat.com>
277
278 Contributed by Red Hat.
279 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
280 * ms1.opc: New file. Written by Stan Cox.
281
282 2005-05-10 Nick Clifton <nickc@redhat.com>
283
284 * Update the address and phone number of the FSF organization in
285 the GPL notices in the following files:
286 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
287 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
288 sh64-media.cpu, simplify.inc
289
290 2005-02-24 Alan Modra <amodra@bigpond.net.au>
291
292 * frv.opc (parse_A): Warning fix.
293
294 2005-02-23 Nick Clifton <nickc@redhat.com>
295
296 * frv.opc: Fixed compile time warnings about differing signed'ness
297 of pointers passed to functions.
298 * m32r.opc: Likewise.
299
300 2005-02-11 Nick Clifton <nickc@redhat.com>
301
302 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
303 'bfd_vma *' in order avoid compile time warning message.
304
305 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
306
307 * cris.cpu (mstep): Add missing insn.
308
309 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
310
311 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
312 * frv.cpu: Add support for TLS annotations in loads and calll.
313 * frv.opc (parse_symbolic_address): New.
314 (parse_ldd_annotation): New.
315 (parse_call_annotation): New.
316 (parse_ld_annotation): New.
317 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
318 Introduce TLS relocations.
319 (parse_d12, parse_s12, parse_u12): Likewise.
320 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
321 (parse_call_label, print_at): New.
322
323 2004-12-21 Mikael Starvik <starvik@axis.com>
324
325 * cris.cpu (cris-set-mem): Correct integral write semantics.
326
327 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
328
329 * cris.cpu: New file.
330
331 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
332
333 * iq2000.cpu: Added quotes around macro arguments so that they
334 will work with newer versions of guile.
335
336 2004-10-27 Nick Clifton <nickc@redhat.com>
337
338 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
339 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
340 operand.
341 * iq2000.cpu (dnop index): Rename to _index to avoid complications
342 with guile.
343
344 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
345
346 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
347
348 2004-05-15 Nick Clifton <nickc@redhat.com>
349
350 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
351
352 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
353
354 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
355
356 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
357
358 * frv.cpu (define-arch frv): Add fr450 mach.
359 (define-mach fr450): New.
360 (define-model fr450): New. Add profile units to every fr450 insn.
361 (define-attr UNIT): Add MDCUTSSI.
362 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
363 (define-attr AUDIO): New boolean.
364 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
365 (f-LRA-null, f-TLBPR-null): New fields.
366 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
367 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
368 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
369 (LRA-null, TLBPR-null): New macros.
370 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
371 (load-real-address): New macro.
372 (lrai, lrad, tlbpr): New instructions.
373 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
374 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
375 (mdcutssi): Change UNIT attribute to MDCUTSSI.
376 (media-low-clear-semantics, media-scope-limit-semantics)
377 (media-quad-limit, media-quad-shift): New macros.
378 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
379 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
380 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
381 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
382 (fr450_unit_mapping): New array.
383 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
384 for new MDCUTSSI unit.
385 (fr450_check_insn_major_constraints): New function.
386 (check_insn_major_constraints): Use it.
387
388 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
389
390 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
391 (scutss): Change unit to I0.
392 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
393 (mqsaths): Fix FR400-MAJOR categorization.
394 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
395 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
396 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
397 combinations.
398
399 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
400
401 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
402 (rstb, rsth, rst, rstd, rstq): Delete.
403 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
404
405 2004-02-23 Nick Clifton <nickc@redhat.com>
406
407 * Apply these patches from Renesas:
408
409 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
410
411 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
412 disassembling codes for 0x*2 addresses.
413
414 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
415
416 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
417
418 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
419
420 * cpu/m32r.cpu : Add new model m32r2.
421 Add new instructions.
422 Replace occurrances of 'Mitsubishi' with 'Renesas'.
423 Changed PIPE attr of push from O to OS.
424 Care for Little-endian of M32R.
425 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
426 Care for Little-endian of M32R.
427 (parse_slo16): signed extension for value.
428
429 2004-02-20 Andrew Cagney <cagney@redhat.com>
430
431 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
432 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
433
434 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
435 written by Ben Elliston.
436
437 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
438
439 * frv.cpu (UNIT): Add IACC.
440 (iacc-multiply-r-r): Use it.
441 * frv.opc (fr400_unit_mapping): Add entry for IACC.
442 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
443
444 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
445
446 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
447 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
448 cut&paste errors in shifting/truncating numerical operands.
449 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
450 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
451 (parse_uslo16): Likewise.
452 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
453 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
454 (parse_s12): Likewise.
455 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
456 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
457 (parse_uslo16): Likewise.
458 (parse_uhi16): Parse gothi and gotfuncdeschi.
459 (parse_d12): Parse got12 and gotfuncdesc12.
460 (parse_s12): Likewise.
461
462 2003-10-10 Dave Brolley <brolley@redhat.com>
463
464 * frv.cpu (dnpmop): New p-macro.
465 (GRdoublek): Use dnpmop.
466 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
467 (store-double-r-r): Use (.sym regtype doublek).
468 (r-store-double): Ditto.
469 (store-double-r-r-u): Ditto.
470 (conditional-store-double): Ditto.
471 (conditional-store-double-u): Ditto.
472 (store-double-r-simm): Ditto.
473 (fmovs): Assign to UNIT FMALL.
474
475 2003-10-06 Dave Brolley <brolley@redhat.com>
476
477 * frv.cpu, frv.opc: Add support for fr550.
478
479 2003-09-24 Dave Brolley <brolley@redhat.com>
480
481 * frv.cpu (u-commit): New modelling unit for fr500.
482 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
483 (commit-r): Use u-commit model for fr500.
484 (commit): Ditto.
485 (conditional-float-binary-op): Take profiling data as an argument.
486 Update callers.
487 (ne-float-binary-op): Ditto.
488
489 2003-09-19 Michael Snyder <msnyder@redhat.com>
490
491 * frv.cpu (nldqi): Delete unimplemented instruction.
492
493 2003-09-12 Dave Brolley <brolley@redhat.com>
494
495 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
496 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
497 frv_ref_SI to get input register referenced for profiling.
498 (clear-ne-flag-all): Pass insn profiling in as an argument.
499 (clrgr,clrfr,clrga,clrfa): Add profiling information.
500
501 2003-09-11 Michael Snyder <msnyder@redhat.com>
502
503 * frv.cpu: Typographical corrections.
504
505 2003-09-09 Dave Brolley <brolley@redhat.com>
506
507 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
508 (conditional-media-dual-complex, media-quad-complex): Likewise.
509
510 2003-09-04 Dave Brolley <brolley@redhat.com>
511
512 * frv.cpu (register-transfer): Pass in all attributes in on argument.
513 Update all callers.
514 (conditional-register-transfer): Ditto.
515 (cache-preload): Ditto.
516 (floating-point-conversion): Ditto.
517 (floating-point-neg): Ditto.
518 (float-abs): Ditto.
519 (float-binary-op-s): Ditto.
520 (conditional-float-binary-op): Ditto.
521 (ne-float-binary-op): Ditto.
522 (float-dual-arith): Ditto.
523 (ne-float-dual-arith): Ditto.
524
525 2003-09-03 Dave Brolley <brolley@redhat.com>
526
527 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
528 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
529 MCLRACC-1.
530 (A): Removed operand.
531 (A0,A1): New operands replace operand A.
532 (mnop): Now a real insn
533 (mclracc): Removed insn.
534 (mclracc-0, mclracc-1): New insns replace mclracc.
535 (all insns): Use new UNIT attributes.
536
537 2003-08-21 Nick Clifton <nickc@redhat.com>
538
539 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
540 and u-media-dual-btoh with output parameter.
541 (cmbtoh): Add profiling hack.
542
543 2003-08-19 Michael Snyder <msnyder@redhat.com>
544
545 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
546
547 2003-06-10 Doug Evans <dje@sebabeach.org>
548
549 * frv.cpu: Add IDOC attribute.
550
551 2003-06-06 Andrew Cagney <cagney@redhat.com>
552
553 Contributed by Red Hat.
554 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
555 Stan Cox, and Frank Ch. Eigler.
556 * iq2000.opc: New file. Written by Ben Elliston, Frank
557 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
558 * iq2000m.cpu: New file. Written by Jeff Johnston.
559 * iq10.cpu: New file. Written by Jeff Johnston.
560
561 2003-06-05 Nick Clifton <nickc@redhat.com>
562
563 * frv.cpu (FRintieven): New operand. An even-numbered only
564 version of the FRinti operand.
565 (FRintjeven): Likewise for FRintj.
566 (FRintkeven): Likewise for FRintk.
567 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
568 media-quad-arith-sat-semantics, media-quad-arith-sat,
569 conditional-media-quad-arith-sat, mdunpackh,
570 media-quad-multiply-semantics, media-quad-multiply,
571 conditional-media-quad-multiply, media-quad-complex-i,
572 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
573 conditional-media-quad-multiply-acc, munpackh,
574 media-quad-multiply-cross-acc-semantics, mdpackh,
575 media-quad-multiply-cross-acc, mbtoh-semantics,
576 media-quad-cross-multiply-cross-acc-semantics,
577 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
578 media-quad-cross-multiply-acc-semantics, cmbtoh,
579 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
580 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
581 cmhtob): Use new operands.
582 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
583 (parse_even_register): New function.
584
585 2003-06-03 Nick Clifton <nickc@redhat.com>
586
587 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
588 immediate value not unsigned.
589
590 2003-06-03 Andrew Cagney <cagney@redhat.com>
591
592 Contributed by Red Hat.
593 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
594 and Eric Christopher.
595 * frv.opc: New file. Written by Catherine Moore, and Dave
596 Brolley.
597 * simplify.inc: New file. Written by Doug Evans.
598
599 2003-05-02 Andrew Cagney <cagney@redhat.com>
600
601 * New file.
602
603 \f
604 Local Variables:
605 mode: change-log
606 left-margin: 8
607 fill-column: 74
608 version-control: never
609 End:
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