or1k: Add the l.adrp insn and supporting relocations
[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2018-10-05 Richard Henderson <rth@twiddle.net>
2
3 * or1k.opc (parse_disp26): Add support for plta() relocations.
4 (parse_disp21): New function.
5 (or1k_rclass): New enum.
6 (or1k_rtype): New enum.
7 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
8 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
9 (parse_imm16): Add support for the new 21bit and 13bit relocations.
10 * or1korbis.cpu (f-disp26): Don't assume SI.
11 (f-disp21): New pc-relative 21-bit 13 shifted to right.
12 (insn-opcode): Add ADRP.
13 (l-adrp): New instruction.
14
15 2018-10-05 Richard Henderson <rth@twiddle.net>
16
17 * or1k.opc: Add RTYPE_ enum.
18 (INVALID_STORE_RELOC): New string.
19 (or1k_imm16_relocs): New array array.
20 (parse_reloc): New static function that just does the parsing.
21 (parse_imm16): New static function for generic parsing.
22 (parse_simm16): Change to just call parse_imm16.
23 (parse_simm16_split): New function.
24 (parse_uimm16): Change to call parse_imm16.
25 (parse_uimm16_split): New function.
26 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
27 (uimm16-split): Change to use new uimm16_split.
28
29 2018-07-24 Alan Modra <amodra@gmail.com>
30
31 PR 23430
32 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
33
34 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
35
36 * or1kcommon.cpu (spr-reg-info): Typo fix.
37
38 2018-03-03 Alan Modra <amodra@gmail.com>
39
40 * frv.opc: Include opintl.h.
41 (add_next_to_vliw): Use opcodes_error_handler to print error.
42 Standardize error message.
43 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
44
45 2018-01-13 Nick Clifton <nickc@redhat.com>
46
47 2.30 branch created.
48
49 2017-03-15 Stafford Horne <shorne@gmail.com>
50
51 * or1kcommon.cpu: Add pc set semantics to also update ppc.
52
53 2016-10-06 Alan Modra <amodra@gmail.com>
54
55 * mep.opc (expand_string): Add fall through comment.
56
57 2016-03-03 Alan Modra <amodra@gmail.com>
58
59 * fr30.cpu (f-m4): Replace bogus comment with a better guess
60 at what is really going on.
61
62 2016-03-02 Alan Modra <amodra@gmail.com>
63
64 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
65
66 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
67
68 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
69 a constant to better align disassembler output.
70
71 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
72
73 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
74
75 2014-06-12 Alan Modra <amodra@gmail.com>
76
77 * or1k.opc: Whitespace fixes.
78
79 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
80
81 * or1korbis.cpu (h-atomic-reserve): New hardware.
82 (h-atomic-address): Likewise.
83 (insn-opcode): Add opcodes for LWA and SWA.
84 (atomic-reserve): New operand.
85 (atomic-address): Likewise.
86 (l-lwa, l-swa): New instructions.
87 (l-lbs): Fix typo in comment.
88 (store-insn): Clear atomic reserve on store to atomic-address.
89 Fix register names in fmt field.
90
91 2014-04-22 Christian Svensson <blue@cmd.nu>
92
93 * openrisc.cpu: Delete.
94 * openrisc.opc: Delete.
95 * or1k.cpu: New file.
96 * or1k.opc: New file.
97 * or1kcommon.cpu: New file.
98 * or1korbis.cpu: New file.
99 * or1korfpx.cpu: New file.
100
101 2013-12-07 Mike Frysinger <vapier@gentoo.org>
102
103 * epiphany.opc: Remove +x file mode.
104
105 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
106
107 PR binutils/15241
108 * lm32.cpu (Control and status registers): Add CFG2, PSW,
109 TLBVADDR, TLBPADDR and TLBBADVADDR.
110
111 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
112 Joern Rennecke <joern.rennecke@embecosm.com>
113
114 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
115 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
116 (testset-insn): Add NO_DIS attribute to t.l.
117 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
118 (move-insns): Add NO-DIS attribute to cmov.l.
119 (op-mmr-movts): Add NO-DIS attribute to movts.l.
120 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
121 (op-rrr): Add NO-DIS attribute to .l.
122 (shift-rrr): Add NO-DIS attribute to .l.
123 (op-shift-rri): Add NO-DIS attribute to i32.l.
124 (bitrl, movtl): Add NO-DIS attribute.
125 (op-iextrrr): Add NO-DIS attribute to .l
126 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
127 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
128
129 2012-02-27 Alan Modra <amodra@gmail.com>
130
131 * mt.opc (print_dollarhex): Trim values to 32 bits.
132
133 2011-12-15 Nick Clifton <nickc@redhat.com>
134
135 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
136 hosts.
137
138 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
139
140 * epiphany.opc (parse_branch_addr): Fix type of valuep.
141 Cast value before printing it as a long.
142 (parse_postindex): Fix type of valuep.
143
144 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
145
146 * cpu/epiphany.cpu: New file.
147 * cpu/epiphany.opc: New file.
148
149 2011-08-22 Nick Clifton <nickc@redhat.com>
150
151 * fr30.cpu: Newly contributed file.
152 * fr30.opc: Likewise.
153 * ip2k.cpu: Likewise.
154 * ip2k.opc: Likewise.
155 * mep-avc.cpu: Likewise.
156 * mep-avc2.cpu: Likewise.
157 * mep-c5.cpu: Likewise.
158 * mep-core.cpu: Likewise.
159 * mep-default.cpu: Likewise.
160 * mep-ext-cop.cpu: Likewise.
161 * mep-fmax.cpu: Likewise.
162 * mep-h1.cpu: Likewise.
163 * mep-ivc2.cpu: Likewise.
164 * mep-rhcop.cpu: Likewise.
165 * mep-sample-ucidsp.cpu: Likewise.
166 * mep.cpu: Likewise.
167 * mep.opc: Likewise.
168 * openrisc.cpu: Likewise.
169 * openrisc.opc: Likewise.
170 * xstormy16.cpu: Likewise.
171 * xstormy16.opc: Likewise.
172
173 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
174
175 * frv.opc: #undef DEBUG.
176
177 2010-07-03 DJ Delorie <dj@delorie.com>
178
179 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
180
181 2010-02-11 Doug Evans <dje@sebabeach.org>
182
183 * m32r.cpu (HASH-PREFIX): Delete.
184 (duhpo, dshpo): New pmacros.
185 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
186 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
187 attribute, define with dshpo.
188 (uimm24): Delete HASH-PREFIX attribute.
189 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
190 (print_signed_with_hash_prefix): New function.
191 (print_unsigned_with_hash_prefix): New function.
192 * xc16x.cpu (dowh): New pmacro.
193 (upof16): Define with dowh, specify print handler.
194 (qbit, qlobit, qhibit): Ditto.
195 (upag16): Ditto.
196 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
197 (print_with_dot_prefix): New functions.
198 (print_with_pof_prefix, print_with_pag_prefix): New functions.
199
200 2010-01-24 Doug Evans <dje@sebabeach.org>
201
202 * frv.cpu (floating-point-conversion): Update call to fp conv op.
203 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
204 conditional-floating-point-conversion, ne-floating-point-conversion,
205 float-parallel-mul-add-double-semantics): Ditto.
206
207 2010-01-05 Doug Evans <dje@sebabeach.org>
208
209 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
210 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
211
212 2010-01-02 Doug Evans <dje@sebabeach.org>
213
214 * m32c.opc (parse_signed16): Fix typo.
215
216 2009-12-11 Nick Clifton <nickc@redhat.com>
217
218 * frv.opc: Fix shadowed variable warnings.
219 * m32c.opc: Fix shadowed variable warnings.
220
221 2009-11-14 Doug Evans <dje@sebabeach.org>
222
223 Must use VOID expression in VOID context.
224 * xc16x.cpu (mov4): Fix mode of `sequence'.
225 (mov9, mov10): Ditto.
226 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
227 (callr, callseg, calls, trap, rets, reti): Ditto.
228 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
229 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
230 (exts, exts1, extsr, extsr1, prior): Ditto.
231
232 2009-10-23 Doug Evans <dje@sebabeach.org>
233
234 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
235 cgen-ops.h -> cgen/basic-ops.h.
236
237 2009-09-25 Alan Modra <amodra@bigpond.net.au>
238
239 * m32r.cpu (stb-plus): Typo fix.
240
241 2009-09-23 Doug Evans <dje@sebabeach.org>
242
243 * m32r.cpu (sth-plus): Fix address mode and calculation.
244 (stb-plus): Ditto.
245 (clrpsw): Fix mask calculation.
246 (bset, bclr, btst): Make mode in bit calculation match expression.
247
248 * xc16x.cpu (rtl-version): Set to 0.8.
249 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
250 make uppercase. Remove unnecessary name-prefix spec.
251 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
252 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
253 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
254 (h-cr): New hardware.
255 (muls): Comment out parts that won't compile, add fixme.
256 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
257 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
258 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
259
260 2009-07-16 Doug Evans <dje@sebabeach.org>
261
262 * cpu/simplify.inc (*): One line doc strings don't need \n.
263 (df): Invoke define-full-ifield instead of claiming it's an alias.
264 (dno): Define.
265 (dnop): Mark as deprecated.
266
267 2009-06-22 Alan Modra <amodra@bigpond.net.au>
268
269 * m32c.opc (parse_lab_5_3): Use correct enum.
270
271 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
272
273 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
274 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
275 (media-arith-sat-semantics): Explicitly sign- or zero-extend
276 arguments of "operation" to DI using "mode" and the new pmacros.
277
278 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
279
280 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
281 of number 2, PID.
282
283 2008-12-23 Jon Beniston <jon@beniston.com>
284
285 * lm32.cpu: New file.
286 * lm32.opc: New file.
287
288 2008-01-29 Alan Modra <amodra@bigpond.net.au>
289
290 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
291 to source.
292
293 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
294
295 * cris.cpu (movs, movu): Use result of extension operation when
296 updating flags.
297
298 2007-07-04 Nick Clifton <nickc@redhat.com>
299
300 * cris.cpu: Update copyright notice to refer to GPLv3.
301 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
302 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
303 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
304 xc16x.opc: Likewise.
305 * iq2000.cpu: Fix copyright notice to refer to FSF.
306
307 2007-04-30 Mark Salter <msalter@sadr.localdomain>
308
309 * frv.cpu (spr-names): Support new coprocessor SPR registers.
310
311 2007-04-20 Nick Clifton <nickc@redhat.com>
312
313 * xc16x.cpu: Restore after accidentally overwriting this file with
314 xc16x.opc.
315
316 2007-03-29 DJ Delorie <dj@redhat.com>
317
318 * m32c.cpu (Imm-8-s4n): Fix print hook.
319 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
320 (arith-jnz-imm4-dst-defn): Make relaxable.
321 (arith-jnz16-imm4-dst-defn): Fix encodings.
322
323 2007-03-20 DJ Delorie <dj@redhat.com>
324
325 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
326 mem20): New.
327 (src16-16-20-An-relative-*): New.
328 (dst16-*-20-An-relative-*): New.
329 (dst16-16-16sa-*): New
330 (dst16-16-16ar-*): New
331 (dst32-16-16sa-Unprefixed-*): New
332 (jsri): Fix operands.
333 (setzx): Fix encoding.
334
335 2007-03-08 Alan Modra <amodra@bigpond.net.au>
336
337 * m32r.opc: Formatting.
338
339 2006-05-22 Nick Clifton <nickc@redhat.com>
340
341 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
342
343 2006-04-10 DJ Delorie <dj@redhat.com>
344
345 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
346 decides if this function accepts symbolic constants or not.
347 (parse_signed_bitbase): Likewise.
348 (parse_unsigned_bitbase8): Pass the new parameter.
349 (parse_unsigned_bitbase11): Likewise.
350 (parse_unsigned_bitbase16): Likewise.
351 (parse_unsigned_bitbase19): Likewise.
352 (parse_unsigned_bitbase27): Likewise.
353 (parse_signed_bitbase8): Likewise.
354 (parse_signed_bitbase11): Likewise.
355 (parse_signed_bitbase19): Likewise.
356
357 2006-03-13 DJ Delorie <dj@redhat.com>
358
359 * m32c.cpu (Bit3-S): New.
360 (btst:s): New.
361 * m32c.opc (parse_bit3_S): New.
362
363 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
364 (btst): Add optional :G suffix for MACH32.
365 (or.b:S): New.
366 (pop.w:G): Add optional :G suffix for MACH16.
367 (push.b.imm): Fix syntax.
368
369 2006-03-10 DJ Delorie <dj@redhat.com>
370
371 * m32c.cpu (mul.l): New.
372 (mulu.l): New.
373
374 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
375
376 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
377 an error message otherwise.
378 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
379 Fix up comments to correctly describe the functions.
380
381 2006-02-24 DJ Delorie <dj@redhat.com>
382
383 * m32c.cpu (RL_TYPE): New attribute, with macros.
384 (Lab-8-24): Add RELAX.
385 (unary-insn-defn-g, binary-arith-imm-dst-defn,
386 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
387 (binary-arith-src-dst-defn): Add 2ADDR attribute.
388 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
389 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
390 attribute.
391 (jsri16, jsri32): Add 1ADDR attribute.
392 (jsr32.w, jsr32.a): Add JUMP attribute.
393
394 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
395 Anil Paranjape <anilp1@kpitcummins.com>
396 Shilin Shakti <shilins@kpitcummins.com>
397
398 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
399 description.
400 * xc16x.opc: New file containing supporting XC16C routines.
401
402 2006-02-10 Nick Clifton <nickc@redhat.com>
403
404 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
405
406 2006-01-06 DJ Delorie <dj@redhat.com>
407
408 * m32c.cpu (mov.w:q): Fix mode.
409 (push32.b.imm): Likewise, for the comment.
410
411 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
412
413 Second part of ms1 to mt renaming.
414 * mt.cpu (define-arch, define-isa): Set name to mt.
415 (define-mach): Adjust.
416 * mt.opc (CGEN_ASM_HASH): Update.
417 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
418 (parse_loopsize, parse_imm16): Adjust.
419
420 2005-12-13 DJ Delorie <dj@redhat.com>
421
422 * m32c.cpu (jsri): Fix order so register names aren't treated as
423 symbols.
424 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
425 indexwd, indexws): Fix encodings.
426
427 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
428
429 * mt.cpu: Rename from ms1.cpu.
430 * mt.opc: Rename from ms1.opc.
431
432 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
433
434 * cris.cpu (simplecris-common-writable-specregs)
435 (simplecris-common-readable-specregs): Split from
436 simplecris-common-specregs. All users changed.
437 (cris-implemented-writable-specregs-v0)
438 (cris-implemented-readable-specregs-v0): Similar from
439 cris-implemented-specregs-v0.
440 (cris-implemented-writable-specregs-v3)
441 (cris-implemented-readable-specregs-v3)
442 (cris-implemented-writable-specregs-v8)
443 (cris-implemented-readable-specregs-v8)
444 (cris-implemented-writable-specregs-v10)
445 (cris-implemented-readable-specregs-v10)
446 (cris-implemented-writable-specregs-v32)
447 (cris-implemented-readable-specregs-v32): Similar.
448 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
449 insns and specializations.
450
451 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
452
453 Add ms2
454 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
455 model.
456 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
457 f-cb2incr, f-rc3): New fields.
458 (LOOP): New instruction.
459 (JAL-HAZARD): New hazard.
460 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
461 New operands.
462 (mul, muli, dbnz, iflush): Enable for ms2
463 (jal, reti): Has JAL-HAZARD.
464 (ldctxt, ldfb, stfb): Only ms1.
465 (fbcb): Only ms1,ms1-003.
466 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
467 fbcbincrs, mfbcbincrs): Enable for ms2.
468 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
469 * ms1.opc (parse_loopsize): New.
470 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
471 (print_pcrel): New.
472
473 2005-10-28 Dave Brolley <brolley@redhat.com>
474
475 Contribute the following change:
476 2003-09-24 Dave Brolley <brolley@redhat.com>
477
478 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
479 CGEN_ATTR_VALUE_TYPE.
480 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
481 Use cgen_bitset_intersect_p.
482
483 2005-10-27 DJ Delorie <dj@redhat.com>
484
485 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
486 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
487 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
488 imm operand is needed.
489 (adjnz, sbjnz): Pass the right operands.
490 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
491 unary-insn): Add -g variants for opcodes that need to support :G.
492 (not.BW:G, push.BW:G): Call it.
493 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
494 stzx16-imm8-imm8-abs16): Fix operand typos.
495 * m32c.opc (m32c_asm_hash): Support bnCND.
496 (parse_signed4n, print_signed4n): New.
497
498 2005-10-26 DJ Delorie <dj@redhat.com>
499
500 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
501 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
502 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
503 dsp8[sp] is signed.
504 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
505 (mov.BW:S r0,r1): Fix typo r1l->r1.
506 (tst): Allow :G suffix.
507 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
508
509 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
510
511 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
512
513 2005-10-25 DJ Delorie <dj@redhat.com>
514
515 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
516 making one a macro of the other.
517
518 2005-10-21 DJ Delorie <dj@redhat.com>
519
520 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
521 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
522 indexld, indexls): .w variants have `1' bit.
523 (rot32.b): QI, not SI.
524 (rot32.w): HI, not SI.
525 (xchg16): HI for .w variant.
526
527 2005-10-19 Nick Clifton <nickc@redhat.com>
528
529 * m32r.opc (parse_slo16): Fix bad application of previous patch.
530
531 2005-10-18 Andreas Schwab <schwab@suse.de>
532
533 * m32r.opc (parse_slo16): Better version of previous patch.
534
535 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
536
537 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
538 size.
539
540 2005-07-25 DJ Delorie <dj@redhat.com>
541
542 * m32c.opc (parse_unsigned8): Add %dsp8().
543 (parse_signed8): Add %hi8().
544 (parse_unsigned16): Add %dsp16().
545 (parse_signed16): Add %lo16() and %hi16().
546 (parse_lab_5_3): Make valuep a bfd_vma *.
547
548 2005-07-18 Nick Clifton <nickc@redhat.com>
549
550 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
551 components.
552 (f-lab32-jmp-s): Fix insertion sequence.
553 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
554 (Dsp-40-s8): Make parameter be signed.
555 (Dsp-40-s16): Likewise.
556 (Dsp-48-s8): Likewise.
557 (Dsp-48-s16): Likewise.
558 (Imm-13-u3): Likewise. (Despite its name!)
559 (BitBase16-16-s8): Make the parameter be unsigned.
560 (BitBase16-8-u11-S): Likewise.
561 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
562 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
563 relaxation.
564
565 * m32c.opc: Fix formatting.
566 Use safe-ctype.h instead of ctype.h
567 Move duplicated code sequences into a macro.
568 Fix compile time warnings about signedness mismatches.
569 Remove dead code.
570 (parse_lab_5_3): New parser function.
571
572 2005-07-16 Jim Blandy <jimb@redhat.com>
573
574 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
575 to represent isa sets.
576
577 2005-07-15 Jim Blandy <jimb@redhat.com>
578
579 * m32c.cpu, m32c.opc: Fix copyright.
580
581 2005-07-14 Jim Blandy <jimb@redhat.com>
582
583 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
584
585 2005-07-14 Alan Modra <amodra@bigpond.net.au>
586
587 * ms1.opc (print_dollarhex): Correct format string.
588
589 2005-07-06 Alan Modra <amodra@bigpond.net.au>
590
591 * iq2000.cpu: Include from binutils cpu dir.
592
593 2005-07-05 Nick Clifton <nickc@redhat.com>
594
595 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
596 unsigned in order to avoid compile time warnings about sign
597 conflicts.
598
599 * ms1.opc (parse_*): Likewise.
600 (parse_imm16): Use a "void *" as it is passed both signed and
601 unsigned arguments.
602
603 2005-07-01 Nick Clifton <nickc@redhat.com>
604
605 * frv.opc: Update to ISO C90 function declaration style.
606 * iq2000.opc: Likewise.
607 * m32r.opc: Likewise.
608 * sh.opc: Likewise.
609
610 2005-06-15 Dave Brolley <brolley@redhat.com>
611
612 Contributed by Red Hat.
613 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
614 * ms1.opc: New file. Written by Stan Cox.
615
616 2005-05-10 Nick Clifton <nickc@redhat.com>
617
618 * Update the address and phone number of the FSF organization in
619 the GPL notices in the following files:
620 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
621 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
622 sh64-media.cpu, simplify.inc
623
624 2005-02-24 Alan Modra <amodra@bigpond.net.au>
625
626 * frv.opc (parse_A): Warning fix.
627
628 2005-02-23 Nick Clifton <nickc@redhat.com>
629
630 * frv.opc: Fixed compile time warnings about differing signed'ness
631 of pointers passed to functions.
632 * m32r.opc: Likewise.
633
634 2005-02-11 Nick Clifton <nickc@redhat.com>
635
636 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
637 'bfd_vma *' in order avoid compile time warning message.
638
639 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
640
641 * cris.cpu (mstep): Add missing insn.
642
643 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
644
645 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
646 * frv.cpu: Add support for TLS annotations in loads and calll.
647 * frv.opc (parse_symbolic_address): New.
648 (parse_ldd_annotation): New.
649 (parse_call_annotation): New.
650 (parse_ld_annotation): New.
651 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
652 Introduce TLS relocations.
653 (parse_d12, parse_s12, parse_u12): Likewise.
654 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
655 (parse_call_label, print_at): New.
656
657 2004-12-21 Mikael Starvik <starvik@axis.com>
658
659 * cris.cpu (cris-set-mem): Correct integral write semantics.
660
661 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
662
663 * cris.cpu: New file.
664
665 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
666
667 * iq2000.cpu: Added quotes around macro arguments so that they
668 will work with newer versions of guile.
669
670 2004-10-27 Nick Clifton <nickc@redhat.com>
671
672 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
673 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
674 operand.
675 * iq2000.cpu (dnop index): Rename to _index to avoid complications
676 with guile.
677
678 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
679
680 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
681
682 2004-05-15 Nick Clifton <nickc@redhat.com>
683
684 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
685
686 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
687
688 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
689
690 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
691
692 * frv.cpu (define-arch frv): Add fr450 mach.
693 (define-mach fr450): New.
694 (define-model fr450): New. Add profile units to every fr450 insn.
695 (define-attr UNIT): Add MDCUTSSI.
696 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
697 (define-attr AUDIO): New boolean.
698 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
699 (f-LRA-null, f-TLBPR-null): New fields.
700 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
701 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
702 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
703 (LRA-null, TLBPR-null): New macros.
704 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
705 (load-real-address): New macro.
706 (lrai, lrad, tlbpr): New instructions.
707 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
708 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
709 (mdcutssi): Change UNIT attribute to MDCUTSSI.
710 (media-low-clear-semantics, media-scope-limit-semantics)
711 (media-quad-limit, media-quad-shift): New macros.
712 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
713 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
714 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
715 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
716 (fr450_unit_mapping): New array.
717 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
718 for new MDCUTSSI unit.
719 (fr450_check_insn_major_constraints): New function.
720 (check_insn_major_constraints): Use it.
721
722 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
723
724 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
725 (scutss): Change unit to I0.
726 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
727 (mqsaths): Fix FR400-MAJOR categorization.
728 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
729 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
730 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
731 combinations.
732
733 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
734
735 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
736 (rstb, rsth, rst, rstd, rstq): Delete.
737 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
738
739 2004-02-23 Nick Clifton <nickc@redhat.com>
740
741 * Apply these patches from Renesas:
742
743 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
744
745 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
746 disassembling codes for 0x*2 addresses.
747
748 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
749
750 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
751
752 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
753
754 * cpu/m32r.cpu : Add new model m32r2.
755 Add new instructions.
756 Replace occurrances of 'Mitsubishi' with 'Renesas'.
757 Changed PIPE attr of push from O to OS.
758 Care for Little-endian of M32R.
759 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
760 Care for Little-endian of M32R.
761 (parse_slo16): signed extension for value.
762
763 2004-02-20 Andrew Cagney <cagney@redhat.com>
764
765 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
766 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
767
768 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
769 written by Ben Elliston.
770
771 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
772
773 * frv.cpu (UNIT): Add IACC.
774 (iacc-multiply-r-r): Use it.
775 * frv.opc (fr400_unit_mapping): Add entry for IACC.
776 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
777
778 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
779
780 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
781 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
782 cut&paste errors in shifting/truncating numerical operands.
783 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
784 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
785 (parse_uslo16): Likewise.
786 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
787 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
788 (parse_s12): Likewise.
789 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
790 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
791 (parse_uslo16): Likewise.
792 (parse_uhi16): Parse gothi and gotfuncdeschi.
793 (parse_d12): Parse got12 and gotfuncdesc12.
794 (parse_s12): Likewise.
795
796 2003-10-10 Dave Brolley <brolley@redhat.com>
797
798 * frv.cpu (dnpmop): New p-macro.
799 (GRdoublek): Use dnpmop.
800 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
801 (store-double-r-r): Use (.sym regtype doublek).
802 (r-store-double): Ditto.
803 (store-double-r-r-u): Ditto.
804 (conditional-store-double): Ditto.
805 (conditional-store-double-u): Ditto.
806 (store-double-r-simm): Ditto.
807 (fmovs): Assign to UNIT FMALL.
808
809 2003-10-06 Dave Brolley <brolley@redhat.com>
810
811 * frv.cpu, frv.opc: Add support for fr550.
812
813 2003-09-24 Dave Brolley <brolley@redhat.com>
814
815 * frv.cpu (u-commit): New modelling unit for fr500.
816 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
817 (commit-r): Use u-commit model for fr500.
818 (commit): Ditto.
819 (conditional-float-binary-op): Take profiling data as an argument.
820 Update callers.
821 (ne-float-binary-op): Ditto.
822
823 2003-09-19 Michael Snyder <msnyder@redhat.com>
824
825 * frv.cpu (nldqi): Delete unimplemented instruction.
826
827 2003-09-12 Dave Brolley <brolley@redhat.com>
828
829 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
830 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
831 frv_ref_SI to get input register referenced for profiling.
832 (clear-ne-flag-all): Pass insn profiling in as an argument.
833 (clrgr,clrfr,clrga,clrfa): Add profiling information.
834
835 2003-09-11 Michael Snyder <msnyder@redhat.com>
836
837 * frv.cpu: Typographical corrections.
838
839 2003-09-09 Dave Brolley <brolley@redhat.com>
840
841 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
842 (conditional-media-dual-complex, media-quad-complex): Likewise.
843
844 2003-09-04 Dave Brolley <brolley@redhat.com>
845
846 * frv.cpu (register-transfer): Pass in all attributes in on argument.
847 Update all callers.
848 (conditional-register-transfer): Ditto.
849 (cache-preload): Ditto.
850 (floating-point-conversion): Ditto.
851 (floating-point-neg): Ditto.
852 (float-abs): Ditto.
853 (float-binary-op-s): Ditto.
854 (conditional-float-binary-op): Ditto.
855 (ne-float-binary-op): Ditto.
856 (float-dual-arith): Ditto.
857 (ne-float-dual-arith): Ditto.
858
859 2003-09-03 Dave Brolley <brolley@redhat.com>
860
861 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
862 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
863 MCLRACC-1.
864 (A): Removed operand.
865 (A0,A1): New operands replace operand A.
866 (mnop): Now a real insn
867 (mclracc): Removed insn.
868 (mclracc-0, mclracc-1): New insns replace mclracc.
869 (all insns): Use new UNIT attributes.
870
871 2003-08-21 Nick Clifton <nickc@redhat.com>
872
873 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
874 and u-media-dual-btoh with output parameter.
875 (cmbtoh): Add profiling hack.
876
877 2003-08-19 Michael Snyder <msnyder@redhat.com>
878
879 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
880
881 2003-06-10 Doug Evans <dje@sebabeach.org>
882
883 * frv.cpu: Add IDOC attribute.
884
885 2003-06-06 Andrew Cagney <cagney@redhat.com>
886
887 Contributed by Red Hat.
888 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
889 Stan Cox, and Frank Ch. Eigler.
890 * iq2000.opc: New file. Written by Ben Elliston, Frank
891 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
892 * iq2000m.cpu: New file. Written by Jeff Johnston.
893 * iq10.cpu: New file. Written by Jeff Johnston.
894
895 2003-06-05 Nick Clifton <nickc@redhat.com>
896
897 * frv.cpu (FRintieven): New operand. An even-numbered only
898 version of the FRinti operand.
899 (FRintjeven): Likewise for FRintj.
900 (FRintkeven): Likewise for FRintk.
901 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
902 media-quad-arith-sat-semantics, media-quad-arith-sat,
903 conditional-media-quad-arith-sat, mdunpackh,
904 media-quad-multiply-semantics, media-quad-multiply,
905 conditional-media-quad-multiply, media-quad-complex-i,
906 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
907 conditional-media-quad-multiply-acc, munpackh,
908 media-quad-multiply-cross-acc-semantics, mdpackh,
909 media-quad-multiply-cross-acc, mbtoh-semantics,
910 media-quad-cross-multiply-cross-acc-semantics,
911 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
912 media-quad-cross-multiply-acc-semantics, cmbtoh,
913 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
914 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
915 cmhtob): Use new operands.
916 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
917 (parse_even_register): New function.
918
919 2003-06-03 Nick Clifton <nickc@redhat.com>
920
921 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
922 immediate value not unsigned.
923
924 2003-06-03 Andrew Cagney <cagney@redhat.com>
925
926 Contributed by Red Hat.
927 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
928 and Eric Christopher.
929 * frv.opc: New file. Written by Catherine Moore, and Dave
930 Brolley.
931 * simplify.inc: New file. Written by Doug Evans.
932
933 2003-05-02 Andrew Cagney <cagney@redhat.com>
934
935 * New file.
936
937 \f
938 Copyright (C) 2003-2012 Free Software Foundation, Inc.
939
940 Copying and distribution of this file, with or without modification,
941 are permitted in any medium without royalty provided the copyright
942 notice and this notice are preserved.
943
944 Local Variables:
945 mode: change-log
946 left-margin: 8
947 fill-column: 74
948 version-control: never
949 End:
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