cpu/frv.cpu

   1 ; Fujitsu FRV opcode support, for GNU Binutils.  -*- Scheme -*-
   2 ;
   3 ; Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc.
   4 ;
   5 ; Contributed by Red Hat Inc; developed under contract from Fujitsu.
   6 ;
   7 ; This file is part of the GNU Binutils.
   8 ;
   9 ; This program is free software; you can redistribute it and/or modify
  10 ; it under the terms of the GNU General Public License as published by
  11 ; the Free Software Foundation; either version 2 of the License, or
  12 ; (at your option) any later version.
  13 ;
  14 ; This program is distributed in the hope that it will be useful,
  15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 ; GNU General Public License for more details.
  18 ;
  19 ; You should have received a copy of the GNU General Public License
  20 ; along with this program; if not, write to the Free Software
  21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 (include "simplify.inc")
  24
  25 ; define-arch must appear first
  26
  27 (define-arch
  28   (name frv) ; name of cpu architecture
  29   (comment "Fujitsu FRV")
  30   (insn-lsb0? #t)
  31   (machs frv fr550 fr500 fr450 fr400 tomcat simple)
  32   (isas frv)
  33 )
  34
  35 (define-isa
  36   (name frv)
  37   (base-insn-bitsize 32)
  38   ; Initial bitnumbers to decode insns by.
  39   (decode-assist (24 23 22 21 20 19 18))
  40   (liw-insns 1)       ; The frv fetches  up to 1 insns at a time.
  41   (parallel-insns 8)  ; The frv executes up to 8 insns at a time.
  42 )
  43
  44 ; Cpu family definitions.
  45 ;
  46 (define-cpu
  47   ; cpu names must be distinct from the architecture name and machine names.
  48   ; The "b" suffix stands for "base" and is the convention.
  49   ; The "f" suffix stands for "family" and is the convention.
  50   (name frvbf)
  51   (comment "Fujitsu FRV base family")
  52   (endian big)
  53   (word-bitsize 32)
  54 )
  55 \f
  56 ; Generic FR-V machine. Supports the entire architecture
  57 (define-mach
  58   (name frv)
  59   (comment "Generic FRV cpu")
  60   (cpu frvbf)
  61 )
  62 (define-model
  63   (name frv) (comment "Generic FRV model") (attrs)
  64   (mach frv)
  65
  66   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
  67
  68   ; `state' is a list of variables for recording model state
  69   ; (state)
  70
  71   (unit u-exec "Execution Unit" ()
  72         1 1 ; issue done
  73         () ; state
  74         () ; inputs
  75         () ; outputs
  76         () ; profile action (default)
  77         )
  78 )
  79 \f
  80 ; FR550 machine
  81 (define-mach
  82   (name fr550)
  83   (comment "FR550 cpu")
  84   (cpu frvbf)
  85 )
  86 (define-model
  87   (name fr550) (comment "FR550 model") (attrs)
  88   (mach fr550)
  89
  90   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
  91
  92   ; `state' is a list of variables for recording model state
  93   (state
  94    ; State items
  95    ; These are all masks with each bit representing one register.
  96    (prev-fr-load      DI) ; Previous use of FR  register was target of a load
  97    (prev-fr-complex-1 DI) ; Previous use of FR  register has variable latency
  98    (prev-fr-complex-2 DI) ; Previous use of FR  register has variable latency
  99    (prev-ccr-complex  DI) ; Previous use of CCR register has variable latency
 100    (prev-acc-mmac     DI) ; Previous use of ACC register was a MMAC category
 101    (cur-fr-load       DI) ; Current  use of FR  register was target of a load
 102    (cur-fr-complex-1  DI) ; Current  use of FR  register has variable latency
 103    (cur-fr-complex-2  DI) ; Current  use of FR  register has variable latency
 104    (cur-ccr-complex   SI) ; Current  use of CCR register has variable latency
 105    (cur-acc-mmac      DI) ; Current  use of ACC register was a MMAC category
 106   )
 107   ; Basic unit for instructions with no latency penalties
 108   (unit u-exec "Execution Unit" ()
 109         1 1 ; issue done
 110         () ; state
 111         () ; inputs
 112         () ; outputs
 113         () ; profile action (default)
 114         )
 115   ; Basic integer insn unit
 116   (unit u-integer "Integer Unit" ()
 117         1 1 ; issue done
 118         () ; state
 119         ((GRi INT -1) (GRj INT -1)) ; inputs
 120         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 121         () ; profile action (default)
 122         )
 123   ; Integer multiplication unit
 124   (unit u-imul "Integer Multiplication Unit" ()
 125         1 1 ; issue done
 126         () ; state
 127         ((GRi INT -1) (GRj INT -1)) ; inputs
 128         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
 129         () ; profile action (default)
 130         )
 131   ; Integer division unit
 132   (unit u-idiv "Integer Division Unit" ()
 133         1 1 ; issue done
 134         () ; state
 135         ((GRi INT -1) (GRj INT -1)) ; inputs
 136         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 137         () ; profile action (default)
 138         )
 139   ; Branch unit
 140   (unit u-branch "Branch Unit" ()
 141         1 1 ; issue done
 142         () ; state
 143         ((GRi INT -1) (GRj INT -1)
 144          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 145         ((pc)) ; outputs
 146         () ; profile action (default)
 147         )
 148   ; Trap unit
 149   (unit u-trap "Trap Unit" ()
 150         1 1 ; issue done
 151         () ; state
 152         ((GRi INT -1) (GRj INT -1)
 153          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 154         () ; outputs
 155         () ; profile action (default)
 156         )
 157   ; Condition code check unit
 158   (unit u-check "Check Unit" ()
 159         1 1 ; issue done
 160         () ; state
 161         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
 162         () ; outputs
 163         () ; profile action (default)
 164         )
 165   ; Float Arithmetic unit
 166   (unit u-float-arith "Float Arithmetic unit" ()
 167         1 1 ; issue done
 168         () ; state
 169         ((FRi INT -1) (FRj INT -1) ; inputs
 170          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 171         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 172         () ; profile action (default)
 173         )
 174   ; Float Dual Arithmetic unit
 175   (unit u-float-dual-arith "Float Arithmetic unit" ()
 176         ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
 177         1 3 ; issue done
 178         () ; state
 179         ((FRi INT -1) (FRj INT -1) ; inputs
 180          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 181         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 182         () ; profile action (default)
 183         )
 184   ; Float Div unit
 185   (unit u-float-div "Float Div unit" ()
 186         1 1 ; issue done
 187         () ; state
 188         ((FRi INT -1) (FRj INT -1)) ; inputs
 189         ((FRk INT -1)) ; outputs
 190         () ; profile action (default)
 191         )
 192   ; Float Square Root unit
 193   (unit u-float-sqrt "Float Square Root unit" ()
 194         1 1 ; issue done
 195         () ; state
 196         ((FRj INT -1) (FRdoublej INT -1)) ; inputs
 197         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 198         () ; profile action (default)
 199         )
 200   ; Float Compare unit
 201   (unit u-float-compare "Float Compare unit" ()
 202         1 1 ; issue done
 203         () ; state
 204         ((FRi INT -1) (FRj INT -1)
 205          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 206         ((FCCi_2 INT -1)) ; outputs
 207         () ; profile action (default)
 208         )
 209   ; Dual Float Compare unit
 210   (unit u-float-dual-compare "Float Dual Compare unit" ()
 211         ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
 212         1 3 ; issue done
 213         () ; state
 214         ((FRi INT -1) (FRj INT -1)) ; inputs
 215         ((FCCi_2 INT -1)) ; outputs
 216         () ; profile action (default)
 217         )
 218   ; FR Move to GR unit
 219   (unit u-fr2gr "FR Move to GR Unit" ()
 220         1 1 ; issue done
 221         () ; state
 222         ((FRintk INT -1)) ; inputs
 223         ((GRj INT -1)) ; outputs
 224         () ; profile action (default)
 225         )
 226   ; GR Move to FR unit
 227   (unit u-gr2fr "GR Move to FR Unit" ()
 228         1 1 ; issue done
 229         () ; state
 230         ((GRj INT -1)) ; inputs
 231         ((FRintk INT -1)) ; outputs
 232         () ; profile action (default)
 233         )
 234   ; SPR Move to GR unit
 235   (unit u-spr2gr "SPR Move to GR Unit" ()
 236         1 1 ; issue done
 237         () ; state
 238         ((spr INT -1)) ; inputs
 239         ((GRj INT -1)) ; outputs
 240         () ; profile action (default)
 241         )
 242   ; GR Move to SPR unit
 243   (unit u-gr2spr "GR Move to SPR Unit" ()
 244         1 1 ; issue done
 245         () ; state
 246         ((GRj INT -1)) ; inputs
 247         ((spr INT -1)) ; outputs
 248         () ; profile action (default)
 249         )
 250   ; GR set half unit
 251   (unit u-set-hilo "GR Set Half" ()
 252         1 1 ; issue done
 253         () ; state
 254         () ; inputs
 255         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
 256         () ; profile action (default)
 257         )
 258   ; GR load unit
 259   (unit u-gr-load "GR Load Unit" ()
 260         1 1 ; issue done
 261         () ; state
 262         ((GRi INT -1) (GRj INT -1)) ; inputs
 263         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
 264         () ; profile action (default)
 265         )
 266   ; GR store unit
 267   (unit u-gr-store "GR Store Unit" ()
 268         1 1 ; issue done
 269         () ; state
 270         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
 271         () ; outputs
 272         () ; profile action (default)
 273         )
 274   ; FR load unit
 275   (unit u-fr-load "FR Load Unit" ()
 276         1 1 ; issue done
 277         () ; state
 278         ((GRi INT -1) (GRj INT -1)) ; inputs
 279         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
 280         () ; profile action (default)
 281         )
 282   ; FR store unit
 283   (unit u-fr-store "FR Store Unit" ()
 284         1 1 ; issue done
 285         () ; state
 286         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
 287         () ; outputs
 288         () ; profile action (default)
 289         )
 290   ; Swap unit
 291   (unit u-swap "Swap Unit" ()
 292         1 1 ; issue done
 293         () ; state
 294         ((GRi INT -1) (GRj INT -1)) ; inputs
 295         ((GRk INT -1)) ; outputs
 296         () ; profile action (default)
 297         )
 298   ; FR Move to FR unit
 299   (unit u-fr2fr "FR Move to FR Unit" ()
 300         1 1 ; issue done
 301         () ; state
 302         ((FRi INT -1)) ; inputs
 303         ((FRk INT -1)) ; outputs
 304         () ; profile action (default)
 305         )
 306   ; Clrgr unit
 307   (unit u-clrgr "Clrgr Unit" ()
 308         1 1 ; issue done
 309         () ; state
 310         ((GRk INT -1)) ; inputs
 311         () ; outputs
 312         () ; profile action (default)
 313         )
 314   ; Clrfr unit
 315   (unit u-clrfr "Clrfr Unit" ()
 316         1 1 ; issue done
 317         () ; state
 318         ((FRk INT -1)) ; inputs
 319         () ; outputs
 320         () ; profile action (default)
 321         )
 322   ; Insn cache invalidate unit
 323   (unit u-ici "Insn cache invalidate unit" ()
 324         1 1 ; issue done
 325         () ; state
 326         ((GRi INT -1) (GRj INT -1)) ; inputs
 327         () ; outputs
 328         () ; profile action (default)
 329         )
 330   ; Data cache invalidate unit
 331   (unit u-dci "Data cache invalidate unit" ()
 332         1 1 ; issue done
 333         () ; state
 334         ((GRi INT -1) (GRj INT -1)) ; inputs
 335         () ; outputs
 336         () ; profile action (default)
 337         )
 338   ; Data cache flush unit
 339   (unit u-dcf "Data cache flush unit" ()
 340         1 1 ; issue done
 341         () ; state
 342         ((GRi INT -1) (GRj INT -1)) ; inputs
 343         () ; outputs
 344         () ; profile action (default)
 345         )
 346   ; Insn cache preload unit
 347   (unit u-icpl "Insn cache preload unit" ()
 348         1 1 ; issue done
 349         () ; state
 350         ((GRi INT -1) (GRj INT -1)) ; inputs
 351         () ; outputs
 352         () ; profile action (default)
 353         )
 354   ; Data cache preload unit
 355   (unit u-dcpl "Data cache preload unit" ()
 356         1 1 ; issue done
 357         () ; state
 358         ((GRi INT -1) (GRj INT -1)) ; inputs
 359         () ; outputs
 360         () ; profile action (default)
 361         )
 362   ; Insn cache unlock unit
 363   (unit u-icul "Insn cache unlock unit" ()
 364         1 1 ; issue done
 365         () ; state
 366         ((GRi INT -1) (GRj INT -1)) ; inputs
 367         () ; outputs
 368         () ; profile action (default)
 369         )
 370   ; Data cache unlock unit
 371   (unit u-dcul "Data cache unlock unit" ()
 372         1 1 ; issue done
 373         () ; state
 374         ((GRi INT -1) (GRj INT -1)) ; inputs
 375         () ; outputs
 376         () ; profile action (default)
 377         )
 378   ; commit unit
 379   (unit u-commit "Commit Unit" ()
 380         1 1 ; issue done
 381         () ; state
 382         ((GRk INT -1) (FRk INT -1)) ; inputs
 383         () ; outputs
 384         () ; profile action (default)
 385         )
 386   ; Float Conversion unit
 387   (unit u-float-convert "Float Conversion unit" ()
 388         1 1 ; issue done
 389         () ; state
 390         ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
 391         ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
 392         () ; profile action (default)
 393         )
 394   ; Media units
 395   (unit u-media "Media unit" ()
 396         1 1 ; issue done
 397         () ; state
 398         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 399         ((FRintk INT -1)) ; outputs
 400         () ; profile action (default)
 401         )
 402   (unit u-media-quad "Media-quad unit" ()
 403         1 1 ; issue done
 404         () ; state
 405         ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
 406         ((FRintkeven INT -1)) ; outputs
 407         () ; profile action (default)
 408         )
 409   (unit u-media-dual-expand "Media Dual Expand unit" ()
 410         1 1 ; issue done
 411         () ; state
 412         ((FRinti INT -1)) ; inputs
 413         ((FRintkeven INT -1)) ; outputs
 414         () ; profile action (default)
 415         )
 416   (unit u-media-3-dual "Media-3-dual unit" ()
 417         1 1 ; issue done
 418         () ; state
 419         ((FRinti INT -1)) ; inputs
 420         ((FRintk INT -1)) ; outputs
 421         () ; profile action (default)
 422         )
 423   (unit u-media-3-acc "Media unit for M-3 using ACC" ()
 424         1 1 ; issue done
 425         () ; state
 426         ((FRintj INT -1) (ACC40Si INT -1)) ; inputs
 427         ((FRintk INT -1)) ; outputs
 428         () ; profile action (default)
 429         )
 430   (unit u-media-3-acc-dual "Media-3-acc-dual unit" ()
 431         1 1 ; issue done
 432         () ; state
 433         ((ACC40Si INT -1)) ; inputs
 434         ((FRintkeven INT -1)) ; outputs
 435         () ; profile action (default)
 436         )
 437   (unit u-media-3-wtacc "Media-3-wtacc unit" ()
 438         1 1 ; issue done
 439         () ; state
 440         ((FRinti INT -1) (ACC40Sk INT -1)) ; inputs
 441         () ; outputs
 442         () ; profile action (default)
 443         )
 444   (unit u-media-3-mclracc "Media-3-mclracc unit" ()
 445         1 1 ; issue done
 446         () ; state
 447         () ; inputs
 448         () ; outputs
 449         () ; profile action (default)
 450         )
 451   (unit u-media-set "Media set" ()
 452         1 1 ; issue done
 453         () ; state
 454         () ; inputs
 455         ((FRintk INT -1)) ; outputs
 456         () ; profile action (default)
 457         )
 458   (unit u-media-4 "Media-4 unit" ()
 459         1 1 ; issue done
 460         () ; state
 461         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 462         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 463         () ; profile action (default)
 464         )
 465   (unit u-media-4-acc "Media-4-acc unit" ()
 466         1 1 ; issue done
 467         () ; state
 468         ((ACC40Si INT -1)) ; inputs
 469         ((ACC40Sk INT -1)) ; outputs
 470         () ; profile action (default)
 471         )
 472   (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
 473         1 1 ; issue done
 474         () ; state
 475         ((ACC40Si INT -1)) ; inputs
 476         ((ACC40Sk INT -1)) ; outputs
 477         () ; profile action (default)
 478         )
 479   (unit u-media-4-add-sub "Media-4-add-sub unit" ()
 480         1 1 ; issue done
 481         () ; state
 482         ((ACC40Si INT -1)) ; inputs
 483         ((ACC40Sk INT -1)) ; outputs
 484         () ; profile action (default)
 485         )
 486   (unit u-media-4-add-sub-dual "Media-4-add-sub-dual unit" ()
 487         1 1 ; issue done
 488         () ; state
 489         ((ACC40Si INT -1)) ; inputs
 490         ((ACC40Sk INT -1)) ; outputs
 491         () ; profile action (default)
 492         )
 493   (unit u-media-4-quad "Media-4-quad unit" ()
 494         1 1 ; issue done
 495         () ; state
 496         ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
 497         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 498         () ; profile action (default)
 499         )
 500 )
 501
 502 ; FR500 machine.
 503 (define-mach
 504   (name fr500)
 505   (comment "FR500 cpu")
 506   (cpu frvbf)
 507 )
 508 (define-model
 509   (name fr500) (comment "FR500 model") (attrs)
 510   (mach fr500)
 511
 512   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
 513
 514   ; `state' is a list of variables for recording model state
 515   (state
 516    ; State items
 517    ; These are all masks with each bit representing one register.
 518    (prev-fpop       DI) ; Previous use of FR register was floating point insn
 519    (prev-media      DI) ; Previous use of FR register was a media insn
 520    (prev-cc-complex DI) ; Previous use of ICC register was not simple
 521    (cur-fpop        DI) ; Current use of FR register was floating point insn
 522    (cur-media       DI) ; Current use of FR register was a media insn
 523    (cur-cc-complex  DI) ; Current use of ICC register was not simple
 524   )
 525   ; Basic unit for instructions with no latency penalties
 526   (unit u-exec "Execution Unit" ()
 527         1 1 ; issue done
 528         () ; state
 529         () ; inputs
 530         () ; outputs
 531         () ; profile action (default)
 532         )
 533   ; Basic integer insn unit
 534   (unit u-integer "Integer Unit" ()
 535         1 1 ; issue done
 536         () ; state
 537         ((GRi INT -1) (GRj INT -1)) ; inputs
 538         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 539         () ; profile action (default)
 540         )
 541   ; Integer multiplication unit
 542   (unit u-imul "Integer Multiplication Unit" ()
 543         1 1 ; issue done
 544         () ; state
 545         ((GRi INT -1) (GRj INT -1)) ; inputs
 546         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
 547         () ; profile action (default)
 548         )
 549   ; Integer division unit
 550   (unit u-idiv "Integer Division Unit" ()
 551         1 1 ; issue done
 552         () ; state
 553         ((GRi INT -1) (GRj INT -1)) ; inputs
 554         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 555         () ; profile action (default)
 556         )
 557   ; Branch unit
 558   (unit u-branch "Branch Unit" ()
 559         1 1 ; issue done
 560         () ; state
 561         ((GRi INT -1) (GRj INT -1)
 562          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 563         ((pc)) ; outputs
 564         () ; profile action (default)
 565         )
 566   ; Trap unit
 567   (unit u-trap "Trap Unit" ()
 568         1 1 ; issue done
 569         () ; state
 570         ((GRi INT -1) (GRj INT -1)
 571          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 572         () ; outputs
 573         () ; profile action (default)
 574         )
 575   ; Condition code check unit
 576   (unit u-check "Check Unit" ()
 577         1 1 ; issue done
 578         () ; state
 579         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
 580         () ; outputs
 581         () ; profile action (default)
 582         )
 583   ; Clrgr unit
 584   (unit u-clrgr "Clrgr Unit" ()
 585         1 1 ; issue done
 586         () ; state
 587         ((GRk INT -1)) ; inputs
 588         () ; outputs
 589         () ; profile action (default)
 590         )
 591   ; Clrfr unit
 592   (unit u-clrfr "Clrfr Unit" ()
 593         1 1 ; issue done
 594         () ; state
 595         ((FRk INT -1)) ; inputs
 596         () ; outputs
 597         () ; profile action (default)
 598         )
 599   ; GR set half unit
 600   (unit u-set-hilo "GR Set Half" ()
 601         1 1 ; issue done
 602         () ; state
 603         () ; inputs
 604         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
 605         () ; profile action (default)
 606         )
 607   ; GR load unit -- TODO doesn't handle quad
 608   (unit u-gr-load "GR Load Unit" ()
 609         1 1 ; issue done
 610         () ; state
 611         ((GRi INT -1) (GRj INT -1)) ; inputs
 612         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
 613         () ; profile action (default)
 614         )
 615   ; GR store unit -- TODO doesn't handle quad
 616   (unit u-gr-store "GR Store Unit" ()
 617         1 1 ; issue done
 618         () ; state
 619         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
 620         () ; outputs
 621         () ; profile action (default)
 622         )
 623   ; GR recovering store unit -- TODO doesn't handle quad
 624   (unit u-gr-r-store "GR Recovering Store Unit" ()
 625         1 1 ; issue done
 626         () ; state
 627         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
 628         () ; outputs
 629         () ; profile action (default)
 630         )
 631   ; FR load unit -- TODO doesn't handle quad
 632   (unit u-fr-load "FR Load Unit" ()
 633         1 1 ; issue done
 634         () ; state
 635         ((GRi INT -1) (GRj INT -1)) ; inputs
 636         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
 637         () ; profile action (default)
 638         )
 639   ; FR store unit -- TODO doesn't handle quad
 640   (unit u-fr-store "FR Store Unit" ()
 641         1 1 ; issue done
 642         () ; state
 643         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
 644         () ; outputs
 645         () ; profile action (default)
 646         )
 647   ; FR recovering store unit -- TODO doesn't handle quad
 648   (unit u-fr-r-store "FR Recovering Store Unit" ()
 649         1 1 ; issue done
 650         () ; state
 651         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
 652         () ; outputs
 653         () ; profile action (default)
 654         )
 655   ; Swap unit
 656   (unit u-swap "Swap Unit" ()
 657         1 1 ; issue done
 658         () ; state
 659         ((GRi INT -1) (GRj INT -1)) ; inputs
 660         ((GRk INT -1)) ; outputs
 661         () ; profile action (default)
 662         )
 663   ; FR Move to FR unit
 664   (unit u-fr2fr "FR Move to FR Unit" ()
 665         1 1 ; issue done
 666         () ; state
 667         ((FRi INT -1)) ; inputs
 668         ((FRk INT -1)) ; outputs
 669         () ; profile action (default)
 670         )
 671   ; FR Move to GR unit
 672   (unit u-fr2gr "FR Move to GR Unit" ()
 673         1 1 ; issue done
 674         () ; state
 675         ((FRintk INT -1)) ; inputs
 676         ((GRj INT -1)) ; outputs
 677         () ; profile action (default)
 678         )
 679   ; SPR Move to GR unit
 680   (unit u-spr2gr "SPR Move to GR Unit" ()
 681         1 1 ; issue done
 682         () ; state
 683         ((spr INT -1)) ; inputs
 684         ((GRj INT -1)) ; outputs
 685         () ; profile action (default)
 686         )
 687   ; GR Move to FR unit
 688   (unit u-gr2fr "GR Move to FR Unit" ()
 689         1 1 ; issue done
 690         () ; state
 691         ((GRj INT -1)) ; inputs
 692         ((FRintk INT -1)) ; outputs
 693         () ; profile action (default)
 694         )
 695   ; GR Move to SPR unit
 696   (unit u-gr2spr "GR Move to SPR Unit" ()
 697         1 1 ; issue done
 698         () ; state
 699         ((GRj INT -1)) ; inputs
 700         ((spr INT -1)) ; outputs
 701         () ; profile action (default)
 702         )
 703   ; Float Arithmetic unit
 704   (unit u-float-arith "Float Arithmetic unit" ()
 705         1 1 ; issue done
 706         () ; state
 707         ((FRi INT -1) (FRj INT -1) ; inputs
 708          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 709         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 710         () ; profile action (default)
 711         )
 712   ; Float Dual Arithmetic unit
 713   (unit u-float-dual-arith "Float Arithmetic unit" ()
 714         1 1 ; issue done
 715         () ; state
 716         ((FRi INT -1) (FRj INT -1) ; inputs
 717          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 718         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 719         () ; profile action (default)
 720         )
 721   ; Float Div unit
 722   (unit u-float-div "Float Div unit" ()
 723         1 1 ; issue done
 724         () ; state
 725         ((FRi INT -1) (FRj INT -1)) ; inputs
 726         ((FRk INT -1)) ; outputs
 727         () ; profile action (default)
 728         )
 729   ; Float Square Root unit
 730   (unit u-float-sqrt "Float Square Root unit" ()
 731         1 1 ; issue done
 732         () ; state
 733         ((FRj INT -1) (FRdoublej INT -1)) ; inputs
 734         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 735         () ; profile action (default)
 736         )
 737   ; Float Dual Square Root unit
 738   (unit u-float-dual-sqrt "Float Dual Square Root unit" ()
 739         1 1 ; issue done
 740         () ; state
 741         ((FRj INT -1)) ; inputs
 742         ((FRk INT -1)) ; outputs
 743         () ; profile action (default)
 744         )
 745   ; Float Compare unit
 746   (unit u-float-compare "Float Compare unit" ()
 747         1 1 ; issue done
 748         () ; state
 749         ((FRi INT -1) (FRj INT -1)
 750          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 751         ((FCCi_2 INT -1)) ; outputs
 752         () ; profile action (default)
 753         )
 754   ; Dual Float Compare unit
 755   (unit u-float-dual-compare "Float Dual Compare unit" ()
 756         1 1 ; issue done
 757         () ; state
 758         ((FRi INT -1) (FRj INT -1)) ; inputs
 759         ((FCCi_2 INT -1)) ; outputs
 760         () ; profile action (default)
 761         )
 762   ; Float Conversion unit
 763   (unit u-float-convert "Float Conversion unit" ()
 764         1 1 ; issue done
 765         () ; state
 766         ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
 767         ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
 768         () ; profile action (default)
 769         )
 770   ; Dual Float Conversion unit
 771   (unit u-float-dual-convert "Float Dual Conversion unit" ()
 772         1 1 ; issue done
 773         () ; state
 774         ((FRj INT -1) (FRintj INT -1)) ; inputs
 775         ((FRk INT -1) (FRintk INT -1)) ; outputs
 776         () ; profile action (default)
 777         )
 778   ; Media unit
 779   (unit u-media "Media unit" ()
 780         1 1 ; issue done
 781         () ; state
 782         ((FRinti INT -1) (FRintj INT -1) (ACC40Si INT -1) (ACCGi INT -1)) ; inputs
 783         ((FRintk INT -1) (ACC40Sk INT -1) (ACC40Uk INT -1) (ACCGk INT -1)) ; outputs
 784         () ; profile action (default)
 785         )
 786   ; Media Quad Arithmetic unit
 787   (unit u-media-quad-arith "Media Quad Arithmetic unit" ()
 788         1 1 ; issue done
 789         () ; state
 790         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 791         ((FRintk INT -1)) ; outputs
 792         () ; profile action (default)
 793         )
 794   ; Media Dual Multiplication unit
 795   (unit u-media-dual-mul "Media Dual Multiplication unit" ()
 796         1 1 ; issue done
 797         () ; state
 798         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 799         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 800         () ; profile action (default)
 801         )
 802   ; Media Quad Multiplication unit
 803   (unit u-media-quad-mul "Media Quad Multiplication unit" ()
 804         1 1 ; issue done
 805         () ; state
 806         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 807         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 808         () ; profile action (default)
 809         )
 810   ; Media Quad Complex unit
 811   (unit u-media-quad-complex "Media Quad Complex unit" ()
 812         1 1 ; issue done
 813         () ; state
 814         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 815         ((ACC40Sk INT -1)) ; outputs
 816         () ; profile action (default)
 817         )
 818   ; Media Dual Expand unit
 819   (unit u-media-dual-expand "Media Dual Expand unit" ()
 820         1 1 ; issue done
 821         () ; state
 822         ((FRinti INT -1)) ; inputs
 823         ((FRintk INT -1)) ; outputs
 824         () ; profile action (default)
 825         )
 826   ; Media Dual Unpack unit
 827   (unit u-media-dual-unpack "Media Dual Unpack unit" ()
 828         1 1 ; issue done
 829         () ; state
 830         ((FRinti INT -1)) ; inputs
 831         ((FRintk INT -1)) ; outputs
 832         () ; profile action (default)
 833         )
 834   ; Media Dual byte to half unit
 835   (unit u-media-dual-btoh "Media Byte to byte" ()
 836         1 1 ; issue done
 837         () ; state
 838         ((FRintj INT -1)) ; inputs
 839         ((FRintk INT -1)) ; outputs
 840         () ; profile action (default)
 841         )
 842   ; Media Dual half to byte unit
 843   (unit u-media-dual-htob "Media Half to byte" ()
 844         1 1 ; issue done
 845         () ; state
 846         ((FRintj INT -1)) ; inputs
 847         ((FRintk INT -1)) ; outputs
 848         () ; profile action (default)
 849         )
 850   ; Media Dual byte to half unit extended
 851   (unit u-media-dual-btohe "Media Byte to byte extended" ()
 852         1 1 ; issue done
 853         () ; state
 854         ((FRintj INT -1)) ; inputs
 855         ((FRintk INT -1)) ; outputs
 856         () ; profile action (default)
 857         )
 858   ; Barrier unit
 859   (unit u-barrier "Barrier unit" ()
 860         1 1 ; issue done
 861         () ; state
 862         () ; inputs
 863         () ; outputs
 864         () ; profile action (default)
 865         )
 866   ; Memory Barrier unit
 867   (unit u-membar "Memory Barrier unit" ()
 868         1 1 ; issue done
 869         () ; state
 870         () ; inputs
 871         () ; outputs
 872         () ; profile action (default)
 873         )
 874   ; Insn cache invalidate unit
 875   (unit u-ici "Insn cache invalidate unit" ()
 876         1 1 ; issue done
 877         () ; state
 878         ((GRi INT -1) (GRj INT -1)) ; inputs
 879         () ; outputs
 880         () ; profile action (default)
 881         )
 882   ; Data cache invalidate unit
 883   (unit u-dci "Data cache invalidate unit" ()
 884         1 1 ; issue done
 885         () ; state
 886         ((GRi INT -1) (GRj INT -1)) ; inputs
 887         () ; outputs
 888         () ; profile action (default)
 889         )
 890   ; Data cache flush unit
 891   (unit u-dcf "Data cache flush unit" ()
 892         1 1 ; issue done
 893         () ; state
 894         ((GRi INT -1) (GRj INT -1)) ; inputs
 895         () ; outputs
 896         () ; profile action (default)
 897         )
 898   ; Insn cache preload unit
 899   (unit u-icpl "Insn cache preload unit" ()
 900         1 1 ; issue done
 901         () ; state
 902         ((GRi INT -1) (GRj INT -1)) ; inputs
 903         () ; outputs
 904         () ; profile action (default)
 905         )
 906   ; Data cache preload unit
 907   (unit u-dcpl "Data cache preload unit" ()
 908         1 1 ; issue done
 909         () ; state
 910         ((GRi INT -1) (GRj INT -1)) ; inputs
 911         () ; outputs
 912         () ; profile action (default)
 913         )
 914   ; Insn cache unlock unit
 915   (unit u-icul "Insn cache unlock unit" ()
 916         1 1 ; issue done
 917         () ; state
 918         ((GRi INT -1) (GRj INT -1)) ; inputs
 919         () ; outputs
 920         () ; profile action (default)
 921         )
 922   ; Data cache unlock unit
 923   (unit u-dcul "Data cache unlock unit" ()
 924         1 1 ; issue done
 925         () ; state
 926         ((GRi INT -1) (GRj INT -1)) ; inputs
 927         () ; outputs
 928         () ; profile action (default)
 929         )
 930   ; commit unit
 931   (unit u-commit "Commit Unit" ()
 932         1 1 ; issue done
 933         () ; state
 934         ((GRk INT -1) (FRk INT -1)) ; inputs
 935         () ; outputs
 936         () ; profile action (default)
 937         )
 938 )
 939 \f
 940 ; Tomcat machine. Early version of fr500 machine
 941 (define-mach
 942   (name tomcat)
 943   (comment "Tomcat -- early version of fr500")
 944   (cpu frvbf)
 945 )
 946 (define-model
 947   (name tomcat) (comment "Tomcat model") (attrs)
 948   (mach tomcat)
 949
 950   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
 951
 952   ; `state' is a list of variables for recording model state
 953   ; (state)
 954
 955   (unit u-exec "Execution Unit" ()
 956         1 1 ; issue done
 957         () ; state
 958         () ; inputs
 959         () ; outputs
 960         () ; profile action (default)
 961         )
 962 )
 963 \f
 964 ; FR400 machine
 965 (define-mach
 966   (name fr400)
 967   (comment "FR400 cpu")
 968   (cpu frvbf)
 969 )
 970 (define-model
 971   (name fr400) (comment "FR400 model") (attrs)
 972   (mach fr400)
 973   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
 974   ; `state' is a list of variables for recording model state
 975   (state
 976    ; State items
 977    ; These are all masks with each bit representing one register.
 978    (prev-fp-load    DI) ; Previous use of FR  register was floating point load
 979    (prev-fr-p4      DI) ; Previous use of FR  register was media unit 4
 980    (prev-fr-p6      DI) ; Previous use of FR  register was media unit 6
 981    (prev-acc-p2     DI) ; Previous use of ACC register was media unit 2
 982    (prev-acc-p4     DI) ; Previous use of ACC register was media unit 4
 983    (cur-fp-load     DI) ; Current  use of FR  register is  floating point load
 984    (cur-fr-p4       DI) ; Current  use of FR  register is  media unit 4
 985    (cur-fr-p6       DI) ; Current  use of FR  register is  media unit 6
 986    (cur-acc-p2      DI) ; Current  use of ACC register is  media unit 2
 987    (cur-acc-p4      DI) ; Current  use of ACC register is  media unit 4
 988   )
 989   (unit u-exec "Execution Unit" ()
 990         1 1 ; issue done
 991         () ; state
 992         () ; inputs
 993         () ; outputs
 994         () ; profile action (default)
 995         )
 996   ; Basic integer insn unit
 997   (unit u-integer "Integer Unit" ()
 998         1 1 ; issue done
 999         () ; state
1000         ((GRi INT -1) (GRj INT -1)) ; inputs
1001         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1002         () ; profile action (default)
1003         )
1004   ; Integer multiplication unit
1005   (unit u-imul "Integer Multiplication Unit" ()
1006         1 1 ; issue done
1007         () ; state
1008         ((GRi INT -1) (GRj INT -1)) ; inputs
1009         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
1010         () ; profile action (default)
1011         )
1012   ; Integer division unit
1013   (unit u-idiv "Integer Division Unit" ()
1014         1 1 ; issue done
1015         () ; state
1016         ((GRi INT -1) (GRj INT -1)) ; inputs
1017         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1018         () ; profile action (default)
1019         )
1020   ; Branch unit
1021   (unit u-branch "Branch Unit" ()
1022         1 1 ; issue done
1023         () ; state
1024         ((GRi INT -1) (GRj INT -1)
1025          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1026         ((pc)) ; outputs
1027         () ; profile action (default)
1028         )
1029   ; Trap unit
1030   (unit u-trap "Trap Unit" ()
1031         1 1 ; issue done
1032         () ; state
1033         ((GRi INT -1) (GRj INT -1)
1034          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1035         () ; outputs
1036         () ; profile action (default)
1037         )
1038   ; Condition code check unit
1039   (unit u-check "Check Unit" ()
1040         1 1 ; issue done
1041         () ; state
1042         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
1043         () ; outputs
1044         () ; profile action (default)
1045         )
1046   ; GR set half unit
1047   (unit u-set-hilo "GR Set Half" ()
1048         1 1 ; issue done
1049         () ; state
1050         () ; inputs
1051         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
1052         () ; profile action (default)
1053         )
1054   ; GR load unit -- TODO doesn't handle quad
1055   (unit u-gr-load "GR Load Unit" ()
1056         1 1 ; issue done
1057         () ; state
1058         ((GRi INT -1) (GRj INT -1)) ; inputs
1059         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
1060         () ; profile action (default)
1061         )
1062   ; GR store unit -- TODO doesn't handle quad
1063   (unit u-gr-store "GR Store Unit" ()
1064         1 1 ; issue done
1065         () ; state
1066         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
1067         () ; outputs
1068         () ; profile action (default)
1069         )
1070   ; FR load unit -- TODO doesn't handle quad
1071   (unit u-fr-load "FR Load Unit" ()
1072         1 1 ; issue done
1073         () ; state
1074         ((GRi INT -1) (GRj INT -1)) ; inputs
1075         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
1076         () ; profile action (default)
1077         )
1078   ; FR store unit -- TODO doesn't handle quad
1079   (unit u-fr-store "FR Store Unit" ()
1080         1 1 ; issue done
1081         () ; state
1082         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
1083         () ; outputs
1084         () ; profile action (default)
1085         )
1086   ; Swap unit
1087   (unit u-swap "Swap Unit" ()
1088         1 1 ; issue done
1089         () ; state
1090         ((GRi INT -1) (GRj INT -1)) ; inputs
1091         ((GRk INT -1)) ; outputs
1092         () ; profile action (default)
1093         )
1094   ; FR Move to GR unit
1095   (unit u-fr2gr "FR Move to GR Unit" ()
1096         1 1 ; issue done
1097         () ; state
1098         ((FRintk INT -1)) ; inputs
1099         ((GRj INT -1)) ; outputs
1100         () ; profile action (default)
1101         )
1102   ; SPR Move to GR unit
1103   (unit u-spr2gr "SPR Move to GR Unit" ()
1104         1 1 ; issue done
1105         () ; state
1106         ((spr INT -1)) ; inputs
1107         ((GRj INT -1)) ; outputs
1108         () ; profile action (default)
1109         )
1110   ; GR Move to FR unit
1111   (unit u-gr2fr "GR Move to FR Unit" ()
1112         1 1 ; issue done
1113         () ; state
1114         ((GRj INT -1)) ; inputs
1115         ((FRintk INT -1)) ; outputs
1116         () ; profile action (default)
1117         )
1118   ; GR Move to SPR unit
1119   (unit u-gr2spr "GR Move to SPR Unit" ()
1120         1 1 ; issue done
1121         () ; state
1122         ((GRj INT -1)) ; inputs
1123         ((spr INT -1)) ; outputs
1124         () ; profile action (default)
1125         )
1126   ; Media unit M1 -- see table 13-8 in the fr400 LSI
1127   (unit u-media-1 "Media-1 unit" ()
1128         1 1 ; issue done
1129         () ; state
1130         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1131         ((FRintk INT -1)) ; outputs
1132         () ; profile action (default)
1133         )
1134   (unit u-media-1-quad "Media-1-quad unit" ()
1135         1 1 ; issue done
1136         () ; state
1137         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1138         ((FRintk INT -1)) ; outputs
1139         () ; profile action (default)
1140         )
1141   (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" ()
1142         1 1 ; issue done
1143         () ; state
1144         () ; inputs
1145         ((FRkhi INT -1) (FRklo INT -1)) ; outputs
1146         () ; profile action (default)
1147         )
1148   ; Media unit M2 -- see table 13-8 in the fr400 LSI
1149   (unit u-media-2 "Media-2 unit" ()
1150         1 1 ; issue done
1151         () ; state
1152         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1153         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1154         () ; profile action (default)
1155         )
1156   (unit u-media-2-quad "Media-2-quad unit" ()
1157         1 1 ; issue done
1158         () ; state
1159         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1160         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1161         () ; profile action (default)
1162         )
1163   (unit u-media-2-acc "Media-2-acc unit" ()
1164         1 1 ; issue done
1165         () ; state
1166         ((ACC40Si INT -1)) ; inputs
1167         ((ACC40Sk INT -1)) ; outputs
1168         () ; profile action (default)
1169         )
1170   (unit u-media-2-acc-dual "Media-2-acc-dual unit" ()
1171         1 1 ; issue done
1172         () ; state
1173         ((ACC40Si INT -1)) ; inputs
1174         ((ACC40Sk INT -1)) ; outputs
1175         () ; profile action (default)
1176         )
1177   (unit u-media-2-add-sub "Media-2-add-sub unit" ()
1178         1 1 ; issue done
1179         () ; state
1180         ((ACC40Si INT -1)) ; inputs
1181         ((ACC40Sk INT -1)) ; outputs
1182         () ; profile action (default)
1183         )
1184   (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" ()
1185         1 1 ; issue done
1186         () ; state
1187         ((ACC40Si INT -1)) ; inputs
1188         ((ACC40Sk INT -1)) ; outputs
1189         () ; profile action (default)
1190         )
1191   ; Media unit M3 -- see table 13-8 in the fr400 LSI
1192   (unit u-media-3 "Media-3 unit" ()
1193         1 1 ; issue done
1194         () ; state
1195         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1196         ((FRintk INT -1)) ; outputs
1197         () ; profile action (default)
1198         )
1199   (unit u-media-3-dual "Media-3-dual unit" ()
1200         1 1 ; issue done
1201         () ; state
1202         ((FRinti INT -1)) ; inputs
1203         ((FRintk INT -1)) ; outputs
1204         () ; profile action (default)
1205         )
1206   (unit u-media-3-quad "Media-3-quad unit" ()
1207         1 1 ; issue done
1208         () ; state
1209         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1210         ((FRintk INT -1)) ; outputs
1211         () ; profile action (default)
1212         )
1213   ; Media unit M4 -- see table 13-8 in the fr400 LSI
1214   (unit u-media-4 "Media-4 unit" ()
1215         1 1 ; issue done
1216         () ; state
1217         ((ACC40Si INT -1) (FRintj INT -1)) ; inputs
1218         ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs
1219         () ; profile action (default)
1220         )
1221   (unit u-media-4-accg "Media-4-accg unit" ()
1222         1 1 ; issue done
1223         () ; state
1224         ((ACCGi INT -1) (FRinti INT -1)) ; inputs
1225         ((ACCGk INT -1) (FRintk INT -1)) ; outputs
1226         () ; profile action (default)
1227         )
1228   (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
1229         1 1 ; issue done
1230         () ; state
1231         ((ACC40Si INT -1)) ; inputs
1232         ((FRintk INT -1)) ; outputs
1233         () ; profile action (default)
1234         )
1235   ; Media unit M6 -- see table 13-8 in the fr400 LSI
1236   (unit u-media-6 "Media-6 unit" ()
1237         1 1 ; issue done
1238         () ; state
1239         ((FRinti INT -1)) ; inputs
1240         ((FRintk INT -1)) ; outputs
1241         () ; profile action (default)
1242         )
1243   ; Media unit M7 -- see table 13-8 in the fr400 LSI
1244   (unit u-media-7 "Media-1 unit" ()
1245         1 1 ; issue done
1246         () ; state
1247         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1248         ((FCCk INT -1)) ; outputs
1249         () ; profile action (default)
1250         )
1251   ; Media Dual Expand unit
1252   (unit u-media-dual-expand "Media Dual Expand unit" ()
1253         1 1 ; issue done
1254         () ; state
1255         ((FRinti INT -1)) ; inputs
1256         ((FRintk INT -1)) ; outputs
1257         () ; profile action (default)
1258         )
1259   ; Media Dual half to byte unit
1260   (unit u-media-dual-htob "Media Half to byte" ()
1261         1 1 ; issue done
1262         () ; state
1263         ((FRintj INT -1)) ; inputs
1264         ((FRintk INT -1)) ; outputs
1265         () ; profile action (default)
1266         )
1267   ; Barrier unit
1268   (unit u-barrier "Barrier unit" ()
1269         1 1 ; issue done
1270         () ; state
1271         () ; inputs
1272         () ; outputs
1273         () ; profile action (default)
1274         )
1275   ; Memory Barrier unit
1276   (unit u-membar "Memory Barrier unit" ()
1277         1 1 ; issue done
1278         () ; state
1279         () ; inputs
1280         () ; outputs
1281         () ; profile action (default)
1282         )
1283   ; Insn cache invalidate unit
1284   (unit u-ici "Insn cache invalidate unit" ()
1285         1 1 ; issue done
1286         () ; state
1287         ((GRi INT -1) (GRj INT -1)) ; inputs
1288         () ; outputs
1289         () ; profile action (default)
1290         )
1291   ; Data cache invalidate unit
1292   (unit u-dci "Data cache invalidate unit" ()
1293         1 1 ; issue done
1294         () ; state
1295         ((GRi INT -1) (GRj INT -1)) ; inputs
1296         () ; outputs
1297         () ; profile action (default)
1298         )
1299   ; Data cache flush unit
1300   (unit u-dcf "Data cache flush unit" ()
1301         1 1 ; issue done
1302         () ; state
1303         ((GRi INT -1) (GRj INT -1)) ; inputs
1304         () ; outputs
1305         () ; profile action (default)
1306         )
1307   ; Insn cache preload unit
1308   (unit u-icpl "Insn cache preload unit" ()
1309         1 1 ; issue done
1310         () ; state
1311         ((GRi INT -1) (GRj INT -1)) ; inputs
1312         () ; outputs
1313         () ; profile action (default)
1314         )
1315   ; Data cache preload unit
1316   (unit u-dcpl "Data cache preload unit" ()
1317         1 1 ; issue done
1318         () ; state
1319         ((GRi INT -1) (GRj INT -1)) ; inputs
1320         () ; outputs
1321         () ; profile action (default)
1322         )
1323   ; Insn cache unlock unit
1324   (unit u-icul "Insn cache unlock unit" ()
1325         1 1 ; issue done
1326         () ; state
1327         ((GRi INT -1) (GRj INT -1)) ; inputs
1328         () ; outputs
1329         () ; profile action (default)
1330         )
1331   ; Data cache unlock unit
1332   (unit u-dcul "Data cache unlock unit" ()
1333         1 1 ; issue done
1334         () ; state
1335         ((GRi INT -1) (GRj INT -1)) ; inputs
1336         () ; outputs
1337         () ; profile action (default)
1338         )
1339 )
1340 \f
1341 ; FR450 machine
1342 (define-mach
1343   (name fr450)
1344   (comment "FR450 cpu")
1345   (cpu frvbf)
1346 )
1347 (define-model
1348   (name fr450) (comment "FR450 model") (attrs)
1349   (mach fr450)
1350   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
1351   ; `state' is a list of variables for recording model state
1352   (state
1353    ; State items
1354    ; These are all masks with each bit representing one register.
1355    (prev-fp-load    DI) ; Previous use of FR  register was floating point load
1356    (prev-fr-p4      DI) ; Previous use of FR  register was media unit 4
1357    (prev-fr-p6      DI) ; Previous use of FR  register was media unit 6
1358    (prev-acc-p2     DI) ; Previous use of ACC register was media unit 2
1359    (prev-acc-p4     DI) ; Previous use of ACC register was media unit 4
1360    (cur-fp-load     DI) ; Current  use of FR  register is  floating point load
1361    (cur-fr-p4       DI) ; Current  use of FR  register is  media unit 4
1362    (cur-fr-p6       DI) ; Current  use of FR  register is  media unit 6
1363    (cur-acc-p2      DI) ; Current  use of ACC register is  media unit 2
1364    (cur-acc-p4      DI) ; Current  use of ACC register is  media unit 4
1365   )
1366   (unit u-exec "Execution Unit" ()
1367         1 1 ; issue done
1368         () ; state
1369         () ; inputs
1370         () ; outputs
1371         () ; profile action (default)
1372         )
1373   ; Basic integer insn unit
1374   (unit u-integer "Integer Unit" ()
1375         1 1 ; issue done
1376         () ; state
1377         ((GRi INT -1) (GRj INT -1)) ; inputs
1378         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1379         () ; profile action (default)
1380         )
1381   ; Integer multiplication unit
1382   (unit u-imul "Integer Multiplication Unit" ()
1383         1 1 ; issue done
1384         () ; state
1385         ((GRi INT -1) (GRj INT -1)) ; inputs
1386         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
1387         () ; profile action (default)
1388         )
1389   ; Integer division unit
1390   (unit u-idiv "Integer Division Unit" ()
1391         1 1 ; issue done
1392         () ; state
1393         ((GRi INT -1) (GRj INT -1)) ; inputs
1394         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1395         () ; profile action (default)
1396         )
1397   ; Branch unit
1398   (unit u-branch "Branch Unit" ()
1399         1 1 ; issue done
1400         () ; state
1401         ((GRi INT -1) (GRj INT -1)
1402          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1403         ((pc)) ; outputs
1404         () ; profile action (default)
1405         )
1406   ; Trap unit
1407   (unit u-trap "Trap Unit" ()
1408         1 1 ; issue done
1409         () ; state
1410         ((GRi INT -1) (GRj INT -1)
1411          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1412         () ; outputs
1413         () ; profile action (default)
1414         )
1415   ; Condition code check unit
1416   (unit u-check "Check Unit" ()
1417         1 1 ; issue done
1418         () ; state
1419         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
1420         () ; outputs
1421         () ; profile action (default)
1422         )
1423   ; GR set half unit
1424   (unit u-set-hilo "GR Set Half" ()
1425         1 1 ; issue done
1426         () ; state
1427         () ; inputs
1428         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
1429         () ; profile action (default)
1430         )
1431   ; GR load unit -- TODO doesn't handle quad
1432   (unit u-gr-load "GR Load Unit" ()
1433         1 1 ; issue done
1434         () ; state
1435         ((GRi INT -1) (GRj INT -1)) ; inputs
1436         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
1437         () ; profile action (default)
1438         )
1439   ; GR store unit -- TODO doesn't handle quad
1440   (unit u-gr-store "GR Store Unit" ()
1441         1 1 ; issue done
1442         () ; state
1443         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
1444         () ; outputs
1445         () ; profile action (default)
1446         )
1447   ; FR load unit -- TODO doesn't handle quad
1448   (unit u-fr-load "FR Load Unit" ()
1449         1 1 ; issue done
1450         () ; state
1451         ((GRi INT -1) (GRj INT -1)) ; inputs
1452         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
1453         () ; profile action (default)
1454         )
1455   ; FR store unit -- TODO doesn't handle quad
1456   (unit u-fr-store "FR Store Unit" ()
1457         1 1 ; issue done
1458         () ; state
1459         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
1460         () ; outputs
1461         () ; profile action (default)
1462         )
1463   ; Swap unit
1464   (unit u-swap "Swap Unit" ()
1465         1 1 ; issue done
1466         () ; state
1467         ((GRi INT -1) (GRj INT -1)) ; inputs
1468         ((GRk INT -1)) ; outputs
1469         () ; profile action (default)
1470         )
1471   ; FR Move to GR unit
1472   (unit u-fr2gr "FR Move to GR Unit" ()
1473         1 1 ; issue done
1474         () ; state
1475         ((FRintk INT -1)) ; inputs
1476         ((GRj INT -1)) ; outputs
1477         () ; profile action (default)
1478         )
1479   ; SPR Move to GR unit
1480   (unit u-spr2gr "SPR Move to GR Unit" ()
1481         1 1 ; issue done
1482         () ; state
1483         ((spr INT -1)) ; inputs
1484         ((GRj INT -1)) ; outputs
1485         () ; profile action (default)
1486         )
1487   ; GR Move to FR unit
1488   (unit u-gr2fr "GR Move to FR Unit" ()
1489         1 1 ; issue done
1490         () ; state
1491         ((GRj INT -1)) ; inputs
1492         ((FRintk INT -1)) ; outputs
1493         () ; profile action (default)
1494         )
1495   ; GR Move to SPR unit
1496   (unit u-gr2spr "GR Move to SPR Unit" ()
1497         1 1 ; issue done
1498         () ; state
1499         ((GRj INT -1)) ; inputs
1500         ((spr INT -1)) ; outputs
1501         () ; profile action (default)
1502         )
1503   ; Media unit M1 -- see table 14-8 in the fr450 LSI
1504   (unit u-media-1 "Media-1 unit" ()
1505         1 1 ; issue done
1506         () ; state
1507         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1508         ((FRintk INT -1)) ; outputs
1509         () ; profile action (default)
1510         )
1511   (unit u-media-1-quad "Media-1-quad unit" ()
1512         1 1 ; issue done
1513         () ; state
1514         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1515         ((FRintk INT -1)) ; outputs
1516         () ; profile action (default)
1517         )
1518   (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" ()
1519         1 1 ; issue done
1520         () ; state
1521         () ; inputs
1522         ((FRkhi INT -1) (FRklo INT -1)) ; outputs
1523         () ; profile action (default)
1524         )
1525   ; Media unit M2 -- see table 14-8 in the fr450 LSI
1526   (unit u-media-2 "Media-2 unit" ()
1527         1 1 ; issue done
1528         () ; state
1529         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1530         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1531         () ; profile action (default)
1532         )
1533   (unit u-media-2-quad "Media-2-quad unit" ()
1534         1 1 ; issue done
1535         () ; state
1536         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1537         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1538         () ; profile action (default)
1539         )
1540   (unit u-media-2-acc "Media-2-acc unit" ()
1541         1 1 ; issue done
1542         () ; state
1543         ((ACC40Si INT -1)) ; inputs
1544         ((ACC40Sk INT -1)) ; outputs
1545         () ; profile action (default)
1546         )
1547   (unit u-media-2-acc-dual "Media-2-acc-dual unit" ()
1548         1 1 ; issue done
1549         () ; state
1550         ((ACC40Si INT -1)) ; inputs
1551         ((ACC40Sk INT -1)) ; outputs
1552         () ; profile action (default)
1553         )
1554   (unit u-media-2-add-sub "Media-2-add-sub unit" ()
1555         1 1 ; issue done
1556         () ; state
1557         ((ACC40Si INT -1)) ; inputs
1558         ((ACC40Sk INT -1)) ; outputs
1559         () ; profile action (default)
1560         )
1561   (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" ()
1562         1 1 ; issue done
1563         () ; state
1564         ((ACC40Si INT -1)) ; inputs
1565         ((ACC40Sk INT -1)) ; outputs
1566         () ; profile action (default)
1567         )
1568   ; Media unit M3 -- see table 14-8 in the fr450 LSI
1569   (unit u-media-3 "Media-3 unit" ()
1570         1 1 ; issue done
1571         () ; state
1572         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1573         ((FRintk INT -1)) ; outputs
1574         () ; profile action (default)
1575         )
1576   (unit u-media-3-dual "Media-3-dual unit" ()
1577         1 1 ; issue done
1578         () ; state
1579         ((FRinti INT -1)) ; inputs
1580         ((FRintk INT -1)) ; outputs
1581         () ; profile action (default)
1582         )
1583   (unit u-media-3-quad "Media-3-quad unit" ()
1584         1 1 ; issue done
1585         () ; state
1586         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1587         ((FRintk INT -1)) ; outputs
1588         () ; profile action (default)
1589         )
1590   ; Media unit M4 -- see table 14-8 in the fr450 LSI
1591   (unit u-media-4 "Media-4 unit" ()
1592         1 1 ; issue done
1593         () ; state
1594         ((ACC40Si INT -1) (FRintj INT -1)) ; inputs
1595         ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs
1596         () ; profile action (default)
1597         )
1598   (unit u-media-4-accg "Media-4-accg unit" ()
1599         1 1 ; issue done
1600         () ; state
1601         ((ACCGi INT -1) (FRinti INT -1)) ; inputs
1602         ((ACCGk INT -1) (FRintk INT -1)) ; outputs
1603         () ; profile action (default)
1604         )
1605   (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
1606         1 1 ; issue done
1607         () ; state
1608         ((ACC40Si INT -1)) ; inputs
1609         ((FRintk INT -1)) ; outputs
1610         () ; profile action (default)
1611         )
1612   (unit u-media-4-mclracca "Media-4 unit for MCLRACC with #A=1" ()
1613         1 1 ; issue done
1614         () ; state
1615         () ; inputs
1616         () ; outputs
1617         () ; profile action (default)
1618         )
1619   ; Media unit M6 -- see table 14-8 in the fr450 LSI
1620   (unit u-media-6 "Media-6 unit" ()
1621         1 1 ; issue done
1622         () ; state
1623         ((FRinti INT -1)) ; inputs
1624         ((FRintk INT -1)) ; outputs
1625         () ; profile action (default)
1626         )
1627   ; Media unit M7 -- see table 14-8 in the fr450 LSI
1628   (unit u-media-7 "Media-1 unit" ()
1629         1 1 ; issue done
1630         () ; state
1631         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1632         ((FCCk INT -1)) ; outputs
1633         () ; profile action (default)
1634         )
1635   ; Media Dual Expand unit
1636   (unit u-media-dual-expand "Media Dual Expand unit" ()
1637         1 1 ; issue done
1638         () ; state
1639         ((FRinti INT -1)) ; inputs
1640         ((FRintk INT -1)) ; outputs
1641         () ; profile action (default)
1642         )
1643   ; Media Dual half to byte unit
1644   (unit u-media-dual-htob "Media Half to byte" ()
1645         1 1 ; issue done
1646         () ; state
1647         ((FRintj INT -1)) ; inputs
1648         ((FRintk INT -1)) ; outputs
1649         () ; profile action (default)
1650         )
1651   ; Barrier unit
1652   (unit u-barrier "Barrier unit" ()
1653         1 1 ; issue done
1654         () ; state
1655         () ; inputs
1656         () ; outputs
1657         () ; profile action (default)
1658         )
1659   ; Memory Barrier unit
1660   (unit u-membar "Memory Barrier unit" ()
1661         1 1 ; issue done
1662         () ; state
1663         () ; inputs
1664         () ; outputs
1665         () ; profile action (default)
1666         )
1667   ; Insn cache invalidate unit
1668   (unit u-ici "Insn cache invalidate unit" ()
1669         1 1 ; issue done
1670         () ; state
1671         ((GRi INT -1) (GRj INT -1)) ; inputs
1672         () ; outputs
1673         () ; profile action (default)
1674         )
1675   ; Data cache invalidate unit
1676   (unit u-dci "Data cache invalidate unit" ()
1677         1 1 ; issue done
1678         () ; state
1679         ((GRi INT -1) (GRj INT -1)) ; inputs
1680         () ; outputs
1681         () ; profile action (default)
1682         )
1683   ; Data cache flush unit
1684   (unit u-dcf "Data cache flush unit" ()
1685         1 1 ; issue done
1686         () ; state
1687         ((GRi INT -1) (GRj INT -1)) ; inputs
1688         () ; outputs
1689         () ; profile action (default)
1690         )
1691   ; Insn cache preload unit
1692   (unit u-icpl "Insn cache preload unit" ()
1693         1 1 ; issue done
1694         () ; state
1695         ((GRi INT -1) (GRj INT -1)) ; inputs
1696         () ; outputs
1697         () ; profile action (default)
1698         )
1699   ; Data cache preload unit
1700   (unit u-dcpl "Data cache preload unit" ()
1701         1 1 ; issue done
1702         () ; state
1703         ((GRi INT -1) (GRj INT -1)) ; inputs
1704         () ; outputs
1705         () ; profile action (default)
1706         )
1707   ; Insn cache unlock unit
1708   (unit u-icul "Insn cache unlock unit" ()
1709         1 1 ; issue done
1710         () ; state
1711         ((GRi INT -1) (GRj INT -1)) ; inputs
1712         () ; outputs
1713         () ; profile action (default)
1714         )
1715   ; Data cache unlock unit
1716   (unit u-dcul "Data cache unlock unit" ()
1717         1 1 ; issue done
1718         () ; state
1719         ((GRi INT -1) (GRj INT -1)) ; inputs
1720         () ; outputs
1721         () ; profile action (default)
1722         )
1723 )
1724 \f
1725 ; Simple machine - single issue integer machine
1726 (define-mach
1727   (name simple)
1728   (comment "Simple single issue integer cpu")
1729   (cpu frvbf)
1730 )
1731 (define-model
1732   (name simple) (comment "Simple model") (attrs)
1733   (mach simple)
1734   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
1735   ; `state' is a list of variables for recording model state
1736   (state)
1737   (unit u-exec "Execution Unit" ()
1738         1 1 ; issue done
1739         () ; state
1740         () ; inputs
1741         () ; outputs
1742         () ; profile action (default)
1743         )
1744 )
1745 \f
1746 ; The instruction fetch/execute cycle.
1747 ;
1748 ; This is how to fetch and decode an instruction.
1749 ; Leave it out for now
1750
1751 ; (define-extract (const SI 0))
1752
1753 ; This is how to execute a decoded instruction.
1754 ; Leave it out for now
1755
1756 ; (define-execute (const SI 0))
1757 \f
1758 ; An attribute to describe which unit an insn runs in.
1759 (define-attr
1760   (for insn)
1761   (type enum)
1762   (name UNIT)
1763   (comment "parallel execution pipeline selection")
1764   ; The order of declaration is significant.
1765   ; See the *_unit_mapping tables in frv.opc
1766   ; Keep variations on the same unit together.
1767   ; Keep the '01' variant immediately after the '1' variant in each unit.
1768   ; Keep the 'ALL' variations immediately after the last numbered variant in each unit.
1769   (values NIL
1770           I0 I1 I01 I2 I3 IALL
1771           FM0 FM1 FM01 FM2 FM3 FMALL FMLOW
1772           B0 B1 B01
1773           C
1774           MULT-DIV ; multiply/division slotted differently on different machines
1775           IACC     ; iacc multiply     slotted differently on different machines
1776           LOAD     ; loads             slotted differently on different machines
1777           STORE    ; store             slotted differently on different machines
1778           SCAN     ; scan, scani       slotted differently on different machines
1779           DCPL     ; dcpl              slotted differently on different machines
1780           MDUALACC ; media dual acc    slotted differently on different machines
1781           MDCUTSSI ; mdcutssi insn     slotted differently on different machines
1782           MCLRACC-1; mclracc A==1      slotted differently on different machines
1783           NUM_UNITS
1784   )
1785 )
1786 ; Attributes to describe major categories of insns
1787 (define-attr
1788   (for insn)
1789   (type enum)
1790   (name FR400-MAJOR)
1791   (comment "fr400 major insn categories")
1792   ; The order of declaration is significant. Keep variations on the same major
1793   ; together.
1794   (values NONE
1795           I-1 I-2 I-3 I-4 I-5
1796           B-1 B-2 B-3 B-4 B-5 B-6
1797           C-1 C-2
1798           M-1 M-2
1799   )
1800 )
1801 (define-attr
1802   (for insn)
1803   (type enum)
1804   (name FR450-MAJOR)
1805   (comment "fr450 major insn categories")
1806   ; The order of declaration is significant. Keep variations on the same major
1807   ; together.
1808   (values NONE
1809           I-1 I-2 I-3 I-4 I-5
1810           B-1 B-2 B-3 B-4 B-5 B-6
1811           C-1 C-2
1812           M-1 M-2 M-3 M-4 M-5 M-6
1813   )
1814 )
1815 (define-attr
1816   (for insn)
1817   (type enum)
1818   (name FR500-MAJOR)
1819   (comment "fr500 major insn categories")
1820   ; The order of declaration is significant. Keep variations on the same major
1821   ; together.
1822   (values NONE
1823           I-1 I-2 I-3 I-4 I-5 I-6
1824           B-1 B-2 B-3 B-4 B-5 B-6
1825           C-1 C-2
1826           F-1 F-2 F-3 F-4 F-5 F-6 F-7 F-8
1827           M-1 M-2 M-3 M-4 M-5 M-6 M-7 M-8
1828   )
1829 )
1830 (define-attr
1831   (for insn)
1832   (type enum)
1833   (name FR550-MAJOR)
1834   (comment "fr550 major insn categories")
1835   ; The order of declaration is significant. Keep variations on the same major
1836   ; together.
1837   (values NONE
1838           I-1 I-2 I-3 I-4 I-5 I-6 I-7 I-8
1839           B-1 B-2 B-3 B-4 B-5 B-6
1840           C-1 C-2
1841           F-1 F-2 F-3 F-4
1842           M-1 M-2 M-3 M-4 M-5
1843   )
1844 )
1845 ; Privileged insn
1846 (define-attr
1847   (for insn)
1848   (type boolean)
1849   (name PRIVILEGED)
1850   (comment "insn only allowed in supervisor mode")
1851 )
1852 ; Non-Excepting insn
1853 (define-attr
1854   (for insn)
1855   (type boolean)
1856   (name NON-EXCEPTING)
1857   (comment "non-excepting insn")
1858 )
1859 ; Conditional insn
1860 (define-attr
1861   (for insn)
1862   (type boolean)
1863   (name CONDITIONAL)
1864   (comment "conditional insn")
1865 )
1866 ; insn accesses FR registers
1867 (define-attr
1868   (for insn)
1869   (type boolean)
1870   (name FR-ACCESS)
1871   (comment "insn accesses FR registers")
1872 )
1873 ; insn preserves MSR.OVF
1874 (define-attr
1875   (for insn)
1876   (type boolean)
1877   (name PRESERVE-OVF)
1878   (comment "Preserve value of MSR.OVF")
1879 )
1880 ; "Audio" instruction provided by the fr405 but not the original fr400 core.
1881 (define-attr
1882   (for insn)
1883   (type boolean)
1884   (name AUDIO)
1885   (comment "Audio instruction added with FR405")
1886 )
1887 ; null attribute -- used as a place holder for where an attribue is required.
1888 (define-attr
1889   (for insn)
1890   (type boolean)
1891   (name NA)
1892   (comment "placeholder attribute")
1893   (attrs META) ; do not define in any generated file for now
1894 )
1895
1896 ; IDOC attribute for instruction documentation.
1897
1898 (define-attr
1899   (for insn)
1900   (type enum)
1901   (name IDOC)
1902   (comment "insn kind for documentation")
1903   (attrs META)
1904   (values
1905    (MEM - () "Memory")
1906    (ALU - () "ALU")
1907    (FPU - () "FPU")
1908    (BR - () "Branch")
1909    (PRIV - () "Priviledged")
1910    (MISC - () "Miscellaneous")
1911   )
1912 )
1913 \f
1914 ; Instruction fields.
1915 ;
1916 ; Attributes:
1917 ; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
1918 ; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
1919 ; RESERVED: bits are not used to decode insn, must be all 0
1920 (dnf f-pack      "packing bit"                  () 31  1)
1921 (dnf f-op        "primary opcode"               () 24  7)
1922 (dnf f-ope1      "extended opcode"              () 11  6)
1923 (dnf f-ope2      "extended opcode"              ()  9  4)
1924 (dnf f-ope3      "extended opcode"              () 15  3)
1925 (dnf f-ope4      "extended opcode"              ()  7  2)
1926
1927 (dnf f-GRi       "source register 1"            () 17  6)
1928 (dnf f-GRj       "source register 2"            ()  5  6)
1929 (dnf f-GRk       "destination register"         () 30  6)
1930
1931 (dnf f-FRi       "source register 1"            () 17  6)
1932 (dnf f-FRj       "source register 2"            ()  5  6)
1933 (dnf f-FRk       "destination register"         () 30  6)
1934
1935 (dnf f-CPRi      "source register 1"            () 17  6)
1936 (dnf f-CPRj      "source register 2"            ()  5  6)
1937 (dnf f-CPRk      "destination register"         () 30  6)
1938
1939 (dnf f-ACCGi     "source register"              () 17  6)
1940 (dnf f-ACCGk     "destination register"         () 30  6)
1941
1942 (dnf f-ACC40Si   "40 bit signed accumulator"    () 17  6)
1943 (dnf f-ACC40Ui   "40 bit unsigned accumulator"  () 17  6)
1944 (dnf f-ACC40Sk   "40 bit accumulator"           () 30  6)
1945 (dnf f-ACC40Uk   "40 bit accumulator"           () 30  6)
1946
1947 (dnf f-CRi       "source      register"         () 14  3)
1948 (dnf f-CRj       "source      register"         ()  2  3)
1949 (dnf f-CRk       "destination register"         () 27  3)
1950 (dnf f-CCi       "condition   register"         () 11  3)
1951
1952 (df  f-CRj_int   "target cr for ck insns"       () 26  2 UINT
1953      ((value pc) (sub WI value 4))
1954      ((value pc) (add WI value 4))
1955 )
1956 (dnf f-CRj_float "target cr for fck insns"      () 26  2)
1957
1958 (dnf f-ICCi_1    "condition register"           () 11  2)
1959 (dnf f-ICCi_2    "condition register"           () 26  2)
1960 (dnf f-ICCi_3    "condition register"           ()  1  2)
1961 (dnf f-FCCi_1    "condition register"           () 11  2)
1962 (dnf f-FCCi_2    "condition register"           () 26  2)
1963 (dnf f-FCCi_3    "condition register"           ()  1  2)
1964 (dnf f-FCCk      "condition register"           () 26  2)
1965 (dnf f-eir       "exception insn register"      () 17  6)
1966
1967 (df  f-s10       "10 bit sign extended"         ()  9 10  INT #f #f)
1968 (df  f-s12       "12 bit sign extended"         () 11 12  INT #f #f)
1969 (df  f-d12       "12 bit sign extended"         () 11 12  INT #f #f)
1970 (df  f-u16       "16 bit unsigned"              () 15 16 UINT #f #f)
1971 (df  f-s16       "16 bit sign extended"         () 15 16  INT #f #f)
1972 (df  f-s6        "6  bit   signed"              ()  5  6  INT #f #f)
1973 (df  f-s6_1      "6  bit   signed"              () 11  6  INT #f #f)
1974 (df  f-u6        "6  bit unsigned"              ()  5  6 UINT #f #f)
1975 (df  f-s5        "5  bit   signed"              ()  4  5  INT #f #f)
1976
1977 (df  f-u12-h "upper 6 bits of u12"  () 17 6  INT #f #f)
1978 (df  f-u12-l "lower 6 bits of u12"  ()  5 6 UINT #f #f)
1979 (dnmf f-u12   "12 bit signed immediate" () INT
1980       (f-u12-h f-u12-l)
1981       (sequence () ; insert
1982                 (set (ifield f-u12-h) (sra SI (ifield f-u12) 6))
1983                 (set (ifield f-u12-l) (and (ifield f-u12) #x3f))
1984                 )
1985       (sequence () ; extract
1986                 (set (ifield f-u12) (or (sll (ifield f-u12-h) 6)
1987                                         (ifield f-u12-l)))
1988                 )
1989 )
1990
1991 (dnf f-int-cc    "integer  branch conditions"   () 30  4)
1992 (dnf f-flt-cc    "floating branch conditions"   () 30  4)
1993 (df  f-cond      "conditional arithmetic"       ()  8  1 UINT #f #f)
1994 (df  f-ccond     "lr branch condition"          () 12  1 UINT #f #f)
1995 (df  f-hint      "2 bit branch prediction hint" () 17  2 UINT #f #f)
1996 (df  f-LI        "link indicator"               () 25  1 UINT #f #f)
1997 (df  f-lock      "cache lock indicator"         () 25  1 UINT #f #f)
1998 (df  f-debug     "debug mode indicator"         () 25  1 UINT #f #f)
1999 (df  f-A         "all accumulator bit"          () 17  1 UINT #f #f)
2000 (df  f-ae        "cache all entries indicator"  () 25  1 UINT #f #f)
2001
2002 (dnf  f-spr-h "upper 6 bits of spr"  () 30  6)
2003 (dnf  f-spr-l "lower 6 bits of spr"  () 17  6)
2004 (dnmf f-spr   "special purpose register" () UINT
2005       (f-spr-h f-spr-l)
2006       (sequence () ; insert
2007                 (set (ifield f-spr-h) (srl (ifield f-spr) (const 6)))
2008                 (set (ifield f-spr-l) (and (ifield f-spr) (const #x3f)))
2009                 )
2010       (sequence () ; extract
2011                 (set (ifield f-spr) (or (sll (ifield f-spr-h) (const 6))
2012                                         (ifield f-spr-l)))
2013                 )
2014 )
2015
2016 (df  f-label16    "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT
2017      ((value pc) (sra WI (sub WI value pc) (const 2)))
2018      ((value pc) (add WI (sll WI value (const 2)) pc))
2019 )
2020
2021 (df   f-labelH6   "upper 6  bits of label24"  () 30  6 INT #f #f)
2022 (dnf  f-labelL18  "lower 18 bits of label24"  () 17 18)
2023 (dnmf f-label24   "26 bit signed offset"     (PCREL-ADDR) INT
2024       (f-labelH6 f-labelL18)
2025       ; insert
2026       (sequence ()
2027                 (set (ifield f-labelH6)
2028                      (sra WI (sub (ifield f-label24) pc) (const 20)))
2029                 (set (ifield f-labelL18)
2030                      (and (srl (sub (ifield f-label24) pc) (const 2))
2031                           (const #x3ffff)))
2032                 )
2033       ; extract
2034       (sequence ()
2035                 (set (ifield f-label24)
2036                      (add (sll (or (sll (ifield f-labelH6) (const 18))
2037                                    (ifield f-labelL18))
2038                                (const 2))
2039                           pc)))
2040 )
2041
2042 (dnf f-LRAE "Load Real Address E flag" () 5 1)
2043 (dnf f-LRAD "Load Real Address D flag" () 4 1)
2044 (dnf f-LRAS "Load Real Address S flag" () 3 1)
2045
2046 (dnf f-TLBPRopx "TLB Probe operation number" () 28 3)
2047 (dnf f-TLBPRL   "TLB Probe L flag" () 25 1)
2048
2049 (dnf f-ICCi_1-null  "null field" (RESERVED) 11  2)
2050 (dnf f-ICCi_2-null  "null field" (RESERVED) 26  2)
2051 (dnf f-ICCi_3-null  "null field" (RESERVED)  1  2)
2052 (dnf f-FCCi_1-null  "null field" (RESERVED) 11  2)
2053 (dnf f-FCCi_2-null  "null field" (RESERVED) 26  2)
2054 (dnf f-FCCi_3-null  "null field" (RESERVED)  1  2)
2055 (dnf f-rs-null      "null field" (RESERVED) 17  6)
2056 (dnf f-GRi-null     "null field" (RESERVED) 17  6)
2057 (dnf f-GRj-null     "null field" (RESERVED)  5  6)
2058 (dnf f-GRk-null     "null field" (RESERVED) 30  6)
2059 (dnf f-FRi-null     "null field" (RESERVED) 17  6)
2060 (dnf f-FRj-null     "null field" (RESERVED)  5  6)
2061 (dnf f-ACCj-null    "null field" (RESERVED)  5  6)
2062 (dnf f-rd-null      "null field" (RESERVED) 30  6)
2063 (dnf f-cond-null    "null field" (RESERVED) 30  4)
2064 (dnf f-ccond-null   "null field" (RESERVED) 12  1)
2065 (dnf f-s12-null     "null field" (RESERVED) 11 12)
2066 (dnf f-label16-null "null field" (RESERVED) 15 16)
2067 (dnf f-misc-null-1  "null field" (RESERVED) 30  5)
2068 (dnf f-misc-null-2  "null field" (RESERVED) 11  6)
2069 (dnf f-misc-null-3  "null field" (RESERVED) 11  4)
2070 (dnf f-misc-null-4  "null field" (RESERVED) 17  2)
2071 (dnf f-misc-null-5  "null field" (RESERVED) 17 16)
2072 (dnf f-misc-null-6  "null field" (RESERVED) 30  3)
2073 (dnf f-misc-null-7  "null field" (RESERVED) 17  3)
2074 (dnf f-misc-null-8  "null field" (RESERVED)  5  3)
2075 (dnf f-misc-null-9  "null field" (RESERVED)  5  4)
2076 (dnf f-misc-null-10 "null field" (RESERVED) 16  5)
2077 (dnf f-misc-null-11 "null field" (RESERVED)  5  1)
2078
2079 (dnf f-LRA-null     "null field" (RESERVED)  2  3)
2080 (dnf f-TLBPR-null   "null field" (RESERVED) 30  2)
2081
2082 (dnf f-LI-off      "null field" (RESERVED) 25  1)
2083 (dnf f-LI-on       "null field" (RESERVED) 25  1)
2084
2085 ; Relocation annotations.
2086 (dsh h-reloc-ann   "relocation annotation" () (register BI))
2087 (dnf f-reloc-ann   "relocation annotation" () 0 0)
2088
2089 (define-pmacro (dann xname xcomment xmode xparse xprint)
2090   (define-operand
2091     (name xname)
2092     (comment xcomment)
2093     (type h-reloc-ann)
2094     (index f-reloc-ann)
2095     (mode xmode)
2096     (handlers (parse xparse) (print xprint))
2097     )
2098   )
2099
2100 \f
2101 ; Enums.
2102
2103 ; insn-op:
2104 ; FIXME: should use die macro or some such
2105 (define-normal-insn-enum insn-op "insn op enums" () OP_ f-op
2106  (
2107  "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
2108  "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
2109  "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
2110  "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
2111  "40" "41" "42" "43" "44" "45" "46" "47" "48" "49" "4A" "4B" "4C" "4D" "4E" "4F"
2112  "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "5A" "5B" "5C" "5D" "5E" "5F"
2113  "60" "61" "62" "63" "64" "65" "66" "67" "68" "69" "6A" "6B" "6C" "6D" "6E" "6F"
2114  "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" "7A" "7B" "7C" "7D" "7E" "7F"
2115  )
2116 )
2117
2118 (define-normal-insn-enum insn-ope1 "insn ope enums" () OPE1_ f-ope1
2119  (
2120  "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
2121  "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
2122  "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
2123  "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
2124  )
2125 )
2126
2127 (define-normal-insn-enum insn-ope2 "insn ope enums" () OPE2_ f-ope2
2128  (
2129  "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
2130  )
2131 )
2132
2133 (define-normal-insn-enum insn-ope3 "insn ope enums" () OPE3_ f-ope3
2134  (
2135  "00" "01" "02" "03" "04" "05" "06" "07"
2136  )
2137 )
2138
2139 (define-normal-insn-enum insn-ope4 "insn ope enums" () OPE4_ f-ope4
2140  (
2141  "0" "1" "2" "3"
2142  )
2143 )
2144
2145 ; int-cc: integer branch conditions
2146 ; FIXME: should use die macro or some such
2147 (define-normal-insn-enum int-cc "integer branch cond enums" () ICC_ f-int-cc
2148   (
2149    "nev" "c"  "v"  "lt" "eq" "ls" "n" "le"
2150    "ra"  "nc" "nv" "ge" "ne" "hi" "p" "gt"
2151   )
2152 )
2153
2154 ; flt-cc: floating-point/media branch conditions
2155 ; FIXME: should use die macro or some such
2156 (define-normal-insn-enum flt-cc "float branch cond enums" () FCC_ f-flt-cc
2157   ("nev" "u" "gt" "ug" "lt" "ul" "lg" "ne"
2158    "eq" "ue" "ge" "uge" "le" "ule" "o" "ra")
2159 )
2160 \f
2161 ; Hardware pieces.
2162 ; These entries list the elements of the raw hardware.
2163 ; They're also used to provide tables and other elements of the assembly
2164 ; language.
2165 (dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
2166
2167 ; The PSR. The individual fields are referenced more than the entire
2168 ; register, so reference them directly. We can assemble the
2169 ; entire register contents when necessary.
2170 ;
2171 (dsh h-psr_imple "PSR.IMPLE"   () (register UQI))
2172 (dsh h-psr_ver   "PSR.VER"     () (register UQI))
2173 (dsh h-psr_ice   "PSR.ICE bit" () (register BI))
2174 (dsh h-psr_nem   "PSR.NEM bit" () (register BI))
2175 (dsh h-psr_cm    "PSR.CM  bit" () (register BI))
2176 (dsh h-psr_be    "PSR.BE  bit" () (register BI))
2177 (dsh h-psr_esr   "PSR.ESR bit" () (register BI))
2178 (dsh h-psr_ef    "PSR.EF  bit" () (register BI))
2179 (dsh h-psr_em    "PSR.EM  bit" () (register BI))
2180 (dsh h-psr_pil   "PSR.PIL    " () (register UQI))
2181 (dsh h-psr_ps    "PSR.PS  bit" () (register BI))
2182 (dsh h-psr_et    "PSR.ET  bit" () (register BI))
2183
2184 ; PSR.S requires special handling because the shadow registers (SR0-SR4) must
2185 ; be switched with GR4-GR7 when changing from user to supervisor mode or
2186 ; vice-versa.
2187 (define-hardware
2188   (name h-psr_s)
2189   (comment "PSR.S bit")
2190   (attrs)
2191   (type register BI)
2192   (get)
2193   (set (newval) (c-call VOID "@cpu@_h_psr_s_set_handler" newval))
2194 )
2195
2196 ; The TBR. The individual bits are referenced more than the entire
2197 ; register, so reference them directly. We can assemble the
2198 ; entire register contents when necessary.
2199 ;
2200 (dsh h-tbr_tba "TBR.TBA" () (register UWI))
2201 (dsh h-tbr_tt  "TBR.TT"  () (register UQI))
2202
2203 ; The BPSR. The individual bits are referenced more than the entire
2204 ; register, so reference them directly. We can assemble the
2205 ; entire register contents when necessary.
2206 ;
2207 (dsh h-bpsr_bs   "PSR.S   bit" () (register BI))
2208 (dsh h-bpsr_bet  "PSR.ET  bit" () (register BI))
2209
2210 ; General registers
2211 ;
2212 (define-keyword
2213   (name gr-names)
2214   (print-name h-gr)
2215   (prefix "")
2216   (values
2217    (sp 1) (fp 2)
2218    (gr0   0)(gr1   1)(gr2   2)(gr3   3)(gr4   4)(gr5   5)(gr6   6)(gr7   7)
2219    (gr8   8)(gr9   9)(gr10 10)(gr11 11)(gr12 12)(gr13 13)(gr14 14)(gr15 15)
2220    (gr16 16)(gr17 17)(gr18 18)(gr19 19)(gr20 20)(gr21 21)(gr22 22)(gr23 23)
2221    (gr24 24)(gr25 25)(gr26 26)(gr27 27)(gr28 28)(gr29 29)(gr30 30)(gr31 31)
2222    (gr32 32)(gr33 33)(gr34 34)(gr35 35)(gr36 36)(gr37 37)(gr38 38)(gr39 39)
2223    (gr40 40)(gr41 41)(gr42 42)(gr43 43)(gr44 44)(gr45 45)(gr46 46)(gr47 47)
2224    (gr48 48)(gr49 49)(gr50 50)(gr51 51)(gr52 52)(gr53 53)(gr54 54)(gr55 55)
2225    (gr56 56)(gr57 57)(gr58 58)(gr59 59)(gr60 60)(gr61 61)(gr62 62)(gr63 63)
2226   )
2227 )
2228
2229 (define-hardware
2230   (name h-gr)
2231   (comment "general registers")
2232   (attrs PROFILE)
2233   (type register USI (64))
2234   (indices extern-keyword gr-names)
2235   (get (index) (c-call WI "@cpu@_h_gr_get_handler" index))
2236   (set (index newval) (c-call VOID "@cpu@_h_gr_set_handler" index newval))
2237 )
2238
2239 ; General Registers as double words
2240 ; These registers are shadowed onto h-gr
2241 (define-hardware
2242   (name h-gr_double)
2243   (comment "general registers as double words")
2244   (attrs PROFILE VIRTUAL)
2245   (type register DI (32))
2246   ; FIXME: Need constraint to prohibit odd numbers.
2247   (indices extern-keyword gr-names)
2248   (get (index)
2249        (c-call DI "@cpu@_h_gr_double_get_handler" index))
2250   (set (index newval)
2251        (c-call VOID "@cpu@_h_gr_double_set_handler" index newval))
2252 )
2253
2254 ; General Registers as high and low half words
2255 ; These registers are shadowed onto h-gr
2256 (define-hardware
2257   (name h-gr_hi)
2258   (comment "general registers as high half word")
2259   (attrs PROFILE VIRTUAL)
2260   (type register UHI (64))
2261   (indices extern-keyword gr-names)
2262   (get (index) (c-call UHI "@cpu@_h_gr_hi_get_handler" index))
2263   (set (index newval) (c-call VOID "@cpu@_h_gr_hi_set_handler" index newval))
2264 )
2265 (define-hardware
2266   (name h-gr_lo)
2267   (comment "general registers as low half word")
2268   (attrs PROFILE VIRTUAL)
2269   (type register UHI (64))
2270   (indices extern-keyword gr-names)
2271   (get (index) (c-call UHI "@cpu@_h_gr_lo_get_handler" index))
2272   (set (index newval) (c-call VOID "@cpu@_h_gr_lo_set_handler" index newval))
2273 )
2274
2275 ; Floating Point Registers
2276 (define-keyword
2277   (name fr-names)
2278   (print-name h-fr)
2279   (prefix "")
2280   (values
2281    (fr0   0)(fr1   1)(fr2   2)(fr3   3)(fr4   4)(fr5   5)(fr6   6)(fr7   7)
2282    (fr8   8)(fr9   9)(fr10 10)(fr11 11)(fr12 12)(fr13 13)(fr14 14)(fr15 15)
2283    (fr16 16)(fr17 17)(fr18 18)(fr19 19)(fr20 20)(fr21 21)(fr22 22)(fr23 23)
2284    (fr24 24)(fr25 25)(fr26 26)(fr27 27)(fr28 28)(fr29 29)(fr30 30)(fr31 31)
2285    (fr32 32)(fr33 33)(fr34 34)(fr35 35)(fr36 36)(fr37 37)(fr38 38)(fr39 39)
2286    (fr40 40)(fr41 41)(fr42 42)(fr43 43)(fr44 44)(fr45 45)(fr46 46)(fr47 47)
2287    (fr48 48)(fr49 49)(fr50 50)(fr51 51)(fr52 52)(fr53 53)(fr54 54)(fr55 55)
2288    (fr56 56)(fr57 57)(fr58 58)(fr59 59)(fr60 60)(fr61 61)(fr62 62)(fr63 63)
2289   )
2290 )
2291
2292 (define-hardware
2293   (name h-fr)
2294   (comment "floating point registers")
2295   (attrs PROFILE)
2296   (type register SF (64))
2297   (indices extern-keyword fr-names)
2298   (get (index) (c-call SF "@cpu@_h_fr_get_handler" index))
2299   (set (index newval) (c-call VOID "@cpu@_h_fr_set_handler" index newval))
2300 )
2301
2302 ; Floating Point Registers as double precision
2303 ; These registers are shadowed onto h-fr
2304
2305 (define-hardware
2306   (name h-fr_double)
2307   (comment "floating point registers as double precision")
2308   (attrs PROFILE VIRTUAL)
2309   (type register DF (32))
2310   ; FIXME: Need constraint to prohibit odd numbers.
2311   (indices extern-keyword fr-names)
2312   (get (index)
2313        (c-call DF "@cpu@_h_fr_double_get_handler" index))
2314   (set (index newval)
2315        (c-call VOID "@cpu@_h_fr_double_set_handler" index newval))
2316 )
2317
2318 ; Floating Point Registers as integer words.
2319 ; These registers are shadowed onto h-fr
2320
2321 (define-hardware
2322   (name h-fr_int)
2323   (comment "floating point registers as integers")
2324   (attrs PROFILE VIRTUAL)
2325   (type register USI (64))
2326   (indices extern-keyword fr-names)
2327   (get (index)
2328        (c-call USI "@cpu@_h_fr_int_get_handler" index))
2329   (set (index newval)
2330        (c-call VOID "@cpu@_h_fr_int_set_handler" index newval))
2331 )
2332
2333 ; Floating Point Registers as high and low half words
2334 ; These registers are shadowed onto h-fr
2335 (define-hardware
2336   (name h-fr_hi)
2337   (comment "floating point registers as unsigned high half word")
2338   (attrs PROFILE VIRTUAL)
2339   (type register UHI (64))
2340   (indices extern-keyword fr-names)
2341   (get (regno) (srl (reg h-fr_int regno) 16))
2342   (set (regno newval) (set (reg h-fr_int regno)
2343                            (or (and (reg h-fr_int regno) #xffff)
2344                                (sll newval 16))))
2345 )
2346 (define-hardware
2347   (name h-fr_lo)
2348   (comment "floating point registers as unsigned low half word")
2349   (attrs PROFILE VIRTUAL)
2350   (type register UHI (64))
2351   (indices extern-keyword fr-names)
2352   (get (regno) (and (reg h-fr_int regno) #xffff))
2353   (set (regno newval) (set (reg h-fr_int regno)
2354                            (or (and (reg h-fr_int regno) #xffff0000)
2355                                (and newval #xffff))))
2356 )
2357
2358 ; Floating Point Registers as unsigned bytes
2359 ; These registers are shadowed onto h-fr
2360 (define-hardware
2361   (name h-fr_0)
2362   (comment "floating point registers as unsigned byte 0")
2363   (attrs PROFILE VIRTUAL)
2364   (type register UHI (64))
2365   (indices extern-keyword fr-names)
2366   (get (regno) (and (reg h-fr_int regno) #xff))
2367   (set (regno newval)
2368        (sequence ()
2369                  (if (gt USI newval #xff)
2370                      (set newval #xff))
2371                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffffff00)
2372                                            newval))))
2373 )
2374 (define-hardware
2375   (name h-fr_1)
2376   (comment "floating point registers as unsigned byte 1")
2377   (attrs PROFILE VIRTUAL)
2378   (type register UHI (64))
2379   (indices extern-keyword fr-names)
2380   (get (regno) (and (srl (reg h-fr_int regno) 8) #xff))
2381   (set (regno newval)
2382        (sequence ()
2383                  (if (gt USI newval #xff)
2384                      (set newval #xff))
2385                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffff00ff)
2386                                            (sll newval 8)))))
2387 )
2388 (define-hardware
2389   (name h-fr_2)
2390   (comment "floating point registers as unsigned byte 2")
2391   (attrs PROFILE VIRTUAL)
2392   (type register UHI (64))
2393   (indices extern-keyword fr-names)
2394   (get (regno) (and (srl (reg h-fr_int regno) 16) #xff))
2395   (set (regno newval)
2396        (sequence ()
2397                  (if (gt USI newval #xff)
2398                      (set newval #xff))
2399                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xff00ffff)
2400                                            (sll newval 16)))))
2401 )
2402 (define-hardware
2403   (name h-fr_3)
2404   (comment "floating point registers as unsigned byte 3")
2405   (attrs PROFILE VIRTUAL)
2406   (type register UHI (64))
2407   (indices extern-keyword fr-names)
2408   (get (regno) (and (srl (reg h-fr_int regno) 24) #xff))
2409   (set (regno newval)
2410        (sequence ()
2411                  (if (gt USI newval #xff)
2412                      (set newval #xff))
2413                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #x00ffffff)
2414                                            (sll newval 24)))))
2415 )
2416 ; Coprocessor Registers
2417 ;
2418 (define-keyword
2419   (name cpr-names)
2420   (print-name h-cpr)
2421   (prefix "")
2422   (values
2423 (cpr0   0)(cpr1   1)(cpr2   2)(cpr3   3)(cpr4   4)(cpr5   5)(cpr6   6)(cpr7   7)
2424 (cpr8   8)(cpr9   9)(cpr10 10)(cpr11 11)(cpr12 12)(cpr13 13)(cpr14 14)(cpr15 15)
2425 (cpr16 16)(cpr17 17)(cpr18 18)(cpr19 19)(cpr20 20)(cpr21 21)(cpr22 22)(cpr23 23)
2426 (cpr24 24)(cpr25 25)(cpr26 26)(cpr27 27)(cpr28 28)(cpr29 29)(cpr30 30)(cpr31 31)
2427 (cpr32 32)(cpr33 33)(cpr34 34)(cpr35 35)(cpr36 36)(cpr37 37)(cpr38 38)(cpr39 39)
2428 (cpr40 40)(cpr41 41)(cpr42 42)(cpr43 43)(cpr44 44)(cpr45 45)(cpr46 46)(cpr47 47)
2429 (cpr48 48)(cpr49 49)(cpr50 50)(cpr51 51)(cpr52 52)(cpr53 53)(cpr54 54)(cpr55 55)
2430 (cpr56 56)(cpr57 57)(cpr58 58)(cpr59 59)(cpr60 60)(cpr61 61)(cpr62 62)(cpr63 63)
2431   )
2432 )
2433
2434 (define-hardware
2435   (name h-cpr)
2436   (comment "coprocessor registers")
2437   (attrs PROFILE (MACH frv))
2438   (type register WI (64))
2439   (indices extern-keyword cpr-names)
2440 )
2441
2442 ; Coprocessor Registers as double words
2443 ; These registers are shadowed onto h-cpr
2444 (define-hardware
2445   (name h-cpr_double)
2446   (comment "coprocessor registers as double words")
2447   (attrs PROFILE VIRTUAL (MACH frv))
2448   (type register DI (32))
2449   ; FIXME: Need constraint to prohibit odd numbers.
2450   (indices extern-keyword cpr-names)
2451   (get (index)
2452        (c-call DI "@cpu@_h_cpr_double_get_handler" index))
2453   (set (index newval)
2454        (c-call VOID "@cpu@_h_cpr_double_set_handler" index newval))
2455 )
2456
2457 ; Special Purpose Registers
2458 ;
2459 (define-keyword
2460   (name spr-names)
2461   (print-name h-spr)
2462   (prefix "")
2463   (values
2464    (psr        0) (pcsr       1) (bpcsr      2) (tbr        3) (bpsr       4)
2465
2466    (hsr0      16) (hsr1      17) (hsr2      18) (hsr3      19)
2467    (hsr4      20) (hsr5      21) (hsr6      22) (hsr7      23)
2468    (hsr8      24) (hsr9      25) (hsr10     26) (hsr11     27)
2469    (hsr12     28) (hsr13     29) (hsr14     30) (hsr15     31)
2470    (hsr16     32) (hsr17     33) (hsr18     34) (hsr19     35)
2471    (hsr20     36) (hsr21     37) (hsr22     38) (hsr23     39)
2472    (hsr24     40) (hsr25     41) (hsr26     42) (hsr27     43)
2473    (hsr28     44) (hsr29     45) (hsr30     46) (hsr31     47)
2474    (hsr32     48) (hsr33     49) (hsr34     50) (hsr35     51)
2475    (hsr36     52) (hsr37     53) (hsr38     54) (hsr39     55)
2476    (hsr40     56) (hsr41     57) (hsr42     58) (hsr43     59)
2477    (hsr44     60) (hsr45     61) (hsr46     62) (hsr47     63)
2478    (hsr48     64) (hsr49     65) (hsr50     66) (hsr51     67)
2479    (hsr52     68) (hsr53     69) (hsr54     70) (hsr55     71)
2480    (hsr56     72) (hsr57     73) (hsr58     74) (hsr59     75)
2481    (hsr60     76) (hsr61     77) (hsr62     78) (hsr63     79)
2482
2483    (ccr      256) (cccr     263) (lr       272) (lcr      273) (iacc0h   280) (iacc0l   281) (isr      288)
2484
2485    (neear0   352) (neear1   353) (neear2   354) (neear3   355)
2486    (neear4   356) (neear5   357) (neear6   358) (neear7   359)
2487    (neear8   360) (neear9   361) (neear10  362) (neear11  363)
2488    (neear12  364) (neear13  365) (neear14  366) (neear15  367)
2489    (neear16  368) (neear17  369) (neear18  370) (neear19  371)
2490    (neear20  372) (neear21  373) (neear22  374) (neear23  375)
2491    (neear24  376) (neear25  377) (neear26  378) (neear27  379)
2492    (neear28  380) (neear29  381) (neear30  382) (neear31  383)
2493
2494    (nesr0    384) (nesr1    385) (nesr2    386) (nesr3    387)
2495    (nesr4    388) (nesr5    389) (nesr6    390) (nesr7    391)
2496    (nesr8    392) (nesr9    393) (nesr10   394) (nesr11   395)
2497    (nesr12   396) (nesr13   397) (nesr14   398) (nesr15   399)
2498    (nesr16   400) (nesr17   401) (nesr18   402) (nesr19   403)
2499    (nesr20   404) (nesr21   405) (nesr22   406) (nesr23   407)
2500    (nesr24   408) (nesr25   409) (nesr26   410) (nesr27   411)
2501    (nesr28   412) (nesr29   413) (nesr30   414) (nesr31   415)
2502
2503    (necr     416)
2504
2505    (gner0    432) (gner1    433)
2506
2507    (fner0    434) (fner1    435)
2508
2509    (epcr0    512) (epcr1    513) (epcr2    514) (epcr3    515)
2510    (epcr4    516) (epcr5    517) (epcr6    518) (epcr7    519)
2511    (epcr8    520) (epcr9    521) (epcr10   522) (epcr11   523)
2512    (epcr12   524) (epcr13   525) (epcr14   526) (epcr15   527)
2513    (epcr16   528) (epcr17   529) (epcr18   530) (epcr19   531)
2514    (epcr20   532) (epcr21   533) (epcr22   534) (epcr23   535)
2515    (epcr24   536) (epcr25   537) (epcr26   538) (epcr27   539)
2516    (epcr28   540) (epcr29   541) (epcr30   542) (epcr31   543)
2517    (epcr32   544) (epcr33   545) (epcr34   546) (epcr35   547)
2518    (epcr36   548) (epcr37   549) (epcr38   550) (epcr39   551)
2519    (epcr40   552) (epcr41   553) (epcr42   554) (epcr43   555)
2520    (epcr44   556) (epcr45   557) (epcr46   558) (epcr47   559)
2521    (epcr48   560) (epcr49   561) (epcr50   562) (epcr51   563)
2522    (epcr52   564) (epcr53   565) (epcr54   566) (epcr55   567)
2523    (epcr56   568) (epcr57   569) (epcr58   570) (epcr59   571)
2524    (epcr60   572) (epcr61   573) (epcr62   574) (epcr63   575)
2525
2526    (esr0     576) (esr1     577) (esr2     578) (esr3     579)
2527    (esr4     580) (esr5     581) (esr6     582) (esr7     583)
2528    (esr8     584) (esr9     585) (esr10    586) (esr11    587)
2529    (esr12    588) (esr13    589) (esr14    590) (esr15    591)
2530    (esr16    592) (esr17    593) (esr18    594) (esr19    595)
2531    (esr20    596) (esr21    597) (esr22    598) (esr23    599)
2532    (esr24    600) (esr25    601) (esr26    602) (esr27    603)
2533    (esr28    604) (esr29    605) (esr30    606) (esr31    607)
2534    (esr32    608) (esr33    609) (esr34    610) (esr35    611)
2535    (esr36    612) (esr37    613) (esr38    614) (esr39    615)
2536    (esr40    616) (esr41    617) (esr42    618) (esr43    619)
2537    (esr44    620) (esr45    621) (esr46    622) (esr47    623)
2538    (esr48    624) (esr49    625) (esr50    626) (esr51    627)
2539    (esr52    628) (esr53    629) (esr54    630) (esr55    631)
2540    (esr56    632) (esr57    633) (esr58    634) (esr59    635)
2541    (esr60    636) (esr61    637) (esr62    638) (esr63    639)
2542
2543    (eir0     640) (eir1     641) (eir2     642) (eir3     643)
2544    (eir4     644) (eir5     645) (eir6     646) (eir7     647)
2545    (eir8     648) (eir9     649) (eir10    650) (eir11    651)
2546    (eir12    652) (eir13    653) (eir14    654) (eir15    655)
2547    (eir16    656) (eir17    657) (eir18    658) (eir19    659)
2548    (eir20    660) (eir21    661) (eir22    662) (eir23    663)
2549    (eir24    664) (eir25    665) (eir26    666) (eir27    667)
2550    (eir28    668) (eir29    669) (eir30    670) (eir31    671)
2551
2552    (esfr0    672) (esfr1    673)
2553
2554    (sr0      768) (sr1      769) (sr2      770) (sr3      771)
2555
2556    (scr0     832) (scr1     833) (scr2     834) (scr3     835)
2557
2558    (fsr0    1024) (fsr1    1025) (fsr2    1026) (fsr3    1027)
2559    (fsr4    1028) (fsr5    1029) (fsr6    1030) (fsr7    1031)
2560    (fsr8    1032) (fsr9    1033) (fsr10   1034) (fsr11   1035)
2561    (fsr12   1036) (fsr13   1037) (fsr14   1038) (fsr15   1039)
2562    (fsr16   1040) (fsr17   1041) (fsr18   1042) (fsr19   1043)
2563    (fsr20   1044) (fsr21   1045) (fsr22   1046) (fsr23   1047)
2564    (fsr24   1048) (fsr25   1049) (fsr26   1050) (fsr27   1051)
2565    (fsr28   1052) (fsr29   1053) (fsr30   1054) (fsr31   1055)
2566    (fsr32   1056) (fsr33   1057) (fsr34   1058) (fsr35   1059)
2567    (fsr36   1060) (fsr37   1061) (fsr38   1062) (fsr39   1063)
2568    (fsr40   1064) (fsr41   1065) (fsr42   1066) (fsr43   1067)
2569    (fsr44   1068) (fsr45   1069) (fsr46   1070) (fsr47   1071)
2570    (fsr48   1072) (fsr49   1073) (fsr50   1074) (fsr51   1075)
2571    (fsr52   1076) (fsr53   1077) (fsr54   1078) (fsr55   1079)
2572    (fsr56   1080) (fsr57   1081) (fsr58   1082) (fsr59   1083)
2573    (fsr60   1084) (fsr61   1085) (fsr62   1086) (fsr63   1087)
2574
2575    ; FQ0-FQ31 are 64 bit registers.
2576    ; These names allow access to the upper 32 bits of the FQ registers.
2577    (fqop0   1088) (fqop1   1090) (fqop2   1092) (fqop3   1094)
2578    (fqop4   1096) (fqop5   1098) (fqop6   1100) (fqop7   1102)
2579    (fqop8   1104) (fqop9   1106) (fqop10  1108) (fqop11  1110)
2580    (fqop12  1112) (fqop13  1114) (fqop14  1116) (fqop15  1118)
2581    (fqop16  1120) (fqop17  1122) (fqop18  1124) (fqop19  1126)
2582    (fqop20  1128) (fqop21  1130) (fqop22  1132) (fqop23  1134)
2583    (fqop24  1136) (fqop25  1138) (fqop26  1140) (fqop27  1142)
2584    (fqop28  1144) (fqop29  1146) (fqop30  1148) (fqop31  1150)
2585    ; These names allow access to the lower 32 bits of the FQ registers.
2586    (fqst0   1089) (fqst1   1091) (fqst2   1093) (fqst3   1095)
2587    (fqst4   1097) (fqst5   1099) (fqst6   1101) (fqst7   1103)
2588    (fqst8   1105) (fqst9   1107) (fqst10  1109) (fqst11  1111)
2589    (fqst12  1113) (fqst13  1115) (fqst14  1117) (fqst15  1119)
2590    (fqst16  1121) (fqst17  1123) (fqst18  1125) (fqst19  1127)
2591    (fqst20  1129) (fqst21  1131) (fqst22  1133) (fqst23  1135)
2592    (fqst24  1137) (fqst25  1139) (fqst26  1141) (fqst27  1143)
2593    (fqst28  1145) (fqst29  1147) (fqst30  1149) (fqst31  1151)
2594    ; These also access the lower 32 bits of the FQ registers.
2595    ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2596 ;  (fq0     1089) (fq1     1091) (fq2     1093) (fq3     1095)
2597 ;  (fq4     1097) (fq5     1099) (fq6     1101) (fq7     1103)
2598 ;  (fq8     1105) (fq9     1107) (fq10    1109) (fq11    1111)
2599 ;  (fq12    1113) (fq13    1115) (fq14    1117) (fq15    1119)
2600 ;  (fq16    1121) (fq17    1123) (fq18    1125) (fq19    1127)
2601 ;  (fq20    1129) (fq21    1131) (fq22    1133) (fq23    1135)
2602 ;  (fq24    1137) (fq25    1139) (fq26    1141) (fq27    1143)
2603 ;  (fq28    1145) (fq29    1147) (fq30    1149) (fq31    1151)
2604
2605    (mcilr0  1272) (mcilr1  1273)
2606
2607    (msr0    1280) (msr1    1281) (msr2    1282) (msr3    1283)
2608    (msr4    1284) (msr5    1285) (msr6    1286) (msr7    1287)
2609    (msr8    1288) (msr9    1289) (msr10   1290) (msr11   1291)
2610    (msr12   1292) (msr13   1293) (msr14   1294) (msr15   1295)
2611    (msr16   1296) (msr17   1297) (msr18   1298) (msr19   1299)
2612    (msr20   1300) (msr21   1301) (msr22   1302) (msr23   1303)
2613    (msr24   1304) (msr25   1305) (msr26   1306) (msr27   1307)
2614    (msr28   1308) (msr29   1309) (msr30   1310) (msr31   1311)
2615    (msr32   1312) (msr33   1313) (msr34   1314) (msr35   1315)
2616    (msr36   1316) (msr37   1317) (msr38   1318) (msr39   1319)
2617    (msr40   1320) (msr41   1321) (msr42   1322) (msr43   1323)
2618    (msr44   1324) (msr45   1325) (msr46   1326) (msr47   1327)
2619    (msr48   1328) (msr49   1329) (msr50   1330) (msr51   1331)
2620    (msr52   1332) (msr53   1333) (msr54   1334) (msr55   1335)
2621    (msr56   1336) (msr57   1337) (msr58   1338) (msr59   1339)
2622    (msr60   1340) (msr61   1341) (msr62   1342) (msr63   1343)
2623
2624    ; MQ0-MQ31 are 64 bit registers.
2625    ; These names allow access to the upper 32 bits of the MQ registers.
2626    (mqop0   1344) (mqop1   1346) (mqop2   1348) (mqop3   1350)
2627    (mqop4   1352) (mqop5   1354) (mqop6   1356) (mqop7   1358)
2628    (mqop8   1360) (mqop9   1362) (mqop10  1364) (mqop11  1366)
2629    (mqop12  1368) (mqop13  1370) (mqop14  1372) (mqop15  1374)
2630    (mqop16  1376) (mqop17  1378) (mqop18  1380) (mqop19  1382)
2631    (mqop20  1384) (mqop21  1386) (mqop22  1388) (mqop23  1390)
2632    (mqop24  1392) (mqop25  1394) (mqop26  1396) (mqop27  1398)
2633    (mqop28  1400) (mqop29  1402) (mqop30  1404) (mqop31  1406)
2634    ; These names allow access to the lower 32 bits of the MQ registers.
2635    (mqst0   1345) (mqst1   1347) (mqst2   1349) (mqst3   1351)
2636    (mqst4   1353) (mqst5   1355) (mqst6   1357) (mqst7   1359)
2637    (mqst8   1361) (mqst9   1363) (mqst10  1365) (mqst11  1367)
2638    (mqst12  1369) (mqst13  1371) (mqst14  1373) (mqst15  1375)
2639    (mqst16  1377) (mqst17  1379) (mqst18  1381) (mqst19  1383)
2640    (mqst20  1385) (mqst21  1387) (mqst22  1389) (mqst23  1391)
2641    (mqst24  1393) (mqst25  1395) (mqst26  1397) (mqst27  1399)
2642    (mqst28  1401) (mqst29  1403) (mqst30  1405) (mqst31  1407)
2643    ; These also access the lower 32 bits of the MQ registers.
2644    ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2645 ;  (mq0     1345) (mq1     1347) (mq2     1349) (mq3     1351)
2646 ;  (mq4     1353) (mq5     1355) (mq6     1357) (mq7     1359)
2647 ;  (mq8     1361) (mq9     1363) (mq10    1365) (mq11    1367)
2648 ;  (mq12    1369) (mq13    1371) (mq14    1373) (mq15    1375)
2649 ;  (mq16    1377) (mq17    1379) (mq18    1381) (mq19    1383)
2650 ;  (mq20    1385) (mq21    1387) (mq22    1389) (mq23    1391)
2651 ;  (mq24    1393) (mq25    1395) (mq26    1397) (mq27    1399)
2652 ;  (mq28    1401) (mq29    1403) (mq30    1405) (mq31    1407)
2653
2654    ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2655 ;  (acc0    1408) (acc1    1409) (acc2    1410) (acc3    1411)
2656 ;  (acc4    1412) (acc5    1413) (acc6    1414) (acc7    1415)
2657 ;  (acc8    1416) (acc9    1417) (acc10   1418) (acc11   1419)
2658 ;  (acc12   1420) (acc13   1421) (acc14   1422) (acc15   1423)
2659 ;  (acc16   1424) (acc17   1425) (acc18   1426) (acc19   1427)
2660 ;  (acc20   1428) (acc21   1429) (acc22   1430) (acc23   1431)
2661 ;  (acc24   1432) (acc25   1433) (acc26   1434) (acc27   1435)
2662 ;  (acc28   1436) (acc29   1437) (acc30   1438) (acc31   1439)
2663 ;  (acc32   1440) (acc33   1441) (acc34   1442) (acc35   1443)
2664 ;  (acc36   1444) (acc37   1445) (acc38   1446) (acc39   1447)
2665 ;  (acc40   1448) (acc41   1449) (acc42   1450) (acc43   1451)
2666 ;  (acc44   1452) (acc45   1453) (acc46   1454) (acc47   1455)
2667 ;  (acc48   1456) (acc49   1457) (acc50   1458) (acc51   1459)
2668 ;  (acc52   1460) (acc53   1461) (acc54   1462) (acc55   1463)
2669 ;  (acc56   1464) (acc57   1465) (acc58   1466) (acc59   1467)
2670 ;  (acc60   1468) (acc61   1469) (acc62   1470) (acc63   1471)
2671
2672 ;  (accg0   1472) (accg1   1473) (accg2   1474) (accg3   1475)
2673 ;  (accg4   1476) (accg5   1477) (accg6   1478) (accg7   1479)
2674 ;  (accg8   1480) (accg9   1481) (accg10  1482) (accg11  1483)
2675 ;  (accg12  1484) (accg13  1485) (accg14  1486) (accg15  1487)
2676 ;  (accg16  1488) (accg17  1489) (accg18  1490) (accg19  1491)
2677 ;  (accg20  1492) (accg21  1493) (accg22  1494) (accg23  1495)
2678 ;  (accg24  1496) (accg25  1497) (accg26  1498) (accg27  1499)
2679 ;  (accg28  1500) (accg29  1501) (accg30  1502) (accg31  1503)
2680 ;  (accg32  1504) (accg33  1505) (accg34  1506) (accg35  1507)
2681 ;  (accg36  1508) (accg37  1509) (accg38  1510) (accg39  1511)
2682 ;  (accg40  1512) (accg41  1513) (accg42  1514) (accg43  1515)
2683 ;  (accg44  1516) (accg45  1517) (accg46  1518) (accg47  1519)
2684 ;  (accg48  1520) (accg49  1521) (accg50  1522) (accg51  1523)
2685 ;  (accg52  1524) (accg53  1525) (accg54  1526) (accg55  1527)
2686 ;  (accg56  1528) (accg57  1529) (accg58  1530) (accg59  1531)
2687 ;  (accg60  1532) (accg61  1533) (accg62  1534) (accg63  1535)
2688
2689    (ear0    1536) (ear1    1537) (ear2    1538) (ear3    1539)
2690    (ear4    1540) (ear5    1541) (ear6    1542) (ear7    1543)
2691    (ear8    1544) (ear9    1545) (ear10   1546) (ear11   1547)
2692    (ear12   1548) (ear13   1549) (ear14   1550) (ear15   1551)
2693    (ear16   1552) (ear17   1553) (ear18   1554) (ear19   1555)
2694    (ear20   1556) (ear21   1557) (ear22   1558) (ear23   1559)
2695    (ear24   1560) (ear25   1561) (ear26   1562) (ear27   1563)
2696    (ear28   1564) (ear29   1565) (ear30   1566) (ear31   1567)
2697    (ear32   1568) (ear33   1569) (ear34   1570) (ear35   1571)
2698    (ear36   1572) (ear37   1573) (ear38   1574) (ear39   1575)
2699    (ear40   1576) (ear41   1577) (ear42   1578) (ear43   1579)
2700    (ear44   1580) (ear45   1581) (ear46   1582) (ear47   1583)
2701    (ear48   1584) (ear49   1585) (ear50   1586) (ear51   1587)
2702    (ear52   1588) (ear53   1589) (ear54   1590) (ear55   1591)
2703    (ear56   1592) (ear57   1593) (ear58   1594) (ear59   1595)
2704    (ear60   1596) (ear61   1597) (ear62   1598) (ear63   1599)
2705
2706    (edr0    1600) (edr1    1601) (edr2    1602) (edr3    1603)
2707    (edr4    1604) (edr5    1605) (edr6    1606) (edr7    1607)
2708    (edr8    1608) (edr9    1609) (edr10   1610) (edr11   1611)
2709    (edr12   1612) (edr13   1613) (edr14   1614) (edr15   1615)
2710    (edr16   1616) (edr17   1617) (edr18   1618) (edr19   1619)
2711    (edr20   1620) (edr21   1621) (edr22   1622) (edr23   1623)
2712    (edr24   1624) (edr25   1625) (edr26   1626) (edr27   1627)
2713    (edr28   1628) (edr29   1629) (edr30   1630) (edr31   1631)
2714    (edr32   1632) (edr33   1636) (edr34   1634) (edr35   1635)
2715    (edr36   1636) (edr37   1637) (edr38   1638) (edr39   1639)
2716    (edr40   1640) (edr41   1641) (edr42   1642) (edr43   1643)
2717    (edr44   1644) (edr45   1645) (edr46   1646) (edr47   1647)
2718    (edr48   1648) (edr49   1649) (edr50   1650) (edr51   1651)
2719    (edr52   1652) (edr53   1653) (edr54   1654) (edr55   1655)
2720    (edr56   1656) (edr57   1657) (edr58   1658) (edr59   1659)
2721    (edr60   1660) (edr61   1661) (edr62   1662) (edr63   1663)
2722
2723    (iamlr0  1664) (iamlr1  1665) (iamlr2  1666) (iamlr3  1667)
2724    (iamlr4  1668) (iamlr5  1669) (iamlr6  1670) (iamlr7  1671)
2725    (iamlr8  1672) (iamlr9  1673) (iamlr10 1674) (iamlr11 1675)
2726    (iamlr12 1676) (iamlr13 1677) (iamlr14 1678) (iamlr15 1679)
2727    (iamlr16 1680) (iamlr17 1681) (iamlr18 1682) (iamlr19 1683)
2728    (iamlr20 1684) (iamlr21 1685) (iamlr22 1686) (iamlr23 1687)
2729    (iamlr24 1688) (iamlr25 1689) (iamlr26 1690) (iamlr27 1691)
2730    (iamlr28 1692) (iamlr29 1693) (iamlr30 1694) (iamlr31 1695)
2731    (iamlr32 1696) (iamlr33 1697) (iamlr34 1698) (iamlr35 1699)
2732    (iamlr36 1700) (iamlr37 1701) (iamlr38 1702) (iamlr39 1703)
2733    (iamlr40 1704) (iamlr41 1705) (iamlr42 1706) (iamlr43 1707)
2734    (iamlr44 1708) (iamlr45 1709) (iamlr46 1710) (iamlr47 1711)
2735    (iamlr48 1712) (iamlr49 1713) (iamlr50 1714) (iamlr51 1715)
2736    (iamlr52 1716) (iamlr53 1717) (iamlr54 1718) (iamlr55 1719)
2737    (iamlr56 1720) (iamlr57 1721) (iamlr58 1722) (iamlr59 1723)
2738    (iamlr60 1724) (iamlr61 1725) (iamlr62 1726) (iamlr63 1727)
2739
2740    (iampr0  1728) (iampr1  1729) (iampr2  1730) (iampr3  1731)
2741    (iampr4  1732) (iampr5  1733) (iampr6  1734) (iampr7  1735)
2742    (iampr8  1736) (iampr9  1737) (iampr10 1738) (iampr11 1739)
2743    (iampr12 1740) (iampr13 1741) (iampr14 1742) (iampr15 1743)
2744    (iampr16 1744) (iampr17 1745) (iampr18 1746) (iampr19 1747)
2745    (iampr20 1748) (iampr21 1749) (iampr22 1750) (iampr23 1751)
2746    (iampr24 1752) (iampr25 1753) (iampr26 1754) (iampr27 1755)
2747    (iampr28 1756) (iampr29 1757) (iampr30 1758) (iampr31 1759)
2748    (iampr32 1760) (iampr33 1761) (iampr34 1762) (iampr35 1763)
2749    (iampr36 1764) (iampr37 1765) (iampr38 1766) (iampr39 1767)
2750    (iampr40 1768) (iampr41 1769) (iampr42 1770) (iampr43 1771)
2751    (iampr44 1772) (iampr45 1773) (iampr46 1774) (iampr47 1775)
2752    (iampr48 1776) (iampr49 1777) (iampr50 1778) (iampr51 1779)
2753    (iampr52 1780) (iampr53 1781) (iampr54 1782) (iampr55 1783)
2754    (iampr56 1784) (iampr57 1785) (iampr58 1786) (iampr59 1787)
2755    (iampr60 1788) (iampr61 1789) (iampr62 1790) (iampr63 1791)
2756
2757    (damlr0  1792) (damlr1  1793) (damlr2  1794) (damlr3  1795)
2758    (damlr4  1796) (damlr5  1797) (damlr6  1798) (damlr7  1799)
2759    (damlr8  1800) (damlr9  1801) (damlr10 1802) (damlr11 1803)
2760    (damlr12 1804) (damlr13 1805) (damlr14 1806) (damlr15 1807)
2761    (damlr16 1808) (damlr17 1809) (damlr18 1810) (damlr19 1811)
2762    (damlr20 1812) (damlr21 1813) (damlr22 1814) (damlr23 1815)
2763    (damlr24 1816) (damlr25 1817) (damlr26 1818) (damlr27 1819)
2764    (damlr28 1820) (damlr29 1821) (damlr30 1822) (damlr31 1823)
2765    (damlr32 1824) (damlr33 1825) (damlr34 1826) (damlr35 1827)
2766    (damlr36 1828) (damlr37 1829) (damlr38 1830) (damlr39 1831)
2767    (damlr40 1832) (damlr41 1833) (damlr42 1834) (damlr43 1835)
2768    (damlr44 1836) (damlr45 1837) (damlr46 1838) (damlr47 1839)
2769    (damlr48 1840) (damlr49 1841) (damlr50 1842) (damlr51 1843)
2770    (damlr52 1844) (damlr53 1845) (damlr54 1846) (damlr55 1847)
2771    (damlr56 1848) (damlr57 1849) (damlr58 1850) (damlr59 1851)
2772    (damlr60 1852) (damlr61 1853) (damlr62 1854) (damlr63 1855)
2773
2774    (dampr0  1856) (dampr1  1857) (dampr2  1858) (dampr3  1859)
2775    (dampr4  1860) (dampr5  1861) (dampr6  1862) (dampr7  1863)
2776    (dampr8  1864) (dampr9  1865) (dampr10 1866) (dampr11 1867)
2777    (dampr12 1868) (dampr13 1869) (dampr14 1870) (dampr15 1871)
2778    (dampr16 1872) (dampr17 1873) (dampr18 1874) (dampr19 1875)
2779    (dampr20 1876) (dampr21 1877) (dampr22 1878) (dampr23 1879)
2780    (dampr24 1880) (dampr25 1881) (dampr26 1882) (dampr27 1883)
2781    (dampr28 1884) (dampr29 1885) (dampr30 1886) (dampr31 1887)
2782    (dampr32 1888) (dampr33 1889) (dampr34 1890) (dampr35 1891)
2783    (dampr36 1892) (dampr37 1893) (dampr38 1894) (dampr39 1895)
2784    (dampr40 1896) (dampr41 1897) (dampr42 1898) (dampr43 1899)
2785    (dampr44 1900) (dampr45 1901) (dampr46 1902) (dampr47 1903)
2786    (dampr48 1904) (dampr49 1905) (dampr50 1906) (dampr51 1907)
2787    (dampr52 1908) (dampr53 1909) (dampr54 1910) (dampr55 1911)
2788    (dampr56 1912) (dampr57 1913) (dampr58 1914) (dampr59 1915)
2789    (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919)
2790
2791    (amcr    1920) (stbar   1921) (mmcr    1922)
2792    (iamvr1  1925) (damvr1  1927)
2793    (cxnr    1936) (ttbr    1937) (tplr    1938) (tppr    1939)
2794    (tpxr    1940)
2795    (timerh  1952) (timerl  1953) (timerd  1954)
2796    (dcr     2048) (brr     2049) (nmar    2050) (btbr    2051)
2797
2798    (ibar0   2052) (ibar1   2053) (ibar2   2054) (ibar3   2055)
2799    (dbar0   2056) (dbar1   2057) (dbar2   2058) (dbar3   2059)
2800
2801    (dbdr00  2060) (dbdr01  2061) (dbdr02  2062) (dbdr03  2063)
2802    (dbdr10  2064) (dbdr11  2065) (dbdr12  2066) (dbdr13  2067)
2803    (dbdr20  2068) (dbdr21  2069) (dbdr22  2070) (dbdr23  2071)
2804    (dbdr30  2072) (dbdr31  2073) (dbdr32  2074) (dbdr33  2075)
2805
2806    (dbmr00  2076) (dbmr01  2077) (dbmr02  2078) (dbmr03  2079)
2807    (dbmr10  2080) (dbmr11  2081) (dbmr12  2082) (dbmr13  2083)
2808    (dbmr20  2084) (dbmr21  2085) (dbmr22  2086) (dbmr23  2087)
2809    (dbmr30  2088) (dbmr31  2089) (dbmr32  2090) (dbmr33  2091)
2810
2811    (cpcfr   2304) (cpcr    2305) (cpsr    2306) (cptr    2307)
2812    (cphsr0  2308) (cphsr1  2309) (cpesr0  2320) (cpesr1  2321)
2813    (cpemr0  2322) (cpemr1  2323)
2814
2815    (iperr0  2324) (iperr1  2325) (ipjsr   2326) (ipjrr   2327)
2816    (ipcsr0  2336) (ipcsr1  2337) (ipcwer0 2338) (ipcwer1 2339)
2817    (ipcwr   2340)
2818
2819    (mbhsr   2352) (mbssr   2353) (mbrsr   2354) (mbsdr   2355)
2820    (mbrdr   2356) (mbsmr   2357) (mbstr0  2359) (mbstr1  2360)
2821
2822    (slpr    2368) (sldr    2369) (slhsr   2370) (sltr    2371)
2823    (slwr    2372)
2824
2825    (ihsr8   3848) (ihsr9   3849) (ihsr10  3850)
2826   )
2827 )
2828
2829 (define-hardware
2830   (name h-spr)
2831   (comment "special purpose registers")
2832   (attrs PROFILE)
2833   (type register UWI (4096))
2834   (indices extern-keyword spr-names)
2835   (get (index) (c-call UWI "@cpu@_h_spr_get_handler" index))
2836   (set (index newval) (c-call VOID "@cpu@_h_spr_set_handler" index newval))
2837 )
2838
2839 (define-pmacro (spr-pcsr)  (reg h-spr   1))
2840 (define-pmacro (spr-bpcsr) (reg h-spr   2))
2841 (define-pmacro (spr-lr)    (reg h-spr 272))
2842 (define-pmacro (spr-lcr)   (reg h-spr 273))
2843 (define-pmacro (spr-iacc0h) (reg h-spr 280))
2844 (define-pmacro (spr-iacc0l) (reg h-spr 281))
2845 (define-pmacro (spr-sr0)   (reg h-spr 768))
2846 (define-pmacro (spr-sr1)   (reg h-spr 769))
2847 (define-pmacro (spr-sr2)   (reg h-spr 770))
2848 (define-pmacro (spr-sr3)   (reg h-spr 771))
2849
2850 ; Accumulator guard. Actually a subset of the SPR registers, but those SPRs
2851 ; are read-only in most insns. This hardware element is used by those insns
2852 ; which have direct access (mwtaccg, mrdaccg).
2853 (define-keyword
2854   (name accg-names)
2855   (print-name h-accg)
2856   (prefix "")
2857   (values
2858    (accg0   0)(accg1   1)(accg2   2)(accg3   3)
2859    (accg4   4)(accg5   5)(accg6   6)(accg7   7)
2860    (accg8   8)(accg9   9)(accg10 10)(accg11 11)
2861    (accg12 12)(accg13 13)(accg14 14)(accg15 15)
2862    (accg16 16)(accg17 17)(accg18 18)(accg19 19)
2863    (accg20 20)(accg21 21)(accg22 22)(accg23 23)
2864    (accg24 24)(accg25 25)(accg26 26)(accg27 27)
2865    (accg28 28)(accg29 29)(accg30 30)(accg31 31)
2866    (accg32 32)(accg33 33)(accg34 34)(accg35 35)
2867    (accg36 36)(accg37 37)(accg38 38)(accg39 39)
2868    (accg40 40)(accg41 41)(accg42 42)(accg43 43)
2869    (accg44 44)(accg45 45)(accg46 46)(accg47 47)
2870    (accg48 48)(accg49 49)(accg50 50)(accg51 51)
2871    (accg52 52)(accg53 53)(accg54 54)(accg55 55)
2872    (accg56 56)(accg57 57)(accg58 58)(accg59 59)
2873    (accg60 60)(accg61 61)(accg62 62)(accg63 63)
2874   )
2875 )
2876
2877 (define-hardware
2878   (name h-accg)
2879   (comment "accumulator guard")
2880   (attrs PROFILE VIRTUAL)
2881   (type register UWI (64))
2882   (indices extern-keyword accg-names)
2883   (get (index)
2884        (and (reg h-spr (add index 1472)) #xff))
2885   (set (index newval)
2886        (set (raw-reg UWI h-spr (add index 1472)) (and newval #xff)))
2887 )
2888
2889 ; 40 bit accumulator. Composed of ACCG and ACC registers concatenated, but
2890 ; referenced more often as the composed 40 bits.
2891 (define-keyword
2892   (name acc-names)
2893   (print-name h-acc40)
2894   (prefix "")
2895   (values
2896 (acc0   0)(acc1   1)(acc2   2)(acc3   3)(acc4   4)(acc5   5)(acc6   6)(acc7   7)
2897 (acc8   8)(acc9   9)(acc10 10)(acc11 11)(acc12 12)(acc13 13)(acc14 14)(acc15 15)
2898 (acc16 16)(acc17 17)(acc18 18)(acc19 19)(acc20 20)(acc21 21)(acc22 22)(acc23 23)
2899 (acc24 24)(acc25 25)(acc26 26)(acc27 27)(acc28 28)(acc29 29)(acc30 30)(acc31 31)
2900 (acc32 32)(acc33 33)(acc34 34)(acc35 35)(acc36 36)(acc37 37)(acc38 38)(acc39 39)
2901 (acc40 40)(acc41 41)(acc42 42)(acc43 43)(acc44 44)(acc45 45)(acc46 46)(acc47 47)
2902 (acc48 48)(acc49 49)(acc50 50)(acc51 51)(acc52 52)(acc53 53)(acc54 54)(acc55 55)
2903 (acc56 56)(acc57 57)(acc58 58)(acc59 59)(acc60 60)(acc61 61)(acc62 62)(acc63 63)
2904   )
2905 )
2906
2907 (define-hardware
2908   (name h-acc40S)
2909   (comment "40 bit signed accumulator")
2910   (attrs PROFILE VIRTUAL)
2911   (type register DI (64))
2912   (indices extern-keyword acc-names)
2913   ; The accumlator is made up of two 32 bit registers, accgi/acci.
2914   ; We want to extract this as a combined 40 signed bits
2915   (get (index)
2916        (or DI
2917            (sll  DI (ext DI (trunc QI (reg h-spr (add index 1472))))
2918                  32)
2919            (zext DI (reg h-spr (add index 1408)))))
2920   ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
2921   ; on ACC and ACCG registers
2922   (set (index newval)
2923        (sequence ()
2924                  (c-call VOID "frv_check_spr_write_access" (add index 1408))
2925                  (set (raw-reg UWI h-spr
2926                                (add index 1472)) (and (srl newval 32) #xff))
2927                  (set (raw-reg UWI h-spr
2928                                (add index 1408)) (trunc USI newval))))
2929 )
2930
2931 (define-hardware
2932   (name h-acc40U)
2933   (comment "40 bit unsigned accumulator")
2934   (attrs PROFILE VIRTUAL)
2935   (type register UDI (64))
2936   (indices extern-keyword acc-names)
2937   ; The accumlator is made up of two 32 bit registers, accgi/acci.
2938   ; We want to extract this as a combined 40 unsigned bits
2939   (get (index)
2940        (or DI
2941            (sll  DI (zext DI (reg h-spr (add index 1472))) 32)
2942            (zext DI (reg h-spr (add index 1408)))))
2943   ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
2944   ; on ACC and ACCG registers
2945   (set (index newval)
2946        (sequence ()
2947                  (c-call VOID "frv_check_spr_write_access" (add index 1408))
2948                  (set (raw-reg UWI h-spr
2949                                (add index 1472)) (and (srl newval 32) #xff))
2950                  (set (raw-reg UWI h-spr
2951                                (add index 1408)) (trunc USI newval))))
2952 )
2953 ; 64-bit signed accumulator.  Composed of iacc0h and iacc0l registers
2954 ; concatenated, but referenced more often as the composed 64 bits.
2955 (define-keyword
2956   ; This is totally hokey -- I have to have an index!
2957   (name iacc0-names)
2958   (print-name h-iacc0)
2959   (prefix "")
2960   (values (iacc0 0))
2961 )
2962
2963 (define-hardware
2964   (name h-iacc0)
2965   (comment "64 bit signed accumulator")
2966   (attrs PROFILE VIRTUAL (MACH fr400,fr450))
2967   (type register DI (1))
2968   (indices extern-keyword iacc0-names)
2969   ; The single 64-bit integer accumulator is made up of two 32 bit
2970   ; registers, iacc0h and iacc0l.  We want to extract this as a
2971   ; combined 64 signed bits.
2972   (get (idx) (or DI (sll DI (ext DI (spr-iacc0h)) 32) (zext DI (spr-iacc0l))))
2973   (set (idx newval)
2974        (sequence ()
2975                  (set (spr-iacc0h) (trunc SI (srl newval 32)))
2976                  (set (spr-iacc0l) (trunc SI newval))))
2977 )
2978
2979 ; Integer condition code registers (CCR)
2980 ;
2981 ; The individual sub registers bits of the CCR are referenced more often than
2982 ; the entire register so set them directly. We can assemble the
2983 ; entire register when necessary.
2984 ;
2985 (define-keyword
2986   (name iccr-names)
2987   (print-name h-iccr)
2988   (prefix "")
2989   (values (icc0 0) (icc1 1) (icc2 2) (icc3 3))
2990 )
2991
2992 (define-hardware
2993   (name h-iccr)
2994   (comment "Integer condition code registers")
2995   (attrs PROFILE)
2996   (type register UQI (4))
2997   (indices extern-keyword iccr-names)
2998 )
2999
3000 ; Floating point condition code registers (CCR)
3001 ;
3002 ; The individual sub registers bits of the CCR are referenced more often than
3003 ; the entire register so set them directly. We can assemble the
3004 ; entire register when necessary.
3005 ;
3006 (define-keyword
3007   (name fccr-names)
3008   (print-name h-fccr)
3009   (prefix "")
3010   (values (fcc0 0) (fcc1 1) (fcc2 2) (fcc3 3))
3011 )
3012
3013 (define-hardware
3014   (name h-fccr)
3015   (comment "Floating point condition code registers")
3016   (attrs PROFILE)
3017   (type register UQI (4))
3018   (indices extern-keyword fccr-names)
3019 )
3020
3021 ; C condition code registers (CCCR)
3022 ;
3023 (define-keyword
3024   (name cccr-names)
3025   (print-name h-cccr)
3026   (prefix "")
3027   (values (cc0 0) (cc1 1) (cc2 2) (cc3 3) (cc4 4) (cc5 5) (cc6 6) (cc7 7))
3028 )
3029
3030 (define-hardware
3031   (name h-cccr)
3032   (comment "Condition code registers")
3033   (attrs PROFILE)
3034   (type register UQI (8))
3035   (indices extern-keyword cccr-names)
3036 )
3037 \f
3038 ; Dummy hardware used to define packing bit on insns
3039 ;
3040 (define-hardware
3041   (name h-pack)
3042   (comment "Packing bit dummy hardware")
3043   (type immediate (UINT 1))
3044   (values keyword "" (("" 1) (".p" 0) (".P" 0)))
3045 )
3046 ; Dummy hardware used to define hint field for branches always taken
3047 ;
3048 (define-hardware
3049   (name h-hint-taken)
3050   (comment "Branch taken hint dummy hardware")
3051   (type immediate (UINT 1))
3052   ; The order of these is important. We want '2' to get written by default,
3053   ; but we also want the docoder/disassembler to allow the values '0', '1' and
3054   ; '3'.
3055   (values keyword "" (("" 2) ("" 0) ("" 1) ("" 3)))
3056 )
3057 ; Dummy hardware used to define hint field for branches never taken
3058 ;
3059 (define-hardware
3060   (name h-hint-not-taken)
3061   (comment "Branch not taken hint dummy hardware")
3062   (type immediate (UINT 1))
3063   ; The order of these is important. We want '0' to get written by default,
3064   ; but we also want the docoder/disassembler to allow the values '1', '2' and
3065   ; '3'.
3066   (values keyword "" (("" 0) ("" 1) ("" 2) ("" 3)))
3067 )
3068 \f
3069 ; Instruction Operands.
3070 ; These entries provide a layer between the assembler and the raw hardware
3071 ; description, and are used to refer to hardware elements in the semantic
3072 ; code.  Usually there's a bit of over-specification, but in more complicated
3073 ; instruction sets there isn't.
3074
3075 ; FRV specific operand attributes:
3076
3077 (define-attr
3078   (for operand)
3079   (type boolean)
3080   (name HASH-PREFIX)
3081   (comment "immediates have an optional '#' prefix")
3082 )
3083
3084 ; ??? Convention says this should be o-sr, but then the insn definitions
3085 ; should refer to o-sr which is clumsy.  The "o-" could be implicit, but
3086 ; then it should be implicit for all the symbols here, but then there would
3087 ; be confusion between (f-)simm8 and (h-)simm8.
3088 ; So for now the rule is exactly as it appears here.
3089
3090 ; dnmop: define-normal-mode-operand: temporary, pending potential removal
3091 ; of modes from h/w.
3092 (define-pmacro (dnmop xname xcomment xattrs xtype xindex xmode)
3093   (define-operand
3094     (name xname)
3095     (comment xcomment)
3096     (.splice attrs (.unsplice xattrs))
3097     (type xtype)
3098     (index xindex)
3099     (mode xmode)
3100     )
3101 )
3102
3103 ; dnpmop: define-normal-parsed-mode-operand: Normal mode operand with parse handler
3104 (define-pmacro (dnpmop xname xcomment xattrs xtype xindex xmode xparse)
3105   (define-operand
3106     (name xname)
3107     (comment xcomment)
3108     (.splice attrs (.unsplice xattrs))
3109     (type xtype)
3110     (index xindex)
3111     (mode xmode)
3112     (handlers (parse xparse))
3113     )
3114 )
3115
3116 (dnop  pack "packing bit" () h-pack f-pack)
3117
3118 (dnmop GRi        "source register 1"      () h-gr        f-GRi  SI)
3119 (dnmop GRj        "source register 2"      () h-gr        f-GRj  SI)
3120 (dnmop GRk        "destination register"   () h-gr        f-GRk  SI)
3121 (dnmop GRkhi      "destination register"   () h-gr_hi     f-GRk  UHI)
3122 (dnmop GRklo      "destination register"   () h-gr_lo     f-GRk  UHI)
3123 (dnpmop GRdoublek "destination register"   () h-gr_double f-GRk  DI "even_register")
3124 (dnmop ACC40Si    "signed accumulator"     () h-acc40S    f-ACC40Si DI)
3125 (dnmop ACC40Ui    "unsigned accumulator"   () h-acc40U    f-ACC40Ui UDI)
3126 (dnmop ACC40Sk    "target accumulator"     () h-acc40S    f-ACC40Sk DI)
3127 (dnmop ACC40Uk    "target accumulator"     () h-acc40U    f-ACC40Uk UDI)
3128 (dnmop ACCGi      "source register"        () h-accg      f-ACCGi   UWI)
3129 (dnmop ACCGk      "target register"        () h-accg      f-ACCGk   UWI)
3130
3131 (dnmop CPRi       "source register"        ((MACH frv)) h-cpr        f-CPRi SI)
3132 (dnmop CPRj       "source register"        ((MACH frv)) h-cpr        f-CPRj SI)
3133 (dnmop CPRk       "destination register"   ((MACH frv)) h-cpr        f-CPRk SI)
3134 (dnpmop CPRdoublek "destination register"  ((MACH frv)) h-cpr_double f-CPRk DI "even_register")
3135
3136 ; floating point operands
3137 (dnmop FRinti    "source register 1"      () h-fr_int    f-FRi SI)
3138 (dnmop FRintj    "source register 2"      () h-fr_int    f-FRj SI)
3139 (dnmop FRintk    "target register"        () h-fr_int    f-FRk SI)
3140 (dnmop FRi       "source register 1"      () h-fr        f-FRi SF)
3141 (dnmop FRj       "source register 2"      () h-fr        f-FRj SF)
3142 (dnmop FRk       "destination register"   () h-fr        f-FRk SF)
3143 (dnmop FRkhi     "destination register"   () h-fr_hi     f-FRk UHI)
3144 (dnmop FRklo     "destination register"   () h-fr_lo     f-FRk UHI)
3145 (dnpmop FRdoublei "source register 1"     () h-fr_double f-FRi DF "even_register")
3146 (dnpmop FRdoublej "source register 2"     () h-fr_double f-FRj DF "even_register")
3147 (dnpmop FRdoublek "target register"       () h-fr_double f-FRk DF "even_register")
3148
3149 (dnop CRi       "source register 1"       () h-cccr f-CRi)
3150 (dnop CRj       "source register 2"       () h-cccr f-CRj)
3151 (dnop CRj_int   "destination register"    () h-cccr f-CRj_int)
3152 (dnop CRj_float "destination register"    () h-cccr f-CRj_float)
3153 (dnop CRk       "destination register"    () h-cccr f-CRk)
3154 (dnop CCi       "condition   register"    () h-cccr f-CCi)
3155
3156 (dnop ICCi_1  "condition   register"      () h-iccr f-ICCi_1)
3157 (dnop ICCi_2  "condition   register"      () h-iccr f-ICCi_2)
3158 (dnop ICCi_3  "condition   register"      () h-iccr f-ICCi_3)
3159 (dnop FCCi_1  "condition   register"      () h-fccr f-FCCi_1)
3160 (dnop FCCi_2  "condition   register"      () h-fccr f-FCCi_2)
3161 (dnop FCCi_3  "condition   register"      () h-fccr f-FCCi_3)
3162 (dnop FCCk    "condition   register"      () h-fccr f-FCCk)
3163
3164 (dnop eir     "exception insn reg"        () h-uint f-eir)
3165 (dnop s10     "10 bit signed immediate"   (HASH-PREFIX) h-sint f-s10)
3166 (dnop u16     "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-u16)
3167 (dnop s16     "16 bit signed   immediate" (HASH-PREFIX) h-sint f-s16)
3168 (dnop s6      "6  bit signed   immediate" (HASH-PREFIX) h-sint f-s6)
3169 (dnop s6_1    "6  bit signed   immediate" (HASH-PREFIX) h-sint f-s6_1)
3170 (dnop u6      "6  bit unsigned immediate" (HASH-PREFIX) h-uint f-u6)
3171 (dnop s5      "5  bit signed   immediate" (HASH-PREFIX) h-sint f-s5)
3172 (dnop cond    "conditional arithmetic"    (HASH-PREFIX) h-uint f-cond)
3173 (dnop ccond   "lr branch condition"       (HASH-PREFIX) h-uint f-ccond)
3174 (dnop hint    "2 bit branch predictor"    (HASH-PREFIX) h-uint f-hint)
3175 (dnop hint_taken "2 bit branch predictor"     () h-hint-taken     f-hint)
3176 (dnop hint_not_taken "2 bit branch predictor" () h-hint-not-taken f-hint)
3177
3178 (dnop LI      "link indicator"            () h-uint f-LI)
3179 (dnop lock    "cache lock indicator"      (HASH-PREFIX) h-uint f-lock)
3180 (dnop debug   "debug mode indicator"      (HASH-PREFIX) h-uint f-debug)
3181 (dnop ae      "all entries indicator"     (HASH-PREFIX) h-uint f-ae)
3182
3183 (dnop label16  "18 bit pc relative address" () h-iaddr f-label16)
3184
3185 (dnop LRAE "Load Real Address E flag" () h-uint f-LRAE)
3186 (dnop LRAD "Load Real Address D flag" () h-uint f-LRAD)
3187 (dnop LRAS "Load Real Address S flag" () h-uint f-LRAS)
3188
3189 (dnop TLBPRopx "TLB Probe operation number" () h-uint f-TLBPRopx)
3190 (dnop TLBPRL   "TLB Probe L flag"           () h-uint f-TLBPRL)
3191
3192 (define-operand
3193   (name A0)
3194   (comment "A==0 operand of mclracc")
3195   (attrs)
3196   (type h-uint)
3197   (index f-A)
3198   (mode USI)
3199   (handlers (parse "A0"))
3200 )
3201
3202 (define-operand
3203   (name A1)
3204   (comment "A==1 operand of mclracc")
3205   (attrs)
3206   (type h-uint)
3207   (index f-A)
3208   (mode USI)
3209   (handlers (parse "A1"))
3210 )
3211
3212 (define-operand
3213   (name FRintieven)
3214   (comment "(even) source register 1")
3215   (attrs)
3216   (type h-fr_int)
3217   (index f-FRi)
3218   (mode SI)
3219   (handlers (parse "even_register"))
3220 )
3221
3222 (define-operand
3223   (name FRintjeven)
3224   (comment "(even) source register 2")
3225   (attrs)
3226   (type h-fr_int)
3227   (index f-FRj)
3228   (mode SI)
3229   (handlers (parse "even_register"))
3230 )
3231
3232 (define-operand
3233   (name FRintkeven)
3234   (comment "(even) target register")
3235   (attrs)
3236   (type h-fr_int)
3237   (index f-FRk)
3238   (mode SI)
3239   (handlers (parse "even_register"))
3240 )
3241
3242 (define-operand
3243   (name d12)
3244   (comment "12 bit signed immediate")
3245   (attrs)
3246   (type h-sint)
3247   (index f-d12)
3248   (handlers (parse "d12"))
3249 )
3250
3251 (define-operand
3252   (name s12)
3253   (comment "12 bit signed immediate")
3254   (attrs HASH-PREFIX)
3255   (type h-sint)
3256   (index f-d12)
3257   (handlers (parse "s12"))
3258 )
3259
3260 (define-operand
3261   (name u12)
3262   (comment "12 bit signed immediate")
3263   (attrs HASH-PREFIX)
3264   (type h-sint)
3265   (index f-u12)
3266   (handlers (parse "u12"))
3267 )
3268
3269 (define-operand
3270   (name spr)
3271   (comment "special purpose register")
3272   (attrs)
3273   (type  h-spr)
3274   (index f-spr)
3275   (handlers (parse "spr") (print "spr"))
3276 )
3277
3278 (define-operand
3279   (name ulo16)
3280   (comment "16 bit unsigned immediate, for #lo()")
3281   (attrs)
3282   (type h-uint)
3283   (index f-u16)
3284   (handlers (parse "ulo16") (print "lo"))
3285 )
3286
3287 (define-operand
3288   (name slo16)
3289   (comment "16 bit unsigned immediate, for #lo()")
3290   (attrs)
3291   (type h-sint)
3292   (index f-s16)
3293   (handlers (parse "uslo16") (print "lo"))
3294 )
3295
3296 (define-operand
3297   (name uhi16)
3298   (comment "16 bit unsigned immediate, for #hi()")
3299   (attrs)
3300   (type h-uint)
3301   (index f-u16)
3302   (handlers (parse "uhi16") (print "hi"))
3303 )
3304
3305 (define-operand
3306   (name label24)
3307   (comment "26 bit pc relative address")
3308   (attrs)
3309   (type h-iaddr)
3310   (index f-label24)
3311   (mode SI)
3312   (handlers (parse "call_label"))
3313 )
3314
3315 ; operands representing hardware
3316 ;
3317 (dnop psr_esr "PSR.ESR bit" (SEM-ONLY) h-psr_esr f-nil)
3318 (dnop psr_s   "PSR.S   bit" (SEM-ONLY) h-psr_s   f-nil)
3319 (dnop psr_ps  "PSR.PS  bit" (SEM-ONLY) h-psr_ps  f-nil)
3320 (dnop psr_et  "PSR.ET  bit" (SEM-ONLY) h-psr_et  f-nil)
3321
3322 (dnop bpsr_bs  "BPSR.BS  bit" (SEM-ONLY) h-bpsr_bs  f-nil)
3323 (dnop bpsr_bet "BPSR.BET bit" (SEM-ONLY) h-bpsr_bet f-nil)
3324
3325 (dnop tbr_tba "TBR.TBA" (SEM-ONLY) h-tbr_tba f-nil)
3326 (dnop tbr_tt  "TBR.TT"  (SEM-ONLY) h-tbr_tt  f-nil)
3327
3328 ; Null operands
3329 ;
3330 (define-pmacro (ICCi_1-null)  (f-ICCi_1-null 0))
3331 (define-pmacro (ICCi_2-null)  (f-ICCi_2-null 0))
3332 (define-pmacro (ICCi_3-null)  (f-ICCi_3-null 0))
3333 (define-pmacro (FCCi_1-null)  (f-FCCi_1-null 0))
3334 (define-pmacro (FCCi_2-null)  (f-FCCi_2-null 0))
3335 (define-pmacro (FCCi_3-null)  (f-FCCi_3-null 0))
3336 (define-pmacro (rs-null)      (f-rs-null     0))
3337 (define-pmacro (GRi-null)     (f-GRi-null    0))
3338 (define-pmacro (GRj-null)     (f-GRj-null    0))
3339 (define-pmacro (GRk-null)     (f-GRk-null    0))
3340 (define-pmacro (FRi-null)     (f-FRi-null    0))
3341 (define-pmacro (FRj-null)     (f-FRj-null    0))
3342 (define-pmacro (ACCj-null)    (f-ACCj-null   0))
3343 (define-pmacro (rd-null)      (f-rd-null     0))
3344 (define-pmacro (cond-null)    (f-cond-null   0))
3345 (define-pmacro (ccond-null)   (f-ccond-null  0))
3346 (define-pmacro (s12-null)     (f-s12-null    0))
3347 (define-pmacro (label16-null) (f-label16-null 0))
3348 (define-pmacro (misc-null-1)  (f-misc-null-1 0))
3349 (define-pmacro (misc-null-2)  (f-misc-null-2 0))
3350 (define-pmacro (misc-null-3)  (f-misc-null-3 0))
3351 (define-pmacro (misc-null-4)  (f-misc-null-4 0))
3352 (define-pmacro (misc-null-5)  (f-misc-null-5 0))
3353 (define-pmacro (misc-null-6)  (f-misc-null-6 0))
3354 (define-pmacro (misc-null-7)  (f-misc-null-7 0))
3355 (define-pmacro (misc-null-8)  (f-misc-null-8 0))
3356 (define-pmacro (misc-null-9)  (f-misc-null-9 0))
3357 (define-pmacro (misc-null-10) (f-misc-null-10 0))
3358 (define-pmacro (misc-null-11) (f-misc-null-11 0))
3359
3360 (define-pmacro (LRA-null)     (f-LRA-null 0))
3361 (define-pmacro (TLBPR-null)   (f-TLBPR-null 0))
3362
3363 (define-pmacro (LI-on)       (f-LI-on  1))
3364 (define-pmacro (LI-off)      (f-LI-off 0))
3365 \f
3366 ; Instruction definitions.
3367 ;
3368 ; Notes:
3369 ; - dni is short for "define-normal-instruction"
3370 ; - Macros are used to represent each insn format. These should be used as much
3371 ;   as possible unless an insn has exceptional behaviour
3372 ;
3373
3374 ; Commonly used Macros
3375 ;
3376 ; Specific registers
3377 ;
3378
3379 ; Integer condition code manipulation
3380 ;
3381 (define-pmacro (set-z-and-n icc x)
3382   (if (eq x 0)
3383       (set icc (or (and icc #x7) #x4))
3384       (if (lt x 0)
3385           (set icc (or (and icc #xb) #x8))
3386           (set icc (and icc #x3))))
3387 )
3388
3389 (define-pmacro (set-n icc val)
3390   (if (eq val 0)
3391       (set icc (and icc #x7))
3392       (set icc (or  icc #x8)))
3393 )
3394
3395 (define-pmacro (set-z icc val)
3396   (if (eq val 0)
3397       (set icc (and icc #xb))
3398       (set icc (or  icc #x4)))
3399 )
3400
3401 (define-pmacro (set-v icc val)
3402   (if (eq val 0)
3403       (set icc (and icc #xd))
3404       (set icc (or  icc #x2)))
3405 )
3406
3407 (define-pmacro (set-c icc val)
3408   (if (eq val 0)
3409       (set icc (and icc #xe))
3410       (set icc (or  icc #x1)))
3411 )
3412
3413 (define-pmacro (nbit icc)
3414   (trunc BI (srl (and icc #x8) 3))
3415 )
3416
3417 (define-pmacro (zbit icc)
3418   (trunc BI (srl (and icc #x4) 2))
3419 )
3420
3421 (define-pmacro (vbit icc)
3422   (trunc BI (srl (and icc #x2) 1))
3423 )
3424
3425 (define-pmacro (cbit icc)
3426   (trunc BI (and icc #x1))
3427 )
3428
3429 (define-pmacro (ebit icc)
3430   (trunc BI (srl (and icc #x8) 3))
3431 )
3432
3433 (define-pmacro (lbit icc)
3434   (trunc BI (srl (and icc #x4) 2))
3435 )
3436
3437 (define-pmacro (gbit icc)
3438   (trunc BI (srl (and icc #x2) 1))
3439 )
3440
3441 (define-pmacro (ubit icc)
3442   (trunc BI (and icc #x1))
3443 )
3444
3445 ; FRV insns
3446 ;
3447 ;
3448 ; Format: INT, Logic, Shift r-r
3449 ;
3450 (define-pmacro (int-logic-r-r name operation op ope comment)
3451   (dni name
3452        (comment)
3453        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3454         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3455        (.str name "$pack $GRi,$GRj,$GRk")
3456        (+ pack GRk op GRi (ICCi_1-null) ope GRj)
3457        (set GRk (operation GRi GRj))
3458        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3459         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3460   )
3461 )
3462
3463 (int-logic-r-r add  add   OP_00 OPE2_00 "add reg/reg")
3464 (int-logic-r-r sub  sub   OP_00 OPE2_04 "sub reg/reg")
3465 (int-logic-r-r and  and   OP_01 OPE2_00 "and reg/reg")
3466 (int-logic-r-r or   or    OP_01 OPE2_02 "or  reg/reg")
3467 (int-logic-r-r xor  xor   OP_01 OPE2_04 "xor reg/reg")
3468
3469 (dni not
3470      ("not")
3471      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3472       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3473      ("not$pack $GRj,$GRk")
3474      (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj)
3475      (set GRk (inv GRj))
3476      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3477       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3478 )
3479
3480 (dni sdiv
3481      "signed division"
3482      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3483       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3484      "sdiv$pack $GRi,$GRj,$GRk"
3485      (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj)
3486      (sequence ()
3487                (c-call VOID "@cpu@_signed_integer_divide"
3488                        GRi GRj (index-of GRk) 0)
3489                (clobber GRk))
3490      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3491       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3492 )
3493
3494 (dni nsdiv
3495      "non excepting signed division"
3496      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3497       (MACH simple,tomcat,fr500,fr550,frv))
3498      "nsdiv$pack $GRi,$GRj,$GRk"
3499      (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0E GRj)
3500      (sequence ()
3501                (c-call VOID "@cpu@_signed_integer_divide"
3502                        GRi GRj (index-of GRk) 1)
3503                (clobber GRk))
3504      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3505 )
3506
3507 (dni udiv
3508      "unsigned division reg/reg"
3509      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3510       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3511      "udiv$pack $GRi,$GRj,$GRk"
3512      (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj)
3513      (sequence ()
3514                (c-call VOID "@cpu@_unsigned_integer_divide"
3515                        GRi GRj (index-of GRk) 0)
3516                (clobber GRk))
3517      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3518       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3519 )
3520
3521 (dni nudiv
3522      "non excepting unsigned division"
3523      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3524       (MACH simple,tomcat,fr500,fr550,frv))
3525      "nudiv$pack $GRi,$GRj,$GRk"
3526      (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0F GRj)
3527      (sequence ()
3528                (c-call VOID "@cpu@_unsigned_integer_divide"
3529                        GRi GRj (index-of GRk) 1)
3530                (clobber GRk))
3531      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3532 )
3533
3534 ; Multiplication
3535 ;
3536 (define-pmacro (multiply-r-r name signop op ope comment)
3537   (dni name
3538        (comment)
3539        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3540         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3541        (.str name "$pack $GRi,$GRj,$GRdoublek")
3542        (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj)
3543        (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj)))
3544        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3545         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3546   )
3547 )
3548
3549 (multiply-r-r smul ext  OP_00 OPE2_08 "signed   multiply reg/reg")
3550 (multiply-r-r umul zext OP_00 OPE2_0A "unsigned multiply reg/reg")
3551
3552 ; Multiplication with integer accumulator IACC
3553 ;
3554
3555 (define-pmacro (iacc-set value)
3556   (set (reg h-iacc0 0) value))
3557
3558 (define-pmacro (iacc-add value)
3559   (set (reg h-iacc0 0)
3560        (cond DI
3561              ((andif (andif (gt value 0) (gt (reg h-iacc0 0) 0))
3562                      (lt (sub DI #x7fffffffffffffff value) (reg h-iacc0 0)))
3563               ; Positive overflow
3564               (const DI #x7fffffffffffffff))
3565              ((andif (andif (lt value 0) (lt (reg h-iacc0 0) 0))
3566                      (gt (sub DI #x8000000000000000 value) (reg h-iacc0 0)))
3567               ; Negative overflow
3568               (const DI #x8000000000000000))
3569              (else
3570               (add DI (reg h-iacc0 0) value))))
3571 )
3572
3573 (define-pmacro (iacc-sub value)
3574   (set (reg h-iacc0 0)
3575        (cond DI
3576              ((andif (andif (lt value 0) (gt (reg h-iacc0 0) 0))
3577                      (lt (add DI #x7fffffffffffffff value) (reg h-iacc0 0)))
3578               ; Positive overflow
3579               (const DI #x7fffffffffffffff))
3580              ((andif (andif (gt value 0) (lt (reg h-iacc0 0) 0))
3581                      (gt (add DI #x8000000000000000 value) (reg h-iacc0 0)))
3582               ; Negative overflow
3583               (const DI #x8000000000000000))
3584              (else
3585               (sub DI (reg h-iacc0 0) value))))
3586 )
3587
3588 (define-pmacro (iacc-multiply-r-r name operation op ope comment)
3589   (dni name
3590        (comment)
3591        ((UNIT IACC) (MACH fr400,fr450)
3592         (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3593        (.str name "$pack $GRi,$GRj")
3594        (+ pack (rd-null) op GRi ope GRj)
3595        ((.sym iacc- operation) (mul DI (ext DI GRi) (ext DI GRj)))
3596        ((fr400 (unit u-integer)) (fr450 (unit u-integer)))
3597   )
3598 )
3599
3600 (iacc-multiply-r-r smu   set OP_46 OPE1_05 "Signed multiply     reg/reg/iacc")
3601 (iacc-multiply-r-r smass add OP_46 OPE1_06 "Signed multiply/add reg/reg/iacc")
3602 (iacc-multiply-r-r smsss sub OP_46 OPE1_07 "Signed multiply/sub reg/reg/iacc")
3603
3604 (define-pmacro (int-shift-r-r name op ope comment)
3605   (dni name
3606        (comment)
3607        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3608         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3609        (.str name "$pack $GRi,$GRj,$GRk")
3610        (+ pack GRk op GRi (ICCi_1-null) ope GRj)
3611        (set GRk (name GRi (and GRj #x1f)))
3612        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3613         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3614   )
3615 )
3616
3617 (int-shift-r-r sll OP_01 OPE2_08 "shift left  logical reg/reg")
3618 (int-shift-r-r srl OP_01 OPE2_0A "shift right logical reg/reg")
3619 (int-shift-r-r sra OP_01 OPE2_0C "shift right arith   reg/reg")
3620
3621 (dni slass
3622      "shift left arith reg/reg with saturation"
3623      ((UNIT IALL) (MACH fr400,fr450)
3624       (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3625      "slass$pack $GRi,$GRj,$GRk"
3626      (+ pack GRk OP_46 GRi OPE1_02 GRj)
3627      (set GRk (c-call SI "@cpu@_shift_left_arith_saturate" GRi GRj))
3628      ()
3629 )
3630
3631 (dni scutss
3632      "Integer accumulator cut with saturation"
3633      ((UNIT I0) (MACH fr400,fr450)
3634       (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3635      "scutss$pack $GRj,$GRk"
3636      (+ pack GRk OP_46 (rs-null) OPE1_04 GRj)
3637      (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj))
3638      ()
3639 )
3640
3641 (define-pmacro (scan-semantics arg1 arg2 targ)
3642   (sequence ((WI tmp1) (WI tmp2))
3643             (set tmp1 arg1)
3644             (set tmp2 (sra arg2 1))
3645             (set targ (c-call WI "@cpu@_scan_result" (xor tmp1 tmp2))))
3646 )
3647
3648 (dni scan
3649      "scan"
3650      ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3651       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3652      "scan$pack $GRi,$GRj,$GRk"
3653      (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj)
3654      (scan-semantics GRi GRj GRk)
3655      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3656       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3657 )
3658
3659 ; Format: conditional INT, Logic, Shift r-r
3660 ;
3661 (define-pmacro (conditional-int-logic name operation op ope comment)
3662   (dni name
3663        (comment)
3664        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3665         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3666        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3667        (+ pack GRk op GRi CCi cond ope GRj)
3668        (if (eq CCi (or cond 2))
3669            (set GRk (operation GRi GRj)))
3670        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3671         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3672   )
3673 )
3674
3675 (conditional-int-logic cadd  add  OP_58 OPE4_0 "conditional add")
3676 (conditional-int-logic csub  sub  OP_58 OPE4_1 "conditional sub")
3677 (conditional-int-logic cand  and  OP_5A OPE4_0 "conditional and")
3678 (conditional-int-logic cor   or   OP_5A OPE4_1 "conditional or")
3679 (conditional-int-logic cxor  xor  OP_5A OPE4_2 "conditional xor")
3680
3681 (dni cnot
3682      "conditional not"
3683      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3684       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3685      "cnot$pack $GRj,$GRk,$CCi,$cond"
3686      (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj)
3687      (if (eq CCi (or cond 2))
3688          (set GRk (inv GRj)))
3689      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3690       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3691 )
3692
3693 (dni csmul
3694      "conditional signed multiply"
3695      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3696       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3697      "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
3698      (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj)
3699      (if (eq CCi (or cond 2))
3700          (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj))))
3701      ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3702       (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3703 )
3704
3705 (dni csdiv
3706      "conditional signed division"
3707      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3708       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3709      "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
3710      (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj)
3711      (if (eq CCi (or cond 2))
3712          (sequence ()
3713                    (c-call VOID "@cpu@_signed_integer_divide"
3714                            GRi GRj (index-of GRk) 0)
3715                    (clobber GRk)))
3716      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3717       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3718 )
3719
3720 (dni cudiv
3721      "conditional unsigned division"
3722      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3723       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3724      "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
3725      (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj)
3726      (if (eq CCi (or cond 2))
3727          (sequence ()
3728                    (c-call VOID "@cpu@_unsigned_integer_divide"
3729                            GRi GRj (index-of GRk) 0)
3730                    (clobber GRk)))
3731      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3732       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3733 )
3734
3735 (define-pmacro (conditional-shift name operation op ope comment)
3736   (dni name
3737        (comment)
3738        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3739         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3740        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3741        (+ pack GRk op GRi CCi cond ope GRj)
3742        (if (eq CCi (or cond 2))
3743            (set GRk (operation GRi (and GRj #x1f))))
3744        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3745         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3746   )
3747 )
3748
3749 (conditional-shift csll sll OP_5C OPE4_0 "conditional shift left  logical")
3750 (conditional-shift csrl srl OP_5C OPE4_1 "conditional shift right logical")
3751 (conditional-shift csra sra OP_5C OPE4_2 "conditional shift right arith")
3752
3753 (dni cscan
3754      "conditional scan"
3755      ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3756       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3757      "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond"
3758      (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj)
3759      (if (eq CCi (or cond 2))
3760          (scan-semantics GRi GRj GRk))
3761      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3762       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3763 )
3764
3765 ; Format: INT, Logic, Shift, cc r-r
3766 ;
3767 (define-pmacro (int-arith-cc-semantics operation icc)
3768   (sequence ((BI tmp) (QI cc) (SI result))
3769             (set cc icc)
3770             (set tmp ((.sym operation -oflag) GRi GRj (const 0)))
3771             (set-v cc tmp)
3772             (set tmp ((.sym operation -cflag) GRi GRj (const 0)))
3773             (set-c cc tmp)
3774             (set result (operation GRi GRj))
3775             (set-z-and-n cc result)
3776             (set GRk result)
3777             (set icc cc))
3778 )
3779
3780 (define-pmacro (int-arith-cc-r-r name operation op ope comment)
3781   (dni name
3782        (comment)
3783        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3784         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3785        (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3786        (+ pack GRk op GRi ICCi_1 ope GRj)
3787        (int-arith-cc-semantics operation ICCi_1)
3788        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3789         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3790   )
3791 )
3792
3793 (int-arith-cc-r-r addcc add OP_00 OPE2_01 "add reg/reg, set icc")
3794 (int-arith-cc-r-r subcc sub OP_00 OPE2_05 "sub reg/reg, set icc")
3795
3796 (define-pmacro (int-logic-cc-semantics op icc)
3797   (sequence ((SI tmp))
3798             (set tmp (op GRi GRj))
3799             (set GRk tmp)
3800             (set-z-and-n icc tmp))
3801 )
3802
3803 (define-pmacro (int-logic-cc-r-r name op ope comment)
3804   (dni (.sym name cc)
3805        (comment)
3806        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3807         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3808        (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
3809        (+ pack GRk op GRi ICCi_1 ope GRj)
3810        (int-logic-cc-semantics name ICCi_1)
3811        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3812         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3813   )
3814 )
3815
3816 (int-logic-cc-r-r and OP_01 OPE2_01 "and reg/reg, set icc")
3817 (int-logic-cc-r-r or  OP_01 OPE2_03 "or  reg/reg, set icc")
3818 (int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc")
3819
3820 (define-pmacro (int-shift-cc-semantics op l-r icc)
3821   (sequence ((WI shift) (SI tmp) (QI cc))
3822             (set shift (and GRj #x1f))
3823             (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
3824                             GRi shift icc))
3825             (set tmp (op GRi shift))
3826             (set GRk tmp)
3827             (set-z-and-n cc tmp)
3828             (set icc cc))
3829 )
3830
3831 (define-pmacro (int-shift-cc-r-r name l-r op ope comment)
3832   (dni (.sym name cc)
3833        (comment)
3834        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3835         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3836        (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
3837        (+ pack GRk op GRi ICCi_1 ope GRj)
3838        (int-shift-cc-semantics name l-r ICCi_1)
3839        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3840         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3841   )
3842 )
3843
3844 (int-shift-cc-r-r sll left  OP_01 OPE2_09 "shift left  logical reg/reg,set icc")
3845 (int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc")
3846 (int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith   reg/reg,set icc")
3847
3848 (define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc)
3849   (sequence ((DI tmp) (QI cc))
3850             (set cc icc)
3851             (set tmp (mul DI (signop DI arg1) (signop DI arg2)))
3852             (set-n cc (srl DI tmp 63))
3853             (set-z cc (eq tmp 0))
3854             (set targ tmp)
3855             (set icc cc))
3856 )
3857
3858 (define-pmacro (multiply-cc-r-r name signop op ope comment)
3859   (dni name
3860        (comment)
3861        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3862         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3863        (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1")
3864        (+ pack GRdoublek op GRi ICCi_1 ope GRj)
3865        (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1)
3866        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3867         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3868   )
3869 )
3870
3871 (multiply-cc-r-r smulcc ext  OP_00 OPE2_09 "signed   multiply reg/reg")
3872 (multiply-cc-r-r umulcc zext OP_00 OPE2_0B "unsigned multiply reg/reg")
3873
3874
3875 ; Format: conditional INT, Logic, Shift, cc r-r
3876 ;
3877 (define-pmacro (conditional-int-arith-cc name operation op ope comment)
3878   (dni name
3879        (comment)
3880        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3881         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3882        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3883        (+ pack GRk op GRi CCi cond ope GRj)
3884        (if (eq CCi (or cond 2))
3885            (int-arith-cc-semantics operation
3886                                    (reg h-iccr (and (index-of CCi) 3))))
3887        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3888         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3889   )
3890 )
3891
3892 (conditional-int-arith-cc caddcc add OP_59 OPE4_0 "add, set icc")
3893 (conditional-int-arith-cc csubcc sub OP_59 OPE4_1 "sub, set icc")
3894
3895 (dni csmulcc
3896      "conditional signed multiply and set condition code"
3897      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3898       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3899      "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
3900      (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj)
3901      (if (eq CCi (or cond 2))
3902          (multiply-cc-semantics ext GRi GRj GRdoublek
3903                                 (reg h-iccr (and (index-of CCi) 3))))
3904      ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3905       (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3906 )
3907
3908 (define-pmacro (conditional-int-logic-cc name operation op ope comment)
3909   (dni name
3910        (comment)
3911        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3912         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3913        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3914        (+ pack GRk op GRi CCi cond ope GRj)
3915        (if (eq CCi (or cond 2))
3916            (int-logic-cc-semantics operation
3917                                    (reg h-iccr (and (index-of CCi) 3))))
3918        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3919         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3920   )
3921 )
3922
3923 (conditional-int-logic-cc candcc and OP_5B OPE4_0 "conditional and, set icc")
3924 (conditional-int-logic-cc corcc  or  OP_5B OPE4_1 "conditional or , set icc")
3925 (conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc")
3926
3927 (define-pmacro (conditional-int-shift-cc name l-r op ope comment)
3928   (dni (.sym c name cc)
3929        (comment)
3930        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3931         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3932        (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3933        (+ pack GRk op GRi CCi cond ope GRj)
3934        (if (eq CCi (or cond 2))
3935            (int-shift-cc-semantics name l-r
3936                                    (reg h-iccr (and (index-of CCi) 3))))
3937        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3938         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3939   )
3940 )
3941
3942 (conditional-int-shift-cc sll left  OP_5D OPE4_0 "shift left  logical, set icc")
3943 (conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc")
3944 (conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith  , set icc")
3945
3946 ; Add and subtract with carry
3947 ;
3948 (define-pmacro (int-arith-x-r-r name operation op ope comment)
3949   (dni name
3950        (comment)
3951        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3952         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3953        (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3954        (+ pack GRk op GRi ICCi_1 ope GRj)
3955        (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1)))
3956        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3957         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3958   )
3959 )
3960
3961 (int-arith-x-r-r addx add OP_00 OPE2_02 "Add reg/reg, with carry")
3962 (int-arith-x-r-r subx sub OP_00 OPE2_06 "Sub reg/reg, with carry")
3963
3964 (define-pmacro (int-arith-x-cc-r-r name operation op ope comment)
3965   (dni name
3966        (comment)
3967        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3968         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3969        (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3970        (+ pack GRk op GRi ICCi_1 ope GRj)
3971        (sequence ((WI tmp) (QI cc))
3972                  (set cc ICCi_1)
3973                  (set tmp ((.sym operation c) GRi GRj (cbit cc)))
3974                  (set-v cc ((.sym operation -oflag) GRi GRj (cbit cc)))
3975                  (set-c cc ((.sym operation -cflag) GRi GRj (cbit cc)))
3976                  (set-z-and-n cc tmp)
3977                  (set GRk tmp)
3978                  (set ICCi_1 cc))
3979        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3980         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3981   )
3982 )
3983
3984 (int-arith-x-cc-r-r addxcc add OP_00 OPE2_03 "Add reg/reg, use/set carry")
3985 (int-arith-x-cc-r-r subxcc sub OP_00 OPE2_07 "Sub reg/reg, use/set carry")
3986 ; Add and subtract with saturation
3987 ;
3988 (define-pmacro (int-arith-ss-r-r name operation op ope comment)
3989   (dni name
3990        (comment)
3991        ((UNIT IALL) (MACH fr400,fr450)
3992         (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3993        (.str name "$pack $GRi,$GRj,$GRk")
3994        (+ pack GRk op GRi ope GRj)
3995        (sequence ()
3996                  (set GRk (operation GRi GRj))
3997                  (if ((.sym operation -oflag) GRi GRj (const 0))
3998                                         ; Overflow, saturate.
3999                                         ; Sign of result will be
4000                                         ; same as sign of first operand.
4001                      (set GRk
4002                           (cond SI
4003                                 ((gt GRi 0) (const #x7fffffff))
4004                                 ((lt GRi 0) (const #x80000000))
4005                                 (else (const 0)))))
4006        )
4007        ((fr400 (unit u-integer)) (fr450 (unit u-integer)))
4008   )
4009 )
4010
4011 (int-arith-ss-r-r addss add OP_46 OPE1_00 "add reg/reg, with saturation")
4012 (int-arith-ss-r-r subss sub OP_46 OPE1_01 "sub reg/reg, with saturation")
4013
4014 ; Format: INT, Logic, Shift r-simm
4015 ;
4016 (define-pmacro (int-logic-r-simm name operation op comment)
4017   (dni name
4018        (comment)
4019        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4020         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4021        (.str name "$pack $GRi,$s12,$GRk")
4022        (+ pack GRk op GRi s12)
4023        (set GRk (operation GRi s12))
4024        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4025         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4026   )
4027 )
4028
4029 (int-logic-r-simm addi  add   OP_10 "add reg/immed")
4030 (int-logic-r-simm subi  sub   OP_14 "sub reg/immed")
4031 (int-logic-r-simm andi  and   OP_20 "and reg/immed")
4032 (int-logic-r-simm ori   or    OP_22 "or  reg/immed")
4033 (int-logic-r-simm xori  xor   OP_24 "xor reg/immed")
4034
4035 (dni sdivi
4036      "signed division reg/immed"
4037      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4038       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4039      "sdivi$pack $GRi,$s12,$GRk"
4040      (+ pack GRk OP_1E GRi s12)
4041      (sequence ()
4042                (c-call VOID "@cpu@_signed_integer_divide"
4043                        GRi s12 (index-of GRk) 0)
4044                (clobber GRk))
4045      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
4046       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4047 )
4048
4049 (dni nsdivi
4050      "non excepting signed division reg/immed"
4051      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
4052       (MACH simple,tomcat,fr500,fr550,frv))
4053      "nsdivi$pack $GRi,$s12,$GRk"
4054      (+ pack GRk OP_2E GRi s12)
4055      (sequence ()
4056                (c-call VOID "@cpu@_signed_integer_divide"
4057                        GRi s12 (index-of GRk) 1)
4058                (clobber GRk))
4059      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4060 )
4061
4062 (dni udivi
4063      "unsigned division reg/immed"
4064      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4065       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4066      "udivi$pack $GRi,$s12,$GRk"
4067      (+ pack GRk OP_1F GRi s12)
4068      (sequence ()
4069                (c-call VOID "@cpu@_unsigned_integer_divide"
4070                        GRi s12 (index-of GRk) 0)
4071                (clobber GRk))
4072      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
4073       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4074 )
4075
4076 (dni nudivi
4077      "non excepting unsigned division reg/immed"
4078      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
4079       (MACH simple,tomcat,fr500,fr550,frv))
4080      "nudivi$pack $GRi,$s12,$GRk"
4081      (+ pack GRk OP_2F GRi s12)
4082      (sequence ()
4083                (c-call VOID "@cpu@_unsigned_integer_divide"
4084                        GRi s12 (index-of GRk) 1)
4085                (clobber GRk))
4086      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4087 )
4088
4089 (define-pmacro (multiply-r-simm name signop op comment)
4090   (dni name
4091        (comment)
4092        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4093         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4094        (.str name "$pack $GRi,$s12,$GRdoublek")
4095        (+ pack GRdoublek op GRi s12)
4096        (set GRdoublek (mul DI (signop DI GRi) (signop DI s12)))
4097        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
4098         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
4099   )
4100 )
4101
4102 (multiply-r-simm smuli ext  OP_18 "signed   multiply reg/immed")
4103 (multiply-r-simm umuli zext OP_1A "unsigned multiply reg/immed")
4104
4105 (define-pmacro (int-shift-r-simm name op comment)
4106   (dni (.sym name i)
4107        (comment)
4108        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4109         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4110        (.str (.sym name i) "$pack $GRi,$s12,$GRk")
4111        (+ pack GRk op GRi s12)
4112        (set GRk (name GRi (and s12 #x1f)))
4113        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4114         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4115   )
4116 )
4117
4118 (int-shift-r-simm sll OP_28 "shift left  logical reg/immed")
4119 (int-shift-r-simm srl OP_2A "shift right logical reg/immed")
4120 (int-shift-r-simm sra OP_2C "shift right arith   reg/immed")
4121
4122 (dni scani
4123      "scan immediate"
4124      ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4125       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4126      "scani$pack $GRi,$s12,$GRk"
4127      (+ pack GRk OP_47 GRi s12)
4128      (scan-semantics GRi s12 GRk)
4129      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4130       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4131 )
4132
4133 ; Format: INT, Logic, Shift cc r-simm
4134 ;
4135 (define-pmacro (int-arith-cc-r-simm name operation op comment)
4136   (dni name
4137        (comment)
4138        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4139         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4140        (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
4141        (+ pack GRk op GRi ICCi_1 s10)
4142        (sequence ((BI tmp) (QI cc) (SI result))
4143                  (set cc ICCi_1)
4144                  (set tmp ((.sym operation -oflag) GRi s10 (const 0)))
4145                  (set-v cc tmp)
4146                  (set tmp ((.sym operation -cflag) GRi s10 (const 0)))
4147                  (set-c cc tmp)
4148                  (set result (operation GRi s10))
4149                  (set-z-and-n cc result)
4150                  (set GRk result)
4151                  (set ICCi_1 cc))
4152        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4153         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4154   )
4155 )
4156
4157 (int-arith-cc-r-simm addicc add OP_11 "add reg/immed, set icc")
4158 (int-arith-cc-r-simm subicc sub OP_15 "sub reg/immed, set icc")
4159
4160 (define-pmacro (int-logic-cc-r-simm name op comment)
4161   (dni (.sym name icc)
4162        (comment)
4163        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4164         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4165        (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
4166        (+ pack GRk op GRi ICCi_1 s10)
4167        (sequence ((SI tmp))
4168                  (set tmp (name GRi s10))
4169                  (set GRk tmp)
4170                  (set-z-and-n ICCi_1 tmp))
4171        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4172         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4173   )
4174 )
4175
4176 (int-logic-cc-r-simm and  OP_21 "and reg/immed, set icc")
4177 (int-logic-cc-r-simm or   OP_23 "or  reg/immed, set icc")
4178 (int-logic-cc-r-simm xor  OP_25 "xor reg/immed, set icc")
4179
4180 (define-pmacro (multiply-cc-r-simm name signop op comment)
4181   (dni name
4182        (comment)
4183        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4184         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4185        (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1")
4186        (+ pack GRdoublek op GRi ICCi_1 s10)
4187        (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1)
4188        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
4189         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
4190   )
4191 )
4192
4193 (multiply-cc-r-simm smulicc ext  OP_19 "signed   multiply reg/immed")
4194 (multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed")
4195
4196 (define-pmacro (int-shift-cc-r-simm name l-r op comment)
4197   (dni (.sym name icc)
4198        (comment)
4199        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4200         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4201        (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
4202        (+ pack GRk op GRi ICCi_1 s10)
4203        (sequence ((WI shift) (SI tmp) (QI cc))
4204                  (set shift (and s10 #x1f))
4205                  (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
4206                                  GRi shift ICCi_1))
4207                  (set tmp (name GRi shift))
4208                  (set GRk tmp)
4209                  (set-z-and-n cc tmp)
4210                  (set ICCi_1 cc))
4211        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4212         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4213   )
4214 )
4215
4216 (int-shift-cc-r-simm sll left  OP_29 "shift left  logical reg/immed, set icc")
4217 (int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc")
4218 (int-shift-cc-r-simm sra right OP_2D "shift right arith   reg/immed, set icc")
4219
4220 (define-pmacro (int-arith-x-r-simm name operation op comment)
4221   (dni name
4222        (comment)
4223        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4224         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4225        (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
4226        (+ pack GRk op GRi ICCi_1 s10)
4227        (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1)))
4228        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4229         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4230   )
4231 )
4232
4233 (int-arith-x-r-simm addxi add OP_12 "Add reg/immed, with carry")
4234 (int-arith-x-r-simm subxi sub OP_16 "Sub reg/immed, with carry")
4235
4236 (define-pmacro (int-arith-x-cc-r-simm name operation op comment)
4237   (dni name
4238        (comment)
4239        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4240         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4241        (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
4242        (+ pack GRk op GRi ICCi_1 s10)
4243        (sequence ((WI tmp) (QI cc))
4244                  (set cc ICCi_1)
4245                  (set tmp ((.sym operation c) GRi s10 (cbit cc)))
4246                  (set-v cc ((.sym operation -oflag) GRi s10 (cbit cc)))
4247                  (set-c cc ((.sym operation -cflag) GRi s10 (cbit cc)))
4248                  (set-z-and-n cc tmp)
4249                  (set GRk tmp)
4250                  (set ICCi_1 cc))
4251        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4252         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4253   )
4254 )
4255
4256 (int-arith-x-cc-r-simm addxicc add OP_13 "Add reg/immed, with carry")
4257 (int-arith-x-cc-r-simm subxicc sub OP_17 "Sub reg/immed, with carry")
4258
4259 ; Byte compare insns
4260
4261 (dni cmpb
4262      "Compare bytes"
4263      ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1)
4264       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4265      "cmpb$pack $GRi,$GRj,$ICCi_1"
4266      (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj)
4267      (sequence ((QI cc))
4268                (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000)))
4269                (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000)))
4270                (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00)))
4271                (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff)))
4272                (set ICCi_1 cc))
4273      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4274       (fr550 (unit u-integer)))
4275 )
4276
4277 (dni cmpba
4278      "OR of Compare bytes"
4279      ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1)
4280       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4281      "cmpba$pack $GRi,$GRj,$ICCi_1"
4282      (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj)
4283      (sequence ((QI cc))
4284                (set cc 0)
4285                (set-c cc
4286                       (orif (eq (and GRi #xff000000) (and GRj #xff000000))
4287                             (orif (eq (and GRi #x00ff0000) (and GRj #x00ff0000))
4288                                   (orif (eq (and GRi #x0000ff00)
4289                                             (and GRj #x0000ff00))
4290                                          (eq (and GRi #x000000ff)
4291                                             (and GRj #x000000ff))))))
4292                (set ICCi_1 cc))
4293      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4294       (fr550 (unit u-integer)))
4295 )
4296
4297 ; Format: Load immediate
4298 ;
4299 (dni setlo
4300      "set low order bits"
4301      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4302       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4303      "setlo$pack $ulo16,$GRklo"
4304      (+ pack GRk OP_3D (misc-null-4) u16)
4305      (set GRklo u16)
4306      ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo))
4307       (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
4308 )
4309
4310 (dni sethi
4311      "set high order bits"
4312      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4313       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4314      "sethi$pack $uhi16,$GRkhi"
4315      (+ pack GRkhi OP_3E (misc-null-4) u16)
4316      (set GRkhi u16)
4317      ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo))
4318       (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
4319 )
4320
4321 (dni setlos
4322      "set low order bits and extend sign"
4323      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4324       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4325      "setlos$pack $slo16,$GRk"
4326      (+ pack GRk OP_3F (misc-null-4) s16)
4327      (set GRk s16)
4328      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4329       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4330 )
4331
4332 (define-pmacro (load-gr-r name mode op ope comment ann)
4333   (dni name
4334        (comment)
4335        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4336         (FR400-MAJOR I-2) (FR450-MAJOR I-2))
4337        (.str name "$pack " ann "($GRi,$GRj),$GRk")
4338        (+ pack GRk op GRi ope GRj)
4339        (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
4340        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4341         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4342   )
4343 )
4344
4345 (dann ldann "ld annotation" SI "ld_annotation" "at")
4346
4347 (load-gr-r ldsb   QI OP_02 OPE1_00 "Load   signed byte" "@")
4348 (load-gr-r ldub  UQI OP_02 OPE1_01 "Load unsigned byte" "@")
4349 (load-gr-r ldsh   HI OP_02 OPE1_02 "Load   signed half" "@")
4350 (load-gr-r lduh  UHI OP_02 OPE1_03 "Load unsigned half" "@")
4351 (load-gr-r ld     SI OP_02 OPE1_04 "Load          word" "$ldann")
4352
4353 (define-pmacro (load-fr-r name mode op ope comment)
4354   (dni name
4355        (comment)
4356        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4357         (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS)
4358        (.str name "$pack @($GRi,$GRj),$FRintk")
4359        (+ pack FRintk op GRi ope GRj)
4360        (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
4361        ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4362         (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4363   )
4364 )
4365
4366 (load-fr-r ldbf UQI OP_02 OPE1_08 "Load byte   float")
4367 (load-fr-r ldhf UHI OP_02 OPE1_09 "Load half   float")
4368 (load-fr-r ldf   SI OP_02 OPE1_0A "Load word   float")
4369
4370 (define-pmacro (load-cpr-r name mode op ope reg attr comment)
4371   (dni name
4372        (comment)
4373        ((UNIT LOAD) (FR500-MAJOR I-2) attr)
4374        (.str name "$pack @($GRi,$GRj),$" reg "k")
4375        (+ pack (.sym reg k) op GRi ope GRj)
4376        (set (.sym reg k)
4377             (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
4378        ()
4379   )
4380 )
4381
4382 (load-cpr-r ldc SI OP_02 OPE1_0D CPR (MACH frv) "Load coprocessor word")
4383
4384 ; These correspond to enumerators in frv-sim.h
4385 (define-pmacro (ne-UQI-size) 0)
4386 (define-pmacro (ne-QI-size)  1)
4387 (define-pmacro (ne-UHI-size) 2)
4388 (define-pmacro (ne-HI-size)  3)
4389 (define-pmacro (ne-SI-size)  4)
4390 (define-pmacro (ne-DI-size)  5)
4391 (define-pmacro (ne-XI-size)  6)
4392
4393 (define-pmacro (ne-load-semantics base dispix targ idisp size is_float action)
4394   (sequence ((BI do_op))
4395             (set do_op
4396                  (c-call BI "@cpu@_check_non_excepting_load"
4397                           (index-of base) dispix (index-of targ)
4398                           idisp size is_float))
4399             (if do_op action))
4400 )
4401
4402 (define-pmacro (ne-load-gr-r name mode op ope size comment)
4403   (dni name
4404        (comment)
4405        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4406         (MACH simple,tomcat,fr500,fr550,frv))
4407        (.str name "$pack @($GRi,$GRj),$GRk")
4408        (+ pack GRk op GRi ope GRj)
4409        (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
4410                           (set GRk
4411                                (c-call mode (.str "@cpu@_read_mem_" mode)
4412                                        pc (add GRi GRj))))
4413        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4414   )
4415 )
4416
4417 (ne-load-gr-r nldsb  QI OP_02 OPE1_20 (ne-QI-size)  "Load   signed byte")
4418 (ne-load-gr-r nldub UQI OP_02 OPE1_21 (ne-UQI-size) "Load unsigned byte")
4419 (ne-load-gr-r nldsh  HI OP_02 OPE1_22 (ne-HI-size)  "Load   signed half")
4420 (ne-load-gr-r nlduh UHI OP_02 OPE1_23 (ne-UHI-size) "Load unsigned half")
4421 (ne-load-gr-r nld    SI OP_02 OPE1_24 (ne-SI-size)  "Load          word")
4422
4423 (define-pmacro (ne-load-fr-r name mode op ope size comment)
4424   (dni name
4425        (comment)
4426        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4427         (MACH simple,tomcat,fr500,fr550,frv))
4428        (.str name "$pack @($GRi,$GRj),$FRintk")
4429        (+ pack FRintk op GRi ope GRj)
4430        (ne-load-semantics GRi (index-of GRj) FRintk 0 size 1
4431                           (set FRintk
4432                                (c-call mode (.str "@cpu@_read_mem_" mode)
4433                                        pc (add GRi GRj))))
4434        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4435   )
4436 )
4437
4438 (ne-load-fr-r nldbf UQI OP_02 OPE1_28 (ne-UQI-size) "Load byte float")
4439 (ne-load-fr-r nldhf UHI OP_02 OPE1_29 (ne-UHI-size) "Load half float")
4440 (ne-load-fr-r nldf   SI OP_02 OPE1_2A (ne-SI-size)  "Load word float")
4441
4442 ; Semantics for a load-double insn
4443 ;
4444 (define-pmacro (load-double-semantics not_gr mode regtype address arg)
4445   (if (orif not_gr (ne (index-of (.sym regtype doublek)) 0))
4446       (sequence ()
4447                 (set address (add GRi arg))
4448                 (set (.sym regtype doublek)
4449                      (c-call mode (.str "@cpu@_read_mem_" mode) pc address))))
4450 )
4451
4452 (define-pmacro (load-double-r-r
4453                 name not_gr mode op ope regtype attr profile comment ann)
4454   (dni name
4455        (comment)
4456        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4457         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4458        (.str name "$pack " ann "($GRi,$GRj),$" regtype "doublek")
4459        (+ pack (.sym regtype doublek) op GRi ope GRj)
4460        (sequence ((WI address))
4461                  (load-double-semantics not_gr mode regtype address GRj))
4462        profile
4463   )
4464 )
4465
4466 (dann lddann "ldd annotation" SI "ldd_annotation" "at")
4467
4468 (load-double-r-r ldd  0 DI OP_02 OPE1_05 GR  NA
4469                  ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4470                   (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4471                  "Load double word" "$lddann")
4472 (load-double-r-r lddf 1 DF OP_02 OPE1_0B FR  FR-ACCESS
4473                  ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4474                   (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4475                  "Load double float" "@")
4476 (load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) ()
4477                  "Load coprocessor double" "@")
4478
4479 (define-pmacro (ne-load-double-r-r
4480                 name not_gr mode op ope regtype size is_float attr profile
4481                 comment)
4482   (dni name
4483        (comment)
4484        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4485         (MACH simple,tomcat,fr500,fr550,frv))
4486        (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4487        (+ pack (.sym regtype doublek) op GRi ope GRj)
4488        (sequence ((WI address))
4489                  (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek)
4490                                     0 size is_float
4491                                     (load-double-semantics not_gr mode
4492                                                            regtype
4493                                                            address GRj)))
4494        profile
4495   )
4496 )
4497
4498 (ne-load-double-r-r nldd  0 DI OP_02 OPE1_25 GR (ne-DI-size) 0 NA
4499                     ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double   word")
4500 (ne-load-double-r-r nlddf 1 DF OP_02 OPE1_2B FR (ne-DI-size) 1 FR-ACCESS
4501                     ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
4502
4503 ; Semantics for a load-quad insn
4504 ;
4505 (define-pmacro (load-quad-semantics regtype address arg)
4506   (sequence ()
4507             (set address (add GRi arg))
4508             (c-call VOID (.str "@cpu@_load_quad_" regtype)
4509                     pc address (index-of (.sym regtype k))))
4510 )
4511
4512 (define-pmacro (load-quad-r-r name op ope regtype attr profile comment)
4513   (dni name
4514        (comment)
4515        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4516        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4517        (+ pack (.sym regtype k) op GRi ope GRj)
4518        (sequence ((WI address))
4519                  (load-quad-semantics regtype address GRj))
4520        ; TODO regtype-k not referenced for profiling
4521        profile
4522   )
4523 )
4524
4525 (load-quad-r-r ldq  OP_02 OPE1_06 GR    NA        ((fr500 (unit u-gr-load)))
4526                "Load quad word")
4527 (load-quad-r-r ldqf OP_02 OPE1_0C FRint FR-ACCESS ((fr500 (unit u-fr-load)))
4528                "Load quad float")
4529 (load-quad-r-r ldqc OP_02 OPE1_0F CPR   NA        () "Load coprocessor quad")
4530
4531 (define-pmacro (ne-load-quad-r-r
4532                 name op ope regtype size is_float attr profile comment)
4533   (dni name
4534        (comment)
4535        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
4536        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4537        (+ pack (.sym regtype k) op GRi ope GRj)
4538        (sequence ((WI address))
4539                  (ne-load-semantics GRi (index-of GRj) (.sym regtype k)
4540                                     0 size is_float
4541                                     (load-quad-semantics regtype address GRj)))
4542        ; TODO regtype-k not referenced for profiling
4543        profile
4544   )
4545 )
4546
4547 (ne-load-quad-r-r nldq  OP_02 OPE1_26 GR    (ne-XI-size) 0 NA
4548                   ((fr500 (unit u-gr-load))) "Load quad word")
4549 (ne-load-quad-r-r nldqf OP_02 OPE1_2C FRint (ne-XI-size) 1 FR-ACCESS
4550                   ((fr500 (unit u-fr-load))) "Load quad float")
4551
4552 (define-pmacro (load-gr-u-semantics mode)
4553   (sequence ((UWI address))
4554             (set address (add GRi GRj))
4555             (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
4556             (if (ne (index-of GRi) (index-of GRk))
4557                 (sequence ()
4558                           (set GRi address)
4559                           (c-call VOID "@cpu@_force_update"))))
4560 )
4561
4562 (define-pmacro (load-gr-u name mode op ope comment)
4563   (dni name
4564        (comment)
4565        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4566         (FR400-MAJOR I-2) (FR450-MAJOR I-2))
4567        (.str name "$pack @($GRi,$GRj),$GRk")
4568        (+ pack GRk op GRi ope GRj)
4569        (load-gr-u-semantics mode)
4570        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4571         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4572   )
4573 )
4574
4575 (load-gr-u ldsbu   QI OP_02 OPE1_10 "Load   signed byte, update index")
4576 (load-gr-u ldubu  UQI OP_02 OPE1_11 "Load unsigned byte, update index")
4577 (load-gr-u ldshu   HI OP_02 OPE1_12 "Load   signed half, update index")
4578 (load-gr-u lduhu  UHI OP_02 OPE1_13 "Load unsigned half, update index")
4579 (load-gr-u ldu     SI OP_02 OPE1_14 "Load          word, update index")
4580
4581 (define-pmacro (ne-load-gr-u name mode op ope size comment)
4582   (dni name
4583        (comment)
4584        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4585         (MACH simple,tomcat,fr500,fr550,frv))
4586        (.str name "$pack @($GRi,$GRj),$GRk")
4587        (+ pack GRk op GRi ope GRj)
4588        (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 (load-gr-u-semantics mode))
4589        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4590   )
4591 )
4592
4593 (ne-load-gr-u nldsbu  QI OP_02 OPE1_30 (ne-QI-size)  "Load   signed byte, update index")
4594 (ne-load-gr-u nldubu UQI OP_02 OPE1_31 (ne-UQI-size) "Load unsigned byte, update index")
4595 (ne-load-gr-u nldshu  HI OP_02 OPE1_32 (ne-HI-size)  "Load   signed half, update index")
4596 (ne-load-gr-u nlduhu UHI OP_02 OPE1_33 (ne-UHI-size) "Load unsigned half, update index")
4597 (ne-load-gr-u nldu    SI OP_02 OPE1_34 (ne-SI-size)  "Load          word, update index")
4598
4599 (define-pmacro (load-non-gr-u-semantics mode regtype)
4600   (sequence ((UWI address))
4601             (set address (add GRi GRj))
4602             (set (.sym regtype k)
4603                  (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
4604             (set GRi address)
4605             (c-call VOID "@cpu@_force_update"))
4606 )
4607
4608 (define-pmacro (load-fr-u name mode op ope comment)
4609   (dni name
4610        (comment)
4611        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4612         (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS)
4613        (.str name "$pack @($GRi,$GRj),$FRintk")
4614        (+ pack FRintk op GRi ope GRj)
4615        (load-non-gr-u-semantics mode FRint)
4616        ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4617         (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4618   )
4619 )
4620
4621 (load-fr-u ldbfu  UQI OP_02 OPE1_18 "Load byte float, update index")
4622 (load-fr-u ldhfu  UHI OP_02 OPE1_19 "Load half float, update index")
4623 (load-fr-u ldfu    SI OP_02 OPE1_1A "Load word float, update index")
4624
4625 (define-pmacro (load-cpr-u name mode op ope comment)
4626   (dni name
4627        (comment)
4628        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
4629        (.str name "$pack @($GRi,$GRj),$CPRk")
4630        (+ pack CPRk op GRi ope GRj)
4631        (load-non-gr-u-semantics mode CPR)
4632        ()
4633   )
4634 )
4635
4636 (load-cpr-u ldcu SI OP_02 OPE1_1D "Load coprocessor word float,update index")
4637
4638 (define-pmacro (ne-load-non-gr-u name mode op ope regtype size comment)
4639   (dni name
4640        (comment)
4641        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4642         (MACH simple,tomcat,fr500,fr550,frv))
4643        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4644        (+ pack (.sym regtype k) op GRi ope GRj)
4645        (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
4646                           (load-non-gr-u-semantics mode regtype))
4647        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4648   )
4649 )
4650
4651 (ne-load-non-gr-u nldbfu UQI OP_02 OPE1_38 FRint (ne-UQI-size) "Load byte float, update index")
4652 (ne-load-non-gr-u nldhfu UHI OP_02 OPE1_39 FRint (ne-UHI-size) "Load half float, update index")
4653 (ne-load-non-gr-u nldfu   SI OP_02 OPE1_3A FRint (ne-SI-size)  "Load word float, update index")
4654
4655 (define-pmacro (load-double-gr-u-semantics)
4656   (sequence ((WI address))
4657             (load-double-semantics 0 DI GR address GRj)
4658             (if (ne (index-of GRi) (index-of GRdoublek))
4659                 (sequence ()
4660                           (set GRi address)
4661                           (c-call VOID "@cpu@_force_update"))))
4662 )
4663
4664 (define-pmacro (load-double-gr-u name op ope comment)
4665   (dni name
4666        (comment)
4667        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4668         (FR400-MAJOR I-2) (FR450-MAJOR I-2))
4669        (.str name "$pack @($GRi,$GRj),$GRdoublek")
4670        (+ pack GRdoublek op GRi ope GRj)
4671        (load-double-gr-u-semantics)
4672        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4673         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4674   )
4675 )
4676
4677 (load-double-gr-u lddu  OP_02 OPE1_15 "Load double word, update index")
4678
4679 (define-pmacro (ne-load-double-gr-u name op ope size comment)
4680   (dni name
4681        (comment)
4682        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4683         (MACH simple,tomcat,fr500,fr550,frv))
4684        (.str name "$pack @($GRi,$GRj),$GRdoublek")
4685        (+ pack GRdoublek op GRi ope GRj)
4686        (ne-load-semantics GRi (index-of GRj) GRdoublek 0 size 0
4687                           (load-double-gr-u-semantics))
4688        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4689
4690   )
4691 )
4692
4693 (ne-load-double-gr-u nlddu OP_02 OPE1_35 (ne-DI-size) "Load double word, update index")
4694
4695 (define-pmacro (load-double-non-gr-u-semantics mode regtype)
4696   (sequence ((WI address))
4697             (load-double-semantics 1 mode regtype address GRj)
4698             (set GRi address)
4699             (c-call VOID "@cpu@_force_update"))
4700 )
4701
4702 (define-pmacro (load-double-non-gr-u
4703                 name mode op ope regtype attr profile comment)
4704   (dni name
4705        (comment)
4706        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4707         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4708        (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4709        (+ pack (.sym regtype doublek) op GRi ope GRj)
4710        (load-double-non-gr-u-semantics mode regtype)
4711        profile
4712   )
4713 )
4714
4715 (load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR  FR-ACCESS
4716                       ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4717                        (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4718                       "Load double float, update index")
4719 (load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv)
4720                       () "Load coprocessor double float, update index")
4721
4722 (define-pmacro (ne-load-double-non-gr-u name mode op ope regtype size comment)
4723   (dni name
4724        (comment)
4725        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4726         (MACH simple,tomcat,fr500,fr550,frv))
4727        (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4728        (+ pack (.sym regtype doublek) op GRi ope GRj)
4729        (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 0 size 1
4730                           (load-double-non-gr-u-semantics mode regtype))
4731        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4732   )
4733 )
4734
4735 (ne-load-double-non-gr-u nlddfu DF OP_02 OPE1_3B FR (ne-DI-size) "Load double float, update index")
4736
4737 (define-pmacro (load-quad-gr-u-semantics)
4738   (sequence ((WI address))
4739             (load-quad-semantics GR address GRj)
4740             (if (ne (index-of GRi) (index-of GRk))
4741                 (sequence ()
4742                           (set GRi address)
4743                           (c-call VOID "@cpu@_force_update"))))
4744 )
4745
4746 (define-pmacro (load-quad-gr-u name op ope comment)
4747   (dni name
4748        (comment)
4749        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
4750        (.str name "$pack @($GRi,$GRj),$GRk")
4751        (+ pack GRk op GRi ope GRj)
4752        (load-quad-gr-u-semantics)
4753        ; TODO - GRk not referenced here for profiling
4754        ((fr500 (unit u-gr-load)))
4755   )
4756 )
4757
4758 (load-quad-gr-u ldqu  OP_02 OPE1_16 "Load quad word, update index")
4759
4760 (define-pmacro (ne-load-quad-gr-u name op ope size comment)
4761   (dni name
4762        (comment)
4763        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING)
4764        (.str name "$pack @($GRi,$GRj),$GRk")
4765        (+ pack GRk op GRi ope GRj)
4766        (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
4767                           (load-quad-gr-u-semantics))
4768        ; TODO - GRk not referenced here for profiling
4769        ((fr500 (unit u-gr-load)))
4770   )
4771 )
4772
4773 (ne-load-quad-gr-u nldqu OP_02 OPE1_36 (ne-XI-size) "Load quad word, update index")
4774
4775 (define-pmacro (load-quad-non-gr-u-semantics regtype)
4776   (sequence ((WI address))
4777             (load-quad-semantics regtype address GRj)
4778             (set GRi address)
4779             (c-call VOID "@cpu@_force_update"))
4780 )
4781
4782 (define-pmacro (load-quad-non-gr-u name op ope regtype attr profile comment)
4783   (dni name
4784        (comment)
4785        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4786        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4787        (+ pack (.sym regtype k) op GRi ope GRj)
4788        (load-quad-non-gr-u-semantics regtype)
4789        profile
4790   )
4791 )
4792
4793 (load-quad-non-gr-u ldqfu OP_02 OPE1_1C FRint FR-ACCESS
4794                     ((fr500 (unit u-fr-load))) "Load quad float, update index")
4795 (load-quad-non-gr-u ldqcu OP_02 OPE1_1F CPR   NA
4796                     () "Load coprocessor quad word, update index")
4797
4798 (define-pmacro (ne-load-quad-non-gr-u name op ope regtype size comment)
4799   (dni name
4800        (comment)
4801        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING FR-ACCESS)
4802        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4803        (+ pack (.sym regtype k) op GRi ope GRj)
4804        (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
4805                           (load-quad-non-gr-u-semantics regtype))
4806        ((fr500 (unit u-fr-load)))
4807   )
4808 )
4809
4810 (ne-load-quad-non-gr-u nldqfu OP_02 OPE1_3C FRint (ne-XI-size) "Load quad float,update index")
4811
4812 (define-pmacro (load-r-simm name mode op regtype attr profile comment)
4813   (dni name
4814        (comment)
4815        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4816         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4817        (.str name "$pack @($GRi,$d12),$" regtype "k")
4818        (+ pack (.sym regtype k) op GRi d12)
4819        (set (.sym regtype k)
4820             (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi d12)))
4821        profile
4822   )
4823 )
4824
4825 (load-r-simm ldsbi  QI OP_30 GR NA
4826              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4827               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4828              "Load   signed byte")
4829 (load-r-simm ldshi  HI OP_31 GR NA
4830              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4831               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4832              "Load   signed half")
4833 (load-r-simm ldi    SI OP_32 GR NA
4834              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4835               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4836              "Load          word")
4837 (load-r-simm ldubi UQI OP_35 GR NA
4838              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4839               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4840              "Load unsigned byte")
4841 (load-r-simm lduhi UHI OP_36 GR NA
4842              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4843               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4844              "Load unsigned half")
4845
4846 (load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS
4847              ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4848               (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4849              "Load byte float")
4850 (load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS
4851              ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4852               (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4853              "Load half float")
4854 (load-r-simm ldfi   SI OP_3A FRint FR-ACCESS
4855              ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4856               (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4857              "Load word float")
4858
4859 (define-pmacro (ne-load-r-simm
4860                 name mode op regtype size is_float attr profile comment)
4861   (dni name
4862        (comment)
4863        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4864         (MACH simple,tomcat,fr500,fr550,frv))
4865        (.str name "$pack @($GRi,$d12),$" regtype "k")
4866        (+ pack (.sym regtype k) op GRi d12)
4867        (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
4868                           (set (.sym regtype k)
4869                                (c-call mode (.str "@cpu@_read_mem_" mode)
4870                                        pc (add GRi d12))))
4871        profile
4872   )
4873 )
4874
4875 (ne-load-r-simm nldsbi  QI OP_40 GR (ne-QI-size)  0 NA
4876                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load   signed byte")
4877 (ne-load-r-simm nldubi UQI OP_41 GR (ne-UQI-size) 0 NA
4878                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte")
4879 (ne-load-r-simm nldshi  HI OP_42 GR (ne-HI-size)  0 NA
4880                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load   signed half")
4881 (ne-load-r-simm nlduhi UHI OP_43 GR (ne-UHI-size) 0 NA
4882                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half")
4883 (ne-load-r-simm nldi    SI OP_44 GR (ne-SI-size)  0 NA
4884                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load          word")
4885
4886 (ne-load-r-simm nldbfi UQI OP_48 FRint (ne-UQI-size) 1 FR-ACCESS
4887                 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float")
4888 (ne-load-r-simm nldhfi UHI OP_49 FRint (ne-UHI-size) 1 FR-ACCESS
4889                 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float")
4890 (ne-load-r-simm nldfi   SI OP_4A FRint (ne-SI-size)  1 FR-ACCESS
4891                 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float")
4892
4893 (define-pmacro (load-double-r-simm
4894                 name not_gr mode op regtype attr profile comment)
4895   (dni name
4896        (comment)
4897        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4898         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4899        (.str name "$pack @($GRi,$d12),$" regtype "doublek")
4900        (+ pack (.sym regtype doublek) op GRi d12)
4901        (sequence ((WI address))
4902                  (load-double-semantics not_gr mode regtype address d12))
4903        profile
4904   )
4905 )
4906
4907 (load-double-r-simm lddi  0 DI OP_33 GR NA
4908                     ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4909                      (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4910                     "Load double word")
4911 (load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS
4912                     ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4913                      (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4914                     "Load double float")
4915
4916 (define-pmacro (ne-load-double-r-simm
4917                 name not_gr mode op regtype size is_float attr profile comment)
4918   (dni name
4919        (comment)
4920        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4921         (MACH simple,tomcat,fr500,fr550,frv))
4922        (.str name "$pack @($GRi,$d12),$" regtype "doublek")
4923        (+ pack (.sym regtype doublek) op GRi d12)
4924        (sequence ((WI address))
4925                  (ne-load-semantics GRi -1 (.sym regtype doublek)
4926                                     d12 size is_float
4927                                     (load-double-semantics not_gr mode
4928                                                            regtype
4929                                                            address d12)))
4930        profile
4931   )
4932 )
4933
4934 (ne-load-double-r-simm nlddi  0 DI OP_45 GR (ne-DI-size) 0 NA
4935                        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word")
4936 (ne-load-double-r-simm nlddfi 1 DF OP_4B FR (ne-DI-size) 1 FR-ACCESS
4937                        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
4938
4939 (define-pmacro (load-quad-r-simm name op regtype attr profile comment)
4940   (dni name
4941        (comment)
4942        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4943        (.str name "$pack @($GRi,$d12),$" regtype "k")
4944        (+ pack (.sym regtype k) op GRi d12)
4945        (sequence ((WI address))
4946                  (load-quad-semantics regtype address d12))
4947        profile
4948   )
4949 )
4950
4951 (load-quad-r-simm ldqi  OP_34 GR    NA
4952                   ((fr500 (unit u-gr-load))) "Load quad word")
4953 (load-quad-r-simm ldqfi OP_3C FRint FR-ACCESS
4954                   ((fr500 (unit u-fr-load))) "Load quad float")
4955
4956 (define-pmacro (ne-load-quad-r-simm
4957                 name op regtype size is_float attr profile comment)
4958   (dni name
4959        (comment)
4960        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
4961        (.str name "$pack @($GRi,$d12),$" regtype "k")
4962        (+ pack (.sym regtype k) op GRi d12)
4963        (sequence ((WI address))
4964                  (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
4965                                     (load-quad-semantics regtype address d12)))
4966        profile
4967   )
4968 )
4969
4970 (ne-load-quad-r-simm nldqfi OP_4C FRint (ne-XI-size) 1 FR-ACCESS
4971                      ((fr500 (unit u-fr-load))) "Load quad float")
4972
4973 (define-pmacro (store-r-r name mode op ope reg attr profile comment)
4974   (dni name
4975        (comment)
4976        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
4977         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
4978        (.str name "$pack $" reg "k,@($GRi,$GRj)")
4979        (+ pack (.sym reg k) op GRi ope GRj)
4980        (c-call VOID (.str "@cpu@_write_mem_" mode)
4981                pc (add GRi GRj) (.sym reg k))
4982        profile
4983   )
4984 )
4985
4986 (store-r-r stb   QI OP_03 OPE1_00 GR NA
4987            ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
4988             (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
4989            "Store unsigned byte")
4990 (store-r-r sth   HI OP_03 OPE1_01 GR NA
4991            ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
4992             (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
4993            "Store unsigned half")
4994 (store-r-r st    SI OP_03 OPE1_02 GR NA
4995            ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
4996             (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
4997            "Store          word")
4998
4999 (store-r-r stbf  QI OP_03 OPE1_08 FRint FR-ACCESS
5000            ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5001             (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5002            "Store byte float")
5003 (store-r-r sthf  HI OP_03 OPE1_09 FRint FR-ACCESS
5004            ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5005             (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5006            "Store half float")
5007 (store-r-r stf   SI OP_03 OPE1_0A FRint FR-ACCESS
5008            ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5009             (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5010            "Store word float")
5011
5012 (store-r-r stc   SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word")
5013
5014 ; Semantics for a store-double insn
5015 ;
5016 (define-pmacro (store-double-semantics mode regtype address arg)
5017   (sequence ()
5018             (set address (add GRi arg))
5019             (c-call VOID (.str "@cpu@_write_mem_" mode)
5020                     pc address (.sym regtype doublek)))
5021 )
5022
5023 (define-pmacro (store-double-r-r name mode op ope regtype attr profile comment)
5024   (dni name
5025        (comment)
5026        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5027         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5028        (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
5029        (+ pack (.sym regtype doublek) op GRi ope GRj)
5030        (sequence ((WI address))
5031                  (store-double-semantics mode regtype address GRj))
5032        profile
5033   )
5034 )
5035
5036 (store-double-r-r std  DI OP_03 OPE1_03 GR  NA
5037                   ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5038                    (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5039                   "Store double word")
5040 (store-double-r-r stdf DF OP_03 OPE1_0B FR  FR-ACCESS
5041                   ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5042                    (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5043                   "Store double float")
5044
5045 (store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv)
5046                   () "Store coprocessor double word")
5047
5048 ; Semantics for a store-quad insn
5049 ;
5050 (define-pmacro (store-quad-semantics regtype address arg)
5051   (sequence ()
5052             (set address (add GRi arg))
5053             (c-call VOID (.str "@cpu@_store_quad_" regtype)
5054                      pc address (index-of (.sym regtype k))))
5055 )
5056
5057 (define-pmacro (store-quad-r-r name op ope regtype attr profile comment)
5058   (dni name
5059        (comment)
5060        ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
5061        (.str name "$pack $" regtype "k,@($GRi,$GRj)")
5062        (+ pack (.sym regtype k) op GRi ope GRj)
5063        (sequence ((WI address))
5064                  (store-quad-semantics regtype address GRj))
5065        profile
5066   )
5067 )
5068
5069 (store-quad-r-r stq   OP_03 OPE1_04 GR    NA
5070                 ((fr500 (unit u-gr-store))) "Store quad word")
5071 (store-quad-r-r stqf  OP_03 OPE1_0C FRint FR-ACCESS
5072                 ((fr500 (unit u-fr-store)))
5073                 "Store quad float")
5074 (store-quad-r-r stqc  OP_03 OPE1_27 CPR   NA
5075                 () "Store coprocessor quad word")
5076
5077 (define-pmacro (store-r-r-u name mode op ope regtype attr profile comment)
5078   (dni name
5079        (comment)
5080        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5081         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5082        (.str name "$pack $" regtype "k,@($GRi,$GRj)")
5083        (+ pack (.sym regtype k) op GRi ope GRj)
5084        (sequence ((UWI address))
5085                  (set address (add GRi GRj))
5086                  (c-call VOID (.str "@cpu@_write_mem_" mode)
5087                          pc address (.sym regtype k))
5088                  (set GRi address))
5089        profile
5090   )
5091 )
5092
5093 (store-r-r-u stbu  QI OP_03 OPE1_10 GR NA
5094              ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5095               (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5096              "Store unsigned byte, update index")
5097 (store-r-r-u sthu  HI OP_03 OPE1_11 GR NA
5098              ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5099               (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5100              "Store unsigned half, update index")
5101 (store-r-r-u stu   WI OP_03 OPE1_12 GR NA
5102              ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5103               (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5104              "Store          word, update index")
5105
5106 (store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS
5107              ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5108               (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5109              "Store byte float, update index")
5110 (store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS
5111              ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5112               (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5113              "Store half float, update index")
5114 (store-r-r-u stfu  SI OP_03 OPE1_1A FRint FR-ACCESS
5115              ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5116               (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5117              "Store word float, update index")
5118
5119 (store-r-r-u stcu  SI OP_03 OPE1_2D CPR (MACH frv) ()
5120              "Store coprocessor word, update index")
5121
5122 (define-pmacro (store-double-r-r-u
5123                 name mode op ope regtype attr profile comment)
5124   (dni name
5125        (comment)
5126        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5127         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5128        (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
5129        (+ pack (.sym regtype doublek) op GRi ope GRj)
5130        (sequence ((WI address))
5131                  (store-double-semantics mode regtype address GRj)
5132                  (set GRi address))
5133        profile
5134   )
5135 )
5136
5137 (store-double-r-r-u stdu  DI OP_03 OPE1_13 GR  NA
5138                     ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5139                      (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5140                     "Store double word, update index")
5141 (store-double-r-r-u stdfu DF OP_03 OPE1_1B FR  FR-ACCESS
5142                     ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5143                      (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5144                     "Store double float,update index")
5145 (store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) ()
5146                     "Store coprocessor double word, update index")
5147
5148 (define-pmacro (store-quad-r-r-u name op ope regtype attr profile comment)
5149   (dni name
5150        (comment)
5151        ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
5152        (.str name "$pack $" regtype "k,@($GRi,$GRj)")
5153        (+ pack (.sym regtype k) op GRi ope GRj)
5154        (sequence ((WI address))
5155                  (store-quad-semantics regtype address GRj)
5156                  (set GRi address))
5157        profile
5158   )
5159 )
5160
5161 (store-quad-r-r-u stqu  OP_03 OPE1_14 GR    NA
5162                   ((fr500 (unit u-gr-store)))
5163                   "Store quad word, update index")
5164 (store-quad-r-r-u stqfu OP_03 OPE1_1C FRint FR-ACCESS
5165                   ((fr500 (unit u-fr-store)))
5166                   "Store quad float, update index")
5167 (store-quad-r-r-u stqcu OP_03 OPE1_2F CPR   NA ()
5168                   "Store coprocessor quad   word, update index")
5169
5170 (define-pmacro (conditional-load name mode op ope regtype profile comment)
5171   (dni name
5172        (comment)
5173        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5174         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
5175        (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
5176        (+ pack (.sym regtype k) op GRi CCi  cond ope GRj)
5177        (if (eq CCi (or cond 2))
5178            (set (.sym regtype k)
5179                 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))))
5180        profile
5181   )
5182 )
5183
5184 (conditional-load cldsb  QI OP_5E OPE4_0 GR
5185                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5186                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5187                   "Load   signed byte")
5188 (conditional-load cldub UQI OP_5E OPE4_1 GR
5189                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5190                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5191                   "Load unsigned byte")
5192 (conditional-load cldsh  HI OP_5E OPE4_2 GR
5193                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5194                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5195                   "Load   signed half")
5196 (conditional-load clduh UHI OP_5E OPE4_3 GR
5197                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5198                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5199                   "Load unsigned half")
5200 (conditional-load cld    SI OP_5F OPE4_0 GR
5201                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5202                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5203                   "Load          word")
5204
5205 (conditional-load cldbf UQI OP_60 OPE4_0 FRint
5206                   ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5207                    (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5208                   "Load byte float")
5209 (conditional-load cldhf UHI OP_60 OPE4_1 FRint
5210                   ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5211                    (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5212                   "Load half float")
5213 (conditional-load cldf   SI OP_60 OPE4_2 FRint
5214                   ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5215                    (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5216                   "Load word float")
5217
5218 (define-pmacro (conditional-load-double
5219                 name not_gr mode op ope regtype attr profile comment)
5220   (dni name
5221        (comment)
5222        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5223         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL attr)
5224        (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond")
5225        (+ pack (.sym regtype doublek) op GRi CCi  cond ope GRj)
5226        (if (eq CCi (or cond 2))
5227            (sequence ((WI address))
5228                      (load-double-semantics not_gr mode regtype address GRj)))
5229        profile
5230   )
5231 )
5232
5233 (conditional-load-double cldd  0 DI OP_5F OPE4_1 GR NA
5234                          ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5235                           (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5236                          "Load double word")
5237 (conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS
5238                          ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5239                           (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load)))
5240                          "Load double float")
5241
5242 (dni cldq
5243      "conditional load quad integer"
5244      ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
5245      "cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond"
5246      (+ pack GRk OP_5F GRi CCi cond OPE4_2 GRj)
5247      (if (eq CCi (or cond 2))
5248          (sequence ((WI address))
5249                    (load-quad-semantics GR address GRj)))
5250      ((fr500 (unit u-gr-load)))
5251 )
5252
5253 (define-pmacro (conditional-load-gr-u name mode op ope comment)
5254   (dni name
5255        (comment)
5256        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5257         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
5258        (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond")
5259        (+ pack GRk op GRi CCi  cond ope GRj)
5260        (if (eq CCi (or cond 2))
5261            (sequence ((WI address))
5262                      (set address (add GRi GRj))
5263                      (set GRk
5264                           (c-call mode (.str "@cpu@_read_mem_" mode)
5265                                   pc address))
5266                      (if (ne (index-of GRi) (index-of GRk))
5267                          (set GRi address))))
5268        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5269         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5270   )
5271 )
5272
5273 (conditional-load-gr-u cldsbu  QI OP_61 OPE4_0 "Load   signed byte, update")
5274 (conditional-load-gr-u cldubu UQI OP_61 OPE4_1 "Load unsigned byte, update")
5275 (conditional-load-gr-u cldshu  HI OP_61 OPE4_2 "Load   signed half, update")
5276 (conditional-load-gr-u clduhu UHI OP_61 OPE4_3 "Load unsigned half, update")
5277 (conditional-load-gr-u cldu    SI OP_62 OPE4_0 "Load          word, update")
5278
5279 (define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment)
5280   (dni name
5281        (comment)
5282        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5283         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS)
5284        (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
5285        (+ pack (.sym regtype k) op GRi CCi  cond ope GRj)
5286        (if (eq CCi (or cond 2))
5287            (sequence ((WI address))
5288                      (set address (add GRi GRj))
5289                      (set (.sym regtype k)
5290                           (c-call mode (.str "@cpu@_read_mem_" mode)
5291                                   pc address))
5292                      (set GRi address)))
5293        ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5294         (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5295   )
5296 )
5297
5298 (conditional-load-non-gr-u cldbfu UQI OP_63 OPE4_0 FRint "Load byte float, update")
5299 (conditional-load-non-gr-u cldhfu UHI OP_63 OPE4_1 FRint "Load half float, update")
5300 (conditional-load-non-gr-u cldfu   SI OP_63 OPE4_2 FRint "Load word float, update")
5301
5302
5303 (dni clddu
5304      "Load double word,  update"
5305      ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5306       (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
5307      "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond"
5308      (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj)
5309      (if (eq CCi (or cond 2))
5310          (sequence ((WI address))
5311                    (load-double-semantics 0 DI GR address GRj)
5312                    (if (ne (index-of GRi) (index-of GRdoublek))
5313                        (set GRi address))))
5314      ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5315       (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5316 )
5317
5318 (dni clddfu
5319      "Load double float, update"
5320      ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5321       (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS)
5322      "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond"
5323      (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj)
5324      (if (eq CCi (or cond 2))
5325          (sequence ((WI address))
5326                    (load-double-semantics 1 DF FR address GRj)
5327                    (set GRi address)))
5328      ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5329       (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5330 )
5331
5332 (dni cldqu
5333      "conditional load quad integer and update index"
5334      ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
5335      "cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond"
5336      (+ pack GRk OP_62 GRi CCi cond OPE4_2 GRj)
5337      (if (eq CCi (or cond 2))
5338          (sequence ((WI address))
5339                    (load-quad-semantics GR address GRj)
5340                    (if (ne (index-of GRi) (index-of GRk))
5341                        (set GRi address))))
5342      ((fr500 (unit u-gr-load)))
5343 )
5344
5345 (define-pmacro (conditional-store name mode op ope regtype profile comment)
5346   (dni name
5347        (comment)
5348        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5349         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL)
5350        (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
5351        (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
5352        (if (eq CCi (or cond 2))
5353            (c-call VOID (.str "@cpu@_write_mem_" mode)
5354                    pc (add GRi GRj) (.sym regtype k)))
5355        profile
5356   )
5357 )
5358
5359 (conditional-store cstb  QI OP_64 OPE4_0 GR
5360                    ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5361                     (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5362                    "Store unsigned byte")
5363 (conditional-store csth  HI OP_64 OPE4_1 GR
5364                    ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5365                     (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5366                    "Store unsigned half")
5367 (conditional-store cst   SI OP_64 OPE4_2 GR
5368                    ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5369                     (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5370                    "Store          word")
5371
5372 (conditional-store cstbf QI OP_66 OPE4_0 FRint
5373                    ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5374                     (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5375                    "Store byte float")
5376 (conditional-store csthf HI OP_66 OPE4_1 FRint
5377                    ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5378                     (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5379                    "Store half float")
5380 (conditional-store cstf  SI OP_66 OPE4_2 FRint
5381                    ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5382                     (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5383                    "Store word float")
5384
5385 (define-pmacro (conditional-store-double
5386                 name mode op ope regtype attr profile comment)
5387   (dni name
5388        (comment)
5389        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5390         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
5391        (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
5392        (+ pack (.sym regtype doublek) op GRi CCi  cond ope GRj)
5393        (if (eq CCi (or cond 2))
5394            (sequence ((WI address))
5395                      (store-double-semantics mode regtype address GRj)))
5396        profile
5397   )
5398 )
5399
5400 (conditional-store-double cstd  DI OP_64 OPE4_3 GR NA
5401                           ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5402                            (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5403                           "Store double word")
5404 (conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS
5405                           ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5406                            (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5407                           "Store double float")
5408
5409 (dni cstq
5410      "conditionally store quad word"
5411      ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) CONDITIONAL)
5412      "cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond"
5413      (+ pack GRk OP_65 GRi CCi cond OPE4_0 GRj)
5414      (if (eq CCi (or cond 2))
5415          (sequence ((WI address))
5416                    (store-quad-semantics GR address GRj)))
5417      ((fr500 (unit u-gr-store)))
5418 )
5419
5420 (define-pmacro (conditional-store-u
5421                 name mode op ope regtype attr profile comment)
5422   (dni name
5423        (comment)
5424        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5425         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
5426        (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
5427        (+ pack (.sym regtype k) op GRi CCi  cond ope GRj)
5428        (if (eq CCi (or cond 2))
5429            (sequence ((WI address))
5430                      (set address (add GRi GRj))
5431                      (c-call VOID (.str "@cpu@_write_mem_" mode)
5432                              pc address (.sym regtype k))
5433                      (set GRi address)))
5434        profile
5435   )
5436 )
5437
5438 (conditional-store-u cstbu QI OP_67 OPE4_0 GR NA
5439                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5440                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5441                      "Store unsigned byte, update index")
5442 (conditional-store-u csthu HI OP_67 OPE4_1 GR NA
5443                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5444                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5445                      "Store unsigned half, update index")
5446 (conditional-store-u cstu  SI OP_67 OPE4_2 GR NA
5447                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5448                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5449                      "Store          word, update index")
5450
5451 (conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS
5452                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5453                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5454                      "Store byte float, update index")
5455 (conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS
5456                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5457                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5458                      "Store half float, update index")
5459 (conditional-store-u cstfu  SI OP_68 OPE4_2 FRint FR-ACCESS
5460                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5461                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5462                      "Store word float, update index")
5463
5464 (define-pmacro (conditional-store-double-u
5465                 name mode op ope regtype attr profile comment)
5466   (dni name
5467        (comment)
5468        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5469         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
5470        (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
5471        (+ pack (.sym regtype doublek) op GRi CCi  cond ope GRj)
5472        (if (eq CCi (or cond 2))
5473            (sequence ((WI address))
5474                      (store-double-semantics mode regtype address GRj)
5475                      (set GRi address)))
5476        profile
5477   )
5478 )
5479
5480 (conditional-store-double-u cstdu  DI OP_67 OPE4_3 GR NA
5481                             ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5482                              (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5483                             "Store double word, update index")
5484 (conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS
5485                             ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5486                              (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5487                             "Store double float, update index")
5488
5489 (define-pmacro (store-r-simm name mode op regtype attr profile comment)
5490   (dni name
5491        (comment)
5492        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5493         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5494        (.str name "$pack $" regtype "k,@($GRi,$d12)")
5495        (+ pack (.sym regtype k) op GRi d12)
5496        (c-call VOID (.str "@cpu@_write_mem_" mode)
5497                pc (add GRi d12) (.sym regtype k))
5498        profile
5499   )
5500 )
5501
5502 (store-r-simm stbi QI OP_50 GR NA
5503               ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5504                (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5505               "Store unsigned byte")
5506 (store-r-simm sthi HI OP_51 GR NA
5507               ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5508                (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5509               "Store unsigned half")
5510 (store-r-simm sti  SI OP_52 GR NA
5511               ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5512                (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5513               "Store          word")
5514
5515 (store-r-simm stbfi QI OP_4E FRint FR-ACCESS
5516               ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5517                (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5518               "Store byte float")
5519 (store-r-simm sthfi HI OP_4F FRint FR-ACCESS
5520               ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5521                (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5522               "Store half float")
5523 (store-r-simm stfi  SI OP_55 FRint FR-ACCESS
5524               ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5525                (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5526               "Store word float")
5527
5528 (define-pmacro (store-double-r-simm name mode op regtype attr profile comment)
5529   (dni name
5530        (comment)
5531        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5532         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5533        (.str name "$pack $" regtype "doublek,@($GRi,$d12)")
5534        (+ pack (.sym regtype doublek) op GRi d12)
5535        (sequence ((WI address))
5536                  (store-double-semantics mode regtype address d12))
5537        profile
5538   )
5539 )
5540
5541 (store-double-r-simm stdi  DI OP_53 GR NA
5542                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5543                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5544                      "Store double word")
5545 (store-double-r-simm stdfi DF OP_56 FR FR-ACCESS
5546                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5547                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5548                      "Store double float")
5549
5550 (define-pmacro (store-quad-r-simm name op regtype attr profile comment)
5551   (dni name
5552        (comment)
5553        ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
5554        (.str name "$pack $" regtype "k,@($GRi,$d12)")
5555        (+ pack (.sym regtype k) op GRi d12)
5556        (sequence ((WI address))
5557                  (store-quad-semantics regtype address d12))
5558        profile
5559   )
5560 )
5561
5562 (store-quad-r-simm stqi  OP_54 GR    NA ((fr500 (unit u-gr-store)))
5563                    "Store quad word")
5564 (store-quad-r-simm stqfi OP_57 FRint FR-ACCESS ()
5565                    "Store quad float")
5566
5567 (define-pmacro (swap-semantics base offset arg)
5568   (sequence ((WI tmp) (WI address))
5569             (set tmp arg)
5570             (set address (add base offset))
5571             (c-call VOID "@cpu@_check_swap_address" address)
5572             (set arg (c-call WI "@cpu@_read_mem_WI" pc address))
5573             (c-call VOID "@cpu@_write_mem_WI" pc address tmp))
5574 )
5575
5576 (dni swap
5577      "Swap contents of memory with GR"
5578      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5579       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
5580      "swap$pack @($GRi,$GRj),$GRk"
5581      (+ pack GRk OP_03 GRi OPE1_05 GRj)
5582      (swap-semantics GRi GRj GRk)
5583      ((fr400 (unit u-swap)) (fr450 (unit u-swap))
5584       (fr500 (unit u-swap)) (fr550 (unit u-swap)))
5585 )
5586
5587 (dni "swapi"
5588      "Swap contents of memory with GR"
5589      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5590       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
5591      ("swapi$pack @($GRi,$d12),$GRk")
5592      (+ pack GRk OP_4D GRi d12)
5593      (swap-semantics GRi d12 GRk)
5594      ((fr400 (unit u-swap)) (fr450 (unit u-swap))
5595       (fr500 (unit u-swap)) (fr550 (unit u-swap)))
5596 )
5597
5598 (dni cswap
5599      "Conditionally swap contents of memory with GR"
5600      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5601       (FR400-MAJOR C-2) (FR450-MAJOR C-2) CONDITIONAL)
5602      "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond"
5603      (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj)
5604      (if (eq CCi (or cond 2))
5605          (swap-semantics GRi GRj GRk))
5606      ((fr400 (unit u-swap)) (fr450 (unit u-swap))
5607       (fr500 (unit u-swap)) (fr550 (unit u-swap)))
5608 )
5609
5610 (define-pmacro (register-transfer
5611                 name op ope reg_src reg_targ pipe attrs profile comment)
5612   (dni name
5613        (comment)
5614        (.splice (UNIT pipe) (.unsplice attrs))
5615        (.str name "$pack $" reg_src ",$" reg_targ)
5616        (+ pack reg_targ op (rs-null) ope reg_src)
5617        (set reg_targ reg_src)
5618        profile
5619   )
5620 )
5621
5622 (register-transfer movgf OP_03 OPE1_15
5623                    GRj FRintk I0
5624                    ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5625                     (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5626                    ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5627                     (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5628                    "transfer gr to fr")
5629 (register-transfer movfg OP_03 OPE1_0D
5630                    FRintk GRj I0
5631                    ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5632                     (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5633                    ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5634                     (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5635                    "transfer fr to gr")
5636
5637 (define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset)))
5638
5639 (define-pmacro (register-transfer-double-from-gr-semantics cond)
5640   (if cond
5641       (if (eq (index-of GRj) 0)
5642           (sequence ()
5643                     (set FRintk 0)
5644                     (set (nextreg h-fr_int FRintk 1) 0))
5645           (sequence ()
5646                     (set FRintk GRj)
5647                     (set (nextreg h-fr_int FRintk 1) (nextreg h-gr GRj 1)))))
5648 )
5649
5650 (dni movgfd
5651      "move GR for FR double"
5652      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5653       (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5654      "movgfd$pack $GRj,$FRintk"
5655      (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj)
5656      (register-transfer-double-from-gr-semantics 1)
5657      ; TODO -- doesn't handle second register in the pair
5658      ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5659       (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5660 )
5661
5662 (define-pmacro (register-transfer-double-to-gr-semantics cond)
5663   (if (andif (ne (index-of GRj) 0) cond)
5664       (sequence ()
5665                 (set GRj FRintk)
5666                 (set (nextreg h-gr GRj 1) (nextreg h-fr_int FRintk 1))))
5667 )
5668
5669 (dni movfgd
5670      "move FR for GR double"
5671      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5672       (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5673      "movfgd$pack $FRintk,$GRj"
5674      (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj)
5675      (register-transfer-double-to-gr-semantics 1)
5676      ; TODO -- doesn't handle second register in the pair
5677      ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5678       (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5679 )
5680
5681 (dni movgfq
5682      "move GR for FR quad"
5683      ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
5684      "movgfq$pack $GRj,$FRintk"
5685      (+ pack FRintk OP_03 (rs-null) OPE1_17 GRj)
5686      (if (eq (index-of GRj) 0)
5687          (sequence ()
5688                    (set FRintk 0)
5689                    (set (reg h-fr_int (add (index-of FRintk) 1)) 0)
5690                    (set (reg h-fr_int (add (index-of FRintk) 2)) 0)
5691                    (set (reg h-fr_int (add (index-of FRintk) 3)) 0))
5692          (sequence ()
5693                    (set FRintk GRj)
5694                    (set (reg h-fr_int (add (index-of FRintk) 1))
5695                         (reg h-gr (add (index-of GRj)    1)))
5696                    (set (reg h-fr_int (add (index-of FRintk) 2))
5697                         (reg h-gr (add (index-of GRj)    2)))
5698                    (set (reg h-fr_int (add (index-of FRintk) 3))
5699                         (reg h-gr (add (index-of GRj)    3)))))
5700      ()
5701 )
5702
5703 (dni movfgq
5704      "move FR for GR quad"
5705      ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
5706      "movfgq$pack $FRintk,$GRj"
5707      (+ pack FRintk OP_03 (rs-null) OPE1_0F GRj)
5708      (if (ne (index-of GRj) 0)
5709          (sequence ()
5710                    (set GRj FRintk)
5711                    (set (reg h-gr (add (index-of GRj)    1))
5712                         (reg h-fr_int (add (index-of FRintk) 1)))
5713                    (set (reg h-gr (add (index-of GRj)    2))
5714                         (reg h-fr_int (add (index-of FRintk) 2)))
5715                    (set (reg h-gr (add (index-of GRj)    3))
5716                         (reg h-fr_int (add (index-of FRintk) 3)))))
5717      ()
5718 )
5719
5720 (define-pmacro (conditional-register-transfer
5721                 name op ope reg_src reg_targ pipe attrs profile comment)
5722   (dni name
5723        (comment)
5724        (.splice (UNIT pipe) CONDITIONAL FR-ACCESS (.unsplice attrs))
5725        (.str name "$pack $" reg_src ",$" reg_targ ",$CCi,$cond")
5726        (+ pack reg_targ op (rs-null) CCi cond ope reg_src)
5727        (if (eq CCi (or cond 2))
5728            (set reg_targ reg_src))
5729        profile
5730   )
5731 )
5732
5733 (conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0
5734                                ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5735                                 (FR400-MAJOR I-4) (FR450-MAJOR I-4))
5736                                ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5737                                 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5738                                "transfer gr to fr")
5739 (conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0
5740                                ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5741                                 (FR400-MAJOR I-4) (FR450-MAJOR I-4))
5742                                ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5743                                 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5744                                "transfer fr to gr")
5745
5746
5747 (dni cmovgfd
5748      "Conditional move GR to FR double"
5749      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5750       (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS)
5751      "cmovgfd$pack $GRj,$FRintk,$CCi,$cond"
5752      (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj)
5753      (register-transfer-double-from-gr-semantics (eq CCi (or cond 2)))
5754      ; TODO -- doesn't handle extra registers in double
5755      ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5756       (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5757 )
5758
5759 (dni cmovfgd
5760      "Conditional move FR to GR double"
5761      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5762       (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS)
5763      "cmovfgd$pack $FRintk,$GRj,$CCi,$cond"
5764      (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj)
5765      (register-transfer-double-to-gr-semantics (eq CCi (or cond 2)))
5766      ; TODO -- doesn't handle second register in the pair
5767      ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5768       (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5769 )
5770
5771 (define-pmacro (register-transfer-spr
5772                 name op ope reg_src reg_targ unitname comment)
5773   (dni name
5774        (comment)
5775        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5776         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
5777        (.str name "$pack $" reg_src ",$" reg_targ)
5778        (+ pack reg_targ op ope reg_src)
5779        (set reg_targ reg_src)
5780        ((fr400 (unit unitname)) (fr450 (unit unitname))
5781         (fr500 (unit unitname)) (fr550 (unit unitname)))
5782   )
5783 )
5784
5785 (register-transfer-spr movgs OP_03 OPE1_06 GRj spr u-gr2spr "transfer gr->spr")
5786 (register-transfer-spr movsg OP_03 OPE1_07 spr GRj u-spr2gr "transfer spr->gr")
5787
5788 ; Integer Branch Conditions
5789 (define-pmacro (Inev cc) (const BI 0))
5790 (define-pmacro (Ira  cc) (const BI 1))
5791 (define-pmacro (Ieq  cc) (     zbit cc))
5792 (define-pmacro (Ine  cc) (not (zbit cc)))
5793 (define-pmacro (Ile  cc) (     orif (zbit cc) (xor (nbit cc) (vbit cc))))
5794 (define-pmacro (Igt  cc) (not (orif (zbit cc) (xor (nbit cc) (vbit cc)))))
5795 (define-pmacro (Ilt  cc) (     xor  (nbit cc) (vbit cc)))
5796 (define-pmacro (Ige  cc) (not (xor  (nbit cc) (vbit cc))))
5797 (define-pmacro (Ils  cc) (     orif (cbit cc) (zbit cc)))
5798 (define-pmacro (Ihi  cc) (not (orif (cbit cc) (zbit cc))))
5799 (define-pmacro (Ic   cc) (     cbit cc))
5800 (define-pmacro (Inc  cc) (not (cbit cc)))
5801 (define-pmacro (In   cc) (     nbit cc))
5802 (define-pmacro (Ip   cc) (not (nbit cc)))
5803 (define-pmacro (Iv   cc) (     vbit cc))
5804 (define-pmacro (Inv  cc) (not (vbit cc)))
5805
5806 ; Float Branch Conditions
5807 (define-pmacro (Fnev cc) (const BI 0))
5808 (define-pmacro (Fra  cc) (const BI 1))
5809 (define-pmacro (Fne  cc) (orif (lbit cc) (orif (gbit cc) (ubit cc))))
5810 (define-pmacro (Feq  cc) (ebit cc))
5811 (define-pmacro (Flg  cc) (orif (lbit cc) (gbit cc)))
5812 (define-pmacro (Fue  cc) (orif (ebit cc) (ubit cc)))
5813 (define-pmacro (Ful  cc) (orif (lbit cc) (ubit cc)))
5814 (define-pmacro (Fge  cc) (orif (ebit cc) (gbit cc)))
5815 (define-pmacro (Flt  cc) (lbit cc))
5816 (define-pmacro (Fuge cc) (orif (ebit cc) (orif (gbit cc) (ubit cc))))
5817 (define-pmacro (Fug  cc) (orif (gbit cc) (ubit cc)))
5818 (define-pmacro (Fle  cc) (orif (ebit cc) (lbit cc)))
5819 (define-pmacro (Fgt  cc) (gbit cc))
5820 (define-pmacro (Fule cc) (orif (ebit cc) (orif (lbit cc) (ubit cc))))
5821 (define-pmacro (Fu   cc) (ubit cc))
5822 (define-pmacro (Fo   cc) (orif (ebit cc) (orif (lbit cc) (gbit cc))))
5823
5824 (define-pmacro (conditional-branch-i prefix cc op cond comment)
5825   (dni (.sym prefix cc)
5826        (comment)
5827        ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5828         (FR400-MAJOR B-1) (FR450-MAJOR B-1))
5829        (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16")
5830        (+ pack (.sym ICC_ cc) ICCi_2 op hint label16)
5831        (sequence ()
5832                  (c-call VOID "@cpu@_model_branch" label16 hint)
5833                  (if (cond ICCi_2)
5834                      (set pc label16)))
5835        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5836         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5837   )
5838 )
5839
5840 (dni bra
5841      "integer branch equal"
5842       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5843        (FR400-MAJOR B-1) (FR450-MAJOR B-1))
5844       "bra$pack $hint_taken$label16"
5845       (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16)
5846       (sequence ()
5847                 (c-call VOID "@cpu@_model_branch" label16 hint_taken)
5848                 (set pc label16))
5849       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5850        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5851 )
5852
5853 (dni bno
5854      "integer branch never"
5855       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5856        (FR400-MAJOR B-1) (FR450-MAJOR B-1))
5857       "bno$pack$hint_not_taken"
5858       (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null))
5859       (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
5860       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5861        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5862 )
5863
5864 (conditional-branch-i b eq  OP_06 Ieq  "integer branch equal")
5865 (conditional-branch-i b ne  OP_06 Ine  "integer branch not equal")
5866 (conditional-branch-i b le  OP_06 Ile  "integer branch less or equal")
5867 (conditional-branch-i b gt  OP_06 Igt  "integer branch greater")
5868 (conditional-branch-i b lt  OP_06 Ilt  "integer branch less")
5869 (conditional-branch-i b ge  OP_06 Ige  "integer branch greater or equal")
5870 (conditional-branch-i b ls  OP_06 Ils  "integer branch less or equal unsigned")
5871 (conditional-branch-i b hi  OP_06 Ihi  "integer branch greater unsigned")
5872 (conditional-branch-i b c   OP_06 Ic   "integer branch carry set")
5873 (conditional-branch-i b nc  OP_06 Inc  "integer branch carry clear")
5874 (conditional-branch-i b n   OP_06 In   "integer branch negative")
5875 (conditional-branch-i b p   OP_06 Ip   "integer branch positive")
5876 (conditional-branch-i b v   OP_06 Iv   "integer branch overflow set")
5877 (conditional-branch-i b nv  OP_06 Inv  "integer branch overflow clear")
5878
5879 (define-pmacro (conditional-branch-f prefix cc op cond comment)
5880   (dni (.sym prefix cc)
5881        (comment)
5882        ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5883         (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
5884        (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16")
5885        (+ pack (.sym FCC_ cc) FCCi_2 op hint label16)
5886        (sequence ()
5887                  (c-call VOID "@cpu@_model_branch" label16 hint)
5888                  (if (cond FCCi_2) (set pc label16)))
5889        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5890         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5891   )
5892 )
5893
5894 (dni fbra
5895      "float branch equal"
5896       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5897        (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
5898       "fbra$pack $hint_taken$label16"
5899       (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16)
5900       (sequence ()
5901                 (c-call VOID "@cpu@_model_branch" label16 hint_taken)
5902                 (set pc label16))
5903       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5904        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5905 )
5906
5907 (dni fbno
5908      "float branch never"
5909       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5910        (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
5911       "fbno$pack$hint_not_taken"
5912       (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null))
5913       (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
5914       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5915        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5916 )
5917
5918 (conditional-branch-f fb ne  OP_07 Fne  "float branch not equal")
5919 (conditional-branch-f fb eq  OP_07 Feq  "float branch equal")
5920 (conditional-branch-f fb lg  OP_07 Flg  "float branch less or greater")
5921 (conditional-branch-f fb ue  OP_07 Fue  "float branch unordered or equal")
5922 (conditional-branch-f fb ul  OP_07 Ful  "float branch unordered or less")
5923 (conditional-branch-f fb ge  OP_07 Fge  "float branch greater or equal")
5924 (conditional-branch-f fb lt  OP_07 Flt  "float branch less")
5925 (conditional-branch-f fb uge OP_07 Fuge "float branch unordered, greater,equal")
5926 (conditional-branch-f fb ug  OP_07 Fug  "float branch unordered or greater")
5927 (conditional-branch-f fb le  OP_07 Fle  "float branch less or equal")
5928 (conditional-branch-f fb gt  OP_07 Fgt  "float branch greater")
5929 (conditional-branch-f fb ule OP_07 Fule "float branch unordered, less or equal")
5930 (conditional-branch-f fb u   OP_07 Fu   "float branch unordered")
5931 (conditional-branch-f fb o   OP_07 Fo   "float branch ordered")
5932
5933 (define-pmacro (ctrlr-branch-semantics cond ccond)
5934   (sequence ((SI tmp))
5935             (set tmp (sub (spr-lcr) 1))
5936             (set (spr-lcr) tmp)
5937             (if cond
5938                 (if (eq ccond 0)
5939                     (if (ne tmp 0)
5940                         (set pc (spr-lr)))
5941                     (if (eq tmp 0)
5942                         (set pc (spr-lr))))))
5943 )
5944
5945 (dni bctrlr
5946      "LCR conditional branch to lr"
5947      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
5948       (FR400-MAJOR B-2) (FR450-MAJOR B-2))
5949      ("bctrlr$pack $ccond,$hint")
5950      (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null))
5951      (sequence ()
5952                (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
5953                (ctrlr-branch-semantics (const BI 1) ccond))
5954      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5955       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5956 )
5957
5958 (define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment)
5959   (dni (.sym prefix cc lr)
5960        (comment)
5961        ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5962         (FR400-MAJOR B-3) (FR450-MAJOR B-3) attr)
5963        (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint")
5964        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope
5965           (ccond-null) (s12-null))
5966        (sequence ()
5967                  (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
5968                  (if (cond (.sym i-f CCi_2)) (set pc (spr-lr))))
5969        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5970         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5971   )
5972 )
5973
5974 (dni bralr
5975      "integer cclr branch always"
5976      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5977       (FR400-MAJOR B-3) (FR450-MAJOR B-3))
5978      "bralr$pack$hint_taken"
5979      (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null))
5980      (sequence ()
5981                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
5982                (set pc (spr-lr)))
5983      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5984       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5985 )
5986
5987 (dni bnolr
5988      "integer cclr branch never"
5989      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5990       (FR400-MAJOR B-3) (FR450-MAJOR B-3))
5991      "bnolr$pack$hint_not_taken"
5992      (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null))
5993      (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
5994      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5995       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5996 )
5997
5998 (conditional-branch-cclr b eq  I OP_0E OPE3_02 Ieq  NA "integer cclr branch equal")
5999 (conditional-branch-cclr b ne  I OP_0E OPE3_02 Ine  NA "integer cclr branch not equal")
6000 (conditional-branch-cclr b le  I OP_0E OPE3_02 Ile  NA "integer cclr branch less or equal")
6001 (conditional-branch-cclr b gt  I OP_0E OPE3_02 Igt  NA "integer cclr branch greater")
6002 (conditional-branch-cclr b lt  I OP_0E OPE3_02 Ilt  NA "integer cclr branch less")
6003 (conditional-branch-cclr b ge  I OP_0E OPE3_02 Ige  NA "integer cclr branch greater or equal")
6004 (conditional-branch-cclr b ls  I OP_0E OPE3_02 Ils  NA "integer cclr branch less or equal unsigned")
6005 (conditional-branch-cclr b hi  I OP_0E OPE3_02 Ihi  NA "integer cclr branch greater unsigned")
6006 (conditional-branch-cclr b c   I OP_0E OPE3_02 Ic   NA "integer cclr branch carry set")
6007 (conditional-branch-cclr b nc  I OP_0E OPE3_02 Inc  NA "integer cclr branch carry clear")
6008 (conditional-branch-cclr b n   I OP_0E OPE3_02 In   NA "integer cclr branch negative")
6009 (conditional-branch-cclr b p   I OP_0E OPE3_02 Ip   NA "integer cclr branch positive")
6010 (conditional-branch-cclr b v   I OP_0E OPE3_02 Iv   NA "integer cclr branch overflow set")
6011 (conditional-branch-cclr b nv  I OP_0E OPE3_02 Inv  NA "integer cclr branch overflow clear")
6012
6013 (dni fbralr
6014      "float cclr branch always"
6015      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
6016       (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS)
6017      "fbralr$pack$hint_taken"
6018      (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null))
6019      (sequence ()
6020                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
6021                (set pc (spr-lr)))
6022      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6023       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6024 )
6025
6026 (dni fbnolr
6027      "float cclr branch never"
6028      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
6029       (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS)
6030      "fbnolr$pack$hint_not_taken"
6031      (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null))
6032      (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
6033      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6034       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6035 )
6036
6037 (conditional-branch-cclr fb eq  F OP_0E OPE3_06 Feq  FR-ACCESS "float cclr branch equal")
6038 (conditional-branch-cclr fb ne  F OP_0E OPE3_06 Fne  FR-ACCESS "float cclr branch not equal")
6039 (conditional-branch-cclr fb lg  F OP_0E OPE3_06 Flg  FR-ACCESS "float branch less or greater")
6040 (conditional-branch-cclr fb ue  F OP_0E OPE3_06 Fue  FR-ACCESS "float branch unordered or equal")
6041 (conditional-branch-cclr fb ul  F OP_0E OPE3_06 Ful  FR-ACCESS "float branch unordered or less")
6042 (conditional-branch-cclr fb ge  F OP_0E OPE3_06 Fge  FR-ACCESS "float branch greater or equal")
6043 (conditional-branch-cclr fb lt  F OP_0E OPE3_06 Flt  FR-ACCESS "float branch less")
6044 (conditional-branch-cclr fb uge F OP_0E OPE3_06 Fuge FR-ACCESS "float branch unordered, greater, equal")
6045 (conditional-branch-cclr fb ug  F OP_0E OPE3_06 Fug  FR-ACCESS "float branch unordered or greater")
6046 (conditional-branch-cclr fb le  F OP_0E OPE3_06 Fle  FR-ACCESS "float branch less or equal")
6047 (conditional-branch-cclr fb gt  F OP_0E OPE3_06 Fgt  FR-ACCESS "float branch greater")
6048 (conditional-branch-cclr fb ule F OP_0E OPE3_06 Fule FR-ACCESS "float branch unordered, less or equal")
6049 (conditional-branch-cclr fb u   F OP_0E OPE3_06 Fu   FR-ACCESS "float branch unordered")
6050 (conditional-branch-cclr fb o   F OP_0E OPE3_06 Fo   FR-ACCESS "float branch ordered")
6051
6052 (define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment)
6053   (dni (.sym prefix cc lr)
6054        (comment)
6055        ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6056         (FR400-MAJOR B-2) (FR450-MAJOR B-2) attr)
6057        (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint")
6058        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null))
6059        (sequence ()
6060                  (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
6061                  (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond))
6062        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6063         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6064   )
6065 )
6066
6067 (dni bcralr
6068      "integer ctrlr branch always"
6069      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6070       (FR400-MAJOR B-2) (FR450-MAJOR B-2))
6071      "bcralr$pack $ccond$hint_taken"
6072      (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null))
6073      (sequence ()
6074                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
6075                (ctrlr-branch-semantics (const BI 1) ccond))
6076      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6077       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6078 )
6079
6080 (dni bcnolr
6081      "integer ctrlr branch never"
6082      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6083       (FR400-MAJOR B-2) (FR450-MAJOR B-2))
6084      "bcnolr$pack$hint_not_taken"
6085      (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null))
6086      (sequence ()
6087                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
6088                (ctrlr-branch-semantics (const BI 0) ccond))
6089      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6090       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6091 )
6092
6093 (conditional-branch-ctrlr bc eq  I OP_0E OPE3_03 Ieq  NA "integer ctrlr branch equal")
6094 (conditional-branch-ctrlr bc ne  I OP_0E OPE3_03 Ine  NA "integer ctrlr branch not equal")
6095 (conditional-branch-ctrlr bc le  I OP_0E OPE3_03 Ile  NA "integer ctrlr branch less equal")
6096 (conditional-branch-ctrlr bc gt  I OP_0E OPE3_03 Igt  NA "integer ctrlr branch greater")
6097 (conditional-branch-ctrlr bc lt  I OP_0E OPE3_03 Ilt  NA "integer ctrlr branch less")
6098 (conditional-branch-ctrlr bc ge  I OP_0E OPE3_03 Ige  NA "integer ctrlr branch greater equal")
6099 (conditional-branch-ctrlr bc ls  I OP_0E OPE3_03 Ils  NA "integer ctrlr branch less equal unsigned")
6100 (conditional-branch-ctrlr bc hi  I OP_0E OPE3_03 Ihi  NA "integer ctrlr branch greater unsigned")
6101 (conditional-branch-ctrlr bc c   I OP_0E OPE3_03 Ic   NA "integer ctrlr branch carry set")
6102 (conditional-branch-ctrlr bc nc  I OP_0E OPE3_03 Inc  NA "integer ctrlr branch carry clear")
6103 (conditional-branch-ctrlr bc n   I OP_0E OPE3_03 In   NA "integer ctrlr branch negative")
6104 (conditional-branch-ctrlr bc p   I OP_0E OPE3_03 Ip   NA "integer ctrlr branch positive")
6105 (conditional-branch-ctrlr bc v   I OP_0E OPE3_03 Iv   NA "integer ctrlr branch overflow set")
6106 (conditional-branch-ctrlr bc nv  I OP_0E OPE3_03 Inv  NA "integer ctrlr branch overflow clear")
6107
6108 (dni fcbralr
6109      "float ctrlr branch always"
6110      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6111       (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS)
6112      "fcbralr$pack $ccond$hint_taken"
6113      (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null))
6114      (sequence ()
6115                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
6116                (ctrlr-branch-semantics (const BI 1) ccond))
6117      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6118       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6119 )
6120
6121 (dni fcbnolr
6122      "float ctrlr branch never"
6123      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6124       (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS)
6125      "fcbnolr$pack$hint_not_taken"
6126      (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null))
6127      (sequence ()
6128                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
6129                (ctrlr-branch-semantics (const BI 0) ccond))
6130      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6131       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6132 )
6133
6134 (conditional-branch-ctrlr fcb eq  F OP_0E OPE3_07 Feq  FR-ACCESS "float cclr branch equal")
6135 (conditional-branch-ctrlr fcb ne  F OP_0E OPE3_07 Fne  FR-ACCESS "float cclr branch not equal")
6136 (conditional-branch-ctrlr fcb lg  F OP_0E OPE3_07 Flg  FR-ACCESS "float branch less or greater")
6137 (conditional-branch-ctrlr fcb ue  F OP_0E OPE3_07 Fue  FR-ACCESS "float branch unordered or equal")
6138 (conditional-branch-ctrlr fcb ul  F OP_0E OPE3_07 Ful  FR-ACCESS "float branch unordered or less")
6139 (conditional-branch-ctrlr fcb ge  F OP_0E OPE3_07 Fge  FR-ACCESS "float branch greater or equal")
6140 (conditional-branch-ctrlr fcb lt  F OP_0E OPE3_07 Flt  FR-ACCESS "float branch less")
6141 (conditional-branch-ctrlr fcb uge F OP_0E OPE3_07 Fuge FR-ACCESS "float branch unordered, greater, equal")
6142 (conditional-branch-ctrlr fcb ug  F OP_0E OPE3_07 Fug  FR-ACCESS "float branch unordered or greater")
6143 (conditional-branch-ctrlr fcb le  F OP_0E OPE3_07 Fle  FR-ACCESS "float branch less or equal")
6144 (conditional-branch-ctrlr fcb gt  F OP_0E OPE3_07 Fgt  FR-ACCESS "float branch greater")
6145 (conditional-branch-ctrlr fcb ule F OP_0E OPE3_07 Fule FR-ACCESS "float branch unordered, less or equal")
6146 (conditional-branch-ctrlr fcb u   F OP_0E OPE3_07 Fu   FR-ACCESS "float branch unordered")
6147 (conditional-branch-ctrlr fcb o   F OP_0E OPE3_07 Fo   FR-ACCESS "float branch ordered")
6148
6149 (define-pmacro (jump-and-link-semantics base offset LI)
6150   (sequence ()
6151             (if (eq LI 1)
6152                 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1))
6153             ; Target address gets aligned here
6154             (set pc (and (add base offset) #xfffffffc))
6155             (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
6156 )
6157
6158 (dni jmpl
6159      "jump and link"
6160      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6161       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6162      "jmpl$pack @($GRi,$GRj)"
6163      (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj)
6164      (jump-and-link-semantics GRi GRj LI)
6165      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6166       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6167 )
6168
6169 (dann callann "call annotation" SI "call_annotation" "at")
6170
6171 (dni calll
6172      "call and link"
6173      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6174       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6175      "calll$pack $callann($GRi,$GRj)"
6176      (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj)
6177      (jump-and-link-semantics GRi GRj LI)
6178      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6179       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6180 )
6181
6182 (dni jmpil
6183      "jump immediate and link"
6184      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6185       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6186      "jmpil$pack @($GRi,$s12)"
6187      (+ pack (misc-null-1) (LI-off) OP_0D GRi s12)
6188      (jump-and-link-semantics GRi s12 LI)
6189      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6190       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6191 )
6192
6193 (dni callil
6194      "call immediate and link"
6195      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6196       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6197      "callil$pack @($GRi,$s12)"
6198      (+ pack (misc-null-1) (LI-on) OP_0D GRi s12)
6199      (jump-and-link-semantics GRi s12 LI)
6200      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6201       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6202 )
6203
6204 (dni call
6205      "call and link"
6206      ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4)
6207       (FR400-MAJOR B-4) (FR450-MAJOR B-4))
6208      "call$pack $label24"
6209      (+ pack OP_0F label24)
6210      (sequence ()
6211                (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1)
6212                (set pc label24)
6213                (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
6214      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6215       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6216 )
6217
6218 (dni rett
6219     "return from trap"
6220     ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6221      (FR400-MAJOR C-2) (FR450-MAJOR C-2) PRIVILEGED)
6222     "rett$pack $debug"
6223     (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null))
6224     ; frv_rett handles operating vs user mode
6225     (sequence ()
6226               (set pc (c-call UWI "frv_rett" pc debug))
6227               (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
6228     ()
6229 )
6230
6231 (dni rei
6232      "run exception instruction"
6233      ((UNIT C) (FR500-MAJOR C-1) (MACH frv) PRIVILEGED)
6234      "rei$pack $eir"
6235      (+ pack (rd-null) OP_37 eir (s12-null))
6236      (nop) ; for now
6237      ()
6238 )
6239
6240 (define-pmacro (trap-semantics cond base offset)
6241   (if cond
6242       (sequence ()
6243                 ; This is defered to frv_itrap because for the breakpoint
6244                 ; case we want to change as little of the machine state as
6245                 ; possible.
6246                 ;
6247                 ; PCSR=PC
6248                 ; PSR.PS=PSR.S
6249                 ; PSR.ET=0
6250                 ; if PSR.ESR==1
6251                 ;   SR0 through SR3=GR4 through GR7
6252                 ; TBR.TT=0x80 + ((GRi + s12) & 0x7f)
6253                 ; PC=TBR
6254                 ; We still should indicate what is modified by this insn.
6255                 (clobber (spr-pcsr))
6256                 (clobber psr_ps)
6257                 (clobber psr_et)
6258                 (clobber tbr_tt)
6259                 (if (ne psr_esr (const 0))
6260                     (sequence ()
6261                               (clobber (spr-sr0))
6262                               (clobber (spr-sr1))
6263                               (clobber (spr-sr2))
6264                               (clobber (spr-sr3))))
6265                 ; frv_itrap handles operating vs user mode
6266                 (c-call VOID "frv_itrap" pc base offset)))
6267 )
6268
6269 (define-pmacro (trap-r prefix cc i-f op ope cond attr comment)
6270   (dni (.sym prefix cc)
6271        (comment)
6272        ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6273         (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr)
6274        (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj")
6275        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj)
6276        (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj)
6277        ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6278         (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6279   )
6280 )
6281
6282 (dni tra
6283      "integer trap always"
6284      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6285       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6286      "tra$pack $GRi,$GRj"
6287      (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj)
6288      (trap-semantics (const BI 1) GRi GRj)
6289      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6290       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6291 )
6292
6293 (dni tno
6294      "integer trap never"
6295      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6296       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6297      "tno$pack"
6298      (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null))
6299      (trap-semantics (const BI 0) GRi GRj)
6300      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6301       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6302 )
6303
6304 (trap-r t eq  I OP_04 OPE4_0 Ieq  NA "integer trap equal")
6305 (trap-r t ne  I OP_04 OPE4_0 Ine  NA "integer trap not equal")
6306 (trap-r t le  I OP_04 OPE4_0 Ile  NA "integer trap less or equal")
6307 (trap-r t gt  I OP_04 OPE4_0 Igt  NA "integer trap greater")
6308 (trap-r t lt  I OP_04 OPE4_0 Ilt  NA "integer trap less")
6309 (trap-r t ge  I OP_04 OPE4_0 Ige  NA "integer trap greater or equal")
6310 (trap-r t ls  I OP_04 OPE4_0 Ils  NA "integer trap less or equal unsigned")
6311 (trap-r t hi  I OP_04 OPE4_0 Ihi  NA "integer trap greater unsigned")
6312 (trap-r t c   I OP_04 OPE4_0 Ic   NA "integer trap carry set")
6313 (trap-r t nc  I OP_04 OPE4_0 Inc  NA "integer trap carry clear")
6314 (trap-r t n   I OP_04 OPE4_0 In   NA "integer trap negative")
6315 (trap-r t p   I OP_04 OPE4_0 Ip   NA "integer trap positive")
6316 (trap-r t v   I OP_04 OPE4_0 Iv   NA "integer trap overflow set")
6317 (trap-r t nv  I OP_04 OPE4_0 Inv  NA "integer trap overflow clear")
6318
6319 (dni ftra
6320      "float trap always"
6321      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6322       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6323      "ftra$pack $GRi,$GRj"
6324      (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj)
6325      (trap-semantics (const BI 1) GRi GRj)
6326      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6327       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6328 )
6329
6330 (dni ftno
6331      "flost trap never"
6332      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6333       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6334      "ftno$pack"
6335      (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null))
6336      (trap-semantics (const BI 0) GRi GRj)
6337      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6338       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6339 )
6340
6341 (trap-r ft ne  F OP_04 OPE4_1 Fne  FR-ACCESS "float trap not equal")
6342 (trap-r ft eq  F OP_04 OPE4_1 Feq  FR-ACCESS "float trap equal")
6343 (trap-r ft lg  F OP_04 OPE4_1 Flg  FR-ACCESS "float trap greater or less")
6344 (trap-r ft ue  F OP_04 OPE4_1 Fue  FR-ACCESS "float trap unordered or equal")
6345 (trap-r ft ul  F OP_04 OPE4_1 Ful  FR-ACCESS "float trap unordered or less")
6346 (trap-r ft ge  F OP_04 OPE4_1 Fge  FR-ACCESS "float trap greater or equal")
6347 (trap-r ft lt  F OP_04 OPE4_1 Flt  FR-ACCESS "float trap less")
6348 (trap-r ft uge F OP_04 OPE4_1 Fuge FR-ACCESS "float trap unordered greater or equal")
6349 (trap-r ft ug  F OP_04 OPE4_1 Fug  FR-ACCESS "float trap unordered or greater")
6350 (trap-r ft le  F OP_04 OPE4_1 Fle  FR-ACCESS "float trap less or equal")
6351 (trap-r ft gt  F OP_04 OPE4_1 Fgt  FR-ACCESS "float trap greater")
6352 (trap-r ft ule F OP_04 OPE4_1 Fule FR-ACCESS "float trap unordered less or equal")
6353 (trap-r ft u   F OP_04 OPE4_1 Fu   FR-ACCESS "float trap unordered")
6354 (trap-r ft o   F OP_04 OPE4_1 Fo   FR-ACCESS "float trap ordered")
6355
6356 (define-pmacro (trap-immed prefix cc i-f op cond attr comment)
6357   (dni (.sym prefix cc)
6358        (comment)
6359        ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6360         (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr)
6361        (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12")
6362        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12)
6363        (trap-semantics (cond (.sym i-f CCi_2)) GRi s12)
6364        ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6365         (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6366   )
6367 )
6368
6369 (dni tira
6370      "integer trap always"
6371      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6372       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6373      "tira$pack $GRi,$s12"
6374      (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12)
6375      (trap-semantics (const BI 1) GRi s12)
6376      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6377       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6378 )
6379
6380 (dni tino
6381      "integer trap never"
6382      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6383       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6384      "tino$pack"
6385      (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null))
6386      (trap-semantics (const BI 0) GRi s12)
6387      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6388       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6389 )
6390
6391 (trap-immed ti eq  I OP_1C Ieq  NA "integer trap equal")
6392 (trap-immed ti ne  I OP_1C Ine  NA "integer trap not equal")
6393 (trap-immed ti le  I OP_1C Ile  NA "integer trap less or equal")
6394 (trap-immed ti gt  I OP_1C Igt  NA "integer trap greater")
6395 (trap-immed ti lt  I OP_1C Ilt  NA "integer trap less")
6396 (trap-immed ti ge  I OP_1C Ige  NA "integer trap greater or equal")
6397 (trap-immed ti ls  I OP_1C Ils  NA "integer trap less or equal unsigned")
6398 (trap-immed ti hi  I OP_1C Ihi  NA "integer trap greater unsigned")
6399 (trap-immed ti c   I OP_1C Ic   NA "integer trap carry set")
6400 (trap-immed ti nc  I OP_1C Inc  NA "integer trap carry clear")
6401 (trap-immed ti n   I OP_1C In   NA "integer trap negative")
6402 (trap-immed ti p   I OP_1C Ip   NA "integer trap positive")
6403 (trap-immed ti v   I OP_1C Iv   NA "integer trap overflow set")
6404 (trap-immed ti nv  I OP_1C Inv  NA "integer trap overflow clear")
6405
6406 (dni ftira
6407      "float trap always"
6408      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6409       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6410      "ftira$pack $GRi,$s12"
6411      (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12)
6412      (trap-semantics (const BI 1) GRi s12)
6413      ((fr400 (unit u-trap))
6414       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6415 )
6416
6417 (dni ftino
6418      "float trap never"
6419      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6420       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6421      "ftino$pack"
6422      (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null))
6423      (trap-semantics (const BI 0) GRi s12)
6424      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6425       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6426 )
6427
6428 (trap-immed fti ne  F OP_1D Fne  FR-ACCESS "float trap not equal")
6429 (trap-immed fti eq  F OP_1D Feq  FR-ACCESS "float trap equal")
6430 (trap-immed fti lg  F OP_1D Flg  FR-ACCESS "float trap greater or less")
6431 (trap-immed fti ue  F OP_1D Fue  FR-ACCESS "float trap unordered or equal")
6432 (trap-immed fti ul  F OP_1D Ful  FR-ACCESS "float trap unordered or less")
6433 (trap-immed fti ge  F OP_1D Fge  FR-ACCESS "float trap greater or equal")
6434 (trap-immed fti lt  F OP_1D Flt  FR-ACCESS "float trap less")
6435 (trap-immed fti uge F OP_1D Fuge FR-ACCESS "float trap unordered greater or equal")
6436 (trap-immed fti ug  F OP_1D Fug  FR-ACCESS "float trap unordered or greater")
6437 (trap-immed fti le  F OP_1D Fle  FR-ACCESS "float trap less or equal")
6438 (trap-immed fti gt  F OP_1D Fgt  FR-ACCESS "float trap greater")
6439 (trap-immed fti ule F OP_1D Fule FR-ACCESS "float trap unordered less or equal")
6440 (trap-immed fti u   F OP_1D Fu   FR-ACCESS "float trap unordered")
6441 (trap-immed fti o   F OP_1D Fo   FR-ACCESS "float trap ordered")
6442
6443 (dni break
6444      "break trap"
6445      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6446       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6447      "break$pack"
6448      (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null))
6449      (sequence ()
6450                ; This is defered to frv_break because for the breakpoint
6451                ; case we want to change as little of the machine state as
6452                ; possible.
6453                ;
6454                ; BPCSR=PC
6455                ; BPSR.BS=PSR.S
6456                ; BPSR.BET=PSR.ET
6457                ; PSR.S=1
6458                ; PSR.ET=0
6459                ; TBR.TT=0xff
6460                ; PC=TBR
6461                ; We still should indicate what is modified by this insn.
6462                (clobber (spr-bpcsr))
6463                (clobber bpsr_bs)
6464                (clobber bpsr_bet)
6465                (clobber psr_s)
6466                (clobber psr_et)
6467                (clobber tbr_tt)
6468                (c-call VOID "frv_break"))
6469      ()
6470 )
6471
6472 (dni mtrap
6473      "media trap"
6474      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6475       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6476      "mtrap$pack"
6477      (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null))
6478      (c-call VOID "frv_mtrap")
6479      ()
6480 )
6481
6482 (define-pmacro (condition-code-logic name operation ope comment)
6483   (dni name
6484        (comment)
6485        ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6)
6486         (FR400-MAJOR B-6) (FR450-MAJOR B-6))
6487        (.str name "$pack $CRi,$CRj,$CRk")
6488        (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj)
6489        (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj))
6490        ()
6491   )
6492 )
6493 (define-pmacro (op-andcr)   0)
6494 (define-pmacro (op-orcr)    1)
6495 (define-pmacro (op-xorcr)   2)
6496 (define-pmacro (op-nandcr)  3)
6497 (define-pmacro (op-norcr)   4)
6498 (define-pmacro (op-andncr)  5)
6499 (define-pmacro (op-orncr)   6)
6500 (define-pmacro (op-nandncr) 7)
6501 (define-pmacro (op-norncr)  8)
6502
6503 (define-pmacro (cr-true)  3)
6504 (define-pmacro (cr-false) 2)
6505 (define-pmacro (cr-undefined) 0)
6506
6507 (condition-code-logic andcr   (op-andcr)   OPE1_08 "and   condition code regs")
6508 (condition-code-logic orcr    (op-orcr)    OPE1_09 "or    condition code regs")
6509 (condition-code-logic xorcr   (op-xorcr)   OPE1_0A "xor   condition code regs")
6510 (condition-code-logic nandcr  (op-nandcr)  OPE1_0C "nand  condition code regs")
6511 (condition-code-logic norcr   (op-norcr)   OPE1_0D "nor   condition code regs")
6512 (condition-code-logic andncr  (op-andncr)  OPE1_10 "andn  condition code regs")
6513 (condition-code-logic orncr   (op-orncr)   OPE1_11 "orn   condition code regs")
6514 (condition-code-logic nandncr (op-nandncr) OPE1_14 "nandn condition code regs")
6515 (condition-code-logic norncr  (op-norncr)  OPE1_15 "norn  condition code regs")
6516
6517 (dni notcr
6518      ("not cccr register")
6519      ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6)
6520       (FR400-MAJOR B-6) (FR450-MAJOR B-6))
6521      (.str notcr "$pack $CRj,$CRk")
6522      (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj)
6523      (set CRk (xor CRj 1))
6524      ()
6525 )
6526
6527 (define-pmacro (check-semantics cond cr)
6528   (if cond (set cr (cr-true)) (set cr (cr-false)))
6529 )
6530
6531 (define-pmacro (check-int-condition-code prefix cc op cond comment)
6532   (dni (.sym prefix cc)
6533        (comment)
6534        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6535         (FR400-MAJOR B-5) (FR450-MAJOR B-5))
6536        (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int")
6537        (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3)
6538        (check-semantics (cond ICCi_3) CRj_int)
6539        ((fr400 (unit u-check)) (fr450 (unit u-check))
6540         (fr500 (unit u-check)) (fr550 (unit u-check)))
6541   )
6542 )
6543
6544 (dni ckra
6545      "check integer cc always"
6546      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6547       (FR400-MAJOR B-5) (FR450-MAJOR B-5))
6548      "ckra$pack $CRj_int"
6549      (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null))
6550      (check-semantics (const BI 1) CRj_int)
6551      ((fr400 (unit u-check)) (fr450 (unit u-check))
6552       (fr500 (unit u-check)) (fr550 (unit u-check)))
6553 )
6554
6555 (dni ckno
6556      "check integer cc never"
6557      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6558       (FR400-MAJOR B-5) (FR450-MAJOR B-5))
6559      "ckno$pack $CRj_int"
6560      (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null))
6561      (check-semantics (const BI 0) CRj_int)
6562      ((fr400 (unit u-check)) (fr450 (unit u-check))
6563       (fr500 (unit u-check)) (fr550 (unit u-check)))
6564 )
6565
6566 (check-int-condition-code ck eq  OP_08 Ieq  "check integer cc equal")
6567 (check-int-condition-code ck ne  OP_08 Ine  "check integer cc not equal")
6568 (check-int-condition-code ck le  OP_08 Ile  "check integer cc less or equal")
6569 (check-int-condition-code ck gt  OP_08 Igt  "check integer cc greater")
6570 (check-int-condition-code ck lt  OP_08 Ilt  "check integer cc less")
6571 (check-int-condition-code ck ge  OP_08 Ige  "check integer cc greater or equal")
6572 (check-int-condition-code ck ls  OP_08 Ils  "check integer cc less or equal unsigned")
6573 (check-int-condition-code ck hi  OP_08 Ihi  "check integer cc greater unsigned")
6574 (check-int-condition-code ck c   OP_08 Ic   "check integer cc carry set")
6575 (check-int-condition-code ck nc  OP_08 Inc  "check integer cc carry clear")
6576 (check-int-condition-code ck n   OP_08 In   "check integer cc negative")
6577 (check-int-condition-code ck p   OP_08 Ip   "check integer cc positive")
6578 (check-int-condition-code ck v   OP_08 Iv   "check integer cc overflow set")
6579 (check-int-condition-code ck nv  OP_08 Inv  "check integer cc overflow clear")
6580
6581 (define-pmacro (check-float-condition-code prefix cc op cond comment)
6582   (dni (.sym prefix cc)
6583        (comment)
6584        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6585         (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
6586        (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float")
6587        (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3)
6588        (check-semantics (cond FCCi_3) CRj_float)
6589        ((fr400 (unit u-check)) (fr450 (unit u-check))
6590         (fr500 (unit u-check)) (fr550 (unit u-check)))
6591   )
6592 )
6593
6594 (dni fckra
6595      "check float cc always"
6596      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6597       (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
6598      "fckra$pack $CRj_float"
6599      (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3)
6600      (check-semantics (const BI 1) CRj_float)
6601      ((fr400 (unit u-check)) (fr450 (unit u-check))
6602       (fr500 (unit u-check)) (fr550 (unit u-check)))
6603 )
6604
6605 (dni fckno
6606      "check float cc never"
6607      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6608       (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
6609      "fckno$pack $CRj_float"
6610      (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3)
6611      (check-semantics (const BI 0) CRj_float)
6612      ((fr400 (unit u-check)) (fr450 (unit u-check))
6613       (fr500 (unit u-check)) (fr550 (unit u-check)))
6614 )
6615
6616 (check-float-condition-code fck ne  OP_09 Fne  "check float cc not equal")
6617 (check-float-condition-code fck eq  OP_09 Feq  "check float cc equal")
6618 (check-float-condition-code fck lg  OP_09 Flg  "check float cc greater or less")
6619 (check-float-condition-code fck ue  OP_09 Fue  "check float cc unordered or equal")
6620 (check-float-condition-code fck ul  OP_09 Ful  "check float cc unordered or less")
6621 (check-float-condition-code fck ge  OP_09 Fge  "check float cc greater or equal")
6622 (check-float-condition-code fck lt  OP_09 Flt  "check float cc less")
6623 (check-float-condition-code fck uge OP_09 Fuge "check float cc unordered greater or equal")
6624 (check-float-condition-code fck ug  OP_09 Fug  "check float cc unordered or greater")
6625 (check-float-condition-code fck le  OP_09 Fle  "check float cc less or equal")
6626 (check-float-condition-code fck gt  OP_09 Fgt  "check float cc greater")
6627 (check-float-condition-code fck ule OP_09 Fule "check float cc unordered less or equal")
6628 (check-float-condition-code fck u   OP_09 Fu   "check float cc unordered")
6629 (check-float-condition-code fck o   OP_09 Fo   "check float cc ordered")
6630
6631 (define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment)
6632   (dni (.sym prefix cc)
6633        (comment)
6634        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6635         (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
6636        (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond")
6637        (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope
6638           (misc-null-9) ICCi_3)
6639        (if (eq CCi (or cond 2))
6640            (check-semantics (test ICCi_3) CRj_int)
6641            (set CRj_int (cr-undefined)))
6642        ((fr400 (unit u-check)) (fr450 (unit u-check))
6643         (fr500 (unit u-check)) (fr550 (unit u-check)))
6644   )
6645 )
6646
6647 (dni cckra
6648      "conditional check integer cc always"
6649      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6650       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
6651      "cckra$pack $CRj_int,$CCi,$cond"
6652      (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0
6653         (misc-null-9) (ICCi_3-null))
6654      (if (eq CCi (or cond 2))
6655          (check-semantics (const BI 1) CRj_int)
6656          (set CRj_int (cr-undefined)))
6657      ((fr400 (unit u-check)) (fr450 (unit u-check))
6658       (fr500 (unit u-check)) (fr550 (unit u-check)))
6659 )
6660
6661 (dni cckno
6662      "conditional check integer cc never"
6663      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6664       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
6665      "cckno$pack $CRj_int,$CCi,$cond"
6666      (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0
6667         (misc-null-9) (ICCi_3-null))
6668      (if (eq CCi (or cond 2))
6669          (check-semantics (const BI 0) CRj_int)
6670          (set CRj_int (cr-undefined)))
6671      ((fr400 (unit u-check)) (fr450 (unit u-check))
6672       (fr500 (unit u-check)) (fr550 (unit u-check)))
6673 )
6674
6675 (conditional-check-int-condition-code cck eq  OP_6A OPE4_0 Ieq  "check integer cc equal")
6676 (conditional-check-int-condition-code cck ne  OP_6A OPE4_0 Ine  "check integer cc not equal")
6677 (conditional-check-int-condition-code cck le  OP_6A OPE4_0 Ile  "check integer cc less or equal")
6678 (conditional-check-int-condition-code cck gt  OP_6A OPE4_0 Igt  "check integer cc greater")
6679 (conditional-check-int-condition-code cck lt  OP_6A OPE4_0 Ilt  "check integer cc less")
6680 (conditional-check-int-condition-code cck ge  OP_6A OPE4_0 Ige  "check integer cc greater or equal")
6681 (conditional-check-int-condition-code cck ls  OP_6A OPE4_0 Ils  "check integer cc less or equal unsigned")
6682 (conditional-check-int-condition-code cck hi  OP_6A OPE4_0 Ihi  "check integer cc greater unsigned")
6683 (conditional-check-int-condition-code cck c   OP_6A OPE4_0 Ic   "check integer cc carry set")
6684 (conditional-check-int-condition-code cck nc  OP_6A OPE4_0 Inc  "check integer cc carry clear")
6685 (conditional-check-int-condition-code cck n   OP_6A OPE4_0 In   "check integer cc negative")
6686 (conditional-check-int-condition-code cck p   OP_6A OPE4_0 Ip   "check integer cc positive")
6687 (conditional-check-int-condition-code cck v   OP_6A OPE4_0 Iv   "check integer cc overflow set")
6688 (conditional-check-int-condition-code cck nv  OP_6A OPE4_0 Inv  "check integer cc overflow clear")
6689
6690 (define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment)
6691   (dni (.sym prefix cc)
6692        (comment)
6693        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6694         (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
6695        (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond")
6696        (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope
6697           (misc-null-9) FCCi_3)
6698        (if (eq CCi (or cond 2))
6699            (check-semantics (test FCCi_3) CRj_float)
6700            (set CRj_float (cr-undefined)))
6701        ((fr400 (unit u-check)) (fr450 (unit u-check))
6702         (fr500 (unit u-check)) (fr550 (unit u-check)))
6703   )
6704 )
6705
6706 (dni cfckra
6707      "conditional check float cc always"
6708      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6709       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
6710      "cfckra$pack $CRj_float,$CCi,$cond"
6711      (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1
6712         (misc-null-9) (FCCi_3-null))
6713      (if (eq CCi (or cond 2))
6714          (check-semantics (const BI 1) CRj_float)
6715          (set CRj_float (cr-undefined)))
6716      ((fr400 (unit u-check)) (fr450 (unit u-check))
6717       (fr500 (unit u-check)) (fr550 (unit u-check)))
6718 )
6719
6720 (dni cfckno
6721      "conditional check float cc never"
6722      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6723       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
6724      "cfckno$pack $CRj_float,$CCi,$cond"
6725      (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1
6726         (misc-null-9) (FCCi_3-null))
6727      (if (eq CCi (or cond 2))
6728          (check-semantics (const BI 0) CRj_float)
6729          (set CRj_float (cr-undefined)))
6730      ((fr400 (unit u-check)) (fr450 (unit u-check))
6731       (fr500 (unit u-check)) (fr550 (unit u-check)))
6732 )
6733
6734 (conditional-check-float-condition-code cfck ne  OP_6A OPE4_1 Fne  "check float cc not equal")
6735 (conditional-check-float-condition-code cfck eq  OP_6A OPE4_1 Feq  "check float cc equal")
6736 (conditional-check-float-condition-code cfck lg  OP_6A OPE4_1 Flg  "check float cc greater or less")
6737 (conditional-check-float-condition-code cfck ue  OP_6A OPE4_1 Fue  "check float cc unordered or equal")
6738 (conditional-check-float-condition-code cfck ul  OP_6A OPE4_1 Ful  "check float cc unordered or less")
6739 (conditional-check-float-condition-code cfck ge  OP_6A OPE4_1 Fge  "check float cc greater or equal")
6740 (conditional-check-float-condition-code cfck lt  OP_6A OPE4_1 Flt  "check float cc less")
6741 (conditional-check-float-condition-code cfck uge OP_6A OPE4_1 Fuge "check float cc unordered greater or equal")
6742 (conditional-check-float-condition-code cfck ug  OP_6A OPE4_1 Fug  "check float cc unordered or greater")
6743 (conditional-check-float-condition-code cfck le  OP_6A OPE4_1 Fle  "check float cc less or equal")
6744 (conditional-check-float-condition-code cfck gt  OP_6A OPE4_1 Fgt  "check float cc greater")
6745 (conditional-check-float-condition-code cfck ule OP_6A OPE4_1 Fule "check float cc unordered less or equal")
6746 (conditional-check-float-condition-code cfck u   OP_6A OPE4_1 Fu   "check float cc unordered")
6747 (conditional-check-float-condition-code cfck o   OP_6A OPE4_1 Fo   "check float cc ordered")
6748
6749 (dni cjmpl
6750      "conditional jump and link"
6751      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6752       (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL)
6753      "cjmpl$pack @($GRi,$GRj),$CCi,$cond"
6754      (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj)
6755      (if (eq CCi (or cond 2))
6756          (jump-and-link-semantics GRi GRj LI))
6757      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6758       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6759 )
6760
6761 (dni ccalll
6762      "conditional call and link"
6763      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6764       (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL)
6765      "ccalll$pack @($GRi,$GRj),$CCi,$cond"
6766      (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj)
6767      (if (eq CCi (or cond 2))
6768          (jump-and-link-semantics GRi GRj LI))
6769      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6770       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6771 )
6772
6773 (define-pmacro (cache-invalidate name cache all op ope profile comment)
6774   (dni name
6775        (comment)
6776        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6777         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6778        (.str name "$pack @($GRi,$GRj)")
6779        (+ pack (rd-null) op GRi ope GRj)
6780        (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all)
6781        profile
6782   )
6783 )
6784
6785 (cache-invalidate ici insn 0 OP_03 OPE1_38
6786                   ((fr400 (unit u-ici)) (fr450 (unit u-ici))
6787                    (fr500 (unit u-ici)) (fr550 (unit u-ici)))
6788                   "invalidate insn cache")
6789 (cache-invalidate dci data 0 OP_03 OPE1_3C
6790                   ((fr400 (unit u-dci)) (fr450 (unit u-dci))
6791                    (fr500 (unit u-dci)) (fr550 (unit u-dci)))
6792                   "invalidate data cache")
6793
6794 (define-pmacro (cache-invalidate-entry name cache op ope profile comment)
6795   (dni name
6796        (comment)
6797        ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2)
6798         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6799        (.str name "$pack @($GRi,$GRj),$ae")
6800        (+ pack (misc-null-1) ae op GRi ope GRj)
6801        (if (eq ae 0)
6802            (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) -1) ; Invalid ae setting for this insn
6803            (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) ae))
6804        profile
6805   )
6806 )
6807
6808 (cache-invalidate-entry icei insn OP_03 OPE1_39
6809                         ((fr400 (unit u-ici)) (fr450 (unit u-ici))
6810                          (fr550 (unit u-ici)))
6811                         "invalidate insn cache entry")
6812 (cache-invalidate-entry dcei data OP_03 OPE1_3A
6813                         ((fr400 (unit u-dci)) (fr450 (unit u-dci))
6814                          (fr550 (unit u-dci)))
6815                         "invalidate data cache entry")
6816
6817 (dni dcf
6818      "Data cache flush"
6819      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6820       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6821      "dcf$pack @($GRi,$GRj)"
6822      (+ pack (rd-null) OP_03 GRi OPE1_3D GRj)
6823      (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0)
6824      ((fr400 (unit u-dcf)) (fr450 (unit u-dcf))
6825       (fr500 (unit u-dcf)) (fr550 (unit u-dcf)))
6826 )
6827
6828 (dni dcef
6829      "Data cache entry flush"
6830      ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2)
6831       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6832      "dcef$pack @($GRi,$GRj),$ae"
6833      (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj)
6834      (if (eq ae 0)
6835          (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1)
6836          (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae))
6837      ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) (fr550 (unit u-dcf)))
6838 )
6839
6840 (define-pmacro (write-TLB name insn op ope comment)
6841   (dni name
6842        (comment)
6843        ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
6844        (.str insn "$pack $GRk,@($GRi,$GRj)")
6845        (+ pack GRk op GRi ope GRj)
6846        (nop) ; for now
6847        ()
6848   )
6849 )
6850
6851 (write-TLB witlb witlb OP_03 OPE1_32 "write for insn TLB")
6852 (write-TLB wdtlb wdtlb OP_03 OPE1_36 "write for data TLB")
6853
6854 (define-pmacro (invalidate-TLB name insn op ope comment)
6855   (dni name
6856        (comment)
6857        ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
6858        (.str insn "$pack @($GRi,$GRj)")
6859        (+ pack (rd-null) op GRi ope GRj)
6860        (nop) ; for now
6861        ()
6862   )
6863 )
6864
6865 (invalidate-TLB itlbi itlbi OP_03 OPE1_33 "invalidate insn TLB")
6866 (invalidate-TLB dtlbi dtlbi OP_03 OPE1_37 "invalidate data TLB")
6867
6868 (define-pmacro (cache-preload name cache pipe attrs op ope profile comment)
6869   (dni name
6870        (comment)
6871        (.splice (UNIT pipe) (FR500-MAJOR C-2)
6872                 (FR400-MAJOR C-2) (.unsplice attrs))
6873        (.str name "$pack $GRi,$GRj,$lock")
6874        (+ pack (misc-null-1) lock op GRi ope GRj)
6875        (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock)
6876        profile
6877   )
6878 )
6879
6880 (cache-preload icpl insn C ((FR550-MAJOR C-2) (FR450-MAJOR C-2)) OP_03 OPE1_30
6881                ((fr400 (unit u-icpl)) (fr450 (unit u-icpl))
6882                 (fr500 (unit u-icpl)) (fr550 (unit u-icpl)))
6883                "preload insn cache")
6884 (cache-preload dcpl data DCPL ((FR550-MAJOR I-8) (FR450-MAJOR I-2)) OP_03 OPE1_34
6885                ((fr400 (unit u-dcpl)) (fr450 (unit u-dcpl))
6886                 (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl)))
6887                "preload data cache")
6888
6889 (define-pmacro (cache-unlock name cache op ope profile comment)
6890   (dni name
6891        (comment)
6892        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6893         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6894        (.str name "$pack $GRi")
6895        (+ pack (rd-null) op GRi ope (GRj-null))
6896        (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi)
6897        profile
6898   )
6899 )
6900
6901 (cache-unlock icul insn OP_03 OPE1_31
6902               ((fr400 (unit u-icul)) (fr450 (unit u-icul))
6903                (fr500 (unit u-icul)) (fr550 (unit u-icul)))
6904               "unlock insn cache")
6905 (cache-unlock dcul data OP_03 OPE1_35
6906               ((fr400 (unit u-dcul)) (fr450 (unit u-dcul))
6907                (fr500 (unit u-dcul)) (fr550 (unit u-dcul)))
6908               "unlock data cache")
6909
6910 (define-pmacro (barrier name insn op ope profile comment)
6911   (dni name
6912        (comment)
6913        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6914         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6915        (.str insn "$pack")
6916        (+ pack (rd-null) op (rs-null) ope (GRj-null))
6917        (nop) ; sufficient implementation
6918        profile
6919   )
6920 )
6921
6922 (barrier bar    bar    OP_03 OPE1_3E
6923          ((fr400 (unit u-barrier)) (fr450 (unit u-barrier))
6924           (fr500 (unit u-barrier)))
6925          "barrier")
6926 (barrier membar membar OP_03 OPE1_3F
6927          ((fr400 (unit u-membar)) (fr450 (unit u-membar))
6928           (fr500 (unit u-membar)))
6929          "memory barrier")
6930
6931 ; Load real address instructions
6932 (define-pmacro (load-real-address name insn what op ope)
6933   (dni name
6934        (.str "Load real address of " what)
6935        ((UNIT C) (FR450-MAJOR C-2) (MACH fr450))
6936        (.str insn "$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS")
6937        (+ pack GRk op GRi ope LRAE LRAD LRAS (LRA-null))
6938        (nop) ; not simulated
6939        ()
6940   )
6941 )
6942
6943 (load-real-address lrai "lrai" "instruction" OP_03 OPE1_20)
6944 (load-real-address lrad "lrad" "data" OP_03 OPE1_21)
6945
6946 (dni tlbpr
6947      "TLB Probe"
6948      ((UNIT C) (FR450-MAJOR C-2) (MACH fr450))
6949      "tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL"
6950      (+ pack (TLBPR-null) TLBPRopx TLBPRL OP_03 GRi OPE1_24 GRj)
6951      (nop) ; not simulated
6952      ()
6953 )
6954
6955 ; Coprocessor operations
6956 (define-pmacro (cop-op num op)
6957   (dni (.sym cop num)
6958        "Coprocessor operation"
6959        ((UNIT C) (FR500-MAJOR C-2) (MACH frv))
6960        (.str "cop" num "$pack $s6_1,$CPRi,$CPRj,$CPRk")
6961        (+ pack CPRk op CPRi s6_1 CPRj)
6962        (nop) ; sufficient implementation
6963        ()
6964   )
6965 )
6966
6967 (cop-op 1 OP_7E)
6968 (cop-op 2 OP_7F)
6969
6970 (define-pmacro (clear-ne-flag-semantics target_index is_float)
6971   (c-call VOID "@cpu@_clear_ne_flags" target_index is_float)
6972 )
6973
6974 (define-pmacro (clear-ne-flag-r name op ope reg is_float attr profile comment)
6975   (dni name
6976        (comment)
6977        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
6978        (.str name "$pack $" reg "k")
6979        (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
6980        (sequence ()
6981                  ; hack to get this referenced for profiling
6982                  (c-raw-call VOID "frv_ref_SI" (.sym reg k))
6983                  (clear-ne-flag-semantics (index-of (.sym reg k)) is_float))
6984        profile
6985   )
6986 )
6987
6988 (clear-ne-flag-r clrgr OP_0A OPE1_00 GR 0 NA
6989                  ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
6990                  "Clear GR NE flag")
6991 (clear-ne-flag-r clrfr OP_0A OPE1_02 FR 1 FR-ACCESS
6992                  ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
6993                  "Clear FR NE flag")
6994
6995 (define-pmacro (clear-ne-flag-all name op ope is_float attr profile comment)
6996   (dni name
6997        (comment)
6998        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
6999        (.str name "$pack")
7000        (+ pack (rd-null) op (rs-null) ope (GRj-null))
7001        (clear-ne-flag-semantics -1 is_float)
7002        profile
7003   )
7004 )
7005
7006 (clear-ne-flag-all clrga OP_0A OPE1_01 0 NA
7007                  ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
7008                    "Clear GR NE flag ALL")
7009 (clear-ne-flag-all clrfa OP_0A OPE1_03 1 FR-ACCESS
7010                  ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
7011                    "Clear FR NE flag ALL")
7012
7013 (define-pmacro (commit-semantics target_index is_float)
7014   (c-call VOID "@cpu@_commit" target_index is_float)
7015 )
7016
7017 (define-pmacro (commit-r name op ope reg is_float attr comment)
7018   (dni name
7019        (comment)
7020        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
7021        (.str name "$pack $" reg "k")
7022        (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
7023        (commit-semantics (index-of (.sym reg k)) is_float)
7024        ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
7025   )
7026 )
7027
7028 (commit-r commitgr OP_0A OPE1_04 GR 0 NA        "commit exceptions, specific GR")
7029 (commit-r commitfr OP_0A OPE1_06 FR 1 FR-ACCESS "commit exceptions, specific FR")
7030
7031 (define-pmacro (commit name op ope is_float attr comment)
7032   (dni name
7033        (comment)
7034        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
7035        (.str name "$pack")
7036        (+ pack (rd-null) op (rs-null) ope (GRj-null))
7037        (commit-semantics -1 is_float)
7038        ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
7039   )
7040 )
7041
7042 (commit commitga OP_0A OPE1_05 0 NA        "commit exceptions, any GR")
7043 (commit commitfa OP_0A OPE1_07 1 FR-ACCESS "commit exceptions, any FR")
7044
7045 (define-pmacro (floating-point-conversion
7046                 name op ope conv mode src targ attr comment)
7047   (dni name
7048        (comment)
7049        (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
7050        (.str name "$pack $" src ",$" targ)
7051        (+ pack targ op (rs-null) ope src)
7052        (set targ (conv mode src))
7053        ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
7054   )
7055 )
7056
7057 (floating-point-conversion fitos OP_79 OPE1_00 float SF FRintj FRk
7058                            ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7059                            "Convert Integer to Single")
7060 (floating-point-conversion fstoi OP_79 OPE1_01 fix   SI FRj FRintk
7061                            ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7062                            "Convert Single  to Integer")
7063 (floating-point-conversion fitod OP_7A OPE1_00 float DF FRintj FRdoublek
7064                            ((MACH frv))
7065                            "Convert Integer to Double")
7066 (floating-point-conversion fdtoi OP_7A OPE1_01 fix   SI FRdoublej FRintk
7067                            ((MACH frv))
7068                            "Convert Double to Integer")
7069
7070 (define-pmacro (floating-point-dual-conversion
7071                 name op ope conv mode src src_hw targ targ_hw attr comment)
7072   (dni name
7073        (comment)
7074        ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) attr)
7075        (.str name "$pack $" src ",$" targ)
7076        (+ pack targ op (rs-null) ope src)
7077        (sequence ()
7078                  (set targ (conv mode src))
7079                  (set (nextreg targ_hw targ 1)
7080                       (conv mode (nextreg src_hw src 1))))
7081        ((fr500 (unit u-float-dual-convert)))
7082   )
7083 )
7084
7085 (floating-point-dual-conversion fditos OP_79 OPE1_10 float SF FRintj h-fr_int FRk h-fr NA "Dual Convert Integer to Single")
7086 (floating-point-dual-conversion fdstoi OP_79 OPE1_11 fix   SI FRj h-fr FRintk h-fr_int NA "Dual Convert Single  to Integer")
7087
7088 (define-pmacro (ne-floating-point-dual-conversion
7089                 name op ope conv mode src src_hw targ targ_hw attr comment)
7090   (dni name
7091        (comment)
7092        ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) NON-EXCEPTING attr)
7093        (.str name "$pack $" src ",$" targ)
7094        (+ pack targ op (rs-null) ope src)
7095        (sequence ()
7096                  (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7097                  (set targ (conv mode src))
7098                  (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
7099                  (set (nextreg targ_hw targ 1)
7100                       (conv mode (nextreg src_hw src 1))))
7101        ((fr500 (unit u-float-dual-convert)))
7102   )
7103 )
7104
7105 (ne-floating-point-dual-conversion nfditos OP_79 OPE1_30 float SF FRintj h-fr_int FRk h-fr NA "Non excepting dual Convert Integer to Single")
7106 (ne-floating-point-dual-conversion nfdstoi OP_79 OPE1_31 fix   SI FRj h-fr FRintk h-fr_int NA "Non excepting dual Convert Single  to Integer")
7107
7108 (define-pmacro (conditional-floating-point-conversion
7109                 name op ope conv mode src targ comment)
7110   (dni name
7111        (comment)
7112        ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7113        (.str name "$pack $" src ",$" targ ",$CCi,$cond")
7114        (+ pack targ op (rs-null) CCi cond ope src)
7115        (if (eq CCi (or cond 2))
7116            (set targ (conv mode src)))
7117        ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
7118   )
7119 )
7120
7121 (conditional-floating-point-conversion cfitos OP_6B OPE4_0 float SF FRintj FRk "Conditional convert Integer to Single")
7122 (conditional-floating-point-conversion cfstoi OP_6B OPE4_1 fix   SI FRj FRintk "Conditional convert Single to Integer")
7123
7124 (define-pmacro (ne-floating-point-conversion
7125                 name op ope conv mode src targ comment)
7126   (dni name
7127        (comment)
7128        ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7129        (.str name "$pack $" src ",$" targ)
7130        (+ pack targ op (rs-null) ope src)
7131        (sequence ()
7132                  (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7133                  (set targ (conv mode src)))
7134        ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
7135   )
7136 )
7137
7138 (ne-floating-point-conversion nfitos OP_79 OPE1_20 float SF FRintj FRk "NE convert Integer to Single")
7139 (ne-floating-point-conversion nfstoi OP_79 OPE1_21 fix   SI FRj FRintk "NE convert Single to Integer")
7140
7141 (register-transfer fmovs OP_79 OPE1_02
7142                    FRj FRk FMALL
7143                    ((FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7144                    ((fr500 (unit u-fr2fr)))
7145                    "Move Single Float")
7146 (register-transfer fmovd OP_7A OPE1_02
7147                    ; TODO -- unit doesn't handle extra register
7148                    FRdoublej FRdoublek FM01
7149                    ((FR500-MAJOR F-1) (MACH frv))
7150                    ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
7151                    "Move Double Float")
7152
7153 (dni fdmovs
7154      "Dual move single float"
7155      ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
7156      "fdmovs$pack $FRj,$FRk"
7157      (+ pack FRk OP_79 (rs-null) OPE1_12 FRj)
7158      (sequence ()
7159                (set FRk FRj)
7160                (set (nextreg h-fr FRk 1) (nextreg h-fr FRj 1)))
7161      ; TODO -- unit doesn't handle extra register
7162      ((fr500 (unit u-fr2fr)))
7163 )
7164
7165 (conditional-register-transfer cfmovs OP_6C OPE4_0 FRj FRk FMALL
7166                                ((FR500-MAJOR F-1) (FR550-MAJOR F-2)
7167                                 (MACH simple,tomcat,fr500,fr550,frv))
7168                                ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
7169                                "Conditional move Single Float")
7170
7171 (define-pmacro (floating-point-neg name src targ op ope attr comment)
7172   (dni name
7173        (comment)
7174        (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
7175        (.str name "$pack $" src ",$" targ)
7176        (+ pack src op (rs-null) ope targ)
7177        (set targ (neg src))
7178        ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7179   )
7180 )
7181
7182 (floating-point-neg fnegs FRj FRk OP_79 OPE1_03 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Floating point negate, single")
7183 (floating-point-neg fnegd FRdoublej FRdoublek OP_7A OPE1_03 ((MACH frv)) "Floating point negate, double")
7184
7185 (dni fdnegs
7186      "Floating point dual negate, single"
7187      ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
7188      "fdnegs$pack $FRj,$FRk"
7189      (+ pack FRk OP_79 (rs-null) OPE1_13 FRj)
7190      (sequence ()
7191                (set FRk (neg FRj))
7192                (set (nextreg h-fr FRk 1) (neg (nextreg h-fr FRj 1))))
7193      ((fr500 (unit u-float-dual-arith)))
7194 )
7195
7196 (dni cfnegs
7197      "Conditional floating point negate, single"
7198      ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7199      "cfnegs$pack $FRj,$FRk,$CCi,$cond"
7200      (+ pack FRj OP_6C (rs-null) CCi cond OPE4_1 FRk)
7201      (if (eq CCi (or cond 2))
7202          (set FRk (neg FRj)))
7203      ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7204 )
7205
7206 (define-pmacro (float-abs name src targ op ope attr comment)
7207   (dni name
7208        (comment)
7209        (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
7210        (.str name "$pack $" src ",$" targ )
7211        (+ pack targ op (rs-null) ope src)
7212        (set targ (abs src))
7213        ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7214   )
7215 )
7216
7217 (float-abs fabss FRj FRk OP_79 OPE1_04 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Float absolute value, single")
7218 (float-abs fabsd FRdoublej FRdoublek OP_7A OPE1_04 ((MACH frv)) "Float absolute value, double")
7219
7220 (dni fdabss
7221      "Floating point dual absolute value, single"
7222      ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
7223      "fdabss$pack $FRj,$FRk"
7224      (+ pack FRk OP_79 (rs-null) OPE1_14 FRj)
7225      (sequence ()
7226                (set FRk (abs FRj))
7227                (set (nextreg h-fr FRk 1) (abs (nextreg h-fr FRj 1))))
7228      ((fr500 (unit u-float-dual-arith)))
7229 )
7230
7231 (dni cfabss
7232      "Conditional floating point absolute value, single"
7233      ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7234      "cfabss$pack $FRj,$FRk,$CCi,$cond"
7235      (+ pack FRj OP_6C (rs-null) CCi cond OPE4_2 FRk)
7236      (if (eq CCi (or cond 2))
7237          (set FRk (abs FRj)))
7238      ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7239 )
7240
7241 (dni fsqrts
7242      "Square root single"
7243      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7244      "fsqrts$pack $FRj,$FRk"
7245      (+ pack FRk OP_79 (rs-null) OPE1_05 FRj)
7246      (set FRk (sqrt SF FRj))
7247      ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
7248 )
7249
7250 (dni fdsqrts
7251      "Dual square root single"
7252      ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4))
7253      "fdsqrts$pack $FRj,$FRk"
7254      (+ pack FRk OP_79 (rs-null) OPE1_15 FRj)
7255      (sequence ()
7256                (set FRk (sqrt SF FRj))
7257                (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
7258      ((fr500 (unit u-float-dual-sqrt)))
7259 )
7260
7261 (dni nfdsqrts
7262      "Non excepting Dual square root single"
7263      ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4) NON-EXCEPTING)
7264      "nfdsqrts$pack $FRj,$FRk"
7265      (+ pack FRk OP_79 (rs-null) OPE1_35 FRj)
7266      (sequence ()
7267                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7268                (set FRk (sqrt SF FRj))
7269                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7270                (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
7271      ((fr500 (unit u-float-dual-sqrt)))
7272 )
7273
7274 (dni fsqrtd
7275      "Square root double"
7276      ((UNIT FM01) (FR500-MAJOR F-4) (MACH frv))
7277      "fsqrtd$pack $FRdoublej,$FRdoublek"
7278      (+ pack FRdoublek OP_7A (rs-null) OPE1_05 FRdoublej)
7279      (set FRdoublek (sqrt DF FRdoublej))
7280      ((fr500 (unit u-float-sqrt)))
7281 )
7282
7283 (dni cfsqrts
7284      "Conditional square root single"
7285      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7286      "cfsqrts$pack $FRj,$FRk,$CCi,$cond"
7287      (+ pack FRk OP_6E (rs-null) CCi cond OPE4_2 FRj)
7288      (if (eq CCi (or cond 2))
7289          (set FRk (sqrt SF FRj)))
7290      ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
7291 )
7292
7293 (dni nfsqrts
7294      "Non exception square root, single"
7295      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7296      "nfsqrts$pack $FRj,$FRk"
7297      (+ pack FRk OP_79 (rs-null) OPE1_25 FRj)
7298      (sequence ()
7299                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7300                (set FRk (sqrt SF FRj)))
7301      ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
7302 )
7303
7304 (define-pmacro (float-binary-op-s name pipe attr operation op ope comment)
7305   (dni name
7306        (comment)
7307        (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) (.unsplice attr))
7308        (.str name "$pack $FRi,$FRj,$FRk")
7309        (+ pack FRk op FRi ope FRj)
7310        (set FRk (operation FRi FRj))
7311        ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7312   )
7313 )
7314
7315 (float-binary-op-s fadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_06 "add single float")
7316 (float-binary-op-s fsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_07 "sub single float")
7317 (float-binary-op-s fmuls FM01  ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_08 "mul single float")
7318
7319 (dni fdivs
7320      "div single float"
7321      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7322      "fdivs$pack $FRi,$FRj,$FRk"
7323      (+ pack FRk OP_79 FRi OPE1_09 FRj)
7324      (set FRk (div FRi FRj))
7325      ((fr500 (unit u-float-div))
7326       (fr550 (unit u-float-div)))
7327 )
7328
7329 (define-pmacro (float-binary-op-d name operation op ope major comment)
7330   (dni name
7331        (comment)
7332        ((UNIT FMALL) (FR500-MAJOR major) (MACH frv))
7333        (.str name "$pack $FRdoublei,$FRdoublej,$FRdoublek")
7334        (+ pack FRdoublek op FRdoublei ope FRdoublej)
7335        (set FRdoublek (operation FRdoublei FRdoublej))
7336        ((fr500 (unit u-float-arith)))
7337   )
7338 )
7339
7340 (float-binary-op-d faddd add OP_7A OPE1_06 F-2 "add double float")
7341 (float-binary-op-d fsubd sub OP_7A OPE1_07 F-2 "sub double float")
7342 (float-binary-op-d fmuld mul OP_7A OPE1_08 F-3 "mul double float")
7343 (float-binary-op-d fdivd div OP_7A OPE1_09 F-4 "div double float")
7344
7345 (define-pmacro (conditional-float-binary-op name pipe attr operation op ope profile comment)
7346   (dni name
7347        (comment)
7348        (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
7349                 (.unsplice attr))
7350        (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
7351        (+ pack FRk op FRi CCi cond ope FRj)
7352        (if (eq CCi (or cond 2))
7353            (set FRk (operation FRi FRj)))
7354        profile
7355   )
7356 )
7357
7358 (conditional-float-binary-op cfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_6D OPE4_0
7359                              ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7360                              "cond add single")
7361 (conditional-float-binary-op cfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_6D OPE4_1
7362                              ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7363                              "cond sub single")
7364 (conditional-float-binary-op cfmuls FM01  ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_6E OPE4_0
7365                              ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7366                              "cond mul single")
7367 (conditional-float-binary-op cfdivs FM01  ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_6E OPE4_1
7368                              ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
7369                              "cond div single")
7370
7371 (define-pmacro (ne-float-binary-op name pipe attr operation op ope profile comment)
7372   (dni name
7373        (comment)
7374        (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
7375                 (.unsplice attr))
7376        (.str name "$pack $FRi,$FRj,$FRk")
7377        (+ pack FRk op FRi ope FRj)
7378        (sequence ()
7379                  (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7380                  (set FRk (operation FRi FRj)))
7381        profile
7382   )
7383 )
7384
7385 (ne-float-binary-op nfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_26
7386                     ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7387                     "ne add single")
7388 (ne-float-binary-op nfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_27
7389                     ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7390                     "ne sub single")
7391 (ne-float-binary-op nfmuls FM01  ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_28
7392                     ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7393                     "ne mul single")
7394 (ne-float-binary-op nfdivs FM01  ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_79 OPE1_29
7395                     ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
7396                     "ne div single")
7397
7398 (define-pmacro (fcc-eq) 8)
7399 (define-pmacro (fcc-lt) 4)
7400 (define-pmacro (fcc-gt) 2)
7401 (define-pmacro (fcc-uo) 1)
7402
7403 (define-pmacro (compare-and-set-fcc arg1 arg2 fcc)
7404   (if (gt arg1 arg2)
7405       (set fcc (fcc-gt))
7406       (if (eq arg1 arg2)
7407           (set fcc (fcc-eq))
7408           (if (lt arg1 arg2)
7409               (set fcc (fcc-lt))
7410               (set fcc (fcc-uo)))))
7411 )
7412
7413 (dni fcmps
7414      "compare single float"
7415      ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7416      "fcmps$pack $FRi,$FRj,$FCCi_2"
7417      (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_0A FRj)
7418      (compare-and-set-fcc FRi FRj FCCi_2)
7419      ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
7420 )
7421
7422 (dni fcmpd
7423      "compare double float"
7424      ((UNIT FMALL) (FR500-MAJOR F-2) (MACH frv))
7425      "fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2"
7426      (+ pack (cond-null) FCCi_2 OP_7A FRdoublei OPE1_0A FRdoublej)
7427      (compare-and-set-fcc FRdoublei FRdoublej FCCi_2)
7428      ((fr500 (unit u-float-compare)))
7429 )
7430
7431 (dni cfcmps
7432      "Conditional compare single, float"
7433      ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7434      "cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond"
7435      (+ pack (cond-null) FCCi_2 OP_6D FRi CCi cond OPE4_2 FRj)
7436      (if (eq CCi (or cond 2))
7437          (compare-and-set-fcc FRi FRj FCCi_2))
7438      ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
7439 )
7440
7441 (dni fdcmps
7442      "float dual compare single"
7443      ((UNIT FMALL) (FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7444      "fdcmps$pack $FRi,$FRj,$FCCi_2"
7445      (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_1A FRj)
7446      (sequence ()
7447                (compare-and-set-fcc FRi FRj FCCi_2)
7448                (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
7449                                     (nextreg h-fccr FCCi_2 1)))
7450      ((fr500 (unit u-float-dual-compare)) (fr550 (unit u-float-dual-compare)))
7451 )
7452
7453 (define-pmacro (float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
7454   (dni name
7455        (comment)
7456        ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
7457        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7458        (+ pack targ op arg1 ope arg2)
7459        (set targ (add_sub (mul arg1 arg2) targ))
7460        ((fr500 (unit u-float-dual-arith)))
7461   )
7462 )
7463
7464 (float-mul-with-add fmadds add FRi FRj FRk OP_79 OPE1_0B "mul with add, single")
7465 (float-mul-with-add fmsubs sub FRi FRj FRk OP_79 OPE1_0C "mul with sub, single")
7466
7467 (float-mul-with-add fmaddd add FRdoublei FRdoublej FRdoublek OP_7A OPE1_0B "mul with add, double")
7468 (float-mul-with-add fmsubd sub FRdoublei FRdoublej FRdoublek OP_7A OPE1_0C "mul with sub, double")
7469
7470 (dni fdmadds
7471      "Float dual multiply with add"
7472      ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
7473      "fdmadds$pack $FRi,$FRj,$FRk"
7474      (+ pack FRk OP_79 FRi OPE1_1B FRj)
7475      (sequence ()
7476                (set FRk (add (mul FRi FRj) FRk))
7477                (set (nextreg h-fr FRk 1)
7478                     (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
7479                          (nextreg h-fr FRk 1))))
7480      ; TODO dual registers not referenced for profiling
7481      ((fr500 (unit u-float-dual-arith)))
7482 )
7483
7484 (dni nfdmadds
7485      "Non excepting float dual multiply with add"
7486      ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
7487      "nfdmadds$pack $FRi,$FRj,$FRk"
7488      (+ pack FRk OP_79 FRi OPE1_3B FRj)
7489      (sequence ()
7490                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7491                (set FRk (add (mul FRi FRj) FRk))
7492                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7493                (set (nextreg h-fr FRk 1)
7494                     (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
7495                          (nextreg h-fr FRk 1))))
7496      ; TODO dual registers not referenced for profiling
7497      ((fr500 (unit u-float-dual-arith)))
7498 )
7499
7500 (define-pmacro (conditional-float-mul-with-add
7501                 name add_sub arg1 arg2 targ op ope comment)
7502   (dni name
7503        (comment)
7504        ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) CONDITIONAL)
7505        (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
7506        (+ pack FRk op FRi CCi cond ope FRj)
7507        (if (eq CCi (or cond 2))
7508            (set targ (add_sub (mul arg1 arg2) targ)))
7509        ((fr500 (unit u-float-dual-arith)))
7510   )
7511 )
7512
7513 (conditional-float-mul-with-add cfmadds add FRi FRj FRk OP_6F OPE4_0 "conditional mul with add, single")
7514 (conditional-float-mul-with-add cfmsubs sub FRi FRj FRk OP_6F OPE4_1 "conditional mul with sub, single")
7515
7516 (define-pmacro (ne-float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
7517   (dni name
7518        (comment)
7519        ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) NON-EXCEPTING)
7520        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7521        (+ pack targ op arg1 ope arg2)
7522        (sequence ()
7523                  (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7524                  (set targ (add_sub (mul arg1 arg2) targ)))
7525        ((fr500 (unit u-float-dual-arith)))
7526   )
7527 )
7528
7529 (ne-float-mul-with-add nfmadds add FRi FRj FRk OP_79 OPE1_2B "non excepting mul with add, single")
7530 (ne-float-mul-with-add nfmsubs sub FRi FRj FRk OP_79 OPE1_2C "non excepting mul with sub, single")
7531
7532 (define-pmacro (float-parallel-mul-add-semantics cond add_sub arg1 arg2 targ)
7533   (if cond
7534       (sequence ()
7535                 (set targ (mul arg1 arg2))
7536                 (set (nextreg h-fr targ 1)
7537                      (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))))
7538 )
7539
7540 (define-pmacro (float-parallel-mul-add
7541                 name add_sub arg1 arg2 targ op ope comment)
7542   (dni name
7543        (comment)
7544        ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7545        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7546        (+ pack targ op arg1 ope arg2)
7547        (float-parallel-mul-add-semantics 1 add_sub arg1 arg2 targ)
7548        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7549   )
7550 )
7551
7552 (float-parallel-mul-add fmas add FRi FRj FRk OP_79 OPE1_0E "parallel mul/add, single")
7553 (float-parallel-mul-add fmss sub FRi FRj FRk OP_79 OPE1_0F "parallel mul/sub, single")
7554
7555 (define-pmacro (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7556   (sequence ()
7557             (set targ (mul arg1 arg2))
7558             (set (nextreg h-fr targ 1)
7559                  (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
7560             (set (nextreg h-fr targ 2)
7561                  (mul (nextreg h-fr arg1 2)     (nextreg h-fr arg2 2)))
7562             (set (nextreg h-fr targ 3)
7563                  (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
7564 )
7565
7566 (define-pmacro (float-dual-parallel-mul-add
7567                 name add_sub arg1 arg2 targ op ope comment)
7568   (dni name
7569        (comment)
7570        ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
7571        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7572        (+ pack targ op arg1 ope arg2)
7573        (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7574        ()
7575   )
7576 )
7577
7578 (float-dual-parallel-mul-add fdmas add FRi FRj FRk OP_79 OPE1_1C "dual parallel mul/add, single")
7579 (float-dual-parallel-mul-add fdmss sub FRi FRj FRk OP_79 OPE1_1D "dual parallel mul/sub, single")
7580
7581 (define-pmacro (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7582   (sequence ()
7583             (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7584             (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
7585             (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 2))
7586             (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 3))
7587             (set targ (mul arg1 arg2))
7588             (set (nextreg h-fr targ 1)
7589                  (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
7590             (set (nextreg h-fr targ 2)
7591                  (mul (nextreg h-fr arg1 2)     (nextreg h-fr arg2 2)))
7592             (set (nextreg h-fr targ 3)
7593                  (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
7594 )
7595
7596 (define-pmacro (ne-float-dual-parallel-mul-add
7597                 name add_sub arg1 arg2 targ op ope comment)
7598   (dni name
7599        (comment)
7600        ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
7601        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7602        (+ pack targ op arg1 ope arg2)
7603        (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7604        ()
7605   )
7606 )
7607
7608 (ne-float-dual-parallel-mul-add nfdmas add FRi FRj FRk OP_79 OPE1_3C "non excepting dual parallel mul/add, single")
7609 (ne-float-dual-parallel-mul-add nfdmss sub FRi FRj FRk OP_79 OPE1_3D "non excepting dual parallel mul/sub, single")
7610
7611 (define-pmacro (conditional-float-parallel-mul-add name add_sub op ope comment)
7612   (dni name
7613        (comment)
7614        ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) CONDITIONAL (MACH simple,tomcat,fr500,fr550,frv))
7615        (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
7616        (+ pack FRk op FRi CCi cond ope FRj)
7617        (float-parallel-mul-add-semantics (eq CCi (or cond 2))
7618                                          add_sub FRi FRj FRk)
7619        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7620   )
7621 )
7622
7623 (conditional-float-parallel-mul-add cfmas add OP_6F OPE4_2 "conditional parallel mul/add, single")
7624 (conditional-float-parallel-mul-add cfmss sub OP_6F OPE4_3 "conditional parallel mul/sub, single")
7625
7626 (define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
7627   (sequence ()
7628             (set targ (ftrunc SF (mul DF (fext DF arg1) (fext DF arg2))))
7629             (set (nextreg h-fr targ 1)
7630                  (ftrunc SF (add_sub DF
7631                                      (fext DF (nextreg h-fr arg1 1))
7632                                      (fext DF (nextreg h-fr arg2 1))))))
7633 )
7634
7635 (define-pmacro (float-parallel-mul-add-double
7636                 name add_sub arg1 arg2 targ op ope comment)
7637   (dni name
7638        (comment)
7639        ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
7640        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7641        (+ pack targ op arg1 ope arg2)
7642        (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
7643        ()
7644   )
7645 )
7646
7647 (float-parallel-mul-add-double fmad add FRi FRj FRk OP_7A OPE1_0E "parallel mul/add, double")
7648 (float-parallel-mul-add-double fmsd sub FRi FRj FRk OP_7A OPE1_0F "parallel mul/sub, double")
7649
7650 (define-pmacro (ne-float-parallel-mul-add name add_sub op ope comment)
7651   (dni name
7652        (comment)
7653        ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7654        (.str name "$pack $FRi,$FRj,$FRk")
7655        (+ pack FRk op FRi ope FRj)
7656        (sequence ()
7657                  (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7658                  (set FRk (mul FRi FRj))
7659                  (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7660                  (set (nextreg h-fr FRk 1)
7661                       (add_sub (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
7662        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7663   )
7664 )
7665
7666 (ne-float-parallel-mul-add nfmas add OP_79 OPE1_2E "ne parallel mul/add,single")
7667 (ne-float-parallel-mul-add nfmss sub OP_79 OPE1_2F "ne parallel mul/sub,single")
7668
7669 (define-pmacro (float-dual-arith name attr oper1 oper2 op ope comment)
7670   (dni name
7671        (comment)
7672        (.splice (UNIT FM01) (.unsplice attr))
7673        (.str name "$pack $FRi,$FRj,$FRk")
7674        (+ pack FRk op FRi ope FRj)
7675        (sequence ()
7676                  (set FRk (oper1 FRi FRj))
7677                  (set (nextreg h-fr FRk 1)
7678                       (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
7679        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7680   )
7681 )
7682
7683 (float-dual-arith fdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_16 "dual add, single")
7684 (float-dual-arith fdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_17 "dual sub, single")
7685 (float-dual-arith fdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_18 "dual mul, single")
7686 (float-dual-arith fddivs ((FR500-MAJOR F-7) (MACH frv))                           div div OP_79 OPE1_19 "dual div,single")
7687 (float-dual-arith fdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_1E "dual add/sub, single")
7688
7689 (dni fdmulcs
7690      "Float dual cross multiply single"
7691      ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7692      "fdmulcs$pack $FRi,$FRj,$FRk"
7693      (+ pack FRk OP_79 FRi OPE1_1F FRj)
7694      (sequence ()
7695                (set FRk (mul FRi (nextreg h-fr FRj 1)))
7696                (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
7697      ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7698 )
7699
7700 (dni nfdmulcs
7701      "NE float dual cross multiply single"
7702      ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7703      "nfdmulcs$pack $FRi,$FRj,$FRk"
7704      (+ pack FRk OP_79 FRi OPE1_3F FRj)
7705      (sequence ()
7706                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7707                (set FRk (mul FRi (nextreg h-fr FRj 1)))
7708                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7709                (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
7710      ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7711 )
7712
7713 (define-pmacro (ne-float-dual-arith name attr oper1 oper2 op ope comment)
7714   (dni name
7715        (comment)
7716        (.splice (UNIT FM01) (.unsplice attr))
7717        (.str name "$pack $FRi,$FRj,$FRk")
7718        (+ pack FRk op FRi ope FRj)
7719        (sequence ()
7720                  (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7721                  (set FRk (oper1 FRi FRj))
7722                  (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7723                  (set (nextreg h-fr FRk 1)
7724                       (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
7725        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7726   )
7727 )
7728
7729 (ne-float-dual-arith nfdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_36 "ne dual add, single")
7730 (ne-float-dual-arith nfdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_37 "ne dual sub, single")
7731 (ne-float-dual-arith nfdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_38 "ne dual mul, single")
7732 (ne-float-dual-arith nfddivs ((FR500-MAJOR F-7) (MACH frv))                           div div OP_79 OPE1_39 "ne dual div,single")
7733 (ne-float-dual-arith nfdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_3E "ne dual add/sub, single")
7734
7735 (dni nfdcmps
7736      "non-excepting dual float compare"
7737      ((UNIT FM01) (FR500-MAJOR F-6) (MACH simple,tomcat,frv))
7738      "nfdcmps$pack $FRi,$FRj,$FCCi_2"
7739      (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_3A FRj)
7740      (sequence ()
7741                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7742                (compare-and-set-fcc FRi FRj FCCi_2)
7743                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7744                (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
7745                                     (nextreg h-fccr FCCi_2 1)))
7746      ((fr500 (unit u-float-dual-compare)))
7747 )
7748
7749 ; Media Instructions
7750 ;
7751 (define-pmacro (halfword hilo arg offset)
7752   (reg (.sym h-fr_ hilo) (add (index-of arg) offset)))
7753
7754 (dni mhsetlos
7755      "Media set lower signed 12 bits"
7756      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7757       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7758      "mhsetlos$pack $u12,$FRklo"
7759      (+ pack FRklo OP_78 OPE1_20 u12)
7760      (set FRklo u12)
7761      ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
7762       (fr550 (unit u-media-set (out FRintk FRklo))))
7763 )
7764
7765 (dni mhsethis
7766      "Media set upper signed 12 bits"
7767      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7768       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7769      "mhsethis$pack $u12,$FRkhi"
7770      (+ pack FRkhi OP_78 OPE1_22 u12)
7771      (set FRkhi u12)
7772      ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
7773       (fr550 (unit u-media-set (out FRintk FRkhi))))
7774 )
7775
7776 (dni mhdsets
7777      "Media dual set halfword signed 12 bits"
7778      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7779       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7780      "mhdsets$pack $u12,$FRintk"
7781      (+ pack FRintk OP_78 OPE1_24 u12)
7782      (sequence ()
7783                ; hack to get FRintk passed to modelling functions
7784                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7785                (set (halfword hi FRintk 0) u12)
7786                (set (halfword lo FRintk 0) u12))
7787      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7788       (fr550 (unit u-media-set)))
7789 )
7790
7791 (define-pmacro (set-5-semantics target value)
7792   (sequence ((HI tmp))
7793             (set tmp target)
7794             (set tmp (and tmp #x07ff))
7795             (set tmp (or tmp (sll (and s5 #x1f) 11)))
7796             (set target tmp))
7797 )
7798
7799 (define-pmacro (media-set-5 name hilo op ope comment)
7800   (dni name
7801        (comment)
7802        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7803         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7804        (.str name "$pack $s5,$FRk" hilo)
7805        (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5)
7806        (set-5-semantics (.sym FRk hilo) s5)
7807        ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
7808         (fr550 (unit u-media-set (out FRintk (.sym FRk hilo)))))
7809   )
7810 )
7811
7812 (media-set-5 mhsetloh lo OP_78 OPE1_21 "Media set upper 5 bits lo")
7813 (media-set-5 mhsethih hi OP_78 OPE1_23 "Media set upper 5 bits hi")
7814
7815 (dni mhdseth
7816      "Media dual set halfword upper 5 bits"
7817      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7818       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7819      "mhdseth$pack $s5,$FRintk"
7820      (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5)
7821      (sequence ()
7822                ; hack to get FRintk passed to modelling functions
7823                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7824                (set-5-semantics (halfword hi FRintk 0) s5)
7825                (set-5-semantics (halfword lo FRintk 0) s5))
7826      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7827       (fr550 (unit u-media-set)))
7828 )
7829
7830 (define-pmacro (media-logic-r-r name operation op ope comment)
7831   (dni name
7832        (comment)
7833        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7834         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7835        (.str name "$pack $FRinti,$FRintj,$FRintk")
7836        (+ pack FRintk op FRinti ope FRintj)
7837        (set FRintk (operation FRinti FRintj))
7838        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7839         (fr500 (unit u-media)) (fr550 (unit u-media)))
7840   )
7841 )
7842
7843 (media-logic-r-r mand and OP_7B OPE1_00 "and reg/reg")
7844 (media-logic-r-r mor  or  OP_7B OPE1_01 "or  reg/reg")
7845 (media-logic-r-r mxor xor OP_7B OPE1_02 "xor reg/reg")
7846
7847 (define-pmacro (conditional-media-logic name operation op ope comment)
7848   (dni name
7849        (comment)
7850        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7851         (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
7852        (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
7853        (+ pack FRintk op FRinti CCi cond ope FRintj)
7854        (if (eq CCi (or cond 2))
7855            (set FRintk (operation FRinti FRintj)))
7856        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7857         (fr500 (unit u-media)) (fr550 (unit u-media)))
7858   )
7859 )
7860
7861 (conditional-media-logic cmand and OP_70 OPE4_0 "conditional and reg/reg")
7862 (conditional-media-logic cmor  or  OP_70 OPE4_1 "conditional or  reg/reg")
7863 (conditional-media-logic cmxor xor OP_70 OPE4_2 "conditional xor reg/reg")
7864
7865 (dni mnot
7866      ("mnot")
7867      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7868       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7869      ("mnot$pack $FRintj,$FRintk")
7870      (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj)
7871      (set FRintk (inv FRintj))
7872      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7873       (fr500 (unit u-media)) (fr550 (unit u-media)))
7874 )
7875
7876 (dni cmnot
7877      ("cmnot")
7878      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7879       (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
7880      ("cmnot$pack $FRintj,$FRintk,$CCi,$cond")
7881      (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj)
7882      (if (eq CCi (or cond 2))
7883          (set FRintk (inv FRintj)))
7884      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7885       (fr500 (unit u-media)) (fr550 (unit u-media)))
7886 )
7887
7888 (define-pmacro (media-rotate-r-r name operation op ope comment)
7889   (dni name
7890        (comment)
7891        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7892         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7893        (.str name "$pack $FRinti,$u6,$FRintk")
7894        (+ pack FRintk op FRinti ope u6)
7895        (set FRintk (operation FRinti (and u6 #x1f)))
7896        ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
7897         (fr500 (unit u-media)) (fr550 (unit u-media)))
7898   )
7899 )
7900
7901 (media-rotate-r-r mrotli rol OP_7B OPE1_04 "rotate left reg/reg")
7902 (media-rotate-r-r mrotri ror OP_7B OPE1_05 "rotate right reg/reg")
7903
7904 (define-pmacro (media-cut-r-r name arg op ope comment)
7905   (dni name
7906        (comment)
7907        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7908         (FR400-MAJOR M-2) (FR450-MAJOR M-2))
7909        (.str name "$pack $FRinti,$" arg ",$FRintk")
7910        (+ pack FRintk op FRinti ope arg)
7911        (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg))
7912        ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
7913         (fr500 (unit u-media)) (fr550 (unit u-media)))
7914   )
7915 )
7916
7917 (media-cut-r-r mwcut  FRintj OP_7B OPE1_06 "media cut")
7918 (media-cut-r-r mwcuti u6     OP_7B OPE1_07 "media cut")
7919
7920 (define-pmacro (media-cut-acc name arg op ope fr450-major comment)
7921   (dni name
7922        (comment)
7923        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7924         (FR400-MAJOR M-1) (FR450-MAJOR fr450-major))
7925        (.str name "$pack $ACC40Si,$" arg ",$FRintk")
7926        (+ pack FRintk op ACC40Si ope arg)
7927        (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg))
7928        ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
7929         (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
7930   )
7931 )
7932
7933 (media-cut-acc mcut  FRintj OP_7B OPE1_2C M-1 "media accumulator cut reg")
7934 (media-cut-acc mcuti s6     OP_7B OPE1_2E M-5 "media accumulator cut immed")
7935
7936 (define-pmacro (media-cut-acc-ss name arg op ope fr450-major comment)
7937   (dni name
7938        (comment)
7939        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7940         (FR400-MAJOR M-1) (FR450-MAJOR fr450-major))
7941        (.str name "$pack $ACC40Si,$" arg ",$FRintk")
7942        (+ pack FRintk op ACC40Si ope arg)
7943        (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg))
7944        ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
7945         (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
7946   )
7947 )
7948
7949 (media-cut-acc-ss mcutss  FRintj OP_7B OPE1_2D M-1 "media accumulator cut reg with saturation")
7950 (media-cut-acc-ss mcutssi s6     OP_7B OPE1_2F M-5 "media accumulator cut immed with saturation")
7951
7952 ; Dual Media Instructions
7953 ;
7954 (define-pmacro (register-unaligned register alignment)
7955   (and (index-of register) (sub alignment 1))
7956 )
7957
7958 (dni mdcutssi
7959      "Media dual cut with signed saturation"
7960      ((UNIT MDCUTSSI) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
7961       (FR400-MAJOR M-2) (FR450-MAJOR M-6))
7962      "mdcutssi$pack $ACC40Si,$s6,$FRintkeven"
7963      (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6)
7964      (if (register-unaligned ACC40Si 2)
7965          (c-call VOID "@cpu@_media_acc_not_aligned")
7966          (if (register-unaligned FRintkeven 2)
7967              (c-call VOID "@cpu@_media_register_not_aligned")
7968              (sequence ()
7969                        (set FRintkeven (c-call SI "@cpu@_media_cut_ss" ACC40Si s6))
7970                        (set (nextreg h-fr_int FRintkeven 1)
7971                             (c-call SI "@cpu@_media_cut_ss"
7972                                     (nextreg h-acc40S ACC40Si 1) s6)))))
7973      ((fr400 (unit u-media-4-acc-dual
7974                    (out FRintk FRintkeven)))
7975       (fr450 (unit u-media-4-acc-dual
7976                    (out FRintk FRintkeven)))
7977       (fr550 (unit u-media-3-acc-dual)))
7978 )
7979
7980 ; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated
7981 ; so it will be passed to the unit modelers.   YUCK!!!!!
7982 (define-pmacro (extract-hilo reg1 off1 reg2 off2 arg1hi arg1lo arg2hi arg2lo)
7983   (sequence ()
7984             (set arg1hi (add (halfword hi reg1 off1) (mul reg1 0)))
7985             (set arg1lo (add (halfword lo reg1 off1) (mul reg1 0)))
7986             (set arg2hi (add (halfword hi reg2 off2) (mul reg2 0)))
7987             (set arg2lo (add (halfword lo reg2 off2) (mul reg2 0))))
7988 )
7989
7990 (dni maveh
7991      "Media dual average"
7992      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7993       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7994      "maveh$pack $FRinti,$FRintj,$FRintk"
7995      (+ pack FRintk OP_7B FRinti OPE1_08 FRintj)
7996      (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj))
7997      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7998       (fr500 (unit u-media)) (fr550 (unit u-media)))
7999 )
8000
8001 (define-pmacro (media-dual-shift name operation op ope profile comment)
8002   (dni name
8003        (comment)
8004        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
8005         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8006        (.str name "$pack $FRinti,$u6,$FRintk")
8007        (+ pack FRintk op FRinti ope u6)
8008        (sequence ()
8009                  ; hack to get these referenced for profiling
8010                  (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
8011                  (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8012                  (set (halfword hi FRintk 0)
8013                       (operation (halfword hi FRinti 0) (and u6 #xf)))
8014                  (set (halfword lo FRintk 0)
8015                       (operation (halfword lo FRinti 0) (and u6 #xf))))
8016        profile
8017   )
8018 )
8019
8020 (media-dual-shift msllhi sll OP_7B OPE1_09
8021                   ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
8022                    (fr500 (unit u-media)) (fr550 (unit u-media)))
8023                   "Media dual shift left  logical")
8024 (media-dual-shift msrlhi srl OP_7B OPE1_0A
8025                   ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
8026                    (fr500 (unit u-media)) (fr550 (unit u-media)))
8027                   "Media dual shift right logical")
8028 (media-dual-shift msrahi sra OP_7B OPE1_0B
8029                   ((fr400 (unit u-media-6)) (fr450 (unit u-media-6))
8030                    (fr500 (unit u-media)) (fr550 (unit u-media)))
8031                   "Media dual shift right arithmetic")
8032
8033 (define-pmacro (media-dual-word-rotate-r-r name operation op ope comment)
8034   (dni name
8035        (comment)
8036        ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
8037         (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8038        (.str name "$pack $FRintieven,$s6,$FRintkeven")
8039        (+ pack FRintkeven op FRintieven ope s6)
8040        (if (orif (register-unaligned FRintieven 2)
8041                  (register-unaligned FRintkeven 2))
8042            (c-call VOID "@cpu@_media_register_not_aligned")
8043            (sequence ()
8044                      (set FRintkeven (operation FRintieven (and s6 #x1f)))
8045                      (set (nextreg h-fr_int FRintkeven 1)
8046                           (operation (nextreg h-fr_int FRintieven 1)
8047                                      (and s6 #x1f)))))
8048        ((fr400 (unit u-media-3-quad
8049                      (in  FRinti FRintieven)
8050                      (out FRintk FRintkeven)))
8051         (fr450 (unit u-media-3-quad
8052                      (in  FRinti FRintieven)
8053                      (out FRintk FRintkeven)))
8054         (fr550 (unit u-media-quad)))
8055   )
8056 )
8057
8058 (media-dual-word-rotate-r-r mdrotli rol OP_78 OPE1_0B "rotate left reg/reg")
8059
8060 (dni mcplhi
8061      "Media bit concatenate, halfword"
8062      ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
8063       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8064      "mcplhi$pack $FRinti,$u6,$FRintk"
8065      (+ pack FRintk OP_78 FRinti OPE1_0C u6)
8066      (sequence ((HI arg1) (HI arg2) (HI shift))
8067                (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
8068                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8069                (set shift (and u6 #xf))
8070                (set arg1 (sll (halfword hi FRinti 0) shift))
8071                (if (ne shift 0)
8072                    (sequence ()
8073                              (set arg2 (halfword hi FRinti 1))
8074                              (set arg2 (srl HI (sll HI arg2 (sub 15 shift))
8075                                             (sub 15 shift)))
8076                              (set arg1 (or HI arg1 arg2))))
8077                (set (halfword hi FRintk 0) arg1))
8078      ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual))
8079       (fr550 (unit u-media-3-dual)))
8080 )
8081
8082 (dni mcpli
8083      "Media bit concatenate, word"
8084      ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
8085       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8086      "mcpli$pack $FRinti,$u6,$FRintk"
8087      (+ pack FRintk OP_78 FRinti OPE1_0D u6)
8088      (sequence ((SI tmp) (SI shift))
8089                (set shift (and u6 #x1f))
8090                (set tmp (sll FRinti shift))
8091                (if (ne shift 0)
8092                    (sequence ((SI tmp1))
8093                              (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1)
8094                                                  (sub 31 shift))
8095                                             (sub 31 shift)))
8096                              (set tmp (or tmp tmp1))))
8097                (set FRintk tmp))
8098      ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual))
8099       (fr550 (unit u-media-3-dual)))
8100 )
8101
8102 (define-pmacro (saturate arg max min result)
8103   (if (gt arg max)
8104       (set result max)
8105       (if (lt arg min)
8106           (set result min)
8107           (set result arg)))
8108 )
8109
8110 (dni msaths
8111      "Media dual saturation signed"
8112      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8113       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8114      "msaths$pack $FRinti,$FRintj,$FRintk"
8115      (+ pack FRintk OP_7B FRinti OPE1_0C FRintj)
8116      (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
8117                (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8118                (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0))
8119                (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0)))
8120      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8121       (fr500 (unit u-media)) (fr550 (unit u-media)))
8122 )
8123
8124 (dni mqsaths
8125      "Media quad saturation signed"
8126      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2)
8127       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8128      "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven"
8129      (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven)
8130      (if (orif (register-unaligned FRintieven 2)
8131                (orif (register-unaligned FRintjeven 2)
8132                      (register-unaligned FRintkeven 2)))
8133          (c-call VOID "@cpu@_media_register_not_aligned")
8134          (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
8135                    ; hack to get FRintkeven referenced as a target for profiling
8136                    (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8137                    (extract-hilo FRintieven 0 FRintjeven 0 argihi argilo argjhi argjlo)
8138                    (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 0))
8139                    (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 0))
8140                    (extract-hilo FRintieven 1 FRintjeven 1 argihi argilo argjhi argjlo)
8141                    (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 1))
8142                    (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 1))))
8143      ((fr400 (unit u-media-1-quad
8144                    (in  FRinti FRintieven)
8145                    (in  FRintj FRintjeven)
8146                    (out FRintk FRintkeven)))
8147       (fr450 (unit u-media-1-quad
8148                    (in  FRinti FRintieven)
8149                    (in  FRintj FRintjeven)
8150                    (out FRintk FRintkeven)))
8151       (fr550 (unit u-media-quad)))
8152 )
8153
8154 (define-pmacro (saturate-unsigned arg max result)
8155   (if (gt arg max)
8156       (set result max)
8157       (set result arg))
8158 )
8159
8160 (dni msathu
8161      "Media dual saturation unsigned"
8162      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8163       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8164      "msathu$pack $FRinti,$FRintj,$FRintk"
8165      (+ pack FRintk OP_7B FRinti OPE1_0D FRintj)
8166      (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo))
8167                (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8168                (saturate-unsigned argihi argjhi (halfword hi FRintk 0))
8169                (saturate-unsigned argilo argjlo (halfword lo FRintk 0)))
8170      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8171       (fr500 (unit u-media)) (fr550 (unit u-media)))
8172 )
8173
8174 (define-pmacro (media-dual-compare name mode op ope comment)
8175   (dni name
8176        (comment)
8177        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8178         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8179        (.str name "$pack $FRinti,$FRintj,$FCCk")
8180        (+ pack (cond-null) FCCk op FRinti ope FRintj)
8181        (if (register-unaligned FCCk 2)
8182            (c-call VOID "@cpu@_media_cr_not_aligned")
8183            (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8184                      (extract-hilo FRinti 0 FRintj 0
8185                                    argihi argilo argjhi argjlo)
8186                      (compare-and-set-fcc argihi argjhi FCCk)
8187                      (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1))))
8188        ; TODO - doesn't handle second FCC
8189        ((fr400 (unit u-media-7)) (fr450 (unit u-media-7))
8190         (fr500 (unit u-media)) (fr550 (unit u-media)))
8191   )
8192 )
8193
8194 (media-dual-compare mcmpsh HI  OP_7B OPE1_0E "Media dual compare signed")
8195 (media-dual-compare mcmpuh UHI OP_7B OPE1_0F "Media dual compare unsigned")
8196
8197 ; Bits for the MSR.SIE field
8198 (define-pmacro (msr-sie-nil)      0)
8199 (define-pmacro (msr-sie-fri-hi)   8)
8200 (define-pmacro (msr-sie-fri-lo)   4)
8201 (define-pmacro (msr-sie-fri-1-hi) 2)
8202 (define-pmacro (msr-sie-fri-1-lo) 1)
8203 (define-pmacro (msr-sie-acci)     8)
8204 (define-pmacro (msr-sie-acci-1)   4)
8205 (define-pmacro (msr-sie-acci-2)   2)
8206 (define-pmacro (msr-sie-acci-3)   1)
8207
8208 (define-pmacro (saturate-v arg max min sie result)
8209   (if (gt DI arg max)
8210       (sequence ()
8211                 (set result max)
8212                 (c-call VOID "@cpu@_media_overflow" sie))
8213       (if (lt DI arg min)
8214           (sequence ()
8215                     (set result min)
8216                     (c-call VOID "@cpu@_media_overflow" sie))
8217           (set result arg)))
8218 )
8219
8220 (dni mabshs
8221      "Media dual absolute value, halfword"
8222      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2)
8223       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8224      "mabshs$pack $FRintj,$FRintk"
8225      (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj)
8226      (sequence ((HI arghi) (HI arglo))
8227                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
8228                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8229                (set arghi (halfword hi FRintj 0))
8230                (set arglo (halfword lo FRintj 0))
8231                (saturate-v (abs arghi) 32767 -32768 (msr-sie-fri-hi)
8232                            (halfword hi FRintk 0))
8233                (saturate-v (abs arglo) 32767 -32768 (msr-sie-fri-lo)
8234                            (halfword lo FRintk 0)))
8235      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8236       (fr550 (unit u-media)))
8237 )
8238
8239 (define-pmacro (media-arith-sat-semantics
8240                 operation arg1 arg2 res mode max min sie)
8241   (sequence ((DI tmp))
8242             (set tmp (operation arg1 arg2))
8243             (saturate-v tmp max min sie res))
8244 )
8245
8246 (define-pmacro (media-dual-arith-sat-semantics operation mode max min)
8247   (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8248             (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8249             (media-arith-sat-semantics operation argihi argjhi
8250                                        (halfword hi FRintk 0) mode max min
8251                                        (msr-sie-fri-hi))
8252             (media-arith-sat-semantics operation argilo argjlo
8253                                        (halfword lo FRintk 0) mode max min
8254                                        (msr-sie-fri-lo)))
8255 )
8256
8257 (define-pmacro (media-dual-arith-sat name operation mode max min op ope comment)
8258   (dni name
8259        (comment)
8260        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8261         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8262        (.str name "$pack $FRinti,$FRintj,$FRintk")
8263        (+ pack FRintk op FRinti ope FRintj)
8264        (media-dual-arith-sat-semantics operation mode max min)
8265        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8266         (fr500 (unit u-media)) (fr550 (unit u-media)))
8267   )
8268 )
8269
8270 (media-dual-arith-sat maddhss add  HI 32767 -32768 OP_7B OPE1_10 "Media dual add signed with saturation")
8271 (media-dual-arith-sat maddhus add UHI 65535      0 OP_7B OPE1_11 "Media dual add unsigned with saturation")
8272
8273 (media-dual-arith-sat msubhss sub  HI 32767 -32768 OP_7B OPE1_12 "Media dual sub signed with saturation")
8274 (media-dual-arith-sat msubhus sub UHI 65535      0 OP_7B OPE1_13 "Media dual sub unsigned with saturation")
8275
8276 (define-pmacro (conditional-media-dual-arith-sat
8277                 name operation mode max min op ope comment)
8278   (dni name
8279        (comment)
8280        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8281         (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
8282        (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
8283        (+ pack FRintk op FRinti CCi cond ope FRintj)
8284        (if (eq CCi (or cond 2))
8285            (media-dual-arith-sat-semantics operation mode max min))
8286        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8287         (fr500 (unit u-media)) (fr550 (unit u-media)))
8288   )
8289 )
8290
8291 (conditional-media-dual-arith-sat cmaddhss add  HI 32767 -32768 OP_71 OPE4_0 "Conditional Media dual add signed with saturation")
8292 (conditional-media-dual-arith-sat cmaddhus add UHI 65535      0 OP_71 OPE4_1 "Conditional Media dual add unsigned with saturation")
8293
8294 (conditional-media-dual-arith-sat cmsubhss sub  HI 32767 -32768 OP_71 OPE4_2 "Conditional Media dual sub signed with saturation")
8295 (conditional-media-dual-arith-sat cmsubhus sub UHI 65535      0 OP_71 OPE4_3 "Conditional Media dual sub unsigned with saturation")
8296
8297 (define-pmacro (media-quad-arith-sat-semantics cond operation mode max min)
8298   (if (orif (register-unaligned FRintieven 2)
8299             (orif (register-unaligned FRintjeven 2)
8300                   (register-unaligned FRintkeven 2)))
8301       (c-call VOID "@cpu@_media_register_not_aligned")
8302       (if cond
8303           (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8304                     ; hack to get FRintkeven referenced as a target for profiling
8305                     (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8306                     (extract-hilo FRintieven 0 FRintjeven 0
8307                                   argihi argilo argjhi argjlo)
8308                     (media-arith-sat-semantics operation argihi argjhi
8309                                                (halfword hi FRintkeven 0) mode
8310                                                max min (msr-sie-fri-hi))
8311                     (media-arith-sat-semantics operation argilo argjlo
8312                                                (halfword lo FRintkeven 0) mode
8313                                                max min (msr-sie-fri-lo))
8314                     (extract-hilo FRintieven 1 FRintjeven 1
8315                                   argihi argilo argjhi argjlo)
8316                     (media-arith-sat-semantics operation argihi argjhi
8317                                                (halfword hi FRintkeven 1) mode
8318                                                max min  (msr-sie-fri-1-hi))
8319                     (media-arith-sat-semantics operation argilo argjlo
8320                                                (halfword lo FRintkeven 1) mode
8321                                                max min (msr-sie-fri-1-lo)))))
8322 )
8323
8324 (define-pmacro (media-quad-arith-sat name operation mode max min op ope comment)
8325   (dni name
8326        (comment)
8327        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8328         (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8329        (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven")
8330        (+ pack FRintkeven op FRintieven ope FRintjeven)
8331        (media-quad-arith-sat-semantics 1 operation mode max min)
8332        ((fr400 (unit u-media-1-quad
8333                      (in  FRinti FRintieven)
8334                      (in  FRintj FRintjeven)
8335                      (out FRintk FRintkeven)))
8336         (fr450 (unit u-media-1-quad
8337                      (in  FRinti FRintieven)
8338                      (in  FRintj FRintjeven)
8339                      (out FRintk FRintkeven)))
8340         (fr500 (unit u-media-quad-arith
8341                      (in  FRinti FRintieven)
8342                      (in  FRintj FRintjeven)
8343                      (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
8344   )
8345 )
8346
8347 (media-quad-arith-sat mqaddhss add  HI 32767 -32768 OP_7B OPE1_18 "Media quad add signed with saturation")
8348 (media-quad-arith-sat mqaddhus add UHI 65535      0 OP_7B OPE1_19 "Media quad add unsigned with saturation")
8349
8350 (media-quad-arith-sat mqsubhss sub  HI 32767 -32768 OP_7B OPE1_1A "Media quad sub signed with saturation")
8351 (media-quad-arith-sat mqsubhus sub UHI 65535      0 OP_7B OPE1_1B "Media quad sub unsigned with saturation")
8352
8353 (define-pmacro (conditional-media-quad-arith-sat
8354                 name operation mode max min op ope comment)
8355   (dni name
8356        (comment)
8357        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8358         (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
8359        (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond")
8360        (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven)
8361        (media-quad-arith-sat-semantics (eq CCi (or cond 2))
8362                                        operation mode max min)
8363        ((fr400 (unit u-media-1-quad
8364                      (in  FRinti FRintieven)
8365                      (in  FRintj FRintjeven)
8366                      (out FRintk FRintkeven)))
8367         (fr450 (unit u-media-1-quad
8368                      (in  FRinti FRintieven)
8369                      (in  FRintj FRintjeven)
8370                      (out FRintk FRintkeven)))
8371         (fr500 (unit u-media-quad-arith
8372                      (in  FRinti FRintieven)
8373                      (in  FRintj FRintjeven)
8374                      (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
8375   )
8376 )
8377
8378 (conditional-media-quad-arith-sat cmqaddhss add  HI 32767 -32768 OP_73 OPE4_0 "Conditional Media quad add signed with saturation")
8379 (conditional-media-quad-arith-sat cmqaddhus add UHI 65535      0 OP_73 OPE4_1 "Conditional Media quad add unsigned with saturation")
8380
8381 (conditional-media-quad-arith-sat cmqsubhss sub  HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation")
8382 (conditional-media-quad-arith-sat cmqsubhus sub UHI 65535      0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation")
8383
8384 ;; Return A if |A| > |B| and B is positive.  Return -A if |A| > |B| and
8385 ;; B is negative, saturating 0x8000 as 0x7fff.  Return 0 otherwise.
8386 (define-pmacro (media-low-clear-semantics a b)
8387   (cond HI
8388         ((le UHI (abs a) (abs b)) 0)
8389         ((le HI 0 b) a)
8390         ((eq HI a -32768) 32767)
8391         (else (neg a))))
8392
8393 ;; Return A if -|B| < A < |B|.  Return -B if A <= -|B|, saturating 0x8000
8394 ;; as 0x7fff.  Return B if A >= |B|.
8395 (define-pmacro (media-scope-limit-semantics a b)
8396   (cond HI
8397         ((andif (gt HI b -32768)
8398                 (ge HI a (abs b))) b)
8399         ((gt HI a (neg (abs b))) a)
8400         ((eq HI b -32768) 32767)
8401         (else (neg b))))
8402
8403 (define-pmacro (media-quad-limit name operation op ope comment)
8404   (dni name
8405        comment
8406        ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2))
8407        (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven")
8408        (+ pack FRintkeven op FRintieven ope FRintjeven)
8409        (if (orif (register-unaligned FRintieven 2)
8410                  (orif (register-unaligned FRintjeven 2)
8411                        (register-unaligned FRintkeven 2)))
8412            (c-call VOID "@cpu@_media_register_not_aligned")
8413            (sequence ((HI a1) (HI a2) (HI a3) (HI a4)
8414                       (HI b1) (HI b2) (HI b3) (HI b4))
8415                      ; hack to get FRintkeven referenced as a target
8416                      ; for profiling
8417                      (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8418                      (extract-hilo FRintieven 0 FRintjeven 0 a1 a2 b1 b2)
8419                      (extract-hilo FRintieven 1 FRintjeven 1 a3 a4 b3 b4)
8420                      (set (halfword hi FRintkeven 0) (operation a1 b1))
8421                      (set (halfword lo FRintkeven 0) (operation a2 b2))
8422                      (set (halfword hi FRintkeven 1) (operation a3 b3))
8423                      (set (halfword lo FRintkeven 1) (operation a4 b4))))
8424        ((fr450 (unit u-media-1-quad
8425                      (in  FRinti FRintieven)
8426                      (in  FRintj FRintjeven)
8427                      (out FRintk FRintkeven))))
8428   )
8429 )
8430
8431 (media-quad-limit mqlclrhs media-low-clear-semantics OP_78 OPE1_10
8432                   "Media quad low clear")
8433 (media-quad-limit mqlmths media-scope-limit-semantics OP_78 OPE1_14
8434                   "Media quad scope limitation")
8435
8436 (define-pmacro (media-quad-shift name operation op ope comment)
8437   (dni name
8438        (comment)
8439        ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2))
8440        (.str name "$pack $FRintieven,$u6,$FRintkeven")
8441        (+ pack FRintkeven op FRintieven ope u6)
8442        (if (orif (register-unaligned FRintieven 2)
8443                  (register-unaligned FRintkeven 2))
8444            (c-call VOID "@cpu@_media_register_not_aligned")
8445            (sequence ()
8446                      ; hack to get these referenced for profiling
8447                      (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
8448                      (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8449                      (set (halfword hi FRintkeven 0)
8450                           (operation HI (halfword hi FRintieven 0)
8451                                         (and u6 #xf)))
8452                      (set (halfword lo FRintkeven 0)
8453                           (operation HI (halfword lo FRintieven 0)
8454                                         (and u6 #xf)))
8455                      (set (halfword hi FRintkeven 1)
8456                           (operation HI (halfword hi FRintieven 1)
8457                                         (and u6 #xf)))
8458                      (set (halfword lo FRintkeven 1)
8459                           (operation HI (halfword lo FRintieven 1)
8460                                         (and u6 #xf)))))
8461        ((fr450 (unit u-media-3-quad
8462                      (in  FRinti FRintieven)
8463                      (in  FRintj FRintieven)
8464                      (out FRintk FRintkeven))))
8465   )
8466 )
8467
8468 (media-quad-shift mqsllhi sll OP_78 OPE1_11 "Media quad left shift")
8469 (media-quad-shift mqsrahi sra OP_78 OPE1_13 "Media quad right shift")
8470
8471 (define-pmacro (media-acc-arith-sat name operation mode max min op ope comment)
8472   (dni name
8473        (comment)
8474        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8475         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
8476        (.str name "$pack $ACC40Si,$ACC40Sk")
8477        (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
8478        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8479            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8480                (if (register-unaligned ACC40Si 2)
8481                    (c-call VOID "@cpu@_media_acc_not_aligned")
8482                    (media-arith-sat-semantics operation ACC40Si
8483                                               (nextreg h-acc40S ACC40Si 1)
8484                                               ACC40Sk mode max min (msr-sie-acci)))))
8485        ((fr400 (unit u-media-2-acc)) (fr450 (unit u-media-2-acc))
8486         (fr550 (unit u-media-4-acc)))
8487   )
8488 )
8489
8490 (media-acc-arith-sat maddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
8491                      OP_78 OPE1_04 "Media accumulator addition")
8492 (media-acc-arith-sat msubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
8493                      OP_78 OPE1_05 "Media accumulator subtraction")
8494
8495 (define-pmacro (media-dual-acc-arith-sat name operation mode max min op ope
8496                                          comment)
8497   (dni name
8498        (comment)
8499        ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8500         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8501        (.str name "$pack $ACC40Si,$ACC40Sk")
8502        (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
8503        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8504            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8505                (if (register-unaligned ACC40Si 4)
8506                    (c-call VOID "@cpu@_media_acc_not_aligned")
8507                    (if (register-unaligned ACC40Sk 2)
8508                        (c-call VOID "@cpu@_media_acc_not_aligned")
8509                        (sequence ()
8510                                  (media-arith-sat-semantics operation ACC40Si
8511                                                             (nextreg h-acc40S ACC40Si 1)
8512                                                             ACC40Sk mode max min
8513                                                             (msr-sie-acci))
8514                                  (media-arith-sat-semantics operation
8515                                                             (nextreg h-acc40S ACC40Si 2)
8516                                                             (nextreg h-acc40S ACC40Si 3)
8517                                                             (nextreg h-acc40S ACC40Sk 1)
8518                                                             mode max min
8519                                                             (msr-sie-acci-1)))))))
8520        ((fr400 (unit u-media-2-acc-dual)) (fr450 (unit u-media-2-acc-dual))
8521         (fr550 (unit u-media-4-acc-dual)))
8522   )
8523 )
8524
8525 (media-dual-acc-arith-sat mdaddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
8526                           OP_78 OPE1_06 "Media accumulator addition")
8527 (media-dual-acc-arith-sat mdsubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
8528                           OP_78 OPE1_07 "Media accumulator subtraction")
8529
8530 (dni masaccs
8531      "Media add and subtract signed accumulator with saturation"
8532        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8533         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
8534        "masaccs$pack $ACC40Si,$ACC40Sk"
8535        (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null))
8536        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8537            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8538                (if (register-unaligned ACC40Si 2)
8539                    (c-call VOID "@cpu@_media_acc_not_aligned")
8540                    (if (register-unaligned ACC40Sk 2)
8541                        (c-call VOID "@cpu@_media_acc_not_aligned")
8542                        (sequence ()
8543                                  (media-arith-sat-semantics add ACC40Si
8544                                                             (nextreg h-acc40S ACC40Si 1)
8545                                                             ACC40Sk DI
8546                                                             #x7fffffffff
8547                                                             (inv DI #x7fffffffff)
8548                                                             (msr-sie-acci))
8549                                  (media-arith-sat-semantics sub ACC40Si
8550                                                             (nextreg h-acc40S ACC40Si 1)
8551                                                             (nextreg h-acc40S ACC40Sk 1)
8552                                                             DI
8553                                                             #x7fffffffff
8554                                                             (inv DI #x7fffffffff)
8555                                                             (msr-sie-acci-1)))))))
8556        ((fr400 (unit u-media-2-add-sub)) (fr450 (unit u-media-2-add-sub))
8557         (fr550 (unit u-media-4-add-sub)))
8558   )
8559
8560 (dni mdasaccs
8561      "Media add and subtract signed accumulator with saturation"
8562        ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8563         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8564        "mdasaccs$pack $ACC40Si,$ACC40Sk"
8565        (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null))
8566        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8567            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8568                (if (register-unaligned ACC40Si 4)
8569                    (c-call VOID "@cpu@_media_acc_not_aligned")
8570                    (if (register-unaligned ACC40Sk 4)
8571                        (c-call VOID "@cpu@_media_acc_not_aligned")
8572                        (sequence ()
8573                                  (media-arith-sat-semantics add ACC40Si
8574                                                             (nextreg h-acc40S ACC40Si 1)
8575                                                             ACC40Sk DI
8576                                                             #x7fffffffff
8577                                                             (inv DI #x7fffffffff)
8578                                                             (msr-sie-acci))
8579                                  (media-arith-sat-semantics sub ACC40Si
8580                                                             (nextreg h-acc40S ACC40Si 1)
8581                                                             (nextreg h-acc40S ACC40Sk 1)
8582                                                             DI
8583                                                             #x7fffffffff
8584                                                             (inv DI #x7fffffffff)
8585                                                             (msr-sie-acci-1))
8586                                  (media-arith-sat-semantics add
8587                                                             (nextreg h-acc40S ACC40Si 2)
8588                                                             (nextreg h-acc40S ACC40Si 3)
8589                                                             (nextreg h-acc40S ACC40Sk 2)
8590                                                             DI
8591                                                             #x7fffffffff
8592                                                             (inv DI #x7fffffffff)
8593                                                             (msr-sie-acci-2))
8594                                  (media-arith-sat-semantics sub
8595                                                             (nextreg h-acc40S ACC40Si 2)
8596                                                             (nextreg h-acc40S ACC40Si 3)
8597                                                             (nextreg h-acc40S ACC40Sk 3)
8598                                                             DI
8599                                                             #x7fffffffff
8600                                                             (inv DI #x7fffffffff)
8601                                                             (msr-sie-acci-3)))))))
8602        ((fr400 (unit u-media-2-add-sub-dual))
8603         (fr450 (unit u-media-2-add-sub-dual))
8604         (fr550 (unit u-media-4-add-sub-dual)))
8605   )
8606
8607 (define-pmacro (media-multiply-semantics conv arg1 arg2 res)
8608   (set res (mul DI (conv DI arg1) (conv DI arg2)))
8609 )
8610
8611 (define-pmacro (media-dual-multiply-semantics cond mode conv rhs1 rhs2)
8612   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8613       (if (register-unaligned ACC40Sk 2)
8614           (c-call VOID "@cpu@_media_acc_not_aligned")
8615           (if cond
8616               (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8617                         (extract-hilo FRinti 0 FRintj 0
8618                                       argihi argilo argjhi argjlo)
8619                         (media-multiply-semantics conv argihi rhs1 ACC40Sk)
8620                         (media-multiply-semantics conv argilo rhs2
8621                                                   (nextreg h-acc40S ACC40Sk 1))))))
8622 )
8623
8624 (define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment)
8625   (dni name
8626        (comment)
8627        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8628         (FR400-MAJOR M-1) (FR450-MAJOR M-3) PRESERVE-OVF)
8629        (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
8630        (+ pack ACC40Sk op FRinti ope FRintj)
8631        (media-dual-multiply-semantics 1 mode conv rhs1 rhs2)
8632        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8633         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8634   )
8635 )
8636
8637 (media-dual-multiply mmulhs  HI ext  argjhi argjlo OP_7B OPE1_14 "Media dual multiply signed")
8638 (media-dual-multiply mmulhu UHI zext argjhi argjlo OP_7B OPE1_15 "Media dual multiply unsigned")
8639
8640 (media-dual-multiply mmulxhs  HI ext  argjlo argjhi OP_7B OPE1_28 "Media dual cross multiply signed")
8641 (media-dual-multiply mmulxhu UHI zext argjlo argjhi OP_7B OPE1_29 "Media dual cross multiply unsigned")
8642
8643 (define-pmacro (conditional-media-dual-multiply
8644                 name mode conv rhs1 rhs2 op ope comment)
8645   (dni name
8646        (comment)
8647        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8648         (FR400-MAJOR M-1) (FR450-MAJOR M-3)
8649         PRESERVE-OVF CONDITIONAL)
8650        (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
8651        (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
8652        (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
8653        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8654         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8655   )
8656 )
8657
8658 (conditional-media-dual-multiply cmmulhs  HI ext  argjhi argjlo OP_72 OPE4_0 "Conditional Media dual multiply signed")
8659 (conditional-media-dual-multiply cmmulhu UHI zext argjhi argjlo OP_72 OPE4_1 "Conditional Media dual multiply unsigned")
8660
8661 (define-pmacro (media-quad-multiply-semantics cond mode conv rhs1 rhs2)
8662   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8663       (if (register-unaligned ACC40Sk 4)
8664           (c-call VOID "@cpu@_media_acc_not_aligned")
8665           (if (orif (register-unaligned FRintieven 2)
8666                     (register-unaligned FRintjeven 2))
8667               (c-call VOID "@cpu@_media_register_not_aligned")
8668               (if cond
8669                   (sequence ((mode argihi) (mode argilo)
8670                              (mode argjhi) (mode argjlo))
8671                             (extract-hilo FRintieven 0 FRintjeven 0
8672                                           argihi argilo argjhi argjlo)
8673                             (media-multiply-semantics conv argihi rhs1 ACC40Sk)
8674                             (media-multiply-semantics conv argilo rhs2
8675                                                       (nextreg h-acc40S ACC40Sk 1))
8676                             (extract-hilo FRintieven 1 FRintjeven 1
8677                                           argihi argilo argjhi argjlo)
8678                             (media-multiply-semantics conv argihi rhs1
8679                                                       (nextreg h-acc40S ACC40Sk 2))
8680                             (media-multiply-semantics conv argilo rhs2
8681                                                       (nextreg h-acc40S ACC40Sk 3)))))))
8682 )
8683
8684 (define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment)
8685   (dni name
8686        (comment)
8687        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8688         (FR400-MAJOR M-2) (FR450-MAJOR M-4) PRESERVE-OVF)
8689        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
8690        (+ pack ACC40Sk op FRintieven ope FRintjeven)
8691        (media-quad-multiply-semantics 1 mode conv rhs1 rhs2)
8692        ((fr400 (unit u-media-2-quad
8693                      (in  FRinti FRintieven)
8694                      (in  FRintj FRintjeven)))
8695         (fr450 (unit u-media-2-quad
8696                      (in  FRinti FRintieven)
8697                      (in  FRintj FRintjeven)))
8698         (fr500 (unit u-media-quad-mul
8699                      (in  FRinti FRintieven)
8700                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8701   )
8702 )
8703
8704 (media-quad-multiply mqmulhs  HI ext  argjhi argjlo OP_7B OPE1_1C "Media quad multiply signed")
8705 (media-quad-multiply mqmulhu UHI zext argjhi argjlo OP_7B OPE1_1D "Media quad multiply unsigned")
8706
8707 (media-quad-multiply mqmulxhs  HI ext  argjlo argjhi OP_7B OPE1_2A "Media quad cross multiply signed")
8708 (media-quad-multiply mqmulxhu UHI zext argjlo argjhi OP_7B OPE1_2B "Media quad cross multiply unsigned")
8709
8710 (define-pmacro (conditional-media-quad-multiply
8711                 name mode conv rhs1 rhs2 op ope comment)
8712   (dni name
8713        (comment)
8714        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8715         (FR400-MAJOR M-2) (FR450-MAJOR M-4)
8716         PRESERVE-OVF CONDITIONAL)
8717        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond")
8718        (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven)
8719        (media-quad-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
8720        ((fr400 (unit u-media-2-quad
8721                      (in  FRinti FRintieven)
8722                      (in  FRintj FRintjeven)))
8723         (fr450 (unit u-media-2-quad
8724                      (in  FRinti FRintieven)
8725                      (in  FRintj FRintjeven)))
8726         (fr500 (unit u-media-quad-mul
8727                      (in  FRinti FRintieven)
8728                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8729   )
8730 )
8731
8732 (conditional-media-quad-multiply cmqmulhs  HI ext  argjhi argjlo OP_74 OPE4_0 "Conditional Media quad multiply signed")
8733 (conditional-media-quad-multiply cmqmulhu UHI zext argjhi argjlo OP_74 OPE4_1 "Conditional Media quad multiply unsigned")
8734
8735 (define-pmacro (media-multiply-acc-semantics
8736                 conv arg1 addop arg2 res max min sie)
8737   (sequence ((DI tmp))
8738             (set tmp (addop res (mul DI (conv DI arg1) (conv DI arg2))))
8739             (saturate-v tmp max min sie res))
8740 )
8741
8742 (define-pmacro (media-dual-multiply-acc-semantics
8743                 cond mode conv addop rhw res max min)
8744   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8745       (if (register-unaligned res 2)
8746           (c-call VOID "@cpu@_media_acc_not_aligned")
8747           (if cond
8748               (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8749                         (extract-hilo FRinti 0 FRintj 0
8750                                       argihi argilo argjhi argjlo)
8751                         (media-multiply-acc-semantics conv argihi addop argjhi
8752                                                       res
8753                                                       max min (msr-sie-acci))
8754                         (media-multiply-acc-semantics conv argilo addop argjlo
8755                                                       (nextreg rhw res 1)
8756                                                       max min (msr-sie-acci-1))))))
8757 )
8758
8759 (define-pmacro (media-dual-multiply-acc
8760                 name mode conv addop rhw res max min op ope comment)
8761   (dni name
8762        (comment)
8763        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8764         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
8765        (.str name "$pack $FRinti,$FRintj,$" res)
8766        (+ pack res op FRinti ope FRintj)
8767        (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min)
8768        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8769         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8770   )
8771 )
8772
8773 (media-dual-multiply-acc mmachs HI ext add h-acc40S ACC40Sk
8774                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8775                          OP_7B OPE1_16
8776                          "Media dual multiply and accumulate signed")
8777
8778 (media-dual-multiply-acc mmachu UHI zext add h-acc40U ACC40Uk
8779                          (const DI #xffffffffff) (const DI 0)
8780                          OP_7B OPE1_17
8781                          "Media dual multiply and accumulate unsigned")
8782
8783 (media-dual-multiply-acc mmrdhs HI ext sub h-acc40S ACC40Sk
8784                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8785                          OP_7B OPE1_30
8786                          "Media dual multiply and reduce signed")
8787
8788 (media-dual-multiply-acc mmrdhu UHI zext sub h-acc40U ACC40Uk
8789                          (const DI #xffffffffff) (const DI 0)
8790                          OP_7B OPE1_31
8791                          "Media dual multiply and reduce unsigned")
8792
8793 (define-pmacro (conditional-media-dual-multiply-acc
8794                 name mode conv addop rhw res max min op ope comment)
8795   (dni name
8796        (comment)
8797        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8798         (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
8799        (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond")
8800        (+ pack res op FRinti CCi cond ope FRintj)
8801        (media-dual-multiply-acc-semantics (eq CCi (or cond 2))
8802                                           mode conv addop rhw res max min)
8803        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8804         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8805   )
8806 )
8807
8808 (conditional-media-dual-multiply-acc cmmachs HI ext add h-acc40S ACC40Sk
8809                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8810                          OP_72 OPE4_2
8811                          "Conditional Media dual multiply and accumulate signed")
8812
8813 (conditional-media-dual-multiply-acc cmmachu UHI zext add  h-acc40U ACC40Uk
8814                          (const DI #xffffffffff) (const DI 0)
8815                          OP_72 OPE4_3
8816                          "Conditional Media dual multiply and accumulate unsigned")
8817
8818 (define-pmacro (media-quad-multiply-acc-semantics
8819                 cond mode conv addop rhw res max min)
8820   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8821       (if (register-unaligned res 4)
8822           (c-call VOID "@cpu@_media_acc_not_aligned")
8823           (if (orif (register-unaligned FRintieven 2)
8824                     (register-unaligned FRintjeven 2))
8825               (c-call VOID "@cpu@_media_register_not_aligned")
8826               (if cond
8827                   (sequence ((mode argihi) (mode argilo)
8828                              (mode argjhi) (mode argjlo))
8829                             (extract-hilo FRintieven 0 FRintjeven 0
8830                                           argihi argilo argjhi argjlo)
8831                             (media-multiply-acc-semantics conv argihi addop argjhi
8832                                                           res
8833                                                           max min (msr-sie-acci))
8834                             (media-multiply-acc-semantics conv argilo addop argjlo
8835                                                           (nextreg rhw res 1)
8836                                                           max min (msr-sie-acci-1))
8837                             (extract-hilo FRintieven 1 FRintjeven 1
8838                                           argihi argilo argjhi argjlo)
8839                             (media-multiply-acc-semantics conv argihi addop argjhi
8840                                                           (nextreg rhw res 2)
8841                                                           max min (msr-sie-acci-2))
8842                             (media-multiply-acc-semantics conv argilo addop argjlo
8843                                                           (nextreg rhw res 3)
8844                                                           max min
8845                                                           (msr-sie-acci-3)))))))
8846 )
8847
8848 (define-pmacro (media-quad-multiply-acc
8849                 name mode conv addop rhw res max min op ope comment)
8850   (dni name
8851        (comment)
8852        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8853         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8854        (.str name "$pack $FRintieven,$FRintjeven,$" res)
8855        (+ pack res op FRintieven ope FRintjeven)
8856        (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min)
8857        ((fr400 (unit u-media-2-quad
8858                      (in  FRinti FRintieven)
8859                      (in  FRintj FRintjeven)))
8860         (fr450 (unit u-media-2-quad
8861                      (in  FRinti FRintieven)
8862                      (in  FRintj FRintjeven)))
8863         (fr500 (unit u-media-quad-mul
8864                      (in  FRinti FRintieven)
8865                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8866   )
8867 )
8868
8869 (media-quad-multiply-acc mqmachs HI ext add h-acc40S ACC40Sk
8870                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8871                          OP_7B OPE1_1E
8872                          "Media quad multiply and accumulate signed")
8873
8874 (media-quad-multiply-acc mqmachu UHI zext add h-acc40U ACC40Uk
8875                          (const DI #xffffffffff) (const DI 0)
8876                          OP_7B OPE1_1F
8877                          "Media quad multiply and accumulate unsigned")
8878
8879 (define-pmacro (conditional-media-quad-multiply-acc
8880                 name mode conv addop rhw res max min op ope comment)
8881   (dni name
8882        (comment)
8883        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8884         (FR400-MAJOR M-2) (FR450-MAJOR M-4) CONDITIONAL)
8885        (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond")
8886        (+ pack res op FRintieven CCi cond ope FRintjeven)
8887        (media-quad-multiply-acc-semantics (eq CCi (or cond 2))
8888                                           mode conv addop rhw res max min)
8889        ((fr400 (unit u-media-2-quad
8890                      (in  FRinti FRintieven)
8891                      (in  FRintj FRintjeven)))
8892         (fr450 (unit u-media-2-quad
8893                      (in  FRinti FRintieven)
8894                      (in  FRintj FRintjeven)))
8895         (fr500 (unit u-media-quad-mul
8896                      (in  FRinti FRintieven)
8897                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8898   )
8899 )
8900
8901 (conditional-media-quad-multiply-acc cmqmachs HI ext add h-acc40S ACC40Sk
8902                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8903                          OP_74 OPE4_2
8904                          "Conditional Media quad multiply and accumulate signed")
8905
8906 (conditional-media-quad-multiply-acc cmqmachu UHI zext add h-acc40U ACC40Uk
8907                          (const DI #xffffffffff) (const DI 0)
8908                          OP_74 OPE4_3
8909                          "Conditional media quad multiply and accumulate unsigned")
8910
8911 (define-pmacro (media-quad-multiply-cross-acc-semantics
8912                 cond mode conv addop rhw res max min)
8913   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8914       (if (register-unaligned res 4)
8915           (c-call VOID "@cpu@_media_acc_not_aligned")
8916           (if (orif (register-unaligned FRintieven 2)
8917                     (register-unaligned FRintjeven 2))
8918               (c-call VOID "@cpu@_media_register_not_aligned")
8919               (if cond
8920                   (sequence ((mode argihi) (mode argilo)
8921                              (mode argjhi) (mode argjlo))
8922                             (extract-hilo FRintieven 0 FRintjeven 0
8923                                           argihi argilo argjhi argjlo)
8924                             (media-multiply-acc-semantics conv argihi addop argjhi
8925                                                           (nextreg rhw res 2)
8926                                                           max min (msr-sie-acci-2))
8927                             (media-multiply-acc-semantics conv argilo addop argjlo
8928                                                           (nextreg rhw res 3)
8929                                                           max min (msr-sie-acci-3))
8930                             (extract-hilo FRintieven 1 FRintjeven 1
8931                                           argihi argilo argjhi argjlo)
8932                             (media-multiply-acc-semantics conv argihi addop argjhi
8933                                                           res
8934                                                           max min (msr-sie-acci))
8935                             (media-multiply-acc-semantics conv argilo addop argjlo
8936                                                           (nextreg rhw res 1)
8937                                                           max min
8938                                                           (msr-sie-acci-1)))))))
8939 )
8940
8941 (define-pmacro (media-quad-multiply-cross-acc
8942                 name mode conv addop rhw res max min op ope comment)
8943   (dni name
8944        (comment)
8945        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8946         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8947        (.str name "$pack $FRintieven,$FRintjeven,$" res)
8948        (+ pack res op FRintieven ope FRintjeven)
8949        (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res
8950                                                 max min)
8951        ((fr400 (unit u-media-2-quad
8952                      (in  FRinti FRintieven)
8953                      (in  FRintj FRintjeven)))
8954         (fr450 (unit u-media-2-quad
8955                      (in  FRinti FRintieven)
8956                      (in  FRintj FRintjeven)))
8957         (fr550 (unit u-media-4-quad)))
8958   )
8959 )
8960
8961 (media-quad-multiply-cross-acc mqxmachs HI ext add h-acc40S ACC40Sk
8962                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8963                          OP_78 OPE1_00
8964                          "Media quad multiply and cross accumulate signed")
8965
8966 (define-pmacro (media-quad-cross-multiply-cross-acc-semantics
8967                 cond mode conv addop rhw res max min)
8968   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8969       (if (register-unaligned res 4)
8970           (c-call VOID "@cpu@_media_acc_not_aligned")
8971           (if (orif (register-unaligned FRintieven 2)
8972                     (register-unaligned FRintjeven 2))
8973               (c-call VOID "@cpu@_media_register_not_aligned")
8974               (if cond
8975                   (sequence ((mode argihi) (mode argilo)
8976                              (mode argjhi) (mode argjlo))
8977                             (extract-hilo FRintieven 0 FRintjeven 0
8978                                           argihi argilo argjhi argjlo)
8979                             (media-multiply-acc-semantics conv argihi addop argjlo
8980                                                           (nextreg rhw res 2)
8981                                                           max min (msr-sie-acci-2))
8982                             (media-multiply-acc-semantics conv argilo addop argjhi
8983                                                           (nextreg rhw res 3)
8984                                                           max min (msr-sie-acci-3))
8985                             (extract-hilo FRintieven 1 FRintjeven 1
8986                                           argihi argilo argjhi argjlo)
8987                             (media-multiply-acc-semantics conv argihi addop argjlo
8988                                                           res
8989                                                           max min (msr-sie-acci))
8990                             (media-multiply-acc-semantics conv argilo addop argjhi
8991                                                           (nextreg rhw res 1)
8992                                                           max min
8993                                                           (msr-sie-acci-1)))))))
8994 )
8995
8996 (define-pmacro (media-quad-cross-multiply-cross-acc
8997                 name mode conv addop rhw res max min op ope comment)
8998   (dni name
8999        (comment)
9000        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
9001         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9002        (.str name "$pack $FRintieven,$FRintjeven,$" res)
9003        (+ pack res op FRintieven ope FRintjeven)
9004        (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res
9005                                                       max min)
9006        ((fr400 (unit u-media-2-quad
9007                      (in  FRinti FRintieven)
9008                      (in  FRintj FRintjeven)))
9009         (fr450 (unit u-media-2-quad
9010                      (in  FRinti FRintieven)
9011                      (in  FRintj FRintjeven)))
9012         (fr550 (unit u-media-4-quad)))
9013   )
9014 )
9015
9016 (media-quad-cross-multiply-cross-acc mqxmacxhs HI ext add h-acc40S ACC40Sk
9017                         (const DI #x7fffffffff) (const DI #xffffff8000000000)
9018                         OP_78 OPE1_01
9019                         "Media quad cross multiply and cross accumulate signed")
9020
9021 (define-pmacro (media-quad-cross-multiply-acc-semantics
9022                 cond mode conv addop rhw res max min)
9023   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
9024       (if (register-unaligned res 4)
9025           (c-call VOID "@cpu@_media_acc_not_aligned")
9026           (if (orif (register-unaligned FRintieven 2)
9027                     (register-unaligned FRintjeven 2))
9028               (c-call VOID "@cpu@_media_register_not_aligned")
9029               (if cond
9030                   (sequence ((mode argihi) (mode argilo)
9031                              (mode argjhi) (mode argjlo))
9032                             (extract-hilo FRintieven 0 FRintjeven 0
9033                                           argihi argilo argjhi argjlo)
9034                             (media-multiply-acc-semantics conv argihi addop argjlo
9035                                                           res
9036                                                           max min (msr-sie-acci))
9037                             (media-multiply-acc-semantics conv argilo addop argjhi
9038                                                           (nextreg rhw res 1)
9039                                                           max min (msr-sie-acci-1))
9040                             (extract-hilo FRintieven 1 FRintjeven 1
9041                                           argihi argilo argjhi argjlo)
9042                             (media-multiply-acc-semantics conv argihi addop argjlo
9043                                                           (nextreg rhw res 2)
9044                                                           max min (msr-sie-acci-2))
9045                             (media-multiply-acc-semantics conv argilo addop argjhi
9046                                                           (nextreg rhw res 3)
9047                                                           max min
9048                                                           (msr-sie-acci-3)))))))
9049 )
9050
9051 (define-pmacro (media-quad-cross-multiply-acc
9052                 name mode conv addop rhw res max min op ope comment)
9053   (dni name
9054        (comment)
9055        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
9056         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9057        (.str name "$pack $FRintieven,$FRintjeven,$" res)
9058        (+ pack res op FRintieven ope FRintjeven)
9059        (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res
9060                                                 max min)
9061        ((fr400 (unit u-media-2-quad
9062                      (in FRinti FRintieven)
9063                      (in FRintj FRintjeven)))
9064         (fr450 (unit u-media-2-quad
9065                      (in FRinti FRintieven)
9066                      (in FRintj FRintjeven)))
9067         (fr550 (unit u-media-4-quad)))
9068   )
9069 )
9070
9071 (media-quad-cross-multiply-acc mqmacxhs HI ext add h-acc40S ACC40Sk
9072                         (const DI #x7fffffffff) (const DI #xffffff8000000000)
9073                         OP_78 OPE1_02
9074                         "Media quad cross multiply and accumulate signed")
9075
9076 (define-pmacro (media-complex-semantics
9077                 conv lhs1 rhs1 lhs2 rhs2 res max min sie)
9078   (sequence ((DI tmp1) (DI tmp2))
9079             (media-multiply-semantics conv lhs1 rhs1 tmp1)
9080             (media-multiply-semantics conv lhs2 rhs2 tmp2)
9081             (set tmp1 (sub tmp1 tmp2))
9082             (saturate-v tmp1 max min sie res))
9083 )
9084
9085 (define-pmacro (media-complex-semantics-i
9086                 conv lhs1 rhs1 lhs2 rhs2 res max min sie)
9087   (sequence ((DI tmp1) (DI tmp2))
9088             (media-multiply-semantics conv lhs1 rhs1 tmp1)
9089             (media-multiply-semantics conv lhs2 rhs2 tmp2)
9090             (set tmp1 (add tmp1 tmp2))
9091             (saturate-v tmp1 max min sie res))
9092 )
9093
9094 (define-pmacro (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
9095   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9096       (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
9097                 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
9098                 (media-complex-semantics conv argihi rhs1 argilo rhs2 ACC40Sk
9099                                          max min (msr-sie-acci))))
9100 )
9101
9102 (define-pmacro (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
9103   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9104       (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
9105                 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
9106                 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 ACC40Sk
9107                                            max min (msr-sie-acci))))
9108 )
9109
9110 (define-pmacro (media-dual-complex
9111                 name mode conv rhs1 rhs2 max min op ope comment)
9112   (dni name
9113        (comment)
9114        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9115         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9116        (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
9117        (+ pack ACC40Sk op FRinti ope FRintj)
9118        (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
9119        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9120         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9121   )
9122 )
9123
9124 (define-pmacro (media-dual-complex-i
9125                 name mode conv rhs1 rhs2 max min op ope comment)
9126   (dni name
9127        (comment)
9128        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9129         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9130        (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
9131        (+ pack ACC40Sk op FRinti ope FRintj)
9132        (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
9133        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9134         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9135   )
9136 )
9137
9138 (media-dual-complex mcpxrs HI ext argjhi argjlo
9139                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9140                     OP_7B OPE1_20
9141                     "Media dual complex real signed with saturation")
9142
9143 (media-dual-complex mcpxru UHI zext argjhi argjlo
9144                     (const DI #xffffffffff) (const DI 0)
9145                     OP_7B OPE1_21
9146                     "Media dual complex real unsigned with saturation")
9147
9148 (media-dual-complex-i mcpxis HI ext argjlo argjhi
9149                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9150                     OP_7B OPE1_22
9151                     "Media dual complex imaginary signed with saturation")
9152
9153 (media-dual-complex-i mcpxiu UHI zext argjlo argjhi
9154                     (const DI #xffffffffff) (const DI 0)
9155                     OP_7B OPE1_23
9156                     "Media dual complex imaginary unsigned with saturation")
9157
9158 (define-pmacro (conditional-media-dual-complex
9159                 name mode conv rhs1 rhs2 max min op ope comment)
9160   (dni name
9161        (comment)
9162        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9163         (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
9164        (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
9165        (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
9166        (if (eq CCi (or cond 2))
9167            (media-dual-complex-semantics mode conv rhs1 rhs2 max min))
9168        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9169         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9170   )
9171 )
9172
9173 (define-pmacro (conditional-media-dual-complex-i
9174                 name mode conv rhs1 rhs2 max min op ope comment)
9175   (dni name
9176        (comment)
9177        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9178         (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
9179        (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
9180        (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
9181        (if (eq CCi (or cond 2))
9182            (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min))
9183        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9184         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9185   )
9186 )
9187
9188 (conditional-media-dual-complex cmcpxrs HI ext argjhi argjlo
9189                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9190                     OP_75 OPE4_0
9191                     "Conditional Media dual complex real signed with saturation")
9192
9193 (conditional-media-dual-complex cmcpxru UHI zext argjhi argjlo
9194                     (const DI #xffffffffff) (const DI 0)
9195                     OP_75 OPE4_1
9196                     "Conditional Media dual complex real unsigned with saturation")
9197
9198 (conditional-media-dual-complex-i cmcpxis HI ext argjlo argjhi
9199                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9200                     OP_75 OPE4_2
9201                     "Conditional Media dual complex imaginary signed with saturation")
9202
9203 (conditional-media-dual-complex-i cmcpxiu UHI zext argjlo argjhi
9204                     (const DI #xffffffffff) (const DI 0)
9205                     OP_75 OPE4_3
9206                     "Conditional Media dual complex imaginary unsigned with saturation")
9207
9208 (define-pmacro (media-quad-complex
9209                 name mode conv rhs1 rhs2 max min op ope comment)
9210   (dni name
9211        (comment)
9212        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9213         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9214        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
9215        (+ pack ACC40Sk op FRintieven ope FRintjeven)
9216        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9217            (if (register-unaligned ACC40Sk 2)
9218                (c-call VOID "@cpu@_media_acc_not_aligned")
9219                (if (orif (register-unaligned FRintieven 2)
9220                          (register-unaligned FRintjeven 2))
9221                    (c-call VOID "@cpu@_media_register_not_aligned")
9222                    (sequence ((mode argihi) (mode argilo)
9223                               (mode argjhi) (mode argjlo))
9224                              (extract-hilo FRintieven 0 FRintjeven 0
9225                                            argihi argilo argjhi argjlo)
9226                              (media-complex-semantics conv argihi rhs1 argilo rhs2
9227                                                       ACC40Sk
9228                                                       max min (msr-sie-acci))
9229                              (extract-hilo FRintieven 1 FRintjeven 1
9230                                            argihi argilo argjhi argjlo)
9231                              (media-complex-semantics conv argihi rhs1 argilo rhs2
9232                                                       (nextreg h-acc40S ACC40Sk 1)
9233                                                       max min (msr-sie-acci-1))))))
9234        ((fr400 (unit u-media-2-quad
9235                      (in FRinti FRintieven)
9236                      (in FRintj FRintjeven)))
9237         (fr450 (unit u-media-2-quad
9238                      (in FRinti FRintieven)
9239                      (in FRintj FRintjeven)))
9240         (fr500 (unit u-media-quad-complex
9241                      (in FRinti FRintieven)
9242                      (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9243   )
9244 )
9245
9246 (define-pmacro (media-quad-complex-i
9247                 name mode conv rhs1 rhs2 max min op ope comment)
9248   (dni name
9249        (comment)
9250        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9251         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9252        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
9253        (+ pack ACC40Sk op FRintieven ope FRintjeven)
9254        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9255            (if (register-unaligned ACC40Sk 2)
9256                (c-call VOID "@cpu@_media_acc_not_aligned")
9257                (if (orif (register-unaligned FRintieven 2)
9258                          (register-unaligned FRintjeven 2))
9259                    (c-call VOID "@cpu@_media_register_not_aligned")
9260                    (sequence ((mode argihi) (mode argilo)
9261                               (mode argjhi) (mode argjlo))
9262                              (extract-hilo FRintieven 0 FRintjeven 0
9263                                            argihi argilo argjhi argjlo)
9264                              (media-complex-semantics-i conv argihi rhs1 argilo rhs2
9265                                                         ACC40Sk
9266                                                         max min (msr-sie-acci))
9267                              (extract-hilo FRintieven 1 FRintjeven 1
9268                                            argihi argilo argjhi argjlo)
9269                              (media-complex-semantics-i conv argihi rhs1 argilo rhs2
9270                                                         (nextreg h-acc40S ACC40Sk 1)
9271                                                         max min (msr-sie-acci-1))))))
9272        ((fr400 (unit u-media-2-quad
9273                      (in FRinti FRintieven)
9274                      (in FRintj FRintjeven)))
9275         (fr450 (unit u-media-2-quad
9276                      (in FRinti FRintieven)
9277                      (in FRintj FRintjeven)))
9278         (fr500 (unit u-media-quad-complex
9279                      (in FRinti FRintieven)
9280                      (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9281   )
9282 )
9283
9284 (media-quad-complex mqcpxrs HI ext argjhi argjlo
9285                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9286                     OP_7B OPE1_24
9287                     "Media quad complex real signed with saturation")
9288
9289 (media-quad-complex mqcpxru UHI zext argjhi argjlo
9290                     (const DI #xffffffffff) (const DI 0)
9291                     OP_7B OPE1_25
9292                     "Media quad complex real unsigned with saturation")
9293
9294 (media-quad-complex-i mqcpxis HI ext argjlo argjhi
9295                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9296                     OP_7B OPE1_26
9297                     "Media quad complex imaginary signed with saturation")
9298
9299 (media-quad-complex-i mqcpxiu UHI zext argjlo argjhi
9300                     (const DI #xffffffffff) (const DI 0)
9301                     OP_7B OPE1_27
9302                     "Media quad complex imaginary unsigned with saturation")
9303
9304 (define-pmacro (media-pack src1 src2 targ offset)
9305   (sequence ()
9306             (set (halfword hi targ offset) (halfword lo src1 offset))
9307             (set (halfword lo targ offset) (halfword lo src2 offset)))
9308 )
9309
9310 (define-pmacro (media-expand-halfword-to-word-semantics cond)
9311   (if cond
9312       (sequence ((UHI tmp))
9313                 (if (and u6 1)
9314                     (set tmp (halfword lo FRinti 0))
9315                     (set tmp (halfword hi FRinti 0)))
9316                 (set (halfword hi FRintk 0) tmp)
9317                 (set (halfword lo FRintk 0) tmp)))
9318 )
9319
9320 (dni mexpdhw
9321      "Media expand halfword to word"
9322      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9323       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
9324      "mexpdhw$pack $FRinti,$u6,$FRintk"
9325      (+ pack FRintk OP_7B FRinti OPE1_32 u6)
9326      (media-expand-halfword-to-word-semantics 1)
9327      ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
9328       (fr500 (unit u-media)) (fr550 (unit u-media)))
9329 )
9330
9331 (dni cmexpdhw
9332      "Conditional media expand halfword to word"
9333      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9334       (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
9335      "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond"
9336      (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6)
9337      (media-expand-halfword-to-word-semantics (eq CCi (or cond 2)))
9338      ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
9339       (fr500 (unit u-media)) (fr550 (unit u-media)))
9340 )
9341
9342 (define-pmacro (media-expand-halfword-to-double-semantics cond)
9343   (if (register-unaligned FRintkeven 2)
9344       (c-call VOID "@cpu@_media_register_not_aligned")
9345       (if cond
9346           (sequence ((UHI tmp))
9347                     ; a hack to get FRintkeven referenced for profiling
9348                     (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9349                     (if (and u6 1)
9350                         (set tmp (halfword lo FRinti 0))
9351                         (set tmp (halfword hi FRinti 0)))
9352                     (set (halfword hi FRintkeven 0) tmp)
9353                     (set (halfword lo FRintkeven 0) tmp)
9354                     (set (halfword hi FRintkeven 1) tmp)
9355                     (set (halfword lo FRintkeven 1) tmp))))
9356 )
9357
9358 (dni mexpdhd
9359      "Media expand halfword to double"
9360      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9361       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9362      "mexpdhd$pack $FRinti,$u6,$FRintkeven"
9363      (+ pack FRintkeven OP_7B FRinti OPE1_33 u6)
9364      (media-expand-halfword-to-double-semantics 1)
9365      ((fr400 (unit u-media-dual-expand
9366                    (out FRintk FRintkeven)))
9367       (fr450 (unit u-media-dual-expand
9368                    (out FRintk FRintkeven)))
9369       (fr500 (unit u-media-dual-expand
9370                    (out FRintk FRintkeven)))
9371       (fr550 (unit u-media-dual-expand)))
9372 )
9373
9374 (dni cmexpdhd
9375      "Conditional media expand halfword to double"
9376      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9377       (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
9378      "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond"
9379      (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6)
9380      (media-expand-halfword-to-double-semantics (eq CCi (or cond 2)))
9381      ((fr400 (unit u-media-dual-expand
9382                    (out FRintk FRintkeven)))
9383       (fr450 (unit u-media-dual-expand
9384                    (out FRintk FRintkeven)))
9385       (fr500 (unit u-media-dual-expand
9386                    (out FRintk FRintkeven)))
9387       (fr550 (unit u-media-dual-expand)))
9388 )
9389
9390 (dni mpackh
9391      "Media halfword pack"
9392      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9393       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
9394      "mpackh$pack $FRinti,$FRintj,$FRintk"
9395      (+ pack FRintk OP_7B FRinti OPE1_34 FRintj)
9396      (media-pack FRinti FRintj FRintk 0)
9397      ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
9398       (fr500 (unit u-media)) (fr550 (unit u-media)))
9399 )
9400
9401 (dni mdpackh
9402      "Media dual pack"
9403      ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3)
9404       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9405      "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven"
9406      (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven)
9407      (if (orif (register-unaligned FRintieven 2)
9408                (orif (register-unaligned FRintjeven 2)
9409                      (register-unaligned FRintkeven 2)))
9410          (c-call VOID "@cpu@_media_register_not_aligned")
9411          (sequence ()
9412                    ; hack to get these referenced for profiling
9413                    (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
9414                    (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9415                    (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9416                    (media-pack FRintieven FRintjeven FRintkeven 0)
9417                    (media-pack FRintieven FRintjeven FRintkeven 1)))
9418      ((fr400 (unit u-media-3-quad
9419                    (in  FRinti FRintieven)
9420                    (in  FRintj FRintjeven)
9421                    (out FRintk FRintkeven)))
9422       (fr450 (unit u-media-3-quad
9423                    (in  FRinti FRintieven)
9424                    (in  FRintj FRintjeven)
9425                    (out FRintk FRintkeven)))
9426       (fr500 (unit u-media-quad-arith
9427                    (in  FRinti FRintieven)
9428                    (in  FRintj FRintjeven)
9429                    (out FRintk FRintkeven)))
9430       (fr550 (unit u-media-quad)))
9431 )
9432
9433 (define-pmacro (media-unpack src soff targ toff)
9434   (sequence ()
9435             (set (halfword hi targ toff) (halfword hi src soff))
9436             (set (halfword lo targ toff) (halfword hi src soff))
9437             (set (halfword hi targ (add toff 1)) (halfword lo src soff))
9438             (set (halfword lo targ (add toff 1)) (halfword lo src soff)))
9439 )
9440
9441 (dni munpackh
9442      "Media halfword unpack"
9443      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9444       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9445      "munpackh$pack $FRinti,$FRintkeven"
9446      (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null))
9447      (if (register-unaligned FRintkeven 2)
9448          (c-call VOID "@cpu@_media_register_not_aligned")
9449          (sequence ()
9450                    ; hack to get these referenced for profiling
9451                    (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
9452                    (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9453                    (media-unpack FRinti 0 FRintkeven 0)))
9454      ((fr400 (unit u-media-dual-expand
9455                    (out FRintk FRintkeven)))
9456       (fr450 (unit u-media-dual-expand
9457                    (out FRintk FRintkeven)))
9458       (fr500 (unit u-media-dual-expand
9459                    (out FRintk FRintkeven)))
9460       (fr550 (unit u-media-dual-expand)))
9461 )
9462
9463 (dni mdunpackh
9464      "Media dual unpack"
9465      ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
9466      "mdunpackh$pack $FRintieven,$FRintk"
9467      (+ pack FRintk OP_7B FRintieven OPE1_37 (FRj-null))
9468      (if (orif (register-unaligned FRintieven 2) (register-unaligned FRintk 4))
9469          (c-call VOID "@cpu@_media_register_not_aligned")
9470          (sequence ()
9471                    ; hack to get these referenced for profiling
9472                    (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
9473                    (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9474                    (media-unpack FRintieven 0 FRintk 0)
9475                    (media-unpack FRintieven 1 FRintk 2)))
9476      ((fr500 (unit u-media-dual-unpack
9477                    (in FRinti FRintieven))))
9478 )
9479
9480 (define-pmacro (ubyte num arg offset)
9481   (reg (.sym h-fr_ num) (add (index-of arg) offset)))
9482
9483 (define-pmacro (mbtoh-semantics cond)
9484   (if (register-unaligned FRintkeven 2)
9485       (c-call VOID "@cpu@_media_register_not_aligned")
9486       (if cond
9487           (sequence ()
9488                     (set (halfword hi FRintkeven 0) (ubyte 3 FRintj 0))
9489                     (set (halfword lo FRintkeven 0) (ubyte 2 FRintj 0))
9490                     (set (halfword hi FRintkeven 1) (ubyte 1 FRintj 0))
9491                     (set (halfword lo FRintkeven 1) (ubyte 0 FRintj 0)))))
9492 )
9493
9494 (dni mbtoh
9495      "Media convert byte to halfword"
9496      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9497       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9498      "mbtoh$pack $FRintj,$FRintkeven"
9499      (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj)
9500      (sequence ()
9501                ; hack to get these referenced for profiling
9502                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9503                (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9504                (mbtoh-semantics 1))
9505      ((fr400 (unit u-media-dual-expand
9506                    (out FRintk FRintkeven)))
9507       (fr450 (unit u-media-dual-expand
9508                    (out FRintk FRintkeven)))
9509       (fr500 (unit u-media-dual-btoh
9510                    (out FRintk FRintkeven)))
9511       (fr550 (unit u-media-dual-expand)))
9512 )
9513
9514 (dni cmbtoh
9515      "Conditional media convert byte to halfword"
9516      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9517       (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
9518      "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond"
9519      (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj)
9520      (sequence ()
9521                ; hack to get these referenced for profiling
9522                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9523                (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9524                (mbtoh-semantics (eq CCi (or cond 2))))
9525      ((fr400 (unit u-media-dual-expand
9526                    (out FRintk FRintkeven)))
9527       (fr450 (unit u-media-dual-expand
9528                    (out FRintk FRintkeven)))
9529       (fr500 (unit u-media-dual-btoh
9530                    (out FRintk FRintkeven)))
9531       (fr550 (unit u-media-dual-expand
9532                    (in FRinti FRintj))))
9533 )
9534
9535 (define-pmacro (mhtob-semantics cond)
9536   (if (register-unaligned FRintjeven 2)
9537       (c-call VOID "@cpu@_media_register_not_aligned")
9538       (if cond
9539           (sequence ()
9540                     (set (ubyte 3 FRintk 0) (halfword hi FRintjeven 0))
9541                     (set (ubyte 2 FRintk 0) (halfword lo FRintjeven 0))
9542                     (set (ubyte 1 FRintk 0) (halfword hi FRintjeven 1))
9543                     (set (ubyte 0 FRintk 0) (halfword lo FRintjeven 1)))))
9544 )
9545
9546 (dni mhtob
9547      "Media convert halfword to byte"
9548      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9549       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9550      "mhtob$pack $FRintjeven,$FRintk"
9551      (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven)
9552      (sequence ()
9553                ; hack to get these referenced for profiling
9554                (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9555                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9556                (mhtob-semantics 1))
9557      ((fr400 (unit u-media-dual-htob
9558                    (in FRintj FRintjeven)))
9559       (fr450 (unit u-media-dual-htob
9560                    (in FRintj FRintjeven)))
9561       (fr500 (unit u-media-dual-htob
9562                    (in FRintj FRintjeven)))
9563       (fr550 (unit u-media-3-dual
9564                    (in FRinti FRintjeven))))
9565 )
9566
9567 (dni cmhtob
9568      "Conditional media convert halfword to byte"
9569      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9570       (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
9571      "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond"
9572      (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven)
9573      (sequence ()
9574                ; hack to get these referenced for profiling
9575                (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9576                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9577                (mhtob-semantics (eq CCi (or cond 2))))
9578      ((fr400 (unit u-media-dual-htob
9579                    (in FRintj FRintjeven)))
9580       (fr450 (unit u-media-dual-htob
9581                    (in FRintj FRintjeven)))
9582       (fr500 (unit u-media-dual-htob
9583                    (in FRintj FRintjeven)))
9584       (fr550 (unit u-media-3-dual
9585                    (in FRinti FRintjeven))))
9586 )
9587
9588 (define-pmacro (mbtohe-semantics cond)
9589   (if (register-unaligned FRintk 4)
9590       (c-call VOID "@cpu@_media_register_not_aligned")
9591       (if cond
9592           (sequence ()
9593                     (set (halfword hi FRintk 0) (ubyte 3 FRintj 0))
9594                     (set (halfword lo FRintk 0) (ubyte 3 FRintj 0))
9595                     (set (halfword hi FRintk 1) (ubyte 2 FRintj 0))
9596                     (set (halfword lo FRintk 1) (ubyte 2 FRintj 0))
9597                     (set (halfword hi FRintk 2) (ubyte 1 FRintj 0))
9598                     (set (halfword lo FRintk 2) (ubyte 1 FRintj 0))
9599                     (set (halfword hi FRintk 3) (ubyte 0 FRintj 0))
9600                     (set (halfword lo FRintk 3) (ubyte 0 FRintj 0)))))
9601 )
9602
9603 (dni mbtohe
9604      "Media convert byte to halfword extended"
9605      ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
9606      "mbtohe$pack $FRintj,$FRintk"
9607      (+ pack FRintk OP_7B (FRi-null) OPE1_3A FRintj)
9608      (sequence ()
9609                ; hack to get these referenced for profiling
9610                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9611                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9612                (mbtohe-semantics 1))
9613      ((fr500 (unit u-media-dual-btohe)))
9614 )
9615
9616 (dni cmbtohe
9617      "Conditional media convert byte to halfword extended"
9618      ((UNIT FM01) (FR500-MAJOR M-7) CONDITIONAL (MACH simple,tomcat,frv))
9619      "cmbtohe$pack $FRintj,$FRintk,$CCi,$cond"
9620      (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_2 FRintj)
9621      (sequence ()
9622                ; hack to get these referenced for profiling
9623                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9624                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9625                (mbtohe-semantics (eq CCi (or cond 2))))
9626      ((fr500 (unit u-media-dual-btohe)))
9627 )
9628
9629 ; Media NOP
9630 ; A special case of mclracc
9631 (dni mnop "Media nop"
9632      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1)
9633       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
9634      "mnop$pack"
9635      (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
9636      (nop)
9637      ()
9638 )
9639
9640 ; mclracc with #A==0
9641 (dni mclracc-0
9642      "Media clear accumulator(s)"
9643      ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
9644       (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9645      "mclracc$pack $ACC40Sk,$A0"
9646      (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null))
9647      (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0)
9648      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
9649       (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
9650 )
9651
9652 ; mclracc with #A==1
9653 (dni mclracc-1
9654      "Media clear accumulator(s)"
9655      ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3)
9656       (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9657      "mclracc$pack $ACC40Sk,$A1"
9658      (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
9659      (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1)
9660      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4-mclracca))
9661       (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
9662 )
9663
9664 (dni mrdacc
9665      "Media read accumulator"
9666      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9667       (FR400-MAJOR M-1) (FR450-MAJOR M-5))
9668      "mrdacc$pack $ACC40Si,$FRintk"
9669      (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null))
9670      (set FRintk ACC40Si)
9671      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
9672       (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
9673 )
9674
9675 (dni mrdaccg
9676      "Media read accumulator guard"
9677      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9678       (FR400-MAJOR M-1) (FR450-MAJOR M-5))
9679      "mrdaccg$pack $ACCGi,$FRintk"
9680      (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null))
9681      (set FRintk ACCGi)
9682      ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg))
9683       (fr500 (unit u-media)) (fr550 (unit u-media-3-acc (in ACC40Si ACCGi))))
9684 )
9685
9686 (dni mwtacc
9687      "Media write accumulator"
9688      ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
9689       (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9690      "mwtacc$pack $FRinti,$ACC40Sk"
9691      (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null))
9692      (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000))
9693                      FRinti))
9694      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
9695       (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc)))
9696 )
9697
9698 (dni mwtaccg
9699      "Media write accumulator guard"
9700      ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
9701       (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9702      "mwtaccg$pack $FRinti,$ACCGk"
9703      (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null))
9704      (sequence ()
9705                ; hack to get these referenced for profiling
9706                (c-raw-call VOID "frv_ref_SI" ACCGk)
9707                (set ACCGk FRinti))
9708      ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg))
9709       (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc (in ACC40Sk ACCGk))))
9710 )
9711
9712 (define-pmacro (media-cop num op)
9713   (dni (.sym mcop num)
9714        "Media custom instruction"
9715        ((UNIT FM01) (FR500-MAJOR M-1) (MACH frv))
9716        (.str "mcop" num "$pack $FRi,$FRj,$FRk")
9717        (+ pack FRk op FRi OPE1_00 FRj)
9718        (c-call VOID "@cpu@_media_cop" num)
9719        ()
9720   )
9721 )
9722
9723 (media-cop 1 OP_7C)
9724 (media-cop 2 OP_7D)
9725
9726 ; nop
9727 ; A nop is defined to be a "ori gr0,0,gr0"
9728 ; This needn't be a macro-insn, but making it one greatly simplifies decode.c
9729 ; On the other hand spending a little time in the decoder is often worth it.
9730 ;
9731 (dnmi nop "nop"
9732      ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9733      "nop$pack"
9734      (emit ori pack (GRi 0) (s12 0) (GRk 0))
9735 )
9736
9737 ; Floating point NOP
9738 (dni fnop
9739      "Floating point nop"
9740      ((UNIT FMALL) (FR500-MAJOR F-8) (FR550-MAJOR F-1) (MACH simple,tomcat,fr500,fr550,frv))
9741      "fnop$pack"
9742      (+ pack (rd-null) OP_79 (FRi-null) OPE1_0D (FRj-null))
9743      (nop)
9744      ()
9745 )
9746
9747 ; A return instruction
9748 (dnmi ret "return"
9749       (NO-DIS (UNIT B01) (FR500-MAJOR B-3)
9750               (FR400-MAJOR B-3) (FR450-MAJOR B-3))
9751       "ret$pack"
9752       (emit bralr pack (hint_taken 2))
9753 )
9754
9755 (dnmi cmp "compare"
9756       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9757               (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9758       "cmp$pack $GRi,$GRj,$ICCi_1"
9759       (emit subcc pack GRi GRj (GRk 0) ICCi_1)
9760 )
9761
9762 (dnmi cmpi "compare immediate"
9763       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9764               (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9765       "cmpi$pack $GRi,$s10,$ICCi_1"
9766       (emit subicc pack GRi s10 (GRk 0) ICCi_1)
9767 )
9768
9769 (dnmi ccmp "conditional compare"
9770       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9771               (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
9772       "ccmp$pack $GRi,$GRj,$CCi,$cond"
9773       (emit csubcc pack GRi GRj (GRk 0) CCi cond)
9774 )
9775
9776 (dnmi mov "move"
9777       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9778               (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9779       "mov$pack $GRi,$GRk"
9780       (emit ori pack GRi (s12 0) GRk)
9781 )
9782
9783 (dnmi cmov "conditional move"
9784       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9785               (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
9786       "cmov$pack $GRi,$GRk,$CCi,$cond"
9787       (emit cor pack GRi (GRj 0) GRk CCi cond)
9788 )