cpu/frv.cpu

   1 ; Fujitsu FRV opcode support, for GNU Binutils.  -*- Scheme -*-
   2 ;
   3 ; Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc.
   4 ;
   5 ; Contributed by Red Hat Inc; developed under contract from Fujitsu.
   6 ;
   7 ; This file is part of the GNU Binutils.
   8 ;
   9 ; This program is free software; you can redistribute it and/or modify
  10 ; it under the terms of the GNU General Public License as published by
  11 ; the Free Software Foundation; either version 2 of the License, or
  12 ; (at your option) any later version.
  13 ;
  14 ; This program is distributed in the hope that it will be useful,
  15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 ; GNU General Public License for more details.
  18 ;
  19 ; You should have received a copy of the GNU General Public License
  20 ; along with this program; if not, write to the Free Software
  21 ; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 (include "simplify.inc")
  24
  25 ; define-arch must appear first
  26
  27 (define-arch
  28   (name frv) ; name of cpu architecture
  29   (comment "Fujitsu FRV")
  30   (insn-lsb0? #t)
  31   (machs frv fr550 fr500 fr450 fr400 tomcat simple)
  32   (isas frv)
  33 )
  34
  35 (define-isa
  36   (name frv)
  37   (base-insn-bitsize 32)
  38   ; Initial bitnumbers to decode insns by.
  39   (decode-assist (24 23 22 21 20 19 18))
  40   (liw-insns 1)       ; The frv fetches  up to 1 insns at a time.
  41   (parallel-insns 8)  ; The frv executes up to 8 insns at a time.
  42 )
  43
  44 ; Cpu family definitions.
  45 ;
  46 (define-cpu
  47   ; cpu names must be distinct from the architecture name and machine names.
  48   ; The "b" suffix stands for "base" and is the convention.
  49   ; The "f" suffix stands for "family" and is the convention.
  50   (name frvbf)
  51   (comment "Fujitsu FRV base family")
  52   (endian big)
  53   (word-bitsize 32)
  54 )
  55 \f
  56 ; Generic FR-V machine. Supports the entire architecture
  57 (define-mach
  58   (name frv)
  59   (comment "Generic FRV cpu")
  60   (cpu frvbf)
  61 )
  62 (define-model
  63   (name frv) (comment "Generic FRV model") (attrs)
  64   (mach frv)
  65
  66   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
  67
  68   ; `state' is a list of variables for recording model state
  69   ; (state)
  70
  71   (unit u-exec "Execution Unit" ()
  72         1 1 ; issue done
  73         () ; state
  74         () ; inputs
  75         () ; outputs
  76         () ; profile action (default)
  77         )
  78 )
  79 \f
  80 ; FR550 machine
  81 (define-mach
  82   (name fr550)
  83   (comment "FR550 cpu")
  84   (cpu frvbf)
  85 )
  86 (define-model
  87   (name fr550) (comment "FR550 model") (attrs)
  88   (mach fr550)
  89
  90   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
  91
  92   ; `state' is a list of variables for recording model state
  93   (state
  94    ; State items
  95    ; These are all masks with each bit representing one register.
  96    (prev-fr-load      DI) ; Previous use of FR  register was target of a load
  97    (prev-fr-complex-1 DI) ; Previous use of FR  register has variable latency
  98    (prev-fr-complex-2 DI) ; Previous use of FR  register has variable latency
  99    (prev-ccr-complex  DI) ; Previous use of CCR register has variable latency
 100    (prev-acc-mmac     DI) ; Previous use of ACC register was a MMAC category
 101    (cur-fr-load       DI) ; Current  use of FR  register was target of a load
 102    (cur-fr-complex-1  DI) ; Current  use of FR  register has variable latency
 103    (cur-fr-complex-2  DI) ; Current  use of FR  register has variable latency
 104    (cur-ccr-complex   SI) ; Current  use of CCR register has variable latency
 105    (cur-acc-mmac      DI) ; Current  use of ACC register was a MMAC category
 106   )
 107   ; Basic unit for instructions with no latency penalties
 108   (unit u-exec "Execution Unit" ()
 109         1 1 ; issue done
 110         () ; state
 111         () ; inputs
 112         () ; outputs
 113         () ; profile action (default)
 114         )
 115   ; Basic integer insn unit
 116   (unit u-integer "Integer Unit" ()
 117         1 1 ; issue done
 118         () ; state
 119         ((GRi INT -1) (GRj INT -1)) ; inputs
 120         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 121         () ; profile action (default)
 122         )
 123   ; Integer multiplication unit
 124   (unit u-imul "Integer Multiplication Unit" ()
 125         1 1 ; issue done
 126         () ; state
 127         ((GRi INT -1) (GRj INT -1)) ; inputs
 128         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
 129         () ; profile action (default)
 130         )
 131   ; Integer division unit
 132   (unit u-idiv "Integer Division Unit" ()
 133         1 1 ; issue done
 134         () ; state
 135         ((GRi INT -1) (GRj INT -1)) ; inputs
 136         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 137         () ; profile action (default)
 138         )
 139   ; Branch unit
 140   (unit u-branch "Branch Unit" ()
 141         1 1 ; issue done
 142         () ; state
 143         ((GRi INT -1) (GRj INT -1)
 144          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 145         ((pc)) ; outputs
 146         () ; profile action (default)
 147         )
 148   ; Trap unit
 149   (unit u-trap "Trap Unit" ()
 150         1 1 ; issue done
 151         () ; state
 152         ((GRi INT -1) (GRj INT -1)
 153          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 154         () ; outputs
 155         () ; profile action (default)
 156         )
 157   ; Condition code check unit
 158   (unit u-check "Check Unit" ()
 159         1 1 ; issue done
 160         () ; state
 161         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
 162         () ; outputs
 163         () ; profile action (default)
 164         )
 165   ; Float Arithmetic unit
 166   (unit u-float-arith "Float Arithmetic unit" ()
 167         1 1 ; issue done
 168         () ; state
 169         ((FRi INT -1) (FRj INT -1) ; inputs
 170          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 171         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 172         () ; profile action (default)
 173         )
 174   ; Float Dual Arithmetic unit
 175   (unit u-float-dual-arith "Float Arithmetic unit" ()
 176         ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
 177         1 3 ; issue done
 178         () ; state
 179         ((FRi INT -1) (FRj INT -1) ; inputs
 180          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 181         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 182         () ; profile action (default)
 183         )
 184   ; Float Div unit
 185   (unit u-float-div "Float Div unit" ()
 186         1 1 ; issue done
 187         () ; state
 188         ((FRi INT -1) (FRj INT -1)) ; inputs
 189         ((FRk INT -1)) ; outputs
 190         () ; profile action (default)
 191         )
 192   ; Float Square Root unit
 193   (unit u-float-sqrt "Float Square Root unit" ()
 194         1 1 ; issue done
 195         () ; state
 196         ((FRj INT -1) (FRdoublej INT -1)) ; inputs
 197         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 198         () ; profile action (default)
 199         )
 200   ; Float Compare unit
 201   (unit u-float-compare "Float Compare unit" ()
 202         1 1 ; issue done
 203         () ; state
 204         ((FRi INT -1) (FRj INT -1)
 205          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 206         ((FCCi_2 INT -1)) ; outputs
 207         () ; profile action (default)
 208         )
 209   ; Dual Float Compare unit
 210   (unit u-float-dual-compare "Float Dual Compare unit" ()
 211         ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
 212         1 3 ; issue done
 213         () ; state
 214         ((FRi INT -1) (FRj INT -1)) ; inputs
 215         ((FCCi_2 INT -1)) ; outputs
 216         () ; profile action (default)
 217         )
 218   ; FR Move to GR unit
 219   (unit u-fr2gr "FR Move to GR Unit" ()
 220         1 1 ; issue done
 221         () ; state
 222         ((FRintk INT -1)) ; inputs
 223         ((GRj INT -1)) ; outputs
 224         () ; profile action (default)
 225         )
 226   ; GR Move to FR unit
 227   (unit u-gr2fr "GR Move to FR Unit" ()
 228         1 1 ; issue done
 229         () ; state
 230         ((GRj INT -1)) ; inputs
 231         ((FRintk INT -1)) ; outputs
 232         () ; profile action (default)
 233         )
 234   ; SPR Move to GR unit
 235   (unit u-spr2gr "SPR Move to GR Unit" ()
 236         1 1 ; issue done
 237         () ; state
 238         ((spr INT -1)) ; inputs
 239         ((GRj INT -1)) ; outputs
 240         () ; profile action (default)
 241         )
 242   ; GR Move to SPR unit
 243   (unit u-gr2spr "GR Move to SPR Unit" ()
 244         1 1 ; issue done
 245         () ; state
 246         ((GRj INT -1)) ; inputs
 247         ((spr INT -1)) ; outputs
 248         () ; profile action (default)
 249         )
 250   ; GR set half unit
 251   (unit u-set-hilo "GR Set Half" ()
 252         1 1 ; issue done
 253         () ; state
 254         () ; inputs
 255         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
 256         () ; profile action (default)
 257         )
 258   ; GR load unit
 259   (unit u-gr-load "GR Load Unit" ()
 260         1 1 ; issue done
 261         () ; state
 262         ((GRi INT -1) (GRj INT -1)) ; inputs
 263         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
 264         () ; profile action (default)
 265         )
 266   ; GR store unit
 267   (unit u-gr-store "GR Store Unit" ()
 268         1 1 ; issue done
 269         () ; state
 270         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
 271         () ; outputs
 272         () ; profile action (default)
 273         )
 274   ; FR load unit
 275   (unit u-fr-load "FR Load Unit" ()
 276         1 1 ; issue done
 277         () ; state
 278         ((GRi INT -1) (GRj INT -1)) ; inputs
 279         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
 280         () ; profile action (default)
 281         )
 282   ; FR store unit
 283   (unit u-fr-store "FR Store Unit" ()
 284         1 1 ; issue done
 285         () ; state
 286         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
 287         () ; outputs
 288         () ; profile action (default)
 289         )
 290   ; Swap unit
 291   (unit u-swap "Swap Unit" ()
 292         1 1 ; issue done
 293         () ; state
 294         ((GRi INT -1) (GRj INT -1)) ; inputs
 295         ((GRk INT -1)) ; outputs
 296         () ; profile action (default)
 297         )
 298   ; FR Move to FR unit
 299   (unit u-fr2fr "FR Move to FR Unit" ()
 300         1 1 ; issue done
 301         () ; state
 302         ((FRi INT -1)) ; inputs
 303         ((FRk INT -1)) ; outputs
 304         () ; profile action (default)
 305         )
 306   ; Clrgr unit
 307   (unit u-clrgr "Clrgr Unit" ()
 308         1 1 ; issue done
 309         () ; state
 310         ((GRk INT -1)) ; inputs
 311         () ; outputs
 312         () ; profile action (default)
 313         )
 314   ; Clrfr unit
 315   (unit u-clrfr "Clrfr Unit" ()
 316         1 1 ; issue done
 317         () ; state
 318         ((FRk INT -1)) ; inputs
 319         () ; outputs
 320         () ; profile action (default)
 321         )
 322   ; Insn cache invalidate unit
 323   (unit u-ici "Insn cache invalidate unit" ()
 324         1 1 ; issue done
 325         () ; state
 326         ((GRi INT -1) (GRj INT -1)) ; inputs
 327         () ; outputs
 328         () ; profile action (default)
 329         )
 330   ; Data cache invalidate unit
 331   (unit u-dci "Data cache invalidate unit" ()
 332         1 1 ; issue done
 333         () ; state
 334         ((GRi INT -1) (GRj INT -1)) ; inputs
 335         () ; outputs
 336         () ; profile action (default)
 337         )
 338   ; Data cache flush unit
 339   (unit u-dcf "Data cache flush unit" ()
 340         1 1 ; issue done
 341         () ; state
 342         ((GRi INT -1) (GRj INT -1)) ; inputs
 343         () ; outputs
 344         () ; profile action (default)
 345         )
 346   ; Insn cache preload unit
 347   (unit u-icpl "Insn cache preload unit" ()
 348         1 1 ; issue done
 349         () ; state
 350         ((GRi INT -1) (GRj INT -1)) ; inputs
 351         () ; outputs
 352         () ; profile action (default)
 353         )
 354   ; Data cache preload unit
 355   (unit u-dcpl "Data cache preload unit" ()
 356         1 1 ; issue done
 357         () ; state
 358         ((GRi INT -1) (GRj INT -1)) ; inputs
 359         () ; outputs
 360         () ; profile action (default)
 361         )
 362   ; Insn cache unlock unit
 363   (unit u-icul "Insn cache unlock unit" ()
 364         1 1 ; issue done
 365         () ; state
 366         ((GRi INT -1) (GRj INT -1)) ; inputs
 367         () ; outputs
 368         () ; profile action (default)
 369         )
 370   ; Data cache unlock unit
 371   (unit u-dcul "Data cache unlock unit" ()
 372         1 1 ; issue done
 373         () ; state
 374         ((GRi INT -1) (GRj INT -1)) ; inputs
 375         () ; outputs
 376         () ; profile action (default)
 377         )
 378   ; commit unit
 379   (unit u-commit "Commit Unit" ()
 380         1 1 ; issue done
 381         () ; state
 382         ((GRk INT -1) (FRk INT -1)) ; inputs
 383         () ; outputs
 384         () ; profile action (default)
 385         )
 386   ; Float Conversion unit
 387   (unit u-float-convert "Float Conversion unit" ()
 388         1 1 ; issue done
 389         () ; state
 390         ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
 391         ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
 392         () ; profile action (default)
 393         )
 394   ; Media units
 395   (unit u-media "Media unit" ()
 396         1 1 ; issue done
 397         () ; state
 398         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 399         ((FRintk INT -1)) ; outputs
 400         () ; profile action (default)
 401         )
 402   (unit u-media-quad "Media-quad unit" ()
 403         1 1 ; issue done
 404         () ; state
 405         ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
 406         ((FRintkeven INT -1)) ; outputs
 407         () ; profile action (default)
 408         )
 409   (unit u-media-dual-expand "Media Dual Expand unit" ()
 410         1 1 ; issue done
 411         () ; state
 412         ((FRinti INT -1)) ; inputs
 413         ((FRintkeven INT -1)) ; outputs
 414         () ; profile action (default)
 415         )
 416   (unit u-media-3-dual "Media-3-dual unit" ()
 417         1 1 ; issue done
 418         () ; state
 419         ((FRinti INT -1)) ; inputs
 420         ((FRintk INT -1)) ; outputs
 421         () ; profile action (default)
 422         )
 423   (unit u-media-3-acc "Media unit for M-3 using ACC" ()
 424         1 1 ; issue done
 425         () ; state
 426         ((FRintj INT -1) (ACC40Si INT -1)) ; inputs
 427         ((FRintk INT -1)) ; outputs
 428         () ; profile action (default)
 429         )
 430   (unit u-media-3-acc-dual "Media-3-acc-dual unit" ()
 431         1 1 ; issue done
 432         () ; state
 433         ((ACC40Si INT -1)) ; inputs
 434         ((FRintkeven INT -1)) ; outputs
 435         () ; profile action (default)
 436         )
 437   (unit u-media-3-wtacc "Media-3-wtacc unit" ()
 438         1 1 ; issue done
 439         () ; state
 440         ((FRinti INT -1) (ACC40Sk INT -1)) ; inputs
 441         () ; outputs
 442         () ; profile action (default)
 443         )
 444   (unit u-media-3-mclracc "Media-3-mclracc unit" ()
 445         1 1 ; issue done
 446         () ; state
 447         () ; inputs
 448         () ; outputs
 449         () ; profile action (default)
 450         )
 451   (unit u-media-set "Media set" ()
 452         1 1 ; issue done
 453         () ; state
 454         () ; inputs
 455         ((FRintk INT -1)) ; outputs
 456         () ; profile action (default)
 457         )
 458   (unit u-media-4 "Media-4 unit" ()
 459         1 1 ; issue done
 460         () ; state
 461         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 462         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 463         () ; profile action (default)
 464         )
 465   (unit u-media-4-acc "Media-4-acc unit" ()
 466         1 1 ; issue done
 467         () ; state
 468         ((ACC40Si INT -1)) ; inputs
 469         ((ACC40Sk INT -1)) ; outputs
 470         () ; profile action (default)
 471         )
 472   (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
 473         1 1 ; issue done
 474         () ; state
 475         ((ACC40Si INT -1)) ; inputs
 476         ((ACC40Sk INT -1)) ; outputs
 477         () ; profile action (default)
 478         )
 479   (unit u-media-4-add-sub "Media-4-add-sub unit" ()
 480         1 1 ; issue done
 481         () ; state
 482         ((ACC40Si INT -1)) ; inputs
 483         ((ACC40Sk INT -1)) ; outputs
 484         () ; profile action (default)
 485         )
 486   (unit u-media-4-add-sub-dual "Media-4-add-sub-dual unit" ()
 487         1 1 ; issue done
 488         () ; state
 489         ((ACC40Si INT -1)) ; inputs
 490         ((ACC40Sk INT -1)) ; outputs
 491         () ; profile action (default)
 492         )
 493   (unit u-media-4-quad "Media-4-quad unit" ()
 494         1 1 ; issue done
 495         () ; state
 496         ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
 497         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 498         () ; profile action (default)
 499         )
 500 )
 501
 502 ; FR500 machine.
 503 (define-mach
 504   (name fr500)
 505   (comment "FR500 cpu")
 506   (cpu frvbf)
 507 )
 508 (define-model
 509   (name fr500) (comment "FR500 model") (attrs)
 510   (mach fr500)
 511
 512   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
 513
 514   ; `state' is a list of variables for recording model state
 515   (state
 516    ; State items
 517    ; These are all masks with each bit representing one register.
 518    (prev-fpop       DI) ; Previous use of FR register was floating point insn
 519    (prev-media      DI) ; Previous use of FR register was a media insn
 520    (prev-cc-complex DI) ; Previous use of ICC register was not simple
 521    (cur-fpop        DI) ; Current use of FR register was floating point insn
 522    (cur-media       DI) ; Current use of FR register was a media insn
 523    (cur-cc-complex  DI) ; Current use of ICC register was not simple
 524   )
 525   ; Basic unit for instructions with no latency penalties
 526   (unit u-exec "Execution Unit" ()
 527         1 1 ; issue done
 528         () ; state
 529         () ; inputs
 530         () ; outputs
 531         () ; profile action (default)
 532         )
 533   ; Basic integer insn unit
 534   (unit u-integer "Integer Unit" ()
 535         1 1 ; issue done
 536         () ; state
 537         ((GRi INT -1) (GRj INT -1)) ; inputs
 538         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 539         () ; profile action (default)
 540         )
 541   ; Integer multiplication unit
 542   (unit u-imul "Integer Multiplication Unit" ()
 543         1 1 ; issue done
 544         () ; state
 545         ((GRi INT -1) (GRj INT -1)) ; inputs
 546         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
 547         () ; profile action (default)
 548         )
 549   ; Integer division unit
 550   (unit u-idiv "Integer Division Unit" ()
 551         1 1 ; issue done
 552         () ; state
 553         ((GRi INT -1) (GRj INT -1)) ; inputs
 554         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
 555         () ; profile action (default)
 556         )
 557   ; Branch unit
 558   (unit u-branch "Branch Unit" ()
 559         1 1 ; issue done
 560         () ; state
 561         ((GRi INT -1) (GRj INT -1)
 562          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 563         ((pc)) ; outputs
 564         () ; profile action (default)
 565         )
 566   ; Trap unit
 567   (unit u-trap "Trap Unit" ()
 568         1 1 ; issue done
 569         () ; state
 570         ((GRi INT -1) (GRj INT -1)
 571          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
 572         () ; outputs
 573         () ; profile action (default)
 574         )
 575   ; Condition code check unit
 576   (unit u-check "Check Unit" ()
 577         1 1 ; issue done
 578         () ; state
 579         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
 580         () ; outputs
 581         () ; profile action (default)
 582         )
 583   ; Clrgr unit
 584   (unit u-clrgr "Clrgr Unit" ()
 585         1 1 ; issue done
 586         () ; state
 587         ((GRk INT -1)) ; inputs
 588         () ; outputs
 589         () ; profile action (default)
 590         )
 591   ; Clrfr unit
 592   (unit u-clrfr "Clrfr Unit" ()
 593         1 1 ; issue done
 594         () ; state
 595         ((FRk INT -1)) ; inputs
 596         () ; outputs
 597         () ; profile action (default)
 598         )
 599   ; GR set half unit
 600   (unit u-set-hilo "GR Set Half" ()
 601         1 1 ; issue done
 602         () ; state
 603         () ; inputs
 604         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
 605         () ; profile action (default)
 606         )
 607   ; GR load unit -- TODO doesn't handle quad
 608   (unit u-gr-load "GR Load Unit" ()
 609         1 1 ; issue done
 610         () ; state
 611         ((GRi INT -1) (GRj INT -1)) ; inputs
 612         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
 613         () ; profile action (default)
 614         )
 615   ; GR store unit -- TODO doesn't handle quad
 616   (unit u-gr-store "GR Store Unit" ()
 617         1 1 ; issue done
 618         () ; state
 619         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
 620         () ; outputs
 621         () ; profile action (default)
 622         )
 623   ; GR recovering store unit -- TODO doesn't handle quad
 624   (unit u-gr-r-store "GR Recovering Store Unit" ()
 625         1 1 ; issue done
 626         () ; state
 627         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
 628         () ; outputs
 629         () ; profile action (default)
 630         )
 631   ; FR load unit -- TODO doesn't handle quad
 632   (unit u-fr-load "FR Load Unit" ()
 633         1 1 ; issue done
 634         () ; state
 635         ((GRi INT -1) (GRj INT -1)) ; inputs
 636         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
 637         () ; profile action (default)
 638         )
 639   ; FR store unit -- TODO doesn't handle quad
 640   (unit u-fr-store "FR Store Unit" ()
 641         1 1 ; issue done
 642         () ; state
 643         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
 644         () ; outputs
 645         () ; profile action (default)
 646         )
 647   ; FR recovering store unit -- TODO doesn't handle quad
 648   (unit u-fr-r-store "FR Recovering Store Unit" ()
 649         1 1 ; issue done
 650         () ; state
 651         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
 652         () ; outputs
 653         () ; profile action (default)
 654         )
 655   ; Swap unit
 656   (unit u-swap "Swap Unit" ()
 657         1 1 ; issue done
 658         () ; state
 659         ((GRi INT -1) (GRj INT -1)) ; inputs
 660         ((GRk INT -1)) ; outputs
 661         () ; profile action (default)
 662         )
 663   ; FR Move to FR unit
 664   (unit u-fr2fr "FR Move to FR Unit" ()
 665         1 1 ; issue done
 666         () ; state
 667         ((FRi INT -1)) ; inputs
 668         ((FRk INT -1)) ; outputs
 669         () ; profile action (default)
 670         )
 671   ; FR Move to GR unit
 672   (unit u-fr2gr "FR Move to GR Unit" ()
 673         1 1 ; issue done
 674         () ; state
 675         ((FRintk INT -1)) ; inputs
 676         ((GRj INT -1)) ; outputs
 677         () ; profile action (default)
 678         )
 679   ; SPR Move to GR unit
 680   (unit u-spr2gr "SPR Move to GR Unit" ()
 681         1 1 ; issue done
 682         () ; state
 683         ((spr INT -1)) ; inputs
 684         ((GRj INT -1)) ; outputs
 685         () ; profile action (default)
 686         )
 687   ; GR Move to FR unit
 688   (unit u-gr2fr "GR Move to FR Unit" ()
 689         1 1 ; issue done
 690         () ; state
 691         ((GRj INT -1)) ; inputs
 692         ((FRintk INT -1)) ; outputs
 693         () ; profile action (default)
 694         )
 695   ; GR Move to SPR unit
 696   (unit u-gr2spr "GR Move to SPR Unit" ()
 697         1 1 ; issue done
 698         () ; state
 699         ((GRj INT -1)) ; inputs
 700         ((spr INT -1)) ; outputs
 701         () ; profile action (default)
 702         )
 703   ; Float Arithmetic unit
 704   (unit u-float-arith "Float Arithmetic unit" ()
 705         1 1 ; issue done
 706         () ; state
 707         ((FRi INT -1) (FRj INT -1) ; inputs
 708          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 709         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 710         () ; profile action (default)
 711         )
 712   ; Float Dual Arithmetic unit
 713   (unit u-float-dual-arith "Float Arithmetic unit" ()
 714         1 1 ; issue done
 715         () ; state
 716         ((FRi INT -1) (FRj INT -1) ; inputs
 717          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 718         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 719         () ; profile action (default)
 720         )
 721   ; Float Div unit
 722   (unit u-float-div "Float Div unit" ()
 723         1 1 ; issue done
 724         () ; state
 725         ((FRi INT -1) (FRj INT -1)) ; inputs
 726         ((FRk INT -1)) ; outputs
 727         () ; profile action (default)
 728         )
 729   ; Float Square Root unit
 730   (unit u-float-sqrt "Float Square Root unit" ()
 731         1 1 ; issue done
 732         () ; state
 733         ((FRj INT -1) (FRdoublej INT -1)) ; inputs
 734         ((FRk INT -1) (FRdoublek INT -1)) ; outputs
 735         () ; profile action (default)
 736         )
 737   ; Float Dual Square Root unit
 738   (unit u-float-dual-sqrt "Float Dual Square Root unit" ()
 739         1 1 ; issue done
 740         () ; state
 741         ((FRj INT -1)) ; inputs
 742         ((FRk INT -1)) ; outputs
 743         () ; profile action (default)
 744         )
 745   ; Float Compare unit
 746   (unit u-float-compare "Float Compare unit" ()
 747         1 1 ; issue done
 748         () ; state
 749         ((FRi INT -1) (FRj INT -1)
 750          (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
 751         ((FCCi_2 INT -1)) ; outputs
 752         () ; profile action (default)
 753         )
 754   ; Dual Float Compare unit
 755   (unit u-float-dual-compare "Float Dual Compare unit" ()
 756         1 1 ; issue done
 757         () ; state
 758         ((FRi INT -1) (FRj INT -1)) ; inputs
 759         ((FCCi_2 INT -1)) ; outputs
 760         () ; profile action (default)
 761         )
 762   ; Float Conversion unit
 763   (unit u-float-convert "Float Conversion unit" ()
 764         1 1 ; issue done
 765         () ; state
 766         ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
 767         ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
 768         () ; profile action (default)
 769         )
 770   ; Dual Float Conversion unit
 771   (unit u-float-dual-convert "Float Dual Conversion unit" ()
 772         1 1 ; issue done
 773         () ; state
 774         ((FRj INT -1) (FRintj INT -1)) ; inputs
 775         ((FRk INT -1) (FRintk INT -1)) ; outputs
 776         () ; profile action (default)
 777         )
 778   ; Media unit
 779   (unit u-media "Media unit" ()
 780         1 1 ; issue done
 781         () ; state
 782         ((FRinti INT -1) (FRintj INT -1) (ACC40Si INT -1) (ACCGi INT -1)) ; inputs
 783         ((FRintk INT -1) (ACC40Sk INT -1) (ACC40Uk INT -1) (ACCGk INT -1)) ; outputs
 784         () ; profile action (default)
 785         )
 786   ; Media Quad Arithmetic unit
 787   (unit u-media-quad-arith "Media Quad Arithmetic unit" ()
 788         1 1 ; issue done
 789         () ; state
 790         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 791         ((FRintk INT -1)) ; outputs
 792         () ; profile action (default)
 793         )
 794   ; Media Dual Multiplication unit
 795   (unit u-media-dual-mul "Media Dual Multiplication unit" ()
 796         1 1 ; issue done
 797         () ; state
 798         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 799         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 800         () ; profile action (default)
 801         )
 802   ; Media Quad Multiplication unit
 803   (unit u-media-quad-mul "Media Quad Multiplication unit" ()
 804         1 1 ; issue done
 805         () ; state
 806         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 807         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
 808         () ; profile action (default)
 809         )
 810   ; Media Quad Complex unit
 811   (unit u-media-quad-complex "Media Quad Complex unit" ()
 812         1 1 ; issue done
 813         () ; state
 814         ((FRinti INT -1) (FRintj INT -1)) ; inputs
 815         ((ACC40Sk INT -1)) ; outputs
 816         () ; profile action (default)
 817         )
 818   ; Media Dual Expand unit
 819   (unit u-media-dual-expand "Media Dual Expand unit" ()
 820         1 1 ; issue done
 821         () ; state
 822         ((FRinti INT -1)) ; inputs
 823         ((FRintk INT -1)) ; outputs
 824         () ; profile action (default)
 825         )
 826   ; Media Dual Unpack unit
 827   (unit u-media-dual-unpack "Media Dual Unpack unit" ()
 828         1 1 ; issue done
 829         () ; state
 830         ((FRinti INT -1)) ; inputs
 831         ((FRintk INT -1)) ; outputs
 832         () ; profile action (default)
 833         )
 834   ; Media Dual byte to half unit
 835   (unit u-media-dual-btoh "Media Byte to byte" ()
 836         1 1 ; issue done
 837         () ; state
 838         ((FRintj INT -1)) ; inputs
 839         ((FRintk INT -1)) ; outputs
 840         () ; profile action (default)
 841         )
 842   ; Media Dual half to byte unit
 843   (unit u-media-dual-htob "Media Half to byte" ()
 844         1 1 ; issue done
 845         () ; state
 846         ((FRintj INT -1)) ; inputs
 847         ((FRintk INT -1)) ; outputs
 848         () ; profile action (default)
 849         )
 850   ; Media Dual byte to half unit extended
 851   (unit u-media-dual-btohe "Media Byte to byte extended" ()
 852         1 1 ; issue done
 853         () ; state
 854         ((FRintj INT -1)) ; inputs
 855         ((FRintk INT -1)) ; outputs
 856         () ; profile action (default)
 857         )
 858   ; Barrier unit
 859   (unit u-barrier "Barrier unit" ()
 860         1 1 ; issue done
 861         () ; state
 862         () ; inputs
 863         () ; outputs
 864         () ; profile action (default)
 865         )
 866   ; Memory Barrier unit
 867   (unit u-membar "Memory Barrier unit" ()
 868         1 1 ; issue done
 869         () ; state
 870         () ; inputs
 871         () ; outputs
 872         () ; profile action (default)
 873         )
 874   ; Insn cache invalidate unit
 875   (unit u-ici "Insn cache invalidate unit" ()
 876         1 1 ; issue done
 877         () ; state
 878         ((GRi INT -1) (GRj INT -1)) ; inputs
 879         () ; outputs
 880         () ; profile action (default)
 881         )
 882   ; Data cache invalidate unit
 883   (unit u-dci "Data cache invalidate unit" ()
 884         1 1 ; issue done
 885         () ; state
 886         ((GRi INT -1) (GRj INT -1)) ; inputs
 887         () ; outputs
 888         () ; profile action (default)
 889         )
 890   ; Data cache flush unit
 891   (unit u-dcf "Data cache flush unit" ()
 892         1 1 ; issue done
 893         () ; state
 894         ((GRi INT -1) (GRj INT -1)) ; inputs
 895         () ; outputs
 896         () ; profile action (default)
 897         )
 898   ; Insn cache preload unit
 899   (unit u-icpl "Insn cache preload unit" ()
 900         1 1 ; issue done
 901         () ; state
 902         ((GRi INT -1) (GRj INT -1)) ; inputs
 903         () ; outputs
 904         () ; profile action (default)
 905         )
 906   ; Data cache preload unit
 907   (unit u-dcpl "Data cache preload unit" ()
 908         1 1 ; issue done
 909         () ; state
 910         ((GRi INT -1) (GRj INT -1)) ; inputs
 911         () ; outputs
 912         () ; profile action (default)
 913         )
 914   ; Insn cache unlock unit
 915   (unit u-icul "Insn cache unlock unit" ()
 916         1 1 ; issue done
 917         () ; state
 918         ((GRi INT -1) (GRj INT -1)) ; inputs
 919         () ; outputs
 920         () ; profile action (default)
 921         )
 922   ; Data cache unlock unit
 923   (unit u-dcul "Data cache unlock unit" ()
 924         1 1 ; issue done
 925         () ; state
 926         ((GRi INT -1) (GRj INT -1)) ; inputs
 927         () ; outputs
 928         () ; profile action (default)
 929         )
 930   ; commit unit
 931   (unit u-commit "Commit Unit" ()
 932         1 1 ; issue done
 933         () ; state
 934         ((GRk INT -1) (FRk INT -1)) ; inputs
 935         () ; outputs
 936         () ; profile action (default)
 937         )
 938 )
 939 \f
 940 ; Tomcat machine. Early version of fr500 machine
 941 (define-mach
 942   (name tomcat)
 943   (comment "Tomcat -- early version of fr500")
 944   (cpu frvbf)
 945 )
 946 (define-model
 947   (name tomcat) (comment "Tomcat model") (attrs)
 948   (mach tomcat)
 949
 950   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
 951
 952   ; `state' is a list of variables for recording model state
 953   ; (state)
 954
 955   (unit u-exec "Execution Unit" ()
 956         1 1 ; issue done
 957         () ; state
 958         () ; inputs
 959         () ; outputs
 960         () ; profile action (default)
 961         )
 962 )
 963 \f
 964 ; FR400 machine
 965 (define-mach
 966   (name fr400)
 967   (comment "FR400 cpu")
 968   (cpu frvbf)
 969 )
 970 (define-model
 971   (name fr400) (comment "FR400 model") (attrs)
 972   (mach fr400)
 973   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
 974   ; `state' is a list of variables for recording model state
 975   (state
 976    ; State items
 977    ; These are all masks with each bit representing one register.
 978    (prev-fp-load    DI) ; Previous use of FR  register was floating point load
 979    (prev-fr-p4      DI) ; Previous use of FR  register was media unit 4
 980    (prev-fr-p6      DI) ; Previous use of FR  register was media unit 6
 981    (prev-acc-p2     DI) ; Previous use of ACC register was media unit 2
 982    (prev-acc-p4     DI) ; Previous use of ACC register was media unit 4
 983    (cur-fp-load     DI) ; Current  use of FR  register is  floating point load
 984    (cur-fr-p4       DI) ; Current  use of FR  register is  media unit 4
 985    (cur-fr-p6       DI) ; Current  use of FR  register is  media unit 6
 986    (cur-acc-p2      DI) ; Current  use of ACC register is  media unit 2
 987    (cur-acc-p4      DI) ; Current  use of ACC register is  media unit 4
 988   )
 989   (unit u-exec "Execution Unit" ()
 990         1 1 ; issue done
 991         () ; state
 992         () ; inputs
 993         () ; outputs
 994         () ; profile action (default)
 995         )
 996   ; Basic integer insn unit
 997   (unit u-integer "Integer Unit" ()
 998         1 1 ; issue done
 999         () ; state
1000         ((GRi INT -1) (GRj INT -1)) ; inputs
1001         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1002         () ; profile action (default)
1003         )
1004   ; Integer multiplication unit
1005   (unit u-imul "Integer Multiplication Unit" ()
1006         1 1 ; issue done
1007         () ; state
1008         ((GRi INT -1) (GRj INT -1)) ; inputs
1009         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
1010         () ; profile action (default)
1011         )
1012   ; Integer division unit
1013   (unit u-idiv "Integer Division Unit" ()
1014         1 1 ; issue done
1015         () ; state
1016         ((GRi INT -1) (GRj INT -1)) ; inputs
1017         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1018         () ; profile action (default)
1019         )
1020   ; Branch unit
1021   (unit u-branch "Branch Unit" ()
1022         1 1 ; issue done
1023         () ; state
1024         ((GRi INT -1) (GRj INT -1)
1025          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1026         ((pc)) ; outputs
1027         () ; profile action (default)
1028         )
1029   ; Trap unit
1030   (unit u-trap "Trap Unit" ()
1031         1 1 ; issue done
1032         () ; state
1033         ((GRi INT -1) (GRj INT -1)
1034          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1035         () ; outputs
1036         () ; profile action (default)
1037         )
1038   ; Condition code check unit
1039   (unit u-check "Check Unit" ()
1040         1 1 ; issue done
1041         () ; state
1042         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
1043         () ; outputs
1044         () ; profile action (default)
1045         )
1046   ; GR set half unit
1047   (unit u-set-hilo "GR Set Half" ()
1048         1 1 ; issue done
1049         () ; state
1050         () ; inputs
1051         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
1052         () ; profile action (default)
1053         )
1054   ; GR load unit -- TODO doesn't handle quad
1055   (unit u-gr-load "GR Load Unit" ()
1056         1 1 ; issue done
1057         () ; state
1058         ((GRi INT -1) (GRj INT -1)) ; inputs
1059         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
1060         () ; profile action (default)
1061         )
1062   ; GR store unit -- TODO doesn't handle quad
1063   (unit u-gr-store "GR Store Unit" ()
1064         1 1 ; issue done
1065         () ; state
1066         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
1067         () ; outputs
1068         () ; profile action (default)
1069         )
1070   ; FR load unit -- TODO doesn't handle quad
1071   (unit u-fr-load "FR Load Unit" ()
1072         1 1 ; issue done
1073         () ; state
1074         ((GRi INT -1) (GRj INT -1)) ; inputs
1075         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
1076         () ; profile action (default)
1077         )
1078   ; FR store unit -- TODO doesn't handle quad
1079   (unit u-fr-store "FR Store Unit" ()
1080         1 1 ; issue done
1081         () ; state
1082         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
1083         () ; outputs
1084         () ; profile action (default)
1085         )
1086   ; Swap unit
1087   (unit u-swap "Swap Unit" ()
1088         1 1 ; issue done
1089         () ; state
1090         ((GRi INT -1) (GRj INT -1)) ; inputs
1091         ((GRk INT -1)) ; outputs
1092         () ; profile action (default)
1093         )
1094   ; FR Move to GR unit
1095   (unit u-fr2gr "FR Move to GR Unit" ()
1096         1 1 ; issue done
1097         () ; state
1098         ((FRintk INT -1)) ; inputs
1099         ((GRj INT -1)) ; outputs
1100         () ; profile action (default)
1101         )
1102   ; SPR Move to GR unit
1103   (unit u-spr2gr "SPR Move to GR Unit" ()
1104         1 1 ; issue done
1105         () ; state
1106         ((spr INT -1)) ; inputs
1107         ((GRj INT -1)) ; outputs
1108         () ; profile action (default)
1109         )
1110   ; GR Move to FR unit
1111   (unit u-gr2fr "GR Move to FR Unit" ()
1112         1 1 ; issue done
1113         () ; state
1114         ((GRj INT -1)) ; inputs
1115         ((FRintk INT -1)) ; outputs
1116         () ; profile action (default)
1117         )
1118   ; GR Move to SPR unit
1119   (unit u-gr2spr "GR Move to SPR Unit" ()
1120         1 1 ; issue done
1121         () ; state
1122         ((GRj INT -1)) ; inputs
1123         ((spr INT -1)) ; outputs
1124         () ; profile action (default)
1125         )
1126   ; Media unit M1 -- see table 13-8 in the fr400 LSI
1127   (unit u-media-1 "Media-1 unit" ()
1128         1 1 ; issue done
1129         () ; state
1130         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1131         ((FRintk INT -1)) ; outputs
1132         () ; profile action (default)
1133         )
1134   (unit u-media-1-quad "Media-1-quad unit" ()
1135         1 1 ; issue done
1136         () ; state
1137         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1138         ((FRintk INT -1)) ; outputs
1139         () ; profile action (default)
1140         )
1141   (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" ()
1142         1 1 ; issue done
1143         () ; state
1144         () ; inputs
1145         ((FRkhi INT -1) (FRklo INT -1)) ; outputs
1146         () ; profile action (default)
1147         )
1148   ; Media unit M2 -- see table 13-8 in the fr400 LSI
1149   (unit u-media-2 "Media-2 unit" ()
1150         1 1 ; issue done
1151         () ; state
1152         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1153         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1154         () ; profile action (default)
1155         )
1156   (unit u-media-2-quad "Media-2-quad unit" ()
1157         1 1 ; issue done
1158         () ; state
1159         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1160         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1161         () ; profile action (default)
1162         )
1163   (unit u-media-2-acc "Media-2-acc unit" ()
1164         1 1 ; issue done
1165         () ; state
1166         ((ACC40Si INT -1)) ; inputs
1167         ((ACC40Sk INT -1)) ; outputs
1168         () ; profile action (default)
1169         )
1170   (unit u-media-2-acc-dual "Media-2-acc-dual unit" ()
1171         1 1 ; issue done
1172         () ; state
1173         ((ACC40Si INT -1)) ; inputs
1174         ((ACC40Sk INT -1)) ; outputs
1175         () ; profile action (default)
1176         )
1177   (unit u-media-2-add-sub "Media-2-add-sub unit" ()
1178         1 1 ; issue done
1179         () ; state
1180         ((ACC40Si INT -1)) ; inputs
1181         ((ACC40Sk INT -1)) ; outputs
1182         () ; profile action (default)
1183         )
1184   (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" ()
1185         1 1 ; issue done
1186         () ; state
1187         ((ACC40Si INT -1)) ; inputs
1188         ((ACC40Sk INT -1)) ; outputs
1189         () ; profile action (default)
1190         )
1191   ; Media unit M3 -- see table 13-8 in the fr400 LSI
1192   (unit u-media-3 "Media-3 unit" ()
1193         1 1 ; issue done
1194         () ; state
1195         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1196         ((FRintk INT -1)) ; outputs
1197         () ; profile action (default)
1198         )
1199   (unit u-media-3-dual "Media-3-dual unit" ()
1200         1 1 ; issue done
1201         () ; state
1202         ((FRinti INT -1)) ; inputs
1203         ((FRintk INT -1)) ; outputs
1204         () ; profile action (default)
1205         )
1206   (unit u-media-3-quad "Media-3-quad unit" ()
1207         1 1 ; issue done
1208         () ; state
1209         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1210         ((FRintk INT -1)) ; outputs
1211         () ; profile action (default)
1212         )
1213   ; Media unit M4 -- see table 13-8 in the fr400 LSI
1214   (unit u-media-4 "Media-4 unit" ()
1215         1 1 ; issue done
1216         () ; state
1217         ((ACC40Si INT -1) (FRintj INT -1)) ; inputs
1218         ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs
1219         () ; profile action (default)
1220         )
1221   (unit u-media-4-accg "Media-4-accg unit" ()
1222         1 1 ; issue done
1223         () ; state
1224         ((ACCGi INT -1) (FRinti INT -1)) ; inputs
1225         ((ACCGk INT -1) (FRintk INT -1)) ; outputs
1226         () ; profile action (default)
1227         )
1228   (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
1229         1 1 ; issue done
1230         () ; state
1231         ((ACC40Si INT -1)) ; inputs
1232         ((FRintk INT -1)) ; outputs
1233         () ; profile action (default)
1234         )
1235   ; Media unit M6 -- see table 13-8 in the fr400 LSI
1236   (unit u-media-6 "Media-6 unit" ()
1237         1 1 ; issue done
1238         () ; state
1239         ((FRinti INT -1)) ; inputs
1240         ((FRintk INT -1)) ; outputs
1241         () ; profile action (default)
1242         )
1243   ; Media unit M7 -- see table 13-8 in the fr400 LSI
1244   (unit u-media-7 "Media-1 unit" ()
1245         1 1 ; issue done
1246         () ; state
1247         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1248         ((FCCk INT -1)) ; outputs
1249         () ; profile action (default)
1250         )
1251   ; Media Dual Expand unit
1252   (unit u-media-dual-expand "Media Dual Expand unit" ()
1253         1 1 ; issue done
1254         () ; state
1255         ((FRinti INT -1)) ; inputs
1256         ((FRintk INT -1)) ; outputs
1257         () ; profile action (default)
1258         )
1259   ; Media Dual half to byte unit
1260   (unit u-media-dual-htob "Media Half to byte" ()
1261         1 1 ; issue done
1262         () ; state
1263         ((FRintj INT -1)) ; inputs
1264         ((FRintk INT -1)) ; outputs
1265         () ; profile action (default)
1266         )
1267   ; Barrier unit
1268   (unit u-barrier "Barrier unit" ()
1269         1 1 ; issue done
1270         () ; state
1271         () ; inputs
1272         () ; outputs
1273         () ; profile action (default)
1274         )
1275   ; Memory Barrier unit
1276   (unit u-membar "Memory Barrier unit" ()
1277         1 1 ; issue done
1278         () ; state
1279         () ; inputs
1280         () ; outputs
1281         () ; profile action (default)
1282         )
1283   ; Insn cache invalidate unit
1284   (unit u-ici "Insn cache invalidate unit" ()
1285         1 1 ; issue done
1286         () ; state
1287         ((GRi INT -1) (GRj INT -1)) ; inputs
1288         () ; outputs
1289         () ; profile action (default)
1290         )
1291   ; Data cache invalidate unit
1292   (unit u-dci "Data cache invalidate unit" ()
1293         1 1 ; issue done
1294         () ; state
1295         ((GRi INT -1) (GRj INT -1)) ; inputs
1296         () ; outputs
1297         () ; profile action (default)
1298         )
1299   ; Data cache flush unit
1300   (unit u-dcf "Data cache flush unit" ()
1301         1 1 ; issue done
1302         () ; state
1303         ((GRi INT -1) (GRj INT -1)) ; inputs
1304         () ; outputs
1305         () ; profile action (default)
1306         )
1307   ; Insn cache preload unit
1308   (unit u-icpl "Insn cache preload unit" ()
1309         1 1 ; issue done
1310         () ; state
1311         ((GRi INT -1) (GRj INT -1)) ; inputs
1312         () ; outputs
1313         () ; profile action (default)
1314         )
1315   ; Data cache preload unit
1316   (unit u-dcpl "Data cache preload unit" ()
1317         1 1 ; issue done
1318         () ; state
1319         ((GRi INT -1) (GRj INT -1)) ; inputs
1320         () ; outputs
1321         () ; profile action (default)
1322         )
1323   ; Insn cache unlock unit
1324   (unit u-icul "Insn cache unlock unit" ()
1325         1 1 ; issue done
1326         () ; state
1327         ((GRi INT -1) (GRj INT -1)) ; inputs
1328         () ; outputs
1329         () ; profile action (default)
1330         )
1331   ; Data cache unlock unit
1332   (unit u-dcul "Data cache unlock unit" ()
1333         1 1 ; issue done
1334         () ; state
1335         ((GRi INT -1) (GRj INT -1)) ; inputs
1336         () ; outputs
1337         () ; profile action (default)
1338         )
1339 )
1340 \f
1341 ; FR450 machine
1342 (define-mach
1343   (name fr450)
1344   (comment "FR450 cpu")
1345   (cpu frvbf)
1346 )
1347 (define-model
1348   (name fr450) (comment "FR450 model") (attrs)
1349   (mach fr450)
1350   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
1351   ; `state' is a list of variables for recording model state
1352   (state
1353    ; State items
1354    ; These are all masks with each bit representing one register.
1355    (prev-fp-load    DI) ; Previous use of FR  register was floating point load
1356    (prev-fr-p4      DI) ; Previous use of FR  register was media unit 4
1357    (prev-fr-p6      DI) ; Previous use of FR  register was media unit 6
1358    (prev-acc-p2     DI) ; Previous use of ACC register was media unit 2
1359    (prev-acc-p4     DI) ; Previous use of ACC register was media unit 4
1360    (cur-fp-load     DI) ; Current  use of FR  register is  floating point load
1361    (cur-fr-p4       DI) ; Current  use of FR  register is  media unit 4
1362    (cur-fr-p6       DI) ; Current  use of FR  register is  media unit 6
1363    (cur-acc-p2      DI) ; Current  use of ACC register is  media unit 2
1364    (cur-acc-p4      DI) ; Current  use of ACC register is  media unit 4
1365   )
1366   (unit u-exec "Execution Unit" ()
1367         1 1 ; issue done
1368         () ; state
1369         () ; inputs
1370         () ; outputs
1371         () ; profile action (default)
1372         )
1373   ; Basic integer insn unit
1374   (unit u-integer "Integer Unit" ()
1375         1 1 ; issue done
1376         () ; state
1377         ((GRi INT -1) (GRj INT -1)) ; inputs
1378         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1379         () ; profile action (default)
1380         )
1381   ; Integer multiplication unit
1382   (unit u-imul "Integer Multiplication Unit" ()
1383         1 1 ; issue done
1384         () ; state
1385         ((GRi INT -1) (GRj INT -1)) ; inputs
1386         ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
1387         () ; profile action (default)
1388         )
1389   ; Integer division unit
1390   (unit u-idiv "Integer Division Unit" ()
1391         1 1 ; issue done
1392         () ; state
1393         ((GRi INT -1) (GRj INT -1)) ; inputs
1394         ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1395         () ; profile action (default)
1396         )
1397   ; Branch unit
1398   (unit u-branch "Branch Unit" ()
1399         1 1 ; issue done
1400         () ; state
1401         ((GRi INT -1) (GRj INT -1)
1402          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1403         ((pc)) ; outputs
1404         () ; profile action (default)
1405         )
1406   ; Trap unit
1407   (unit u-trap "Trap Unit" ()
1408         1 1 ; issue done
1409         () ; state
1410         ((GRi INT -1) (GRj INT -1)
1411          (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1412         () ; outputs
1413         () ; profile action (default)
1414         )
1415   ; Condition code check unit
1416   (unit u-check "Check Unit" ()
1417         1 1 ; issue done
1418         () ; state
1419         ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
1420         () ; outputs
1421         () ; profile action (default)
1422         )
1423   ; GR set half unit
1424   (unit u-set-hilo "GR Set Half" ()
1425         1 1 ; issue done
1426         () ; state
1427         () ; inputs
1428         ((GRkhi INT -1) (GRklo INT -1)) ; outputs
1429         () ; profile action (default)
1430         )
1431   ; GR load unit -- TODO doesn't handle quad
1432   (unit u-gr-load "GR Load Unit" ()
1433         1 1 ; issue done
1434         () ; state
1435         ((GRi INT -1) (GRj INT -1)) ; inputs
1436         ((GRk INT -1) (GRdoublek INT -1)) ; outputs
1437         () ; profile action (default)
1438         )
1439   ; GR store unit -- TODO doesn't handle quad
1440   (unit u-gr-store "GR Store Unit" ()
1441         1 1 ; issue done
1442         () ; state
1443         ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
1444         () ; outputs
1445         () ; profile action (default)
1446         )
1447   ; FR load unit -- TODO doesn't handle quad
1448   (unit u-fr-load "FR Load Unit" ()
1449         1 1 ; issue done
1450         () ; state
1451         ((GRi INT -1) (GRj INT -1)) ; inputs
1452         ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
1453         () ; profile action (default)
1454         )
1455   ; FR store unit -- TODO doesn't handle quad
1456   (unit u-fr-store "FR Store Unit" ()
1457         1 1 ; issue done
1458         () ; state
1459         ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
1460         () ; outputs
1461         () ; profile action (default)
1462         )
1463   ; Swap unit
1464   (unit u-swap "Swap Unit" ()
1465         1 1 ; issue done
1466         () ; state
1467         ((GRi INT -1) (GRj INT -1)) ; inputs
1468         ((GRk INT -1)) ; outputs
1469         () ; profile action (default)
1470         )
1471   ; FR Move to GR unit
1472   (unit u-fr2gr "FR Move to GR Unit" ()
1473         1 1 ; issue done
1474         () ; state
1475         ((FRintk INT -1)) ; inputs
1476         ((GRj INT -1)) ; outputs
1477         () ; profile action (default)
1478         )
1479   ; SPR Move to GR unit
1480   (unit u-spr2gr "SPR Move to GR Unit" ()
1481         1 1 ; issue done
1482         () ; state
1483         ((spr INT -1)) ; inputs
1484         ((GRj INT -1)) ; outputs
1485         () ; profile action (default)
1486         )
1487   ; GR Move to FR unit
1488   (unit u-gr2fr "GR Move to FR Unit" ()
1489         1 1 ; issue done
1490         () ; state
1491         ((GRj INT -1)) ; inputs
1492         ((FRintk INT -1)) ; outputs
1493         () ; profile action (default)
1494         )
1495   ; GR Move to SPR unit
1496   (unit u-gr2spr "GR Move to SPR Unit" ()
1497         1 1 ; issue done
1498         () ; state
1499         ((GRj INT -1)) ; inputs
1500         ((spr INT -1)) ; outputs
1501         () ; profile action (default)
1502         )
1503   ; Media unit M1 -- see table 14-8 in the fr450 LSI
1504   (unit u-media-1 "Media-1 unit" ()
1505         1 1 ; issue done
1506         () ; state
1507         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1508         ((FRintk INT -1)) ; outputs
1509         () ; profile action (default)
1510         )
1511   (unit u-media-1-quad "Media-1-quad unit" ()
1512         1 1 ; issue done
1513         () ; state
1514         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1515         ((FRintk INT -1)) ; outputs
1516         () ; profile action (default)
1517         )
1518   (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" ()
1519         1 1 ; issue done
1520         () ; state
1521         () ; inputs
1522         ((FRkhi INT -1) (FRklo INT -1)) ; outputs
1523         () ; profile action (default)
1524         )
1525   ; Media unit M2 -- see table 14-8 in the fr450 LSI
1526   (unit u-media-2 "Media-2 unit" ()
1527         1 1 ; issue done
1528         () ; state
1529         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1530         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1531         () ; profile action (default)
1532         )
1533   (unit u-media-2-quad "Media-2-quad unit" ()
1534         1 1 ; issue done
1535         () ; state
1536         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1537         ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1538         () ; profile action (default)
1539         )
1540   (unit u-media-2-acc "Media-2-acc unit" ()
1541         1 1 ; issue done
1542         () ; state
1543         ((ACC40Si INT -1)) ; inputs
1544         ((ACC40Sk INT -1)) ; outputs
1545         () ; profile action (default)
1546         )
1547   (unit u-media-2-acc-dual "Media-2-acc-dual unit" ()
1548         1 1 ; issue done
1549         () ; state
1550         ((ACC40Si INT -1)) ; inputs
1551         ((ACC40Sk INT -1)) ; outputs
1552         () ; profile action (default)
1553         )
1554   (unit u-media-2-add-sub "Media-2-add-sub unit" ()
1555         1 1 ; issue done
1556         () ; state
1557         ((ACC40Si INT -1)) ; inputs
1558         ((ACC40Sk INT -1)) ; outputs
1559         () ; profile action (default)
1560         )
1561   (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" ()
1562         1 1 ; issue done
1563         () ; state
1564         ((ACC40Si INT -1)) ; inputs
1565         ((ACC40Sk INT -1)) ; outputs
1566         () ; profile action (default)
1567         )
1568   ; Media unit M3 -- see table 14-8 in the fr450 LSI
1569   (unit u-media-3 "Media-3 unit" ()
1570         1 1 ; issue done
1571         () ; state
1572         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1573         ((FRintk INT -1)) ; outputs
1574         () ; profile action (default)
1575         )
1576   (unit u-media-3-dual "Media-3-dual unit" ()
1577         1 1 ; issue done
1578         () ; state
1579         ((FRinti INT -1)) ; inputs
1580         ((FRintk INT -1)) ; outputs
1581         () ; profile action (default)
1582         )
1583   (unit u-media-3-quad "Media-3-quad unit" ()
1584         1 1 ; issue done
1585         () ; state
1586         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1587         ((FRintk INT -1)) ; outputs
1588         () ; profile action (default)
1589         )
1590   ; Media unit M4 -- see table 14-8 in the fr450 LSI
1591   (unit u-media-4 "Media-4 unit" ()
1592         1 1 ; issue done
1593         () ; state
1594         ((ACC40Si INT -1) (FRintj INT -1)) ; inputs
1595         ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs
1596         () ; profile action (default)
1597         )
1598   (unit u-media-4-accg "Media-4-accg unit" ()
1599         1 1 ; issue done
1600         () ; state
1601         ((ACCGi INT -1) (FRinti INT -1)) ; inputs
1602         ((ACCGk INT -1) (FRintk INT -1)) ; outputs
1603         () ; profile action (default)
1604         )
1605   (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
1606         1 1 ; issue done
1607         () ; state
1608         ((ACC40Si INT -1)) ; inputs
1609         ((FRintk INT -1)) ; outputs
1610         () ; profile action (default)
1611         )
1612   (unit u-media-4-mclracca "Media-4 unit for MCLRACC with #A=1" ()
1613         1 1 ; issue done
1614         () ; state
1615         () ; inputs
1616         () ; outputs
1617         () ; profile action (default)
1618         )
1619   ; Media unit M6 -- see table 14-8 in the fr450 LSI
1620   (unit u-media-6 "Media-6 unit" ()
1621         1 1 ; issue done
1622         () ; state
1623         ((FRinti INT -1)) ; inputs
1624         ((FRintk INT -1)) ; outputs
1625         () ; profile action (default)
1626         )
1627   ; Media unit M7 -- see table 14-8 in the fr450 LSI
1628   (unit u-media-7 "Media-1 unit" ()
1629         1 1 ; issue done
1630         () ; state
1631         ((FRinti INT -1) (FRintj INT -1)) ; inputs
1632         ((FCCk INT -1)) ; outputs
1633         () ; profile action (default)
1634         )
1635   ; Media Dual Expand unit
1636   (unit u-media-dual-expand "Media Dual Expand unit" ()
1637         1 1 ; issue done
1638         () ; state
1639         ((FRinti INT -1)) ; inputs
1640         ((FRintk INT -1)) ; outputs
1641         () ; profile action (default)
1642         )
1643   ; Media Dual half to byte unit
1644   (unit u-media-dual-htob "Media Half to byte" ()
1645         1 1 ; issue done
1646         () ; state
1647         ((FRintj INT -1)) ; inputs
1648         ((FRintk INT -1)) ; outputs
1649         () ; profile action (default)
1650         )
1651   ; Barrier unit
1652   (unit u-barrier "Barrier unit" ()
1653         1 1 ; issue done
1654         () ; state
1655         () ; inputs
1656         () ; outputs
1657         () ; profile action (default)
1658         )
1659   ; Memory Barrier unit
1660   (unit u-membar "Memory Barrier unit" ()
1661         1 1 ; issue done
1662         () ; state
1663         () ; inputs
1664         () ; outputs
1665         () ; profile action (default)
1666         )
1667   ; Insn cache invalidate unit
1668   (unit u-ici "Insn cache invalidate unit" ()
1669         1 1 ; issue done
1670         () ; state
1671         ((GRi INT -1) (GRj INT -1)) ; inputs
1672         () ; outputs
1673         () ; profile action (default)
1674         )
1675   ; Data cache invalidate unit
1676   (unit u-dci "Data cache invalidate unit" ()
1677         1 1 ; issue done
1678         () ; state
1679         ((GRi INT -1) (GRj INT -1)) ; inputs
1680         () ; outputs
1681         () ; profile action (default)
1682         )
1683   ; Data cache flush unit
1684   (unit u-dcf "Data cache flush unit" ()
1685         1 1 ; issue done
1686         () ; state
1687         ((GRi INT -1) (GRj INT -1)) ; inputs
1688         () ; outputs
1689         () ; profile action (default)
1690         )
1691   ; Insn cache preload unit
1692   (unit u-icpl "Insn cache preload unit" ()
1693         1 1 ; issue done
1694         () ; state
1695         ((GRi INT -1) (GRj INT -1)) ; inputs
1696         () ; outputs
1697         () ; profile action (default)
1698         )
1699   ; Data cache preload unit
1700   (unit u-dcpl "Data cache preload unit" ()
1701         1 1 ; issue done
1702         () ; state
1703         ((GRi INT -1) (GRj INT -1)) ; inputs
1704         () ; outputs
1705         () ; profile action (default)
1706         )
1707   ; Insn cache unlock unit
1708   (unit u-icul "Insn cache unlock unit" ()
1709         1 1 ; issue done
1710         () ; state
1711         ((GRi INT -1) (GRj INT -1)) ; inputs
1712         () ; outputs
1713         () ; profile action (default)
1714         )
1715   ; Data cache unlock unit
1716   (unit u-dcul "Data cache unlock unit" ()
1717         1 1 ; issue done
1718         () ; state
1719         ((GRi INT -1) (GRj INT -1)) ; inputs
1720         () ; outputs
1721         () ; profile action (default)
1722         )
1723 )
1724 \f
1725 ; Simple machine - single issue integer machine
1726 (define-mach
1727   (name simple)
1728   (comment "Simple single issue integer cpu")
1729   (cpu frvbf)
1730 )
1731 (define-model
1732   (name simple) (comment "Simple model") (attrs)
1733   (mach simple)
1734   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
1735   ; `state' is a list of variables for recording model state
1736   (state)
1737   (unit u-exec "Execution Unit" ()
1738         1 1 ; issue done
1739         () ; state
1740         () ; inputs
1741         () ; outputs
1742         () ; profile action (default)
1743         )
1744 )
1745 \f
1746 ; The instruction fetch/execute cycle.
1747 ;
1748 ; This is how to fetch and decode an instruction.
1749 ; Leave it out for now
1750
1751 ; (define-extract (const SI 0))
1752
1753 ; This is how to execute a decoded instruction.
1754 ; Leave it out for now
1755
1756 ; (define-execute (const SI 0))
1757 \f
1758 ; An attribute to describe which unit an insn runs in.
1759 (define-attr
1760   (for insn)
1761   (type enum)
1762   (name UNIT)
1763   (comment "parallel execution pipeline selection")
1764   ; The order of declaration is significant.
1765   ; See the *_unit_mapping tables in frv.opc
1766   ; Keep variations on the same unit together.
1767   ; Keep the '01' variant immediately after the '1' variant in each unit.
1768   ; Keep the 'ALL' variations immediately after the last numbered variant in each unit.
1769   (values NIL
1770           I0 I1 I01 I2 I3 IALL
1771           FM0 FM1 FM01 FM2 FM3 FMALL FMLOW
1772           B0 B1 B01
1773           C
1774           MULT-DIV ; multiply/division slotted differently on different machines
1775           IACC     ; iacc multiply     slotted differently on different machines
1776           LOAD     ; loads             slotted differently on different machines
1777           STORE    ; store             slotted differently on different machines
1778           SCAN     ; scan, scani       slotted differently on different machines
1779           DCPL     ; dcpl              slotted differently on different machines
1780           MDUALACC ; media dual acc    slotted differently on different machines
1781           MDCUTSSI ; mdcutssi insn     slotted differently on different machines
1782           MCLRACC-1; mclracc A==1      slotted differently on different machines
1783           NUM_UNITS
1784   )
1785 )
1786 ; Attributes to describe major categories of insns
1787 (define-attr
1788   (for insn)
1789   (type enum)
1790   (name FR400-MAJOR)
1791   (comment "fr400 major insn categories")
1792   ; The order of declaration is significant. Keep variations on the same major
1793   ; together.
1794   (values NONE
1795           I-1 I-2 I-3 I-4 I-5
1796           B-1 B-2 B-3 B-4 B-5 B-6
1797           C-1 C-2
1798           M-1 M-2
1799   )
1800 )
1801 (define-attr
1802   (for insn)
1803   (type enum)
1804   (name FR450-MAJOR)
1805   (comment "fr450 major insn categories")
1806   ; The order of declaration is significant. Keep variations on the same major
1807   ; together.
1808   (values NONE
1809           I-1 I-2 I-3 I-4 I-5
1810           B-1 B-2 B-3 B-4 B-5 B-6
1811           C-1 C-2
1812           M-1 M-2 M-3 M-4 M-5 M-6
1813   )
1814 )
1815 (define-attr
1816   (for insn)
1817   (type enum)
1818   (name FR500-MAJOR)
1819   (comment "fr500 major insn categories")
1820   ; The order of declaration is significant. Keep variations on the same major
1821   ; together.
1822   (values NONE
1823           I-1 I-2 I-3 I-4 I-5 I-6
1824           B-1 B-2 B-3 B-4 B-5 B-6
1825           C-1 C-2
1826           F-1 F-2 F-3 F-4 F-5 F-6 F-7 F-8
1827           M-1 M-2 M-3 M-4 M-5 M-6 M-7 M-8
1828   )
1829 )
1830 (define-attr
1831   (for insn)
1832   (type enum)
1833   (name FR550-MAJOR)
1834   (comment "fr550 major insn categories")
1835   ; The order of declaration is significant. Keep variations on the same major
1836   ; together.
1837   (values NONE
1838           I-1 I-2 I-3 I-4 I-5 I-6 I-7 I-8
1839           B-1 B-2 B-3 B-4 B-5 B-6
1840           C-1 C-2
1841           F-1 F-2 F-3 F-4
1842           M-1 M-2 M-3 M-4 M-5
1843   )
1844 )
1845 ; Privileged insn
1846 (define-attr
1847   (for insn)
1848   (type boolean)
1849   (name PRIVILEGED)
1850   (comment "insn only allowed in supervisor mode")
1851 )
1852 ; Non-Excepting insn
1853 (define-attr
1854   (for insn)
1855   (type boolean)
1856   (name NON-EXCEPTING)
1857   (comment "non-excepting insn")
1858 )
1859 ; Conditional insn
1860 (define-attr
1861   (for insn)
1862   (type boolean)
1863   (name CONDITIONAL)
1864   (comment "conditional insn")
1865 )
1866 ; insn accesses FR registers
1867 (define-attr
1868   (for insn)
1869   (type boolean)
1870   (name FR-ACCESS)
1871   (comment "insn accesses FR registers")
1872 )
1873 ; insn preserves MSR.OVF
1874 (define-attr
1875   (for insn)
1876   (type boolean)
1877   (name PRESERVE-OVF)
1878   (comment "Preserve value of MSR.OVF")
1879 )
1880 ; "Audio" instruction provided by the fr405 but not the original fr400 core.
1881 (define-attr
1882   (for insn)
1883   (type boolean)
1884   (name AUDIO)
1885   (comment "Audio instruction added with FR405")
1886 )
1887 ; null attribute -- used as a place holder for where an attribue is required.
1888 (define-attr
1889   (for insn)
1890   (type boolean)
1891   (name NA)
1892   (comment "placeholder attribute")
1893   (attrs META) ; do not define in any generated file for now
1894 )
1895
1896 ; IDOC attribute for instruction documentation.
1897
1898 (define-attr
1899   (for insn)
1900   (type enum)
1901   (name IDOC)
1902   (comment "insn kind for documentation")
1903   (attrs META)
1904   (values
1905    (MEM - () "Memory")
1906    (ALU - () "ALU")
1907    (FPU - () "FPU")
1908    (BR - () "Branch")
1909    (PRIV - () "Priviledged")
1910    (MISC - () "Miscellaneous")
1911   )
1912 )
1913 \f
1914 ; Instruction fields.
1915 ;
1916 ; Attributes:
1917 ; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
1918 ; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
1919 ; RESERVED: bits are not used to decode insn, must be all 0
1920 (dnf f-pack      "packing bit"                  () 31  1)
1921 (dnf f-op        "primary opcode"               () 24  7)
1922 (dnf f-ope1      "extended opcode"              () 11  6)
1923 (dnf f-ope2      "extended opcode"              ()  9  4)
1924 (dnf f-ope3      "extended opcode"              () 15  3)
1925 (dnf f-ope4      "extended opcode"              ()  7  2)
1926
1927 (dnf f-GRi       "source register 1"            () 17  6)
1928 (dnf f-GRj       "source register 2"            ()  5  6)
1929 (dnf f-GRk       "destination register"         () 30  6)
1930
1931 (dnf f-FRi       "source register 1"            () 17  6)
1932 (dnf f-FRj       "source register 2"            ()  5  6)
1933 (dnf f-FRk       "destination register"         () 30  6)
1934
1935 (dnf f-CPRi      "source register 1"            () 17  6)
1936 (dnf f-CPRj      "source register 2"            ()  5  6)
1937 (dnf f-CPRk      "destination register"         () 30  6)
1938
1939 (dnf f-ACCGi     "source register"              () 17  6)
1940 (dnf f-ACCGk     "destination register"         () 30  6)
1941
1942 (dnf f-ACC40Si   "40 bit signed accumulator"    () 17  6)
1943 (dnf f-ACC40Ui   "40 bit unsigned accumulator"  () 17  6)
1944 (dnf f-ACC40Sk   "40 bit accumulator"           () 30  6)
1945 (dnf f-ACC40Uk   "40 bit accumulator"           () 30  6)
1946
1947 (dnf f-CRi       "source      register"         () 14  3)
1948 (dnf f-CRj       "source      register"         ()  2  3)
1949 (dnf f-CRk       "destination register"         () 27  3)
1950 (dnf f-CCi       "condition   register"         () 11  3)
1951
1952 (df  f-CRj_int   "target cr for ck insns"       () 26  2 UINT
1953      ((value pc) (sub WI value 4))
1954      ((value pc) (add WI value 4))
1955 )
1956 (dnf f-CRj_float "target cr for fck insns"      () 26  2)
1957
1958 (dnf f-ICCi_1    "condition register"           () 11  2)
1959 (dnf f-ICCi_2    "condition register"           () 26  2)
1960 (dnf f-ICCi_3    "condition register"           ()  1  2)
1961 (dnf f-FCCi_1    "condition register"           () 11  2)
1962 (dnf f-FCCi_2    "condition register"           () 26  2)
1963 (dnf f-FCCi_3    "condition register"           ()  1  2)
1964 (dnf f-FCCk      "condition register"           () 26  2)
1965 (dnf f-eir       "exception insn register"      () 17  6)
1966
1967 (df  f-s10       "10 bit sign extended"         ()  9 10  INT #f #f)
1968 (df  f-s12       "12 bit sign extended"         () 11 12  INT #f #f)
1969 (df  f-d12       "12 bit sign extended"         () 11 12  INT #f #f)
1970 (df  f-u16       "16 bit unsigned"              () 15 16 UINT #f #f)
1971 (df  f-s16       "16 bit sign extended"         () 15 16  INT #f #f)
1972 (df  f-s6        "6  bit   signed"              ()  5  6  INT #f #f)
1973 (df  f-s6_1      "6  bit   signed"              () 11  6  INT #f #f)
1974 (df  f-u6        "6  bit unsigned"              ()  5  6 UINT #f #f)
1975 (df  f-s5        "5  bit   signed"              ()  4  5  INT #f #f)
1976
1977 (df  f-u12-h "upper 6 bits of u12"  () 17 6  INT #f #f)
1978 (df  f-u12-l "lower 6 bits of u12"  ()  5 6 UINT #f #f)
1979 (dnmf f-u12   "12 bit signed immediate" () INT
1980       (f-u12-h f-u12-l)
1981       (sequence () ; insert
1982                 (set (ifield f-u12-h) (sra SI (ifield f-u12) 6))
1983                 (set (ifield f-u12-l) (and (ifield f-u12) #x3f))
1984                 )
1985       (sequence () ; extract
1986                 (set (ifield f-u12) (or (sll (ifield f-u12-h) 6)
1987                                         (ifield f-u12-l)))
1988                 )
1989 )
1990
1991 (dnf f-int-cc    "integer  branch conditions"   () 30  4)
1992 (dnf f-flt-cc    "floating branch conditions"   () 30  4)
1993 (df  f-cond      "conditional arithmetic"       ()  8  1 UINT #f #f)
1994 (df  f-ccond     "lr branch condition"          () 12  1 UINT #f #f)
1995 (df  f-hint      "2 bit branch prediction hint" () 17  2 UINT #f #f)
1996 (df  f-LI        "link indicator"               () 25  1 UINT #f #f)
1997 (df  f-lock      "cache lock indicator"         () 25  1 UINT #f #f)
1998 (df  f-debug     "debug mode indicator"         () 25  1 UINT #f #f)
1999 (df  f-A         "all accumulator bit"          () 17  1 UINT #f #f)
2000 (df  f-ae        "cache all entries indicator"  () 25  1 UINT #f #f)
2001
2002 (dnf  f-spr-h "upper 6 bits of spr"  () 30  6)
2003 (dnf  f-spr-l "lower 6 bits of spr"  () 17  6)
2004 (dnmf f-spr   "special purpose register" () UINT
2005       (f-spr-h f-spr-l)
2006       (sequence () ; insert
2007                 (set (ifield f-spr-h) (srl (ifield f-spr) (const 6)))
2008                 (set (ifield f-spr-l) (and (ifield f-spr) (const #x3f)))
2009                 )
2010       (sequence () ; extract
2011                 (set (ifield f-spr) (or (sll (ifield f-spr-h) (const 6))
2012                                         (ifield f-spr-l)))
2013                 )
2014 )
2015
2016 (df  f-label16    "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT
2017      ((value pc) (sra WI (sub WI value pc) (const 2)))
2018      ((value pc) (add WI (sll WI value (const 2)) pc))
2019 )
2020
2021 (df   f-labelH6   "upper 6  bits of label24"  () 30  6 INT #f #f)
2022 (dnf  f-labelL18  "lower 18 bits of label24"  () 17 18)
2023 (dnmf f-label24   "26 bit signed offset"     (PCREL-ADDR) INT
2024       (f-labelH6 f-labelL18)
2025       ; insert
2026       (sequence ()
2027                 (set (ifield f-labelH6)
2028                      (sra WI (sub (ifield f-label24) pc) (const 20)))
2029                 (set (ifield f-labelL18)
2030                      (and (srl (sub (ifield f-label24) pc) (const 2))
2031                           (const #x3ffff)))
2032                 )
2033       ; extract
2034       (sequence ()
2035                 (set (ifield f-label24)
2036                      (add (sll (or (sll (ifield f-labelH6) (const 18))
2037                                    (ifield f-labelL18))
2038                                (const 2))
2039                           pc)))
2040 )
2041
2042 (dnf f-LRAE "Load Real Address E flag" () 5 1)
2043 (dnf f-LRAD "Load Real Address D flag" () 4 1)
2044 (dnf f-LRAS "Load Real Address S flag" () 3 1)
2045
2046 (dnf f-TLBPRopx "TLB Probe operation number" () 28 3)
2047 (dnf f-TLBPRL   "TLB Probe L flag" () 25 1)
2048
2049 (dnf f-ICCi_1-null  "null field" (RESERVED) 11  2)
2050 (dnf f-ICCi_2-null  "null field" (RESERVED) 26  2)
2051 (dnf f-ICCi_3-null  "null field" (RESERVED)  1  2)
2052 (dnf f-FCCi_1-null  "null field" (RESERVED) 11  2)
2053 (dnf f-FCCi_2-null  "null field" (RESERVED) 26  2)
2054 (dnf f-FCCi_3-null  "null field" (RESERVED)  1  2)
2055 (dnf f-rs-null      "null field" (RESERVED) 17  6)
2056 (dnf f-GRi-null     "null field" (RESERVED) 17  6)
2057 (dnf f-GRj-null     "null field" (RESERVED)  5  6)
2058 (dnf f-GRk-null     "null field" (RESERVED) 30  6)
2059 (dnf f-FRi-null     "null field" (RESERVED) 17  6)
2060 (dnf f-FRj-null     "null field" (RESERVED)  5  6)
2061 (dnf f-ACCj-null    "null field" (RESERVED)  5  6)
2062 (dnf f-rd-null      "null field" (RESERVED) 30  6)
2063 (dnf f-cond-null    "null field" (RESERVED) 30  4)
2064 (dnf f-ccond-null   "null field" (RESERVED) 12  1)
2065 (dnf f-s12-null     "null field" (RESERVED) 11 12)
2066 (dnf f-label16-null "null field" (RESERVED) 15 16)
2067 (dnf f-misc-null-1  "null field" (RESERVED) 30  5)
2068 (dnf f-misc-null-2  "null field" (RESERVED) 11  6)
2069 (dnf f-misc-null-3  "null field" (RESERVED) 11  4)
2070 (dnf f-misc-null-4  "null field" (RESERVED) 17  2)
2071 (dnf f-misc-null-5  "null field" (RESERVED) 17 16)
2072 (dnf f-misc-null-6  "null field" (RESERVED) 30  3)
2073 (dnf f-misc-null-7  "null field" (RESERVED) 17  3)
2074 (dnf f-misc-null-8  "null field" (RESERVED)  5  3)
2075 (dnf f-misc-null-9  "null field" (RESERVED)  5  4)
2076 (dnf f-misc-null-10 "null field" (RESERVED) 16  5)
2077 (dnf f-misc-null-11 "null field" (RESERVED)  5  1)
2078
2079 (dnf f-LRA-null     "null field" (RESERVED)  2  3)
2080 (dnf f-TLBPR-null   "null field" (RESERVED) 30  2)
2081
2082 (dnf f-LI-off      "null field" (RESERVED) 25  1)
2083 (dnf f-LI-on       "null field" (RESERVED) 25  1)
2084 \f
2085 ; Enums.
2086
2087 ; insn-op:
2088 ; FIXME: should use die macro or some such
2089 (define-normal-insn-enum insn-op "insn op enums" () OP_ f-op
2090  (
2091  "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
2092  "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
2093  "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
2094  "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
2095  "40" "41" "42" "43" "44" "45" "46" "47" "48" "49" "4A" "4B" "4C" "4D" "4E" "4F"
2096  "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "5A" "5B" "5C" "5D" "5E" "5F"
2097  "60" "61" "62" "63" "64" "65" "66" "67" "68" "69" "6A" "6B" "6C" "6D" "6E" "6F"
2098  "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" "7A" "7B" "7C" "7D" "7E" "7F"
2099  )
2100 )
2101
2102 (define-normal-insn-enum insn-ope1 "insn ope enums" () OPE1_ f-ope1
2103  (
2104  "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
2105  "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
2106  "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
2107  "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
2108  )
2109 )
2110
2111 (define-normal-insn-enum insn-ope2 "insn ope enums" () OPE2_ f-ope2
2112  (
2113  "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
2114  )
2115 )
2116
2117 (define-normal-insn-enum insn-ope3 "insn ope enums" () OPE3_ f-ope3
2118  (
2119  "00" "01" "02" "03" "04" "05" "06" "07"
2120  )
2121 )
2122
2123 (define-normal-insn-enum insn-ope4 "insn ope enums" () OPE4_ f-ope4
2124  (
2125  "0" "1" "2" "3"
2126  )
2127 )
2128
2129 ; int-cc: integer branch conditions
2130 ; FIXME: should use die macro or some such
2131 (define-normal-insn-enum int-cc "integer branch cond enums" () ICC_ f-int-cc
2132   (
2133    "nev" "c"  "v"  "lt" "eq" "ls" "n" "le"
2134    "ra"  "nc" "nv" "ge" "ne" "hi" "p" "gt"
2135   )
2136 )
2137
2138 ; flt-cc: floating-point/media branch conditions
2139 ; FIXME: should use die macro or some such
2140 (define-normal-insn-enum flt-cc "float branch cond enums" () FCC_ f-flt-cc
2141   ("nev" "u" "gt" "ug" "lt" "ul" "lg" "ne"
2142    "eq" "ue" "ge" "uge" "le" "ule" "o" "ra")
2143 )
2144 \f
2145 ; Hardware pieces.
2146 ; These entries list the elements of the raw hardware.
2147 ; They're also used to provide tables and other elements of the assembly
2148 ; language.
2149 (dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
2150
2151 ; The PSR. The individual fields are referenced more than the entire
2152 ; register, so reference them directly. We can assemble the
2153 ; entire register contents when necessary.
2154 ;
2155 (dsh h-psr_imple "PSR.IMPLE"   () (register UQI))
2156 (dsh h-psr_ver   "PSR.VER"     () (register UQI))
2157 (dsh h-psr_ice   "PSR.ICE bit" () (register BI))
2158 (dsh h-psr_nem   "PSR.NEM bit" () (register BI))
2159 (dsh h-psr_cm    "PSR.CM  bit" () (register BI))
2160 (dsh h-psr_be    "PSR.BE  bit" () (register BI))
2161 (dsh h-psr_esr   "PSR.ESR bit" () (register BI))
2162 (dsh h-psr_ef    "PSR.EF  bit" () (register BI))
2163 (dsh h-psr_em    "PSR.EM  bit" () (register BI))
2164 (dsh h-psr_pil   "PSR.PIL    " () (register UQI))
2165 (dsh h-psr_ps    "PSR.PS  bit" () (register BI))
2166 (dsh h-psr_et    "PSR.ET  bit" () (register BI))
2167
2168 ; PSR.S requires special handling because the shadow registers (SR0-SR4) must
2169 ; be switched with GR4-GR7 when changing from user to supervisor mode or
2170 ; vice-versa.
2171 (define-hardware
2172   (name h-psr_s)
2173   (comment "PSR.S bit")
2174   (attrs)
2175   (type register BI)
2176   (get)
2177   (set (newval) (c-call VOID "@cpu@_h_psr_s_set_handler" newval))
2178 )
2179
2180 ; The TBR. The individual bits are referenced more than the entire
2181 ; register, so reference them directly. We can assemble the
2182 ; entire register contents when necessary.
2183 ;
2184 (dsh h-tbr_tba "TBR.TBA" () (register UWI))
2185 (dsh h-tbr_tt  "TBR.TT"  () (register UQI))
2186
2187 ; The BPSR. The individual bits are referenced more than the entire
2188 ; register, so reference them directly. We can assemble the
2189 ; entire register contents when necessary.
2190 ;
2191 (dsh h-bpsr_bs   "PSR.S   bit" () (register BI))
2192 (dsh h-bpsr_bet  "PSR.ET  bit" () (register BI))
2193
2194 ; General registers
2195 ;
2196 (define-keyword
2197   (name gr-names)
2198   (print-name h-gr)
2199   (prefix "")
2200   (values
2201    (sp 1) (fp 2)
2202    (gr0   0)(gr1   1)(gr2   2)(gr3   3)(gr4   4)(gr5   5)(gr6   6)(gr7   7)
2203    (gr8   8)(gr9   9)(gr10 10)(gr11 11)(gr12 12)(gr13 13)(gr14 14)(gr15 15)
2204    (gr16 16)(gr17 17)(gr18 18)(gr19 19)(gr20 20)(gr21 21)(gr22 22)(gr23 23)
2205    (gr24 24)(gr25 25)(gr26 26)(gr27 27)(gr28 28)(gr29 29)(gr30 30)(gr31 31)
2206    (gr32 32)(gr33 33)(gr34 34)(gr35 35)(gr36 36)(gr37 37)(gr38 38)(gr39 39)
2207    (gr40 40)(gr41 41)(gr42 42)(gr43 43)(gr44 44)(gr45 45)(gr46 46)(gr47 47)
2208    (gr48 48)(gr49 49)(gr50 50)(gr51 51)(gr52 52)(gr53 53)(gr54 54)(gr55 55)
2209    (gr56 56)(gr57 57)(gr58 58)(gr59 59)(gr60 60)(gr61 61)(gr62 62)(gr63 63)
2210   )
2211 )
2212
2213 (define-hardware
2214   (name h-gr)
2215   (comment "general registers")
2216   (attrs PROFILE)
2217   (type register USI (64))
2218   (indices extern-keyword gr-names)
2219   (get (index) (c-call WI "@cpu@_h_gr_get_handler" index))
2220   (set (index newval) (c-call VOID "@cpu@_h_gr_set_handler" index newval))
2221 )
2222
2223 ; General Registers as double words
2224 ; These registers are shadowed onto h-gr
2225 (define-hardware
2226   (name h-gr_double)
2227   (comment "general registers as double words")
2228   (attrs PROFILE VIRTUAL)
2229   (type register DI (32))
2230   ; FIXME: Need constraint to prohibit odd numbers.
2231   (indices extern-keyword gr-names)
2232   (get (index)
2233        (c-call DI "@cpu@_h_gr_double_get_handler" index))
2234   (set (index newval)
2235        (c-call VOID "@cpu@_h_gr_double_set_handler" index newval))
2236 )
2237
2238 ; General Registers as high and low half words
2239 ; These registers are shadowed onto h-gr
2240 (define-hardware
2241   (name h-gr_hi)
2242   (comment "general registers as high half word")
2243   (attrs PROFILE VIRTUAL)
2244   (type register UHI (64))
2245   (indices extern-keyword gr-names)
2246   (get (index) (c-call UHI "@cpu@_h_gr_hi_get_handler" index))
2247   (set (index newval) (c-call VOID "@cpu@_h_gr_hi_set_handler" index newval))
2248 )
2249 (define-hardware
2250   (name h-gr_lo)
2251   (comment "general registers as low half word")
2252   (attrs PROFILE VIRTUAL)
2253   (type register UHI (64))
2254   (indices extern-keyword gr-names)
2255   (get (index) (c-call UHI "@cpu@_h_gr_lo_get_handler" index))
2256   (set (index newval) (c-call VOID "@cpu@_h_gr_lo_set_handler" index newval))
2257 )
2258
2259 ; Floating Point Registers
2260 (define-keyword
2261   (name fr-names)
2262   (print-name h-fr)
2263   (prefix "")
2264   (values
2265    (fr0   0)(fr1   1)(fr2   2)(fr3   3)(fr4   4)(fr5   5)(fr6   6)(fr7   7)
2266    (fr8   8)(fr9   9)(fr10 10)(fr11 11)(fr12 12)(fr13 13)(fr14 14)(fr15 15)
2267    (fr16 16)(fr17 17)(fr18 18)(fr19 19)(fr20 20)(fr21 21)(fr22 22)(fr23 23)
2268    (fr24 24)(fr25 25)(fr26 26)(fr27 27)(fr28 28)(fr29 29)(fr30 30)(fr31 31)
2269    (fr32 32)(fr33 33)(fr34 34)(fr35 35)(fr36 36)(fr37 37)(fr38 38)(fr39 39)
2270    (fr40 40)(fr41 41)(fr42 42)(fr43 43)(fr44 44)(fr45 45)(fr46 46)(fr47 47)
2271    (fr48 48)(fr49 49)(fr50 50)(fr51 51)(fr52 52)(fr53 53)(fr54 54)(fr55 55)
2272    (fr56 56)(fr57 57)(fr58 58)(fr59 59)(fr60 60)(fr61 61)(fr62 62)(fr63 63)
2273   )
2274 )
2275
2276 (define-hardware
2277   (name h-fr)
2278   (comment "floating point registers")
2279   (attrs PROFILE)
2280   (type register SF (64))
2281   (indices extern-keyword fr-names)
2282   (get (index) (c-call SF "@cpu@_h_fr_get_handler" index))
2283   (set (index newval) (c-call VOID "@cpu@_h_fr_set_handler" index newval))
2284 )
2285
2286 ; Floating Point Registers as double precision
2287 ; These registers are shadowed onto h-fr
2288
2289 (define-hardware
2290   (name h-fr_double)
2291   (comment "floating point registers as double precision")
2292   (attrs PROFILE VIRTUAL)
2293   (type register DF (32))
2294   ; FIXME: Need constraint to prohibit odd numbers.
2295   (indices extern-keyword fr-names)
2296   (get (index)
2297        (c-call DF "@cpu@_h_fr_double_get_handler" index))
2298   (set (index newval)
2299        (c-call VOID "@cpu@_h_fr_double_set_handler" index newval))
2300 )
2301
2302 ; Floating Point Registers as integer words.
2303 ; These registers are shadowed onto h-fr
2304
2305 (define-hardware
2306   (name h-fr_int)
2307   (comment "floating point registers as integers")
2308   (attrs PROFILE VIRTUAL)
2309   (type register USI (64))
2310   (indices extern-keyword fr-names)
2311   (get (index)
2312        (c-call USI "@cpu@_h_fr_int_get_handler" index))
2313   (set (index newval)
2314        (c-call VOID "@cpu@_h_fr_int_set_handler" index newval))
2315 )
2316
2317 ; Floating Point Registers as high and low half words
2318 ; These registers are shadowed onto h-fr
2319 (define-hardware
2320   (name h-fr_hi)
2321   (comment "floating point registers as unsigned high half word")
2322   (attrs PROFILE VIRTUAL)
2323   (type register UHI (64))
2324   (indices extern-keyword fr-names)
2325   (get (regno) (srl (reg h-fr_int regno) 16))
2326   (set (regno newval) (set (reg h-fr_int regno)
2327                            (or (and (reg h-fr_int regno) #xffff)
2328                                (sll newval 16))))
2329 )
2330 (define-hardware
2331   (name h-fr_lo)
2332   (comment "floating point registers as unsigned low half word")
2333   (attrs PROFILE VIRTUAL)
2334   (type register UHI (64))
2335   (indices extern-keyword fr-names)
2336   (get (regno) (and (reg h-fr_int regno) #xffff))
2337   (set (regno newval) (set (reg h-fr_int regno)
2338                            (or (and (reg h-fr_int regno) #xffff0000)
2339                                (and newval #xffff))))
2340 )
2341
2342 ; Floating Point Registers as unsigned bytes
2343 ; These registers are shadowed onto h-fr
2344 (define-hardware
2345   (name h-fr_0)
2346   (comment "floating point registers as unsigned byte 0")
2347   (attrs PROFILE VIRTUAL)
2348   (type register UHI (64))
2349   (indices extern-keyword fr-names)
2350   (get (regno) (and (reg h-fr_int regno) #xff))
2351   (set (regno newval)
2352        (sequence ()
2353                  (if (gt USI newval #xff)
2354                      (set newval #xff))
2355                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffffff00)
2356                                            newval))))
2357 )
2358 (define-hardware
2359   (name h-fr_1)
2360   (comment "floating point registers as unsigned byte 1")
2361   (attrs PROFILE VIRTUAL)
2362   (type register UHI (64))
2363   (indices extern-keyword fr-names)
2364   (get (regno) (and (srl (reg h-fr_int regno) 8) #xff))
2365   (set (regno newval)
2366        (sequence ()
2367                  (if (gt USI newval #xff)
2368                      (set newval #xff))
2369                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffff00ff)
2370                                            (sll newval 8)))))
2371 )
2372 (define-hardware
2373   (name h-fr_2)
2374   (comment "floating point registers as unsigned byte 2")
2375   (attrs PROFILE VIRTUAL)
2376   (type register UHI (64))
2377   (indices extern-keyword fr-names)
2378   (get (regno) (and (srl (reg h-fr_int regno) 16) #xff))
2379   (set (regno newval)
2380        (sequence ()
2381                  (if (gt USI newval #xff)
2382                      (set newval #xff))
2383                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xff00ffff)
2384                                            (sll newval 16)))))
2385 )
2386 (define-hardware
2387   (name h-fr_3)
2388   (comment "floating point registers as unsigned byte 3")
2389   (attrs PROFILE VIRTUAL)
2390   (type register UHI (64))
2391   (indices extern-keyword fr-names)
2392   (get (regno) (and (srl (reg h-fr_int regno) 24) #xff))
2393   (set (regno newval)
2394        (sequence ()
2395                  (if (gt USI newval #xff)
2396                      (set newval #xff))
2397                  (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #x00ffffff)
2398                                            (sll newval 24)))))
2399 )
2400 ; Coprocessor Registers
2401 ;
2402 (define-keyword
2403   (name cpr-names)
2404   (print-name h-cpr)
2405   (prefix "")
2406   (values
2407 (cpr0   0)(cpr1   1)(cpr2   2)(cpr3   3)(cpr4   4)(cpr5   5)(cpr6   6)(cpr7   7)
2408 (cpr8   8)(cpr9   9)(cpr10 10)(cpr11 11)(cpr12 12)(cpr13 13)(cpr14 14)(cpr15 15)
2409 (cpr16 16)(cpr17 17)(cpr18 18)(cpr19 19)(cpr20 20)(cpr21 21)(cpr22 22)(cpr23 23)
2410 (cpr24 24)(cpr25 25)(cpr26 26)(cpr27 27)(cpr28 28)(cpr29 29)(cpr30 30)(cpr31 31)
2411 (cpr32 32)(cpr33 33)(cpr34 34)(cpr35 35)(cpr36 36)(cpr37 37)(cpr38 38)(cpr39 39)
2412 (cpr40 40)(cpr41 41)(cpr42 42)(cpr43 43)(cpr44 44)(cpr45 45)(cpr46 46)(cpr47 47)
2413 (cpr48 48)(cpr49 49)(cpr50 50)(cpr51 51)(cpr52 52)(cpr53 53)(cpr54 54)(cpr55 55)
2414 (cpr56 56)(cpr57 57)(cpr58 58)(cpr59 59)(cpr60 60)(cpr61 61)(cpr62 62)(cpr63 63)
2415   )
2416 )
2417
2418 (define-hardware
2419   (name h-cpr)
2420   (comment "coprocessor registers")
2421   (attrs PROFILE (MACH frv))
2422   (type register WI (64))
2423   (indices extern-keyword cpr-names)
2424 )
2425
2426 ; Coprocessor Registers as double words
2427 ; These registers are shadowed onto h-cpr
2428 (define-hardware
2429   (name h-cpr_double)
2430   (comment "coprocessor registers as double words")
2431   (attrs PROFILE VIRTUAL (MACH frv))
2432   (type register DI (32))
2433   ; FIXME: Need constraint to prohibit odd numbers.
2434   (indices extern-keyword cpr-names)
2435   (get (index)
2436        (c-call DI "@cpu@_h_cpr_double_get_handler" index))
2437   (set (index newval)
2438        (c-call VOID "@cpu@_h_cpr_double_set_handler" index newval))
2439 )
2440
2441 ; Special Purpose Registers
2442 ;
2443 (define-keyword
2444   (name spr-names)
2445   (print-name h-spr)
2446   (prefix "")
2447   (values
2448    (psr        0) (pcsr       1) (bpcsr      2) (tbr        3) (bpsr       4)
2449
2450    (hsr0      16) (hsr1      17) (hsr2      18) (hsr3      19)
2451    (hsr4      20) (hsr5      21) (hsr6      22) (hsr7      23)
2452    (hsr8      24) (hsr9      25) (hsr10     26) (hsr11     27)
2453    (hsr12     28) (hsr13     29) (hsr14     30) (hsr15     31)
2454    (hsr16     32) (hsr17     33) (hsr18     34) (hsr19     35)
2455    (hsr20     36) (hsr21     37) (hsr22     38) (hsr23     39)
2456    (hsr24     40) (hsr25     41) (hsr26     42) (hsr27     43)
2457    (hsr28     44) (hsr29     45) (hsr30     46) (hsr31     47)
2458    (hsr32     48) (hsr33     49) (hsr34     50) (hsr35     51)
2459    (hsr36     52) (hsr37     53) (hsr38     54) (hsr39     55)
2460    (hsr40     56) (hsr41     57) (hsr42     58) (hsr43     59)
2461    (hsr44     60) (hsr45     61) (hsr46     62) (hsr47     63)
2462    (hsr48     64) (hsr49     65) (hsr50     66) (hsr51     67)
2463    (hsr52     68) (hsr53     69) (hsr54     70) (hsr55     71)
2464    (hsr56     72) (hsr57     73) (hsr58     74) (hsr59     75)
2465    (hsr60     76) (hsr61     77) (hsr62     78) (hsr63     79)
2466
2467    (ccr      256) (cccr     263) (lr       272) (lcr      273) (iacc0h   280) (iacc0l   281) (isr      288)
2468
2469    (neear0   352) (neear1   353) (neear2   354) (neear3   355)
2470    (neear4   356) (neear5   357) (neear6   358) (neear7   359)
2471    (neear8   360) (neear9   361) (neear10  362) (neear11  363)
2472    (neear12  364) (neear13  365) (neear14  366) (neear15  367)
2473    (neear16  368) (neear17  369) (neear18  370) (neear19  371)
2474    (neear20  372) (neear21  373) (neear22  374) (neear23  375)
2475    (neear24  376) (neear25  377) (neear26  378) (neear27  379)
2476    (neear28  380) (neear29  381) (neear30  382) (neear31  383)
2477
2478    (nesr0    384) (nesr1    385) (nesr2    386) (nesr3    387)
2479    (nesr4    388) (nesr5    389) (nesr6    390) (nesr7    391)
2480    (nesr8    392) (nesr9    393) (nesr10   394) (nesr11   395)
2481    (nesr12   396) (nesr13   397) (nesr14   398) (nesr15   399)
2482    (nesr16   400) (nesr17   401) (nesr18   402) (nesr19   403)
2483    (nesr20   404) (nesr21   405) (nesr22   406) (nesr23   407)
2484    (nesr24   408) (nesr25   409) (nesr26   410) (nesr27   411)
2485    (nesr28   412) (nesr29   413) (nesr30   414) (nesr31   415)
2486
2487    (necr     416)
2488
2489    (gner0    432) (gner1    433)
2490
2491    (fner0    434) (fner1    435)
2492
2493    (epcr0    512) (epcr1    513) (epcr2    514) (epcr3    515)
2494    (epcr4    516) (epcr5    517) (epcr6    518) (epcr7    519)
2495    (epcr8    520) (epcr9    521) (epcr10   522) (epcr11   523)
2496    (epcr12   524) (epcr13   525) (epcr14   526) (epcr15   527)
2497    (epcr16   528) (epcr17   529) (epcr18   530) (epcr19   531)
2498    (epcr20   532) (epcr21   533) (epcr22   534) (epcr23   535)
2499    (epcr24   536) (epcr25   537) (epcr26   538) (epcr27   539)
2500    (epcr28   540) (epcr29   541) (epcr30   542) (epcr31   543)
2501    (epcr32   544) (epcr33   545) (epcr34   546) (epcr35   547)
2502    (epcr36   548) (epcr37   549) (epcr38   550) (epcr39   551)
2503    (epcr40   552) (epcr41   553) (epcr42   554) (epcr43   555)
2504    (epcr44   556) (epcr45   557) (epcr46   558) (epcr47   559)
2505    (epcr48   560) (epcr49   561) (epcr50   562) (epcr51   563)
2506    (epcr52   564) (epcr53   565) (epcr54   566) (epcr55   567)
2507    (epcr56   568) (epcr57   569) (epcr58   570) (epcr59   571)
2508    (epcr60   572) (epcr61   573) (epcr62   574) (epcr63   575)
2509
2510    (esr0     576) (esr1     577) (esr2     578) (esr3     579)
2511    (esr4     580) (esr5     581) (esr6     582) (esr7     583)
2512    (esr8     584) (esr9     585) (esr10    586) (esr11    587)
2513    (esr12    588) (esr13    589) (esr14    590) (esr15    591)
2514    (esr16    592) (esr17    593) (esr18    594) (esr19    595)
2515    (esr20    596) (esr21    597) (esr22    598) (esr23    599)
2516    (esr24    600) (esr25    601) (esr26    602) (esr27    603)
2517    (esr28    604) (esr29    605) (esr30    606) (esr31    607)
2518    (esr32    608) (esr33    609) (esr34    610) (esr35    611)
2519    (esr36    612) (esr37    613) (esr38    614) (esr39    615)
2520    (esr40    616) (esr41    617) (esr42    618) (esr43    619)
2521    (esr44    620) (esr45    621) (esr46    622) (esr47    623)
2522    (esr48    624) (esr49    625) (esr50    626) (esr51    627)
2523    (esr52    628) (esr53    629) (esr54    630) (esr55    631)
2524    (esr56    632) (esr57    633) (esr58    634) (esr59    635)
2525    (esr60    636) (esr61    637) (esr62    638) (esr63    639)
2526
2527    (eir0     640) (eir1     641) (eir2     642) (eir3     643)
2528    (eir4     644) (eir5     645) (eir6     646) (eir7     647)
2529    (eir8     648) (eir9     649) (eir10    650) (eir11    651)
2530    (eir12    652) (eir13    653) (eir14    654) (eir15    655)
2531    (eir16    656) (eir17    657) (eir18    658) (eir19    659)
2532    (eir20    660) (eir21    661) (eir22    662) (eir23    663)
2533    (eir24    664) (eir25    665) (eir26    666) (eir27    667)
2534    (eir28    668) (eir29    669) (eir30    670) (eir31    671)
2535
2536    (esfr0    672) (esfr1    673)
2537
2538    (sr0      768) (sr1      769) (sr2      770) (sr3      771)
2539
2540    (scr0     832) (scr1     833) (scr2     834) (scr3     835)
2541
2542    (fsr0    1024) (fsr1    1025) (fsr2    1026) (fsr3    1027)
2543    (fsr4    1028) (fsr5    1029) (fsr6    1030) (fsr7    1031)
2544    (fsr8    1032) (fsr9    1033) (fsr10   1034) (fsr11   1035)
2545    (fsr12   1036) (fsr13   1037) (fsr14   1038) (fsr15   1039)
2546    (fsr16   1040) (fsr17   1041) (fsr18   1042) (fsr19   1043)
2547    (fsr20   1044) (fsr21   1045) (fsr22   1046) (fsr23   1047)
2548    (fsr24   1048) (fsr25   1049) (fsr26   1050) (fsr27   1051)
2549    (fsr28   1052) (fsr29   1053) (fsr30   1054) (fsr31   1055)
2550    (fsr32   1056) (fsr33   1057) (fsr34   1058) (fsr35   1059)
2551    (fsr36   1060) (fsr37   1061) (fsr38   1062) (fsr39   1063)
2552    (fsr40   1064) (fsr41   1065) (fsr42   1066) (fsr43   1067)
2553    (fsr44   1068) (fsr45   1069) (fsr46   1070) (fsr47   1071)
2554    (fsr48   1072) (fsr49   1073) (fsr50   1074) (fsr51   1075)
2555    (fsr52   1076) (fsr53   1077) (fsr54   1078) (fsr55   1079)
2556    (fsr56   1080) (fsr57   1081) (fsr58   1082) (fsr59   1083)
2557    (fsr60   1084) (fsr61   1085) (fsr62   1086) (fsr63   1087)
2558
2559    ; FQ0-FQ31 are 64 bit registers.
2560    ; These names allow access to the upper 32 bits of the FQ registers.
2561    (fqop0   1088) (fqop1   1090) (fqop2   1092) (fqop3   1094)
2562    (fqop4   1096) (fqop5   1098) (fqop6   1100) (fqop7   1102)
2563    (fqop8   1104) (fqop9   1106) (fqop10  1108) (fqop11  1110)
2564    (fqop12  1112) (fqop13  1114) (fqop14  1116) (fqop15  1118)
2565    (fqop16  1120) (fqop17  1122) (fqop18  1124) (fqop19  1126)
2566    (fqop20  1128) (fqop21  1130) (fqop22  1132) (fqop23  1134)
2567    (fqop24  1136) (fqop25  1138) (fqop26  1140) (fqop27  1142)
2568    (fqop28  1144) (fqop29  1146) (fqop30  1148) (fqop31  1150)
2569    ; These names allow access to the lower 32 bits of the FQ registers.
2570    (fqst0   1089) (fqst1   1091) (fqst2   1093) (fqst3   1095)
2571    (fqst4   1097) (fqst5   1099) (fqst6   1101) (fqst7   1103)
2572    (fqst8   1105) (fqst9   1107) (fqst10  1109) (fqst11  1111)
2573    (fqst12  1113) (fqst13  1115) (fqst14  1117) (fqst15  1119)
2574    (fqst16  1121) (fqst17  1123) (fqst18  1125) (fqst19  1127)
2575    (fqst20  1129) (fqst21  1131) (fqst22  1133) (fqst23  1135)
2576    (fqst24  1137) (fqst25  1139) (fqst26  1141) (fqst27  1143)
2577    (fqst28  1145) (fqst29  1147) (fqst30  1149) (fqst31  1151)
2578    ; These also access the lower 32 bits of the FQ registers.
2579    ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2580 ;  (fq0     1089) (fq1     1091) (fq2     1093) (fq3     1095)
2581 ;  (fq4     1097) (fq5     1099) (fq6     1101) (fq7     1103)
2582 ;  (fq8     1105) (fq9     1107) (fq10    1109) (fq11    1111)
2583 ;  (fq12    1113) (fq13    1115) (fq14    1117) (fq15    1119)
2584 ;  (fq16    1121) (fq17    1123) (fq18    1125) (fq19    1127)
2585 ;  (fq20    1129) (fq21    1131) (fq22    1133) (fq23    1135)
2586 ;  (fq24    1137) (fq25    1139) (fq26    1141) (fq27    1143)
2587 ;  (fq28    1145) (fq29    1147) (fq30    1149) (fq31    1151)
2588
2589    (mcilr0  1272) (mcilr1  1273)
2590
2591    (msr0    1280) (msr1    1281) (msr2    1282) (msr3    1283)
2592    (msr4    1284) (msr5    1285) (msr6    1286) (msr7    1287)
2593    (msr8    1288) (msr9    1289) (msr10   1290) (msr11   1291)
2594    (msr12   1292) (msr13   1293) (msr14   1294) (msr15   1295)
2595    (msr16   1296) (msr17   1297) (msr18   1298) (msr19   1299)
2596    (msr20   1300) (msr21   1301) (msr22   1302) (msr23   1303)
2597    (msr24   1304) (msr25   1305) (msr26   1306) (msr27   1307)
2598    (msr28   1308) (msr29   1309) (msr30   1310) (msr31   1311)
2599    (msr32   1312) (msr33   1313) (msr34   1314) (msr35   1315)
2600    (msr36   1316) (msr37   1317) (msr38   1318) (msr39   1319)
2601    (msr40   1320) (msr41   1321) (msr42   1322) (msr43   1323)
2602    (msr44   1324) (msr45   1325) (msr46   1326) (msr47   1327)
2603    (msr48   1328) (msr49   1329) (msr50   1330) (msr51   1331)
2604    (msr52   1332) (msr53   1333) (msr54   1334) (msr55   1335)
2605    (msr56   1336) (msr57   1337) (msr58   1338) (msr59   1339)
2606    (msr60   1340) (msr61   1341) (msr62   1342) (msr63   1343)
2607
2608    ; MQ0-MQ31 are 64 bit registers.
2609    ; These names allow access to the upper 32 bits of the MQ registers.
2610    (mqop0   1344) (mqop1   1346) (mqop2   1348) (mqop3   1350)
2611    (mqop4   1352) (mqop5   1354) (mqop6   1356) (mqop7   1358)
2612    (mqop8   1360) (mqop9   1362) (mqop10  1364) (mqop11  1366)
2613    (mqop12  1368) (mqop13  1370) (mqop14  1372) (mqop15  1374)
2614    (mqop16  1376) (mqop17  1378) (mqop18  1380) (mqop19  1382)
2615    (mqop20  1384) (mqop21  1386) (mqop22  1388) (mqop23  1390)
2616    (mqop24  1392) (mqop25  1394) (mqop26  1396) (mqop27  1398)
2617    (mqop28  1400) (mqop29  1402) (mqop30  1404) (mqop31  1406)
2618    ; These names allow access to the lower 32 bits of the MQ registers.
2619    (mqst0   1345) (mqst1   1347) (mqst2   1349) (mqst3   1351)
2620    (mqst4   1353) (mqst5   1355) (mqst6   1357) (mqst7   1359)
2621    (mqst8   1361) (mqst9   1363) (mqst10  1365) (mqst11  1367)
2622    (mqst12  1369) (mqst13  1371) (mqst14  1373) (mqst15  1375)
2623    (mqst16  1377) (mqst17  1379) (mqst18  1381) (mqst19  1383)
2624    (mqst20  1385) (mqst21  1387) (mqst22  1389) (mqst23  1391)
2625    (mqst24  1393) (mqst25  1395) (mqst26  1397) (mqst27  1399)
2626    (mqst28  1401) (mqst29  1403) (mqst30  1405) (mqst31  1407)
2627    ; These also access the lower 32 bits of the MQ registers.
2628    ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2629 ;  (mq0     1345) (mq1     1347) (mq2     1349) (mq3     1351)
2630 ;  (mq4     1353) (mq5     1355) (mq6     1357) (mq7     1359)
2631 ;  (mq8     1361) (mq9     1363) (mq10    1365) (mq11    1367)
2632 ;  (mq12    1369) (mq13    1371) (mq14    1373) (mq15    1375)
2633 ;  (mq16    1377) (mq17    1379) (mq18    1381) (mq19    1383)
2634 ;  (mq20    1385) (mq21    1387) (mq22    1389) (mq23    1391)
2635 ;  (mq24    1393) (mq25    1395) (mq26    1397) (mq27    1399)
2636 ;  (mq28    1401) (mq29    1403) (mq30    1405) (mq31    1407)
2637
2638    ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2639 ;  (acc0    1408) (acc1    1409) (acc2    1410) (acc3    1411)
2640 ;  (acc4    1412) (acc5    1413) (acc6    1414) (acc7    1415)
2641 ;  (acc8    1416) (acc9    1417) (acc10   1418) (acc11   1419)
2642 ;  (acc12   1420) (acc13   1421) (acc14   1422) (acc15   1423)
2643 ;  (acc16   1424) (acc17   1425) (acc18   1426) (acc19   1427)
2644 ;  (acc20   1428) (acc21   1429) (acc22   1430) (acc23   1431)
2645 ;  (acc24   1432) (acc25   1433) (acc26   1434) (acc27   1435)
2646 ;  (acc28   1436) (acc29   1437) (acc30   1438) (acc31   1439)
2647 ;  (acc32   1440) (acc33   1441) (acc34   1442) (acc35   1443)
2648 ;  (acc36   1444) (acc37   1445) (acc38   1446) (acc39   1447)
2649 ;  (acc40   1448) (acc41   1449) (acc42   1450) (acc43   1451)
2650 ;  (acc44   1452) (acc45   1453) (acc46   1454) (acc47   1455)
2651 ;  (acc48   1456) (acc49   1457) (acc50   1458) (acc51   1459)
2652 ;  (acc52   1460) (acc53   1461) (acc54   1462) (acc55   1463)
2653 ;  (acc56   1464) (acc57   1465) (acc58   1466) (acc59   1467)
2654 ;  (acc60   1468) (acc61   1469) (acc62   1470) (acc63   1471)
2655
2656 ;  (accg0   1472) (accg1   1473) (accg2   1474) (accg3   1475)
2657 ;  (accg4   1476) (accg5   1477) (accg6   1478) (accg7   1479)
2658 ;  (accg8   1480) (accg9   1481) (accg10  1482) (accg11  1483)
2659 ;  (accg12  1484) (accg13  1485) (accg14  1486) (accg15  1487)
2660 ;  (accg16  1488) (accg17  1489) (accg18  1490) (accg19  1491)
2661 ;  (accg20  1492) (accg21  1493) (accg22  1494) (accg23  1495)
2662 ;  (accg24  1496) (accg25  1497) (accg26  1498) (accg27  1499)
2663 ;  (accg28  1500) (accg29  1501) (accg30  1502) (accg31  1503)
2664 ;  (accg32  1504) (accg33  1505) (accg34  1506) (accg35  1507)
2665 ;  (accg36  1508) (accg37  1509) (accg38  1510) (accg39  1511)
2666 ;  (accg40  1512) (accg41  1513) (accg42  1514) (accg43  1515)
2667 ;  (accg44  1516) (accg45  1517) (accg46  1518) (accg47  1519)
2668 ;  (accg48  1520) (accg49  1521) (accg50  1522) (accg51  1523)
2669 ;  (accg52  1524) (accg53  1525) (accg54  1526) (accg55  1527)
2670 ;  (accg56  1528) (accg57  1529) (accg58  1530) (accg59  1531)
2671 ;  (accg60  1532) (accg61  1533) (accg62  1534) (accg63  1535)
2672
2673    (ear0    1536) (ear1    1537) (ear2    1538) (ear3    1539)
2674    (ear4    1540) (ear5    1541) (ear6    1542) (ear7    1543)
2675    (ear8    1544) (ear9    1545) (ear10   1546) (ear11   1547)
2676    (ear12   1548) (ear13   1549) (ear14   1550) (ear15   1551)
2677    (ear16   1552) (ear17   1553) (ear18   1554) (ear19   1555)
2678    (ear20   1556) (ear21   1557) (ear22   1558) (ear23   1559)
2679    (ear24   1560) (ear25   1561) (ear26   1562) (ear27   1563)
2680    (ear28   1564) (ear29   1565) (ear30   1566) (ear31   1567)
2681    (ear32   1568) (ear33   1569) (ear34   1570) (ear35   1571)
2682    (ear36   1572) (ear37   1573) (ear38   1574) (ear39   1575)
2683    (ear40   1576) (ear41   1577) (ear42   1578) (ear43   1579)
2684    (ear44   1580) (ear45   1581) (ear46   1582) (ear47   1583)
2685    (ear48   1584) (ear49   1585) (ear50   1586) (ear51   1587)
2686    (ear52   1588) (ear53   1589) (ear54   1590) (ear55   1591)
2687    (ear56   1592) (ear57   1593) (ear58   1594) (ear59   1595)
2688    (ear60   1596) (ear61   1597) (ear62   1598) (ear63   1599)
2689
2690    (edr0    1600) (edr1    1601) (edr2    1602) (edr3    1603)
2691    (edr4    1604) (edr5    1605) (edr6    1606) (edr7    1607)
2692    (edr8    1608) (edr9    1609) (edr10   1610) (edr11   1611)
2693    (edr12   1612) (edr13   1613) (edr14   1614) (edr15   1615)
2694    (edr16   1616) (edr17   1617) (edr18   1618) (edr19   1619)
2695    (edr20   1620) (edr21   1621) (edr22   1622) (edr23   1623)
2696    (edr24   1624) (edr25   1625) (edr26   1626) (edr27   1627)
2697    (edr28   1628) (edr29   1629) (edr30   1630) (edr31   1631)
2698    (edr32   1632) (edr33   1636) (edr34   1634) (edr35   1635)
2699    (edr36   1636) (edr37   1637) (edr38   1638) (edr39   1639)
2700    (edr40   1640) (edr41   1641) (edr42   1642) (edr43   1643)
2701    (edr44   1644) (edr45   1645) (edr46   1646) (edr47   1647)
2702    (edr48   1648) (edr49   1649) (edr50   1650) (edr51   1651)
2703    (edr52   1652) (edr53   1653) (edr54   1654) (edr55   1655)
2704    (edr56   1656) (edr57   1657) (edr58   1658) (edr59   1659)
2705    (edr60   1660) (edr61   1661) (edr62   1662) (edr63   1663)
2706
2707    (iamlr0  1664) (iamlr1  1665) (iamlr2  1666) (iamlr3  1667)
2708    (iamlr4  1668) (iamlr5  1669) (iamlr6  1670) (iamlr7  1671)
2709    (iamlr8  1672) (iamlr9  1673) (iamlr10 1674) (iamlr11 1675)
2710    (iamlr12 1676) (iamlr13 1677) (iamlr14 1678) (iamlr15 1679)
2711    (iamlr16 1680) (iamlr17 1681) (iamlr18 1682) (iamlr19 1683)
2712    (iamlr20 1684) (iamlr21 1685) (iamlr22 1686) (iamlr23 1687)
2713    (iamlr24 1688) (iamlr25 1689) (iamlr26 1690) (iamlr27 1691)
2714    (iamlr28 1692) (iamlr29 1693) (iamlr30 1694) (iamlr31 1695)
2715    (iamlr32 1696) (iamlr33 1697) (iamlr34 1698) (iamlr35 1699)
2716    (iamlr36 1700) (iamlr37 1701) (iamlr38 1702) (iamlr39 1703)
2717    (iamlr40 1704) (iamlr41 1705) (iamlr42 1706) (iamlr43 1707)
2718    (iamlr44 1708) (iamlr45 1709) (iamlr46 1710) (iamlr47 1711)
2719    (iamlr48 1712) (iamlr49 1713) (iamlr50 1714) (iamlr51 1715)
2720    (iamlr52 1716) (iamlr53 1717) (iamlr54 1718) (iamlr55 1719)
2721    (iamlr56 1720) (iamlr57 1721) (iamlr58 1722) (iamlr59 1723)
2722    (iamlr60 1724) (iamlr61 1725) (iamlr62 1726) (iamlr63 1727)
2723
2724    (iampr0  1728) (iampr1  1729) (iampr2  1730) (iampr3  1731)
2725    (iampr4  1732) (iampr5  1733) (iampr6  1734) (iampr7  1735)
2726    (iampr8  1736) (iampr9  1737) (iampr10 1738) (iampr11 1739)
2727    (iampr12 1740) (iampr13 1741) (iampr14 1742) (iampr15 1743)
2728    (iampr16 1744) (iampr17 1745) (iampr18 1746) (iampr19 1747)
2729    (iampr20 1748) (iampr21 1749) (iampr22 1750) (iampr23 1751)
2730    (iampr24 1752) (iampr25 1753) (iampr26 1754) (iampr27 1755)
2731    (iampr28 1756) (iampr29 1757) (iampr30 1758) (iampr31 1759)
2732    (iampr32 1760) (iampr33 1761) (iampr34 1762) (iampr35 1763)
2733    (iampr36 1764) (iampr37 1765) (iampr38 1766) (iampr39 1767)
2734    (iampr40 1768) (iampr41 1769) (iampr42 1770) (iampr43 1771)
2735    (iampr44 1772) (iampr45 1773) (iampr46 1774) (iampr47 1775)
2736    (iampr48 1776) (iampr49 1777) (iampr50 1778) (iampr51 1779)
2737    (iampr52 1780) (iampr53 1781) (iampr54 1782) (iampr55 1783)
2738    (iampr56 1784) (iampr57 1785) (iampr58 1786) (iampr59 1787)
2739    (iampr60 1788) (iampr61 1789) (iampr62 1790) (iampr63 1791)
2740
2741    (damlr0  1792) (damlr1  1793) (damlr2  1794) (damlr3  1795)
2742    (damlr4  1796) (damlr5  1797) (damlr6  1798) (damlr7  1799)
2743    (damlr8  1800) (damlr9  1801) (damlr10 1802) (damlr11 1803)
2744    (damlr12 1804) (damlr13 1805) (damlr14 1806) (damlr15 1807)
2745    (damlr16 1808) (damlr17 1809) (damlr18 1810) (damlr19 1811)
2746    (damlr20 1812) (damlr21 1813) (damlr22 1814) (damlr23 1815)
2747    (damlr24 1816) (damlr25 1817) (damlr26 1818) (damlr27 1819)
2748    (damlr28 1820) (damlr29 1821) (damlr30 1822) (damlr31 1823)
2749    (damlr32 1824) (damlr33 1825) (damlr34 1826) (damlr35 1827)
2750    (damlr36 1828) (damlr37 1829) (damlr38 1830) (damlr39 1831)
2751    (damlr40 1832) (damlr41 1833) (damlr42 1834) (damlr43 1835)
2752    (damlr44 1836) (damlr45 1837) (damlr46 1838) (damlr47 1839)
2753    (damlr48 1840) (damlr49 1841) (damlr50 1842) (damlr51 1843)
2754    (damlr52 1844) (damlr53 1845) (damlr54 1846) (damlr55 1847)
2755    (damlr56 1848) (damlr57 1849) (damlr58 1850) (damlr59 1851)
2756    (damlr60 1852) (damlr61 1853) (damlr62 1854) (damlr63 1855)
2757
2758    (dampr0  1856) (dampr1  1857) (dampr2  1858) (dampr3  1859)
2759    (dampr4  1860) (dampr5  1861) (dampr6  1862) (dampr7  1863)
2760    (dampr8  1864) (dampr9  1865) (dampr10 1866) (dampr11 1867)
2761    (dampr12 1868) (dampr13 1869) (dampr14 1870) (dampr15 1871)
2762    (dampr16 1872) (dampr17 1873) (dampr18 1874) (dampr19 1875)
2763    (dampr20 1876) (dampr21 1877) (dampr22 1878) (dampr23 1879)
2764    (dampr24 1880) (dampr25 1881) (dampr26 1882) (dampr27 1883)
2765    (dampr28 1884) (dampr29 1885) (dampr30 1886) (dampr31 1887)
2766    (dampr32 1888) (dampr33 1889) (dampr34 1890) (dampr35 1891)
2767    (dampr36 1892) (dampr37 1893) (dampr38 1894) (dampr39 1895)
2768    (dampr40 1896) (dampr41 1897) (dampr42 1898) (dampr43 1899)
2769    (dampr44 1900) (dampr45 1901) (dampr46 1902) (dampr47 1903)
2770    (dampr48 1904) (dampr49 1905) (dampr50 1906) (dampr51 1907)
2771    (dampr52 1908) (dampr53 1909) (dampr54 1910) (dampr55 1911)
2772    (dampr56 1912) (dampr57 1913) (dampr58 1914) (dampr59 1915)
2773    (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919)
2774
2775    (amcr    1920) (stbar   1921) (mmcr    1922)
2776    (iamvr1  1925) (damvr1  1927)
2777    (cxnr    1936) (ttbr    1937) (tplr    1938) (tppr    1939)
2778    (tpxr    1940)
2779    (timerh  1952) (timerl  1953) (timerd  1954)
2780    (dcr     2048) (brr     2049) (nmar    2050) (btbr    2051)
2781
2782    (ibar0   2052) (ibar1   2053) (ibar2   2054) (ibar3   2055)
2783    (dbar0   2056) (dbar1   2057) (dbar2   2058) (dbar3   2059)
2784
2785    (dbdr00  2060) (dbdr01  2061) (dbdr02  2062) (dbdr03  2063)
2786    (dbdr10  2064) (dbdr11  2065) (dbdr12  2066) (dbdr13  2067)
2787    (dbdr20  2068) (dbdr21  2069) (dbdr22  2070) (dbdr23  2071)
2788    (dbdr30  2072) (dbdr31  2073) (dbdr32  2074) (dbdr33  2075)
2789
2790    (dbmr00  2076) (dbmr01  2077) (dbmr02  2078) (dbmr03  2079)
2791    (dbmr10  2080) (dbmr11  2081) (dbmr12  2082) (dbmr13  2083)
2792    (dbmr20  2084) (dbmr21  2085) (dbmr22  2086) (dbmr23  2087)
2793    (dbmr30  2088) (dbmr31  2089) (dbmr32  2090) (dbmr33  2091)
2794
2795    (cpcfr   2092) (cpcr    2093) (cpsr    2094)
2796
2797    (cpesr0  2096) (cpesr1  2097)
2798    (cpemr0  2098) (cpemr1  2099)
2799
2800    (ihsr8   3848)
2801   )
2802 )
2803
2804 (define-hardware
2805   (name h-spr)
2806   (comment "special purpose registers")
2807   (attrs PROFILE)
2808   (type register UWI (4096))
2809   (indices extern-keyword spr-names)
2810   (get (index) (c-call UWI "@cpu@_h_spr_get_handler" index))
2811   (set (index newval) (c-call VOID "@cpu@_h_spr_set_handler" index newval))
2812 )
2813
2814 (define-pmacro (spr-pcsr)  (reg h-spr   1))
2815 (define-pmacro (spr-bpcsr) (reg h-spr   2))
2816 (define-pmacro (spr-lr)    (reg h-spr 272))
2817 (define-pmacro (spr-lcr)   (reg h-spr 273))
2818 (define-pmacro (spr-iacc0h) (reg h-spr 280))
2819 (define-pmacro (spr-iacc0l) (reg h-spr 281))
2820 (define-pmacro (spr-sr0)   (reg h-spr 768))
2821 (define-pmacro (spr-sr1)   (reg h-spr 769))
2822 (define-pmacro (spr-sr2)   (reg h-spr 770))
2823 (define-pmacro (spr-sr3)   (reg h-spr 771))
2824
2825 ; Accumulator guard. Actually a subset of the SPR registers, but those SPRs
2826 ; are read-only in most insns. This hardware element is used by those insns
2827 ; which have direct access (mwtaccg, mrdaccg).
2828 (define-keyword
2829   (name accg-names)
2830   (print-name h-accg)
2831   (prefix "")
2832   (values
2833    (accg0   0)(accg1   1)(accg2   2)(accg3   3)
2834    (accg4   4)(accg5   5)(accg6   6)(accg7   7)
2835    (accg8   8)(accg9   9)(accg10 10)(accg11 11)
2836    (accg12 12)(accg13 13)(accg14 14)(accg15 15)
2837    (accg16 16)(accg17 17)(accg18 18)(accg19 19)
2838    (accg20 20)(accg21 21)(accg22 22)(accg23 23)
2839    (accg24 24)(accg25 25)(accg26 26)(accg27 27)
2840    (accg28 28)(accg29 29)(accg30 30)(accg31 31)
2841    (accg32 32)(accg33 33)(accg34 34)(accg35 35)
2842    (accg36 36)(accg37 37)(accg38 38)(accg39 39)
2843    (accg40 40)(accg41 41)(accg42 42)(accg43 43)
2844    (accg44 44)(accg45 45)(accg46 46)(accg47 47)
2845    (accg48 48)(accg49 49)(accg50 50)(accg51 51)
2846    (accg52 52)(accg53 53)(accg54 54)(accg55 55)
2847    (accg56 56)(accg57 57)(accg58 58)(accg59 59)
2848    (accg60 60)(accg61 61)(accg62 62)(accg63 63)
2849   )
2850 )
2851
2852 (define-hardware
2853   (name h-accg)
2854   (comment "accumulator guard")
2855   (attrs PROFILE VIRTUAL)
2856   (type register UWI (64))
2857   (indices extern-keyword accg-names)
2858   (get (index)
2859        (and (reg h-spr (add index 1472)) #xff))
2860   (set (index newval)
2861        (set (raw-reg UWI h-spr (add index 1472)) (and newval #xff)))
2862 )
2863
2864 ; 40 bit accumulator. Composed of ACCG and ACC registers concatenated, but
2865 ; referenced more often as the composed 40 bits.
2866 (define-keyword
2867   (name acc-names)
2868   (print-name h-acc40)
2869   (prefix "")
2870   (values
2871 (acc0   0)(acc1   1)(acc2   2)(acc3   3)(acc4   4)(acc5   5)(acc6   6)(acc7   7)
2872 (acc8   8)(acc9   9)(acc10 10)(acc11 11)(acc12 12)(acc13 13)(acc14 14)(acc15 15)
2873 (acc16 16)(acc17 17)(acc18 18)(acc19 19)(acc20 20)(acc21 21)(acc22 22)(acc23 23)
2874 (acc24 24)(acc25 25)(acc26 26)(acc27 27)(acc28 28)(acc29 29)(acc30 30)(acc31 31)
2875 (acc32 32)(acc33 33)(acc34 34)(acc35 35)(acc36 36)(acc37 37)(acc38 38)(acc39 39)
2876 (acc40 40)(acc41 41)(acc42 42)(acc43 43)(acc44 44)(acc45 45)(acc46 46)(acc47 47)
2877 (acc48 48)(acc49 49)(acc50 50)(acc51 51)(acc52 52)(acc53 53)(acc54 54)(acc55 55)
2878 (acc56 56)(acc57 57)(acc58 58)(acc59 59)(acc60 60)(acc61 61)(acc62 62)(acc63 63)
2879   )
2880 )
2881
2882 (define-hardware
2883   (name h-acc40S)
2884   (comment "40 bit signed accumulator")
2885   (attrs PROFILE VIRTUAL)
2886   (type register DI (64))
2887   (indices extern-keyword acc-names)
2888   ; The accumlator is made up of two 32 bit registers, accgi/acci.
2889   ; We want to extract this as a combined 40 signed bits
2890   (get (index)
2891        (or DI
2892            (sll  DI (ext DI (trunc QI (reg h-spr (add index 1472))))
2893                  32)
2894            (zext DI (reg h-spr (add index 1408)))))
2895   ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
2896   ; on ACC and ACCG registers
2897   (set (index newval)
2898        (sequence ()
2899                  (c-call VOID "frv_check_spr_write_access" (add index 1408))
2900                  (set (raw-reg UWI h-spr
2901                                (add index 1472)) (and (srl newval 32) #xff))
2902                  (set (raw-reg UWI h-spr
2903                                (add index 1408)) (trunc USI newval))))
2904 )
2905
2906 (define-hardware
2907   (name h-acc40U)
2908   (comment "40 bit unsigned accumulator")
2909   (attrs PROFILE VIRTUAL)
2910   (type register UDI (64))
2911   (indices extern-keyword acc-names)
2912   ; The accumlator is made up of two 32 bit registers, accgi/acci.
2913   ; We want to extract this as a combined 40 unsigned bits
2914   (get (index)
2915        (or DI
2916            (sll  DI (zext DI (reg h-spr (add index 1472))) 32)
2917            (zext DI (reg h-spr (add index 1408)))))
2918   ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
2919   ; on ACC and ACCG registers
2920   (set (index newval)
2921        (sequence ()
2922                  (c-call VOID "frv_check_spr_write_access" (add index 1408))
2923                  (set (raw-reg UWI h-spr
2924                                (add index 1472)) (and (srl newval 32) #xff))
2925                  (set (raw-reg UWI h-spr
2926                                (add index 1408)) (trunc USI newval))))
2927 )
2928 ; 64-bit signed accumulator.  Composed of iacc0h and iacc0l registers
2929 ; concatenated, but referenced more often as the composed 64 bits.
2930 (define-keyword
2931   ; This is totally hokey -- I have to have an index!
2932   (name iacc0-names)
2933   (print-name h-iacc0)
2934   (prefix "")
2935   (values (iacc0 0))
2936 )
2937
2938 (define-hardware
2939   (name h-iacc0)
2940   (comment "64 bit signed accumulator")
2941   (attrs PROFILE VIRTUAL (MACH fr400,fr450))
2942   (type register DI (1))
2943   (indices extern-keyword iacc0-names)
2944   ; The single 64-bit integer accumulator is made up of two 32 bit
2945   ; registers, iacc0h and iacc0l.  We want to extract this as a
2946   ; combined 64 signed bits.
2947   (get (idx) (or DI (sll DI (ext DI (spr-iacc0h)) 32) (zext DI (spr-iacc0l))))
2948   (set (idx newval)
2949        (sequence ()
2950                  (set (spr-iacc0h) (trunc SI (srl newval 32)))
2951                  (set (spr-iacc0l) (trunc SI newval))))
2952 )
2953
2954 ; Integer condition code registers (CCR)
2955 ;
2956 ; The individual sub registers bits of the CCR are referenced more often than
2957 ; the entire register so set them directly. We can assemble the
2958 ; entire register when necessary.
2959 ;
2960 (define-keyword
2961   (name iccr-names)
2962   (print-name h-iccr)
2963   (prefix "")
2964   (values (icc0 0) (icc1 1) (icc2 2) (icc3 3))
2965 )
2966
2967 (define-hardware
2968   (name h-iccr)
2969   (comment "Integer condition code registers")
2970   (attrs PROFILE)
2971   (type register UQI (4))
2972   (indices extern-keyword iccr-names)
2973 )
2974
2975 ; Floating point condition code registers (CCR)
2976 ;
2977 ; The individual sub registers bits of the CCR are referenced more often than
2978 ; the entire register so set them directly. We can assemble the
2979 ; entire register when necessary.
2980 ;
2981 (define-keyword
2982   (name fccr-names)
2983   (print-name h-fccr)
2984   (prefix "")
2985   (values (fcc0 0) (fcc1 1) (fcc2 2) (fcc3 3))
2986 )
2987
2988 (define-hardware
2989   (name h-fccr)
2990   (comment "Floating point condition code registers")
2991   (attrs PROFILE)
2992   (type register UQI (4))
2993   (indices extern-keyword fccr-names)
2994 )
2995
2996 ; C condition code registers (CCCR)
2997 ;
2998 (define-keyword
2999   (name cccr-names)
3000   (print-name h-cccr)
3001   (prefix "")
3002   (values (cc0 0) (cc1 1) (cc2 2) (cc3 3) (cc4 4) (cc5 5) (cc6 6) (cc7 7))
3003 )
3004
3005 (define-hardware
3006   (name h-cccr)
3007   (comment "Condition code registers")
3008   (attrs PROFILE)
3009   (type register UQI (8))
3010   (indices extern-keyword cccr-names)
3011 )
3012 \f
3013 ; Dummy hardware used to define packing bit on insns
3014 ;
3015 (define-hardware
3016   (name h-pack)
3017   (comment "Packing bit dummy hardware")
3018   (type immediate (UINT 1))
3019   (values keyword "" (("" 1) (".p" 0) (".P" 0)))
3020 )
3021 ; Dummy hardware used to define hint field for branches always taken
3022 ;
3023 (define-hardware
3024   (name h-hint-taken)
3025   (comment "Branch taken hint dummy hardware")
3026   (type immediate (UINT 1))
3027   ; The order of these is important. We want '2' to get written by default,
3028   ; but we also want the docoder/disassembler to allow the values '0', '1' and
3029   ; '3'.
3030   (values keyword "" (("" 2) ("" 0) ("" 1) ("" 3)))
3031 )
3032 ; Dummy hardware used to define hint field for branches never taken
3033 ;
3034 (define-hardware
3035   (name h-hint-not-taken)
3036   (comment "Branch not taken hint dummy hardware")
3037   (type immediate (UINT 1))
3038   ; The order of these is important. We want '0' to get written by default,
3039   ; but we also want the docoder/disassembler to allow the values '1', '2' and
3040   ; '3'.
3041   (values keyword "" (("" 0) ("" 1) ("" 2) ("" 3)))
3042 )
3043 \f
3044 ; Instruction Operands.
3045 ; These entries provide a layer between the assembler and the raw hardware
3046 ; description, and are used to refer to hardware elements in the semantic
3047 ; code.  Usually there's a bit of over-specification, but in more complicated
3048 ; instruction sets there isn't.
3049
3050 ; FRV specific operand attributes:
3051
3052 (define-attr
3053   (for operand)
3054   (type boolean)
3055   (name HASH-PREFIX)
3056   (comment "immediates have an optional '#' prefix")
3057 )
3058
3059 ; ??? Convention says this should be o-sr, but then the insn definitions
3060 ; should refer to o-sr which is clumsy.  The "o-" could be implicit, but
3061 ; then it should be implicit for all the symbols here, but then there would
3062 ; be confusion between (f-)simm8 and (h-)simm8.
3063 ; So for now the rule is exactly as it appears here.
3064
3065 ; dnmop: define-normal-mode-operand: temporary, pending potential removal
3066 ; of modes from h/w.
3067 (define-pmacro (dnmop xname xcomment xattrs xtype xindex xmode)
3068   (define-operand
3069     (name xname)
3070     (comment xcomment)
3071     (.splice attrs (.unsplice xattrs))
3072     (type xtype)
3073     (index xindex)
3074     (mode xmode)
3075     )
3076 )
3077
3078 ; dnpmop: define-normal-parsed-mode-operand: Normal mode operand with parse handler
3079 (define-pmacro (dnpmop xname xcomment xattrs xtype xindex xmode xparse)
3080   (define-operand
3081     (name xname)
3082     (comment xcomment)
3083     (.splice attrs (.unsplice xattrs))
3084     (type xtype)
3085     (index xindex)
3086     (mode xmode)
3087     (handlers (parse xparse))
3088     )
3089 )
3090
3091 (dnop  pack "packing bit" () h-pack f-pack)
3092
3093 (dnmop GRi        "source register 1"      () h-gr        f-GRi  SI)
3094 (dnmop GRj        "source register 2"      () h-gr        f-GRj  SI)
3095 (dnmop GRk        "destination register"   () h-gr        f-GRk  SI)
3096 (dnmop GRkhi      "destination register"   () h-gr_hi     f-GRk  UHI)
3097 (dnmop GRklo      "destination register"   () h-gr_lo     f-GRk  UHI)
3098 (dnpmop GRdoublek "destination register"   () h-gr_double f-GRk  DI "even_register")
3099 (dnmop ACC40Si    "signed accumulator"     () h-acc40S    f-ACC40Si DI)
3100 (dnmop ACC40Ui    "unsigned accumulator"   () h-acc40U    f-ACC40Ui UDI)
3101 (dnmop ACC40Sk    "target accumulator"     () h-acc40S    f-ACC40Sk DI)
3102 (dnmop ACC40Uk    "target accumulator"     () h-acc40U    f-ACC40Uk UDI)
3103 (dnmop ACCGi      "source register"        () h-accg      f-ACCGi   UWI)
3104 (dnmop ACCGk      "target register"        () h-accg      f-ACCGk   UWI)
3105
3106 (dnmop CPRi       "source register"        ((MACH frv)) h-cpr        f-CPRi SI)
3107 (dnmop CPRj       "source register"        ((MACH frv)) h-cpr        f-CPRj SI)
3108 (dnmop CPRk       "destination register"   ((MACH frv)) h-cpr        f-CPRk SI)
3109 (dnpmop CPRdoublek "destination register"  ((MACH frv)) h-cpr_double f-CPRk DI "even_register")
3110
3111 ; floating point operands
3112 (dnmop FRinti    "source register 1"      () h-fr_int    f-FRi SI)
3113 (dnmop FRintj    "source register 2"      () h-fr_int    f-FRj SI)
3114 (dnmop FRintk    "target register"        () h-fr_int    f-FRk SI)
3115 (dnmop FRi       "source register 1"      () h-fr        f-FRi SF)
3116 (dnmop FRj       "source register 2"      () h-fr        f-FRj SF)
3117 (dnmop FRk       "destination register"   () h-fr        f-FRk SF)
3118 (dnmop FRkhi     "destination register"   () h-fr_hi     f-FRk UHI)
3119 (dnmop FRklo     "destination register"   () h-fr_lo     f-FRk UHI)
3120 (dnpmop FRdoublei "source register 1"     () h-fr_double f-FRi DF "even_register")
3121 (dnpmop FRdoublej "source register 2"     () h-fr_double f-FRj DF "even_register")
3122 (dnpmop FRdoublek "target register"       () h-fr_double f-FRk DF "even_register")
3123
3124 (dnop CRi       "source register 1"       () h-cccr f-CRi)
3125 (dnop CRj       "source register 2"       () h-cccr f-CRj)
3126 (dnop CRj_int   "destination register"    () h-cccr f-CRj_int)
3127 (dnop CRj_float "destination register"    () h-cccr f-CRj_float)
3128 (dnop CRk       "destination register"    () h-cccr f-CRk)
3129 (dnop CCi       "condition   register"    () h-cccr f-CCi)
3130
3131 (dnop ICCi_1  "condition   register"      () h-iccr f-ICCi_1)
3132 (dnop ICCi_2  "condition   register"      () h-iccr f-ICCi_2)
3133 (dnop ICCi_3  "condition   register"      () h-iccr f-ICCi_3)
3134 (dnop FCCi_1  "condition   register"      () h-fccr f-FCCi_1)
3135 (dnop FCCi_2  "condition   register"      () h-fccr f-FCCi_2)
3136 (dnop FCCi_3  "condition   register"      () h-fccr f-FCCi_3)
3137 (dnop FCCk    "condition   register"      () h-fccr f-FCCk)
3138
3139 (dnop eir     "exception insn reg"        () h-uint f-eir)
3140 (dnop s10     "10 bit signed immediate"   (HASH-PREFIX) h-sint f-s10)
3141 (dnop u16     "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-u16)
3142 (dnop s16     "16 bit signed   immediate" (HASH-PREFIX) h-sint f-s16)
3143 (dnop s6      "6  bit signed   immediate" (HASH-PREFIX) h-sint f-s6)
3144 (dnop s6_1    "6  bit signed   immediate" (HASH-PREFIX) h-sint f-s6_1)
3145 (dnop u6      "6  bit unsigned immediate" (HASH-PREFIX) h-uint f-u6)
3146 (dnop s5      "5  bit signed   immediate" (HASH-PREFIX) h-sint f-s5)
3147 (dnop cond    "conditional arithmetic"    (HASH-PREFIX) h-uint f-cond)
3148 (dnop ccond   "lr branch condition"       (HASH-PREFIX) h-uint f-ccond)
3149 (dnop hint    "2 bit branch predictor"    (HASH-PREFIX) h-uint f-hint)
3150 (dnop hint_taken "2 bit branch predictor"     () h-hint-taken     f-hint)
3151 (dnop hint_not_taken "2 bit branch predictor" () h-hint-not-taken f-hint)
3152
3153 (dnop LI      "link indicator"            () h-uint f-LI)
3154 (dnop lock    "cache lock indicator"      (HASH-PREFIX) h-uint f-lock)
3155 (dnop debug   "debug mode indicator"      (HASH-PREFIX) h-uint f-debug)
3156 (dnop ae      "all entries indicator"     (HASH-PREFIX) h-uint f-ae)
3157
3158 (dnop label16  "18 bit pc relative address" () h-iaddr f-label16)
3159 (dnop label24  "26 bit pc relative address" () h-iaddr f-label24)
3160
3161 (dnop LRAE "Load Real Address E flag" () h-uint f-LRAE)
3162 (dnop LRAD "Load Real Address D flag" () h-uint f-LRAD)
3163 (dnop LRAS "Load Real Address S flag" () h-uint f-LRAS)
3164
3165 (dnop TLBPRopx "TLB Probe operation number" () h-uint f-TLBPRopx)
3166 (dnop TLBPRL   "TLB Probe L flag"           () h-uint f-TLBPRL)
3167
3168 (define-operand
3169   (name A0)
3170   (comment "A==0 operand of mclracc")
3171   (attrs)
3172   (type h-uint)
3173   (index f-A)
3174   (mode USI)
3175   (handlers (parse "A0"))
3176 )
3177
3178 (define-operand
3179   (name A1)
3180   (comment "A==1 operand of mclracc")
3181   (attrs)
3182   (type h-uint)
3183   (index f-A)
3184   (mode USI)
3185   (handlers (parse "A1"))
3186 )
3187
3188 (define-operand
3189   (name FRintieven)
3190   (comment "(even) source register 1")
3191   (attrs)
3192   (type h-fr_int)
3193   (index f-FRi)
3194   (mode SI)
3195   (handlers (parse "even_register"))
3196 )
3197
3198 (define-operand
3199   (name FRintjeven)
3200   (comment "(even) source register 2")
3201   (attrs)
3202   (type h-fr_int)
3203   (index f-FRj)
3204   (mode SI)
3205   (handlers (parse "even_register"))
3206 )
3207
3208 (define-operand
3209   (name FRintkeven)
3210   (comment "(even) target register")
3211   (attrs)
3212   (type h-fr_int)
3213   (index f-FRk)
3214   (mode SI)
3215   (handlers (parse "even_register"))
3216 )
3217
3218 (define-operand
3219   (name d12)
3220   (comment "12 bit signed immediate")
3221   (attrs)
3222   (type h-sint)
3223   (index f-d12)
3224   (handlers (parse "d12"))
3225 )
3226
3227 (define-operand
3228   (name s12)
3229   (comment "12 bit signed immediate")
3230   (attrs HASH-PREFIX)
3231   (type h-sint)
3232   (index f-d12)
3233   (handlers (parse "s12"))
3234 )
3235
3236 (define-operand
3237   (name u12)
3238   (comment "12 bit signed immediate")
3239   (attrs HASH-PREFIX)
3240   (type h-sint)
3241   (index f-u12)
3242   (handlers (parse "u12"))
3243 )
3244
3245 (define-operand
3246   (name spr)
3247   (comment "special purpose register")
3248   (attrs)
3249   (type  h-spr)
3250   (index f-spr)
3251   (handlers (parse "spr") (print "spr"))
3252 )
3253
3254 (define-operand
3255   (name ulo16)
3256   (comment "16 bit unsigned immediate, for #lo()")
3257   (attrs)
3258   (type h-uint)
3259   (index f-u16)
3260   (handlers (parse "ulo16") (print "lo"))
3261 )
3262
3263 (define-operand
3264   (name slo16)
3265   (comment "16 bit unsigned immediate, for #lo()")
3266   (attrs)
3267   (type h-sint)
3268   (index f-s16)
3269   (handlers (parse "uslo16") (print "lo"))
3270 )
3271
3272 (define-operand
3273   (name uhi16)
3274   (comment "16 bit unsigned immediate, for #hi()")
3275   (attrs)
3276   (type h-uint)
3277   (index f-u16)
3278   (handlers (parse "uhi16") (print "hi"))
3279 )
3280
3281 ; operands representing hardware
3282 ;
3283 (dnop psr_esr "PSR.ESR bit" (SEM-ONLY) h-psr_esr f-nil)
3284 (dnop psr_s   "PSR.S   bit" (SEM-ONLY) h-psr_s   f-nil)
3285 (dnop psr_ps  "PSR.PS  bit" (SEM-ONLY) h-psr_ps  f-nil)
3286 (dnop psr_et  "PSR.ET  bit" (SEM-ONLY) h-psr_et  f-nil)
3287
3288 (dnop bpsr_bs  "BPSR.BS  bit" (SEM-ONLY) h-bpsr_bs  f-nil)
3289 (dnop bpsr_bet "BPSR.BET bit" (SEM-ONLY) h-bpsr_bet f-nil)
3290
3291 (dnop tbr_tba "TBR.TBA" (SEM-ONLY) h-tbr_tba f-nil)
3292 (dnop tbr_tt  "TBR.TT"  (SEM-ONLY) h-tbr_tt  f-nil)
3293
3294 ; Null operands
3295 ;
3296 (define-pmacro (ICCi_1-null)  (f-ICCi_1-null 0))
3297 (define-pmacro (ICCi_2-null)  (f-ICCi_2-null 0))
3298 (define-pmacro (ICCi_3-null)  (f-ICCi_3-null 0))
3299 (define-pmacro (FCCi_1-null)  (f-FCCi_1-null 0))
3300 (define-pmacro (FCCi_2-null)  (f-FCCi_2-null 0))
3301 (define-pmacro (FCCi_3-null)  (f-FCCi_3-null 0))
3302 (define-pmacro (rs-null)      (f-rs-null     0))
3303 (define-pmacro (GRi-null)     (f-GRi-null    0))
3304 (define-pmacro (GRj-null)     (f-GRj-null    0))
3305 (define-pmacro (GRk-null)     (f-GRk-null    0))
3306 (define-pmacro (FRi-null)     (f-FRi-null    0))
3307 (define-pmacro (FRj-null)     (f-FRj-null    0))
3308 (define-pmacro (ACCj-null)    (f-ACCj-null   0))
3309 (define-pmacro (rd-null)      (f-rd-null     0))
3310 (define-pmacro (cond-null)    (f-cond-null   0))
3311 (define-pmacro (ccond-null)   (f-ccond-null  0))
3312 (define-pmacro (s12-null)     (f-s12-null    0))
3313 (define-pmacro (label16-null) (f-label16-null 0))
3314 (define-pmacro (misc-null-1)  (f-misc-null-1 0))
3315 (define-pmacro (misc-null-2)  (f-misc-null-2 0))
3316 (define-pmacro (misc-null-3)  (f-misc-null-3 0))
3317 (define-pmacro (misc-null-4)  (f-misc-null-4 0))
3318 (define-pmacro (misc-null-5)  (f-misc-null-5 0))
3319 (define-pmacro (misc-null-6)  (f-misc-null-6 0))
3320 (define-pmacro (misc-null-7)  (f-misc-null-7 0))
3321 (define-pmacro (misc-null-8)  (f-misc-null-8 0))
3322 (define-pmacro (misc-null-9)  (f-misc-null-9 0))
3323 (define-pmacro (misc-null-10) (f-misc-null-10 0))
3324 (define-pmacro (misc-null-11) (f-misc-null-11 0))
3325
3326 (define-pmacro (LRA-null)     (f-LRA-null 0))
3327 (define-pmacro (TLBPR-null)   (f-TLBPR-null 0))
3328
3329 (define-pmacro (LI-on)       (f-LI-on  1))
3330 (define-pmacro (LI-off)      (f-LI-off 0))
3331 \f
3332 ; Instruction definitions.
3333 ;
3334 ; Notes:
3335 ; - dni is short for "define-normal-instruction"
3336 ; - Macros are used to represent each insn format. These should be used as much
3337 ;   as possible unless an insn has exceptional behaviour
3338 ;
3339
3340 ; Commonly used Macros
3341 ;
3342 ; Specific registers
3343 ;
3344
3345 ; Integer condition code manipulation
3346 ;
3347 (define-pmacro (set-z-and-n icc x)
3348   (if (eq x 0)
3349       (set icc (or (and icc #x7) #x4))
3350       (if (lt x 0)
3351           (set icc (or (and icc #xb) #x8))
3352           (set icc (and icc #x3))))
3353 )
3354
3355 (define-pmacro (set-n icc val)
3356   (if (eq val 0)
3357       (set icc (and icc #x7))
3358       (set icc (or  icc #x8)))
3359 )
3360
3361 (define-pmacro (set-z icc val)
3362   (if (eq val 0)
3363       (set icc (and icc #xb))
3364       (set icc (or  icc #x4)))
3365 )
3366
3367 (define-pmacro (set-v icc val)
3368   (if (eq val 0)
3369       (set icc (and icc #xd))
3370       (set icc (or  icc #x2)))
3371 )
3372
3373 (define-pmacro (set-c icc val)
3374   (if (eq val 0)
3375       (set icc (and icc #xe))
3376       (set icc (or  icc #x1)))
3377 )
3378
3379 (define-pmacro (nbit icc)
3380   (trunc BI (srl (and icc #x8) 3))
3381 )
3382
3383 (define-pmacro (zbit icc)
3384   (trunc BI (srl (and icc #x4) 2))
3385 )
3386
3387 (define-pmacro (vbit icc)
3388   (trunc BI (srl (and icc #x2) 1))
3389 )
3390
3391 (define-pmacro (cbit icc)
3392   (trunc BI (and icc #x1))
3393 )
3394
3395 (define-pmacro (ebit icc)
3396   (trunc BI (srl (and icc #x8) 3))
3397 )
3398
3399 (define-pmacro (lbit icc)
3400   (trunc BI (srl (and icc #x4) 2))
3401 )
3402
3403 (define-pmacro (gbit icc)
3404   (trunc BI (srl (and icc #x2) 1))
3405 )
3406
3407 (define-pmacro (ubit icc)
3408   (trunc BI (and icc #x1))
3409 )
3410
3411 ; FRV insns
3412 ;
3413 ;
3414 ; Format: INT, Logic, Shift r-r
3415 ;
3416 (define-pmacro (int-logic-r-r name operation op ope comment)
3417   (dni name
3418        (comment)
3419        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3420         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3421        (.str name "$pack $GRi,$GRj,$GRk")
3422        (+ pack GRk op GRi (ICCi_1-null) ope GRj)
3423        (set GRk (operation GRi GRj))
3424        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3425         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3426   )
3427 )
3428
3429 (int-logic-r-r add  add   OP_00 OPE2_00 "add reg/reg")
3430 (int-logic-r-r sub  sub   OP_00 OPE2_04 "sub reg/reg")
3431 (int-logic-r-r and  and   OP_01 OPE2_00 "and reg/reg")
3432 (int-logic-r-r or   or    OP_01 OPE2_02 "or  reg/reg")
3433 (int-logic-r-r xor  xor   OP_01 OPE2_04 "xor reg/reg")
3434
3435 (dni not
3436      ("not")
3437      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3438       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3439      ("not$pack $GRj,$GRk")
3440      (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj)
3441      (set GRk (inv GRj))
3442      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3443       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3444 )
3445
3446 (dni sdiv
3447      "signed division"
3448      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3449       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3450      "sdiv$pack $GRi,$GRj,$GRk"
3451      (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj)
3452      (sequence ()
3453                (c-call VOID "@cpu@_signed_integer_divide"
3454                        GRi GRj (index-of GRk) 0)
3455                (clobber GRk))
3456      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3457       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3458 )
3459
3460 (dni nsdiv
3461      "non excepting signed division"
3462      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3463       (MACH simple,tomcat,fr500,fr550,frv))
3464      "nsdiv$pack $GRi,$GRj,$GRk"
3465      (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0E GRj)
3466      (sequence ()
3467                (c-call VOID "@cpu@_signed_integer_divide"
3468                        GRi GRj (index-of GRk) 1)
3469                (clobber GRk))
3470      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3471 )
3472
3473 (dni udiv
3474      "unsigned division reg/reg"
3475      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3476       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3477      "udiv$pack $GRi,$GRj,$GRk"
3478      (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj)
3479      (sequence ()
3480                (c-call VOID "@cpu@_unsigned_integer_divide"
3481                        GRi GRj (index-of GRk) 0)
3482                (clobber GRk))
3483      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3484       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3485 )
3486
3487 (dni nudiv
3488      "non excepting unsigned division"
3489      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3490       (MACH simple,tomcat,fr500,fr550,frv))
3491      "nudiv$pack $GRi,$GRj,$GRk"
3492      (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0F GRj)
3493      (sequence ()
3494                (c-call VOID "@cpu@_unsigned_integer_divide"
3495                        GRi GRj (index-of GRk) 1)
3496                (clobber GRk))
3497      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3498 )
3499
3500 ; Multiplication
3501 ;
3502 (define-pmacro (multiply-r-r name signop op ope comment)
3503   (dni name
3504        (comment)
3505        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3506         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3507        (.str name "$pack $GRi,$GRj,$GRdoublek")
3508        (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj)
3509        (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj)))
3510        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3511         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3512   )
3513 )
3514
3515 (multiply-r-r smul ext  OP_00 OPE2_08 "signed   multiply reg/reg")
3516 (multiply-r-r umul zext OP_00 OPE2_0A "unsigned multiply reg/reg")
3517
3518 ; Multiplication with integer accumulator IACC
3519 ;
3520
3521 (define-pmacro (iacc-set value)
3522   (set (reg h-iacc0 0) value))
3523
3524 (define-pmacro (iacc-add value)
3525   (set (reg h-iacc0 0)
3526        (cond DI
3527              ((andif (andif (gt value 0) (gt (reg h-iacc0 0) 0))
3528                      (lt (sub DI #x7fffffffffffffff value) (reg h-iacc0 0)))
3529               ; Positive overflow
3530               (const DI #x7fffffffffffffff))
3531              ((andif (andif (lt value 0) (lt (reg h-iacc0 0) 0))
3532                      (gt (sub DI #x8000000000000000 value) (reg h-iacc0 0)))
3533               ; Negative overflow
3534               (const DI #x8000000000000000))
3535              (else
3536               (add DI (reg h-iacc0 0) value))))
3537 )
3538
3539 (define-pmacro (iacc-sub value)
3540   (set (reg h-iacc0 0)
3541        (cond DI
3542              ((andif (andif (lt value 0) (gt (reg h-iacc0 0) 0))
3543                      (lt (add DI #x7fffffffffffffff value) (reg h-iacc0 0)))
3544               ; Positive overflow
3545               (const DI #x7fffffffffffffff))
3546              ((andif (andif (gt value 0) (lt (reg h-iacc0 0) 0))
3547                      (gt (add DI #x8000000000000000 value) (reg h-iacc0 0)))
3548               ; Negative overflow
3549               (const DI #x8000000000000000))
3550              (else
3551               (sub DI (reg h-iacc0 0) value))))
3552 )
3553
3554 (define-pmacro (iacc-multiply-r-r name operation op ope comment)
3555   (dni name
3556        (comment)
3557        ((UNIT IACC) (MACH fr400,fr450)
3558         (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3559        (.str name "$pack $GRi,$GRj")
3560        (+ pack (rd-null) op GRi ope GRj)
3561        ((.sym iacc- operation) (mul DI (ext DI GRi) (ext DI GRj)))
3562        ((fr400 (unit u-integer)) (fr450 (unit u-integer)))
3563   )
3564 )
3565
3566 (iacc-multiply-r-r smu   set OP_46 OPE1_05 "Signed multiply     reg/reg/iacc")
3567 (iacc-multiply-r-r smass add OP_46 OPE1_06 "Signed multiply/add reg/reg/iacc")
3568 (iacc-multiply-r-r smsss sub OP_46 OPE1_07 "Signed multiply/sub reg/reg/iacc")
3569
3570 (define-pmacro (int-shift-r-r name op ope comment)
3571   (dni name
3572        (comment)
3573        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3574         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3575        (.str name "$pack $GRi,$GRj,$GRk")
3576        (+ pack GRk op GRi (ICCi_1-null) ope GRj)
3577        (set GRk (name GRi (and GRj #x1f)))
3578        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3579         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3580   )
3581 )
3582
3583 (int-shift-r-r sll OP_01 OPE2_08 "shift left  logical reg/reg")
3584 (int-shift-r-r srl OP_01 OPE2_0A "shift right logical reg/reg")
3585 (int-shift-r-r sra OP_01 OPE2_0C "shift right arith   reg/reg")
3586
3587 (dni slass
3588      "shift left arith reg/reg with saturation"
3589      ((UNIT IALL) (MACH fr400,fr450)
3590       (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3591      "slass$pack $GRi,$GRj,$GRk"
3592      (+ pack GRk OP_46 GRi OPE1_02 GRj)
3593      (set GRk (c-call SI "@cpu@_shift_left_arith_saturate" GRi GRj))
3594      ()
3595 )
3596
3597 (dni scutss
3598      "Integer accumulator cut with saturation"
3599      ((UNIT I0) (MACH fr400,fr450)
3600       (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3601      "scutss$pack $GRj,$GRk"
3602      (+ pack GRk OP_46 (rs-null) OPE1_04 GRj)
3603      (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj))
3604      ()
3605 )
3606
3607 (define-pmacro (scan-semantics arg1 arg2 targ)
3608   (sequence ((WI tmp1) (WI tmp2))
3609             (set tmp1 arg1)
3610             (set tmp2 (sra arg2 1))
3611             (set targ (c-call WI "@cpu@_scan_result" (xor tmp1 tmp2))))
3612 )
3613
3614 (dni scan
3615      "scan"
3616      ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3617       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3618      "scan$pack $GRi,$GRj,$GRk"
3619      (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj)
3620      (scan-semantics GRi GRj GRk)
3621      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3622       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3623 )
3624
3625 ; Format: conditional INT, Logic, Shift r-r
3626 ;
3627 (define-pmacro (conditional-int-logic name operation op ope comment)
3628   (dni name
3629        (comment)
3630        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3631         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3632        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3633        (+ pack GRk op GRi CCi cond ope GRj)
3634        (if (eq CCi (or cond 2))
3635            (set GRk (operation GRi GRj)))
3636        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3637         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3638   )
3639 )
3640
3641 (conditional-int-logic cadd  add  OP_58 OPE4_0 "conditional add")
3642 (conditional-int-logic csub  sub  OP_58 OPE4_1 "conditional sub")
3643 (conditional-int-logic cand  and  OP_5A OPE4_0 "conditional and")
3644 (conditional-int-logic cor   or   OP_5A OPE4_1 "conditional or")
3645 (conditional-int-logic cxor  xor  OP_5A OPE4_2 "conditional xor")
3646
3647 (dni cnot
3648      "conditional not"
3649      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3650       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3651      "cnot$pack $GRj,$GRk,$CCi,$cond"
3652      (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj)
3653      (if (eq CCi (or cond 2))
3654          (set GRk (inv GRj)))
3655      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3656       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3657 )
3658
3659 (dni csmul
3660      "conditional signed multiply"
3661      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3662       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3663      "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
3664      (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj)
3665      (if (eq CCi (or cond 2))
3666          (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj))))
3667      ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3668       (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3669 )
3670
3671 (dni csdiv
3672      "conditional signed division"
3673      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3674       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3675      "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
3676      (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj)
3677      (if (eq CCi (or cond 2))
3678          (sequence ()
3679                    (c-call VOID "@cpu@_signed_integer_divide"
3680                            GRi GRj (index-of GRk) 0)
3681                    (clobber GRk)))
3682      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3683       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3684 )
3685
3686 (dni cudiv
3687      "conditional unsigned division"
3688      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3689       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3690      "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
3691      (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj)
3692      (if (eq CCi (or cond 2))
3693          (sequence ()
3694                    (c-call VOID "@cpu@_unsigned_integer_divide"
3695                            GRi GRj (index-of GRk) 0)
3696                    (clobber GRk)))
3697      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
3698       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
3699 )
3700
3701 (define-pmacro (conditional-shift name operation op ope comment)
3702   (dni name
3703        (comment)
3704        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3705         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3706        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3707        (+ pack GRk op GRi CCi cond ope GRj)
3708        (if (eq CCi (or cond 2))
3709            (set GRk (operation GRi (and GRj #x1f))))
3710        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3711         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3712   )
3713 )
3714
3715 (conditional-shift csll sll OP_5C OPE4_0 "conditional shift left  logical")
3716 (conditional-shift csrl srl OP_5C OPE4_1 "conditional shift right logical")
3717 (conditional-shift csra sra OP_5C OPE4_2 "conditional shift right arith")
3718
3719 (dni cscan
3720      "conditional scan"
3721      ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3722       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3723      "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond"
3724      (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj)
3725      (if (eq CCi (or cond 2))
3726          (scan-semantics GRi GRj GRk))
3727      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3728       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3729 )
3730
3731 ; Format: INT, Logic, Shift, cc r-r
3732 ;
3733 (define-pmacro (int-arith-cc-semantics operation icc)
3734   (sequence ((BI tmp) (QI cc) (SI result))
3735             (set cc icc)
3736             (set tmp ((.sym operation -oflag) GRi GRj (const 0)))
3737             (set-v cc tmp)
3738             (set tmp ((.sym operation -cflag) GRi GRj (const 0)))
3739             (set-c cc tmp)
3740             (set result (operation GRi GRj))
3741             (set-z-and-n cc result)
3742             (set GRk result)
3743             (set icc cc))
3744 )
3745
3746 (define-pmacro (int-arith-cc-r-r name operation op ope comment)
3747   (dni name
3748        (comment)
3749        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3750         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3751        (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3752        (+ pack GRk op GRi ICCi_1 ope GRj)
3753        (int-arith-cc-semantics operation ICCi_1)
3754        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3755         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3756   )
3757 )
3758
3759 (int-arith-cc-r-r addcc add OP_00 OPE2_01 "add reg/reg, set icc")
3760 (int-arith-cc-r-r subcc sub OP_00 OPE2_05 "sub reg/reg, set icc")
3761
3762 (define-pmacro (int-logic-cc-semantics op icc)
3763   (sequence ((SI tmp))
3764             (set tmp (op GRi GRj))
3765             (set GRk tmp)
3766             (set-z-and-n icc tmp))
3767 )
3768
3769 (define-pmacro (int-logic-cc-r-r name op ope comment)
3770   (dni (.sym name cc)
3771        (comment)
3772        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3773         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3774        (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
3775        (+ pack GRk op GRi ICCi_1 ope GRj)
3776        (int-logic-cc-semantics name ICCi_1)
3777        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3778         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3779   )
3780 )
3781
3782 (int-logic-cc-r-r and OP_01 OPE2_01 "and reg/reg, set icc")
3783 (int-logic-cc-r-r or  OP_01 OPE2_03 "or  reg/reg, set icc")
3784 (int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc")
3785
3786 (define-pmacro (int-shift-cc-semantics op l-r icc)
3787   (sequence ((WI shift) (SI tmp) (QI cc))
3788             (set shift (and GRj #x1f))
3789             (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
3790                             GRi shift icc))
3791             (set tmp (op GRi shift))
3792             (set GRk tmp)
3793             (set-z-and-n cc tmp)
3794             (set icc cc))
3795 )
3796
3797 (define-pmacro (int-shift-cc-r-r name l-r op ope comment)
3798   (dni (.sym name cc)
3799        (comment)
3800        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3801         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3802        (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
3803        (+ pack GRk op GRi ICCi_1 ope GRj)
3804        (int-shift-cc-semantics name l-r ICCi_1)
3805        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3806         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3807   )
3808 )
3809
3810 (int-shift-cc-r-r sll left  OP_01 OPE2_09 "shift left  logical reg/reg,set icc")
3811 (int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc")
3812 (int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith   reg/reg,set icc")
3813
3814 (define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc)
3815   (sequence ((DI tmp) (QI cc))
3816             (set cc icc)
3817             (set tmp (mul DI (signop DI arg1) (signop DI arg2)))
3818             (set-n cc (srl DI tmp 63))
3819             (set-z cc (eq tmp 0))
3820             (set targ tmp)
3821             (set icc cc))
3822 )
3823
3824 (define-pmacro (multiply-cc-r-r name signop op ope comment)
3825   (dni name
3826        (comment)
3827        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3828         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3829        (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1")
3830        (+ pack GRdoublek op GRi ICCi_1 ope GRj)
3831        (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1)
3832        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3833         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3834   )
3835 )
3836
3837 (multiply-cc-r-r smulcc ext  OP_00 OPE2_09 "signed   multiply reg/reg")
3838 (multiply-cc-r-r umulcc zext OP_00 OPE2_0B "unsigned multiply reg/reg")
3839
3840
3841 ; Format: conditional INT, Logic, Shift, cc r-r
3842 ;
3843 (define-pmacro (conditional-int-arith-cc name operation op ope comment)
3844   (dni name
3845        (comment)
3846        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3847         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3848        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3849        (+ pack GRk op GRi CCi cond ope GRj)
3850        (if (eq CCi (or cond 2))
3851            (int-arith-cc-semantics operation
3852                                    (reg h-iccr (and (index-of CCi) 3))))
3853        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3854         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3855   )
3856 )
3857
3858 (conditional-int-arith-cc caddcc add OP_59 OPE4_0 "add, set icc")
3859 (conditional-int-arith-cc csubcc sub OP_59 OPE4_1 "sub, set icc")
3860
3861 (dni csmulcc
3862      "conditional signed multiply and set condition code"
3863      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
3864       (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3865      "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
3866      (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj)
3867      (if (eq CCi (or cond 2))
3868          (multiply-cc-semantics ext GRi GRj GRdoublek
3869                                 (reg h-iccr (and (index-of CCi) 3))))
3870      ((fr400 (unit u-imul)) (fr450 (unit u-imul))
3871       (fr500 (unit u-imul)) (fr550 (unit u-imul)))
3872 )
3873
3874 (define-pmacro (conditional-int-logic-cc name operation op ope comment)
3875   (dni name
3876        (comment)
3877        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3878         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3879        (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3880        (+ pack GRk op GRi CCi cond ope GRj)
3881        (if (eq CCi (or cond 2))
3882            (int-logic-cc-semantics operation
3883                                    (reg h-iccr (and (index-of CCi) 3))))
3884        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3885         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3886   )
3887 )
3888
3889 (conditional-int-logic-cc candcc and OP_5B OPE4_0 "conditional and, set icc")
3890 (conditional-int-logic-cc corcc  or  OP_5B OPE4_1 "conditional or , set icc")
3891 (conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc")
3892
3893 (define-pmacro (conditional-int-shift-cc name l-r op ope comment)
3894   (dni (.sym c name cc)
3895        (comment)
3896        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3897         (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
3898        (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3899        (+ pack GRk op GRi CCi cond ope GRj)
3900        (if (eq CCi (or cond 2))
3901            (int-shift-cc-semantics name l-r
3902                                    (reg h-iccr (and (index-of CCi) 3))))
3903        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3904         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3905   )
3906 )
3907
3908 (conditional-int-shift-cc sll left  OP_5D OPE4_0 "shift left  logical, set icc")
3909 (conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc")
3910 (conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith  , set icc")
3911
3912 ; Add and subtract with carry
3913 ;
3914 (define-pmacro (int-arith-x-r-r name operation op ope comment)
3915   (dni name
3916        (comment)
3917        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3918         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3919        (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3920        (+ pack GRk op GRi ICCi_1 ope GRj)
3921        (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1)))
3922        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3923         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3924   )
3925 )
3926
3927 (int-arith-x-r-r addx add OP_00 OPE2_02 "Add reg/reg, with carry")
3928 (int-arith-x-r-r subx sub OP_00 OPE2_06 "Sub reg/reg, with carry")
3929
3930 (define-pmacro (int-arith-x-cc-r-r name operation op ope comment)
3931   (dni name
3932        (comment)
3933        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3934         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3935        (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3936        (+ pack GRk op GRi ICCi_1 ope GRj)
3937        (sequence ((WI tmp) (QI cc))
3938                  (set cc ICCi_1)
3939                  (set tmp ((.sym operation c) GRi GRj (cbit cc)))
3940                  (set-v cc ((.sym operation -oflag) GRi GRj (cbit cc)))
3941                  (set-c cc ((.sym operation -cflag) GRi GRj (cbit cc)))
3942                  (set-z-and-n cc tmp)
3943                  (set GRk tmp)
3944                  (set ICCi_1 cc))
3945        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3946         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3947   )
3948 )
3949
3950 (int-arith-x-cc-r-r addxcc add OP_00 OPE2_03 "Add reg/reg, use/set carry")
3951 (int-arith-x-cc-r-r subxcc sub OP_00 OPE2_07 "Sub reg/reg, use/set carry")
3952 ; Add and subtract with saturation
3953 ;
3954 (define-pmacro (int-arith-ss-r-r name operation op ope comment)
3955   (dni name
3956        (comment)
3957        ((UNIT IALL) (MACH fr400,fr450)
3958         (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
3959        (.str name "$pack $GRi,$GRj,$GRk")
3960        (+ pack GRk op GRi ope GRj)
3961        (sequence ()
3962                  (set GRk (operation GRi GRj))
3963                  (if ((.sym operation -oflag) GRi GRj (const 0))
3964                                         ; Overflow, saturate.
3965                                         ; Sign of result will be
3966                                         ; same as sign of first operand.
3967                      (set GRk
3968                           (cond SI
3969                                 ((gt GRi 0) (const #x7fffffff))
3970                                 ((lt GRi 0) (const #x80000000))
3971                                 (else (const 0)))))
3972        )
3973        ((fr400 (unit u-integer)) (fr450 (unit u-integer)))
3974   )
3975 )
3976
3977 (int-arith-ss-r-r addss add OP_46 OPE1_00 "add reg/reg, with saturation")
3978 (int-arith-ss-r-r subss sub OP_46 OPE1_01 "sub reg/reg, with saturation")
3979
3980 ; Format: INT, Logic, Shift r-simm
3981 ;
3982 (define-pmacro (int-logic-r-simm name operation op comment)
3983   (dni name
3984        (comment)
3985        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
3986         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
3987        (.str name "$pack $GRi,$s12,$GRk")
3988        (+ pack GRk op GRi s12)
3989        (set GRk (operation GRi s12))
3990        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
3991         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
3992   )
3993 )
3994
3995 (int-logic-r-simm addi  add   OP_10 "add reg/immed")
3996 (int-logic-r-simm subi  sub   OP_14 "sub reg/immed")
3997 (int-logic-r-simm andi  and   OP_20 "and reg/immed")
3998 (int-logic-r-simm ori   or    OP_22 "or  reg/immed")
3999 (int-logic-r-simm xori  xor   OP_24 "xor reg/immed")
4000
4001 (dni sdivi
4002      "signed division reg/immed"
4003      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4004       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4005      "sdivi$pack $GRi,$s12,$GRk"
4006      (+ pack GRk OP_1E GRi s12)
4007      (sequence ()
4008                (c-call VOID "@cpu@_signed_integer_divide"
4009                        GRi s12 (index-of GRk) 0)
4010                (clobber GRk))
4011      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
4012       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4013 )
4014
4015 (dni nsdivi
4016      "non excepting signed division reg/immed"
4017      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
4018       (MACH simple,tomcat,fr500,fr550,frv))
4019      "nsdivi$pack $GRi,$s12,$GRk"
4020      (+ pack GRk OP_2E GRi s12)
4021      (sequence ()
4022                (c-call VOID "@cpu@_signed_integer_divide"
4023                        GRi s12 (index-of GRk) 1)
4024                (clobber GRk))
4025      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4026 )
4027
4028 (dni udivi
4029      "unsigned division reg/immed"
4030      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4031       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4032      "udivi$pack $GRi,$s12,$GRk"
4033      (+ pack GRk OP_1F GRi s12)
4034      (sequence ()
4035                (c-call VOID "@cpu@_unsigned_integer_divide"
4036                        GRi s12 (index-of GRk) 0)
4037                (clobber GRk))
4038      ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
4039       (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4040 )
4041
4042 (dni nudivi
4043      "non excepting unsigned division reg/immed"
4044      ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
4045       (MACH simple,tomcat,fr500,fr550,frv))
4046      "nudivi$pack $GRi,$s12,$GRk"
4047      (+ pack GRk OP_2F GRi s12)
4048      (sequence ()
4049                (c-call VOID "@cpu@_unsigned_integer_divide"
4050                        GRi s12 (index-of GRk) 1)
4051                (clobber GRk))
4052      ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
4053 )
4054
4055 (define-pmacro (multiply-r-simm name signop op comment)
4056   (dni name
4057        (comment)
4058        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4059         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4060        (.str name "$pack $GRi,$s12,$GRdoublek")
4061        (+ pack GRdoublek op GRi s12)
4062        (set GRdoublek (mul DI (signop DI GRi) (signop DI s12)))
4063        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
4064         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
4065   )
4066 )
4067
4068 (multiply-r-simm smuli ext  OP_18 "signed   multiply reg/immed")
4069 (multiply-r-simm umuli zext OP_1A "unsigned multiply reg/immed")
4070
4071 (define-pmacro (int-shift-r-simm name op comment)
4072   (dni (.sym name i)
4073        (comment)
4074        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4075         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4076        (.str (.sym name i) "$pack $GRi,$s12,$GRk")
4077        (+ pack GRk op GRi s12)
4078        (set GRk (name GRi (and s12 #x1f)))
4079        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4080         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4081   )
4082 )
4083
4084 (int-shift-r-simm sll OP_28 "shift left  logical reg/immed")
4085 (int-shift-r-simm srl OP_2A "shift right logical reg/immed")
4086 (int-shift-r-simm sra OP_2C "shift right arith   reg/immed")
4087
4088 (dni scani
4089      "scan immediate"
4090      ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4091       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4092      "scani$pack $GRi,$s12,$GRk"
4093      (+ pack GRk OP_47 GRi s12)
4094      (scan-semantics GRi s12 GRk)
4095      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4096       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4097 )
4098
4099 ; Format: INT, Logic, Shift cc r-simm
4100 ;
4101 (define-pmacro (int-arith-cc-r-simm name operation op comment)
4102   (dni name
4103        (comment)
4104        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4105         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4106        (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
4107        (+ pack GRk op GRi ICCi_1 s10)
4108        (sequence ((BI tmp) (QI cc) (SI result))
4109                  (set cc ICCi_1)
4110                  (set tmp ((.sym operation -oflag) GRi s10 (const 0)))
4111                  (set-v cc tmp)
4112                  (set tmp ((.sym operation -cflag) GRi s10 (const 0)))
4113                  (set-c cc tmp)
4114                  (set result (operation GRi s10))
4115                  (set-z-and-n cc result)
4116                  (set GRk result)
4117                  (set ICCi_1 cc))
4118        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4119         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4120   )
4121 )
4122
4123 (int-arith-cc-r-simm addicc add OP_11 "add reg/immed, set icc")
4124 (int-arith-cc-r-simm subicc sub OP_15 "sub reg/immed, set icc")
4125
4126 (define-pmacro (int-logic-cc-r-simm name op comment)
4127   (dni (.sym name icc)
4128        (comment)
4129        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4130         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4131        (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
4132        (+ pack GRk op GRi ICCi_1 s10)
4133        (sequence ((SI tmp))
4134                  (set tmp (name GRi s10))
4135                  (set GRk tmp)
4136                  (set-z-and-n ICCi_1 tmp))
4137        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4138         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4139   )
4140 )
4141
4142 (int-logic-cc-r-simm and  OP_21 "and reg/immed, set icc")
4143 (int-logic-cc-r-simm or   OP_23 "or  reg/immed, set icc")
4144 (int-logic-cc-r-simm xor  OP_25 "xor reg/immed, set icc")
4145
4146 (define-pmacro (multiply-cc-r-simm name signop op comment)
4147   (dni name
4148        (comment)
4149        ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
4150         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4151        (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1")
4152        (+ pack GRdoublek op GRi ICCi_1 s10)
4153        (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1)
4154        ((fr400 (unit u-imul)) (fr450 (unit u-imul))
4155         (fr500 (unit u-imul)) (fr550 (unit u-imul)))
4156   )
4157 )
4158
4159 (multiply-cc-r-simm smulicc ext  OP_19 "signed   multiply reg/immed")
4160 (multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed")
4161
4162 (define-pmacro (int-shift-cc-r-simm name l-r op comment)
4163   (dni (.sym name icc)
4164        (comment)
4165        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4166         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4167        (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
4168        (+ pack GRk op GRi ICCi_1 s10)
4169        (sequence ((WI shift) (SI tmp) (QI cc))
4170                  (set shift (and s10 #x1f))
4171                  (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
4172                                  GRi shift ICCi_1))
4173                  (set tmp (name GRi shift))
4174                  (set GRk tmp)
4175                  (set-z-and-n cc tmp)
4176                  (set ICCi_1 cc))
4177        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4178         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4179   )
4180 )
4181
4182 (int-shift-cc-r-simm sll left  OP_29 "shift left  logical reg/immed, set icc")
4183 (int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc")
4184 (int-shift-cc-r-simm sra right OP_2D "shift right arith   reg/immed, set icc")
4185
4186 (define-pmacro (int-arith-x-r-simm name operation op comment)
4187   (dni name
4188        (comment)
4189        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4190         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4191        (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
4192        (+ pack GRk op GRi ICCi_1 s10)
4193        (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1)))
4194        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4195         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4196   )
4197 )
4198
4199 (int-arith-x-r-simm addxi add OP_12 "Add reg/immed, with carry")
4200 (int-arith-x-r-simm subxi sub OP_16 "Sub reg/immed, with carry")
4201
4202 (define-pmacro (int-arith-x-cc-r-simm name operation op comment)
4203   (dni name
4204        (comment)
4205        ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4206         (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4207        (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
4208        (+ pack GRk op GRi ICCi_1 s10)
4209        (sequence ((WI tmp) (QI cc))
4210                  (set cc ICCi_1)
4211                  (set tmp ((.sym operation c) GRi s10 (cbit cc)))
4212                  (set-v cc ((.sym operation -oflag) GRi s10 (cbit cc)))
4213                  (set-c cc ((.sym operation -cflag) GRi s10 (cbit cc)))
4214                  (set-z-and-n cc tmp)
4215                  (set GRk tmp)
4216                  (set ICCi_1 cc))
4217        ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4218         (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4219   )
4220 )
4221
4222 (int-arith-x-cc-r-simm addxicc add OP_13 "Add reg/immed, with carry")
4223 (int-arith-x-cc-r-simm subxicc sub OP_17 "Sub reg/immed, with carry")
4224
4225 ; Byte compare insns
4226
4227 (dni cmpb
4228      "Compare bytes"
4229      ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1)
4230       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4231      "cmpb$pack $GRi,$GRj,$ICCi_1"
4232      (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj)
4233      (sequence ((QI cc))
4234                (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000)))
4235                (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000)))
4236                (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00)))
4237                (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff)))
4238                (set ICCi_1 cc))
4239      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4240       (fr550 (unit u-integer)))
4241 )
4242
4243 (dni cmpba
4244      "OR of Compare bytes"
4245      ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1)
4246       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4247      "cmpba$pack $GRi,$GRj,$ICCi_1"
4248      (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj)
4249      (sequence ((QI cc))
4250                (set cc 0)
4251                (set-c cc
4252                       (orif (eq (and GRi #xff000000) (and GRj #xff000000))
4253                             (orif (eq (and GRi #x00ff0000) (and GRj #x00ff0000))
4254                                   (orif (eq (and GRi #x0000ff00)
4255                                             (and GRj #x0000ff00))
4256                                          (eq (and GRi #x000000ff)
4257                                             (and GRj #x000000ff))))))
4258                (set ICCi_1 cc))
4259      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4260       (fr550 (unit u-integer)))
4261 )
4262
4263 ; Format: Load immediate
4264 ;
4265 (dni setlo
4266      "set low order bits"
4267      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4268       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4269      "setlo$pack $ulo16,$GRklo"
4270      (+ pack GRk OP_3D (misc-null-4) u16)
4271      (set GRklo u16)
4272      ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo))
4273       (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
4274 )
4275
4276 (dni sethi
4277      "set high order bits"
4278      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4279       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4280      "sethi$pack $uhi16,$GRkhi"
4281      (+ pack GRkhi OP_3E (misc-null-4) u16)
4282      (set GRkhi u16)
4283      ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo))
4284       (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
4285 )
4286
4287 (dni setlos
4288      "set low order bits and extend sign"
4289      ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
4290       (FR400-MAJOR I-1) (FR450-MAJOR I-1))
4291      "setlos$pack $slo16,$GRk"
4292      (+ pack GRk OP_3F (misc-null-4) s16)
4293      (set GRk s16)
4294      ((fr400 (unit u-integer)) (fr450 (unit u-integer))
4295       (fr500 (unit u-integer)) (fr550 (unit u-integer)))
4296 )
4297
4298 (define-pmacro (load-gr-r name mode op ope comment)
4299   (dni name
4300        (comment)
4301        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4302         (FR400-MAJOR I-2) (FR450-MAJOR I-2))
4303        (.str name "$pack @($GRi,$GRj),$GRk")
4304        (+ pack GRk op GRi ope GRj)
4305        (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
4306        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4307         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4308   )
4309 )
4310
4311 (load-gr-r ldsb   QI OP_02 OPE1_00 "Load   signed byte")
4312 (load-gr-r ldub  UQI OP_02 OPE1_01 "Load unsigned byte")
4313 (load-gr-r ldsh   HI OP_02 OPE1_02 "Load   signed half")
4314 (load-gr-r lduh  UHI OP_02 OPE1_03 "Load unsigned half")
4315 (load-gr-r ld     SI OP_02 OPE1_04 "Load          word")
4316
4317 (define-pmacro (load-fr-r name mode op ope comment)
4318   (dni name
4319        (comment)
4320        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4321         (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS)
4322        (.str name "$pack @($GRi,$GRj),$FRintk")
4323        (+ pack FRintk op GRi ope GRj)
4324        (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
4325        ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4326         (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4327   )
4328 )
4329
4330 (load-fr-r ldbf UQI OP_02 OPE1_08 "Load byte   float")
4331 (load-fr-r ldhf UHI OP_02 OPE1_09 "Load half   float")
4332 (load-fr-r ldf   SI OP_02 OPE1_0A "Load word   float")
4333
4334 (define-pmacro (load-cpr-r name mode op ope reg attr comment)
4335   (dni name
4336        (comment)
4337        ((UNIT LOAD) (FR500-MAJOR I-2) attr)
4338        (.str name "$pack @($GRi,$GRj),$" reg "k")
4339        (+ pack (.sym reg k) op GRi ope GRj)
4340        (set (.sym reg k)
4341             (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
4342        ()
4343   )
4344 )
4345
4346 (load-cpr-r ldc SI OP_02 OPE1_0D CPR (MACH frv) "Load coprocessor word")
4347
4348 ; These correspond to enumerators in frv-sim.h
4349 (define-pmacro (ne-UQI-size) 0)
4350 (define-pmacro (ne-QI-size)  1)
4351 (define-pmacro (ne-UHI-size) 2)
4352 (define-pmacro (ne-HI-size)  3)
4353 (define-pmacro (ne-SI-size)  4)
4354 (define-pmacro (ne-DI-size)  5)
4355 (define-pmacro (ne-XI-size)  6)
4356
4357 (define-pmacro (ne-load-semantics base dispix targ idisp size is_float action)
4358   (sequence ((BI do_op))
4359             (set do_op
4360                  (c-call BI "@cpu@_check_non_excepting_load"
4361                           (index-of base) dispix (index-of targ)
4362                           idisp size is_float))
4363             (if do_op action))
4364 )
4365
4366 (define-pmacro (ne-load-gr-r name mode op ope size comment)
4367   (dni name
4368        (comment)
4369        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4370         (MACH simple,tomcat,fr500,fr550,frv))
4371        (.str name "$pack @($GRi,$GRj),$GRk")
4372        (+ pack GRk op GRi ope GRj)
4373        (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
4374                           (set GRk
4375                                (c-call mode (.str "@cpu@_read_mem_" mode)
4376                                        pc (add GRi GRj))))
4377        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4378   )
4379 )
4380
4381 (ne-load-gr-r nldsb  QI OP_02 OPE1_20 (ne-QI-size)  "Load   signed byte")
4382 (ne-load-gr-r nldub UQI OP_02 OPE1_21 (ne-UQI-size) "Load unsigned byte")
4383 (ne-load-gr-r nldsh  HI OP_02 OPE1_22 (ne-HI-size)  "Load   signed half")
4384 (ne-load-gr-r nlduh UHI OP_02 OPE1_23 (ne-UHI-size) "Load unsigned half")
4385 (ne-load-gr-r nld    SI OP_02 OPE1_24 (ne-SI-size)  "Load          word")
4386
4387 (define-pmacro (ne-load-fr-r name mode op ope size comment)
4388   (dni name
4389        (comment)
4390        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4391         (MACH simple,tomcat,fr500,fr550,frv))
4392        (.str name "$pack @($GRi,$GRj),$FRintk")
4393        (+ pack FRintk op GRi ope GRj)
4394        (ne-load-semantics GRi (index-of GRj) FRintk 0 size 1
4395                           (set FRintk
4396                                (c-call mode (.str "@cpu@_read_mem_" mode)
4397                                        pc (add GRi GRj))))
4398        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4399   )
4400 )
4401
4402 (ne-load-fr-r nldbf UQI OP_02 OPE1_28 (ne-UQI-size) "Load byte float")
4403 (ne-load-fr-r nldhf UHI OP_02 OPE1_29 (ne-UHI-size) "Load half float")
4404 (ne-load-fr-r nldf   SI OP_02 OPE1_2A (ne-SI-size)  "Load word float")
4405
4406 ; Semantics for a load-double insn
4407 ;
4408 (define-pmacro (load-double-semantics not_gr mode regtype address arg)
4409   (if (orif not_gr (ne (index-of (.sym regtype doublek)) 0))
4410       (sequence ()
4411                 (set address (add GRi arg))
4412                 (set (.sym regtype doublek)
4413                      (c-call mode (.str "@cpu@_read_mem_" mode) pc address))))
4414 )
4415
4416 (define-pmacro (load-double-r-r
4417                 name not_gr mode op ope regtype attr profile comment)
4418   (dni name
4419        (comment)
4420        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4421         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4422        (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4423        (+ pack (.sym regtype doublek) op GRi ope GRj)
4424        (sequence ((WI address))
4425                  (load-double-semantics not_gr mode regtype address GRj))
4426        profile
4427   )
4428 )
4429
4430 (load-double-r-r ldd  0 DI OP_02 OPE1_05 GR  NA
4431                  ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4432                   (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4433                  "Load double word")
4434 (load-double-r-r lddf 1 DF OP_02 OPE1_0B FR  FR-ACCESS
4435                  ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4436                   (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4437                  "Load double float")
4438 (load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) ()
4439                  "Load coprocessor double")
4440
4441 (define-pmacro (ne-load-double-r-r
4442                 name not_gr mode op ope regtype size is_float attr profile
4443                 comment)
4444   (dni name
4445        (comment)
4446        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4447         (MACH simple,tomcat,fr500,fr550,frv))
4448        (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4449        (+ pack (.sym regtype doublek) op GRi ope GRj)
4450        (sequence ((WI address))
4451                  (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek)
4452                                     0 size is_float
4453                                     (load-double-semantics not_gr mode
4454                                                            regtype
4455                                                            address GRj)))
4456        profile
4457   )
4458 )
4459
4460 (ne-load-double-r-r nldd  0 DI OP_02 OPE1_25 GR (ne-DI-size) 0 NA
4461                     ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double   word")
4462 (ne-load-double-r-r nlddf 1 DF OP_02 OPE1_2B FR (ne-DI-size) 1 FR-ACCESS
4463                     ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
4464
4465 ; Semantics for a load-quad insn
4466 ;
4467 (define-pmacro (load-quad-semantics regtype address arg)
4468   (sequence ()
4469             (set address (add GRi arg))
4470             (c-call VOID (.str "@cpu@_load_quad_" regtype)
4471                     pc address (index-of (.sym regtype k))))
4472 )
4473
4474 (define-pmacro (load-quad-r-r name op ope regtype attr profile comment)
4475   (dni name
4476        (comment)
4477        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4478        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4479        (+ pack (.sym regtype k) op GRi ope GRj)
4480        (sequence ((WI address))
4481                  (load-quad-semantics regtype address GRj))
4482        ; TODO regtype-k not referenced for profiling
4483        profile
4484   )
4485 )
4486
4487 (load-quad-r-r ldq  OP_02 OPE1_06 GR    NA        ((fr500 (unit u-gr-load)))
4488                "Load quad word")
4489 (load-quad-r-r ldqf OP_02 OPE1_0C FRint FR-ACCESS ((fr500 (unit u-fr-load)))
4490                "Load quad float")
4491 (load-quad-r-r ldqc OP_02 OPE1_0F CPR   NA        () "Load coprocessor quad")
4492
4493 (define-pmacro (ne-load-quad-r-r
4494                 name op ope regtype size is_float attr profile comment)
4495   (dni name
4496        (comment)
4497        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
4498        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4499        (+ pack (.sym regtype k) op GRi ope GRj)
4500        (sequence ((WI address))
4501                  (ne-load-semantics GRi (index-of GRj) (.sym regtype k)
4502                                     0 size is_float
4503                                     (load-quad-semantics regtype address GRj)))
4504        ; TODO regtype-k not referenced for profiling
4505        profile
4506   )
4507 )
4508
4509 (ne-load-quad-r-r nldq  OP_02 OPE1_26 GR    (ne-XI-size) 0 NA
4510                   ((fr500 (unit u-gr-load))) "Load quad word")
4511 (ne-load-quad-r-r nldqf OP_02 OPE1_2C FRint (ne-XI-size) 1 FR-ACCESS
4512                   ((fr500 (unit u-fr-load))) "Load quad float")
4513
4514 (define-pmacro (load-gr-u-semantics mode)
4515   (sequence ((UWI address))
4516             (set address (add GRi GRj))
4517             (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
4518             (if (ne (index-of GRi) (index-of GRk))
4519                 (sequence ()
4520                           (set GRi address)
4521                           (c-call VOID "@cpu@_force_update"))))
4522 )
4523
4524 (define-pmacro (load-gr-u name mode op ope comment)
4525   (dni name
4526        (comment)
4527        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4528         (FR400-MAJOR I-2) (FR450-MAJOR I-2))
4529        (.str name "$pack @($GRi,$GRj),$GRk")
4530        (+ pack GRk op GRi ope GRj)
4531        (load-gr-u-semantics mode)
4532        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4533         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4534   )
4535 )
4536
4537 (load-gr-u ldsbu   QI OP_02 OPE1_10 "Load   signed byte, update index")
4538 (load-gr-u ldubu  UQI OP_02 OPE1_11 "Load unsigned byte, update index")
4539 (load-gr-u ldshu   HI OP_02 OPE1_12 "Load   signed half, update index")
4540 (load-gr-u lduhu  UHI OP_02 OPE1_13 "Load unsigned half, update index")
4541 (load-gr-u ldu     SI OP_02 OPE1_14 "Load          word, update index")
4542
4543 (define-pmacro (ne-load-gr-u name mode op ope size comment)
4544   (dni name
4545        (comment)
4546        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4547         (MACH simple,tomcat,fr500,fr550,frv))
4548        (.str name "$pack @($GRi,$GRj),$GRk")
4549        (+ pack GRk op GRi ope GRj)
4550        (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 (load-gr-u-semantics mode))
4551        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4552   )
4553 )
4554
4555 (ne-load-gr-u nldsbu  QI OP_02 OPE1_30 (ne-QI-size)  "Load   signed byte, update index")
4556 (ne-load-gr-u nldubu UQI OP_02 OPE1_31 (ne-UQI-size) "Load unsigned byte, update index")
4557 (ne-load-gr-u nldshu  HI OP_02 OPE1_32 (ne-HI-size)  "Load   signed half, update index")
4558 (ne-load-gr-u nlduhu UHI OP_02 OPE1_33 (ne-UHI-size) "Load unsigned half, update index")
4559 (ne-load-gr-u nldu    SI OP_02 OPE1_34 (ne-SI-size)  "Load          word, update index")
4560
4561 (define-pmacro (load-non-gr-u-semantics mode regtype)
4562   (sequence ((UWI address))
4563             (set address (add GRi GRj))
4564             (set (.sym regtype k)
4565                  (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
4566             (set GRi address)
4567             (c-call VOID "@cpu@_force_update"))
4568 )
4569
4570 (define-pmacro (load-fr-u name mode op ope comment)
4571   (dni name
4572        (comment)
4573        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4574         (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS)
4575        (.str name "$pack @($GRi,$GRj),$FRintk")
4576        (+ pack FRintk op GRi ope GRj)
4577        (load-non-gr-u-semantics mode FRint)
4578        ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4579         (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4580   )
4581 )
4582
4583 (load-fr-u ldbfu  UQI OP_02 OPE1_18 "Load byte float, update index")
4584 (load-fr-u ldhfu  UHI OP_02 OPE1_19 "Load half float, update index")
4585 (load-fr-u ldfu    SI OP_02 OPE1_1A "Load word float, update index")
4586
4587 (define-pmacro (load-cpr-u name mode op ope comment)
4588   (dni name
4589        (comment)
4590        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
4591        (.str name "$pack @($GRi,$GRj),$CPRk")
4592        (+ pack CPRk op GRi ope GRj)
4593        (load-non-gr-u-semantics mode CPR)
4594        ()
4595   )
4596 )
4597
4598 (load-cpr-u ldcu SI OP_02 OPE1_1D "Load coprocessor word float,update index")
4599
4600 (define-pmacro (ne-load-non-gr-u name mode op ope regtype size comment)
4601   (dni name
4602        (comment)
4603        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4604         (MACH simple,tomcat,fr500,fr550,frv))
4605        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4606        (+ pack (.sym regtype k) op GRi ope GRj)
4607        (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
4608                           (load-non-gr-u-semantics mode regtype))
4609        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4610   )
4611 )
4612
4613 (ne-load-non-gr-u nldbfu UQI OP_02 OPE1_38 FRint (ne-UQI-size) "Load byte float, update index")
4614 (ne-load-non-gr-u nldhfu UHI OP_02 OPE1_39 FRint (ne-UHI-size) "Load half float, update index")
4615 (ne-load-non-gr-u nldfu   SI OP_02 OPE1_3A FRint (ne-SI-size)  "Load word float, update index")
4616
4617 (define-pmacro (load-double-gr-u-semantics)
4618   (sequence ((WI address))
4619             (load-double-semantics 0 DI GR address GRj)
4620             (if (ne (index-of GRi) (index-of GRdoublek))
4621                 (sequence ()
4622                           (set GRi address)
4623                           (c-call VOID "@cpu@_force_update"))))
4624 )
4625
4626 (define-pmacro (load-double-gr-u name op ope comment)
4627   (dni name
4628        (comment)
4629        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4630         (FR400-MAJOR I-2) (FR450-MAJOR I-2))
4631        (.str name "$pack @($GRi,$GRj),$GRdoublek")
4632        (+ pack GRdoublek op GRi ope GRj)
4633        (load-double-gr-u-semantics)
4634        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4635         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4636   )
4637 )
4638
4639 (load-double-gr-u lddu  OP_02 OPE1_15 "Load double word, update index")
4640
4641 (define-pmacro (ne-load-double-gr-u name op ope size comment)
4642   (dni name
4643        (comment)
4644        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4645         (MACH simple,tomcat,fr500,fr550,frv))
4646        (.str name "$pack @($GRi,$GRj),$GRdoublek")
4647        (+ pack GRdoublek op GRi ope GRj)
4648        (ne-load-semantics GRi (index-of GRj) GRdoublek 0 size 0
4649                           (load-double-gr-u-semantics))
4650        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4651
4652   )
4653 )
4654
4655 (ne-load-double-gr-u nlddu OP_02 OPE1_35 (ne-DI-size) "Load double word, update index")
4656
4657 (define-pmacro (load-double-non-gr-u-semantics mode regtype)
4658   (sequence ((WI address))
4659             (load-double-semantics 1 mode regtype address GRj)
4660             (set GRi address)
4661             (c-call VOID "@cpu@_force_update"))
4662 )
4663
4664 (define-pmacro (load-double-non-gr-u
4665                 name mode op ope regtype attr profile comment)
4666   (dni name
4667        (comment)
4668        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4669         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4670        (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4671        (+ pack (.sym regtype doublek) op GRi ope GRj)
4672        (load-double-non-gr-u-semantics mode regtype)
4673        profile
4674   )
4675 )
4676
4677 (load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR  FR-ACCESS
4678                       ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4679                        (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4680                       "Load double float, update index")
4681 (load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv)
4682                       () "Load coprocessor double float, update index")
4683
4684 (define-pmacro (ne-load-double-non-gr-u name mode op ope regtype size comment)
4685   (dni name
4686        (comment)
4687        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4688         (MACH simple,tomcat,fr500,fr550,frv))
4689        (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4690        (+ pack (.sym regtype doublek) op GRi ope GRj)
4691        (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 0 size 1
4692                           (load-double-non-gr-u-semantics mode regtype))
4693        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4694   )
4695 )
4696
4697 (ne-load-double-non-gr-u nlddfu DF OP_02 OPE1_3B FR (ne-DI-size) "Load double float, update index")
4698
4699 (define-pmacro (load-quad-gr-u-semantics)
4700   (sequence ((WI address))
4701             (load-quad-semantics GR address GRj)
4702             (if (ne (index-of GRi) (index-of GRk))
4703                 (sequence ()
4704                           (set GRi address)
4705                           (c-call VOID "@cpu@_force_update"))))
4706 )
4707
4708 (define-pmacro (load-quad-gr-u name op ope comment)
4709   (dni name
4710        (comment)
4711        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
4712        (.str name "$pack @($GRi,$GRj),$GRk")
4713        (+ pack GRk op GRi ope GRj)
4714        (load-quad-gr-u-semantics)
4715        ; TODO - GRk not referenced here for profiling
4716        ((fr500 (unit u-gr-load)))
4717   )
4718 )
4719
4720 (load-quad-gr-u ldqu  OP_02 OPE1_16 "Load quad word, update index")
4721
4722 (define-pmacro (ne-load-quad-gr-u name op ope size comment)
4723   (dni name
4724        (comment)
4725        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING)
4726        (.str name "$pack @($GRi,$GRj),$GRk")
4727        (+ pack GRk op GRi ope GRj)
4728        (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
4729                           (load-quad-gr-u-semantics))
4730        ; TODO - GRk not referenced here for profiling
4731        ((fr500 (unit u-gr-load)))
4732   )
4733 )
4734
4735 (ne-load-quad-gr-u nldqu OP_02 OPE1_36 (ne-XI-size) "Load quad word, update index")
4736
4737 (define-pmacro (load-quad-non-gr-u-semantics regtype)
4738   (sequence ((WI address))
4739             (load-quad-semantics regtype address GRj)
4740             (set GRi address)
4741             (c-call VOID "@cpu@_force_update"))
4742 )
4743
4744 (define-pmacro (load-quad-non-gr-u name op ope regtype attr profile comment)
4745   (dni name
4746        (comment)
4747        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4748        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4749        (+ pack (.sym regtype k) op GRi ope GRj)
4750        (load-quad-non-gr-u-semantics regtype)
4751        profile
4752   )
4753 )
4754
4755 (load-quad-non-gr-u ldqfu OP_02 OPE1_1C FRint FR-ACCESS
4756                     ((fr500 (unit u-fr-load))) "Load quad float, update index")
4757 (load-quad-non-gr-u ldqcu OP_02 OPE1_1F CPR   NA
4758                     () "Load coprocessor quad word, update index")
4759
4760 (define-pmacro (ne-load-quad-non-gr-u name op ope regtype size comment)
4761   (dni name
4762        (comment)
4763        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING FR-ACCESS)
4764        (.str name "$pack @($GRi,$GRj),$" regtype "k")
4765        (+ pack (.sym regtype k) op GRi ope GRj)
4766        (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
4767                           (load-quad-non-gr-u-semantics regtype))
4768        ((fr500 (unit u-fr-load)))
4769   )
4770 )
4771
4772 (ne-load-quad-non-gr-u nldqfu OP_02 OPE1_3C FRint (ne-XI-size) "Load quad float,update index")
4773
4774 (define-pmacro (load-r-simm name mode op regtype attr profile comment)
4775   (dni name
4776        (comment)
4777        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4778         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4779        (.str name "$pack @($GRi,$d12),$" regtype "k")
4780        (+ pack (.sym regtype k) op GRi d12)
4781        (set (.sym regtype k)
4782             (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi d12)))
4783        profile
4784   )
4785 )
4786
4787 (load-r-simm ldsbi  QI OP_30 GR NA
4788              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4789               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4790              "Load   signed byte")
4791 (load-r-simm ldshi  HI OP_31 GR NA
4792              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4793               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4794              "Load   signed half")
4795 (load-r-simm ldi    SI OP_32 GR NA
4796              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4797               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4798              "Load          word")
4799 (load-r-simm ldubi UQI OP_35 GR NA
4800              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4801               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4802              "Load unsigned byte")
4803 (load-r-simm lduhi UHI OP_36 GR NA
4804              ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4805               (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4806              "Load unsigned half")
4807
4808 (load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS
4809              ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4810               (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4811              "Load byte float")
4812 (load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS
4813              ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4814               (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4815              "Load half float")
4816 (load-r-simm ldfi   SI OP_3A FRint FR-ACCESS
4817              ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4818               (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4819              "Load word float")
4820
4821 (define-pmacro (ne-load-r-simm
4822                 name mode op regtype size is_float attr profile comment)
4823   (dni name
4824        (comment)
4825        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4826         (MACH simple,tomcat,fr500,fr550,frv))
4827        (.str name "$pack @($GRi,$d12),$" regtype "k")
4828        (+ pack (.sym regtype k) op GRi d12)
4829        (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
4830                           (set (.sym regtype k)
4831                                (c-call mode (.str "@cpu@_read_mem_" mode)
4832                                        pc (add GRi d12))))
4833        profile
4834   )
4835 )
4836
4837 (ne-load-r-simm nldsbi  QI OP_40 GR (ne-QI-size)  0 NA
4838                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load   signed byte")
4839 (ne-load-r-simm nldubi UQI OP_41 GR (ne-UQI-size) 0 NA
4840                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte")
4841 (ne-load-r-simm nldshi  HI OP_42 GR (ne-HI-size)  0 NA
4842                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load   signed half")
4843 (ne-load-r-simm nlduhi UHI OP_43 GR (ne-UHI-size) 0 NA
4844                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half")
4845 (ne-load-r-simm nldi    SI OP_44 GR (ne-SI-size)  0 NA
4846                 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load          word")
4847
4848 (ne-load-r-simm nldbfi UQI OP_48 FRint (ne-UQI-size) 1 FR-ACCESS
4849                 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float")
4850 (ne-load-r-simm nldhfi UHI OP_49 FRint (ne-UHI-size) 1 FR-ACCESS
4851                 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float")
4852 (ne-load-r-simm nldfi   SI OP_4A FRint (ne-SI-size)  1 FR-ACCESS
4853                 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float")
4854
4855 (define-pmacro (load-double-r-simm
4856                 name not_gr mode op regtype attr profile comment)
4857   (dni name
4858        (comment)
4859        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
4860         (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
4861        (.str name "$pack @($GRi,$d12),$" regtype "doublek")
4862        (+ pack (.sym regtype doublek) op GRi d12)
4863        (sequence ((WI address))
4864                  (load-double-semantics not_gr mode regtype address d12))
4865        profile
4866   )
4867 )
4868
4869 (load-double-r-simm lddi  0 DI OP_33 GR NA
4870                     ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
4871                      (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
4872                     "Load double word")
4873 (load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS
4874                     ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
4875                      (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
4876                     "Load double float")
4877
4878 (define-pmacro (ne-load-double-r-simm
4879                 name not_gr mode op regtype size is_float attr profile comment)
4880   (dni name
4881        (comment)
4882        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4883         (MACH simple,tomcat,fr500,fr550,frv))
4884        (.str name "$pack @($GRi,$d12),$" regtype "doublek")
4885        (+ pack (.sym regtype doublek) op GRi d12)
4886        (sequence ((WI address))
4887                  (ne-load-semantics GRi -1 (.sym regtype doublek)
4888                                     d12 size is_float
4889                                     (load-double-semantics not_gr mode
4890                                                            regtype
4891                                                            address d12)))
4892        profile
4893   )
4894 )
4895
4896 (ne-load-double-r-simm nlddi  0 DI OP_45 GR (ne-DI-size) 0 NA
4897                        ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word")
4898 (ne-load-double-r-simm nlddfi 1 DF OP_4B FR (ne-DI-size) 1 FR-ACCESS
4899                        ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
4900
4901 (define-pmacro (load-quad-r-simm name op regtype attr profile comment)
4902   (dni name
4903        (comment)
4904        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4905        (.str name "$pack @($GRi,$d12),$" regtype "k")
4906        (+ pack (.sym regtype k) op GRi d12)
4907        (sequence ((WI address))
4908                  (load-quad-semantics regtype address d12))
4909        profile
4910   )
4911 )
4912
4913 (load-quad-r-simm ldqi  OP_34 GR    NA
4914                   ((fr500 (unit u-gr-load))) "Load quad word")
4915 (load-quad-r-simm ldqfi OP_3C FRint FR-ACCESS
4916                   ((fr500 (unit u-fr-load))) "Load quad float")
4917
4918 (define-pmacro (ne-load-quad-r-simm
4919                 name op regtype size is_float attr profile comment)
4920   (dni name
4921        (comment)
4922        ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
4923        (.str name "$pack @($GRi,$d12),$" regtype "k")
4924        (+ pack (.sym regtype k) op GRi d12)
4925        (sequence ((WI address))
4926                  (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
4927                                     (load-quad-semantics regtype address d12)))
4928        profile
4929   )
4930 )
4931
4932 (ne-load-quad-r-simm nldqfi OP_4C FRint (ne-XI-size) 1 FR-ACCESS
4933                      ((fr500 (unit u-fr-load))) "Load quad float")
4934
4935 (define-pmacro (store-r-r name mode op ope reg attr profile comment)
4936   (dni name
4937        (comment)
4938        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
4939         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
4940        (.str name "$pack $" reg "k,@($GRi,$GRj)")
4941        (+ pack (.sym reg k) op GRi ope GRj)
4942        (c-call VOID (.str "@cpu@_write_mem_" mode)
4943                pc (add GRi GRj) (.sym reg k))
4944        profile
4945   )
4946 )
4947
4948 (store-r-r stb   QI OP_03 OPE1_00 GR NA
4949            ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
4950             (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
4951            "Store unsigned byte")
4952 (store-r-r sth   HI OP_03 OPE1_01 GR NA
4953            ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
4954             (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
4955            "Store unsigned half")
4956 (store-r-r st    SI OP_03 OPE1_02 GR NA
4957            ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
4958             (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
4959            "Store          word")
4960
4961 (store-r-r stbf  QI OP_03 OPE1_08 FRint FR-ACCESS
4962            ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
4963             (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
4964            "Store byte float")
4965 (store-r-r sthf  HI OP_03 OPE1_09 FRint FR-ACCESS
4966            ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
4967             (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
4968            "Store half float")
4969 (store-r-r stf   SI OP_03 OPE1_0A FRint FR-ACCESS
4970            ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
4971             (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
4972            "Store word float")
4973
4974 (store-r-r stc   SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word")
4975
4976 ; Semantics for a store-double insn
4977 ;
4978 (define-pmacro (store-double-semantics mode regtype address arg)
4979   (sequence ()
4980             (set address (add GRi arg))
4981             (c-call VOID (.str "@cpu@_write_mem_" mode)
4982                     pc address (.sym regtype doublek)))
4983 )
4984
4985 (define-pmacro (store-double-r-r name mode op ope regtype attr profile comment)
4986   (dni name
4987        (comment)
4988        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
4989         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
4990        (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
4991        (+ pack (.sym regtype doublek) op GRi ope GRj)
4992        (sequence ((WI address))
4993                  (store-double-semantics mode regtype address GRj))
4994        profile
4995   )
4996 )
4997
4998 (store-double-r-r std  DI OP_03 OPE1_03 GR  NA
4999                   ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5000                    (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5001                   "Store double word")
5002 (store-double-r-r stdf DF OP_03 OPE1_0B FR  FR-ACCESS
5003                   ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5004                    (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5005                   "Store double float")
5006
5007 (store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv)
5008                   () "Store coprocessor double word")
5009
5010 ; Semantics for a store-quad insn
5011 ;
5012 (define-pmacro (store-quad-semantics regtype address arg)
5013   (sequence ()
5014             (set address (add GRi arg))
5015             (c-call VOID (.str "@cpu@_store_quad_" regtype)
5016                      pc address (index-of (.sym regtype k))))
5017 )
5018
5019 (define-pmacro (store-quad-r-r name op ope regtype attr profile comment)
5020   (dni name
5021        (comment)
5022        ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
5023        (.str name "$pack $" regtype "k,@($GRi,$GRj)")
5024        (+ pack (.sym regtype k) op GRi ope GRj)
5025        (sequence ((WI address))
5026                  (store-quad-semantics regtype address GRj))
5027        profile
5028   )
5029 )
5030
5031 (store-quad-r-r stq   OP_03 OPE1_04 GR    NA
5032                 ((fr500 (unit u-gr-store))) "Store quad word")
5033 (store-quad-r-r stqf  OP_03 OPE1_0C FRint FR-ACCESS
5034                 ((fr500 (unit u-fr-store)))
5035                 "Store quad float")
5036 (store-quad-r-r stqc  OP_03 OPE1_27 CPR   NA
5037                 () "Store coprocessor quad word")
5038
5039 (define-pmacro (store-r-r-u name mode op ope regtype attr profile comment)
5040   (dni name
5041        (comment)
5042        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5043         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5044        (.str name "$pack $" regtype "k,@($GRi,$GRj)")
5045        (+ pack (.sym regtype k) op GRi ope GRj)
5046        (sequence ((UWI address))
5047                  (set address (add GRi GRj))
5048                  (c-call VOID (.str "@cpu@_write_mem_" mode)
5049                          pc address (.sym regtype k))
5050                  (set GRi address))
5051        profile
5052   )
5053 )
5054
5055 (store-r-r-u stbu  QI OP_03 OPE1_10 GR NA
5056              ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5057               (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5058              "Store unsigned byte, update index")
5059 (store-r-r-u sthu  HI OP_03 OPE1_11 GR NA
5060              ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5061               (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5062              "Store unsigned half, update index")
5063 (store-r-r-u stu   WI OP_03 OPE1_12 GR NA
5064              ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5065               (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5066              "Store          word, update index")
5067
5068 (store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS
5069              ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5070               (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5071              "Store byte float, update index")
5072 (store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS
5073              ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5074               (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5075              "Store half float, update index")
5076 (store-r-r-u stfu  SI OP_03 OPE1_1A FRint FR-ACCESS
5077              ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5078               (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5079              "Store word float, update index")
5080
5081 (store-r-r-u stcu  SI OP_03 OPE1_2D CPR (MACH frv) ()
5082              "Store coprocessor word, update index")
5083
5084 (define-pmacro (store-double-r-r-u
5085                 name mode op ope regtype attr profile comment)
5086   (dni name
5087        (comment)
5088        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5089         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5090        (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
5091        (+ pack (.sym regtype doublek) op GRi ope GRj)
5092        (sequence ((WI address))
5093                  (store-double-semantics mode regtype address GRj)
5094                  (set GRi address))
5095        profile
5096   )
5097 )
5098
5099 (store-double-r-r-u stdu  DI OP_03 OPE1_13 GR  NA
5100                     ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5101                      (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5102                     "Store double word, update index")
5103 (store-double-r-r-u stdfu DF OP_03 OPE1_1B FR  FR-ACCESS
5104                     ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5105                      (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5106                     "Store double float,update index")
5107 (store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) ()
5108                     "Store coprocessor double word, update index")
5109
5110 (define-pmacro (store-quad-r-r-u name op ope regtype attr profile comment)
5111   (dni name
5112        (comment)
5113        ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
5114        (.str name "$pack $" regtype "k,@($GRi,$GRj)")
5115        (+ pack (.sym regtype k) op GRi ope GRj)
5116        (sequence ((WI address))
5117                  (store-quad-semantics regtype address GRj)
5118                  (set GRi address))
5119        profile
5120   )
5121 )
5122
5123 (store-quad-r-r-u stqu  OP_03 OPE1_14 GR    NA
5124                   ((fr500 (unit u-gr-store)))
5125                   "Store quad word, update index")
5126 (store-quad-r-r-u stqfu OP_03 OPE1_1C FRint FR-ACCESS
5127                   ((fr500 (unit u-fr-store)))
5128                   "Store quad float, update index")
5129 (store-quad-r-r-u stqcu OP_03 OPE1_2F CPR   NA ()
5130                   "Store coprocessor quad   word, update index")
5131
5132 (define-pmacro (conditional-load name mode op ope regtype profile comment)
5133   (dni name
5134        (comment)
5135        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5136         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
5137        (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
5138        (+ pack (.sym regtype k) op GRi CCi  cond ope GRj)
5139        (if (eq CCi (or cond 2))
5140            (set (.sym regtype k)
5141                 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))))
5142        profile
5143   )
5144 )
5145
5146 (conditional-load cldsb  QI OP_5E OPE4_0 GR
5147                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5148                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5149                   "Load   signed byte")
5150 (conditional-load cldub UQI OP_5E OPE4_1 GR
5151                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5152                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5153                   "Load unsigned byte")
5154 (conditional-load cldsh  HI OP_5E OPE4_2 GR
5155                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5156                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5157                   "Load   signed half")
5158 (conditional-load clduh UHI OP_5E OPE4_3 GR
5159                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5160                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5161                   "Load unsigned half")
5162 (conditional-load cld    SI OP_5F OPE4_0 GR
5163                   ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5164                    (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5165                   "Load          word")
5166
5167 (conditional-load cldbf UQI OP_60 OPE4_0 FRint
5168                   ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5169                    (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5170                   "Load byte float")
5171 (conditional-load cldhf UHI OP_60 OPE4_1 FRint
5172                   ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5173                    (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5174                   "Load half float")
5175 (conditional-load cldf   SI OP_60 OPE4_2 FRint
5176                   ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5177                    (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5178                   "Load word float")
5179
5180 (define-pmacro (conditional-load-double
5181                 name not_gr mode op ope regtype attr profile comment)
5182   (dni name
5183        (comment)
5184        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5185         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL attr)
5186        (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond")
5187        (+ pack (.sym regtype doublek) op GRi CCi  cond ope GRj)
5188        (if (eq CCi (or cond 2))
5189            (sequence ((WI address))
5190                      (load-double-semantics not_gr mode regtype address GRj)))
5191        profile
5192   )
5193 )
5194
5195 (conditional-load-double cldd  0 DI OP_5F OPE4_1 GR NA
5196                          ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5197                           (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5198                          "Load double word")
5199 (conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS
5200                          ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5201                           (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load)))
5202                          "Load double float")
5203
5204 (dni cldq
5205      "conditional load quad integer"
5206      ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
5207      "cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond"
5208      (+ pack GRk OP_5F GRi CCi cond OPE4_2 GRj)
5209      (if (eq CCi (or cond 2))
5210          (sequence ((WI address))
5211                    (load-quad-semantics GR address GRj)))
5212      ((fr500 (unit u-gr-load)))
5213 )
5214
5215 (define-pmacro (conditional-load-gr-u name mode op ope comment)
5216   (dni name
5217        (comment)
5218        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5219         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
5220        (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond")
5221        (+ pack GRk op GRi CCi  cond ope GRj)
5222        (if (eq CCi (or cond 2))
5223            (sequence ((WI address))
5224                      (set address (add GRi GRj))
5225                      (set GRk
5226                           (c-call mode (.str "@cpu@_read_mem_" mode)
5227                                   pc address))
5228                      (if (ne (index-of GRi) (index-of GRk))
5229                          (set GRi address))))
5230        ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5231         (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5232   )
5233 )
5234
5235 (conditional-load-gr-u cldsbu  QI OP_61 OPE4_0 "Load   signed byte, update")
5236 (conditional-load-gr-u cldubu UQI OP_61 OPE4_1 "Load unsigned byte, update")
5237 (conditional-load-gr-u cldshu  HI OP_61 OPE4_2 "Load   signed half, update")
5238 (conditional-load-gr-u clduhu UHI OP_61 OPE4_3 "Load unsigned half, update")
5239 (conditional-load-gr-u cldu    SI OP_62 OPE4_0 "Load          word, update")
5240
5241 (define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment)
5242   (dni name
5243        (comment)
5244        ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5245         (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS)
5246        (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
5247        (+ pack (.sym regtype k) op GRi CCi  cond ope GRj)
5248        (if (eq CCi (or cond 2))
5249            (sequence ((WI address))
5250                      (set address (add GRi GRj))
5251                      (set (.sym regtype k)
5252                           (c-call mode (.str "@cpu@_read_mem_" mode)
5253                                   pc address))
5254                      (set GRi address)))
5255        ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5256         (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5257   )
5258 )
5259
5260 (conditional-load-non-gr-u cldbfu UQI OP_63 OPE4_0 FRint "Load byte float, update")
5261 (conditional-load-non-gr-u cldhfu UHI OP_63 OPE4_1 FRint "Load half float, update")
5262 (conditional-load-non-gr-u cldfu   SI OP_63 OPE4_2 FRint "Load word float, update")
5263
5264
5265 (dni clddu
5266      "Load double word,  update"
5267      ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5268       (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
5269      "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond"
5270      (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj)
5271      (if (eq CCi (or cond 2))
5272          (sequence ((WI address))
5273                    (load-double-semantics 0 DI GR address GRj)
5274                    (if (ne (index-of GRi) (index-of GRdoublek))
5275                        (set GRi address))))
5276      ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
5277       (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
5278 )
5279
5280 (dni clddfu
5281      "Load double float, update"
5282      ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
5283       (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS)
5284      "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond"
5285      (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj)
5286      (if (eq CCi (or cond 2))
5287          (sequence ((WI address))
5288                    (load-double-semantics 1 DF FR address GRj)
5289                    (set GRi address)))
5290      ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
5291       (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
5292 )
5293
5294 (dni cldqu
5295      "conditional load quad integer and update index"
5296      ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
5297      "cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond"
5298      (+ pack GRk OP_62 GRi CCi cond OPE4_2 GRj)
5299      (if (eq CCi (or cond 2))
5300          (sequence ((WI address))
5301                    (load-quad-semantics GR address GRj)
5302                    (if (ne (index-of GRi) (index-of GRk))
5303                        (set GRi address))))
5304      ((fr500 (unit u-gr-load)))
5305 )
5306
5307 (define-pmacro (conditional-store name mode op ope regtype profile comment)
5308   (dni name
5309        (comment)
5310        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5311         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL)
5312        (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
5313        (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
5314        (if (eq CCi (or cond 2))
5315            (c-call VOID (.str "@cpu@_write_mem_" mode)
5316                    pc (add GRi GRj) (.sym regtype k)))
5317        profile
5318   )
5319 )
5320
5321 (conditional-store cstb  QI OP_64 OPE4_0 GR
5322                    ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5323                     (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5324                    "Store unsigned byte")
5325 (conditional-store csth  HI OP_64 OPE4_1 GR
5326                    ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5327                     (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5328                    "Store unsigned half")
5329 (conditional-store cst   SI OP_64 OPE4_2 GR
5330                    ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5331                     (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5332                    "Store          word")
5333
5334 (conditional-store cstbf QI OP_66 OPE4_0 FRint
5335                    ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5336                     (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5337                    "Store byte float")
5338 (conditional-store csthf HI OP_66 OPE4_1 FRint
5339                    ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5340                     (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5341                    "Store half float")
5342 (conditional-store cstf  SI OP_66 OPE4_2 FRint
5343                    ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5344                     (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5345                    "Store word float")
5346
5347 (define-pmacro (conditional-store-double
5348                 name mode op ope regtype attr profile comment)
5349   (dni name
5350        (comment)
5351        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5352         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
5353        (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
5354        (+ pack (.sym regtype doublek) op GRi CCi  cond ope GRj)
5355        (if (eq CCi (or cond 2))
5356            (sequence ((WI address))
5357                      (store-double-semantics mode regtype address GRj)))
5358        profile
5359   )
5360 )
5361
5362 (conditional-store-double cstd  DI OP_64 OPE4_3 GR NA
5363                           ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5364                            (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5365                           "Store double word")
5366 (conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS
5367                           ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5368                            (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5369                           "Store double float")
5370
5371 (dni cstq
5372      "conditionally store quad word"
5373      ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) CONDITIONAL)
5374      "cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond"
5375      (+ pack GRk OP_65 GRi CCi cond OPE4_0 GRj)
5376      (if (eq CCi (or cond 2))
5377          (sequence ((WI address))
5378                    (store-quad-semantics GR address GRj)))
5379      ((fr500 (unit u-gr-store)))
5380 )
5381
5382 (define-pmacro (conditional-store-u
5383                 name mode op ope regtype attr profile comment)
5384   (dni name
5385        (comment)
5386        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5387         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
5388        (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
5389        (+ pack (.sym regtype k) op GRi CCi  cond ope GRj)
5390        (if (eq CCi (or cond 2))
5391            (sequence ((WI address))
5392                      (set address (add GRi GRj))
5393                      (c-call VOID (.str "@cpu@_write_mem_" mode)
5394                              pc address (.sym regtype k))
5395                      (set GRi address)))
5396        profile
5397   )
5398 )
5399
5400 (conditional-store-u cstbu QI OP_67 OPE4_0 GR NA
5401                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5402                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5403                      "Store unsigned byte, update index")
5404 (conditional-store-u csthu HI OP_67 OPE4_1 GR NA
5405                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5406                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5407                      "Store unsigned half, update index")
5408 (conditional-store-u cstu  SI OP_67 OPE4_2 GR NA
5409                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5410                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5411                      "Store          word, update index")
5412
5413 (conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS
5414                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5415                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5416                      "Store byte float, update index")
5417 (conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS
5418                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5419                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5420                      "Store half float, update index")
5421 (conditional-store-u cstfu  SI OP_68 OPE4_2 FRint FR-ACCESS
5422                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5423                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5424                      "Store word float, update index")
5425
5426 (define-pmacro (conditional-store-double-u
5427                 name mode op ope regtype attr profile comment)
5428   (dni name
5429        (comment)
5430        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5431         (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
5432        (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
5433        (+ pack (.sym regtype doublek) op GRi CCi  cond ope GRj)
5434        (if (eq CCi (or cond 2))
5435            (sequence ((WI address))
5436                      (store-double-semantics mode regtype address GRj)
5437                      (set GRi address)))
5438        profile
5439   )
5440 )
5441
5442 (conditional-store-double-u cstdu  DI OP_67 OPE4_3 GR NA
5443                             ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5444                              (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5445                             "Store double word, update index")
5446 (conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS
5447                             ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5448                              (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5449                             "Store double float, update index")
5450
5451 (define-pmacro (store-r-simm name mode op regtype attr profile comment)
5452   (dni name
5453        (comment)
5454        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5455         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5456        (.str name "$pack $" regtype "k,@($GRi,$d12)")
5457        (+ pack (.sym regtype k) op GRi d12)
5458        (c-call VOID (.str "@cpu@_write_mem_" mode)
5459                pc (add GRi d12) (.sym regtype k))
5460        profile
5461   )
5462 )
5463
5464 (store-r-simm stbi QI OP_50 GR NA
5465               ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5466                (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5467               "Store unsigned byte")
5468 (store-r-simm sthi HI OP_51 GR NA
5469               ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5470                (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5471               "Store unsigned half")
5472 (store-r-simm sti  SI OP_52 GR NA
5473               ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5474                (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5475               "Store          word")
5476
5477 (store-r-simm stbfi QI OP_4E FRint FR-ACCESS
5478               ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5479                (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5480               "Store byte float")
5481 (store-r-simm sthfi HI OP_4F FRint FR-ACCESS
5482               ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5483                (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5484               "Store half float")
5485 (store-r-simm stfi  SI OP_55 FRint FR-ACCESS
5486               ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5487                (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5488               "Store word float")
5489
5490 (define-pmacro (store-double-r-simm name mode op regtype attr profile comment)
5491   (dni name
5492        (comment)
5493        ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
5494         (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
5495        (.str name "$pack $" regtype "doublek,@($GRi,$d12)")
5496        (+ pack (.sym regtype doublek) op GRi d12)
5497        (sequence ((WI address))
5498                  (store-double-semantics mode regtype address d12))
5499        profile
5500   )
5501 )
5502
5503 (store-double-r-simm stdi  DI OP_53 GR NA
5504                      ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
5505                       (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
5506                      "Store double word")
5507 (store-double-r-simm stdfi DF OP_56 FR FR-ACCESS
5508                      ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
5509                       (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
5510                      "Store double float")
5511
5512 (define-pmacro (store-quad-r-simm name op regtype attr profile comment)
5513   (dni name
5514        (comment)
5515        ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
5516        (.str name "$pack $" regtype "k,@($GRi,$d12)")
5517        (+ pack (.sym regtype k) op GRi d12)
5518        (sequence ((WI address))
5519                  (store-quad-semantics regtype address d12))
5520        profile
5521   )
5522 )
5523
5524 (store-quad-r-simm stqi  OP_54 GR    NA ((fr500 (unit u-gr-store)))
5525                    "Store quad word")
5526 (store-quad-r-simm stqfi OP_57 FRint FR-ACCESS ()
5527                    "Store quad float")
5528
5529 (define-pmacro (swap-semantics base offset arg)
5530   (sequence ((WI tmp) (WI address))
5531             (set tmp arg)
5532             (set address (add base offset))
5533             (c-call VOID "@cpu@_check_swap_address" address)
5534             (set arg (c-call WI "@cpu@_read_mem_WI" pc address))
5535             (c-call VOID "@cpu@_write_mem_WI" pc address tmp))
5536 )
5537
5538 (dni swap
5539      "Swap contents of memory with GR"
5540      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5541       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
5542      "swap$pack @($GRi,$GRj),$GRk"
5543      (+ pack GRk OP_03 GRi OPE1_05 GRj)
5544      (swap-semantics GRi GRj GRk)
5545      ((fr400 (unit u-swap)) (fr450 (unit u-swap))
5546       (fr500 (unit u-swap)) (fr550 (unit u-swap)))
5547 )
5548
5549 (dni "swapi"
5550      "Swap contents of memory with GR"
5551      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5552       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
5553      ("swapi$pack @($GRi,$d12),$GRk")
5554      (+ pack GRk OP_4D GRi d12)
5555      (swap-semantics GRi d12 GRk)
5556      ((fr400 (unit u-swap)) (fr450 (unit u-swap))
5557       (fr500 (unit u-swap)) (fr550 (unit u-swap)))
5558 )
5559
5560 (dni cswap
5561      "Conditionally swap contents of memory with GR"
5562      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5563       (FR400-MAJOR C-2) (FR450-MAJOR C-2) CONDITIONAL)
5564      "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond"
5565      (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj)
5566      (if (eq CCi (or cond 2))
5567          (swap-semantics GRi GRj GRk))
5568      ((fr400 (unit u-swap)) (fr450 (unit u-swap))
5569       (fr500 (unit u-swap)) (fr550 (unit u-swap)))
5570 )
5571
5572 (define-pmacro (register-transfer
5573                 name op ope reg_src reg_targ pipe attrs profile comment)
5574   (dni name
5575        (comment)
5576        (.splice (UNIT pipe) (.unsplice attrs))
5577        (.str name "$pack $" reg_src ",$" reg_targ)
5578        (+ pack reg_targ op (rs-null) ope reg_src)
5579        (set reg_targ reg_src)
5580        profile
5581   )
5582 )
5583
5584 (register-transfer movgf OP_03 OPE1_15
5585                    GRj FRintk I0
5586                    ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5587                     (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5588                    ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5589                     (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5590                    "transfer gr to fr")
5591 (register-transfer movfg OP_03 OPE1_0D
5592                    FRintk GRj I0
5593                    ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5594                     (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5595                    ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5596                     (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5597                    "transfer fr to gr")
5598
5599 (define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset)))
5600
5601 (define-pmacro (register-transfer-double-from-gr-semantics cond)
5602   (if cond
5603       (if (eq (index-of GRj) 0)
5604           (sequence ()
5605                     (set FRintk 0)
5606                     (set (nextreg h-fr_int FRintk 1) 0))
5607           (sequence ()
5608                     (set FRintk GRj)
5609                     (set (nextreg h-fr_int FRintk 1) (nextreg h-gr GRj 1)))))
5610 )
5611
5612 (dni movgfd
5613      "move GR for FR double"
5614      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5615       (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5616      "movgfd$pack $GRj,$FRintk"
5617      (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj)
5618      (register-transfer-double-from-gr-semantics 1)
5619      ; TODO -- doesn't handle second register in the pair
5620      ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5621       (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5622 )
5623
5624 (define-pmacro (register-transfer-double-to-gr-semantics cond)
5625   (if (andif (ne (index-of GRj) 0) cond)
5626       (sequence ()
5627                 (set GRj FRintk)
5628                 (set (nextreg h-gr GRj 1) (nextreg h-fr_int FRintk 1))))
5629 )
5630
5631 (dni movfgd
5632      "move FR for GR double"
5633      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5634       (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
5635      "movfgd$pack $FRintk,$GRj"
5636      (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj)
5637      (register-transfer-double-to-gr-semantics 1)
5638      ; TODO -- doesn't handle second register in the pair
5639      ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5640       (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5641 )
5642
5643 (dni movgfq
5644      "move GR for FR quad"
5645      ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
5646      "movgfq$pack $GRj,$FRintk"
5647      (+ pack FRintk OP_03 (rs-null) OPE1_17 GRj)
5648      (if (eq (index-of GRj) 0)
5649          (sequence ()
5650                    (set FRintk 0)
5651                    (set (reg h-fr_int (add (index-of FRintk) 1)) 0)
5652                    (set (reg h-fr_int (add (index-of FRintk) 2)) 0)
5653                    (set (reg h-fr_int (add (index-of FRintk) 3)) 0))
5654          (sequence ()
5655                    (set FRintk GRj)
5656                    (set (reg h-fr_int (add (index-of FRintk) 1))
5657                         (reg h-gr (add (index-of GRj)    1)))
5658                    (set (reg h-fr_int (add (index-of FRintk) 2))
5659                         (reg h-gr (add (index-of GRj)    2)))
5660                    (set (reg h-fr_int (add (index-of FRintk) 3))
5661                         (reg h-gr (add (index-of GRj)    3)))))
5662      ()
5663 )
5664
5665 (dni movfgq
5666      "move FR for GR quad"
5667      ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
5668      "movfgq$pack $FRintk,$GRj"
5669      (+ pack FRintk OP_03 (rs-null) OPE1_0F GRj)
5670      (if (ne (index-of GRj) 0)
5671          (sequence ()
5672                    (set GRj FRintk)
5673                    (set (reg h-gr (add (index-of GRj)    1))
5674                         (reg h-fr_int (add (index-of FRintk) 1)))
5675                    (set (reg h-gr (add (index-of GRj)    2))
5676                         (reg h-fr_int (add (index-of FRintk) 2)))
5677                    (set (reg h-gr (add (index-of GRj)    3))
5678                         (reg h-fr_int (add (index-of FRintk) 3)))))
5679      ()
5680 )
5681
5682 (define-pmacro (conditional-register-transfer
5683                 name op ope reg_src reg_targ pipe attrs profile comment)
5684   (dni name
5685        (comment)
5686        (.splice (UNIT pipe) CONDITIONAL FR-ACCESS (.unsplice attrs))
5687        (.str name "$pack $" reg_src ",$" reg_targ ",$CCi,$cond")
5688        (+ pack reg_targ op (rs-null) CCi cond ope reg_src)
5689        (if (eq CCi (or cond 2))
5690            (set reg_targ reg_src))
5691        profile
5692   )
5693 )
5694
5695 (conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0
5696                                ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5697                                 (FR400-MAJOR I-4) (FR450-MAJOR I-4))
5698                                ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5699                                 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5700                                "transfer gr to fr")
5701 (conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0
5702                                ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
5703                                 (FR400-MAJOR I-4) (FR450-MAJOR I-4))
5704                                ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5705                                 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5706                                "transfer fr to gr")
5707
5708
5709 (dni cmovgfd
5710      "Conditional move GR to FR double"
5711      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5712       (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS)
5713      "cmovgfd$pack $GRj,$FRintk,$CCi,$cond"
5714      (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj)
5715      (register-transfer-double-from-gr-semantics (eq CCi (or cond 2)))
5716      ; TODO -- doesn't handle extra registers in double
5717      ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
5718       (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
5719 )
5720
5721 (dni cmovfgd
5722      "Conditional move FR to GR double"
5723      ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
5724       (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS)
5725      "cmovfgd$pack $FRintk,$GRj,$CCi,$cond"
5726      (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj)
5727      (register-transfer-double-to-gr-semantics (eq CCi (or cond 2)))
5728      ; TODO -- doesn't handle second register in the pair
5729      ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
5730       (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
5731 )
5732
5733 (define-pmacro (register-transfer-spr
5734                 name op ope reg_src reg_targ unitname comment)
5735   (dni name
5736        (comment)
5737        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
5738         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
5739        (.str name "$pack $" reg_src ",$" reg_targ)
5740        (+ pack reg_targ op ope reg_src)
5741        (set reg_targ reg_src)
5742        ((fr400 (unit unitname)) (fr450 (unit unitname))
5743         (fr500 (unit unitname)) (fr550 (unit unitname)))
5744   )
5745 )
5746
5747 (register-transfer-spr movgs OP_03 OPE1_06 GRj spr u-gr2spr "transfer gr->spr")
5748 (register-transfer-spr movsg OP_03 OPE1_07 spr GRj u-spr2gr "transfer spr->gr")
5749
5750 ; Integer Branch Conditions
5751 (define-pmacro (Inev cc) (const BI 0))
5752 (define-pmacro (Ira  cc) (const BI 1))
5753 (define-pmacro (Ieq  cc) (     zbit cc))
5754 (define-pmacro (Ine  cc) (not (zbit cc)))
5755 (define-pmacro (Ile  cc) (     orif (zbit cc) (xor (nbit cc) (vbit cc))))
5756 (define-pmacro (Igt  cc) (not (orif (zbit cc) (xor (nbit cc) (vbit cc)))))
5757 (define-pmacro (Ilt  cc) (     xor  (nbit cc) (vbit cc)))
5758 (define-pmacro (Ige  cc) (not (xor  (nbit cc) (vbit cc))))
5759 (define-pmacro (Ils  cc) (     orif (cbit cc) (zbit cc)))
5760 (define-pmacro (Ihi  cc) (not (orif (cbit cc) (zbit cc))))
5761 (define-pmacro (Ic   cc) (     cbit cc))
5762 (define-pmacro (Inc  cc) (not (cbit cc)))
5763 (define-pmacro (In   cc) (     nbit cc))
5764 (define-pmacro (Ip   cc) (not (nbit cc)))
5765 (define-pmacro (Iv   cc) (     vbit cc))
5766 (define-pmacro (Inv  cc) (not (vbit cc)))
5767
5768 ; Float Branch Conditions
5769 (define-pmacro (Fnev cc) (const BI 0))
5770 (define-pmacro (Fra  cc) (const BI 1))
5771 (define-pmacro (Fne  cc) (orif (lbit cc) (orif (gbit cc) (ubit cc))))
5772 (define-pmacro (Feq  cc) (ebit cc))
5773 (define-pmacro (Flg  cc) (orif (lbit cc) (gbit cc)))
5774 (define-pmacro (Fue  cc) (orif (ebit cc) (ubit cc)))
5775 (define-pmacro (Ful  cc) (orif (lbit cc) (ubit cc)))
5776 (define-pmacro (Fge  cc) (orif (ebit cc) (gbit cc)))
5777 (define-pmacro (Flt  cc) (lbit cc))
5778 (define-pmacro (Fuge cc) (orif (ebit cc) (orif (gbit cc) (ubit cc))))
5779 (define-pmacro (Fug  cc) (orif (gbit cc) (ubit cc)))
5780 (define-pmacro (Fle  cc) (orif (ebit cc) (lbit cc)))
5781 (define-pmacro (Fgt  cc) (gbit cc))
5782 (define-pmacro (Fule cc) (orif (ebit cc) (orif (lbit cc) (ubit cc))))
5783 (define-pmacro (Fu   cc) (ubit cc))
5784 (define-pmacro (Fo   cc) (orif (ebit cc) (orif (lbit cc) (gbit cc))))
5785
5786 (define-pmacro (conditional-branch-i prefix cc op cond comment)
5787   (dni (.sym prefix cc)
5788        (comment)
5789        ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5790         (FR400-MAJOR B-1) (FR450-MAJOR B-1))
5791        (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16")
5792        (+ pack (.sym ICC_ cc) ICCi_2 op hint label16)
5793        (sequence ()
5794                  (c-call VOID "@cpu@_model_branch" label16 hint)
5795                  (if (cond ICCi_2)
5796                      (set pc label16)))
5797        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5798         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5799   )
5800 )
5801
5802 (dni bra
5803      "integer branch equal"
5804       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5805        (FR400-MAJOR B-1) (FR450-MAJOR B-1))
5806       "bra$pack $hint_taken$label16"
5807       (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16)
5808       (sequence ()
5809                 (c-call VOID "@cpu@_model_branch" label16 hint_taken)
5810                 (set pc label16))
5811       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5812        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5813 )
5814
5815 (dni bno
5816      "integer branch never"
5817       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5818        (FR400-MAJOR B-1) (FR450-MAJOR B-1))
5819       "bno$pack$hint_not_taken"
5820       (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null))
5821       (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
5822       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5823        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5824 )
5825
5826 (conditional-branch-i b eq  OP_06 Ieq  "integer branch equal")
5827 (conditional-branch-i b ne  OP_06 Ine  "integer branch not equal")
5828 (conditional-branch-i b le  OP_06 Ile  "integer branch less or equal")
5829 (conditional-branch-i b gt  OP_06 Igt  "integer branch greater")
5830 (conditional-branch-i b lt  OP_06 Ilt  "integer branch less")
5831 (conditional-branch-i b ge  OP_06 Ige  "integer branch greater or equal")
5832 (conditional-branch-i b ls  OP_06 Ils  "integer branch less or equal unsigned")
5833 (conditional-branch-i b hi  OP_06 Ihi  "integer branch greater unsigned")
5834 (conditional-branch-i b c   OP_06 Ic   "integer branch carry set")
5835 (conditional-branch-i b nc  OP_06 Inc  "integer branch carry clear")
5836 (conditional-branch-i b n   OP_06 In   "integer branch negative")
5837 (conditional-branch-i b p   OP_06 Ip   "integer branch positive")
5838 (conditional-branch-i b v   OP_06 Iv   "integer branch overflow set")
5839 (conditional-branch-i b nv  OP_06 Inv  "integer branch overflow clear")
5840
5841 (define-pmacro (conditional-branch-f prefix cc op cond comment)
5842   (dni (.sym prefix cc)
5843        (comment)
5844        ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5845         (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
5846        (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16")
5847        (+ pack (.sym FCC_ cc) FCCi_2 op hint label16)
5848        (sequence ()
5849                  (c-call VOID "@cpu@_model_branch" label16 hint)
5850                  (if (cond FCCi_2) (set pc label16)))
5851        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5852         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5853   )
5854 )
5855
5856 (dni fbra
5857      "float branch equal"
5858       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5859        (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
5860       "fbra$pack $hint_taken$label16"
5861       (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16)
5862       (sequence ()
5863                 (c-call VOID "@cpu@_model_branch" label16 hint_taken)
5864                 (set pc label16))
5865       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5866        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5867 )
5868
5869 (dni fbno
5870      "float branch never"
5871       ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
5872        (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
5873       "fbno$pack$hint_not_taken"
5874       (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null))
5875       (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
5876       ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5877        (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5878 )
5879
5880 (conditional-branch-f fb ne  OP_07 Fne  "float branch not equal")
5881 (conditional-branch-f fb eq  OP_07 Feq  "float branch equal")
5882 (conditional-branch-f fb lg  OP_07 Flg  "float branch less or greater")
5883 (conditional-branch-f fb ue  OP_07 Fue  "float branch unordered or equal")
5884 (conditional-branch-f fb ul  OP_07 Ful  "float branch unordered or less")
5885 (conditional-branch-f fb ge  OP_07 Fge  "float branch greater or equal")
5886 (conditional-branch-f fb lt  OP_07 Flt  "float branch less")
5887 (conditional-branch-f fb uge OP_07 Fuge "float branch unordered, greater,equal")
5888 (conditional-branch-f fb ug  OP_07 Fug  "float branch unordered or greater")
5889 (conditional-branch-f fb le  OP_07 Fle  "float branch less or equal")
5890 (conditional-branch-f fb gt  OP_07 Fgt  "float branch greater")
5891 (conditional-branch-f fb ule OP_07 Fule "float branch unordered, less or equal")
5892 (conditional-branch-f fb u   OP_07 Fu   "float branch unordered")
5893 (conditional-branch-f fb o   OP_07 Fo   "float branch ordered")
5894
5895 (define-pmacro (ctrlr-branch-semantics cond ccond)
5896   (sequence ((SI tmp))
5897             (set tmp (sub (spr-lcr) 1))
5898             (set (spr-lcr) tmp)
5899             (if cond
5900                 (if (eq ccond 0)
5901                     (if (ne tmp 0)
5902                         (set pc (spr-lr)))
5903                     (if (eq tmp 0)
5904                         (set pc (spr-lr))))))
5905 )
5906
5907 (dni bctrlr
5908      "LCR conditional branch to lr"
5909      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
5910       (FR400-MAJOR B-2) (FR450-MAJOR B-2))
5911      ("bctrlr$pack $ccond,$hint")
5912      (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null))
5913      (sequence ()
5914                (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
5915                (ctrlr-branch-semantics (const BI 1) ccond))
5916      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5917       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5918 )
5919
5920 (define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment)
5921   (dni (.sym prefix cc lr)
5922        (comment)
5923        ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5924         (FR400-MAJOR B-3) (FR450-MAJOR B-3) attr)
5925        (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint")
5926        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope
5927           (ccond-null) (s12-null))
5928        (sequence ()
5929                  (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
5930                  (if (cond (.sym i-f CCi_2)) (set pc (spr-lr))))
5931        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5932         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5933   )
5934 )
5935
5936 (dni bralr
5937      "integer cclr branch always"
5938      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5939       (FR400-MAJOR B-3) (FR450-MAJOR B-3))
5940      "bralr$pack$hint_taken"
5941      (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null))
5942      (sequence ()
5943                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
5944                (set pc (spr-lr)))
5945      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5946       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5947 )
5948
5949 (dni bnolr
5950      "integer cclr branch never"
5951      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5952       (FR400-MAJOR B-3) (FR450-MAJOR B-3))
5953      "bnolr$pack$hint_not_taken"
5954      (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null))
5955      (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
5956      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5957       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5958 )
5959
5960 (conditional-branch-cclr b eq  I OP_0E OPE3_02 Ieq  NA "integer cclr branch equal")
5961 (conditional-branch-cclr b ne  I OP_0E OPE3_02 Ine  NA "integer cclr branch not equal")
5962 (conditional-branch-cclr b le  I OP_0E OPE3_02 Ile  NA "integer cclr branch less or equal")
5963 (conditional-branch-cclr b gt  I OP_0E OPE3_02 Igt  NA "integer cclr branch greater")
5964 (conditional-branch-cclr b lt  I OP_0E OPE3_02 Ilt  NA "integer cclr branch less")
5965 (conditional-branch-cclr b ge  I OP_0E OPE3_02 Ige  NA "integer cclr branch greater or equal")
5966 (conditional-branch-cclr b ls  I OP_0E OPE3_02 Ils  NA "integer cclr branch less or equal unsigned")
5967 (conditional-branch-cclr b hi  I OP_0E OPE3_02 Ihi  NA "integer cclr branch greater unsigned")
5968 (conditional-branch-cclr b c   I OP_0E OPE3_02 Ic   NA "integer cclr branch carry set")
5969 (conditional-branch-cclr b nc  I OP_0E OPE3_02 Inc  NA "integer cclr branch carry clear")
5970 (conditional-branch-cclr b n   I OP_0E OPE3_02 In   NA "integer cclr branch negative")
5971 (conditional-branch-cclr b p   I OP_0E OPE3_02 Ip   NA "integer cclr branch positive")
5972 (conditional-branch-cclr b v   I OP_0E OPE3_02 Iv   NA "integer cclr branch overflow set")
5973 (conditional-branch-cclr b nv  I OP_0E OPE3_02 Inv  NA "integer cclr branch overflow clear")
5974
5975 (dni fbralr
5976      "float cclr branch always"
5977      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5978       (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS)
5979      "fbralr$pack$hint_taken"
5980      (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null))
5981      (sequence ()
5982                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
5983                (set pc (spr-lr)))
5984      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5985       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5986 )
5987
5988 (dni fbnolr
5989      "float cclr branch never"
5990      ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
5991       (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS)
5992      "fbnolr$pack$hint_not_taken"
5993      (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null))
5994      (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
5995      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
5996       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
5997 )
5998
5999 (conditional-branch-cclr fb eq  F OP_0E OPE3_06 Feq  FR-ACCESS "float cclr branch equal")
6000 (conditional-branch-cclr fb ne  F OP_0E OPE3_06 Fne  FR-ACCESS "float cclr branch not equal")
6001 (conditional-branch-cclr fb lg  F OP_0E OPE3_06 Flg  FR-ACCESS "float branch less or greater")
6002 (conditional-branch-cclr fb ue  F OP_0E OPE3_06 Fue  FR-ACCESS "float branch unordered or equal")
6003 (conditional-branch-cclr fb ul  F OP_0E OPE3_06 Ful  FR-ACCESS "float branch unordered or less")
6004 (conditional-branch-cclr fb ge  F OP_0E OPE3_06 Fge  FR-ACCESS "float branch greater or equal")
6005 (conditional-branch-cclr fb lt  F OP_0E OPE3_06 Flt  FR-ACCESS "float branch less")
6006 (conditional-branch-cclr fb uge F OP_0E OPE3_06 Fuge FR-ACCESS "float branch unordered, greater, equal")
6007 (conditional-branch-cclr fb ug  F OP_0E OPE3_06 Fug  FR-ACCESS "float branch unordered or greater")
6008 (conditional-branch-cclr fb le  F OP_0E OPE3_06 Fle  FR-ACCESS "float branch less or equal")
6009 (conditional-branch-cclr fb gt  F OP_0E OPE3_06 Fgt  FR-ACCESS "float branch greater")
6010 (conditional-branch-cclr fb ule F OP_0E OPE3_06 Fule FR-ACCESS "float branch unordered, less or equal")
6011 (conditional-branch-cclr fb u   F OP_0E OPE3_06 Fu   FR-ACCESS "float branch unordered")
6012 (conditional-branch-cclr fb o   F OP_0E OPE3_06 Fo   FR-ACCESS "float branch ordered")
6013
6014 (define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment)
6015   (dni (.sym prefix cc lr)
6016        (comment)
6017        ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6018         (FR400-MAJOR B-2) (FR450-MAJOR B-2) attr)
6019        (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint")
6020        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null))
6021        (sequence ()
6022                  (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
6023                  (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond))
6024        ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6025         (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6026   )
6027 )
6028
6029 (dni bcralr
6030      "integer ctrlr branch always"
6031      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6032       (FR400-MAJOR B-2) (FR450-MAJOR B-2))
6033      "bcralr$pack $ccond$hint_taken"
6034      (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null))
6035      (sequence ()
6036                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
6037                (ctrlr-branch-semantics (const BI 1) ccond))
6038      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6039       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6040 )
6041
6042 (dni bcnolr
6043      "integer ctrlr branch never"
6044      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6045       (FR400-MAJOR B-2) (FR450-MAJOR B-2))
6046      "bcnolr$pack$hint_not_taken"
6047      (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null))
6048      (sequence ()
6049                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
6050                (ctrlr-branch-semantics (const BI 0) ccond))
6051      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6052       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6053 )
6054
6055 (conditional-branch-ctrlr bc eq  I OP_0E OPE3_03 Ieq  NA "integer ctrlr branch equal")
6056 (conditional-branch-ctrlr bc ne  I OP_0E OPE3_03 Ine  NA "integer ctrlr branch not equal")
6057 (conditional-branch-ctrlr bc le  I OP_0E OPE3_03 Ile  NA "integer ctrlr branch less equal")
6058 (conditional-branch-ctrlr bc gt  I OP_0E OPE3_03 Igt  NA "integer ctrlr branch greater")
6059 (conditional-branch-ctrlr bc lt  I OP_0E OPE3_03 Ilt  NA "integer ctrlr branch less")
6060 (conditional-branch-ctrlr bc ge  I OP_0E OPE3_03 Ige  NA "integer ctrlr branch greater equal")
6061 (conditional-branch-ctrlr bc ls  I OP_0E OPE3_03 Ils  NA "integer ctrlr branch less equal unsigned")
6062 (conditional-branch-ctrlr bc hi  I OP_0E OPE3_03 Ihi  NA "integer ctrlr branch greater unsigned")
6063 (conditional-branch-ctrlr bc c   I OP_0E OPE3_03 Ic   NA "integer ctrlr branch carry set")
6064 (conditional-branch-ctrlr bc nc  I OP_0E OPE3_03 Inc  NA "integer ctrlr branch carry clear")
6065 (conditional-branch-ctrlr bc n   I OP_0E OPE3_03 In   NA "integer ctrlr branch negative")
6066 (conditional-branch-ctrlr bc p   I OP_0E OPE3_03 Ip   NA "integer ctrlr branch positive")
6067 (conditional-branch-ctrlr bc v   I OP_0E OPE3_03 Iv   NA "integer ctrlr branch overflow set")
6068 (conditional-branch-ctrlr bc nv  I OP_0E OPE3_03 Inv  NA "integer ctrlr branch overflow clear")
6069
6070 (dni fcbralr
6071      "float ctrlr branch always"
6072      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6073       (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS)
6074      "fcbralr$pack $ccond$hint_taken"
6075      (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null))
6076      (sequence ()
6077                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
6078                (ctrlr-branch-semantics (const BI 1) ccond))
6079      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6080       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6081 )
6082
6083 (dni fcbnolr
6084      "float ctrlr branch never"
6085      ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
6086       (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS)
6087      "fcbnolr$pack$hint_not_taken"
6088      (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null))
6089      (sequence ()
6090                (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
6091                (ctrlr-branch-semantics (const BI 0) ccond))
6092      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6093       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6094 )
6095
6096 (conditional-branch-ctrlr fcb eq  F OP_0E OPE3_07 Feq  FR-ACCESS "float cclr branch equal")
6097 (conditional-branch-ctrlr fcb ne  F OP_0E OPE3_07 Fne  FR-ACCESS "float cclr branch not equal")
6098 (conditional-branch-ctrlr fcb lg  F OP_0E OPE3_07 Flg  FR-ACCESS "float branch less or greater")
6099 (conditional-branch-ctrlr fcb ue  F OP_0E OPE3_07 Fue  FR-ACCESS "float branch unordered or equal")
6100 (conditional-branch-ctrlr fcb ul  F OP_0E OPE3_07 Ful  FR-ACCESS "float branch unordered or less")
6101 (conditional-branch-ctrlr fcb ge  F OP_0E OPE3_07 Fge  FR-ACCESS "float branch greater or equal")
6102 (conditional-branch-ctrlr fcb lt  F OP_0E OPE3_07 Flt  FR-ACCESS "float branch less")
6103 (conditional-branch-ctrlr fcb uge F OP_0E OPE3_07 Fuge FR-ACCESS "float branch unordered, greater, equal")
6104 (conditional-branch-ctrlr fcb ug  F OP_0E OPE3_07 Fug  FR-ACCESS "float branch unordered or greater")
6105 (conditional-branch-ctrlr fcb le  F OP_0E OPE3_07 Fle  FR-ACCESS "float branch less or equal")
6106 (conditional-branch-ctrlr fcb gt  F OP_0E OPE3_07 Fgt  FR-ACCESS "float branch greater")
6107 (conditional-branch-ctrlr fcb ule F OP_0E OPE3_07 Fule FR-ACCESS "float branch unordered, less or equal")
6108 (conditional-branch-ctrlr fcb u   F OP_0E OPE3_07 Fu   FR-ACCESS "float branch unordered")
6109 (conditional-branch-ctrlr fcb o   F OP_0E OPE3_07 Fo   FR-ACCESS "float branch ordered")
6110
6111 (define-pmacro (jump-and-link-semantics base offset LI)
6112   (sequence ()
6113             (if (eq LI 1)
6114                 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1))
6115             ; Target address gets aligned here
6116             (set pc (and (add base offset) #xfffffffc))
6117             (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
6118 )
6119
6120 (dni jmpl
6121      "jump and link"
6122      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6123       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6124      "jmpl$pack @($GRi,$GRj)"
6125      (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj)
6126      (jump-and-link-semantics GRi GRj LI)
6127      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6128       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6129 )
6130
6131 (dni calll
6132      "call and link"
6133      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6134       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6135      "calll$pack @($GRi,$GRj)"
6136      (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj)
6137      (jump-and-link-semantics GRi GRj LI)
6138      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6139       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6140 )
6141
6142 (dni jmpil
6143      "jump immediate and link"
6144      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6145       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6146      "jmpil$pack @($GRi,$s12)"
6147      (+ pack (misc-null-1) (LI-off) OP_0D GRi s12)
6148      (jump-and-link-semantics GRi s12 LI)
6149      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6150       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6151 )
6152
6153 (dni callil
6154      "call immediate and link"
6155      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6156       (FR400-MAJOR I-5) (FR450-MAJOR I-5))
6157      "callil$pack @($GRi,$s12)"
6158      (+ pack (misc-null-1) (LI-on) OP_0D GRi s12)
6159      (jump-and-link-semantics GRi s12 LI)
6160      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6161       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6162 )
6163
6164 (dni call
6165      "call and link"
6166      ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4)
6167       (FR400-MAJOR B-4) (FR450-MAJOR B-4))
6168      "call$pack $label24"
6169      (+ pack OP_0F label24)
6170      (sequence ()
6171                (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1)
6172                (set pc label24)
6173                (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
6174      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6175       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6176 )
6177
6178 (dni rett
6179     "return from trap"
6180     ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6181      (FR400-MAJOR C-2) (FR450-MAJOR C-2) PRIVILEGED)
6182     "rett$pack $debug"
6183     (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null))
6184     ; frv_rett handles operating vs user mode
6185     (sequence ()
6186               (set pc (c-call UWI "frv_rett" pc debug))
6187               (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
6188     ()
6189 )
6190
6191 (dni rei
6192      "run exception instruction"
6193      ((UNIT C) (FR500-MAJOR C-1) (MACH frv) PRIVILEGED)
6194      "rei$pack $eir"
6195      (+ pack (rd-null) OP_37 eir (s12-null))
6196      (nop) ; for now
6197      ()
6198 )
6199
6200 (define-pmacro (trap-semantics cond base offset)
6201   (if cond
6202       (sequence ()
6203                 ; This is defered to frv_itrap because for the breakpoint
6204                 ; case we want to change as little of the machine state as
6205                 ; possible.
6206                 ;
6207                 ; PCSR=PC
6208                 ; PSR.PS=PSR.S
6209                 ; PSR.ET=0
6210                 ; if PSR.ESR==1
6211                 ;   SR0 through SR3=GR4 through GR7
6212                 ; TBR.TT=0x80 + ((GRi + s12) & 0x7f)
6213                 ; PC=TBR
6214                 ; We still should indicate what is modified by this insn.
6215                 (clobber (spr-pcsr))
6216                 (clobber psr_ps)
6217                 (clobber psr_et)
6218                 (clobber tbr_tt)
6219                 (if (ne psr_esr (const 0))
6220                     (sequence ()
6221                               (clobber (spr-sr0))
6222                               (clobber (spr-sr1))
6223                               (clobber (spr-sr2))
6224                               (clobber (spr-sr3))))
6225                 ; frv_itrap handles operating vs user mode
6226                 (c-call VOID "frv_itrap" pc base offset)))
6227 )
6228
6229 (define-pmacro (trap-r prefix cc i-f op ope cond attr comment)
6230   (dni (.sym prefix cc)
6231        (comment)
6232        ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6233         (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr)
6234        (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj")
6235        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj)
6236        (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj)
6237        ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6238         (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6239   )
6240 )
6241
6242 (dni tra
6243      "integer trap always"
6244      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6245       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6246      "tra$pack $GRi,$GRj"
6247      (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj)
6248      (trap-semantics (const BI 1) GRi GRj)
6249      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6250       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6251 )
6252
6253 (dni tno
6254      "integer trap never"
6255      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6256       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6257      "tno$pack"
6258      (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null))
6259      (trap-semantics (const BI 0) GRi GRj)
6260      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6261       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6262 )
6263
6264 (trap-r t eq  I OP_04 OPE4_0 Ieq  NA "integer trap equal")
6265 (trap-r t ne  I OP_04 OPE4_0 Ine  NA "integer trap not equal")
6266 (trap-r t le  I OP_04 OPE4_0 Ile  NA "integer trap less or equal")
6267 (trap-r t gt  I OP_04 OPE4_0 Igt  NA "integer trap greater")
6268 (trap-r t lt  I OP_04 OPE4_0 Ilt  NA "integer trap less")
6269 (trap-r t ge  I OP_04 OPE4_0 Ige  NA "integer trap greater or equal")
6270 (trap-r t ls  I OP_04 OPE4_0 Ils  NA "integer trap less or equal unsigned")
6271 (trap-r t hi  I OP_04 OPE4_0 Ihi  NA "integer trap greater unsigned")
6272 (trap-r t c   I OP_04 OPE4_0 Ic   NA "integer trap carry set")
6273 (trap-r t nc  I OP_04 OPE4_0 Inc  NA "integer trap carry clear")
6274 (trap-r t n   I OP_04 OPE4_0 In   NA "integer trap negative")
6275 (trap-r t p   I OP_04 OPE4_0 Ip   NA "integer trap positive")
6276 (trap-r t v   I OP_04 OPE4_0 Iv   NA "integer trap overflow set")
6277 (trap-r t nv  I OP_04 OPE4_0 Inv  NA "integer trap overflow clear")
6278
6279 (dni ftra
6280      "float trap always"
6281      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6282       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6283      "ftra$pack $GRi,$GRj"
6284      (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj)
6285      (trap-semantics (const BI 1) GRi GRj)
6286      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6287       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6288 )
6289
6290 (dni ftno
6291      "flost trap never"
6292      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6293       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6294      "ftno$pack"
6295      (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null))
6296      (trap-semantics (const BI 0) GRi GRj)
6297      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6298       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6299 )
6300
6301 (trap-r ft ne  F OP_04 OPE4_1 Fne  FR-ACCESS "float trap not equal")
6302 (trap-r ft eq  F OP_04 OPE4_1 Feq  FR-ACCESS "float trap equal")
6303 (trap-r ft lg  F OP_04 OPE4_1 Flg  FR-ACCESS "float trap greater or less")
6304 (trap-r ft ue  F OP_04 OPE4_1 Fue  FR-ACCESS "float trap unordered or equal")
6305 (trap-r ft ul  F OP_04 OPE4_1 Ful  FR-ACCESS "float trap unordered or less")
6306 (trap-r ft ge  F OP_04 OPE4_1 Fge  FR-ACCESS "float trap greater or equal")
6307 (trap-r ft lt  F OP_04 OPE4_1 Flt  FR-ACCESS "float trap less")
6308 (trap-r ft uge F OP_04 OPE4_1 Fuge FR-ACCESS "float trap unordered greater or equal")
6309 (trap-r ft ug  F OP_04 OPE4_1 Fug  FR-ACCESS "float trap unordered or greater")
6310 (trap-r ft le  F OP_04 OPE4_1 Fle  FR-ACCESS "float trap less or equal")
6311 (trap-r ft gt  F OP_04 OPE4_1 Fgt  FR-ACCESS "float trap greater")
6312 (trap-r ft ule F OP_04 OPE4_1 Fule FR-ACCESS "float trap unordered less or equal")
6313 (trap-r ft u   F OP_04 OPE4_1 Fu   FR-ACCESS "float trap unordered")
6314 (trap-r ft o   F OP_04 OPE4_1 Fo   FR-ACCESS "float trap ordered")
6315
6316 (define-pmacro (trap-immed prefix cc i-f op cond attr comment)
6317   (dni (.sym prefix cc)
6318        (comment)
6319        ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6320         (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr)
6321        (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12")
6322        (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12)
6323        (trap-semantics (cond (.sym i-f CCi_2)) GRi s12)
6324        ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6325         (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6326   )
6327 )
6328
6329 (dni tira
6330      "integer trap always"
6331      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6332       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6333      "tira$pack $GRi,$s12"
6334      (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12)
6335      (trap-semantics (const BI 1) GRi s12)
6336      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6337       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6338 )
6339
6340 (dni tino
6341      "integer trap never"
6342      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6343       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6344      "tino$pack"
6345      (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null))
6346      (trap-semantics (const BI 0) GRi s12)
6347      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6348       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6349 )
6350
6351 (trap-immed ti eq  I OP_1C Ieq  NA "integer trap equal")
6352 (trap-immed ti ne  I OP_1C Ine  NA "integer trap not equal")
6353 (trap-immed ti le  I OP_1C Ile  NA "integer trap less or equal")
6354 (trap-immed ti gt  I OP_1C Igt  NA "integer trap greater")
6355 (trap-immed ti lt  I OP_1C Ilt  NA "integer trap less")
6356 (trap-immed ti ge  I OP_1C Ige  NA "integer trap greater or equal")
6357 (trap-immed ti ls  I OP_1C Ils  NA "integer trap less or equal unsigned")
6358 (trap-immed ti hi  I OP_1C Ihi  NA "integer trap greater unsigned")
6359 (trap-immed ti c   I OP_1C Ic   NA "integer trap carry set")
6360 (trap-immed ti nc  I OP_1C Inc  NA "integer trap carry clear")
6361 (trap-immed ti n   I OP_1C In   NA "integer trap negative")
6362 (trap-immed ti p   I OP_1C Ip   NA "integer trap positive")
6363 (trap-immed ti v   I OP_1C Iv   NA "integer trap overflow set")
6364 (trap-immed ti nv  I OP_1C Inv  NA "integer trap overflow clear")
6365
6366 (dni ftira
6367      "float trap always"
6368      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6369       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6370      "ftira$pack $GRi,$s12"
6371      (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12)
6372      (trap-semantics (const BI 1) GRi s12)
6373      ((fr400 (unit u-trap))
6374       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6375 )
6376
6377 (dni ftino
6378      "float trap never"
6379      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6380       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6381      "ftino$pack"
6382      (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null))
6383      (trap-semantics (const BI 0) GRi s12)
6384      ((fr400 (unit u-trap)) (fr450 (unit u-trap))
6385       (fr500 (unit u-trap)) (fr550 (unit u-trap)))
6386 )
6387
6388 (trap-immed fti ne  F OP_1D Fne  FR-ACCESS "float trap not equal")
6389 (trap-immed fti eq  F OP_1D Feq  FR-ACCESS "float trap equal")
6390 (trap-immed fti lg  F OP_1D Flg  FR-ACCESS "float trap greater or less")
6391 (trap-immed fti ue  F OP_1D Fue  FR-ACCESS "float trap unordered or equal")
6392 (trap-immed fti ul  F OP_1D Ful  FR-ACCESS "float trap unordered or less")
6393 (trap-immed fti ge  F OP_1D Fge  FR-ACCESS "float trap greater or equal")
6394 (trap-immed fti lt  F OP_1D Flt  FR-ACCESS "float trap less")
6395 (trap-immed fti uge F OP_1D Fuge FR-ACCESS "float trap unordered greater or equal")
6396 (trap-immed fti ug  F OP_1D Fug  FR-ACCESS "float trap unordered or greater")
6397 (trap-immed fti le  F OP_1D Fle  FR-ACCESS "float trap less or equal")
6398 (trap-immed fti gt  F OP_1D Fgt  FR-ACCESS "float trap greater")
6399 (trap-immed fti ule F OP_1D Fule FR-ACCESS "float trap unordered less or equal")
6400 (trap-immed fti u   F OP_1D Fu   FR-ACCESS "float trap unordered")
6401 (trap-immed fti o   F OP_1D Fo   FR-ACCESS "float trap ordered")
6402
6403 (dni break
6404      "break trap"
6405      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6406       (FR400-MAJOR C-1) (FR450-MAJOR C-1))
6407      "break$pack"
6408      (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null))
6409      (sequence ()
6410                ; This is defered to frv_break because for the breakpoint
6411                ; case we want to change as little of the machine state as
6412                ; possible.
6413                ;
6414                ; BPCSR=PC
6415                ; BPSR.BS=PSR.S
6416                ; BPSR.BET=PSR.ET
6417                ; PSR.S=1
6418                ; PSR.ET=0
6419                ; TBR.TT=0xff
6420                ; PC=TBR
6421                ; We still should indicate what is modified by this insn.
6422                (clobber (spr-bpcsr))
6423                (clobber bpsr_bs)
6424                (clobber bpsr_bet)
6425                (clobber psr_s)
6426                (clobber psr_et)
6427                (clobber tbr_tt)
6428                (c-call VOID "frv_break"))
6429      ()
6430 )
6431
6432 (dni mtrap
6433      "media trap"
6434      ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
6435       (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
6436      "mtrap$pack"
6437      (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null))
6438      (c-call VOID "frv_mtrap")
6439      ()
6440 )
6441
6442 (define-pmacro (condition-code-logic name operation ope comment)
6443   (dni name
6444        (comment)
6445        ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6)
6446         (FR400-MAJOR B-6) (FR450-MAJOR B-6))
6447        (.str name "$pack $CRi,$CRj,$CRk")
6448        (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj)
6449        (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj))
6450        ()
6451   )
6452 )
6453 (define-pmacro (op-andcr)   0)
6454 (define-pmacro (op-orcr)    1)
6455 (define-pmacro (op-xorcr)   2)
6456 (define-pmacro (op-nandcr)  3)
6457 (define-pmacro (op-norcr)   4)
6458 (define-pmacro (op-andncr)  5)
6459 (define-pmacro (op-orncr)   6)
6460 (define-pmacro (op-nandncr) 7)
6461 (define-pmacro (op-norncr)  8)
6462
6463 (define-pmacro (cr-true)  3)
6464 (define-pmacro (cr-false) 2)
6465 (define-pmacro (cr-undefined) 0)
6466
6467 (condition-code-logic andcr   (op-andcr)   OPE1_08 "and   condition code regs")
6468 (condition-code-logic orcr    (op-orcr)    OPE1_09 "or    condition code regs")
6469 (condition-code-logic xorcr   (op-xorcr)   OPE1_0A "xor   condition code regs")
6470 (condition-code-logic nandcr  (op-nandcr)  OPE1_0C "nand  condition code regs")
6471 (condition-code-logic norcr   (op-norcr)   OPE1_0D "nor   condition code regs")
6472 (condition-code-logic andncr  (op-andncr)  OPE1_10 "andn  condition code regs")
6473 (condition-code-logic orncr   (op-orncr)   OPE1_11 "orn   condition code regs")
6474 (condition-code-logic nandncr (op-nandncr) OPE1_14 "nandn condition code regs")
6475 (condition-code-logic norncr  (op-norncr)  OPE1_15 "norn  condition code regs")
6476
6477 (dni notcr
6478      ("not cccr register")
6479      ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6)
6480       (FR400-MAJOR B-6) (FR450-MAJOR B-6))
6481      (.str notcr "$pack $CRj,$CRk")
6482      (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj)
6483      (set CRk (xor CRj 1))
6484      ()
6485 )
6486
6487 (define-pmacro (check-semantics cond cr)
6488   (if cond (set cr (cr-true)) (set cr (cr-false)))
6489 )
6490
6491 (define-pmacro (check-int-condition-code prefix cc op cond comment)
6492   (dni (.sym prefix cc)
6493        (comment)
6494        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6495         (FR400-MAJOR B-5) (FR450-MAJOR B-5))
6496        (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int")
6497        (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3)
6498        (check-semantics (cond ICCi_3) CRj_int)
6499        ((fr400 (unit u-check)) (fr450 (unit u-check))
6500         (fr500 (unit u-check)) (fr550 (unit u-check)))
6501   )
6502 )
6503
6504 (dni ckra
6505      "check integer cc always"
6506      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6507       (FR400-MAJOR B-5) (FR450-MAJOR B-5))
6508      "ckra$pack $CRj_int"
6509      (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null))
6510      (check-semantics (const BI 1) CRj_int)
6511      ((fr400 (unit u-check)) (fr450 (unit u-check))
6512       (fr500 (unit u-check)) (fr550 (unit u-check)))
6513 )
6514
6515 (dni ckno
6516      "check integer cc never"
6517      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6518       (FR400-MAJOR B-5) (FR450-MAJOR B-5))
6519      "ckno$pack $CRj_int"
6520      (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null))
6521      (check-semantics (const BI 0) CRj_int)
6522      ((fr400 (unit u-check)) (fr450 (unit u-check))
6523       (fr500 (unit u-check)) (fr550 (unit u-check)))
6524 )
6525
6526 (check-int-condition-code ck eq  OP_08 Ieq  "check integer cc equal")
6527 (check-int-condition-code ck ne  OP_08 Ine  "check integer cc not equal")
6528 (check-int-condition-code ck le  OP_08 Ile  "check integer cc less or equal")
6529 (check-int-condition-code ck gt  OP_08 Igt  "check integer cc greater")
6530 (check-int-condition-code ck lt  OP_08 Ilt  "check integer cc less")
6531 (check-int-condition-code ck ge  OP_08 Ige  "check integer cc greater or equal")
6532 (check-int-condition-code ck ls  OP_08 Ils  "check integer cc less or equal unsigned")
6533 (check-int-condition-code ck hi  OP_08 Ihi  "check integer cc greater unsigned")
6534 (check-int-condition-code ck c   OP_08 Ic   "check integer cc carry set")
6535 (check-int-condition-code ck nc  OP_08 Inc  "check integer cc carry clear")
6536 (check-int-condition-code ck n   OP_08 In   "check integer cc negative")
6537 (check-int-condition-code ck p   OP_08 Ip   "check integer cc positive")
6538 (check-int-condition-code ck v   OP_08 Iv   "check integer cc overflow set")
6539 (check-int-condition-code ck nv  OP_08 Inv  "check integer cc overflow clear")
6540
6541 (define-pmacro (check-float-condition-code prefix cc op cond comment)
6542   (dni (.sym prefix cc)
6543        (comment)
6544        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6545         (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
6546        (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float")
6547        (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3)
6548        (check-semantics (cond FCCi_3) CRj_float)
6549        ((fr400 (unit u-check)) (fr450 (unit u-check))
6550         (fr500 (unit u-check)) (fr550 (unit u-check)))
6551   )
6552 )
6553
6554 (dni fckra
6555      "check float cc always"
6556      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6557       (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
6558      "fckra$pack $CRj_float"
6559      (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3)
6560      (check-semantics (const BI 1) CRj_float)
6561      ((fr400 (unit u-check)) (fr450 (unit u-check))
6562       (fr500 (unit u-check)) (fr550 (unit u-check)))
6563 )
6564
6565 (dni fckno
6566      "check float cc never"
6567      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6568       (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
6569      "fckno$pack $CRj_float"
6570      (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3)
6571      (check-semantics (const BI 0) CRj_float)
6572      ((fr400 (unit u-check)) (fr450 (unit u-check))
6573       (fr500 (unit u-check)) (fr550 (unit u-check)))
6574 )
6575
6576 (check-float-condition-code fck ne  OP_09 Fne  "check float cc not equal")
6577 (check-float-condition-code fck eq  OP_09 Feq  "check float cc equal")
6578 (check-float-condition-code fck lg  OP_09 Flg  "check float cc greater or less")
6579 (check-float-condition-code fck ue  OP_09 Fue  "check float cc unordered or equal")
6580 (check-float-condition-code fck ul  OP_09 Ful  "check float cc unordered or less")
6581 (check-float-condition-code fck ge  OP_09 Fge  "check float cc greater or equal")
6582 (check-float-condition-code fck lt  OP_09 Flt  "check float cc less")
6583 (check-float-condition-code fck uge OP_09 Fuge "check float cc unordered greater or equal")
6584 (check-float-condition-code fck ug  OP_09 Fug  "check float cc unordered or greater")
6585 (check-float-condition-code fck le  OP_09 Fle  "check float cc less or equal")
6586 (check-float-condition-code fck gt  OP_09 Fgt  "check float cc greater")
6587 (check-float-condition-code fck ule OP_09 Fule "check float cc unordered less or equal")
6588 (check-float-condition-code fck u   OP_09 Fu   "check float cc unordered")
6589 (check-float-condition-code fck o   OP_09 Fo   "check float cc ordered")
6590
6591 (define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment)
6592   (dni (.sym prefix cc)
6593        (comment)
6594        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6595         (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
6596        (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond")
6597        (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope
6598           (misc-null-9) ICCi_3)
6599        (if (eq CCi (or cond 2))
6600            (check-semantics (test ICCi_3) CRj_int)
6601            (set CRj_int (cr-undefined)))
6602        ((fr400 (unit u-check)) (fr450 (unit u-check))
6603         (fr500 (unit u-check)) (fr550 (unit u-check)))
6604   )
6605 )
6606
6607 (dni cckra
6608      "conditional check integer cc always"
6609      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6610       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
6611      "cckra$pack $CRj_int,$CCi,$cond"
6612      (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0
6613         (misc-null-9) (ICCi_3-null))
6614      (if (eq CCi (or cond 2))
6615          (check-semantics (const BI 1) CRj_int)
6616          (set CRj_int (cr-undefined)))
6617      ((fr400 (unit u-check)) (fr450 (unit u-check))
6618       (fr500 (unit u-check)) (fr550 (unit u-check)))
6619 )
6620
6621 (dni cckno
6622      "conditional check integer cc never"
6623      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6624       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
6625      "cckno$pack $CRj_int,$CCi,$cond"
6626      (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0
6627         (misc-null-9) (ICCi_3-null))
6628      (if (eq CCi (or cond 2))
6629          (check-semantics (const BI 0) CRj_int)
6630          (set CRj_int (cr-undefined)))
6631      ((fr400 (unit u-check)) (fr450 (unit u-check))
6632       (fr500 (unit u-check)) (fr550 (unit u-check)))
6633 )
6634
6635 (conditional-check-int-condition-code cck eq  OP_6A OPE4_0 Ieq  "check integer cc equal")
6636 (conditional-check-int-condition-code cck ne  OP_6A OPE4_0 Ine  "check integer cc not equal")
6637 (conditional-check-int-condition-code cck le  OP_6A OPE4_0 Ile  "check integer cc less or equal")
6638 (conditional-check-int-condition-code cck gt  OP_6A OPE4_0 Igt  "check integer cc greater")
6639 (conditional-check-int-condition-code cck lt  OP_6A OPE4_0 Ilt  "check integer cc less")
6640 (conditional-check-int-condition-code cck ge  OP_6A OPE4_0 Ige  "check integer cc greater or equal")
6641 (conditional-check-int-condition-code cck ls  OP_6A OPE4_0 Ils  "check integer cc less or equal unsigned")
6642 (conditional-check-int-condition-code cck hi  OP_6A OPE4_0 Ihi  "check integer cc greater unsigned")
6643 (conditional-check-int-condition-code cck c   OP_6A OPE4_0 Ic   "check integer cc carry set")
6644 (conditional-check-int-condition-code cck nc  OP_6A OPE4_0 Inc  "check integer cc carry clear")
6645 (conditional-check-int-condition-code cck n   OP_6A OPE4_0 In   "check integer cc negative")
6646 (conditional-check-int-condition-code cck p   OP_6A OPE4_0 Ip   "check integer cc positive")
6647 (conditional-check-int-condition-code cck v   OP_6A OPE4_0 Iv   "check integer cc overflow set")
6648 (conditional-check-int-condition-code cck nv  OP_6A OPE4_0 Inv  "check integer cc overflow clear")
6649
6650 (define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment)
6651   (dni (.sym prefix cc)
6652        (comment)
6653        ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6654         (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
6655        (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond")
6656        (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope
6657           (misc-null-9) FCCi_3)
6658        (if (eq CCi (or cond 2))
6659            (check-semantics (test FCCi_3) CRj_float)
6660            (set CRj_float (cr-undefined)))
6661        ((fr400 (unit u-check)) (fr450 (unit u-check))
6662         (fr500 (unit u-check)) (fr550 (unit u-check)))
6663   )
6664 )
6665
6666 (dni cfckra
6667      "conditional check float cc always"
6668      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6669       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
6670      "cfckra$pack $CRj_float,$CCi,$cond"
6671      (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1
6672         (misc-null-9) (FCCi_3-null))
6673      (if (eq CCi (or cond 2))
6674          (check-semantics (const BI 1) CRj_float)
6675          (set CRj_float (cr-undefined)))
6676      ((fr400 (unit u-check)) (fr450 (unit u-check))
6677       (fr500 (unit u-check)) (fr550 (unit u-check)))
6678 )
6679
6680 (dni cfckno
6681      "conditional check float cc never"
6682      ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
6683       (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
6684      "cfckno$pack $CRj_float,$CCi,$cond"
6685      (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1
6686         (misc-null-9) (FCCi_3-null))
6687      (if (eq CCi (or cond 2))
6688          (check-semantics (const BI 0) CRj_float)
6689          (set CRj_float (cr-undefined)))
6690      ((fr400 (unit u-check)) (fr450 (unit u-check))
6691       (fr500 (unit u-check)) (fr550 (unit u-check)))
6692 )
6693
6694 (conditional-check-float-condition-code cfck ne  OP_6A OPE4_1 Fne  "check float cc not equal")
6695 (conditional-check-float-condition-code cfck eq  OP_6A OPE4_1 Feq  "check float cc equal")
6696 (conditional-check-float-condition-code cfck lg  OP_6A OPE4_1 Flg  "check float cc greater or less")
6697 (conditional-check-float-condition-code cfck ue  OP_6A OPE4_1 Fue  "check float cc unordered or equal")
6698 (conditional-check-float-condition-code cfck ul  OP_6A OPE4_1 Ful  "check float cc unordered or less")
6699 (conditional-check-float-condition-code cfck ge  OP_6A OPE4_1 Fge  "check float cc greater or equal")
6700 (conditional-check-float-condition-code cfck lt  OP_6A OPE4_1 Flt  "check float cc less")
6701 (conditional-check-float-condition-code cfck uge OP_6A OPE4_1 Fuge "check float cc unordered greater or equal")
6702 (conditional-check-float-condition-code cfck ug  OP_6A OPE4_1 Fug  "check float cc unordered or greater")
6703 (conditional-check-float-condition-code cfck le  OP_6A OPE4_1 Fle  "check float cc less or equal")
6704 (conditional-check-float-condition-code cfck gt  OP_6A OPE4_1 Fgt  "check float cc greater")
6705 (conditional-check-float-condition-code cfck ule OP_6A OPE4_1 Fule "check float cc unordered less or equal")
6706 (conditional-check-float-condition-code cfck u   OP_6A OPE4_1 Fu   "check float cc unordered")
6707 (conditional-check-float-condition-code cfck o   OP_6A OPE4_1 Fo   "check float cc ordered")
6708
6709 (dni cjmpl
6710      "conditional jump and link"
6711      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6712       (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL)
6713      "cjmpl$pack @($GRi,$GRj),$CCi,$cond"
6714      (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj)
6715      (if (eq CCi (or cond 2))
6716          (jump-and-link-semantics GRi GRj LI))
6717      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6718       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6719 )
6720
6721 (dni ccalll
6722      "conditional call and link"
6723      ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6724       (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL)
6725      "ccalll$pack @($GRi,$GRj),$CCi,$cond"
6726      (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj)
6727      (if (eq CCi (or cond 2))
6728          (jump-and-link-semantics GRi GRj LI))
6729      ((fr400 (unit u-branch)) (fr450 (unit u-branch))
6730       (fr500 (unit u-branch)) (fr550 (unit u-branch)))
6731 )
6732
6733 (define-pmacro (cache-invalidate name cache all op ope profile comment)
6734   (dni name
6735        (comment)
6736        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6737         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6738        (.str name "$pack @($GRi,$GRj)")
6739        (+ pack (rd-null) op GRi ope GRj)
6740        (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all)
6741        profile
6742   )
6743 )
6744
6745 (cache-invalidate ici insn 0 OP_03 OPE1_38
6746                   ((fr400 (unit u-ici)) (fr450 (unit u-ici))
6747                    (fr500 (unit u-ici)) (fr550 (unit u-ici)))
6748                   "invalidate insn cache")
6749 (cache-invalidate dci data 0 OP_03 OPE1_3C
6750                   ((fr400 (unit u-dci)) (fr450 (unit u-dci))
6751                    (fr500 (unit u-dci)) (fr550 (unit u-dci)))
6752                   "invalidate data cache")
6753
6754 (define-pmacro (cache-invalidate-entry name cache op ope profile comment)
6755   (dni name
6756        (comment)
6757        ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2)
6758         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6759        (.str name "$pack @($GRi,$GRj),$ae")
6760        (+ pack (misc-null-1) ae op GRi ope GRj)
6761        (if (eq ae 0)
6762            (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) -1) ; Invalid ae setting for this insn
6763            (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) ae))
6764        profile
6765   )
6766 )
6767
6768 (cache-invalidate-entry icei insn OP_03 OPE1_39
6769                         ((fr400 (unit u-ici)) (fr450 (unit u-ici))
6770                          (fr550 (unit u-ici)))
6771                         "invalidate insn cache entry")
6772 (cache-invalidate-entry dcei data OP_03 OPE1_3A
6773                         ((fr400 (unit u-dci)) (fr450 (unit u-dci))
6774                          (fr550 (unit u-dci)))
6775                         "invalidate data cache entry")
6776
6777 (dni dcf
6778      "Data cache flush"
6779      ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6780       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6781      "dcf$pack @($GRi,$GRj)"
6782      (+ pack (rd-null) OP_03 GRi OPE1_3D GRj)
6783      (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0)
6784      ((fr400 (unit u-dcf)) (fr450 (unit u-dcf))
6785       (fr500 (unit u-dcf)) (fr550 (unit u-dcf)))
6786 )
6787
6788 (dni dcef
6789      "Data cache entry flush"
6790      ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2)
6791       (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6792      "dcef$pack @($GRi,$GRj),$ae"
6793      (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj)
6794      (if (eq ae 0)
6795          (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1)
6796          (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae))
6797      ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) (fr550 (unit u-dcf)))
6798 )
6799
6800 (define-pmacro (write-TLB name insn op ope comment)
6801   (dni name
6802        (comment)
6803        ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
6804        (.str insn "$pack $GRk,@($GRi,$GRj)")
6805        (+ pack GRk op GRi ope GRj)
6806        (nop) ; for now
6807        ()
6808   )
6809 )
6810
6811 (write-TLB witlb witlb OP_03 OPE1_32 "write for insn TLB")
6812 (write-TLB wdtlb wdtlb OP_03 OPE1_36 "write for data TLB")
6813
6814 (define-pmacro (invalidate-TLB name insn op ope comment)
6815   (dni name
6816        (comment)
6817        ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
6818        (.str insn "$pack @($GRi,$GRj)")
6819        (+ pack (rd-null) op GRi ope GRj)
6820        (nop) ; for now
6821        ()
6822   )
6823 )
6824
6825 (invalidate-TLB itlbi itlbi OP_03 OPE1_33 "invalidate insn TLB")
6826 (invalidate-TLB dtlbi dtlbi OP_03 OPE1_37 "invalidate data TLB")
6827
6828 (define-pmacro (cache-preload name cache pipe attrs op ope profile comment)
6829   (dni name
6830        (comment)
6831        (.splice (UNIT pipe) (FR500-MAJOR C-2)
6832                 (FR400-MAJOR C-2) (.unsplice attrs))
6833        (.str name "$pack $GRi,$GRj,$lock")
6834        (+ pack (misc-null-1) lock op GRi ope GRj)
6835        (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock)
6836        profile
6837   )
6838 )
6839
6840 (cache-preload icpl insn C ((FR550-MAJOR C-2) (FR450-MAJOR C-2)) OP_03 OPE1_30
6841                ((fr400 (unit u-icpl)) (fr450 (unit u-icpl))
6842                 (fr500 (unit u-icpl)) (fr550 (unit u-icpl)))
6843                "preload insn cache")
6844 (cache-preload dcpl data DCPL ((FR550-MAJOR I-8) (FR450-MAJOR I-2)) OP_03 OPE1_34
6845                ((fr400 (unit u-dcpl)) (fr450 (unit u-dcpl))
6846                 (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl)))
6847                "preload data cache")
6848
6849 (define-pmacro (cache-unlock name cache op ope profile comment)
6850   (dni name
6851        (comment)
6852        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6853         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6854        (.str name "$pack $GRi")
6855        (+ pack (rd-null) op GRi ope (GRj-null))
6856        (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi)
6857        profile
6858   )
6859 )
6860
6861 (cache-unlock icul insn OP_03 OPE1_31
6862               ((fr400 (unit u-icul)) (fr450 (unit u-icul))
6863                (fr500 (unit u-icul)) (fr550 (unit u-icul)))
6864               "unlock insn cache")
6865 (cache-unlock dcul data OP_03 OPE1_35
6866               ((fr400 (unit u-dcul)) (fr450 (unit u-dcul))
6867                (fr500 (unit u-dcul)) (fr550 (unit u-dcul)))
6868               "unlock data cache")
6869
6870 (define-pmacro (barrier name insn op ope profile comment)
6871   (dni name
6872        (comment)
6873        ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
6874         (FR400-MAJOR C-2) (FR450-MAJOR C-2))
6875        (.str insn "$pack")
6876        (+ pack (rd-null) op (rs-null) ope (GRj-null))
6877        (nop) ; sufficient implementation
6878        profile
6879   )
6880 )
6881
6882 (barrier bar    bar    OP_03 OPE1_3E
6883          ((fr400 (unit u-barrier)) (fr450 (unit u-barrier))
6884           (fr500 (unit u-barrier)))
6885          "barrier")
6886 (barrier membar membar OP_03 OPE1_3F
6887          ((fr400 (unit u-membar)) (fr450 (unit u-membar))
6888           (fr500 (unit u-membar)))
6889          "memory barrier")
6890
6891 ; Load real address instructions
6892 (define-pmacro (load-real-address name insn what op ope)
6893   (dni name
6894        (.str "Load real address of " what)
6895        ((UNIT C) (FR450-MAJOR C-2) (MACH fr450))
6896        (.str insn "$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS")
6897        (+ pack GRk op GRi ope LRAE LRAD LRAS (LRA-null))
6898        (nop) ; not simulated
6899        ()
6900   )
6901 )
6902
6903 (load-real-address lrai "lrai" "instruction" OP_03 OPE1_20)
6904 (load-real-address lrad "lrad" "data" OP_03 OPE1_21)
6905
6906 (dni tlbpr
6907      "TLB Probe"
6908      ((UNIT C) (FR450-MAJOR C-2) (MACH fr450))
6909      "tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL"
6910      (+ pack (TLBPR-null) TLBPRopx TLBPRL OP_03 GRi OPE1_24 GRj)
6911      (nop) ; not simulated
6912      ()
6913 )
6914
6915 ; Coprocessor operations
6916 (define-pmacro (cop-op num op)
6917   (dni (.sym cop num)
6918        "Coprocessor operation"
6919        ((UNIT C) (FR500-MAJOR C-2) (MACH frv))
6920        (.str "cop" num "$pack $s6_1,$CPRi,$CPRj,$CPRk")
6921        (+ pack CPRk op CPRi s6_1 CPRj)
6922        (nop) ; sufficient implementation
6923        ()
6924   )
6925 )
6926
6927 (cop-op 1 OP_7E)
6928 (cop-op 2 OP_7F)
6929
6930 (define-pmacro (clear-ne-flag-semantics target_index is_float)
6931   (c-call VOID "@cpu@_clear_ne_flags" target_index is_float)
6932 )
6933
6934 (define-pmacro (clear-ne-flag-r name op ope reg is_float attr profile comment)
6935   (dni name
6936        (comment)
6937        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
6938        (.str name "$pack $" reg "k")
6939        (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
6940        (sequence ()
6941                  ; hack to get this referenced for profiling
6942                  (c-raw-call VOID "frv_ref_SI" (.sym reg k))
6943                  (clear-ne-flag-semantics (index-of (.sym reg k)) is_float))
6944        profile
6945   )
6946 )
6947
6948 (clear-ne-flag-r clrgr OP_0A OPE1_00 GR 0 NA
6949                  ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
6950                  "Clear GR NE flag")
6951 (clear-ne-flag-r clrfr OP_0A OPE1_02 FR 1 FR-ACCESS
6952                  ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
6953                  "Clear FR NE flag")
6954
6955 (define-pmacro (clear-ne-flag-all name op ope is_float attr profile comment)
6956   (dni name
6957        (comment)
6958        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
6959        (.str name "$pack")
6960        (+ pack (rd-null) op (rs-null) ope (GRj-null))
6961        (clear-ne-flag-semantics -1 is_float)
6962        profile
6963   )
6964 )
6965
6966 (clear-ne-flag-all clrga OP_0A OPE1_01 0 NA
6967                  ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
6968                    "Clear GR NE flag ALL")
6969 (clear-ne-flag-all clrfa OP_0A OPE1_03 1 FR-ACCESS
6970                  ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
6971                    "Clear FR NE flag ALL")
6972
6973 (define-pmacro (commit-semantics target_index is_float)
6974   (c-call VOID "@cpu@_commit" target_index is_float)
6975 )
6976
6977 (define-pmacro (commit-r name op ope reg is_float attr comment)
6978   (dni name
6979        (comment)
6980        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
6981        (.str name "$pack $" reg "k")
6982        (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
6983        (commit-semantics (index-of (.sym reg k)) is_float)
6984        ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
6985   )
6986 )
6987
6988 (commit-r commitgr OP_0A OPE1_04 GR 0 NA        "commit exceptions, specific GR")
6989 (commit-r commitfr OP_0A OPE1_06 FR 1 FR-ACCESS "commit exceptions, specific FR")
6990
6991 (define-pmacro (commit name op ope is_float attr comment)
6992   (dni name
6993        (comment)
6994        ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
6995        (.str name "$pack")
6996        (+ pack (rd-null) op (rs-null) ope (GRj-null))
6997        (commit-semantics -1 is_float)
6998        ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
6999   )
7000 )
7001
7002 (commit commitga OP_0A OPE1_05 0 NA        "commit exceptions, any GR")
7003 (commit commitfa OP_0A OPE1_07 1 FR-ACCESS "commit exceptions, any FR")
7004
7005 (define-pmacro (floating-point-conversion
7006                 name op ope conv mode src targ attr comment)
7007   (dni name
7008        (comment)
7009        (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
7010        (.str name "$pack $" src ",$" targ)
7011        (+ pack targ op (rs-null) ope src)
7012        (set targ (conv mode src))
7013        ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
7014   )
7015 )
7016
7017 (floating-point-conversion fitos OP_79 OPE1_00 float SF FRintj FRk
7018                            ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7019                            "Convert Integer to Single")
7020 (floating-point-conversion fstoi OP_79 OPE1_01 fix   SI FRj FRintk
7021                            ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7022                            "Convert Single  to Integer")
7023 (floating-point-conversion fitod OP_7A OPE1_00 float DF FRintj FRdoublek
7024                            ((MACH frv))
7025                            "Convert Integer to Double")
7026 (floating-point-conversion fdtoi OP_7A OPE1_01 fix   SI FRdoublej FRintk
7027                            ((MACH frv))
7028                            "Convert Double to Integer")
7029
7030 (define-pmacro (floating-point-dual-conversion
7031                 name op ope conv mode src src_hw targ targ_hw attr comment)
7032   (dni name
7033        (comment)
7034        ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) attr)
7035        (.str name "$pack $" src ",$" targ)
7036        (+ pack targ op (rs-null) ope src)
7037        (sequence ()
7038                  (set targ (conv mode src))
7039                  (set (nextreg targ_hw targ 1)
7040                       (conv mode (nextreg src_hw src 1))))
7041        ((fr500 (unit u-float-dual-convert)))
7042   )
7043 )
7044
7045 (floating-point-dual-conversion fditos OP_79 OPE1_10 float SF FRintj h-fr_int FRk h-fr NA "Dual Convert Integer to Single")
7046 (floating-point-dual-conversion fdstoi OP_79 OPE1_11 fix   SI FRj h-fr FRintk h-fr_int NA "Dual Convert Single  to Integer")
7047
7048 (define-pmacro (ne-floating-point-dual-conversion
7049                 name op ope conv mode src src_hw targ targ_hw attr comment)
7050   (dni name
7051        (comment)
7052        ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) NON-EXCEPTING attr)
7053        (.str name "$pack $" src ",$" targ)
7054        (+ pack targ op (rs-null) ope src)
7055        (sequence ()
7056                  (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7057                  (set targ (conv mode src))
7058                  (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
7059                  (set (nextreg targ_hw targ 1)
7060                       (conv mode (nextreg src_hw src 1))))
7061        ((fr500 (unit u-float-dual-convert)))
7062   )
7063 )
7064
7065 (ne-floating-point-dual-conversion nfditos OP_79 OPE1_30 float SF FRintj h-fr_int FRk h-fr NA "Non excepting dual Convert Integer to Single")
7066 (ne-floating-point-dual-conversion nfdstoi OP_79 OPE1_31 fix   SI FRj h-fr FRintk h-fr_int NA "Non excepting dual Convert Single  to Integer")
7067
7068 (define-pmacro (conditional-floating-point-conversion
7069                 name op ope conv mode src targ comment)
7070   (dni name
7071        (comment)
7072        ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7073        (.str name "$pack $" src ",$" targ ",$CCi,$cond")
7074        (+ pack targ op (rs-null) CCi cond ope src)
7075        (if (eq CCi (or cond 2))
7076            (set targ (conv mode src)))
7077        ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
7078   )
7079 )
7080
7081 (conditional-floating-point-conversion cfitos OP_6B OPE4_0 float SF FRintj FRk "Conditional convert Integer to Single")
7082 (conditional-floating-point-conversion cfstoi OP_6B OPE4_1 fix   SI FRj FRintk "Conditional convert Single to Integer")
7083
7084 (define-pmacro (ne-floating-point-conversion
7085                 name op ope conv mode src targ comment)
7086   (dni name
7087        (comment)
7088        ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7089        (.str name "$pack $" src ",$" targ)
7090        (+ pack targ op (rs-null) ope src)
7091        (sequence ()
7092                  (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7093                  (set targ (conv mode src)))
7094        ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
7095   )
7096 )
7097
7098 (ne-floating-point-conversion nfitos OP_79 OPE1_20 float SF FRintj FRk "NE convert Integer to Single")
7099 (ne-floating-point-conversion nfstoi OP_79 OPE1_21 fix   SI FRj FRintk "NE convert Single to Integer")
7100
7101 (register-transfer fmovs OP_79 OPE1_02
7102                    FRj FRk FMALL
7103                    ((FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7104                    ((fr500 (unit u-fr2fr)))
7105                    "Move Single Float")
7106 (register-transfer fmovd OP_7A OPE1_02
7107                    ; TODO -- unit doesn't handle extra register
7108                    FRdoublej FRdoublek FM01
7109                    ((FR500-MAJOR F-1) (MACH frv))
7110                    ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
7111                    "Move Double Float")
7112
7113 (dni fdmovs
7114      "Dual move single float"
7115      ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
7116      "fdmovs$pack $FRj,$FRk"
7117      (+ pack FRk OP_79 (rs-null) OPE1_12 FRj)
7118      (sequence ()
7119                (set FRk FRj)
7120                (set (nextreg h-fr FRk 1) (nextreg h-fr FRj 1)))
7121      ; TODO -- unit doesn't handle extra register
7122      ((fr500 (unit u-fr2fr)))
7123 )
7124
7125 (conditional-register-transfer cfmovs OP_6C OPE4_0 FRj FRk FMALL
7126                                ((FR500-MAJOR F-1) (FR550-MAJOR F-2)
7127                                 (MACH simple,tomcat,fr500,fr550,frv))
7128                                ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
7129                                "Conditional move Single Float")
7130
7131 (define-pmacro (floating-point-neg name src targ op ope attr comment)
7132   (dni name
7133        (comment)
7134        (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
7135        (.str name "$pack $" src ",$" targ)
7136        (+ pack src op (rs-null) ope targ)
7137        (set targ (neg src))
7138        ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7139   )
7140 )
7141
7142 (floating-point-neg fnegs FRj FRk OP_79 OPE1_03 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Floating point negate, single")
7143 (floating-point-neg fnegd FRdoublej FRdoublek OP_7A OPE1_03 ((MACH frv)) "Floating point negate, double")
7144
7145 (dni fdnegs
7146      "Floating point dual negate, single"
7147      ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
7148      "fdnegs$pack $FRj,$FRk"
7149      (+ pack FRk OP_79 (rs-null) OPE1_13 FRj)
7150      (sequence ()
7151                (set FRk (neg FRj))
7152                (set (nextreg h-fr FRk 1) (neg (nextreg h-fr FRj 1))))
7153      ((fr500 (unit u-float-dual-arith)))
7154 )
7155
7156 (dni cfnegs
7157      "Conditional floating point negate, single"
7158      ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7159      "cfnegs$pack $FRj,$FRk,$CCi,$cond"
7160      (+ pack FRj OP_6C (rs-null) CCi cond OPE4_1 FRk)
7161      (if (eq CCi (or cond 2))
7162          (set FRk (neg FRj)))
7163      ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7164 )
7165
7166 (define-pmacro (float-abs name src targ op ope attr comment)
7167   (dni name
7168        (comment)
7169        (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
7170        (.str name "$pack $" src ",$" targ )
7171        (+ pack targ op (rs-null) ope src)
7172        (set targ (abs src))
7173        ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7174   )
7175 )
7176
7177 (float-abs fabss FRj FRk OP_79 OPE1_04 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Float absolute value, single")
7178 (float-abs fabsd FRdoublej FRdoublek OP_7A OPE1_04 ((MACH frv)) "Float absolute value, double")
7179
7180 (dni fdabss
7181      "Floating point dual absolute value, single"
7182      ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
7183      "fdabss$pack $FRj,$FRk"
7184      (+ pack FRk OP_79 (rs-null) OPE1_14 FRj)
7185      (sequence ()
7186                (set FRk (abs FRj))
7187                (set (nextreg h-fr FRk 1) (abs (nextreg h-fr FRj 1))))
7188      ((fr500 (unit u-float-dual-arith)))
7189 )
7190
7191 (dni cfabss
7192      "Conditional floating point absolute value, single"
7193      ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7194      "cfabss$pack $FRj,$FRk,$CCi,$cond"
7195      (+ pack FRj OP_6C (rs-null) CCi cond OPE4_2 FRk)
7196      (if (eq CCi (or cond 2))
7197          (set FRk (abs FRj)))
7198      ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7199 )
7200
7201 (dni fsqrts
7202      "Square root single"
7203      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7204      "fsqrts$pack $FRj,$FRk"
7205      (+ pack FRk OP_79 (rs-null) OPE1_05 FRj)
7206      (set FRk (sqrt SF FRj))
7207      ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
7208 )
7209
7210 (dni fdsqrts
7211      "Dual square root single"
7212      ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4))
7213      "fdsqrts$pack $FRj,$FRk"
7214      (+ pack FRk OP_79 (rs-null) OPE1_15 FRj)
7215      (sequence ()
7216                (set FRk (sqrt SF FRj))
7217                (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
7218      ((fr500 (unit u-float-dual-sqrt)))
7219 )
7220
7221 (dni nfdsqrts
7222      "Non excepting Dual square root single"
7223      ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4) NON-EXCEPTING)
7224      "nfdsqrts$pack $FRj,$FRk"
7225      (+ pack FRk OP_79 (rs-null) OPE1_35 FRj)
7226      (sequence ()
7227                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7228                (set FRk (sqrt SF FRj))
7229                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7230                (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
7231      ((fr500 (unit u-float-dual-sqrt)))
7232 )
7233
7234 (dni fsqrtd
7235      "Square root double"
7236      ((UNIT FM01) (FR500-MAJOR F-4) (MACH frv))
7237      "fsqrtd$pack $FRdoublej,$FRdoublek"
7238      (+ pack FRdoublek OP_7A (rs-null) OPE1_05 FRdoublej)
7239      (set FRdoublek (sqrt DF FRdoublej))
7240      ((fr500 (unit u-float-sqrt)))
7241 )
7242
7243 (dni cfsqrts
7244      "Conditional square root single"
7245      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7246      "cfsqrts$pack $FRj,$FRk,$CCi,$cond"
7247      (+ pack FRk OP_6E (rs-null) CCi cond OPE4_2 FRj)
7248      (if (eq CCi (or cond 2))
7249          (set FRk (sqrt SF FRj)))
7250      ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
7251 )
7252
7253 (dni nfsqrts
7254      "Non exception square root, single"
7255      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7256      "nfsqrts$pack $FRj,$FRk"
7257      (+ pack FRk OP_79 (rs-null) OPE1_25 FRj)
7258      (sequence ()
7259                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7260                (set FRk (sqrt SF FRj)))
7261      ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
7262 )
7263
7264 (define-pmacro (float-binary-op-s name pipe attr operation op ope comment)
7265   (dni name
7266        (comment)
7267        (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) (.unsplice attr))
7268        (.str name "$pack $FRi,$FRj,$FRk")
7269        (+ pack FRk op FRi ope FRj)
7270        (set FRk (operation FRi FRj))
7271        ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7272   )
7273 )
7274
7275 (float-binary-op-s fadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_06 "add single float")
7276 (float-binary-op-s fsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_07 "sub single float")
7277 (float-binary-op-s fmuls FM01  ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_08 "mul single float")
7278
7279 (dni fdivs
7280      "div single float"
7281      ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
7282      "fdivs$pack $FRi,$FRj,$FRk"
7283      (+ pack FRk OP_79 FRi OPE1_09 FRj)
7284      (set FRk (div FRi FRj))
7285      ((fr500 (unit u-float-div))
7286       (fr550 (unit u-float-div)))
7287 )
7288
7289 (define-pmacro (float-binary-op-d name operation op ope major comment)
7290   (dni name
7291        (comment)
7292        ((UNIT FMALL) (FR500-MAJOR major) (MACH frv))
7293        (.str name "$pack $FRdoublei,$FRdoublej,$FRdoublek")
7294        (+ pack FRdoublek op FRdoublei ope FRdoublej)
7295        (set FRdoublek (operation FRdoublei FRdoublej))
7296        ((fr500 (unit u-float-arith)))
7297   )
7298 )
7299
7300 (float-binary-op-d faddd add OP_7A OPE1_06 F-2 "add double float")
7301 (float-binary-op-d fsubd sub OP_7A OPE1_07 F-2 "sub double float")
7302 (float-binary-op-d fmuld mul OP_7A OPE1_08 F-3 "mul double float")
7303 (float-binary-op-d fdivd div OP_7A OPE1_09 F-4 "div double float")
7304
7305 (define-pmacro (conditional-float-binary-op name pipe attr operation op ope profile comment)
7306   (dni name
7307        (comment)
7308        (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
7309                 (.unsplice attr))
7310        (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
7311        (+ pack FRk op FRi CCi cond ope FRj)
7312        (if (eq CCi (or cond 2))
7313            (set FRk (operation FRi FRj)))
7314        profile
7315   )
7316 )
7317
7318 (conditional-float-binary-op cfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_6D OPE4_0
7319                              ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7320                              "cond add single")
7321 (conditional-float-binary-op cfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_6D OPE4_1
7322                              ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7323                              "cond sub single")
7324 (conditional-float-binary-op cfmuls FM01  ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_6E OPE4_0
7325                              ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7326                              "cond mul single")
7327 (conditional-float-binary-op cfdivs FM01  ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_6E OPE4_1
7328                              ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
7329                              "cond div single")
7330
7331 (define-pmacro (ne-float-binary-op name pipe attr operation op ope profile comment)
7332   (dni name
7333        (comment)
7334        (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
7335                 (.unsplice attr))
7336        (.str name "$pack $FRi,$FRj,$FRk")
7337        (+ pack FRk op FRi ope FRj)
7338        (sequence ()
7339                  (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7340                  (set FRk (operation FRi FRj)))
7341        profile
7342   )
7343 )
7344
7345 (ne-float-binary-op nfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_26
7346                     ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7347                     "ne add single")
7348 (ne-float-binary-op nfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_27
7349                     ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7350                     "ne sub single")
7351 (ne-float-binary-op nfmuls FM01  ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_28
7352                     ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
7353                     "ne mul single")
7354 (ne-float-binary-op nfdivs FM01  ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_79 OPE1_29
7355                     ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
7356                     "ne div single")
7357
7358 (define-pmacro (fcc-eq) 8)
7359 (define-pmacro (fcc-lt) 4)
7360 (define-pmacro (fcc-gt) 2)
7361 (define-pmacro (fcc-uo) 1)
7362
7363 (define-pmacro (compare-and-set-fcc arg1 arg2 fcc)
7364   (if (gt arg1 arg2)
7365       (set fcc (fcc-gt))
7366       (if (eq arg1 arg2)
7367           (set fcc (fcc-eq))
7368           (if (lt arg1 arg2)
7369               (set fcc (fcc-lt))
7370               (set fcc (fcc-uo)))))
7371 )
7372
7373 (dni fcmps
7374      "compare single float"
7375      ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7376      "fcmps$pack $FRi,$FRj,$FCCi_2"
7377      (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_0A FRj)
7378      (compare-and-set-fcc FRi FRj FCCi_2)
7379      ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
7380 )
7381
7382 (dni fcmpd
7383      "compare double float"
7384      ((UNIT FMALL) (FR500-MAJOR F-2) (MACH frv))
7385      "fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2"
7386      (+ pack (cond-null) FCCi_2 OP_7A FRdoublei OPE1_0A FRdoublej)
7387      (compare-and-set-fcc FRdoublei FRdoublej FCCi_2)
7388      ((fr500 (unit u-float-compare)))
7389 )
7390
7391 (dni cfcmps
7392      "Conditional compare single, float"
7393      ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
7394      "cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond"
7395      (+ pack (cond-null) FCCi_2 OP_6D FRi CCi cond OPE4_2 FRj)
7396      (if (eq CCi (or cond 2))
7397          (compare-and-set-fcc FRi FRj FCCi_2))
7398      ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
7399 )
7400
7401 (dni fdcmps
7402      "float dual compare single"
7403      ((UNIT FMALL) (FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7404      "fdcmps$pack $FRi,$FRj,$FCCi_2"
7405      (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_1A FRj)
7406      (sequence ()
7407                (compare-and-set-fcc FRi FRj FCCi_2)
7408                (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
7409                                     (nextreg h-fccr FCCi_2 1)))
7410      ((fr500 (unit u-float-dual-compare)) (fr550 (unit u-float-dual-compare)))
7411 )
7412
7413 (define-pmacro (float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
7414   (dni name
7415        (comment)
7416        ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
7417        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7418        (+ pack targ op arg1 ope arg2)
7419        (set targ (add_sub (mul arg1 arg2) targ))
7420        ((fr500 (unit u-float-dual-arith)))
7421   )
7422 )
7423
7424 (float-mul-with-add fmadds add FRi FRj FRk OP_79 OPE1_0B "mul with add, single")
7425 (float-mul-with-add fmsubs sub FRi FRj FRk OP_79 OPE1_0C "mul with sub, single")
7426
7427 (float-mul-with-add fmaddd add FRdoublei FRdoublej FRdoublek OP_7A OPE1_0B "mul with add, double")
7428 (float-mul-with-add fmsubd sub FRdoublei FRdoublej FRdoublek OP_7A OPE1_0C "mul with sub, double")
7429
7430 (dni fdmadds
7431      "Float dual multiply with add"
7432      ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
7433      "fdmadds$pack $FRi,$FRj,$FRk"
7434      (+ pack FRk OP_79 FRi OPE1_1B FRj)
7435      (sequence ()
7436                (set FRk (add (mul FRi FRj) FRk))
7437                (set (nextreg h-fr FRk 1)
7438                     (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
7439                          (nextreg h-fr FRk 1))))
7440      ; TODO dual registers not referenced for profiling
7441      ((fr500 (unit u-float-dual-arith)))
7442 )
7443
7444 (dni nfdmadds
7445      "Non excepting float dual multiply with add"
7446      ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
7447      "nfdmadds$pack $FRi,$FRj,$FRk"
7448      (+ pack FRk OP_79 FRi OPE1_3B FRj)
7449      (sequence ()
7450                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7451                (set FRk (add (mul FRi FRj) FRk))
7452                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7453                (set (nextreg h-fr FRk 1)
7454                     (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
7455                          (nextreg h-fr FRk 1))))
7456      ; TODO dual registers not referenced for profiling
7457      ((fr500 (unit u-float-dual-arith)))
7458 )
7459
7460 (define-pmacro (conditional-float-mul-with-add
7461                 name add_sub arg1 arg2 targ op ope comment)
7462   (dni name
7463        (comment)
7464        ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) CONDITIONAL)
7465        (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
7466        (+ pack FRk op FRi CCi cond ope FRj)
7467        (if (eq CCi (or cond 2))
7468            (set targ (add_sub (mul arg1 arg2) targ)))
7469        ((fr500 (unit u-float-dual-arith)))
7470   )
7471 )
7472
7473 (conditional-float-mul-with-add cfmadds add FRi FRj FRk OP_6F OPE4_0 "conditional mul with add, single")
7474 (conditional-float-mul-with-add cfmsubs sub FRi FRj FRk OP_6F OPE4_1 "conditional mul with sub, single")
7475
7476 (define-pmacro (ne-float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
7477   (dni name
7478        (comment)
7479        ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) NON-EXCEPTING)
7480        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7481        (+ pack targ op arg1 ope arg2)
7482        (sequence ()
7483                  (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7484                  (set targ (add_sub (mul arg1 arg2) targ)))
7485        ((fr500 (unit u-float-dual-arith)))
7486   )
7487 )
7488
7489 (ne-float-mul-with-add nfmadds add FRi FRj FRk OP_79 OPE1_2B "non excepting mul with add, single")
7490 (ne-float-mul-with-add nfmsubs sub FRi FRj FRk OP_79 OPE1_2C "non excepting mul with sub, single")
7491
7492 (define-pmacro (float-parallel-mul-add-semantics cond add_sub arg1 arg2 targ)
7493   (if cond
7494       (sequence ()
7495                 (set targ (mul arg1 arg2))
7496                 (set (nextreg h-fr targ 1)
7497                      (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))))
7498 )
7499
7500 (define-pmacro (float-parallel-mul-add
7501                 name add_sub arg1 arg2 targ op ope comment)
7502   (dni name
7503        (comment)
7504        ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7505        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7506        (+ pack targ op arg1 ope arg2)
7507        (float-parallel-mul-add-semantics 1 add_sub arg1 arg2 targ)
7508        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7509   )
7510 )
7511
7512 (float-parallel-mul-add fmas add FRi FRj FRk OP_79 OPE1_0E "parallel mul/add, single")
7513 (float-parallel-mul-add fmss sub FRi FRj FRk OP_79 OPE1_0F "parallel mul/sub, single")
7514
7515 (define-pmacro (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7516   (sequence ()
7517             (set targ (mul arg1 arg2))
7518             (set (nextreg h-fr targ 1)
7519                  (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
7520             (set (nextreg h-fr targ 2)
7521                  (mul (nextreg h-fr arg1 2)     (nextreg h-fr arg2 2)))
7522             (set (nextreg h-fr targ 3)
7523                  (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
7524 )
7525
7526 (define-pmacro (float-dual-parallel-mul-add
7527                 name add_sub arg1 arg2 targ op ope comment)
7528   (dni name
7529        (comment)
7530        ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
7531        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7532        (+ pack targ op arg1 ope arg2)
7533        (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7534        ()
7535   )
7536 )
7537
7538 (float-dual-parallel-mul-add fdmas add FRi FRj FRk OP_79 OPE1_1C "dual parallel mul/add, single")
7539 (float-dual-parallel-mul-add fdmss sub FRi FRj FRk OP_79 OPE1_1D "dual parallel mul/sub, single")
7540
7541 (define-pmacro (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7542   (sequence ()
7543             (c-call VOID "@cpu@_set_ne_index" (index-of targ))
7544             (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
7545             (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 2))
7546             (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 3))
7547             (set targ (mul arg1 arg2))
7548             (set (nextreg h-fr targ 1)
7549                  (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
7550             (set (nextreg h-fr targ 2)
7551                  (mul (nextreg h-fr arg1 2)     (nextreg h-fr arg2 2)))
7552             (set (nextreg h-fr targ 3)
7553                  (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
7554 )
7555
7556 (define-pmacro (ne-float-dual-parallel-mul-add
7557                 name add_sub arg1 arg2 targ op ope comment)
7558   (dni name
7559        (comment)
7560        ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
7561        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7562        (+ pack targ op arg1 ope arg2)
7563        (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
7564        ()
7565   )
7566 )
7567
7568 (ne-float-dual-parallel-mul-add nfdmas add FRi FRj FRk OP_79 OPE1_3C "non excepting dual parallel mul/add, single")
7569 (ne-float-dual-parallel-mul-add nfdmss sub FRi FRj FRk OP_79 OPE1_3D "non excepting dual parallel mul/sub, single")
7570
7571 (define-pmacro (conditional-float-parallel-mul-add name add_sub op ope comment)
7572   (dni name
7573        (comment)
7574        ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) CONDITIONAL (MACH simple,tomcat,fr500,fr550,frv))
7575        (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
7576        (+ pack FRk op FRi CCi cond ope FRj)
7577        (float-parallel-mul-add-semantics (eq CCi (or cond 2))
7578                                          add_sub FRi FRj FRk)
7579        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7580   )
7581 )
7582
7583 (conditional-float-parallel-mul-add cfmas add OP_6F OPE4_2 "conditional parallel mul/add, single")
7584 (conditional-float-parallel-mul-add cfmss sub OP_6F OPE4_3 "conditional parallel mul/sub, single")
7585
7586 (define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
7587   (sequence ()
7588             (set targ (ftrunc SF (mul DF (fext DF arg1) (fext DF arg2))))
7589             (set (nextreg h-fr targ 1)
7590                  (ftrunc SF (add_sub DF
7591                                      (fext DF (nextreg h-fr arg1 1))
7592                                      (fext DF (nextreg h-fr arg2 1))))))
7593 )
7594
7595 (define-pmacro (float-parallel-mul-add-double
7596                 name add_sub arg1 arg2 targ op ope comment)
7597   (dni name
7598        (comment)
7599        ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
7600        (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
7601        (+ pack targ op arg1 ope arg2)
7602        (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
7603        ()
7604   )
7605 )
7606
7607 (float-parallel-mul-add-double fmad add FRi FRj FRk OP_7A OPE1_0E "parallel mul/add, double")
7608 (float-parallel-mul-add-double fmsd sub FRi FRj FRk OP_7A OPE1_0F "parallel mul/sub, double")
7609
7610 (define-pmacro (ne-float-parallel-mul-add name add_sub op ope comment)
7611   (dni name
7612        (comment)
7613        ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7614        (.str name "$pack $FRi,$FRj,$FRk")
7615        (+ pack FRk op FRi ope FRj)
7616        (sequence ()
7617                  (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7618                  (set FRk (mul FRi FRj))
7619                  (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7620                  (set (nextreg h-fr FRk 1)
7621                       (add_sub (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
7622        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7623   )
7624 )
7625
7626 (ne-float-parallel-mul-add nfmas add OP_79 OPE1_2E "ne parallel mul/add,single")
7627 (ne-float-parallel-mul-add nfmss sub OP_79 OPE1_2F "ne parallel mul/sub,single")
7628
7629 (define-pmacro (float-dual-arith name attr oper1 oper2 op ope comment)
7630   (dni name
7631        (comment)
7632        (.splice (UNIT FM01) (.unsplice attr))
7633        (.str name "$pack $FRi,$FRj,$FRk")
7634        (+ pack FRk op FRi ope FRj)
7635        (sequence ()
7636                  (set FRk (oper1 FRi FRj))
7637                  (set (nextreg h-fr FRk 1)
7638                       (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
7639        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7640   )
7641 )
7642
7643 (float-dual-arith fdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_16 "dual add, single")
7644 (float-dual-arith fdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_17 "dual sub, single")
7645 (float-dual-arith fdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_18 "dual mul, single")
7646 (float-dual-arith fddivs ((FR500-MAJOR F-7) (MACH frv))                           div div OP_79 OPE1_19 "dual div,single")
7647 (float-dual-arith fdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_1E "dual add/sub, single")
7648
7649 (dni fdmulcs
7650      "Float dual cross multiply single"
7651      ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7652      "fdmulcs$pack $FRi,$FRj,$FRk"
7653      (+ pack FRk OP_79 FRi OPE1_1F FRj)
7654      (sequence ()
7655                (set FRk (mul FRi (nextreg h-fr FRj 1)))
7656                (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
7657      ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7658 )
7659
7660 (dni nfdmulcs
7661      "NE float dual cross multiply single"
7662      ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
7663      "nfdmulcs$pack $FRi,$FRj,$FRk"
7664      (+ pack FRk OP_79 FRi OPE1_3F FRj)
7665      (sequence ()
7666                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7667                (set FRk (mul FRi (nextreg h-fr FRj 1)))
7668                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7669                (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
7670      ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7671 )
7672
7673 (define-pmacro (ne-float-dual-arith name attr oper1 oper2 op ope comment)
7674   (dni name
7675        (comment)
7676        (.splice (UNIT FM01) (.unsplice attr))
7677        (.str name "$pack $FRi,$FRj,$FRk")
7678        (+ pack FRk op FRi ope FRj)
7679        (sequence ()
7680                  (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7681                  (set FRk (oper1 FRi FRj))
7682                  (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7683                  (set (nextreg h-fr FRk 1)
7684                       (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
7685        ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
7686   )
7687 )
7688
7689 (ne-float-dual-arith nfdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_36 "ne dual add, single")
7690 (ne-float-dual-arith nfdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_37 "ne dual sub, single")
7691 (ne-float-dual-arith nfdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_38 "ne dual mul, single")
7692 (ne-float-dual-arith nfddivs ((FR500-MAJOR F-7) (MACH frv))                           div div OP_79 OPE1_39 "ne dual div,single")
7693 (ne-float-dual-arith nfdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_3E "ne dual add/sub, single")
7694
7695 (dni nfdcmps
7696      "non-excepting dual float compare"
7697      ((UNIT FM01) (FR500-MAJOR F-6) (MACH simple,tomcat,frv))
7698      "nfdcmps$pack $FRi,$FRj,$FCCi_2"
7699      (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_3A FRj)
7700      (sequence ()
7701                (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7702                (compare-and-set-fcc FRi FRj FCCi_2)
7703                (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7704                (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
7705                                     (nextreg h-fccr FCCi_2 1)))
7706      ((fr500 (unit u-float-dual-compare)))
7707 )
7708
7709 ; Media Instructions
7710 ;
7711 (define-pmacro (halfword hilo arg offset)
7712   (reg (.sym h-fr_ hilo) (add (index-of arg) offset)))
7713
7714 (dni mhsetlos
7715      "Media set lower signed 12 bits"
7716      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7717       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7718      "mhsetlos$pack $u12,$FRklo"
7719      (+ pack FRklo OP_78 OPE1_20 u12)
7720      (set FRklo u12)
7721      ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
7722       (fr550 (unit u-media-set (out FRintk FRklo))))
7723 )
7724
7725 (dni mhsethis
7726      "Media set upper signed 12 bits"
7727      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7728       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7729      "mhsethis$pack $u12,$FRkhi"
7730      (+ pack FRkhi OP_78 OPE1_22 u12)
7731      (set FRkhi u12)
7732      ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
7733       (fr550 (unit u-media-set (out FRintk FRkhi))))
7734 )
7735
7736 (dni mhdsets
7737      "Media dual set halfword signed 12 bits"
7738      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7739       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7740      "mhdsets$pack $u12,$FRintk"
7741      (+ pack FRintk OP_78 OPE1_24 u12)
7742      (sequence ()
7743                ; hack to get FRintk passed to modelling functions
7744                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7745                (set (halfword hi FRintk 0) u12)
7746                (set (halfword lo FRintk 0) u12))
7747      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7748       (fr550 (unit u-media-set)))
7749 )
7750
7751 (define-pmacro (set-5-semantics target value)
7752   (sequence ((HI tmp))
7753             (set tmp target)
7754             (set tmp (and tmp #x07ff))
7755             (set tmp (or tmp (sll (and s5 #x1f) 11)))
7756             (set target tmp))
7757 )
7758
7759 (define-pmacro (media-set-5 name hilo op ope comment)
7760   (dni name
7761        (comment)
7762        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7763         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7764        (.str name "$pack $s5,$FRk" hilo)
7765        (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5)
7766        (set-5-semantics (.sym FRk hilo) s5)
7767        ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
7768         (fr550 (unit u-media-set (out FRintk (.sym FRk hilo)))))
7769   )
7770 )
7771
7772 (media-set-5 mhsetloh lo OP_78 OPE1_21 "Media set upper 5 bits lo")
7773 (media-set-5 mhsethih hi OP_78 OPE1_23 "Media set upper 5 bits hi")
7774
7775 (dni mhdseth
7776      "Media dual set halfword upper 5 bits"
7777      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
7778       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7779      "mhdseth$pack $s5,$FRintk"
7780      (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5)
7781      (sequence ()
7782                ; hack to get FRintk passed to modelling functions
7783                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7784                (set-5-semantics (halfword hi FRintk 0) s5)
7785                (set-5-semantics (halfword lo FRintk 0) s5))
7786      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7787       (fr550 (unit u-media-set)))
7788 )
7789
7790 (define-pmacro (media-logic-r-r name operation op ope comment)
7791   (dni name
7792        (comment)
7793        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7794         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7795        (.str name "$pack $FRinti,$FRintj,$FRintk")
7796        (+ pack FRintk op FRinti ope FRintj)
7797        (set FRintk (operation FRinti FRintj))
7798        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7799         (fr500 (unit u-media)) (fr550 (unit u-media)))
7800   )
7801 )
7802
7803 (media-logic-r-r mand and OP_7B OPE1_00 "and reg/reg")
7804 (media-logic-r-r mor  or  OP_7B OPE1_01 "or  reg/reg")
7805 (media-logic-r-r mxor xor OP_7B OPE1_02 "xor reg/reg")
7806
7807 (define-pmacro (conditional-media-logic name operation op ope comment)
7808   (dni name
7809        (comment)
7810        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7811         (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
7812        (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
7813        (+ pack FRintk op FRinti CCi cond ope FRintj)
7814        (if (eq CCi (or cond 2))
7815            (set FRintk (operation FRinti FRintj)))
7816        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7817         (fr500 (unit u-media)) (fr550 (unit u-media)))
7818   )
7819 )
7820
7821 (conditional-media-logic cmand and OP_70 OPE4_0 "conditional and reg/reg")
7822 (conditional-media-logic cmor  or  OP_70 OPE4_1 "conditional or  reg/reg")
7823 (conditional-media-logic cmxor xor OP_70 OPE4_2 "conditional xor reg/reg")
7824
7825 (dni mnot
7826      ("mnot")
7827      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7828       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7829      ("mnot$pack $FRintj,$FRintk")
7830      (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj)
7831      (set FRintk (inv FRintj))
7832      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7833       (fr500 (unit u-media)) (fr550 (unit u-media)))
7834 )
7835
7836 (dni cmnot
7837      ("cmnot")
7838      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7839       (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
7840      ("cmnot$pack $FRintj,$FRintk,$CCi,$cond")
7841      (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj)
7842      (if (eq CCi (or cond 2))
7843          (set FRintk (inv FRintj)))
7844      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7845       (fr500 (unit u-media)) (fr550 (unit u-media)))
7846 )
7847
7848 (define-pmacro (media-rotate-r-r name operation op ope comment)
7849   (dni name
7850        (comment)
7851        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7852         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7853        (.str name "$pack $FRinti,$u6,$FRintk")
7854        (+ pack FRintk op FRinti ope u6)
7855        (set FRintk (operation FRinti (and u6 #x1f)))
7856        ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
7857         (fr500 (unit u-media)) (fr550 (unit u-media)))
7858   )
7859 )
7860
7861 (media-rotate-r-r mrotli rol OP_7B OPE1_04 "rotate left reg/reg")
7862 (media-rotate-r-r mrotri ror OP_7B OPE1_05 "rotate right reg/reg")
7863
7864 (define-pmacro (media-cut-r-r name arg op ope comment)
7865   (dni name
7866        (comment)
7867        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7868         (FR400-MAJOR M-2) (FR450-MAJOR M-2))
7869        (.str name "$pack $FRinti,$" arg ",$FRintk")
7870        (+ pack FRintk op FRinti ope arg)
7871        (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg))
7872        ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
7873         (fr500 (unit u-media)) (fr550 (unit u-media)))
7874   )
7875 )
7876
7877 (media-cut-r-r mwcut  FRintj OP_7B OPE1_06 "media cut")
7878 (media-cut-r-r mwcuti u6     OP_7B OPE1_07 "media cut")
7879
7880 (define-pmacro (media-cut-acc name arg op ope fr450-major comment)
7881   (dni name
7882        (comment)
7883        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7884         (FR400-MAJOR M-1) (FR450-MAJOR fr450-major))
7885        (.str name "$pack $ACC40Si,$" arg ",$FRintk")
7886        (+ pack FRintk op ACC40Si ope arg)
7887        (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg))
7888        ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
7889         (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
7890   )
7891 )
7892
7893 (media-cut-acc mcut  FRintj OP_7B OPE1_2C M-1 "media accumulator cut reg")
7894 (media-cut-acc mcuti s6     OP_7B OPE1_2E M-5 "media accumulator cut immed")
7895
7896 (define-pmacro (media-cut-acc-ss name arg op ope fr450-major comment)
7897   (dni name
7898        (comment)
7899        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7900         (FR400-MAJOR M-1) (FR450-MAJOR fr450-major))
7901        (.str name "$pack $ACC40Si,$" arg ",$FRintk")
7902        (+ pack FRintk op ACC40Si ope arg)
7903        (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg))
7904        ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
7905         (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
7906   )
7907 )
7908
7909 (media-cut-acc-ss mcutss  FRintj OP_7B OPE1_2D M-1 "media accumulator cut reg with saturation")
7910 (media-cut-acc-ss mcutssi s6     OP_7B OPE1_2F M-5 "media accumulator cut immed with saturation")
7911
7912 ; Dual Media Instructions
7913 ;
7914 (define-pmacro (register-unaligned register alignment)
7915   (and (index-of register) (sub alignment 1))
7916 )
7917
7918 (dni mdcutssi
7919      "Media dual cut with signed saturation"
7920      ((UNIT MDCUTSSI) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
7921       (FR400-MAJOR M-2) (FR450-MAJOR M-6))
7922      "mdcutssi$pack $ACC40Si,$s6,$FRintkeven"
7923      (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6)
7924      (if (register-unaligned ACC40Si 2)
7925          (c-call VOID "@cpu@_media_acc_not_aligned")
7926          (if (register-unaligned FRintkeven 2)
7927              (c-call VOID "@cpu@_media_register_not_aligned")
7928              (sequence ()
7929                        (set FRintkeven (c-call SI "@cpu@_media_cut_ss" ACC40Si s6))
7930                        (set (nextreg h-fr_int FRintkeven 1)
7931                             (c-call SI "@cpu@_media_cut_ss"
7932                                     (nextreg h-acc40S ACC40Si 1) s6)))))
7933      ((fr400 (unit u-media-4-acc-dual
7934                    (out FRintk FRintkeven)))
7935       (fr450 (unit u-media-4-acc-dual
7936                    (out FRintk FRintkeven)))
7937       (fr550 (unit u-media-3-acc-dual)))
7938 )
7939
7940 ; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated
7941 ; so it will be passed to the unit modelers.   YUCK!!!!!
7942 (define-pmacro (extract-hilo reg1 off1 reg2 off2 arg1hi arg1lo arg2hi arg2lo)
7943   (sequence ()
7944             (set arg1hi (add (halfword hi reg1 off1) (mul reg1 0)))
7945             (set arg1lo (add (halfword lo reg1 off1) (mul reg1 0)))
7946             (set arg2hi (add (halfword hi reg2 off2) (mul reg2 0)))
7947             (set arg2lo (add (halfword lo reg2 off2) (mul reg2 0))))
7948 )
7949
7950 (dni maveh
7951      "Media dual average"
7952      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
7953       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7954      "maveh$pack $FRinti,$FRintj,$FRintk"
7955      (+ pack FRintk OP_7B FRinti OPE1_08 FRintj)
7956      (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj))
7957      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
7958       (fr500 (unit u-media)) (fr550 (unit u-media)))
7959 )
7960
7961 (define-pmacro (media-dual-shift name operation op ope profile comment)
7962   (dni name
7963        (comment)
7964        ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
7965         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
7966        (.str name "$pack $FRinti,$u6,$FRintk")
7967        (+ pack FRintk op FRinti ope u6)
7968        (sequence ()
7969                  ; hack to get these referenced for profiling
7970                  (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
7971                  (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7972                  (set (halfword hi FRintk 0)
7973                       (operation (halfword hi FRinti 0) (and u6 #xf)))
7974                  (set (halfword lo FRintk 0)
7975                       (operation (halfword lo FRinti 0) (and u6 #xf))))
7976        profile
7977   )
7978 )
7979
7980 (media-dual-shift msllhi sll OP_7B OPE1_09
7981                   ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
7982                    (fr500 (unit u-media)) (fr550 (unit u-media)))
7983                   "Media dual shift left  logical")
7984 (media-dual-shift msrlhi srl OP_7B OPE1_0A
7985                   ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
7986                    (fr500 (unit u-media)) (fr550 (unit u-media)))
7987                   "Media dual shift right logical")
7988 (media-dual-shift msrahi sra OP_7B OPE1_0B
7989                   ((fr400 (unit u-media-6)) (fr450 (unit u-media-6))
7990                    (fr500 (unit u-media)) (fr550 (unit u-media)))
7991                   "Media dual shift right arithmetic")
7992
7993 (define-pmacro (media-dual-word-rotate-r-r name operation op ope comment)
7994   (dni name
7995        (comment)
7996        ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
7997         (FR400-MAJOR M-2) (FR450-MAJOR M-2))
7998        (.str name "$pack $FRintieven,$s6,$FRintkeven")
7999        (+ pack FRintkeven op FRintieven ope s6)
8000        (if (orif (register-unaligned FRintieven 2)
8001                  (register-unaligned FRintkeven 2))
8002            (c-call VOID "@cpu@_media_register_not_aligned")
8003            (sequence ()
8004                      (set FRintkeven (operation FRintieven (and s6 #x1f)))
8005                      (set (nextreg h-fr_int FRintkeven 1)
8006                           (operation (nextreg h-fr_int FRintieven 1)
8007                                      (and s6 #x1f)))))
8008        ((fr400 (unit u-media-3-quad
8009                      (in  FRinti FRintieven)
8010                      (out FRintk FRintkeven)))
8011         (fr450 (unit u-media-3-quad
8012                      (in  FRinti FRintieven)
8013                      (out FRintk FRintkeven)))
8014         (fr550 (unit u-media-quad)))
8015   )
8016 )
8017
8018 (media-dual-word-rotate-r-r mdrotli rol OP_78 OPE1_0B "rotate left reg/reg")
8019
8020 (dni mcplhi
8021      "Media bit concatenate, halfword"
8022      ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
8023       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8024      "mcplhi$pack $FRinti,$u6,$FRintk"
8025      (+ pack FRintk OP_78 FRinti OPE1_0C u6)
8026      (sequence ((HI arg1) (HI arg2) (HI shift))
8027                (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
8028                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8029                (set shift (and u6 #xf))
8030                (set arg1 (sll (halfword hi FRinti 0) shift))
8031                (if (ne shift 0)
8032                    (sequence ()
8033                              (set arg2 (halfword hi FRinti 1))
8034                              (set arg2 (srl HI (sll HI arg2 (sub 15 shift))
8035                                             (sub 15 shift)))
8036                              (set arg1 (or HI arg1 arg2))))
8037                (set (halfword hi FRintk 0) arg1))
8038      ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual))
8039       (fr550 (unit u-media-3-dual)))
8040 )
8041
8042 (dni mcpli
8043      "Media bit concatenate, word"
8044      ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
8045       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8046      "mcpli$pack $FRinti,$u6,$FRintk"
8047      (+ pack FRintk OP_78 FRinti OPE1_0D u6)
8048      (sequence ((SI tmp) (SI shift))
8049                (set shift (and u6 #x1f))
8050                (set tmp (sll FRinti shift))
8051                (if (ne shift 0)
8052                    (sequence ((SI tmp1))
8053                              (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1)
8054                                                  (sub 31 shift))
8055                                             (sub 31 shift)))
8056                              (set tmp (or tmp tmp1))))
8057                (set FRintk tmp))
8058      ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual))
8059       (fr550 (unit u-media-3-dual)))
8060 )
8061
8062 (define-pmacro (saturate arg max min result)
8063   (if (gt arg max)
8064       (set result max)
8065       (if (lt arg min)
8066           (set result min)
8067           (set result arg)))
8068 )
8069
8070 (dni msaths
8071      "Media dual saturation signed"
8072      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8073       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8074      "msaths$pack $FRinti,$FRintj,$FRintk"
8075      (+ pack FRintk OP_7B FRinti OPE1_0C FRintj)
8076      (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
8077                (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8078                (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0))
8079                (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0)))
8080      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8081       (fr500 (unit u-media)) (fr550 (unit u-media)))
8082 )
8083
8084 (dni mqsaths
8085      "Media quad saturation signed"
8086      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2)
8087       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8088      "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven"
8089      (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven)
8090      (if (orif (register-unaligned FRintieven 2)
8091                (orif (register-unaligned FRintjeven 2)
8092                      (register-unaligned FRintkeven 2)))
8093          (c-call VOID "@cpu@_media_register_not_aligned")
8094          (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
8095                    ; hack to get FRintkeven referenced as a target for profiling
8096                    (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8097                    (extract-hilo FRintieven 0 FRintjeven 0 argihi argilo argjhi argjlo)
8098                    (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 0))
8099                    (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 0))
8100                    (extract-hilo FRintieven 1 FRintjeven 1 argihi argilo argjhi argjlo)
8101                    (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 1))
8102                    (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 1))))
8103      ((fr400 (unit u-media-1-quad
8104                    (in  FRinti FRintieven)
8105                    (in  FRintj FRintjeven)
8106                    (out FRintk FRintkeven)))
8107       (fr450 (unit u-media-1-quad
8108                    (in  FRinti FRintieven)
8109                    (in  FRintj FRintjeven)
8110                    (out FRintk FRintkeven)))
8111       (fr550 (unit u-media-quad)))
8112 )
8113
8114 (define-pmacro (saturate-unsigned arg max result)
8115   (if (gt arg max)
8116       (set result max)
8117       (set result arg))
8118 )
8119
8120 (dni msathu
8121      "Media dual saturation unsigned"
8122      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8123       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8124      "msathu$pack $FRinti,$FRintj,$FRintk"
8125      (+ pack FRintk OP_7B FRinti OPE1_0D FRintj)
8126      (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo))
8127                (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8128                (saturate-unsigned argihi argjhi (halfword hi FRintk 0))
8129                (saturate-unsigned argilo argjlo (halfword lo FRintk 0)))
8130      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8131       (fr500 (unit u-media)) (fr550 (unit u-media)))
8132 )
8133
8134 (define-pmacro (media-dual-compare name mode op ope comment)
8135   (dni name
8136        (comment)
8137        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8138         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8139        (.str name "$pack $FRinti,$FRintj,$FCCk")
8140        (+ pack (cond-null) FCCk op FRinti ope FRintj)
8141        (if (register-unaligned FCCk 2)
8142            (c-call VOID "@cpu@_media_cr_not_aligned")
8143            (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8144                      (extract-hilo FRinti 0 FRintj 0
8145                                    argihi argilo argjhi argjlo)
8146                      (compare-and-set-fcc argihi argjhi FCCk)
8147                      (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1))))
8148        ; TODO - doesn't handle second FCC
8149        ((fr400 (unit u-media-7)) (fr450 (unit u-media-7))
8150         (fr500 (unit u-media)) (fr550 (unit u-media)))
8151   )
8152 )
8153
8154 (media-dual-compare mcmpsh HI  OP_7B OPE1_0E "Media dual compare signed")
8155 (media-dual-compare mcmpuh UHI OP_7B OPE1_0F "Media dual compare unsigned")
8156
8157 ; Bits for the MSR.SIE field
8158 (define-pmacro (msr-sie-nil)      0)
8159 (define-pmacro (msr-sie-fri-hi)   8)
8160 (define-pmacro (msr-sie-fri-lo)   4)
8161 (define-pmacro (msr-sie-fri-1-hi) 2)
8162 (define-pmacro (msr-sie-fri-1-lo) 1)
8163 (define-pmacro (msr-sie-acci)     8)
8164 (define-pmacro (msr-sie-acci-1)   4)
8165 (define-pmacro (msr-sie-acci-2)   2)
8166 (define-pmacro (msr-sie-acci-3)   1)
8167
8168 (define-pmacro (saturate-v arg max min sie result)
8169   (if (gt DI arg max)
8170       (sequence ()
8171                 (set result max)
8172                 (c-call VOID "@cpu@_media_overflow" sie))
8173       (if (lt DI arg min)
8174           (sequence ()
8175                     (set result min)
8176                     (c-call VOID "@cpu@_media_overflow" sie))
8177           (set result arg)))
8178 )
8179
8180 (dni mabshs
8181      "Media dual absolute value, halfword"
8182      ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2)
8183       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8184      "mabshs$pack $FRintj,$FRintk"
8185      (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj)
8186      (sequence ((HI arghi) (HI arglo))
8187                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
8188                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8189                (set arghi (halfword hi FRintj 0))
8190                (set arglo (halfword lo FRintj 0))
8191                (saturate-v (abs arghi) 32767 -32768 (msr-sie-fri-hi)
8192                            (halfword hi FRintk 0))
8193                (saturate-v (abs arglo) 32767 -32768 (msr-sie-fri-lo)
8194                            (halfword lo FRintk 0)))
8195      ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8196       (fr550 (unit u-media)))
8197 )
8198
8199 (define-pmacro (media-arith-sat-semantics
8200                 operation arg1 arg2 res mode max min sie)
8201   (sequence ((DI tmp))
8202             (set tmp (operation arg1 arg2))
8203             (saturate-v tmp max min sie res))
8204 )
8205
8206 (define-pmacro (media-dual-arith-sat-semantics operation mode max min)
8207   (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8208             (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8209             (media-arith-sat-semantics operation argihi argjhi
8210                                        (halfword hi FRintk 0) mode max min
8211                                        (msr-sie-fri-hi))
8212             (media-arith-sat-semantics operation argilo argjlo
8213                                        (halfword lo FRintk 0) mode max min
8214                                        (msr-sie-fri-lo)))
8215 )
8216
8217 (define-pmacro (media-dual-arith-sat name operation mode max min op ope comment)
8218   (dni name
8219        (comment)
8220        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8221         (FR400-MAJOR M-1) (FR450-MAJOR M-1))
8222        (.str name "$pack $FRinti,$FRintj,$FRintk")
8223        (+ pack FRintk op FRinti ope FRintj)
8224        (media-dual-arith-sat-semantics operation mode max min)
8225        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8226         (fr500 (unit u-media)) (fr550 (unit u-media)))
8227   )
8228 )
8229
8230 (media-dual-arith-sat maddhss add  HI 32767 -32768 OP_7B OPE1_10 "Media dual add signed with saturation")
8231 (media-dual-arith-sat maddhus add UHI 65535      0 OP_7B OPE1_11 "Media dual add unsigned with saturation")
8232
8233 (media-dual-arith-sat msubhss sub  HI 32767 -32768 OP_7B OPE1_12 "Media dual sub signed with saturation")
8234 (media-dual-arith-sat msubhus sub UHI 65535      0 OP_7B OPE1_13 "Media dual sub unsigned with saturation")
8235
8236 (define-pmacro (conditional-media-dual-arith-sat
8237                 name operation mode max min op ope comment)
8238   (dni name
8239        (comment)
8240        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8241         (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
8242        (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
8243        (+ pack FRintk op FRinti CCi cond ope FRintj)
8244        (if (eq CCi (or cond 2))
8245            (media-dual-arith-sat-semantics operation mode max min))
8246        ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
8247         (fr500 (unit u-media)) (fr550 (unit u-media)))
8248   )
8249 )
8250
8251 (conditional-media-dual-arith-sat cmaddhss add  HI 32767 -32768 OP_71 OPE4_0 "Conditional Media dual add signed with saturation")
8252 (conditional-media-dual-arith-sat cmaddhus add UHI 65535      0 OP_71 OPE4_1 "Conditional Media dual add unsigned with saturation")
8253
8254 (conditional-media-dual-arith-sat cmsubhss sub  HI 32767 -32768 OP_71 OPE4_2 "Conditional Media dual sub signed with saturation")
8255 (conditional-media-dual-arith-sat cmsubhus sub UHI 65535      0 OP_71 OPE4_3 "Conditional Media dual sub unsigned with saturation")
8256
8257 (define-pmacro (media-quad-arith-sat-semantics cond operation mode max min)
8258   (if (orif (register-unaligned FRintieven 2)
8259             (orif (register-unaligned FRintjeven 2)
8260                   (register-unaligned FRintkeven 2)))
8261       (c-call VOID "@cpu@_media_register_not_aligned")
8262       (if cond
8263           (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8264                     ; hack to get FRintkeven referenced as a target for profiling
8265                     (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8266                     (extract-hilo FRintieven 0 FRintjeven 0
8267                                   argihi argilo argjhi argjlo)
8268                     (media-arith-sat-semantics operation argihi argjhi
8269                                                (halfword hi FRintkeven 0) mode
8270                                                max min (msr-sie-fri-hi))
8271                     (media-arith-sat-semantics operation argilo argjlo
8272                                                (halfword lo FRintkeven 0) mode
8273                                                max min (msr-sie-fri-lo))
8274                     (extract-hilo FRintieven 1 FRintjeven 1
8275                                   argihi argilo argjhi argjlo)
8276                     (media-arith-sat-semantics operation argihi argjhi
8277                                                (halfword hi FRintkeven 1) mode
8278                                                max min  (msr-sie-fri-1-hi))
8279                     (media-arith-sat-semantics operation argilo argjlo
8280                                                (halfword lo FRintkeven 1) mode
8281                                                max min (msr-sie-fri-1-lo)))))
8282 )
8283
8284 (define-pmacro (media-quad-arith-sat name operation mode max min op ope comment)
8285   (dni name
8286        (comment)
8287        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8288         (FR400-MAJOR M-2) (FR450-MAJOR M-2))
8289        (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven")
8290        (+ pack FRintkeven op FRintieven ope FRintjeven)
8291        (media-quad-arith-sat-semantics 1 operation mode max min)
8292        ((fr400 (unit u-media-1-quad
8293                      (in  FRinti FRintieven)
8294                      (in  FRintj FRintjeven)
8295                      (out FRintk FRintkeven)))
8296         (fr450 (unit u-media-1-quad
8297                      (in  FRinti FRintieven)
8298                      (in  FRintj FRintjeven)
8299                      (out FRintk FRintkeven)))
8300         (fr500 (unit u-media-quad-arith
8301                      (in  FRinti FRintieven)
8302                      (in  FRintj FRintjeven)
8303                      (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
8304   )
8305 )
8306
8307 (media-quad-arith-sat mqaddhss add  HI 32767 -32768 OP_7B OPE1_18 "Media quad add signed with saturation")
8308 (media-quad-arith-sat mqaddhus add UHI 65535      0 OP_7B OPE1_19 "Media quad add unsigned with saturation")
8309
8310 (media-quad-arith-sat mqsubhss sub  HI 32767 -32768 OP_7B OPE1_1A "Media quad sub signed with saturation")
8311 (media-quad-arith-sat mqsubhus sub UHI 65535      0 OP_7B OPE1_1B "Media quad sub unsigned with saturation")
8312
8313 (define-pmacro (conditional-media-quad-arith-sat
8314                 name operation mode max min op ope comment)
8315   (dni name
8316        (comment)
8317        ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
8318         (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
8319        (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond")
8320        (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven)
8321        (media-quad-arith-sat-semantics (eq CCi (or cond 2))
8322                                        operation mode max min)
8323        ((fr400 (unit u-media-1-quad
8324                      (in  FRinti FRintieven)
8325                      (in  FRintj FRintjeven)
8326                      (out FRintk FRintkeven)))
8327         (fr450 (unit u-media-1-quad
8328                      (in  FRinti FRintieven)
8329                      (in  FRintj FRintjeven)
8330                      (out FRintk FRintkeven)))
8331         (fr500 (unit u-media-quad-arith
8332                      (in  FRinti FRintieven)
8333                      (in  FRintj FRintjeven)
8334                      (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
8335   )
8336 )
8337
8338 (conditional-media-quad-arith-sat cmqaddhss add  HI 32767 -32768 OP_73 OPE4_0 "Conditional Media quad add signed with saturation")
8339 (conditional-media-quad-arith-sat cmqaddhus add UHI 65535      0 OP_73 OPE4_1 "Conditional Media quad add unsigned with saturation")
8340
8341 (conditional-media-quad-arith-sat cmqsubhss sub  HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation")
8342 (conditional-media-quad-arith-sat cmqsubhus sub UHI 65535      0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation")
8343
8344 ;; Return A if |A| > |B| and B is positive.  Return -A if |A| > |B| and
8345 ;; B is negative, saturating 0x8000 as 0x7fff.  Return 0 otherwise.
8346 (define-pmacro (media-low-clear-semantics a b)
8347   (cond HI
8348         ((le UHI (abs a) (abs b)) 0)
8349         ((le HI 0 b) a)
8350         ((eq HI a -32768) 32767)
8351         (else (neg a))))
8352
8353 ;; Return A if -|B| < A < |B|.  Return -B if A <= -|B|, saturating 0x8000
8354 ;; as 0x7fff.  Return B if A >= |B|.
8355 (define-pmacro (media-scope-limit-semantics a b)
8356   (cond HI
8357         ((andif (gt HI b -32768)
8358                 (ge HI a (abs b))) b)
8359         ((gt HI a (neg (abs b))) a)
8360         ((eq HI b -32768) 32767)
8361         (else (neg b))))
8362
8363 (define-pmacro (media-quad-limit name operation op ope comment)
8364   (dni name
8365        comment
8366        ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2))
8367        (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven")
8368        (+ pack FRintkeven op FRintieven ope FRintjeven)
8369        (if (orif (register-unaligned FRintieven 2)
8370                  (orif (register-unaligned FRintjeven 2)
8371                        (register-unaligned FRintkeven 2)))
8372            (c-call VOID "@cpu@_media_register_not_aligned")
8373            (sequence ((HI a1) (HI a2) (HI a3) (HI a4)
8374                       (HI b1) (HI b2) (HI b3) (HI b4))
8375                      ; hack to get FRintkeven referenced as a target
8376                      ; for profiling
8377                      (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8378                      (extract-hilo FRintieven 0 FRintjeven 0 a1 a2 b1 b2)
8379                      (extract-hilo FRintieven 1 FRintjeven 1 a3 a4 b3 b4)
8380                      (set (halfword hi FRintkeven 0) (operation a1 b1))
8381                      (set (halfword lo FRintkeven 0) (operation a2 b2))
8382                      (set (halfword hi FRintkeven 1) (operation a3 b3))
8383                      (set (halfword lo FRintkeven 1) (operation a4 b4))))
8384        ((fr450 (unit u-media-1-quad
8385                      (in  FRinti FRintieven)
8386                      (in  FRintj FRintjeven)
8387                      (out FRintk FRintkeven))))
8388   )
8389 )
8390
8391 (media-quad-limit mqlclrhs media-low-clear-semantics OP_78 OPE1_10
8392                   "Media quad low clear")
8393 (media-quad-limit mqlmths media-scope-limit-semantics OP_78 OPE1_14
8394                   "Media quad scope limitation")
8395
8396 (define-pmacro (media-quad-shift name operation op ope comment)
8397   (dni name
8398        (comment)
8399        ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2))
8400        (.str name "$pack $FRintieven,$u6,$FRintkeven")
8401        (+ pack FRintkeven op FRintieven ope u6)
8402        (if (orif (register-unaligned FRintieven 2)
8403                  (register-unaligned FRintkeven 2))
8404            (c-call VOID "@cpu@_media_register_not_aligned")
8405            (sequence ()
8406                      ; hack to get these referenced for profiling
8407                      (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
8408                      (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8409                      (set (halfword hi FRintkeven 0)
8410                           (operation HI (halfword hi FRintieven 0)
8411                                         (and u6 #xf)))
8412                      (set (halfword lo FRintkeven 0)
8413                           (operation HI (halfword lo FRintieven 0)
8414                                         (and u6 #xf)))
8415                      (set (halfword hi FRintkeven 1)
8416                           (operation HI (halfword hi FRintieven 1)
8417                                         (and u6 #xf)))
8418                      (set (halfword lo FRintkeven 1)
8419                           (operation HI (halfword lo FRintieven 1)
8420                                         (and u6 #xf)))))
8421        ((fr450 (unit u-media-3-quad
8422                      (in  FRinti FRintieven)
8423                      (in  FRintj FRintieven)
8424                      (out FRintk FRintkeven))))
8425   )
8426 )
8427
8428 (media-quad-shift mqsllhi sll OP_78 OPE1_11 "Media quad left shift")
8429 (media-quad-shift mqsrahi sra OP_78 OPE1_13 "Media quad right shift")
8430
8431 (define-pmacro (media-acc-arith-sat name operation mode max min op ope comment)
8432   (dni name
8433        (comment)
8434        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8435         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
8436        (.str name "$pack $ACC40Si,$ACC40Sk")
8437        (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
8438        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8439            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8440                (if (register-unaligned ACC40Si 2)
8441                    (c-call VOID "@cpu@_media_acc_not_aligned")
8442                    (media-arith-sat-semantics operation ACC40Si
8443                                               (nextreg h-acc40S ACC40Si 1)
8444                                               ACC40Sk mode max min (msr-sie-acci)))))
8445        ((fr400 (unit u-media-2-acc)) (fr450 (unit u-media-2-acc))
8446         (fr550 (unit u-media-4-acc)))
8447   )
8448 )
8449
8450 (media-acc-arith-sat maddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
8451                      OP_78 OPE1_04 "Media accumulator addition")
8452 (media-acc-arith-sat msubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
8453                      OP_78 OPE1_05 "Media accumulator subtraction")
8454
8455 (define-pmacro (media-dual-acc-arith-sat name operation mode max min op ope
8456                                          comment)
8457   (dni name
8458        (comment)
8459        ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8460         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8461        (.str name "$pack $ACC40Si,$ACC40Sk")
8462        (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
8463        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8464            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8465                (if (register-unaligned ACC40Si 4)
8466                    (c-call VOID "@cpu@_media_acc_not_aligned")
8467                    (if (register-unaligned ACC40Sk 2)
8468                        (c-call VOID "@cpu@_media_acc_not_aligned")
8469                        (sequence ()
8470                                  (media-arith-sat-semantics operation ACC40Si
8471                                                             (nextreg h-acc40S ACC40Si 1)
8472                                                             ACC40Sk mode max min
8473                                                             (msr-sie-acci))
8474                                  (media-arith-sat-semantics operation
8475                                                             (nextreg h-acc40S ACC40Si 2)
8476                                                             (nextreg h-acc40S ACC40Si 3)
8477                                                             (nextreg h-acc40S ACC40Sk 1)
8478                                                             mode max min
8479                                                             (msr-sie-acci-1)))))))
8480        ((fr400 (unit u-media-2-acc-dual)) (fr450 (unit u-media-2-acc-dual))
8481         (fr550 (unit u-media-4-acc-dual)))
8482   )
8483 )
8484
8485 (media-dual-acc-arith-sat mdaddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
8486                           OP_78 OPE1_06 "Media accumulator addition")
8487 (media-dual-acc-arith-sat mdsubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
8488                           OP_78 OPE1_07 "Media accumulator subtraction")
8489
8490 (dni masaccs
8491      "Media add and subtract signed accumulator with saturation"
8492        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8493         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
8494        "masaccs$pack $ACC40Si,$ACC40Sk"
8495        (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null))
8496        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8497            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8498                (if (register-unaligned ACC40Si 2)
8499                    (c-call VOID "@cpu@_media_acc_not_aligned")
8500                    (if (register-unaligned ACC40Sk 2)
8501                        (c-call VOID "@cpu@_media_acc_not_aligned")
8502                        (sequence ()
8503                                  (media-arith-sat-semantics add ACC40Si
8504                                                             (nextreg h-acc40S ACC40Si 1)
8505                                                             ACC40Sk DI
8506                                                             #x7fffffffff
8507                                                             (inv DI #x7fffffffff)
8508                                                             (msr-sie-acci))
8509                                  (media-arith-sat-semantics sub ACC40Si
8510                                                             (nextreg h-acc40S ACC40Si 1)
8511                                                             (nextreg h-acc40S ACC40Sk 1)
8512                                                             DI
8513                                                             #x7fffffffff
8514                                                             (inv DI #x7fffffffff)
8515                                                             (msr-sie-acci-1)))))))
8516        ((fr400 (unit u-media-2-add-sub)) (fr450 (unit u-media-2-add-sub))
8517         (fr550 (unit u-media-4-add-sub)))
8518   )
8519
8520 (dni mdasaccs
8521      "Media add and subtract signed accumulator with saturation"
8522        ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8523         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8524        "mdasaccs$pack $ACC40Si,$ACC40Sk"
8525        (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null))
8526        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
8527            (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8528                (if (register-unaligned ACC40Si 4)
8529                    (c-call VOID "@cpu@_media_acc_not_aligned")
8530                    (if (register-unaligned ACC40Sk 4)
8531                        (c-call VOID "@cpu@_media_acc_not_aligned")
8532                        (sequence ()
8533                                  (media-arith-sat-semantics add ACC40Si
8534                                                             (nextreg h-acc40S ACC40Si 1)
8535                                                             ACC40Sk DI
8536                                                             #x7fffffffff
8537                                                             (inv DI #x7fffffffff)
8538                                                             (msr-sie-acci))
8539                                  (media-arith-sat-semantics sub ACC40Si
8540                                                             (nextreg h-acc40S ACC40Si 1)
8541                                                             (nextreg h-acc40S ACC40Sk 1)
8542                                                             DI
8543                                                             #x7fffffffff
8544                                                             (inv DI #x7fffffffff)
8545                                                             (msr-sie-acci-1))
8546                                  (media-arith-sat-semantics add
8547                                                             (nextreg h-acc40S ACC40Si 2)
8548                                                             (nextreg h-acc40S ACC40Si 3)
8549                                                             (nextreg h-acc40S ACC40Sk 2)
8550                                                             DI
8551                                                             #x7fffffffff
8552                                                             (inv DI #x7fffffffff)
8553                                                             (msr-sie-acci-2))
8554                                  (media-arith-sat-semantics sub
8555                                                             (nextreg h-acc40S ACC40Si 2)
8556                                                             (nextreg h-acc40S ACC40Si 3)
8557                                                             (nextreg h-acc40S ACC40Sk 3)
8558                                                             DI
8559                                                             #x7fffffffff
8560                                                             (inv DI #x7fffffffff)
8561                                                             (msr-sie-acci-3)))))))
8562        ((fr400 (unit u-media-2-add-sub-dual))
8563         (fr450 (unit u-media-2-add-sub-dual))
8564         (fr550 (unit u-media-4-add-sub-dual)))
8565   )
8566
8567 (define-pmacro (media-multiply-semantics conv arg1 arg2 res)
8568   (set res (mul DI (conv DI arg1) (conv DI arg2)))
8569 )
8570
8571 (define-pmacro (media-dual-multiply-semantics cond mode conv rhs1 rhs2)
8572   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8573       (if (register-unaligned ACC40Sk 2)
8574           (c-call VOID "@cpu@_media_acc_not_aligned")
8575           (if cond
8576               (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8577                         (extract-hilo FRinti 0 FRintj 0
8578                                       argihi argilo argjhi argjlo)
8579                         (media-multiply-semantics conv argihi rhs1 ACC40Sk)
8580                         (media-multiply-semantics conv argilo rhs2
8581                                                   (nextreg h-acc40S ACC40Sk 1))))))
8582 )
8583
8584 (define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment)
8585   (dni name
8586        (comment)
8587        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8588         (FR400-MAJOR M-1) (FR450-MAJOR M-3) PRESERVE-OVF)
8589        (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
8590        (+ pack ACC40Sk op FRinti ope FRintj)
8591        (media-dual-multiply-semantics 1 mode conv rhs1 rhs2)
8592        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8593         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8594   )
8595 )
8596
8597 (media-dual-multiply mmulhs  HI ext  argjhi argjlo OP_7B OPE1_14 "Media dual multiply signed")
8598 (media-dual-multiply mmulhu UHI zext argjhi argjlo OP_7B OPE1_15 "Media dual multiply unsigned")
8599
8600 (media-dual-multiply mmulxhs  HI ext  argjlo argjhi OP_7B OPE1_28 "Media dual cross multiply signed")
8601 (media-dual-multiply mmulxhu UHI zext argjlo argjhi OP_7B OPE1_29 "Media dual cross multiply unsigned")
8602
8603 (define-pmacro (conditional-media-dual-multiply
8604                 name mode conv rhs1 rhs2 op ope comment)
8605   (dni name
8606        (comment)
8607        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8608         (FR400-MAJOR M-1) (FR450-MAJOR M-3)
8609         PRESERVE-OVF CONDITIONAL)
8610        (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
8611        (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
8612        (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
8613        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8614         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8615   )
8616 )
8617
8618 (conditional-media-dual-multiply cmmulhs  HI ext  argjhi argjlo OP_72 OPE4_0 "Conditional Media dual multiply signed")
8619 (conditional-media-dual-multiply cmmulhu UHI zext argjhi argjlo OP_72 OPE4_1 "Conditional Media dual multiply unsigned")
8620
8621 (define-pmacro (media-quad-multiply-semantics cond mode conv rhs1 rhs2)
8622   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8623       (if (register-unaligned ACC40Sk 4)
8624           (c-call VOID "@cpu@_media_acc_not_aligned")
8625           (if (orif (register-unaligned FRintieven 2)
8626                     (register-unaligned FRintjeven 2))
8627               (c-call VOID "@cpu@_media_register_not_aligned")
8628               (if cond
8629                   (sequence ((mode argihi) (mode argilo)
8630                              (mode argjhi) (mode argjlo))
8631                             (extract-hilo FRintieven 0 FRintjeven 0
8632                                           argihi argilo argjhi argjlo)
8633                             (media-multiply-semantics conv argihi rhs1 ACC40Sk)
8634                             (media-multiply-semantics conv argilo rhs2
8635                                                       (nextreg h-acc40S ACC40Sk 1))
8636                             (extract-hilo FRintieven 1 FRintjeven 1
8637                                           argihi argilo argjhi argjlo)
8638                             (media-multiply-semantics conv argihi rhs1
8639                                                       (nextreg h-acc40S ACC40Sk 2))
8640                             (media-multiply-semantics conv argilo rhs2
8641                                                       (nextreg h-acc40S ACC40Sk 3)))))))
8642 )
8643
8644 (define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment)
8645   (dni name
8646        (comment)
8647        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8648         (FR400-MAJOR M-2) (FR450-MAJOR M-4) PRESERVE-OVF)
8649        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
8650        (+ pack ACC40Sk op FRintieven ope FRintjeven)
8651        (media-quad-multiply-semantics 1 mode conv rhs1 rhs2)
8652        ((fr400 (unit u-media-2-quad
8653                      (in  FRinti FRintieven)
8654                      (in  FRintj FRintjeven)))
8655         (fr450 (unit u-media-2-quad
8656                      (in  FRinti FRintieven)
8657                      (in  FRintj FRintjeven)))
8658         (fr500 (unit u-media-quad-mul
8659                      (in  FRinti FRintieven)
8660                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8661   )
8662 )
8663
8664 (media-quad-multiply mqmulhs  HI ext  argjhi argjlo OP_7B OPE1_1C "Media quad multiply signed")
8665 (media-quad-multiply mqmulhu UHI zext argjhi argjlo OP_7B OPE1_1D "Media quad multiply unsigned")
8666
8667 (media-quad-multiply mqmulxhs  HI ext  argjlo argjhi OP_7B OPE1_2A "Media quad cross multiply signed")
8668 (media-quad-multiply mqmulxhu UHI zext argjlo argjhi OP_7B OPE1_2B "Media quad cross multiply unsigned")
8669
8670 (define-pmacro (conditional-media-quad-multiply
8671                 name mode conv rhs1 rhs2 op ope comment)
8672   (dni name
8673        (comment)
8674        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8675         (FR400-MAJOR M-2) (FR450-MAJOR M-4)
8676         PRESERVE-OVF CONDITIONAL)
8677        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond")
8678        (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven)
8679        (media-quad-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
8680        ((fr400 (unit u-media-2-quad
8681                      (in  FRinti FRintieven)
8682                      (in  FRintj FRintjeven)))
8683         (fr450 (unit u-media-2-quad
8684                      (in  FRinti FRintieven)
8685                      (in  FRintj FRintjeven)))
8686         (fr500 (unit u-media-quad-mul
8687                      (in  FRinti FRintieven)
8688                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8689   )
8690 )
8691
8692 (conditional-media-quad-multiply cmqmulhs  HI ext  argjhi argjlo OP_74 OPE4_0 "Conditional Media quad multiply signed")
8693 (conditional-media-quad-multiply cmqmulhu UHI zext argjhi argjlo OP_74 OPE4_1 "Conditional Media quad multiply unsigned")
8694
8695 (define-pmacro (media-multiply-acc-semantics
8696                 conv arg1 addop arg2 res max min sie)
8697   (sequence ((DI tmp))
8698             (set tmp (addop res (mul DI (conv DI arg1) (conv DI arg2))))
8699             (saturate-v tmp max min sie res))
8700 )
8701
8702 (define-pmacro (media-dual-multiply-acc-semantics
8703                 cond mode conv addop rhw res max min)
8704   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8705       (if (register-unaligned res 2)
8706           (c-call VOID "@cpu@_media_acc_not_aligned")
8707           (if cond
8708               (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8709                         (extract-hilo FRinti 0 FRintj 0
8710                                       argihi argilo argjhi argjlo)
8711                         (media-multiply-acc-semantics conv argihi addop argjhi
8712                                                       res
8713                                                       max min (msr-sie-acci))
8714                         (media-multiply-acc-semantics conv argilo addop argjlo
8715                                                       (nextreg rhw res 1)
8716                                                       max min (msr-sie-acci-1))))))
8717 )
8718
8719 (define-pmacro (media-dual-multiply-acc
8720                 name mode conv addop rhw res max min op ope comment)
8721   (dni name
8722        (comment)
8723        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8724         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
8725        (.str name "$pack $FRinti,$FRintj,$" res)
8726        (+ pack res op FRinti ope FRintj)
8727        (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min)
8728        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8729         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8730   )
8731 )
8732
8733 (media-dual-multiply-acc mmachs HI ext add h-acc40S ACC40Sk
8734                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8735                          OP_7B OPE1_16
8736                          "Media dual multiply and accumulate signed")
8737
8738 (media-dual-multiply-acc mmachu UHI zext add h-acc40U ACC40Uk
8739                          (const DI #xffffffffff) (const DI 0)
8740                          OP_7B OPE1_17
8741                          "Media dual multiply and accumulate unsigned")
8742
8743 (media-dual-multiply-acc mmrdhs HI ext sub h-acc40S ACC40Sk
8744                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8745                          OP_7B OPE1_30
8746                          "Media dual multiply and reduce signed")
8747
8748 (media-dual-multiply-acc mmrdhu UHI zext sub h-acc40U ACC40Uk
8749                          (const DI #xffffffffff) (const DI 0)
8750                          OP_7B OPE1_31
8751                          "Media dual multiply and reduce unsigned")
8752
8753 (define-pmacro (conditional-media-dual-multiply-acc
8754                 name mode conv addop rhw res max min op ope comment)
8755   (dni name
8756        (comment)
8757        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8758         (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
8759        (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond")
8760        (+ pack res op FRinti CCi cond ope FRintj)
8761        (media-dual-multiply-acc-semantics (eq CCi (or cond 2))
8762                                           mode conv addop rhw res max min)
8763        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
8764         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
8765   )
8766 )
8767
8768 (conditional-media-dual-multiply-acc cmmachs HI ext add h-acc40S ACC40Sk
8769                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8770                          OP_72 OPE4_2
8771                          "Conditional Media dual multiply and accumulate signed")
8772
8773 (conditional-media-dual-multiply-acc cmmachu UHI zext add  h-acc40U ACC40Uk
8774                          (const DI #xffffffffff) (const DI 0)
8775                          OP_72 OPE4_3
8776                          "Conditional Media dual multiply and accumulate unsigned")
8777
8778 (define-pmacro (media-quad-multiply-acc-semantics
8779                 cond mode conv addop rhw res max min)
8780   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8781       (if (register-unaligned res 4)
8782           (c-call VOID "@cpu@_media_acc_not_aligned")
8783           (if (orif (register-unaligned FRintieven 2)
8784                     (register-unaligned FRintjeven 2))
8785               (c-call VOID "@cpu@_media_register_not_aligned")
8786               (if cond
8787                   (sequence ((mode argihi) (mode argilo)
8788                              (mode argjhi) (mode argjlo))
8789                             (extract-hilo FRintieven 0 FRintjeven 0
8790                                           argihi argilo argjhi argjlo)
8791                             (media-multiply-acc-semantics conv argihi addop argjhi
8792                                                           res
8793                                                           max min (msr-sie-acci))
8794                             (media-multiply-acc-semantics conv argilo addop argjlo
8795                                                           (nextreg rhw res 1)
8796                                                           max min (msr-sie-acci-1))
8797                             (extract-hilo FRintieven 1 FRintjeven 1
8798                                           argihi argilo argjhi argjlo)
8799                             (media-multiply-acc-semantics conv argihi addop argjhi
8800                                                           (nextreg rhw res 2)
8801                                                           max min (msr-sie-acci-2))
8802                             (media-multiply-acc-semantics conv argilo addop argjlo
8803                                                           (nextreg rhw res 3)
8804                                                           max min
8805                                                           (msr-sie-acci-3)))))))
8806 )
8807
8808 (define-pmacro (media-quad-multiply-acc
8809                 name mode conv addop rhw res max min op ope comment)
8810   (dni name
8811        (comment)
8812        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8813         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8814        (.str name "$pack $FRintieven,$FRintjeven,$" res)
8815        (+ pack res op FRintieven ope FRintjeven)
8816        (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min)
8817        ((fr400 (unit u-media-2-quad
8818                      (in  FRinti FRintieven)
8819                      (in  FRintj FRintjeven)))
8820         (fr450 (unit u-media-2-quad
8821                      (in  FRinti FRintieven)
8822                      (in  FRintj FRintjeven)))
8823         (fr500 (unit u-media-quad-mul
8824                      (in  FRinti FRintieven)
8825                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8826   )
8827 )
8828
8829 (media-quad-multiply-acc mqmachs HI ext add h-acc40S ACC40Sk
8830                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8831                          OP_7B OPE1_1E
8832                          "Media quad multiply and accumulate signed")
8833
8834 (media-quad-multiply-acc mqmachu UHI zext add h-acc40U ACC40Uk
8835                          (const DI #xffffffffff) (const DI 0)
8836                          OP_7B OPE1_1F
8837                          "Media quad multiply and accumulate unsigned")
8838
8839 (define-pmacro (conditional-media-quad-multiply-acc
8840                 name mode conv addop rhw res max min op ope comment)
8841   (dni name
8842        (comment)
8843        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
8844         (FR400-MAJOR M-2) (FR450-MAJOR M-4) CONDITIONAL)
8845        (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond")
8846        (+ pack res op FRintieven CCi cond ope FRintjeven)
8847        (media-quad-multiply-acc-semantics (eq CCi (or cond 2))
8848                                           mode conv addop rhw res max min)
8849        ((fr400 (unit u-media-2-quad
8850                      (in  FRinti FRintieven)
8851                      (in  FRintj FRintjeven)))
8852         (fr450 (unit u-media-2-quad
8853                      (in  FRinti FRintieven)
8854                      (in  FRintj FRintjeven)))
8855         (fr500 (unit u-media-quad-mul
8856                      (in  FRinti FRintieven)
8857                      (in  FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
8858   )
8859 )
8860
8861 (conditional-media-quad-multiply-acc cmqmachs HI ext add h-acc40S ACC40Sk
8862                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8863                          OP_74 OPE4_2
8864                          "Conditional Media quad multiply and accumulate signed")
8865
8866 (conditional-media-quad-multiply-acc cmqmachu UHI zext add h-acc40U ACC40Uk
8867                          (const DI #xffffffffff) (const DI 0)
8868                          OP_74 OPE4_3
8869                          "Conditional media quad multiply and accumulate unsigned")
8870
8871 (define-pmacro (media-quad-multiply-cross-acc-semantics
8872                 cond mode conv addop rhw res max min)
8873   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8874       (if (register-unaligned res 4)
8875           (c-call VOID "@cpu@_media_acc_not_aligned")
8876           (if (orif (register-unaligned FRintieven 2)
8877                     (register-unaligned FRintjeven 2))
8878               (c-call VOID "@cpu@_media_register_not_aligned")
8879               (if cond
8880                   (sequence ((mode argihi) (mode argilo)
8881                              (mode argjhi) (mode argjlo))
8882                             (extract-hilo FRintieven 0 FRintjeven 0
8883                                           argihi argilo argjhi argjlo)
8884                             (media-multiply-acc-semantics conv argihi addop argjhi
8885                                                           (nextreg rhw res 2)
8886                                                           max min (msr-sie-acci-2))
8887                             (media-multiply-acc-semantics conv argilo addop argjlo
8888                                                           (nextreg rhw res 3)
8889                                                           max min (msr-sie-acci-3))
8890                             (extract-hilo FRintieven 1 FRintjeven 1
8891                                           argihi argilo argjhi argjlo)
8892                             (media-multiply-acc-semantics conv argihi addop argjhi
8893                                                           res
8894                                                           max min (msr-sie-acci))
8895                             (media-multiply-acc-semantics conv argilo addop argjlo
8896                                                           (nextreg rhw res 1)
8897                                                           max min
8898                                                           (msr-sie-acci-1)))))))
8899 )
8900
8901 (define-pmacro (media-quad-multiply-cross-acc
8902                 name mode conv addop rhw res max min op ope comment)
8903   (dni name
8904        (comment)
8905        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8906         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8907        (.str name "$pack $FRintieven,$FRintjeven,$" res)
8908        (+ pack res op FRintieven ope FRintjeven)
8909        (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res
8910                                                 max min)
8911        ((fr400 (unit u-media-2-quad
8912                      (in  FRinti FRintieven)
8913                      (in  FRintj FRintjeven)))
8914         (fr450 (unit u-media-2-quad
8915                      (in  FRinti FRintieven)
8916                      (in  FRintj FRintjeven)))
8917         (fr550 (unit u-media-4-quad)))
8918   )
8919 )
8920
8921 (media-quad-multiply-cross-acc mqxmachs HI ext add h-acc40S ACC40Sk
8922                          (const DI #x7fffffffff) (const DI #xffffff8000000000)
8923                          OP_78 OPE1_00
8924                          "Media quad multiply and cross accumulate signed")
8925
8926 (define-pmacro (media-quad-cross-multiply-cross-acc-semantics
8927                 cond mode conv addop rhw res max min)
8928   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8929       (if (register-unaligned res 4)
8930           (c-call VOID "@cpu@_media_acc_not_aligned")
8931           (if (orif (register-unaligned FRintieven 2)
8932                     (register-unaligned FRintjeven 2))
8933               (c-call VOID "@cpu@_media_register_not_aligned")
8934               (if cond
8935                   (sequence ((mode argihi) (mode argilo)
8936                              (mode argjhi) (mode argjlo))
8937                             (extract-hilo FRintieven 0 FRintjeven 0
8938                                           argihi argilo argjhi argjlo)
8939                             (media-multiply-acc-semantics conv argihi addop argjlo
8940                                                           (nextreg rhw res 2)
8941                                                           max min (msr-sie-acci-2))
8942                             (media-multiply-acc-semantics conv argilo addop argjhi
8943                                                           (nextreg rhw res 3)
8944                                                           max min (msr-sie-acci-3))
8945                             (extract-hilo FRintieven 1 FRintjeven 1
8946                                           argihi argilo argjhi argjlo)
8947                             (media-multiply-acc-semantics conv argihi addop argjlo
8948                                                           res
8949                                                           max min (msr-sie-acci))
8950                             (media-multiply-acc-semantics conv argilo addop argjhi
8951                                                           (nextreg rhw res 1)
8952                                                           max min
8953                                                           (msr-sie-acci-1)))))))
8954 )
8955
8956 (define-pmacro (media-quad-cross-multiply-cross-acc
8957                 name mode conv addop rhw res max min op ope comment)
8958   (dni name
8959        (comment)
8960        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
8961         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
8962        (.str name "$pack $FRintieven,$FRintjeven,$" res)
8963        (+ pack res op FRintieven ope FRintjeven)
8964        (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res
8965                                                       max min)
8966        ((fr400 (unit u-media-2-quad
8967                      (in  FRinti FRintieven)
8968                      (in  FRintj FRintjeven)))
8969         (fr450 (unit u-media-2-quad
8970                      (in  FRinti FRintieven)
8971                      (in  FRintj FRintjeven)))
8972         (fr550 (unit u-media-4-quad)))
8973   )
8974 )
8975
8976 (media-quad-cross-multiply-cross-acc mqxmacxhs HI ext add h-acc40S ACC40Sk
8977                         (const DI #x7fffffffff) (const DI #xffffff8000000000)
8978                         OP_78 OPE1_01
8979                         "Media quad cross multiply and cross accumulate signed")
8980
8981 (define-pmacro (media-quad-cross-multiply-acc-semantics
8982                 cond mode conv addop rhw res max min)
8983   (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8984       (if (register-unaligned res 4)
8985           (c-call VOID "@cpu@_media_acc_not_aligned")
8986           (if (orif (register-unaligned FRintieven 2)
8987                     (register-unaligned FRintjeven 2))
8988               (c-call VOID "@cpu@_media_register_not_aligned")
8989               (if cond
8990                   (sequence ((mode argihi) (mode argilo)
8991                              (mode argjhi) (mode argjlo))
8992                             (extract-hilo FRintieven 0 FRintjeven 0
8993                                           argihi argilo argjhi argjlo)
8994                             (media-multiply-acc-semantics conv argihi addop argjlo
8995                                                           res
8996                                                           max min (msr-sie-acci))
8997                             (media-multiply-acc-semantics conv argilo addop argjhi
8998                                                           (nextreg rhw res 1)
8999                                                           max min (msr-sie-acci-1))
9000                             (extract-hilo FRintieven 1 FRintjeven 1
9001                                           argihi argilo argjhi argjlo)
9002                             (media-multiply-acc-semantics conv argihi addop argjlo
9003                                                           (nextreg rhw res 2)
9004                                                           max min (msr-sie-acci-2))
9005                             (media-multiply-acc-semantics conv argilo addop argjhi
9006                                                           (nextreg rhw res 3)
9007                                                           max min
9008                                                           (msr-sie-acci-3)))))))
9009 )
9010
9011 (define-pmacro (media-quad-cross-multiply-acc
9012                 name mode conv addop rhw res max min op ope comment)
9013   (dni name
9014        (comment)
9015        ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
9016         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9017        (.str name "$pack $FRintieven,$FRintjeven,$" res)
9018        (+ pack res op FRintieven ope FRintjeven)
9019        (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res
9020                                                 max min)
9021        ((fr400 (unit u-media-2-quad
9022                      (in FRinti FRintieven)
9023                      (in FRintj FRintjeven)))
9024         (fr450 (unit u-media-2-quad
9025                      (in FRinti FRintieven)
9026                      (in FRintj FRintjeven)))
9027         (fr550 (unit u-media-4-quad)))
9028   )
9029 )
9030
9031 (media-quad-cross-multiply-acc mqmacxhs HI ext add h-acc40S ACC40Sk
9032                         (const DI #x7fffffffff) (const DI #xffffff8000000000)
9033                         OP_78 OPE1_02
9034                         "Media quad cross multiply and accumulate signed")
9035
9036 (define-pmacro (media-complex-semantics
9037                 conv lhs1 rhs1 lhs2 rhs2 res max min sie)
9038   (sequence ((DI tmp1) (DI tmp2))
9039             (media-multiply-semantics conv lhs1 rhs1 tmp1)
9040             (media-multiply-semantics conv lhs2 rhs2 tmp2)
9041             (set tmp1 (sub tmp1 tmp2))
9042             (saturate-v tmp1 max min sie res))
9043 )
9044
9045 (define-pmacro (media-complex-semantics-i
9046                 conv lhs1 rhs1 lhs2 rhs2 res max min sie)
9047   (sequence ((DI tmp1) (DI tmp2))
9048             (media-multiply-semantics conv lhs1 rhs1 tmp1)
9049             (media-multiply-semantics conv lhs2 rhs2 tmp2)
9050             (set tmp1 (add tmp1 tmp2))
9051             (saturate-v tmp1 max min sie res))
9052 )
9053
9054 (define-pmacro (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
9055   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9056       (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
9057                 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
9058                 (media-complex-semantics conv argihi rhs1 argilo rhs2 ACC40Sk
9059                                          max min (msr-sie-acci))))
9060 )
9061
9062 (define-pmacro (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
9063   (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9064       (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
9065                 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
9066                 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 ACC40Sk
9067                                            max min (msr-sie-acci))))
9068 )
9069
9070 (define-pmacro (media-dual-complex
9071                 name mode conv rhs1 rhs2 max min op ope comment)
9072   (dni name
9073        (comment)
9074        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9075         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9076        (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
9077        (+ pack ACC40Sk op FRinti ope FRintj)
9078        (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
9079        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9080         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9081   )
9082 )
9083
9084 (define-pmacro (media-dual-complex-i
9085                 name mode conv rhs1 rhs2 max min op ope comment)
9086   (dni name
9087        (comment)
9088        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9089         (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9090        (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
9091        (+ pack ACC40Sk op FRinti ope FRintj)
9092        (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
9093        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9094         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9095   )
9096 )
9097
9098 (media-dual-complex mcpxrs HI ext argjhi argjlo
9099                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9100                     OP_7B OPE1_20
9101                     "Media dual complex real signed with saturation")
9102
9103 (media-dual-complex mcpxru UHI zext argjhi argjlo
9104                     (const DI #xffffffffff) (const DI 0)
9105                     OP_7B OPE1_21
9106                     "Media dual complex real unsigned with saturation")
9107
9108 (media-dual-complex-i mcpxis HI ext argjlo argjhi
9109                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9110                     OP_7B OPE1_22
9111                     "Media dual complex imaginary signed with saturation")
9112
9113 (media-dual-complex-i mcpxiu UHI zext argjlo argjhi
9114                     (const DI #xffffffffff) (const DI 0)
9115                     OP_7B OPE1_23
9116                     "Media dual complex imaginary unsigned with saturation")
9117
9118 (define-pmacro (conditional-media-dual-complex
9119                 name mode conv rhs1 rhs2 max min op ope comment)
9120   (dni name
9121        (comment)
9122        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9123         (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
9124        (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
9125        (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
9126        (if (eq CCi (or cond 2))
9127            (media-dual-complex-semantics mode conv rhs1 rhs2 max min))
9128        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9129         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9130   )
9131 )
9132
9133 (define-pmacro (conditional-media-dual-complex-i
9134                 name mode conv rhs1 rhs2 max min op ope comment)
9135   (dni name
9136        (comment)
9137        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9138         (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
9139        (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
9140        (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
9141        (if (eq CCi (or cond 2))
9142            (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min))
9143        ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
9144         (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9145   )
9146 )
9147
9148 (conditional-media-dual-complex cmcpxrs HI ext argjhi argjlo
9149                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9150                     OP_75 OPE4_0
9151                     "Conditional Media dual complex real signed with saturation")
9152
9153 (conditional-media-dual-complex cmcpxru UHI zext argjhi argjlo
9154                     (const DI #xffffffffff) (const DI 0)
9155                     OP_75 OPE4_1
9156                     "Conditional Media dual complex real unsigned with saturation")
9157
9158 (conditional-media-dual-complex-i cmcpxis HI ext argjlo argjhi
9159                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9160                     OP_75 OPE4_2
9161                     "Conditional Media dual complex imaginary signed with saturation")
9162
9163 (conditional-media-dual-complex-i cmcpxiu UHI zext argjlo argjhi
9164                     (const DI #xffffffffff) (const DI 0)
9165                     OP_75 OPE4_3
9166                     "Conditional Media dual complex imaginary unsigned with saturation")
9167
9168 (define-pmacro (media-quad-complex
9169                 name mode conv rhs1 rhs2 max min op ope comment)
9170   (dni name
9171        (comment)
9172        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9173         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9174        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
9175        (+ pack ACC40Sk op FRintieven ope FRintjeven)
9176        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9177            (if (register-unaligned ACC40Sk 2)
9178                (c-call VOID "@cpu@_media_acc_not_aligned")
9179                (if (orif (register-unaligned FRintieven 2)
9180                          (register-unaligned FRintjeven 2))
9181                    (c-call VOID "@cpu@_media_register_not_aligned")
9182                    (sequence ((mode argihi) (mode argilo)
9183                               (mode argjhi) (mode argjlo))
9184                              (extract-hilo FRintieven 0 FRintjeven 0
9185                                            argihi argilo argjhi argjlo)
9186                              (media-complex-semantics conv argihi rhs1 argilo rhs2
9187                                                       ACC40Sk
9188                                                       max min (msr-sie-acci))
9189                              (extract-hilo FRintieven 1 FRintjeven 1
9190                                            argihi argilo argjhi argjlo)
9191                              (media-complex-semantics conv argihi rhs1 argilo rhs2
9192                                                       (nextreg h-acc40S ACC40Sk 1)
9193                                                       max min (msr-sie-acci-1))))))
9194        ((fr400 (unit u-media-2-quad
9195                      (in FRinti FRintieven)
9196                      (in FRintj FRintjeven)))
9197         (fr450 (unit u-media-2-quad
9198                      (in FRinti FRintieven)
9199                      (in FRintj FRintjeven)))
9200         (fr500 (unit u-media-quad-complex
9201                      (in FRinti FRintieven)
9202                      (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9203   )
9204 )
9205
9206 (define-pmacro (media-quad-complex-i
9207                 name mode conv rhs1 rhs2 max min op ope comment)
9208   (dni name
9209        (comment)
9210        ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
9211         (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9212        (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
9213        (+ pack ACC40Sk op FRintieven ope FRintjeven)
9214        (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
9215            (if (register-unaligned ACC40Sk 2)
9216                (c-call VOID "@cpu@_media_acc_not_aligned")
9217                (if (orif (register-unaligned FRintieven 2)
9218                          (register-unaligned FRintjeven 2))
9219                    (c-call VOID "@cpu@_media_register_not_aligned")
9220                    (sequence ((mode argihi) (mode argilo)
9221                               (mode argjhi) (mode argjlo))
9222                              (extract-hilo FRintieven 0 FRintjeven 0
9223                                            argihi argilo argjhi argjlo)
9224                              (media-complex-semantics-i conv argihi rhs1 argilo rhs2
9225                                                         ACC40Sk
9226                                                         max min (msr-sie-acci))
9227                              (extract-hilo FRintieven 1 FRintjeven 1
9228                                            argihi argilo argjhi argjlo)
9229                              (media-complex-semantics-i conv argihi rhs1 argilo rhs2
9230                                                         (nextreg h-acc40S ACC40Sk 1)
9231                                                         max min (msr-sie-acci-1))))))
9232        ((fr400 (unit u-media-2-quad
9233                      (in FRinti FRintieven)
9234                      (in FRintj FRintjeven)))
9235         (fr450 (unit u-media-2-quad
9236                      (in FRinti FRintieven)
9237                      (in FRintj FRintjeven)))
9238         (fr500 (unit u-media-quad-complex
9239                      (in FRinti FRintieven)
9240                      (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9241   )
9242 )
9243
9244 (media-quad-complex mqcpxrs HI ext argjhi argjlo
9245                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9246                     OP_7B OPE1_24
9247                     "Media quad complex real signed with saturation")
9248
9249 (media-quad-complex mqcpxru UHI zext argjhi argjlo
9250                     (const DI #xffffffffff) (const DI 0)
9251                     OP_7B OPE1_25
9252                     "Media quad complex real unsigned with saturation")
9253
9254 (media-quad-complex-i mqcpxis HI ext argjlo argjhi
9255                     (const DI #x7fffffffff) (const DI #xffffff8000000000)
9256                     OP_7B OPE1_26
9257                     "Media quad complex imaginary signed with saturation")
9258
9259 (media-quad-complex-i mqcpxiu UHI zext argjlo argjhi
9260                     (const DI #xffffffffff) (const DI 0)
9261                     OP_7B OPE1_27
9262                     "Media quad complex imaginary unsigned with saturation")
9263
9264 (define-pmacro (media-pack src1 src2 targ offset)
9265   (sequence ()
9266             (set (halfword hi targ offset) (halfword lo src1 offset))
9267             (set (halfword lo targ offset) (halfword lo src2 offset)))
9268 )
9269
9270 (define-pmacro (media-expand-halfword-to-word-semantics cond)
9271   (if cond
9272       (sequence ((UHI tmp))
9273                 (if (and u6 1)
9274                     (set tmp (halfword lo FRinti 0))
9275                     (set tmp (halfword hi FRinti 0)))
9276                 (set (halfword hi FRintk 0) tmp)
9277                 (set (halfword lo FRintk 0) tmp)))
9278 )
9279
9280 (dni mexpdhw
9281      "Media expand halfword to word"
9282      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9283       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
9284      "mexpdhw$pack $FRinti,$u6,$FRintk"
9285      (+ pack FRintk OP_7B FRinti OPE1_32 u6)
9286      (media-expand-halfword-to-word-semantics 1)
9287      ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
9288       (fr500 (unit u-media)) (fr550 (unit u-media)))
9289 )
9290
9291 (dni cmexpdhw
9292      "Conditional media expand halfword to word"
9293      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9294       (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
9295      "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond"
9296      (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6)
9297      (media-expand-halfword-to-word-semantics (eq CCi (or cond 2)))
9298      ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
9299       (fr500 (unit u-media)) (fr550 (unit u-media)))
9300 )
9301
9302 (define-pmacro (media-expand-halfword-to-double-semantics cond)
9303   (if (register-unaligned FRintkeven 2)
9304       (c-call VOID "@cpu@_media_register_not_aligned")
9305       (if cond
9306           (sequence ((UHI tmp))
9307                     ; a hack to get FRintkeven referenced for profiling
9308                     (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9309                     (if (and u6 1)
9310                         (set tmp (halfword lo FRinti 0))
9311                         (set tmp (halfword hi FRinti 0)))
9312                     (set (halfword hi FRintkeven 0) tmp)
9313                     (set (halfword lo FRintkeven 0) tmp)
9314                     (set (halfword hi FRintkeven 1) tmp)
9315                     (set (halfword lo FRintkeven 1) tmp))))
9316 )
9317
9318 (dni mexpdhd
9319      "Media expand halfword to double"
9320      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9321       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9322      "mexpdhd$pack $FRinti,$u6,$FRintkeven"
9323      (+ pack FRintkeven OP_7B FRinti OPE1_33 u6)
9324      (media-expand-halfword-to-double-semantics 1)
9325      ((fr400 (unit u-media-dual-expand
9326                    (out FRintk FRintkeven)))
9327       (fr450 (unit u-media-dual-expand
9328                    (out FRintk FRintkeven)))
9329       (fr500 (unit u-media-dual-expand
9330                    (out FRintk FRintkeven)))
9331       (fr550 (unit u-media-dual-expand)))
9332 )
9333
9334 (dni cmexpdhd
9335      "Conditional media expand halfword to double"
9336      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9337       (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
9338      "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond"
9339      (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6)
9340      (media-expand-halfword-to-double-semantics (eq CCi (or cond 2)))
9341      ((fr400 (unit u-media-dual-expand
9342                    (out FRintk FRintkeven)))
9343       (fr450 (unit u-media-dual-expand
9344                    (out FRintk FRintkeven)))
9345       (fr500 (unit u-media-dual-expand
9346                    (out FRintk FRintkeven)))
9347       (fr550 (unit u-media-dual-expand)))
9348 )
9349
9350 (dni mpackh
9351      "Media halfword pack"
9352      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9353       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
9354      "mpackh$pack $FRinti,$FRintj,$FRintk"
9355      (+ pack FRintk OP_7B FRinti OPE1_34 FRintj)
9356      (media-pack FRinti FRintj FRintk 0)
9357      ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
9358       (fr500 (unit u-media)) (fr550 (unit u-media)))
9359 )
9360
9361 (dni mdpackh
9362      "Media dual pack"
9363      ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3)
9364       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9365      "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven"
9366      (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven)
9367      (if (orif (register-unaligned FRintieven 2)
9368                (orif (register-unaligned FRintjeven 2)
9369                      (register-unaligned FRintkeven 2)))
9370          (c-call VOID "@cpu@_media_register_not_aligned")
9371          (sequence ()
9372                    ; hack to get these referenced for profiling
9373                    (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
9374                    (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9375                    (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9376                    (media-pack FRintieven FRintjeven FRintkeven 0)
9377                    (media-pack FRintieven FRintjeven FRintkeven 1)))
9378      ((fr400 (unit u-media-3-quad
9379                    (in  FRinti FRintieven)
9380                    (in  FRintj FRintjeven)
9381                    (out FRintk FRintkeven)))
9382       (fr450 (unit u-media-3-quad
9383                    (in  FRinti FRintieven)
9384                    (in  FRintj FRintjeven)
9385                    (out FRintk FRintkeven)))
9386       (fr500 (unit u-media-quad-arith
9387                    (in  FRinti FRintieven)
9388                    (in  FRintj FRintjeven)
9389                    (out FRintk FRintkeven)))
9390       (fr550 (unit u-media-quad)))
9391 )
9392
9393 (define-pmacro (media-unpack src soff targ toff)
9394   (sequence ()
9395             (set (halfword hi targ toff) (halfword hi src soff))
9396             (set (halfword lo targ toff) (halfword hi src soff))
9397             (set (halfword hi targ (add toff 1)) (halfword lo src soff))
9398             (set (halfword lo targ (add toff 1)) (halfword lo src soff)))
9399 )
9400
9401 (dni munpackh
9402      "Media halfword unpack"
9403      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9404       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9405      "munpackh$pack $FRinti,$FRintkeven"
9406      (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null))
9407      (if (register-unaligned FRintkeven 2)
9408          (c-call VOID "@cpu@_media_register_not_aligned")
9409          (sequence ()
9410                    ; hack to get these referenced for profiling
9411                    (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
9412                    (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9413                    (media-unpack FRinti 0 FRintkeven 0)))
9414      ((fr400 (unit u-media-dual-expand
9415                    (out FRintk FRintkeven)))
9416       (fr450 (unit u-media-dual-expand
9417                    (out FRintk FRintkeven)))
9418       (fr500 (unit u-media-dual-expand
9419                    (out FRintk FRintkeven)))
9420       (fr550 (unit u-media-dual-expand)))
9421 )
9422
9423 (dni mdunpackh
9424      "Media dual unpack"
9425      ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
9426      "mdunpackh$pack $FRintieven,$FRintk"
9427      (+ pack FRintk OP_7B FRintieven OPE1_37 (FRj-null))
9428      (if (orif (register-unaligned FRintieven 2) (register-unaligned FRintk 4))
9429          (c-call VOID "@cpu@_media_register_not_aligned")
9430          (sequence ()
9431                    ; hack to get these referenced for profiling
9432                    (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
9433                    (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9434                    (media-unpack FRintieven 0 FRintk 0)
9435                    (media-unpack FRintieven 1 FRintk 2)))
9436      ((fr500 (unit u-media-dual-unpack
9437                    (in FRinti FRintieven))))
9438 )
9439
9440 (define-pmacro (ubyte num arg offset)
9441   (reg (.sym h-fr_ num) (add (index-of arg) offset)))
9442
9443 (define-pmacro (mbtoh-semantics cond)
9444   (if (register-unaligned FRintkeven 2)
9445       (c-call VOID "@cpu@_media_register_not_aligned")
9446       (if cond
9447           (sequence ()
9448                     (set (halfword hi FRintkeven 0) (ubyte 3 FRintj 0))
9449                     (set (halfword lo FRintkeven 0) (ubyte 2 FRintj 0))
9450                     (set (halfword hi FRintkeven 1) (ubyte 1 FRintj 0))
9451                     (set (halfword lo FRintkeven 1) (ubyte 0 FRintj 0)))))
9452 )
9453
9454 (dni mbtoh
9455      "Media convert byte to halfword"
9456      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9457       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9458      "mbtoh$pack $FRintj,$FRintkeven"
9459      (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj)
9460      (sequence ()
9461                ; hack to get these referenced for profiling
9462                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9463                (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9464                (mbtoh-semantics 1))
9465      ((fr400 (unit u-media-dual-expand
9466                    (out FRintk FRintkeven)))
9467       (fr450 (unit u-media-dual-expand
9468                    (out FRintk FRintkeven)))
9469       (fr500 (unit u-media-dual-btoh
9470                    (out FRintk FRintkeven)))
9471       (fr550 (unit u-media-dual-expand)))
9472 )
9473
9474 (dni cmbtoh
9475      "Conditional media convert byte to halfword"
9476      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9477       (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
9478      "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond"
9479      (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj)
9480      (sequence ()
9481                ; hack to get these referenced for profiling
9482                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9483                (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9484                (mbtoh-semantics (eq CCi (or cond 2))))
9485      ((fr400 (unit u-media-dual-expand
9486                    (out FRintk FRintkeven)))
9487       (fr450 (unit u-media-dual-expand
9488                    (out FRintk FRintkeven)))
9489       (fr500 (unit u-media-dual-btoh
9490                    (out FRintk FRintkeven)))
9491       (fr550 (unit u-media-dual-expand
9492                    (in FRinti FRintj))))
9493 )
9494
9495 (define-pmacro (mhtob-semantics cond)
9496   (if (register-unaligned FRintjeven 2)
9497       (c-call VOID "@cpu@_media_register_not_aligned")
9498       (if cond
9499           (sequence ()
9500                     (set (ubyte 3 FRintk 0) (halfword hi FRintjeven 0))
9501                     (set (ubyte 2 FRintk 0) (halfword lo FRintjeven 0))
9502                     (set (ubyte 1 FRintk 0) (halfword hi FRintjeven 1))
9503                     (set (ubyte 0 FRintk 0) (halfword lo FRintjeven 1)))))
9504 )
9505
9506 (dni mhtob
9507      "Media convert halfword to byte"
9508      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9509       (FR400-MAJOR M-2) (FR450-MAJOR M-2))
9510      "mhtob$pack $FRintjeven,$FRintk"
9511      (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven)
9512      (sequence ()
9513                ; hack to get these referenced for profiling
9514                (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9515                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9516                (mhtob-semantics 1))
9517      ((fr400 (unit u-media-dual-htob
9518                    (in FRintj FRintjeven)))
9519       (fr450 (unit u-media-dual-htob
9520                    (in FRintj FRintjeven)))
9521       (fr500 (unit u-media-dual-htob
9522                    (in FRintj FRintjeven)))
9523       (fr550 (unit u-media-3-dual
9524                    (in FRinti FRintjeven))))
9525 )
9526
9527 (dni cmhtob
9528      "Conditional media convert halfword to byte"
9529      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9530       (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
9531      "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond"
9532      (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven)
9533      (sequence ()
9534                ; hack to get these referenced for profiling
9535                (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9536                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9537                (mhtob-semantics (eq CCi (or cond 2))))
9538      ((fr400 (unit u-media-dual-htob
9539                    (in FRintj FRintjeven)))
9540       (fr450 (unit u-media-dual-htob
9541                    (in FRintj FRintjeven)))
9542       (fr500 (unit u-media-dual-htob
9543                    (in FRintj FRintjeven)))
9544       (fr550 (unit u-media-3-dual
9545                    (in FRinti FRintjeven))))
9546 )
9547
9548 (define-pmacro (mbtohe-semantics cond)
9549   (if (register-unaligned FRintk 4)
9550       (c-call VOID "@cpu@_media_register_not_aligned")
9551       (if cond
9552           (sequence ()
9553                     (set (halfword hi FRintk 0) (ubyte 3 FRintj 0))
9554                     (set (halfword lo FRintk 0) (ubyte 3 FRintj 0))
9555                     (set (halfword hi FRintk 1) (ubyte 2 FRintj 0))
9556                     (set (halfword lo FRintk 1) (ubyte 2 FRintj 0))
9557                     (set (halfword hi FRintk 2) (ubyte 1 FRintj 0))
9558                     (set (halfword lo FRintk 2) (ubyte 1 FRintj 0))
9559                     (set (halfword hi FRintk 3) (ubyte 0 FRintj 0))
9560                     (set (halfword lo FRintk 3) (ubyte 0 FRintj 0)))))
9561 )
9562
9563 (dni mbtohe
9564      "Media convert byte to halfword extended"
9565      ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
9566      "mbtohe$pack $FRintj,$FRintk"
9567      (+ pack FRintk OP_7B (FRi-null) OPE1_3A FRintj)
9568      (sequence ()
9569                ; hack to get these referenced for profiling
9570                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9571                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9572                (mbtohe-semantics 1))
9573      ((fr500 (unit u-media-dual-btohe)))
9574 )
9575
9576 (dni cmbtohe
9577      "Conditional media convert byte to halfword extended"
9578      ((UNIT FM01) (FR500-MAJOR M-7) CONDITIONAL (MACH simple,tomcat,frv))
9579      "cmbtohe$pack $FRintj,$FRintk,$CCi,$cond"
9580      (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_2 FRintj)
9581      (sequence ()
9582                ; hack to get these referenced for profiling
9583                (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
9584                (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
9585                (mbtohe-semantics (eq CCi (or cond 2))))
9586      ((fr500 (unit u-media-dual-btohe)))
9587 )
9588
9589 ; Media NOP
9590 ; A special case of mclracc
9591 (dni mnop "Media nop"
9592      ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1)
9593       (FR400-MAJOR M-1) (FR450-MAJOR M-1))
9594      "mnop$pack"
9595      (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
9596      (nop)
9597      ()
9598 )
9599
9600 ; mclracc with #A==0
9601 (dni mclracc-0
9602      "Media clear accumulator(s)"
9603      ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
9604       (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9605      "mclracc$pack $ACC40Sk,$A0"
9606      (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null))
9607      (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0)
9608      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
9609       (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
9610 )
9611
9612 ; mclracc with #A==1
9613 (dni mclracc-1
9614      "Media clear accumulator(s)"
9615      ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3)
9616       (FR400-MAJOR M-2) (FR450-MAJOR M-4))
9617      "mclracc$pack $ACC40Sk,$A1"
9618      (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
9619      (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1)
9620      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4-mclracca))
9621       (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
9622 )
9623
9624 (dni mrdacc
9625      "Media read accumulator"
9626      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9627       (FR400-MAJOR M-1) (FR450-MAJOR M-5))
9628      "mrdacc$pack $ACC40Si,$FRintk"
9629      (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null))
9630      (set FRintk ACC40Si)
9631      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
9632       (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
9633 )
9634
9635 (dni mrdaccg
9636      "Media read accumulator guard"
9637      ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
9638       (FR400-MAJOR M-1) (FR450-MAJOR M-5))
9639      "mrdaccg$pack $ACCGi,$FRintk"
9640      (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null))
9641      (set FRintk ACCGi)
9642      ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg))
9643       (fr500 (unit u-media)) (fr550 (unit u-media-3-acc (in ACC40Si ACCGi))))
9644 )
9645
9646 (dni mwtacc
9647      "Media write accumulator"
9648      ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
9649       (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9650      "mwtacc$pack $FRinti,$ACC40Sk"
9651      (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null))
9652      (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000))
9653                      FRinti))
9654      ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
9655       (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc)))
9656 )
9657
9658 (dni mwtaccg
9659      "Media write accumulator guard"
9660      ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
9661       (FR400-MAJOR M-1) (FR450-MAJOR M-3))
9662      "mwtaccg$pack $FRinti,$ACCGk"
9663      (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null))
9664      (sequence ()
9665                ; hack to get these referenced for profiling
9666                (c-raw-call VOID "frv_ref_SI" ACCGk)
9667                (set ACCGk FRinti))
9668      ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg))
9669       (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc (in ACC40Sk ACCGk))))
9670 )
9671
9672 (define-pmacro (media-cop num op)
9673   (dni (.sym mcop num)
9674        "Media custom instruction"
9675        ((UNIT FM01) (FR500-MAJOR M-1) (MACH frv))
9676        (.str "mcop" num "$pack $FRi,$FRj,$FRk")
9677        (+ pack FRk op FRi OPE1_00 FRj)
9678        (c-call VOID "@cpu@_media_cop" num)
9679        ()
9680   )
9681 )
9682
9683 (media-cop 1 OP_7C)
9684 (media-cop 2 OP_7D)
9685
9686 ; nop
9687 ; A nop is defined to be a "ori gr0,0,gr0"
9688 ; This needn't be a macro-insn, but making it one greatly simplifies decode.c
9689 ; On the other hand spending a little time in the decoder is often worth it.
9690 ;
9691 (dnmi nop "nop"
9692      ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9693      "nop$pack"
9694      (emit ori pack (GRi 0) (s12 0) (GRk 0))
9695 )
9696
9697 ; Floating point NOP
9698 (dni fnop
9699      "Floating point nop"
9700      ((UNIT FMALL) (FR500-MAJOR F-8) (FR550-MAJOR F-1) (MACH simple,tomcat,fr500,fr550,frv))
9701      "fnop$pack"
9702      (+ pack (rd-null) OP_79 (FRi-null) OPE1_0D (FRj-null))
9703      (nop)
9704      ()
9705 )
9706
9707 ; A return instruction
9708 (dnmi ret "return"
9709       (NO-DIS (UNIT B01) (FR500-MAJOR B-3)
9710               (FR400-MAJOR B-3) (FR450-MAJOR B-3))
9711       "ret$pack"
9712       (emit bralr pack (hint_taken 2))
9713 )
9714
9715 (dnmi cmp "compare"
9716       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9717               (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9718       "cmp$pack $GRi,$GRj,$ICCi_1"
9719       (emit subcc pack GRi GRj (GRk 0) ICCi_1)
9720 )
9721
9722 (dnmi cmpi "compare immediate"
9723       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9724               (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9725       "cmpi$pack $GRi,$s10,$ICCi_1"
9726       (emit subicc pack GRi s10 (GRk 0) ICCi_1)
9727 )
9728
9729 (dnmi ccmp "conditional compare"
9730       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9731               (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
9732       "ccmp$pack $GRi,$GRj,$CCi,$cond"
9733       (emit csubcc pack GRi GRj (GRk 0) CCi cond)
9734 )
9735
9736 (dnmi mov "move"
9737       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9738               (FR400-MAJOR I-1) (FR450-MAJOR I-1))
9739       "mov$pack $GRi,$GRk"
9740       (emit ori pack GRi (s12 0) GRk)
9741 )
9742
9743 (dnmi cmov "conditional move"
9744       (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
9745               (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
9746       "cmov$pack $GRi,$GRk,$CCi,$cond"
9747       (emit cor pack GRi (GRj 0) GRk CCi cond)
9748 )