cpu/m32c.cpu

   1 ; Renesas M32C CPU description.  -*- Scheme -*-
   2 ;
   3 ; Copyright 2005 Free Software Foundation, Inc.
   4 ;
   5 ; Contributed by Red Hat Inc; developed under contract from Renesas.
   6 ;
   7 ; This file is part of the GNU Binutils.
   8 ;
   9 ; This program is free software; you can redistribute it and/or modify
  10 ; it under the terms of the GNU General Public License as published by
  11 ; the Free Software Foundation; either version 2 of the License, or
  12 ; (at your option) any later version.
  13 ;
  14 ; This program is distributed in the hope that it will be useful,
  15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 ; GNU General Public License for more details.
  18 ;
  19 ; You should have received a copy of the GNU General Public License
  20 ; along with this program; if not, write to the Free Software
  21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 (include "simplify.inc")
  24
  25 (define-arch
  26   (name m32c)
  27   (comment "Renesas M32C")
  28   (default-alignment forced)
  29   (insn-lsb0? #f)
  30   (machs m16c m32c)
  31   (isas m16c m32c)
  32 )
  33
  34 (define-isa
  35   (name m16c)
  36
  37   (default-insn-bitsize 32)
  38
  39   ; Number of bytes of insn we can initially fetch.
  40   (base-insn-bitsize 32)
  41
  42   ; Used in computing bit numbers.
  43   (default-insn-word-bitsize 32)
  44
  45   (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
  46
  47   ; fetches 1 insn at a time.
  48   (liw-insns 1)
  49
  50   ; executes 1 insn at a time.
  51   (parallel-insns 1)
  52   )
  53
  54 (define-isa
  55   (name m32c)
  56
  57   (default-insn-bitsize 32)
  58
  59   ; Number of bytes of insn we can initially fetch.
  60   (base-insn-bitsize 32)
  61
  62   ; Used in computing bit numbers.
  63   (default-insn-word-bitsize 32)
  64
  65   (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
  66
  67   ; fetches 1 insn at a time.
  68   (liw-insns 1)
  69
  70   ; executes 1 insn at a time.
  71   (parallel-insns 1)
  72   )
  73
  74 (define-cpu
  75   ; cpu names must be distinct from the architecture name and machine names.
  76   ; The "b" suffix stands for "base" and is the convention.
  77   ; The "f" suffix stands for "family" and is the convention.
  78   (name m16cbf)
  79   (comment "Renesas M16C base family")
  80   (insn-endian big)
  81   (data-endian little)
  82   (word-bitsize 16)
  83 )
  84
  85 (define-cpu
  86   ; cpu names must be distinct from the architecture name and machine names.
  87   ; The "b" suffix stands for "base" and is the convention.
  88   ; The "f" suffix stands for "family" and is the convention.
  89   (name m32cbf)
  90   (comment "Renesas M32C base family")
  91   (insn-endian big)
  92   (data-endian little)
  93   (word-bitsize 16)
  94 )
  95
  96 (define-mach
  97   (name m16c)
  98   (comment "Generic M16C cpu")
  99   (cpu m32cbf)
 100 )
 101
 102 (define-mach
 103   (name m32c)
 104   (comment "Generic M32C cpu")
 105   (cpu m32cbf)
 106 )
 107
 108 ; Model descriptions.
 109
 110 (define-model
 111   (name m16c)
 112   (comment "m16c") (attrs)
 113   (mach m16c)
 114
 115   ; `state' is a list of variables for recording model state
 116   ; (state)
 117   (unit u-exec "Execution Unit" ()
 118         1 1 ; issue done
 119         () ; state
 120         () ; inputs
 121         () ; outputs
 122         () ; profile action (default)
 123         )
 124 )
 125
 126 (define-model
 127   (name m32c)
 128   (comment "m32c") (attrs)
 129   (mach m32c)
 130
 131   ; `state' is a list of variables for recording model state
 132   ; (state)
 133   (unit u-exec "Execution Unit" ()
 134         1 1 ; issue done
 135         () ; state
 136         () ; inputs
 137         () ; outputs
 138         () ; profile action (default)
 139         )
 140 )
 141
 142 ; Macros to simplify MACH attribute specification.
 143
 144 (define-pmacro all-isas () (ISA m16c,m32c))
 145 (define-pmacro m16c-isa () (ISA m16c))
 146 (define-pmacro m32c-isa () (ISA m32c))
 147
 148 (define-pmacro MACH16 (MACH m16c))
 149 (define-pmacro MACH32 (MACH m32c))
 150
 151 (define-pmacro (machine size)
 152   (MACH (.sym m size c)) (ISA (.sym m size c)))
 153 \f
 154 ;=============================================================
 155 ; Fields
 156 ;-------------------------------------------------------------
 157 ; Main opcodes
 158 ;
 159 (dnf f-0-1  "opcode"                      (all-isas)   0 1)
 160 (dnf f-0-2  "opcode"                      (all-isas)   0 2)
 161 (dnf f-0-3  "opcode"                      (all-isas)   0 3)
 162 (dnf f-0-4  "opcode"                      (all-isas)   0 4)
 163 (dnf f-1-3  "opcode"                      (all-isas)   1 3)
 164 (dnf f-2-2  "opcode"                      (all-isas)   2 2)
 165 (dnf f-3-4  "opcode"                      (all-isas)   3 4)
 166 (dnf f-3-1  "opcode"                      (all-isas)   3 1)
 167 (dnf f-4-1  "opcode"                      (all-isas)   4 1)
 168 (dnf f-4-3  "opcode"                      (all-isas)   4 3)
 169 (dnf f-4-4  "opcode"                      (all-isas)   4 4)
 170 (dnf f-4-6  "opcode"                      (all-isas)   4 6)
 171 (dnf f-5-1  "opcode"                      (all-isas)   5 1)
 172 (dnf f-5-3  "opcode"                      (all-isas)   5 3)
 173 (dnf f-6-2  "opcode"                      (all-isas)   6 2)
 174 (dnf f-7-1  "opcode"                      (all-isas)   7 1)
 175 (dnf f-8-1  "opcode"                      (all-isas)   8 1)
 176 (dnf f-8-2  "opcode"                      (all-isas)   8 2)
 177 (dnf f-8-3  "opcode"                      (all-isas)   8 3)
 178 (dnf f-8-4  "opcode"                      (all-isas)   8 4)
 179 (dnf f-8-8  "opcode"                      (all-isas)   8 8)
 180 (dnf f-9-3  "opcode"                      (all-isas)   9 3)
 181 (dnf f-9-1  "opcode"                      (all-isas)   9 1)
 182 (dnf f-10-1 "opcode"                      (all-isas)  10 1)
 183 (dnf f-10-2 "opcode"                      (all-isas)  10 2)
 184 (dnf f-10-3 "opcode"                      (all-isas)  10 3)
 185 (dnf f-11-1 "opcode"                      (all-isas)  11 1)
 186 (dnf f-12-1 "opcode"                      (all-isas)  12 1)
 187 (dnf f-12-2 "opcode"                      (all-isas)  12 2)
 188 (dnf f-12-3 "opcode"                      (all-isas)  12 3)
 189 (dnf f-12-4 "opcode"                      (all-isas)  12 4)
 190 (dnf f-12-6 "opcode"                      (all-isas)  12 6)
 191 (dnf f-13-3 "opcode"                      (all-isas)  13 3)
 192 (dnf f-14-1 "opcode"                      (all-isas)  14 1)
 193 (dnf f-14-2 "opcode"                      (all-isas)  14 2)
 194 (dnf f-15-1 "opcode"                      (all-isas)  15 1)
 195 (dnf f-16-1 "opcode"                      (all-isas)  16 1)
 196 (dnf f-16-2 "opcode"                      (all-isas)  16 2)
 197 (dnf f-16-4 "opcode"                      (all-isas)  16 4)
 198 (dnf f-16-8 "opcode"                      (all-isas)  16 8)
 199 (dnf f-18-1 "opcode"                      (all-isas)  18 1)
 200 (dnf f-18-2 "opcode"                      (all-isas)  18 2)
 201 (dnf f-18-3 "opcode"                      (all-isas)  18 3)
 202 (dnf f-20-1 "opcode"                      (all-isas)  20 1)
 203 (dnf f-20-3 "opcode"                      (all-isas)  20 3)
 204 (dnf f-20-2 "opcode"                      (all-isas)  20 2)
 205 (dnf f-20-4 "opcode"                      (all-isas)  20 4)
 206 (dnf f-21-3 "opcode"                      (all-isas)  21 3)
 207 (dnf f-24-2 "opcode"                      (all-isas)  24 2)
 208 (dnf f-24-8 "opcode"                      (all-isas)  24 8)
 209 (dnf f-32-16 "opcode"                     (all-isas)  32 16)
 210
 211 ;-------------------------------------------------------------
 212 ; Registers
 213 ;-------------------------------------------------------------
 214
 215 (dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2)
 216 (dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1)
 217
 218 (dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1)
 219 (dnf f-src32-an-prefixed   "destination An for m32c" (MACH32 m32c-isa) 19 1)
 220
 221 ; QI mode gr encoding for m32c is different than for m16c. The hardware
 222 ; is indexed using the m16c encoding, so perform the transformation here.
 223 ;  register  m16c    m32c
 224 ;  ----------------------
 225 ;   r0l      00'b    10'b
 226 ;   r0h      01'b    00'b
 227 ;   r1l      10'b    11'b
 228 ;   r1h      11'b    01'b
 229 (df  f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
 230      ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
 231      ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
 232 )
 233 ; QI mode gr encoding for m32c is different than for m16c. The hardware
 234 ; is indexed using the m16c encoding, so perform the transformation here.
 235 ;  register  m16c    m32c
 236 ;  ----------------------
 237 ;   r0l      00'b    10'b
 238 ;   r0h      01'b    00'b
 239 ;   r1l      10'b    11'b
 240 ;   r1h      11'b    01'b
 241 (df  f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
 242      ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
 243      ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
 244 )
 245 ; HI mode gr encoding for m32c is different than for m16c. The hardware
 246 ; is indexed using the m16c encoding, so perform the transformation here.
 247 ;  register  m16c    m32c
 248 ;  ----------------------
 249 ;   r0       00'b    10'b
 250 ;   r1       01'b    11'b
 251 ;   r2       10'b    00'b
 252 ;   r3       11'b    01'b
 253 (df  f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT
 254      ((value pc) (mod USI (add value 2) 4)) ; insert
 255      ((value pc) (mod USI (add value 2) 4)) ; extract
 256 )
 257
 258 ; HI mode gr encoding for m32c is different than for m16c. The hardware
 259 ; is indexed using the m16c encoding, so perform the transformation here.
 260 ;  register  m16c    m32c
 261 ;  ----------------------
 262 ;   r0       00'b    10'b
 263 ;   r1       01'b    11'b
 264 ;   r2       10'b    00'b
 265 ;   r3       11'b    01'b
 266 (df  f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT
 267      ((value pc) (mod USI (add value 2) 4)) ; insert
 268      ((value pc) (mod USI (add value 2) 4)) ; extract
 269 )
 270
 271 ; SI mode gr encoding for m32c is as follows:
 272 ;  register  encoding  index
 273 ;  -------------------------
 274 ;   r2r0       10'b     0
 275 ;   r3r1       11'b     1
 276 (df  f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT
 277      ((value pc) (add USI value 2)) ; insert
 278      ((value pc) (sub USI value 2)) ; extract
 279 )
 280 (df  f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT
 281      ((value pc) (add USI value 2)) ; insert
 282      ((value pc) (sub USI value 2)) ; extract
 283 )
 284
 285 (dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1)
 286
 287 (dnf f-dst16-rn      "destination Rn for m16c" (MACH16 m16c-isa) 14 2)
 288 (dnf f-dst16-rn-ext  "destination Rn for m16c" (MACH16 m16c-isa) 14 1)
 289 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa)  5 1)
 290
 291 (dnf f-dst16-an   "destination An for m16c" (MACH16 m16c-isa) 15 1)
 292 (dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa)  4 1)
 293
 294 (dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa)  9 1)
 295 (dnf f-dst32-an-prefixed   "destination An for m32c" (MACH32 m32c-isa) 17 1)
 296
 297 ; QI mode gr encoding for m32c is different than for m16c. The hardware
 298 ; is indexed using the m16c encoding, so perform the transformation here.
 299 ;  register  m16c    m32c
 300 ;  ----------------------
 301 ;   r0l      00'b    10'b
 302 ;   r0h      01'b    00'b
 303 ;   r1l      10'b    11'b
 304 ;   r1h      11'b    01'b
 305 (df  f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
 306      ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
 307      ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
 308 )
 309 (df  f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
 310      ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
 311      ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
 312 )
 313 ; HI mode gr encoding for m32c is different than for m16c. The hardware
 314 ; is indexed using the m16c encoding, so perform the transformation here.
 315 ;  register  m16c    m32c
 316 ;  ----------------------
 317 ;   r0       00'b    10'b
 318 ;   r1       01'b    11'b
 319 ;   r2       10'b    00'b
 320 ;   r3       11'b    01'b
 321 (df  f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT
 322      ((value pc) (mod USI (add value 2) 4)) ; insert
 323      ((value pc) (mod USI (add value 2) 4)) ; extract
 324 )
 325 (df  f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT
 326      ((value pc) (mod USI (add value 2) 4)) ; insert
 327      ((value pc) (mod USI (add value 2) 4)) ; extract
 328 )
 329 ; SI mode gr encoding for m32c is as follows:
 330 ;  register  encoding  index
 331 ;  -------------------------
 332 ;   r2r0       10'b     0
 333 ;   r3r1       11'b     1
 334 (df  f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT
 335      ((value pc) (add USI value 2)) ; insert
 336      ((value pc) (sub USI value 2)) ; extract
 337 )
 338 (df  f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT
 339      ((value pc) (add USI value 2)) ; insert
 340      ((value pc) (sub USI value 2)) ; extract
 341 )
 342
 343 (dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1)
 344
 345 ;-------------------------------------------------------------
 346 ; Immediates embedded in the base insn
 347 ;-------------------------------------------------------------
 348
 349 (df f-imm-8-s4   "4  bit   signed" (all-isas)  8  4  INT #f #f)
 350 (df f-imm-12-s4  "4  bit   signed" (all-isas) 12  4  INT #f #f)
 351 (df f-imm-13-u3  "3  bit unsigned" (all-isas) 13  3 UINT #f #f)
 352 (df f-imm-20-s4  "4  bit   signed" (all-isas) 20  4  INT #f #f)
 353
 354 (df  f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT
 355      ((value pc) (sub USI value 1)) ; insert
 356      ((value pc) (add USI value 1)) ; extract
 357 )
 358
 359 (dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT
 360       (f-2-2 f-7-1)
 361       (sequence () ; insert
 362                 (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1))
 363                 (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3))
 364                 )
 365       (sequence () ; extract
 366                 (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1)
 367                                                 (ifield f-7-1))
 368                                             1))
 369                 )
 370 )
 371
 372 ;-------------------------------------------------------------
 373 ; Immediates and displacements beyond the base insn
 374 ;-------------------------------------------------------------
 375
 376 (df f-dsp-8-u6   "6  bit unsigned" (all-isas)  8  6 UINT #f #f)
 377 (df f-dsp-8-u8   "8  bit unsigned" (all-isas)  8  8 UINT #f #f)
 378 (df f-dsp-8-s8   "8  bit   signed" (all-isas)  8  8  INT #f #f)
 379 (df f-dsp-10-u6  "6  bit unsigned" (all-isas) 10  6 UINT #f #f)
 380 (df f-dsp-16-u8  "8  bit unsigned" (all-isas) 16  8 UINT #f #f)
 381 (df f-dsp-16-s8  "8  bit   signed" (all-isas) 16  8  INT #f #f)
 382 (df f-dsp-24-u8  "8  bit unsigned" (all-isas) 24  8 UINT #f #f)
 383 (df f-dsp-24-s8  "8  bit   signed" (all-isas) 24  8  INT #f #f)
 384 (df f-dsp-32-u8  "8  bit unsigned" (all-isas) 32  8 UINT #f #f)
 385 (df f-dsp-32-s8  "8  bit   signed" (all-isas) 32  8  INT #f #f)
 386 (df f-dsp-40-u8  "8  bit unsigned" (all-isas) 40  8 UINT #f #f)
 387 (df f-dsp-40-s8  "8  bit   signed" (all-isas) 40  8  INT #f #f)
 388 (df f-dsp-48-u8  "8  bit unsigned" (all-isas) 48  8 UINT #f #f)
 389 (df f-dsp-48-s8  "8  bit   signed" (all-isas) 48  8  INT #f #f)
 390 (df f-dsp-56-u8  "8  bit unsigned" (all-isas) 56  8 UINT #f #f)
 391 (df f-dsp-56-s8  "8  bit   signed" (all-isas) 56  8  INT #f #f)
 392 (df f-dsp-64-u8  "8  bit unsigned" (all-isas) 64  8 UINT #f #f)
 393 (df f-dsp-64-s8  "8  bit   signed" (all-isas) 64  8  INT #f #f)
 394
 395 ; Insn opcode endianness is big, but the immediate fields are stored
 396 ; in little endian. Handle this here at the field level for all immediate
 397 ; fields longer that 1 byte.
 398 ;
 399 ; CGEN can't handle a field which spans a 32 bit word boundary, so
 400 ; handle those as multi ifields.
 401 ;
 402 ; Take care in expressions using 'srl' or 'sll' as part of some larger
 403 ; expression meant to yield sign-extended values.  CGEN translates
 404 ; uses of those operators into C expressions whose type is 'unsigned
 405 ; int', which tends to make the whole expression 'unsigned int'.
 406 ; Expressions like (set (ifield foo) X), however, just take X and
 407 ; store it in some member of 'struct cgen_fields', all of whose
 408 ; members are 'long'.  On machines where 'long' is larger than
 409 ; 'unsigned int', assigning a "sign-extended" unsigned int to a long
 410 ; just produces a very large positive value.  insert_normal will
 411 ; range-check the field's value and produce odd error messages like
 412 ; this:
 413 ;
 414 ; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]'
 415 ;
 416 ; Annoyingly, the code will work fine on machines where 'long' and
 417 ; 'unsigned int' are the same size: the assignment will produce a
 418 ; negative number.
 419 ;
 420 ; Just tell yourself over and over: overflow detection is expensive,
 421 ; and you're glad C doesn't do it, because it never happens in real
 422 ; life.
 423
 424 (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT
 425      ((value pc) (or UHI
 426                      (and (srl value 8) #x00ff)
 427                      (and (sll value 8) #xff00))) ; insert
 428      ((value pc) (or UHI
 429                      (and UHI (srl UHI value 8) #x00ff)
 430                      (and UHI (sll UHI value 8) #xff00))) ; extract
 431 )
 432
 433 (df f-dsp-8-s16 "8 bit   signed" (all-isas) 8 16 INT
 434      ((value pc) (ext INT
 435                       (trunc HI
 436                              (or (and (srl value 8) #x00ff)
 437                                  (and (sll value 8) #xff00))))) ; insert
 438      ((value pc) (ext INT
 439                       (trunc HI
 440                              (or (and (srl value 8) #x00ff)
 441                                  (and (sll value 8) #xff00))))) ; extract
 442 )
 443
 444 (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT
 445      ((value pc) (or UHI
 446                      (and (srl value 8) #x00ff)
 447                      (and (sll value 8) #xff00))) ; insert
 448      ((value pc) (or UHI
 449                      (and UHI (srl UHI value 8) #x00ff)
 450                      (and UHI (sll UHI value 8) #xff00))) ; extract
 451 )
 452
 453 (df f-dsp-16-s16 "16 bit   signed" (all-isas) 16 16 INT
 454      ((value pc) (ext INT
 455                       (trunc HI
 456                              (or (and (srl value 8) #x00ff)
 457                                  (and (sll value 8) #xff00))))) ; insert
 458      ((value pc) (ext INT
 459                       (trunc HI
 460                              (or (and (srl value 8) #x00ff)
 461                                  (and (sll value 8) #xff00))))) ; extract
 462 )
 463
 464 (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT
 465       (f-dsp-24-u8 f-dsp-32-u8)
 466       (sequence () ; insert
 467                 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff))
 468                 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff))
 469                 )
 470       (sequence () ; extract
 471                 (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8)
 472                                                (ifield f-dsp-24-u8)))
 473                 )
 474 )
 475
 476 (dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT
 477       (f-dsp-24-u8 f-dsp-32-u8)
 478       (sequence () ; insert
 479                 (set (ifield f-dsp-24-u8)
 480                      (and (ifield f-dsp-24-s16) #xff))
 481                 (set (ifield f-dsp-32-u8)
 482                      (and (srl (ifield f-dsp-24-s16) 8) #xff))
 483                 )
 484       (sequence () ; extract
 485                 (set (ifield f-dsp-24-s16)
 486                      (ext INT
 487                           (trunc HI (or (sll (ifield f-dsp-32-u8) 8)
 488                                         (ifield f-dsp-24-u8)))))
 489                 )
 490 )
 491
 492 (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT
 493      ((value pc) (or UHI
 494                      (and (srl value 8) #x00ff)
 495                      (and (sll value 8) #xff00))) ; insert
 496      ((value pc) (or UHI
 497                      (and UHI (srl UHI value 8) #x00ff)
 498                      (and UHI (sll UHI value 8) #xff00))) ; extract
 499 )
 500
 501 (df f-dsp-32-s16 "16 bit   signed" (all-isas) 32 16 INT
 502      ((value pc) (ext INT
 503                       (trunc HI
 504                              (or (and (srl value 8) #x00ff)
 505                                  (and (sll value 8) #xff00))))) ; insert
 506      ((value pc) (ext INT
 507                       (trunc HI
 508                              (or (and (srl value 8) #x00ff)
 509                                  (and (sll value 8) #xff00))))) ; extract
 510 )
 511
 512 (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT
 513      ((value pc) (or UHI
 514                      (and (srl value 8) #x00ff)
 515                      (and (sll value 8) #xff00))) ; insert
 516      ((value pc) (or UHI
 517                      (and UHI (srl UHI value 8) #x00ff)
 518                      (and UHI (sll UHI value 8) #xff00))) ; extract
 519 )
 520
 521 (df f-dsp-40-s16 "16 bit   signed" (all-isas) 40 16 INT
 522      ((value pc) (ext INT
 523                       (trunc HI
 524                              (or (and (srl value 8) #x00ff)
 525                                  (and (sll value 8) #xff00))))) ; insert
 526      ((value pc) (ext INT
 527                       (trunc HI
 528                              (or (and (srl value 8) #x00ff)
 529                                  (and (sll value 8) #xff00))))) ; extract
 530 )
 531
 532 (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT
 533      ((value pc) (or UHI
 534                      (and (srl value 8) #x00ff)
 535                      (and (sll value 8) #xff00))) ; insert
 536      ((value pc) (or UHI
 537                      (and UHI (srl UHI value 8) #x00ff)
 538                      (and UHI (sll UHI value 8) #xff00))) ; extract
 539 )
 540
 541 (df f-dsp-48-s16 "16 bit   signed" (all-isas) 48 16 INT
 542      ((value pc) (ext INT
 543                       (trunc HI
 544                              (or (and (srl value 8) #x00ff)
 545                                  (and (sll value 8) #xff00))))) ; insert
 546      ((value pc) (ext INT
 547                       (trunc HI
 548                              (or (and (srl value 8) #x00ff)
 549                                  (and (sll value 8) #xff00))))) ; extract
 550 )
 551
 552 (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT
 553      ((value pc) (or UHI
 554                      (and (srl value 8) #x00ff)
 555                      (and (sll value 8) #xff00))) ; insert
 556      ((value pc) (or UHI
 557                      (and UHI (srl UHI value 8) #x00ff)
 558                      (and UHI (sll UHI value 8) #xff00))) ; extract
 559 )
 560 (df  f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
 561      ((value pc) (or SI
 562                      (or (srl value 16) (and value #xff00))
 563                      (sll (and value #xff) 16)))
 564      ((value pc) (or SI
 565                      (or (srl value 16) (and value #xff00))
 566                      (sll (and value #xff) 16)))
 567  )
 568
 569 (dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT
 570       (f-dsp-16-u16 f-dsp-32-u8)
 571       (sequence () ; insert
 572                 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff))
 573                 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff))
 574                 )
 575       (sequence () ; extract
 576                 (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16)
 577                                                (ifield f-dsp-16-u16)))
 578                 )
 579 )
 580
 581 (dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT
 582       (f-dsp-24-u8 f-dsp-32-u16)
 583       (sequence () ; insert
 584                 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff))
 585                 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff))
 586                 )
 587       (sequence () ; extract
 588                 (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8)
 589                                                (ifield f-dsp-24-u8)))
 590                 )
 591 )
 592
 593 (df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT
 594      ((value pc) (or USI
 595                      (or USI
 596                          (and (srl value 16) #x0000ff)
 597                          (and value          #x00ff00))
 598                      (and (sll value 16) #xff0000))) ; insert
 599      ((value pc) (or USI
 600                      (or USI
 601                          (and USI (srl UHI value 16) #x0000ff)
 602                          (and USI value              #x00ff00))
 603                      (and USI (sll UHI value 16) #xff0000))) ; extract
 604 )
 605
 606 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
 607      ((value pc) (or USI
 608                      (or USI
 609                          (and (srl value 16) #x0000ff)
 610                          (and value          #x00ff00))
 611                      (and (sll value 16) #xff0000))) ; insert
 612      ((value pc) (or USI
 613                      (or USI
 614                          (and USI (srl UHI value 16) #x0000ff)
 615                          (and USI value              #x00ff00))
 616                      (and USI (sll UHI value 16) #xff0000))) ; extract
 617 )
 618
 619 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
 620       (f-dsp-40-u24 f-dsp-64-u8)
 621       (sequence () ; insert
 622                 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff))
 623                 (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff))
 624                 )
 625       (sequence () ; extract
 626                 (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff)
 627                                                (and (sll (ifield f-dsp-64-u8) 24) #xff000000)))
 628                 )
 629 )
 630
 631 (dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT
 632       (f-dsp-48-u16 f-dsp-64-u8)
 633       (sequence () ; insert
 634                 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff))
 635                 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff))
 636                 )
 637       (sequence () ; extract
 638                 (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff)
 639                                                (and (sll (ifield f-dsp-64-u8) 16) #xff0000)))
 640                 )
 641 )
 642
 643 (dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT
 644       (f-dsp-16-u16 f-dsp-32-u16)
 645       (sequence () ; insert
 646                 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff))
 647                 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff))
 648                 )
 649       (sequence () ; extract
 650                 (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff)
 651                                                (and (sll (ifield f-dsp-32-u16) 16) #xffff0000)))
 652                 )
 653 )
 654
 655 (dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT
 656       (f-dsp-24-u8 f-dsp-32-u24)
 657       (sequence () ; insert
 658                 (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff))
 659                 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff))
 660                 )
 661       (sequence () ; extract
 662                 (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff)
 663                                                (and (sll (ifield f-dsp-32-u24) 8) #xffffff00)))
 664                 )
 665 )
 666
 667 (df f-dsp-32-s32 "32 bit   signed" (all-isas) 32 32 INT
 668      ((value pc)
 669
 670       ;; insert
 671       (ext INT
 672            (or SI
 673                (or SI
 674                    (and (srl value 24) #x000000ff)
 675                    (and (srl value 8)  #x0000ff00))
 676                (or SI
 677                    (and (sll value 8)  #x00ff0000)
 678                    (and (sll value 24) #xff000000)))))
 679
 680      ;; extract
 681      ((value pc)
 682       (ext INT
 683            (or SI
 684                (or SI
 685                    (and (srl value 24) #x000000ff)
 686                    (and (srl value 8)  #x0000ff00))
 687                (or SI
 688                    (and (sll value 8)  #x00ff0000)
 689                    (and (sll value 24) #xff000000)))))
 690 )
 691
 692 (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT
 693       (f-dsp-48-u16 f-dsp-64-u16)
 694       (sequence () ; insert
 695                 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff))
 696                 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff))
 697                 )
 698       (sequence () ; extract
 699                 (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff)
 700                                                (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
 701                 )
 702 )
 703
 704 (dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT
 705       (f-dsp-48-u16 f-dsp-64-u16)
 706       (sequence () ; insert
 707                 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff))
 708                 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff))
 709                 )
 710       (sequence () ; extract
 711                 (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff)
 712                                                (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
 713                 )
 714 )
 715
 716 (dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT
 717       (f-dsp-56-u8 f-dsp-64-u8)
 718       (sequence () ; insert
 719                 (set (ifield f-dsp-56-u8)
 720                      (and (ifield f-dsp-56-s16) #xff))
 721                 (set (ifield f-dsp-64-u8)
 722                      (and (srl (ifield f-dsp-56-s16) 8) #xff))
 723                 )
 724       (sequence () ; extract
 725                 (set (ifield f-dsp-56-s16)
 726                      (ext INT
 727                           (trunc HI (or (sll (ifield f-dsp-64-u8) 8)
 728                                         (ifield f-dsp-56-u8)))))
 729                 )
 730 )
 731
 732 (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
 733      ((value pc) (ext INT
 734                       (trunc HI
 735                              (or (and (srl value 8) #x00ff)
 736                                  (and (sll value 8) #xff00))))) ; insert
 737      ((value pc) (ext INT
 738                       (trunc HI
 739                              (or (and (srl value 8) #x00ff)
 740                                  (and (sll value 8) #xff00))))) ; extract
 741 )
 742
 743 ;-------------------------------------------------------------
 744 ; Bit indices
 745 ;-------------------------------------------------------------
 746
 747 (dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3)
 748 (dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3)
 749 (dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3)
 750
 751 (dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT
 752       (f-bitno16-S f-dsp-8-u8)
 753       (sequence () ; insert
 754                 (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7))
 755                 (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff))
 756                 )
 757       (sequence () ; extract
 758                 (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3)
 759                                                     (ifield f-bitno16-S)))
 760                 )
 761 )
 762
 763 (dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT
 764       (f-bitno32-unprefixed f-dsp-16-u8)
 765       (sequence () ; insert
 766                 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7))
 767                 (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff))
 768                 )
 769       (sequence () ; extract
 770                 (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3)
 771                                                               (ifield f-bitno32-unprefixed)))
 772                 )
 773 )
 774 (dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT
 775       (f-bitno32-unprefixed f-dsp-16-s8)
 776       (sequence () ; insert
 777                 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7))
 778                 (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3))
 779                 )
 780       (sequence () ; extract
 781                 (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3)
 782                                                                 (ifield f-bitno32-unprefixed)))
 783                 )
 784 )
 785 (dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT
 786       (f-bitno32-unprefixed f-dsp-16-u16)
 787       (sequence () ; insert
 788                 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7))
 789                 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff))
 790                 )
 791       (sequence () ; extract
 792                 (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
 793                                                                 (ifield f-bitno32-unprefixed)))
 794                 )
 795 )
 796 (dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT
 797       (f-bitno32-unprefixed f-dsp-16-s16)
 798       (sequence () ; insert
 799                 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7))
 800                 (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3))
 801                 )
 802       (sequence () ; extract
 803                 (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3)
 804                                                                 (ifield f-bitno32-unprefixed)))
 805                 )
 806 )
 807 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield  :-(
 808 (dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT
 809       (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8)
 810       (sequence () ; insert
 811                 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7))
 812                 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff))
 813                 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff))
 814                 )
 815       (sequence () ; extract
 816                 (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
 817                                                               (or (sll (ifield f-dsp-32-u8) 19)
 818                                                                   (ifield f-bitno32-unprefixed))))
 819                 )
 820 )
 821 (dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT
 822       (f-bitno32-prefixed f-dsp-24-u8)
 823       (sequence () ; insert
 824                 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7))
 825                 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff))
 826                 )
 827       (sequence () ; extract
 828                 (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
 829                                                               (ifield f-bitno32-prefixed)))
 830                 )
 831 )
 832 (dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT
 833       (f-bitno32-prefixed f-dsp-24-s8)
 834       (sequence () ; insert
 835                 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7))
 836                 (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3))
 837                 )
 838       (sequence () ; extract
 839                 (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3)
 840                                                               (ifield f-bitno32-prefixed)))
 841                 )
 842 )
 843 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield  :-(
 844 (dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT
 845       (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8)
 846       (sequence () ; insert
 847                 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7))
 848                 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed)  3) #xff))
 849                 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff))
 850                 )
 851       (sequence () ; extract
 852                 (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
 853                                                               (or (sll (ifield f-dsp-32-u8) 11)
 854                                                                   (ifield f-bitno32-prefixed))))
 855                 )
 856 )
 857 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield  :-(
 858 (dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT
 859       (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8)
 860       (sequence () ; insert
 861                 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7))
 862                 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff))
 863                 (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11))
 864                 )
 865       (sequence () ; extract
 866                 (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
 867                                                               (or (sll (ifield f-dsp-32-s8) 11)
 868                                                                   (ifield f-bitno32-prefixed))))
 869                 )
 870 )
 871 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield  :-(
 872 (dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT
 873       (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16)
 874       (sequence () ; insert
 875                 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7))
 876                 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff))
 877                 (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff))
 878                 )
 879       (sequence () ; extract
 880                 (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
 881                                                               (or (sll (ifield f-dsp-32-u16) 11)
 882                                                                   (ifield f-bitno32-prefixed))))
 883                 )
 884 )
 885
 886 ;-------------------------------------------------------------
 887 ; Labels
 888 ;-------------------------------------------------------------
 889
 890 (df  f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT
 891      ((value pc) (sub SI value (add SI pc 2))) ; insert
 892      ((value pc) (add SI value (add SI pc 2))) ; extract
 893 )
 894 (dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT
 895       (f-2-2 f-7-1)
 896       (sequence ((SI val)) ; insert
 897                 (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2))
 898                 (set (ifield f-7-1) (and val #x1))
 899                 (set (ifield f-2-2) (srl val 1))
 900                 )
 901       (sequence () ; extract
 902                 (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1)
 903                                                              (ifield f-7-1))
 904                                                          2)))
 905                 )
 906 )
 907 (df  f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT
 908      ((value pc) (sub SI value (add SI pc 1))) ; insert
 909      ((value pc) (add SI value (add SI pc 1))) ; extract
 910 )
 911 (df  f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
 912      ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
 913                      (srl (and (sub value (add pc 1)) #xffff) 8)))
 914      ((value pc) (add SI (or (srl (and value #xffff) 8)
 915                              (sra (sll (and value #xff) 24) 16)) (add pc 1)))
 916  )
 917 (df  f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
 918      ((value pc) (or SI
 919                      (or (srl value 16) (and value #xff00))
 920                      (sll (and value #xff) 16)))
 921      ((value pc) (or SI
 922                      (or (srl value 16) (and value #xff00))
 923                      (sll (and value #xff) 16)))
 924  )
 925 (df  f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT
 926      ((value pc) (sub SI value (add SI pc 2))) ; insert
 927      ((value pc) (add SI value (add SI pc 2))) ; extract
 928 )
 929 (df  f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT
 930      ((value pc) (sub SI value (add SI pc 2))) ; insert
 931      ((value pc) (add SI value (add SI pc 2))) ; extract
 932 )
 933 (df  f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT
 934      ((value pc) (sub SI value (add SI pc 2))) ; insert
 935      ((value pc) (add SI value (add SI pc 2))) ; extract
 936 )
 937 (df  f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT
 938      ((value pc) (sub SI value (add SI pc 2))) ; insert
 939      ((value pc) (add SI value (add SI pc 2))) ; extract
 940 )
 941
 942 ;-------------------------------------------------------------
 943 ; Condition codes
 944 ;-------------------------------------------------------------
 945
 946 (dnf f-cond16    "condition code" (all-isas) 12 4)
 947 (dnf f-cond16j-5 "condition code" (all-isas)  5 3)
 948
 949 (dnmf f-cond32 "condition code" (all-isas) UINT
 950       (f-9-1 f-13-3)
 951       (sequence () ; insert
 952                 (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1))
 953                 (set (ifield f-13-3) (and (ifield f-cond32) #x7))
 954                 )
 955       (sequence () ; extract
 956                 (set (ifield f-cond32) (or (sll (ifield f-9-1) 3)
 957                                            (ifield f-13-3)))
 958                 )
 959 )
 960
 961 (dnmf f-cond32j "condition code" (all-isas) UINT
 962       (f-1-3 f-7-1)
 963       (sequence () ; insert
 964                 (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7))
 965                 (set (ifield f-7-1) (and (ifield f-cond32j) #x1))
 966                 )
 967       (sequence () ; extract
 968                 (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1)
 969                                             (ifield f-7-1)))
 970                 )
 971 )
 972 \f
 973 ;=============================================================
 974 ; Hardware
 975 ;
 976 (dnh h-pc "program counter" (PC all-isas) (pc USI) () () ())
 977
 978 ;-------------------------------------------------------------
 979 ; General registers
 980 ; The actual registers are 16 bits
 981 ;-------------------------------------------------------------
 982
 983 (define-hardware
 984   (name h-gr)
 985   (comment "general 16 bit registers")
 986   (attrs all-isas CACHE-ADDR)
 987   (type register HI (4))
 988   (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))))
 989
 990 ; Define different views of the grs as VIRTUAL with getter/setter specs
 991 ;
 992 (define-hardware
 993   (name h-gr-QI)
 994   (comment "general 8 bit registers")
 995   (attrs all-isas VIRTUAL)
 996   (type register QI (4))
 997   (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3)))
 998   (get (index) (and (if SI (mod index 2)
 999                         (srl (reg h-gr (div index 2)) 8)
1000                         (reg h-gr (div index 2)))
1001                     #xff))
1002   (set (index newval) (set (reg h-gr (div index 2))
1003                            (if SI (mod index 2)
1004                                (or (and (reg h-gr (div index 2)) #xff)
1005                                    (sll (and newval #xff) 8))
1006                                (or (and (reg h-gr (div index 2)) #xff00)
1007                                    (and newval #xff))))))
1008
1009 (define-hardware
1010   (name h-gr-HI)
1011   (comment "general 16 bit registers")
1012   (attrs all-isas VIRTUAL)
1013   (type register HI (4))
1014   (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))
1015   (get (index) (reg h-gr index))
1016   (set (index newval) (set (reg h-gr index) newval)))
1017
1018 (define-hardware
1019   (name h-gr-SI)
1020   (comment "general 32 bit registers")
1021   (attrs all-isas VIRTUAL)
1022   (type register SI (2))
1023   (indices keyword "" (("r2r0" 0) ("r3r1" 1)))
1024   (get (index) (or SI
1025                    (and (reg h-gr index) #xffff)
1026                    (and (sll (reg h-gr (add index 2)) 16) #xffff0000)))
1027   (set (index newval) (sequence ()
1028                                 (set (reg h-gr index) (and newval #xffff))
1029                                 (set (reg h-gr (add index 2)) (srl newval 16)))))
1030
1031 (define-hardware
1032   (name h-gr-ext-QI)
1033   (comment "general 16 bit registers")
1034   (attrs all-isas VIRTUAL)
1035   (type register HI (2))
1036   (indices keyword "" (("r0l" 0) ("r1l" 1)))
1037   (get (index) (reg h-gr-QI (mul index 2)))
1038   (set (index newval) (set (reg h-gr (mul index 2)) newval)))
1039
1040 (define-hardware
1041   (name h-gr-ext-HI)
1042   (comment "general 16 bit registers")
1043   (attrs all-isas VIRTUAL)
1044   (type register SI (2))
1045   (indices keyword "" (("r0" 0) ("r1" 1)))
1046   (get (index) (reg h-gr (mul index 2)))
1047   (set (index newval) (set (reg h-gr-SI index) newval)))
1048
1049 (define-hardware
1050   (name h-r0l)
1051   (comment "r0l register")
1052   (attrs all-isas VIRTUAL)
1053   (type register QI)
1054   (indices keyword "" (("r0l" 0)))
1055   (get () (reg h-gr-QI 0))
1056   (set (newval) (set (reg h-gr-QI 0) newval)))
1057
1058 (define-hardware
1059   (name h-r0h)
1060   (comment "r0h register")
1061   (attrs all-isas VIRTUAL)
1062   (type register QI)
1063   (indices keyword "" (("r0h" 0)))
1064   (get () (reg h-gr-QI 1))
1065   (set (newval) (set (reg h-gr-QI 1) newval)))
1066
1067 (define-hardware
1068   (name h-r1l)
1069   (comment "r1l register")
1070   (attrs all-isas VIRTUAL)
1071   (type register QI)
1072   (indices keyword "" (("r1l" 0)))
1073   (get () (reg h-gr-QI 2))
1074   (set (newval) (set (reg h-gr-QI 2) newval)))
1075
1076 (define-hardware
1077   (name h-r1h)
1078   (comment "r1h register")
1079   (attrs all-isas VIRTUAL)
1080   (type register QI)
1081   (indices keyword "" (("r1h" 0)))
1082   (get () (reg h-gr-QI 3))
1083   (set (newval) (set (reg h-gr-QI 3) newval)))
1084
1085 (define-hardware
1086   (name h-r0)
1087   (comment "r0 register")
1088   (attrs all-isas VIRTUAL)
1089   (type register HI)
1090   (indices keyword "" (("r0" 0)))
1091   (get () (reg h-gr 0))
1092   (set (newval) (set (reg h-gr 0) newval)))
1093
1094 (define-hardware
1095   (name h-r1)
1096   (comment "r1 register")
1097   (attrs all-isas VIRTUAL)
1098   (type register HI)
1099   (indices keyword "" (("r1" 0)))
1100   (get () (reg h-gr 1))
1101   (set (newval) (set (reg h-gr 1) newval)))
1102
1103 (define-hardware
1104   (name h-r2)
1105   (comment "r2 register")
1106   (attrs all-isas VIRTUAL)
1107   (type register HI)
1108   (indices keyword "" (("r2" 0)))
1109   (get () (reg h-gr 2))
1110   (set (newval) (set (reg h-gr 2) newval)))
1111
1112 (define-hardware
1113   (name h-r3)
1114   (comment "r3 register")
1115   (attrs all-isas VIRTUAL)
1116   (type register HI)
1117   (indices keyword "" (("r3" 0)))
1118   (get () (reg h-gr 3))
1119   (set (newval) (set (reg h-gr 3) newval)))
1120
1121 (define-hardware
1122   (name h-r0l-r0h)
1123   (comment "r0l or r0h")
1124   (attrs all-isas VIRTUAL)
1125   (type register QI (2))
1126   (indices keyword "" (("r0l" 0) ("r0h" 1)))
1127   (get (index) (reg h-gr-QI index))
1128   (set (index newval) (set (reg h-gr-QI index) newval)))
1129
1130 (define-hardware
1131   (name h-r2r0)
1132   (comment "r2r0 register")
1133   (attrs all-isas VIRTUAL)
1134   (type register SI)
1135   (indices keyword "" (("r2r0" 0)))
1136   (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0)))
1137   (set (newval)
1138        (sequence ()
1139                  (set (reg h-gr 0) newval)
1140                  (set (reg h-gr 2) (sra newval 16)))))
1141
1142 (define-hardware
1143   (name h-r3r1)
1144   (comment "r3r1 register")
1145   (attrs all-isas VIRTUAL)
1146   (type register SI)
1147   (indices keyword "" (("r3r1" 0)))
1148   (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1)))
1149   (set (newval)
1150        (sequence ()
1151                  (set (reg h-gr 1) newval)
1152                  (set (reg h-gr 3) (sra newval 16)))))
1153
1154 (define-hardware
1155   (name h-r1r2r0)
1156   (comment "r1r2r0 register")
1157   (attrs all-isas VIRTUAL)
1158   (type register DI)
1159   (indices keyword "" (("r1r2r0" 0)))
1160   (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0))))
1161   (set (newval)
1162        (sequence ()
1163                  (set (reg h-gr 0) newval)
1164                  (set (reg h-gr 2) (sra newval 16))
1165                  (set (reg h-gr 1) (sra newval 32)))))
1166
1167 ;-------------------------------------------------------------
1168 ; Address registers
1169 ;-------------------------------------------------------------
1170
1171 (define-hardware
1172   (name h-ar)
1173   (comment "address registers")
1174   (attrs all-isas)
1175   (type register USI (2))
1176   (indices keyword "" (("a0" 0) ("a1" 1)))
1177   (get (index) (c-call USI "h_ar_get_handler" index))
1178   (set (index newval) (c-call VOID "h_ar_set_handler" index newval)))
1179
1180 ; Define different views of the ars as VIRTUAL with getter/setter specs
1181 (define-hardware
1182   (name h-ar-QI)
1183   (comment "8 bit view of address register")
1184   (attrs all-isas VIRTUAL)
1185   (type register QI (2))
1186   (indices keyword "" (("a0" 0) ("a1" 1)))
1187   (get (index) (reg h-ar index))
1188   (set (index newval) (set (reg h-ar index) newval)))
1189
1190 (define-hardware
1191   (name h-ar-HI)
1192   (comment "16 bit view of address register")
1193   (attrs all-isas VIRTUAL)
1194   (type register HI (2))
1195   (indices keyword "" (("a0" 0) ("a1" 1)))
1196   (get (index) (reg h-ar index))
1197   (set (index newval) (set (reg h-ar index) newval)))
1198
1199 (define-hardware
1200   (name h-ar-SI)
1201   (comment "32 bit view of address register")
1202   (attrs all-isas VIRTUAL)
1203   (type register SI)
1204   (indices keyword "" (("a1a0" 0)))
1205   (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0))))
1206   (set (newval) (sequence ()
1207                           (set (reg h-ar 0) (and newval #xffff))
1208                           (set (reg h-ar 1) (and (srl newval 16) #xffff)))))
1209
1210 (define-hardware
1211   (name h-a0)
1212   (comment "16 bit view of address register")
1213   (attrs all-isas VIRTUAL)
1214   (type register HI)
1215   (indices keyword "" (("a0" 0)))
1216   (get () (reg h-ar 0))
1217   (set (newval) (set (reg h-ar 0) newval)))
1218
1219 (define-hardware
1220   (name h-a1)
1221   (comment "16 bit view of address register")
1222   (attrs all-isas VIRTUAL)
1223   (type register HI)
1224   (indices keyword "" (("a1" 1)))
1225   (get () (reg h-ar 1))
1226   (set (newval) (set (reg h-ar 1) newval)))
1227
1228 ; SB Register
1229 (define-hardware
1230   (name h-sb)
1231   (comment "SB register")
1232   (attrs all-isas)
1233   (type register USI)
1234   (get () (c-call USI "h_sb_get_handler"))
1235   (set (newval) (c-call VOID "h_sb_set_handler" newval))
1236 )
1237
1238 ; FB Register
1239 (define-hardware
1240   (name h-fb)
1241   (comment "FB register")
1242   (attrs all-isas)
1243   (type register USI)
1244   (get () (c-call USI "h_fb_get_handler"))
1245   (set (newval) (c-call VOID "h_fb_set_handler" newval))
1246 )
1247
1248 ; SP Register
1249 (define-hardware
1250   (name h-sp)
1251   (comment "SP register")
1252   (attrs all-isas)
1253   (type register USI)
1254   (get () (c-call USI "h_sp_get_handler"))
1255   (set (newval) (c-call VOID "h_sp_set_handler" newval))
1256 )
1257
1258 ;-------------------------------------------------------------
1259 ; condition-code bits
1260 ;-------------------------------------------------------------
1261
1262 (define-hardware
1263   (name h-sbit)
1264   (comment "sign bit")
1265   (attrs all-isas)
1266   (type register BI)
1267 )
1268
1269 (define-hardware
1270   (name h-zbit)
1271   (comment "zero bit")
1272   (attrs all-isas)
1273   (type register BI)
1274 )
1275
1276 (define-hardware
1277   (name h-obit)
1278   (comment "overflow bit")
1279   (attrs all-isas)
1280   (type register BI)
1281 )
1282
1283 (define-hardware
1284   (name h-cbit)
1285   (comment "carry bit")
1286   (attrs all-isas)
1287   (type register BI)
1288 )
1289
1290 (define-hardware
1291   (name h-ubit)
1292   (comment "stack pointer select bit")
1293   (attrs all-isas)
1294   (type register BI)
1295 )
1296
1297 (define-hardware
1298   (name h-ibit)
1299   (comment "interrupt enable bit")
1300   (attrs all-isas)
1301   (type register BI)
1302 )
1303
1304 (define-hardware
1305   (name h-bbit)
1306   (comment "register bank select bit")
1307   (attrs all-isas)
1308   (type register BI)
1309 )
1310
1311 (define-hardware
1312   (name h-dbit)
1313   (comment "debug bit")
1314   (attrs all-isas)
1315   (type register BI)
1316 )
1317
1318 (define-hardware
1319   (name h-dct0)
1320   (comment "dma transfer count 000")
1321   (attrs all-isas)
1322   (type register UHI)
1323 )
1324 (define-hardware
1325   (name h-dct1)
1326   (comment "dma transfer count 001")
1327   (attrs all-isas)
1328   (type register UHI)
1329 )
1330 (define-hardware
1331   (name h-svf)
1332   (comment "save flag 011")
1333   (attrs all-isas)
1334   (type register UHI)
1335 )
1336 (define-hardware
1337   (name h-drc0)
1338   (comment "dma transfer count reload 100")
1339   (attrs all-isas)
1340   (type register UHI)
1341 )
1342 (define-hardware
1343   (name h-drc1)
1344   (comment "dma transfer count reload 101")
1345   (attrs all-isas)
1346   (type register UHI)
1347 )
1348 (define-hardware
1349   (name h-dmd0)
1350   (comment "dma mode 110")
1351   (attrs all-isas)
1352   (type register UQI)
1353 )
1354 (define-hardware
1355   (name h-dmd1)
1356   (comment "dma mode 111")
1357   (attrs all-isas)
1358   (type register UQI)
1359 )
1360 (define-hardware
1361   (name h-intb)
1362   (comment "interrupt table 000")
1363   (attrs all-isas)
1364   (type register USI)
1365 )
1366 (define-hardware
1367   (name h-svp)
1368   (comment "save pc 100")
1369   (attrs all-isas)
1370   (type register UHI)
1371 )
1372 (define-hardware
1373   (name h-vct)
1374   (comment "vector 101")
1375   (attrs all-isas)
1376   (type register USI)
1377 )
1378 (define-hardware
1379   (name h-isp)
1380   (comment "interrupt stack ptr 111")
1381   (attrs all-isas)
1382   (type register USI)
1383 )
1384 (define-hardware
1385   (name h-dma0)
1386   (comment "dma mem addr 010")
1387   (attrs all-isas)
1388   (type register USI)
1389 )
1390 (define-hardware
1391   (name h-dma1)
1392   (comment "dma mem addr 011")
1393   (attrs all-isas)
1394   (type register USI)
1395 )
1396 (define-hardware
1397   (name h-dra0)
1398   (comment "dma mem addr reload 100")
1399   (attrs all-isas)
1400   (type register USI)
1401 )
1402 (define-hardware
1403   (name h-dra1)
1404   (comment "dma mem addr reload 101")
1405   (attrs all-isas)
1406   (type register USI)
1407 )
1408 (define-hardware
1409   (name h-dsa0)
1410   (comment "dma sfr addr 110")
1411   (attrs all-isas)
1412   (type register USI)
1413 )
1414 (define-hardware
1415   (name h-dsa1)
1416   (comment "dma sfr addr 111")
1417   (attrs all-isas)
1418   (type register USI)
1419 )
1420
1421 ;-------------------------------------------------------------
1422 ; Condition code operand hardware
1423 ;-------------------------------------------------------------
1424
1425 (define-hardware
1426   (name h-cond16)
1427   (comment "condition code hardware for m16c")
1428   (attrs m16c-isa MACH16)
1429   (type immediate UQI)
1430   (values keyword ""
1431           (("geu" #x00) ("c"  #x00)
1432            ("gtu" #x01)
1433            ("eq"  #x02) ("z"  #x02)
1434            ("n"   #x03)
1435            ("le"  #x04)
1436            ("o"   #x05)
1437            ("ge"  #x06)
1438            ("ltu" #xf8) ("nc" #xf8)
1439            ("leu" #xf9)
1440            ("ne"  #xfa) ("nz" #xfa)
1441            ("pz"  #xfb)
1442            ("gt"  #xfc)
1443            ("no"  #xfd)
1444            ("lt"  #xfe)
1445           )
1446   )
1447 )
1448 (define-hardware
1449   (name h-cond16c)
1450   (comment "condition code hardware for m16c")
1451   (attrs m16c-isa MACH16)
1452   (type immediate UQI)
1453   (values keyword ""
1454           (("geu" #x00) ("c"  #x00)
1455            ("gtu" #x01)
1456            ("eq"  #x02) ("z"  #x02)
1457            ("n"   #x03)
1458            ("ltu" #x04) ("nc" #x04)
1459            ("leu" #x05)
1460            ("ne"  #x06) ("nz" #x06)
1461            ("pz"  #x07)
1462            ("le"  #x08)
1463            ("o"   #x09)
1464            ("ge"  #x0a)
1465            ("gt"  #x0c)
1466            ("no"  #x0d)
1467            ("lt"  #x0e)
1468           )
1469   )
1470 )
1471 (define-hardware
1472   (name h-cond16j)
1473   (comment "condition code hardware for m16c")
1474   (attrs m16c-isa MACH16)
1475   (type immediate UQI)
1476   (values keyword ""
1477           (("le"  #x08)
1478            ("o"   #x09)
1479            ("ge"  #x0a)
1480            ("gt"  #x0c)
1481            ("no"  #x0d)
1482            ("lt"  #x0e)
1483           )
1484   )
1485 )
1486 (define-hardware
1487   (name h-cond16j-5)
1488   (comment "condition code hardware for m16c")
1489   (attrs m16c-isa MACH16)
1490   (type immediate UQI)
1491   (values keyword ""
1492           (("geu" #x00) ("c"  #x00)
1493            ("gtu" #x01)
1494            ("eq"  #x02) ("z"  #x02)
1495            ("n"   #x03)
1496            ("ltu" #x04) ("nc" #x04)
1497            ("leu" #x05)
1498            ("ne"  #x06) ("nz" #x06)
1499            ("pz"  #x07)
1500           )
1501   )
1502 )
1503
1504 (define-hardware
1505   (name h-cond32)
1506   (comment "condition code hardware for m32c")
1507   (attrs m32c-isa MACH32)
1508   (type immediate UQI)
1509   (values keyword ""
1510           (("ltu" #x00) ("nc" #x00)
1511            ("leu" #x01)
1512            ("ne"  #x02) ("nz" #x02)
1513            ("pz"  #x03)
1514            ("no"  #x04)
1515            ("gt"  #x05)
1516            ("ge"  #x06)
1517            ("geu" #x08) ("c"  #x08)
1518            ("gtu" #x09)
1519            ("eq"  #x0a) ("z"  #x0a)
1520            ("n"   #x0b)
1521            ("o"   #x0c)
1522            ("le"  #x0d)
1523            ("lt"  #x0e)
1524           )
1525   )
1526 )
1527
1528 (define-hardware
1529   (name h-cr1-32)
1530   (comment "control registers")
1531   (attrs m32c-isa MACH32)
1532   (type immediate UQI)
1533   (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4)
1534                        ("drc1" 5) ("dmd0" 6) ("dmd1" 7))))
1535 (define-hardware
1536   (name h-cr2-32)
1537   (comment "control registers")
1538   (attrs m32c-isa MACH32)
1539   (type immediate UQI)
1540   (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4)
1541                        ("vct" 5) ("isp" 7))))
1542
1543 (define-hardware
1544   (name h-cr3-32)
1545   (comment "control registers")
1546   (attrs m32c-isa MACH32)
1547   (type immediate UQI)
1548   (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4)
1549                        ("dra1" 5) ("dsa0" 6) ("dsa1" 7))))
1550 (define-hardware
1551   (name h-cr-16)
1552   (comment "control registers")
1553   (attrs m16c-isa MACH16)
1554   (type immediate UQI)
1555   (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4)
1556                        ("sp" 5) ("sb" 6) ("fb" 7))))
1557
1558 (define-hardware
1559   (name h-flags)
1560   (comment "flag hardware for m32c")
1561   (attrs all-isas)
1562   (type immediate UQI)
1563   (values keyword ""
1564           (("c" #x0)
1565            ("d" #x1)
1566            ("z"  #x2)
1567            ("s"  #x3)
1568            ("b"  #x4)
1569            ("o"  #x5)
1570            ("i"  #x6)
1571            ("u"  #x7)
1572           )
1573   )
1574 )
1575
1576 ;-------------------------------------------------------------
1577 ; Misc helper hardware
1578 ;-------------------------------------------------------------
1579
1580 (define-hardware
1581   (name h-shimm)
1582   (comment "shift immediate")
1583   (attrs all-isas)
1584   (type immediate (INT 4))
1585   (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6)
1586                       ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4)
1587                       ("-6" -3) ("-7" -2) ("-8" -1)
1588                       )))
1589 (define-hardware
1590   (name h-bit-index)
1591   (comment "bit index for the next insn")
1592   (attrs m32c-isa MACH32)
1593   (type register UHI)
1594 )
1595 (define-hardware
1596   (name h-src-index)
1597   (comment "source index for the next insn")
1598   (attrs m32c-isa MACH32)
1599   (type register UHI)
1600 )
1601 (define-hardware
1602   (name h-dst-index)
1603   (comment "destination index for the next insn")
1604   (attrs m32c-isa MACH32)
1605   (type register UHI)
1606 )
1607 (define-hardware
1608   (name h-src-indirect)
1609   (comment "indirect src for the next insn")
1610   (attrs all-isas)
1611   (type register UHI)
1612 )
1613 (define-hardware
1614   (name h-dst-indirect)
1615   (comment "indirect dst for the next insn")
1616   (attrs all-isas)
1617   (type register UHI)
1618 )
1619 (define-hardware
1620   (name h-none)
1621   (comment "for storing unused values")
1622   (attrs m32c-isa MACH32)
1623   (type register SI)
1624 )
1625 \f
1626 ;=============================================================
1627 ; Operands
1628 ;-------------------------------------------------------------
1629 ; Source Registers
1630 ;-------------------------------------------------------------
1631
1632 (dnop Src16RnQI  "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn)
1633 (dnop Src16RnHI  "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn)
1634
1635 (dnop Src32RnUnprefixedQI  "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI)
1636 (dnop Src32RnUnprefixedHI  "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI)
1637 (dnop Src32RnUnprefixedSI  "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI)
1638
1639 (dnop Src32RnPrefixedQI  "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI)
1640 (dnop Src32RnPrefixedHI  "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI)
1641 (dnop Src32RnPrefixedSI  "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI)
1642
1643 (dnop Src16An    "address register"         (MACH16 m16c-isa) h-ar    f-src16-an)
1644 (dnop Src16AnQI  "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an)
1645 (dnop Src16AnHI  "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an)
1646
1647 (dnop Src32AnUnprefixed    "address register"         (MACH32 m32c-isa) h-ar    f-src32-an-unprefixed)
1648 (dnop Src32AnUnprefixedQI  "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed)
1649 (dnop Src32AnUnprefixedHI  "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed)
1650 (dnop Src32AnUnprefixedSI  "address register SI view" (MACH32 m32c-isa) h-ar    f-src32-an-unprefixed)
1651
1652 (dnop Src32AnPrefixed    "address register"         (MACH32 m32c-isa) h-ar    f-src32-an-prefixed)
1653 (dnop Src32AnPrefixedQI  "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed)
1654 (dnop Src32AnPrefixedHI  "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed)
1655 (dnop Src32AnPrefixedSI  "address register SI view" (MACH32 m32c-isa) h-ar    f-src32-an-prefixed)
1656
1657 ; Destination Registers
1658 ;
1659 (dnop Dst16RnQI  "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn)
1660 (dnop Dst16RnHI  "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1661 (dnop Dst16RnSI  "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn)
1662 (dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext)
1663
1664 (dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil)
1665 (dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0  f-nil)
1666
1667 (dnop Dst32RnUnprefixedQI  "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1668 (dnop Dst32RnUnprefixedHI  "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI)
1669 (dnop Dst32RnUnprefixedSI  "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI)
1670 (dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed)
1671 (dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed)
1672
1673 (dnop Dst32RnPrefixedQI    "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1674 (dnop Dst32RnPrefixedHI    "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI)
1675 (dnop Dst32RnPrefixedSI    "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI)
1676
1677 (dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s)
1678
1679 (dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s)
1680
1681 (dnop Bit16Rn  "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1682
1683 (dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1684 (dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1685
1686 (dnop R0   "r0"   (all-isas) h-r0   f-nil)
1687 (dnop R1   "r1"   (all-isas) h-r1   f-nil)
1688 (dnop R2   "r2"   (all-isas) h-r2   f-nil)
1689 (dnop R3   "r3"   (all-isas) h-r3   f-nil)
1690 (dnop R0l  "r0l"  (all-isas) h-r0l  f-nil)
1691 (dnop R0h  "r0h"  (all-isas) h-r0h  f-nil)
1692 (dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil)
1693 (dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil)
1694 (dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil)
1695
1696 (dnop Dst16An    "address register"         (MACH16 m16c-isa) h-ar    f-dst16-an)
1697 (dnop Dst16AnQI  "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an)
1698 (dnop Dst16AnHI  "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an)
1699 (dnop Dst16AnSI  "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an)
1700 (dnop Dst16An-S  "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s)
1701
1702 (dnop Dst32AnUnprefixed   "address register"         (MACH32 m32c-isa) h-ar    f-dst32-an-unprefixed)
1703 (dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed)
1704 (dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed)
1705 (dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar    f-dst32-an-unprefixed)
1706
1707 (dnop Dst32AnExtUnprefixed "address register"        (MACH32 m32c-isa) h-ar    f-dst32-an-unprefixed)
1708
1709 (dnop Dst32AnPrefixed     "address register"         (MACH32 m32c-isa) h-ar    f-dst32-an-prefixed)
1710 (dnop Dst32AnPrefixedQI   "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed)
1711 (dnop Dst32AnPrefixedHI   "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed)
1712 (dnop Dst32AnPrefixedSI   "address register SI view" (MACH32 m32c-isa) h-ar    f-dst32-an-prefixed)
1713
1714 (dnop Bit16An  "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an)
1715
1716 (dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1717 (dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1718
1719 (dnop A0  "a0"   (all-isas) h-a0  f-nil)
1720 (dnop A1  "a1"   (all-isas) h-a1  f-nil)
1721
1722 (dnop sb  "SB register" (all-isas SEM-ONLY) h-sb f-nil)
1723 (dnop fb  "FB register" (all-isas SEM-ONLY) h-fb f-nil)
1724 (dnop sp  "SP register" (all-isas SEM-ONLY) h-sp f-nil)
1725
1726 (define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa)
1727   h-sint DFLT f-5-1
1728   ((parse "r0l_r0h") (print "r0l_r0h")) () ()
1729 )
1730
1731 (define-full-operand Regsetpop "popm regset" (all-isas) h-uint
1732    DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ())
1733 (define-full-operand Regsetpush "pushm regset" (all-isas) h-uint
1734    DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ())
1735
1736 (dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1)
1737 (dnop An16-push-S "a[01]"  (MACH16 m16c-isa) h-ar-HI f-4-1)
1738
1739 ;-------------------------------------------------------------
1740 ; Offsets and absolutes
1741 ;-------------------------------------------------------------
1742
1743 (define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas)
1744   h-uint DFLT f-dsp-8-u6
1745   ((parse "unsigned6")) () ()
1746 )
1747 (define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas)
1748   h-uint DFLT f-dsp-8-u8
1749   ((parse "unsigned8")) () ()
1750 )
1751 (define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas)
1752   h-uint DFLT f-dsp-8-u16
1753   ((parse "unsigned16")) () ()
1754 )
1755 (define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas)
1756   h-sint DFLT f-dsp-8-s8
1757   ((parse "signed8")) () ()
1758 )
1759 (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas)
1760   h-uint DFLT f-dsp-8-u24
1761   ((parse "unsigned24")) () ()
1762 )
1763 (define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas)
1764   h-uint DFLT f-dsp-10-u6
1765   ((parse "unsigned6")) () ()
1766 )
1767 (define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas)
1768   h-uint DFLT f-dsp-16-u8
1769   ((parse "unsigned8")) () ()
1770 )
1771 (define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas)
1772   h-uint DFLT f-dsp-16-u16
1773   ((parse "unsigned16")) () ()
1774 )
1775 (define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas)
1776   h-uint DFLT f-dsp-16-u24
1777   ((parse "unsigned20")) () ()
1778 )
1779 (define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas)
1780   h-uint DFLT f-dsp-16-u24
1781   ((parse "unsigned24")) () ()
1782 )
1783 (define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas)
1784   h-sint DFLT f-dsp-16-s8
1785   ((parse "signed8")) () ()
1786 )
1787 (define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas)
1788   h-sint DFLT f-dsp-16-s16
1789   ((parse "signed16")) () ()
1790 )
1791 (define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas)
1792   h-uint DFLT f-dsp-24-u8
1793   ((parse "unsigned8")) () ()
1794 )
1795 (define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas)
1796   h-uint DFLT f-dsp-24-u16
1797   ((parse "unsigned16")) () ()
1798 )
1799 (define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas)
1800   h-uint DFLT f-dsp-24-u24
1801   ((parse "unsigned20")) () ()
1802 )
1803 (define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas)
1804   h-uint DFLT f-dsp-24-u24
1805   ((parse "unsigned24")) () ()
1806 )
1807 (define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas)
1808   h-sint DFLT f-dsp-24-s8
1809   ((parse "signed8")) () ()
1810 )
1811 (define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas)
1812   h-sint DFLT f-dsp-24-s16
1813   ((parse "signed16")) () ()
1814 )
1815 (define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas)
1816   h-uint DFLT f-dsp-32-u8
1817   ((parse "unsigned8")) () ()
1818 )
1819 (define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas)
1820   h-uint DFLT f-dsp-32-u16
1821   ((parse "unsigned16")) () ()
1822 )
1823 (define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas)
1824   h-uint DFLT f-dsp-32-u24
1825   ((parse "unsigned24")) () ()
1826 )
1827 (define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas)
1828   h-uint DFLT f-dsp-32-u24
1829   ((parse "unsigned20")) () ()
1830 )
1831 (define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas)
1832   h-sint DFLT f-dsp-32-s8
1833   ((parse "signed8")) () ()
1834 )
1835 (define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas)
1836   h-sint DFLT f-dsp-32-s16
1837   ((parse "signed16")) () ()
1838 )
1839 (define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas)
1840   h-uint DFLT f-dsp-40-u8
1841   ((parse "unsigned8")) () ()
1842 )
1843 (define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas)
1844   h-sint DFLT f-dsp-40-s8
1845   ((parse "signed8")) () ()
1846 )
1847 (define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas)
1848   h-uint DFLT f-dsp-40-u16
1849   ((parse "unsigned16")) () ()
1850 )
1851 (define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas)
1852   h-sint DFLT f-dsp-40-s16
1853   ((parse "signed16")) () ()
1854 )
1855 (define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
1856   h-uint DFLT f-dsp-40-u24
1857   ((parse "unsigned24")) () ()
1858 )
1859 (define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas)
1860   h-uint DFLT f-dsp-48-u8
1861   ((parse "unsigned8")) () ()
1862 )
1863 (define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas)
1864   h-sint DFLT f-dsp-48-s8
1865   ((parse "signed8")) () ()
1866 )
1867 (define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas)
1868   h-uint DFLT f-dsp-48-u16
1869   ((parse "unsigned16")) () ()
1870 )
1871 (define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas)
1872   h-sint DFLT f-dsp-48-s16
1873   ((parse "signed16")) () ()
1874 )
1875 (define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas)
1876   h-uint DFLT f-dsp-48-u24
1877   ((parse "unsigned24")) () ()
1878 )
1879
1880 (define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas)
1881   h-sint DFLT f-imm-8-s4
1882   ((parse "signed4")) () ()
1883 )
1884 (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas)
1885   h-shimm DFLT f-imm-8-s4
1886   () () ()
1887 )
1888 (define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas)
1889   h-sint DFLT f-dsp-8-s8
1890   ((parse "signed8")) () ()
1891 )
1892 (define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas)
1893   h-sint DFLT f-dsp-8-s16
1894   ((parse "signed16")) () ()
1895 )
1896 (define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas)
1897   h-sint DFLT f-imm-12-s4
1898   ((parse "signed4")) () ()
1899 )
1900 (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1901   h-shimm DFLT f-imm-12-s4
1902   () () ()
1903 )
1904 (define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas)
1905   h-sint DFLT f-imm-13-u3
1906   ((parse "signed4")) () ()
1907 )
1908 (define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas)
1909   h-sint DFLT f-imm-20-s4
1910   ((parse "signed4")) () ()
1911 )
1912 (define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1913   h-shimm DFLT f-imm-20-s4
1914   () () ()
1915 )
1916 (define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas)
1917   h-sint DFLT f-dsp-16-s8
1918   ((parse "signed8")) () ()
1919 )
1920 (define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas)
1921   h-sint DFLT f-dsp-16-s16
1922   ((parse "signed16")) () ()
1923 )
1924 (define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas)
1925   h-sint DFLT f-dsp-16-s32
1926   ((parse "signed32")) () ()
1927 )
1928 (define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas)
1929   h-sint DFLT f-dsp-24-s8
1930   ((parse "signed8")) () ()
1931 )
1932 (define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas)
1933   h-sint DFLT f-dsp-24-s16
1934   ((parse "signed16")) () ()
1935 )
1936 (define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas)
1937   h-sint DFLT f-dsp-24-s32
1938   ((parse "signed32")) () ()
1939 )
1940 (define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas)
1941   h-sint DFLT f-dsp-32-s8
1942   ((parse "signed8")) () ()
1943 )
1944 (define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas)
1945   h-sint DFLT f-dsp-32-s32
1946   ((parse "signed32")) () ()
1947 )
1948 (define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas)
1949   h-sint DFLT f-dsp-32-s16
1950   ((parse "signed16")) () ()
1951 )
1952 (define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas)
1953   h-sint DFLT f-dsp-40-s8
1954   ((parse "signed8")) () ()
1955 )
1956 (define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas)
1957   h-sint DFLT f-dsp-40-s16
1958   ((parse "signed16")) () ()
1959 )
1960 (define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas)
1961   h-sint DFLT f-dsp-40-s32
1962   ((parse "signed32")) () ()
1963 )
1964 (define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas)
1965   h-sint DFLT f-dsp-48-s8
1966   ((parse "signed8")) () ()
1967 )
1968 (define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas)
1969   h-sint DFLT f-dsp-48-s16
1970   ((parse "signed16")) () ()
1971 )
1972 (define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas)
1973   h-sint DFLT f-dsp-48-s32
1974   ((parse "signed32")) () ()
1975 )
1976 (define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas)
1977   h-sint DFLT f-dsp-56-s8
1978   ((parse "signed8")) () ()
1979 )
1980 (define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas)
1981   h-sint DFLT f-dsp-56-s16
1982   ((parse "signed16")) () ()
1983 )
1984 (define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas)
1985   h-sint DFLT f-dsp-64-s16
1986   ((parse "signed16")) () ()
1987 )
1988 (define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa)
1989   h-sint DFLT f-imm1-S
1990   ((parse "imm1_S")) () ()
1991 )
1992 (define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa)
1993   h-sint DFLT f-imm3-S
1994   ((parse "imm3_S")) () ()
1995 )
1996
1997 ;-------------------------------------------------------------
1998 ; Bit numbers
1999 ;-------------------------------------------------------------
2000
2001 (define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa)
2002   h-uint DFLT f-dsp-16-u8
2003   ((parse "Bitno16R")) () ()
2004 )
2005 (dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed)
2006 (dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed)
2007
2008 (define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa)
2009   h-uint DFLT f-dsp-16-u8
2010   ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () ()
2011 )
2012 (define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa)
2013   h-sint DFLT f-dsp-16-s8
2014   ((parse "signed_bitbase8") (print "signed_bitbase")) () ()
2015 )
2016 (define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa)
2017   h-uint DFLT f-dsp-16-u16
2018   ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () ()
2019 )
2020 (define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa)
2021   h-uint DFLT f-bitbase16-u11-S
2022   ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2023 )
2024
2025 (define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa)
2026   h-uint DFLT f-bitbase32-16-u11-unprefixed
2027   ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2028 )
2029 (define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa)
2030   h-sint DFLT f-bitbase32-16-s11-unprefixed
2031   ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2032 )
2033 (define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa)
2034   h-uint DFLT f-bitbase32-16-u19-unprefixed
2035   ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2036 )
2037 (define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa)
2038   h-sint DFLT f-bitbase32-16-s19-unprefixed
2039   ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2040 )
2041 (define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa)
2042   h-uint DFLT f-bitbase32-16-u27-unprefixed
2043   ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2044 )
2045 (define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa)
2046   h-uint DFLT f-bitbase32-24-u11-prefixed
2047   ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2048 )
2049 (define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa)
2050   h-sint DFLT f-bitbase32-24-s11-prefixed
2051   ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2052 )
2053 (define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa)
2054   h-uint DFLT f-bitbase32-24-u19-prefixed
2055   ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2056 )
2057 (define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa)
2058   h-sint DFLT f-bitbase32-24-s19-prefixed
2059   ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2060 )
2061 (define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa)
2062   h-uint DFLT f-bitbase32-24-u27-prefixed
2063   ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2064 )
2065 ;-------------------------------------------------------------
2066 ; Labels
2067 ;-------------------------------------------------------------
2068
2069 (define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX)
2070   h-iaddr DFLT f-lab-5-3
2071   ((parse "lab_5_3")) () () )
2072
2073 (define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX)
2074   h-iaddr DFLT f-lab32-jmp-s
2075   ((parse "lab_5_3")) () () )
2076
2077 (dnop Lab-8-8     "8 bit label"  (all-isas RELAX) h-iaddr f-lab-8-8)
2078 (dnop Lab-8-16    "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
2079 (dnop Lab-8-24    "24 bit label" (all-isas) h-iaddr f-lab-8-24)
2080 (dnop Lab-16-8    "8 bit label"  (all-isas RELAX) h-iaddr f-lab-16-8)
2081 (dnop Lab-24-8    "8 bit label"  (all-isas) h-iaddr f-lab-24-8)
2082 (dnop Lab-32-8    "8 bit label"  (all-isas) h-iaddr f-lab-32-8)
2083 (dnop Lab-40-8    "8 bit label"  (all-isas) h-iaddr f-lab-40-8)
2084
2085 ;-------------------------------------------------------------
2086 ; Condition code bits
2087 ;-------------------------------------------------------------
2088
2089 (dnop sbit "negative    bit"      (SEM-ONLY all-isas) h-sbit f-nil)
2090 (dnop obit "overflow    bit"      (SEM-ONLY all-isas) h-obit f-nil)
2091 (dnop zbit "zero        bit"      (SEM-ONLY all-isas) h-zbit f-nil)
2092 (dnop cbit "carry       bit"      (SEM-ONLY all-isas) h-cbit f-nil)
2093 (dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil)
2094 (dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil)
2095 (dnop bbit "reg bank select bit"  (SEM-ONLY all-isas) h-bbit f-nil)
2096 (dnop dbit "debug       bit"      (SEM-ONLY all-isas) h-dbit f-nil)
2097
2098 ;-------------------------------------------------------------
2099 ; Condition operands
2100 ;-------------------------------------------------------------
2101
2102 (define-pmacro (cond-operand mach offset)
2103   (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8))
2104 )
2105
2106 (cond-operand 16 16)
2107 (cond-operand 16 24)
2108 (cond-operand 16 32)
2109 (cond-operand 32 16)
2110 (cond-operand 32 24)
2111 (cond-operand 32 32)
2112 (cond-operand 32 40)
2113
2114 (dnop cond16c  "condition" (m16c-isa) h-cond16c f-cond16)
2115 (dnop cond16j  "condition" (m16c-isa) h-cond16j f-cond16)
2116 (dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5)
2117 (dnop cond32   "condition" (m32c-isa) h-cond32  f-cond32)
2118 (dnop cond32j  "condition" (m32c-isa) h-cond32  f-cond32j)
2119 (dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16)
2120 (dnop flags16  "flags" (m16c-isa) h-flags f-9-3)
2121 (dnop flags32  "flags" (m32c-isa) h-flags f-13-3)
2122 (dnop cr16     "control" (m16c-isa) h-cr-16 f-9-3)
2123 (dnop cr1-Unprefixed-32   "control" (m32c-isa) h-cr1-32 f-13-3)
2124 (dnop cr1-Prefixed-32   "control" (m32c-isa) h-cr1-32 f-21-3)
2125 (dnop cr2-32   "control" (m32c-isa) h-cr2-32 f-13-3)
2126 (dnop cr3-Unprefixed-32   "control" (m32c-isa) h-cr3-32 f-13-3)
2127 (dnop cr3-Prefixed-32   "control" (m32c-isa) h-cr3-32 f-21-3)
2128
2129 ;-------------------------------------------------------------
2130 ; Suffixes
2131 ;-------------------------------------------------------------
2132
2133 (define-full-operand Z "Suffix for zero format insns" (all-isas)
2134   h-sint DFLT f-nil
2135   ((parse "Z") (print "Z")) () ()
2136 )
2137 (define-full-operand S "Suffix for short format insns" (all-isas)
2138   h-sint DFLT f-nil
2139   ((parse "S") (print "S")) () ()
2140 )
2141 (define-full-operand Q "Suffix for quick format insns" (all-isas)
2142   h-sint DFLT f-nil
2143   ((parse "Q") (print "Q")) () ()
2144 )
2145 (define-full-operand G "Suffix for general format insns" (all-isas)
2146   h-sint DFLT f-nil
2147   ((parse "G") (print "G")) () ()
2148 )
2149 (define-full-operand X "Empty suffix" (all-isas)
2150   h-sint DFLT f-nil
2151   ((parse "X") (print "X")) () ()
2152 )
2153 (define-full-operand size "any size specifier" (all-isas)
2154   h-sint DFLT f-nil
2155   ((parse "size") (print "size")) () ()
2156 )
2157 ;-------------------------------------------------------------
2158 ; Misc
2159 ;-------------------------------------------------------------
2160
2161 (dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil)
2162 (dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil)
2163 (dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil)
2164 (dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil)
2165 \f
2166 ;=============================================================
2167 ; Derived Operands
2168
2169 ; Memory reference macros that clip addresses appropriately.  Refer to
2170 ; memory at ADDRESS in MODE, clipped appropriately for either the m16c
2171 ; or m32c.
2172 (define-pmacro (mem16 mode address)
2173   (mem mode (and #xffff address)))
2174
2175 (define-pmacro (mem32 mode address)
2176   (mem mode (and #xffffff address)))
2177
2178 ; Like mem16 and mem32, but takes MACH as a parameter.  MACH must be
2179 ; either 16 or 32.
2180 (define-pmacro (mem-mach mach mode address)
2181   ((.sym mem mach) mode address))
2182
2183 ;-------------------------------------------------------------
2184 ; Source
2185 ;-------------------------------------------------------------
2186 ; Rn direct
2187 ;-------------------------------------------------------------
2188
2189 (define-pmacro (src16-Rn-direct-operand xmode)
2190   (begin
2191     (define-derived-operand
2192       (name (.sym src16-Rn-direct- xmode))
2193       (comment (.str "m16c Rn direct source " xmode))
2194       (attrs (machine 16))
2195       (mode xmode)
2196       (args ((.sym Src16Rn xmode)))
2197       (syntax (.str "$Src16Rn" xmode))
2198       (base-ifield f-8-4)
2199       (encoding (+ (f-8-2 0) (.sym Src16Rn xmode)))
2200       (ifield-assertion (eq f-8-2 0))
2201       (getter (trunc xmode (.sym Src16Rn xmode)))
2202       (setter (set (.sym Src16Rn xmode) newval))
2203     )
2204   )
2205 )
2206 (src16-Rn-direct-operand QI)
2207 (src16-Rn-direct-operand HI)
2208
2209 (define-pmacro (src32-Rn-direct-operand group base xmode)
2210   (begin
2211     (define-derived-operand
2212       (name (.sym src32-Rn-direct- group - xmode))
2213       (comment (.str "m32c Rn direct source " xmode))
2214       (attrs (machine 32))
2215       (mode xmode)
2216       (args ((.sym Src32Rn group xmode)))
2217       (syntax (.str "$Src32Rn" group xmode))
2218       (base-ifield (.sym f- base -11))
2219       (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode)))
2220       (ifield-assertion (eq (.sym f- base -3) 4))
2221       (getter (trunc xmode (.sym Src32Rn group xmode)))
2222       (setter (set (.sym Src32Rn group xmode) newval))
2223     )
2224   )
2225 )
2226
2227 (src32-Rn-direct-operand Unprefixed  1 QI)
2228 (src32-Rn-direct-operand   Prefixed  9 QI)
2229 (src32-Rn-direct-operand Unprefixed  1 HI)
2230 (src32-Rn-direct-operand   Prefixed  9 HI)
2231 (src32-Rn-direct-operand Unprefixed  1 SI)
2232 (src32-Rn-direct-operand   Prefixed  9 SI)
2233
2234 ;-------------------------------------------------------------
2235 ; An direct
2236 ;-------------------------------------------------------------
2237
2238 (define-pmacro (src16-An-direct-operand xmode)
2239   (begin
2240     (define-derived-operand
2241       (name (.sym src16-An-direct- xmode))
2242       (comment (.str "m16c An direct destination " xmode))
2243       (attrs (machine 16))
2244       (mode xmode)
2245       (args ((.sym Src16An xmode)))
2246       (syntax (.str "$Src16An" xmode))
2247       (base-ifield f-8-4)
2248       (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode)))
2249       (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0)))
2250       (getter (trunc xmode (.sym Src16An xmode)))
2251       (setter (set (.sym Src16An xmode) newval))
2252     )
2253   )
2254 )
2255 (src16-An-direct-operand QI)
2256 (src16-An-direct-operand HI)
2257
2258 (define-pmacro (src32-An-direct-operand group base1 base2 xmode)
2259   (begin
2260     (define-derived-operand
2261       (name (.sym src32-An-direct- group - xmode))
2262       (comment (.str "m32c An direct destination " xmode))
2263       (attrs (machine 32))
2264       (mode xmode)
2265       (args ((.sym Src32An group xmode)))
2266       (syntax (.str "$Src32An" group xmode))
2267       (base-ifield (.sym f- base1 -11))
2268       (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode)))
2269       (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
2270       (getter (trunc xmode (.sym Src32An group xmode)))
2271       (setter (set (.sym Src32An group xmode) newval))
2272     )
2273   )
2274 )
2275
2276 (src32-An-direct-operand Unprefixed 1 10 QI)
2277 (src32-An-direct-operand Unprefixed 1 10 HI)
2278 (src32-An-direct-operand Unprefixed 1 10 SI)
2279 (src32-An-direct-operand Prefixed   9 18 QI)
2280 (src32-An-direct-operand Prefixed   9 18 HI)
2281 (src32-An-direct-operand Prefixed   9 18 SI)
2282
2283 ;-------------------------------------------------------------
2284 ; An indirect
2285 ;-------------------------------------------------------------
2286
2287 (define-pmacro (src16-An-indirect-operand xmode)
2288   (begin
2289     (define-derived-operand
2290       (name (.sym src16-An-indirect- xmode))
2291       (comment (.str "m16c An indirect destination " xmode))
2292       (attrs (machine 16))
2293       (mode xmode)
2294       (args (Src16An))
2295       (syntax "[$Src16An]")
2296       (base-ifield f-8-4)
2297       (encoding (+ (f-8-2 1) (f-10-1 1) Src16An))
2298       (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1)))
2299       (getter (mem16 xmode Src16An))
2300       (setter (set (mem16 xmode Src16An) newval))
2301     )
2302   )
2303 )
2304 (src16-An-indirect-operand QI)
2305 (src16-An-indirect-operand HI)
2306
2307 (define-pmacro (src32-An-indirect-operand group base1 base2 xmode)
2308   (begin
2309     (define-derived-operand
2310       (name (.sym src32-An-indirect- group - xmode))
2311       (comment (.str "m32c An indirect destination " xmode))
2312       (attrs (machine 32))
2313       (mode xmode)
2314       (args ((.sym Src32An group)))
2315       (syntax (.str "[$Src32An" group "]"))
2316       (base-ifield (.sym f- base1 -11))
2317       (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group)))
2318       (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
2319       (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group)
2320                        (const 0)))
2321       (setter (c-call DFLT (.str "operand_setter_" xmode)  newval
2322                       (.sym Src32An group) (const 0)))
2323 ;      (getter (mem32 xmode (.sym Src32An group)))
2324 ;      (setter (set (mem32 xmode (.sym Src32An group)) newval))
2325     )
2326   )
2327 )
2328
2329 (src32-An-indirect-operand Unprefixed 1 10 QI)
2330 (src32-An-indirect-operand Unprefixed 1 10 HI)
2331 (src32-An-indirect-operand Unprefixed 1 10 SI)
2332 (src32-An-indirect-operand Prefixed   9 18 QI)
2333 (src32-An-indirect-operand Prefixed   9 18 HI)
2334 (src32-An-indirect-operand Prefixed   9 18 SI)
2335
2336 ;-------------------------------------------------------------
2337 ; dsp:d[r] relative
2338 ;-------------------------------------------------------------
2339
2340 (define-pmacro (src16-relative-operand xmode)
2341   (begin
2342     (define-derived-operand
2343       (name (.sym src16-16-8-SB-relative- xmode))
2344       (comment (.str "m16c dsp:8[sb] relative destination " xmode))
2345       (attrs (machine 16))
2346       (mode xmode)
2347       (args (Dsp-16-u8))
2348       (syntax "${Dsp-16-u8}[sb]")
2349       (base-ifield f-8-4)
2350       (encoding (+ (f-8-4 #xA) Dsp-16-u8))
2351       (ifield-assertion (eq f-8-4 #xA))
2352       (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb))))
2353       (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval))
2354     )
2355     (define-derived-operand
2356       (name (.sym src16-16-16-SB-relative- xmode))
2357       (comment (.str "m16c dsp:16[sb] relative destination " xmode))
2358       (attrs (machine 16))
2359       (mode xmode)
2360       (args (Dsp-16-u16))
2361       (syntax "${Dsp-16-u16}[sb]")
2362       (base-ifield f-8-4)
2363       (encoding (+ (f-8-4 #xE) Dsp-16-u16))
2364       (ifield-assertion (eq f-8-4 #xE))
2365       (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb))))
2366       (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval))
2367     )
2368     (define-derived-operand
2369       (name (.sym src16-16-8-FB-relative- xmode))
2370       (comment (.str "m16c dsp:8[fb] relative destination " xmode))
2371       (attrs (machine 16))
2372       (mode xmode)
2373       (args (Dsp-16-s8))
2374       (syntax "${Dsp-16-s8}[fb]")
2375       (base-ifield f-8-4)
2376       (encoding (+ (f-8-4 #xB) Dsp-16-s8))
2377       (ifield-assertion (eq f-8-4 #xB))
2378       (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb))))
2379       (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval))
2380     )
2381     (define-derived-operand
2382       (name (.sym src16-16-8-An-relative- xmode))
2383       (comment (.str "m16c dsp:8[An] relative destination " xmode))
2384       (attrs (machine 16))
2385       (mode xmode)
2386       (args (Src16An Dsp-16-u8))
2387       (syntax "${Dsp-16-u8}[$Src16An]")
2388       (base-ifield f-8-4)
2389       (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An))
2390       (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0)))
2391       (getter (mem16 xmode (add Dsp-16-u8 Src16An)))
2392       (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval))
2393     )
2394     (define-derived-operand
2395       (name (.sym src16-16-16-An-relative- xmode))
2396       (comment (.str "m16c dsp:16[An] relative destination " xmode))
2397       (attrs (machine 16))
2398       (mode xmode)
2399       (args (Src16An Dsp-16-u16))
2400       (syntax "${Dsp-16-u16}[$Src16An]")
2401       (base-ifield f-8-4)
2402       (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An))
2403       (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
2404       (getter (mem16 xmode (add Dsp-16-u16 Src16An)))
2405       (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval))
2406     )
2407   )
2408 )
2409
2410 (src16-relative-operand QI)
2411 (src16-relative-operand HI)
2412
2413 (define-pmacro (src32-relative-operand offset group base1 base2 xmode)
2414   (begin
2415     (define-derived-operand
2416       (name (.sym src32- offset -8-SB-relative- group - xmode))
2417       (comment (.str "m32c dsp:8[sb] relative destination " xmode))
2418       (attrs (machine 32))
2419       (mode xmode)
2420       (args ((.sym Dsp- offset -u8)))
2421       (syntax (.str "${Dsp-" offset "-u8}[sb]"))
2422       (base-ifield (.sym f- base1 -11))
2423       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
2424       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
2425       (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8)))
2426       (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8)))
2427 ;       (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
2428 ;       (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
2429     )
2430     (define-derived-operand
2431       (name (.sym src32- offset -16-SB-relative- group - xmode))
2432       (comment (.str "m32c dsp:16[sb] relative destination " xmode))
2433       (attrs (machine 32))
2434       (mode xmode)
2435       (args ((.sym Dsp- offset -u16)))
2436       (syntax (.str "${Dsp-" offset "-u16}[sb]"))
2437       (base-ifield (.sym f- base1 -11))
2438       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
2439       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
2440       (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16)))
2441       (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16)))
2442 ;       (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
2443 ;       (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
2444     )
2445     (define-derived-operand
2446       (name (.sym src32- offset -8-FB-relative- group - xmode))
2447       (comment (.str "m32c dsp:8[fb] relative destination " xmode))
2448       (attrs (machine 32))
2449       (mode xmode)
2450       (args ((.sym Dsp- offset -s8)))
2451       (syntax (.str "${Dsp-" offset "-s8}[fb]"))
2452       (base-ifield (.sym f- base1 -11))
2453       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
2454       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
2455       (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8)))
2456       (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8)))
2457 ;       (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
2458 ;       (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
2459     )
2460     (define-derived-operand
2461       (name (.sym src32- offset -16-FB-relative- group - xmode))
2462       (comment (.str "m32c dsp:16[fb] relative destination " xmode))
2463       (attrs (machine 32))
2464       (mode xmode)
2465       (args ((.sym Dsp- offset -s16)))
2466       (syntax (.str "${Dsp-" offset "-s16}[fb]"))
2467       (base-ifield (.sym f- base1 -11))
2468       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
2469       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
2470       (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16)))
2471       (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16)))
2472 ;       (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))))
2473 ;       (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
2474     )
2475     (define-derived-operand
2476       (name (.sym src32- offset -8-An-relative- group - xmode))
2477       (comment (.str "m32c dsp:8[An] relative destination " xmode))
2478       (attrs (machine 32))
2479       (mode xmode)
2480       (args ((.sym Src32An group) (.sym Dsp- offset -u8)))
2481       (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]"))
2482       (base-ifield (.sym f- base1 -11))
2483       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group)))
2484       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
2485       (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8)))
2486       (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8)))
2487 ;       (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))))
2488 ;       (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval))
2489     )
2490     (define-derived-operand
2491       (name (.sym src32- offset -16-An-relative- group - xmode))
2492       (comment (.str "m32c dsp:16[An] relative destination " xmode))
2493       (attrs (machine 32))
2494       (mode xmode)
2495       (args ((.sym Src32An group) (.sym Dsp- offset -u16)))
2496       (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]"))
2497       (base-ifield (.sym f- base1 -11))
2498       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group)))
2499       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
2500       (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16)))
2501       (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16)))
2502 ;       (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))))
2503 ;       (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval))
2504     )
2505     (define-derived-operand
2506       (name (.sym src32- offset -24-An-relative- group - xmode))
2507       (comment (.str "m32c dsp:16[An] relative destination " xmode))
2508       (attrs (machine 32))
2509       (mode xmode)
2510       (args ((.sym Src32An group) (.sym Dsp- offset -u24)))
2511       (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]"))
2512       (base-ifield (.sym f- base1 -11))
2513       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group)))
2514       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
2515       (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) ))
2516       (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24)))
2517 ;       (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))))
2518 ;       (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval))
2519     )
2520   )
2521 )
2522
2523 (src32-relative-operand 16 Unprefixed 1 10 QI)
2524 (src32-relative-operand 16 Unprefixed 1 10 HI)
2525 (src32-relative-operand 16 Unprefixed 1 10 SI)
2526 (src32-relative-operand 24 Prefixed   9 18 QI)
2527 (src32-relative-operand 24 Prefixed   9 18 HI)
2528 (src32-relative-operand 24 Prefixed   9 18 SI)
2529
2530 ;-------------------------------------------------------------
2531 ; Absolute address
2532 ;-------------------------------------------------------------
2533
2534 (define-pmacro (src16-absolute xmode)
2535   (begin
2536     (define-derived-operand
2537       (name (.sym src16-16-16-absolute- xmode))
2538       (comment (.str "m16c absolute address " xmode))
2539       (attrs (machine 16))
2540       (mode xmode)
2541       (args (Dsp-16-u16))
2542       (syntax (.str "${Dsp-16-u16}"))
2543       (base-ifield f-8-4)
2544       (encoding (+ (f-8-4 #xF) Dsp-16-u16))
2545       (ifield-assertion (eq f-8-4 #xF))
2546       (getter (mem16 xmode Dsp-16-u16))
2547       (setter (set (mem16 xmode Dsp-16-u16) newval))
2548     )
2549   )
2550 )
2551
2552 (src16-absolute QI)
2553 (src16-absolute HI)
2554
2555 (define-pmacro (src32-absolute offset group base1 base2 xmode)
2556   (begin
2557     (define-derived-operand
2558       (name (.sym src32- offset -16-absolute- group - xmode))
2559       (comment (.str "m32c absolute address " xmode))
2560       (attrs (machine 32))
2561       (mode xmode)
2562       (args ((.sym Dsp- offset -u16)))
2563       (syntax (.str "${Dsp-" offset "-u16}"))
2564       (base-ifield (.sym f- base1 -11))
2565       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2566       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2567       (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16)))
2568       (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16)))
2569 ;      (getter (mem32 xmode (.sym Dsp- offset -u16)))
2570 ;      (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval))
2571     )
2572     (define-derived-operand
2573       (name (.sym src32- offset -24-absolute- group - xmode))
2574       (comment (.str "m32c absolute address " xmode))
2575       (attrs (machine 32))
2576       (mode xmode)
2577       (args ((.sym Dsp- offset -u24)))
2578       (syntax (.str "${Dsp-" offset "-u24}"))
2579       (base-ifield (.sym f- base1 -11))
2580       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2581       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2582       (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24)))
2583       (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24)))
2584 ;      (getter (mem32 xmode (.sym Dsp- offset -u24)))
2585 ;      (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval))
2586     )
2587   )
2588 )
2589
2590 (src32-absolute 16 Unprefixed 1 10 QI)
2591 (src32-absolute 16 Unprefixed 1 10 HI)
2592 (src32-absolute 16 Unprefixed 1 10 SI)
2593 (src32-absolute 24 Prefixed   9 18 QI)
2594 (src32-absolute 24 Prefixed   9 18 HI)
2595 (src32-absolute 24 Prefixed   9 18 SI)
2596
2597 ;-------------------------------------------------------------
2598 ; An indirect indirect
2599 ;
2600 ; Double indirect addressing uses the lower 3 bytes of the value stored
2601 ; at the address referenced by 'op' as the effective address.
2602 ;-------------------------------------------------------------
2603
2604 (define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff))
2605
2606 ; (define-pmacro (src-An-indirect-indirect-operand xmode)
2607 ;   (define-derived-operand
2608 ;     (name (.sym src32-An-indirect-indirect- xmode))
2609 ;     (comment (.str "m32c An indirect indirect destination " xmode))
2610 ;     (attrs (machine 32))
2611 ;     (mode xmode)
2612 ;     (args (Src32AnPrefixed))
2613 ;     (syntax (.str "[[$Src32AnPrefixed]]"))
2614 ;     (base-ifield f-9-11)
2615 ;     (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed))
2616 ;     (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0)))
2617 ;     (getter (mem32 xmode (indirect-addr Src32AnPrefixed)))
2618 ;     (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval))
2619 ;   )
2620 ; )
2621
2622 ; (src-An-indirect-indirect-operand QI)
2623 ; (src-An-indirect-indirect-operand HI)
2624 ; (src-An-indirect-indirect-operand SI)
2625
2626 ;-------------------------------------------------------------
2627 ; Relative indirect
2628 ;-------------------------------------------------------------
2629
2630 (define-pmacro (src-relative-indirect-operand xmode)
2631   (begin
2632 ;     (define-derived-operand
2633 ;       (name (.sym src32-24-8-SB-relative-indirect- xmode))
2634 ;       (comment (.str "m32c dsp:8[sb] relative source " xmode))
2635 ;       (attrs (machine 32))
2636 ;       (mode xmode)
2637 ;       (args (Dsp-24-u8))
2638 ;       (syntax "[${Dsp-24-u8}[sb]]")
2639 ;       (base-ifield f-9-11)
2640 ;       (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8))
2641 ;       (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2)))
2642 ;       (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))))
2643 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval))
2644 ;     )
2645 ;     (define-derived-operand
2646 ;       (name (.sym src32-24-16-SB-relative-indirect- xmode))
2647 ;       (comment (.str "m32c dsp:16[sb] relative source " xmode))
2648 ;       (attrs (machine 32))
2649 ;       (mode xmode)
2650 ;       (args (Dsp-24-u16))
2651 ;       (syntax "[${Dsp-24-u16}[sb]]")
2652 ;       (base-ifield f-9-11)
2653 ;       (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16))
2654 ;       (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2)))
2655 ;       (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))))
2656 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval))
2657 ;     )
2658 ;     (define-derived-operand
2659 ;       (name (.sym src32-24-8-FB-relative-indirect- xmode))
2660 ;       (comment (.str "m32c dsp:8[fb] relative source " xmode))
2661 ;       (attrs (machine 32))
2662 ;       (mode xmode)
2663 ;       (args (Dsp-24-s8))
2664 ;       (syntax "[${Dsp-24-s8}[fb]]")
2665 ;       (base-ifield f-9-11)
2666 ;       (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8))
2667 ;       (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3)))
2668 ;       (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))))
2669 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval))
2670 ;     )
2671 ;     (define-derived-operand
2672 ;       (name (.sym src32-24-16-FB-relative-indirect- xmode))
2673 ;       (comment (.str "m32c dsp:16[fb] relative source " xmode))
2674 ;       (attrs (machine 32))
2675 ;       (mode xmode)
2676 ;       (args (Dsp-24-s16))
2677 ;       (syntax "[${Dsp-24-s16}[fb]]")
2678 ;       (base-ifield f-9-11)
2679 ;       (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16))
2680 ;       (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3)))
2681 ;       (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))))
2682 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval))
2683 ;     )
2684 ;     (define-derived-operand
2685 ;       (name (.sym src32-24-8-An-relative-indirect- xmode))
2686 ;       (comment (.str "m32c dsp:8[An] relative indirect source " xmode))
2687 ;       (attrs (machine 32))
2688 ;       (mode xmode)
2689 ;       (args (Src32AnPrefixed Dsp-24-u8))
2690 ;       (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]")
2691 ;       (base-ifield f-9-11)
2692 ;       (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed))
2693 ;       (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0)))
2694 ;       (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))))
2695 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval))
2696 ;     )
2697 ;     (define-derived-operand
2698 ;       (name (.sym src32-24-16-An-relative-indirect- xmode))
2699 ;       (comment (.str "m32c dsp:16[An] relative source " xmode))
2700 ;       (attrs (machine 32))
2701 ;       (mode xmode)
2702 ;       (args (Src32AnPrefixed Dsp-24-u16))
2703 ;       (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]")
2704 ;       (base-ifield f-9-11)
2705 ;       (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed))
2706 ;       (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0)))
2707 ;       (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))))
2708 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval))
2709 ;     )
2710 ;     (define-derived-operand
2711 ;       (name (.sym src32-24-24-An-relative-indirect- xmode))
2712 ;       (comment (.str "m32c dsp:24[An] relative source " xmode))
2713 ;       (attrs (machine 32))
2714 ;       (mode xmode)
2715 ;       (args (Src32AnPrefixed Dsp-24-u24))
2716 ;       (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]")
2717 ;       (base-ifield f-9-11)
2718 ;       (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed))
2719 ;       (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0)))
2720 ;       (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))))
2721 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval))
2722 ;     )
2723   )
2724 )
2725
2726 ; (src-relative-indirect-operand QI)
2727 ; (src-relative-indirect-operand HI)
2728 ; (src-relative-indirect-operand SI)
2729
2730 ;-------------------------------------------------------------
2731 ; Absolute Indirect address
2732 ;-------------------------------------------------------------
2733
2734 (define-pmacro (src32-absolute-indirect offset base1 base2 xmode)
2735   (begin
2736 ;     (define-derived-operand
2737 ;       (name (.sym src32- offset -16-absolute-indirect-derived- xmode))
2738 ;       (comment (.str "m32c absolute indirect address " xmode))
2739 ;       (attrs (machine 32))
2740 ;       (mode xmode)
2741 ;       (args ((.sym Dsp- offset -u16)))
2742 ;       (syntax (.str "[${Dsp-" offset "-u16}]"))
2743 ;       (base-ifield (.sym f- base1 -11))
2744 ;       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2745 ;       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2746 ;       (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
2747 ;       (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
2748 ;     )
2749 ;     (define-derived-operand
2750 ;       (name (.sym src32- offset -24-absolute-indirect-derived- xmode))
2751 ;       (comment (.str "m32c absolute indirect address " xmode))
2752 ;       (attrs (machine 32))
2753 ;       (mode xmode)
2754 ;       (args ((.sym Dsp- offset -u24)))
2755 ;       (syntax (.str "[${Dsp-" offset "-u24}]"))
2756 ;       (base-ifield (.sym f- base1 -11))
2757 ;       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2758 ;       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2759 ;       (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
2760 ;       (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
2761 ;     )
2762   )
2763 )
2764
2765 (src32-absolute-indirect 24 9 18 QI)
2766 (src32-absolute-indirect 24 9 18 HI)
2767 (src32-absolute-indirect 24 9 18 SI)
2768
2769 ;-------------------------------------------------------------
2770 ; Register relative source operands for short format insns
2771 ;-------------------------------------------------------------
2772
2773 (define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3)
2774   (begin
2775     (define-derived-operand
2776       (name (.sym src mach -2-S-8-SB-relative- xmode))
2777       (comment (.str "m" mach "c SB relative address"))
2778       (attrs (machine mach))
2779       (mode xmode)
2780       (args (Dsp-8-u8))
2781       (syntax "${Dsp-8-u8}[sb]")
2782       (base-ifield (.sym f- base -2))
2783       (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8))
2784       (ifield-assertion (eq (.sym f- base -2) opc1))
2785       (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
2786       (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
2787 ;       (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))))
2788 ;       (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval))
2789       )
2790     (define-derived-operand
2791       (name (.sym src mach -2-S-8-FB-relative- xmode))
2792       (comment (.str "m" mach "c FB relative address"))
2793       (attrs (machine mach))
2794       (mode xmode)
2795       (args (Dsp-8-s8))
2796       (syntax "${Dsp-8-s8}[fb]")
2797       (base-ifield (.sym f- base -2))
2798       (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8))
2799       (ifield-assertion (eq (.sym f- base -2) opc2))
2800       (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
2801       (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
2802 ;       (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))))
2803 ;       (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval))
2804       )
2805     (define-derived-operand
2806       (name (.sym src mach -2-S-16-absolute- xmode))
2807       (comment (.str "m" mach "c absolute address"))
2808       (attrs (machine mach))
2809       (mode xmode)
2810       (args (Dsp-8-u16))
2811       (syntax "${Dsp-8-u16}")
2812       (base-ifield (.sym f- base -2))
2813       (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16))
2814       (ifield-assertion (eq (.sym f- base -2) opc3))
2815       (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
2816       (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
2817 ;      (getter (mem-mach mach xmode Dsp-8-u16))
2818 ;      (setter (set (mem-mach mach xmode Dsp-8-u16) newval))
2819       )
2820   )
2821 )
2822
2823 (src-2-S-operands 16 QI 6 1 2 3)
2824 (src-2-S-operands 32 QI 2 2 3 1)
2825 (src-2-S-operands 32 HI 2 2 3 1)
2826
2827 ;=============================================================
2828 ; Derived Operands
2829 ;-------------------------------------------------------------
2830 ; Destination
2831 ;-------------------------------------------------------------
2832 ; Rn direct
2833 ;-------------------------------------------------------------
2834
2835 (define-pmacro (dst16-Rn-direct-operand xmode)
2836   (begin
2837     (define-derived-operand
2838       (name (.sym dst16-Rn-direct- xmode))
2839       (comment (.str "m16c Rn direct destination " xmode))
2840       (attrs (machine 16))
2841       (mode xmode)
2842       (args ((.sym Dst16Rn xmode)))
2843       (syntax (.str "$Dst16Rn" xmode))
2844       (base-ifield f-12-4)
2845       (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode)))
2846       (ifield-assertion (eq f-12-2 0))
2847       (getter (trunc xmode (.sym Dst16Rn xmode)))
2848       (setter (set (.sym Dst16Rn xmode) newval))
2849     )
2850   )
2851 )
2852
2853 (dst16-Rn-direct-operand QI)
2854 (dst16-Rn-direct-operand HI)
2855 (dst16-Rn-direct-operand SI)
2856
2857 (define-derived-operand
2858   (name dst16-Rn-direct-Ext-QI)
2859   (comment "m16c Rn direct destination QI")
2860   (attrs (machine 16))
2861   (mode HI)
2862   (args (Dst16RnExtQI))
2863   (syntax "$Dst16RnExtQI")
2864   (base-ifield f-12-4)
2865   (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0)))
2866   (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0)))
2867   (getter (trunc QI (.sym Dst16RnExtQI)))
2868   (setter (set Dst16RnExtQI newval))
2869 )
2870
2871 (define-pmacro (dst32-Rn-direct-operand group base xmode)
2872   (begin
2873     (define-derived-operand
2874       (name (.sym dst32-Rn-direct- group - xmode))
2875       (comment (.str "m32c Rn direct destination " xmode))
2876       (attrs (machine 32))
2877       (mode xmode)
2878       (args ((.sym Dst32Rn group xmode)))
2879       (syntax (.str "$Dst32Rn" group xmode))
2880       (base-ifield (.sym f- base -6))
2881       (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode)))
2882       (ifield-assertion (eq (.sym f- base -3) 4))
2883       (getter (trunc xmode (.sym Dst32Rn group xmode)))
2884       (setter (set (.sym Dst32Rn group xmode) newval))
2885     )
2886   )
2887 )
2888
2889 (dst32-Rn-direct-operand   Unprefixed  4 QI)
2890 (dst32-Rn-direct-operand     Prefixed 12 QI)
2891 (dst32-Rn-direct-operand   Unprefixed  4 HI)
2892 (dst32-Rn-direct-operand     Prefixed 12 HI)
2893 (dst32-Rn-direct-operand   Unprefixed  4 SI)
2894 (dst32-Rn-direct-operand     Prefixed 12 SI)
2895
2896 (define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode)
2897   (begin
2898     (define-derived-operand
2899       (name (.sym dst32-Rn-direct- group - smode))
2900       (comment (.str "m32c Rn direct destination " smode))
2901       (attrs (machine 32))
2902       (mode dmode)
2903       (args ((.sym Dst32Rn group smode)))
2904       (syntax (.str "$Dst32Rn" group smode))
2905       (base-ifield (.sym f- base1 -6))
2906       (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode)))
2907       (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1)))
2908       (getter (trunc smode (.sym Dst32Rn group smode)))
2909       (setter (set (.sym Dst32Rn group smode) newval))
2910     )
2911   )
2912 )
2913
2914 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI)
2915 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI)
2916
2917 (define-derived-operand
2918   (name dst32-R3-direct-Unprefixed-HI)
2919   (comment "m32c R3 direct HI")
2920   (attrs (machine 32))
2921   (mode HI)
2922   (args (R3))
2923   (syntax "$R3")
2924   (base-ifield f-4-6)
2925   (encoding (+ (f-4-3 4) (f-8-2 #x1)))
2926   (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1)))
2927   (getter (trunc HI R3))
2928   (setter (set R3 newval))
2929 )
2930 ;-------------------------------------------------------------
2931 ; An direct
2932 ;-------------------------------------------------------------
2933
2934 (define-pmacro (dst16-An-direct-operand xmode)
2935   (begin
2936     (define-derived-operand
2937       (name (.sym dst16-An-direct- xmode))
2938       (comment (.str "m16c An direct destination " xmode))
2939       (attrs (machine 16))
2940       (mode xmode)
2941       (args ((.sym Dst16An xmode)))
2942       (syntax (.str "$Dst16An" xmode))
2943       (base-ifield f-12-4)
2944       (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode)))
2945       (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
2946       (getter (trunc xmode (.sym Dst16An xmode)))
2947       (setter (set (.sym Dst16An xmode) newval))
2948     )
2949   )
2950 )
2951
2952 (dst16-An-direct-operand QI)
2953 (dst16-An-direct-operand HI)
2954 (dst16-An-direct-operand SI)
2955
2956 (define-pmacro (dst32-An-direct-operand group base1 base2 xmode)
2957   (begin
2958     (define-derived-operand
2959       (name (.sym dst32-An-direct- group - xmode))
2960       (comment (.str "m32c An direct destination " xmode))
2961       (attrs (machine 32))
2962       (mode xmode)
2963       (args ((.sym Dst32An group xmode)))
2964       (syntax (.str "$Dst32An" group xmode))
2965       (base-ifield (.sym f- base1 -6))
2966       (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode)))
2967       (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
2968       (getter (trunc xmode (.sym Dst32An group xmode)))
2969       (setter (set (.sym Dst32An group xmode) newval))
2970     )
2971   )
2972 )
2973
2974 (dst32-An-direct-operand Unprefixed  4  8 QI)
2975 (dst32-An-direct-operand   Prefixed 12 16 QI)
2976 (dst32-An-direct-operand Unprefixed  4  8 HI)
2977 (dst32-An-direct-operand   Prefixed 12 16 HI)
2978 (dst32-An-direct-operand Unprefixed  4  8 SI)
2979 (dst32-An-direct-operand   Prefixed 12 16 SI)
2980
2981 ;-------------------------------------------------------------
2982 ; An indirect
2983 ;-------------------------------------------------------------
2984
2985 (define-pmacro (dst16-An-indirect-operand xmode)
2986   (begin
2987     (define-derived-operand
2988       (name (.sym dst16-An-indirect- xmode))
2989       (comment (.str "m16c An indirect destination " xmode))
2990       (attrs (machine 16))
2991       (mode xmode)
2992       (args (Dst16An))
2993       (syntax "[$Dst16An]")
2994       (base-ifield f-12-4)
2995       (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
2996       (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
2997       (getter (mem16 xmode Dst16An))
2998       (setter (set (mem16 xmode Dst16An) newval))
2999     )
3000   )
3001 )
3002
3003 (dst16-An-indirect-operand QI)
3004 (dst16-An-indirect-operand HI)
3005 (dst16-An-indirect-operand SI)
3006
3007 (define-derived-operand
3008   (name dst16-An-indirect-Ext-QI)
3009   (comment "m16c An indirect destination QI")
3010   (attrs (machine 16))
3011   (mode HI)
3012   (args (Dst16An))
3013   (syntax "[$Dst16An]")
3014   (base-ifield f-12-4)
3015   (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3016   (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3017   (getter (mem16 QI Dst16An))
3018   (setter (set (mem16 HI Dst16An) newval))
3019 )
3020
3021 (define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode)
3022   (begin
3023     (define-derived-operand
3024       (name (.sym dst32-An-indirect- group - smode))
3025       (comment (.str "m32c An indirect destination " smode))
3026       (attrs (machine 32))
3027       (mode dmode)
3028       (args ((.sym Dst32An group)))
3029       (syntax (.str "[$Dst32An" group "]"))
3030       (base-ifield (.sym f- base1 -6))
3031       (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group)))
3032       (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3033       (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group)
3034                        (const 0)))
3035       (setter (c-call DFLT (.str "operand_setter_" dmode)  newval
3036                       (.sym Dst32An group) (const 0)))
3037 ;      (getter (mem32 smode (.sym Dst32An group)))
3038 ;      (setter (set (mem32 dmode (.sym Dst32An group)) newval))
3039     )
3040   )
3041 )
3042
3043 (dst32-An-indirect-operand    Unprefixed  4  8 QI QI)
3044 (dst32-An-indirect-operand      Prefixed 12 16 QI QI)
3045 (dst32-An-indirect-operand    Unprefixed  4  8 HI HI)
3046 (dst32-An-indirect-operand      Prefixed 12 16 HI HI)
3047 (dst32-An-indirect-operand    Unprefixed  4  8 SI SI)
3048 (dst32-An-indirect-operand      Prefixed 12 16 SI SI)
3049 (dst32-An-indirect-operand ExtUnprefixed  4  8 QI HI)
3050 (dst32-An-indirect-operand ExtUnprefixed  4  8 HI SI)
3051
3052 ;-------------------------------------------------------------
3053 ; dsp:d[r] relative
3054 ;-------------------------------------------------------------
3055
3056 (define-pmacro (dst16-relative-operand offset xmode)
3057   (begin
3058     (define-derived-operand
3059       (name (.sym dst16- offset -8-SB-relative- xmode))
3060       (comment (.str "m16c dsp:8[sb] relative destination " xmode))
3061       (attrs (machine 16))
3062       (mode xmode)
3063       (args ((.sym Dsp- offset -u8)))
3064       (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3065       (base-ifield f-12-4)
3066       (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3067       (ifield-assertion (eq f-12-4 #xA))
3068       (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
3069       (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3070     )
3071     (define-derived-operand
3072       (name (.sym dst16- offset -16-SB-relative- xmode))
3073       (comment (.str "m16c dsp:16[sb] relative destination " xmode))
3074       (attrs (machine 16))
3075       (mode xmode)
3076       (args ((.sym Dsp- offset -u16)))
3077       (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3078       (base-ifield f-12-4)
3079       (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3080       (ifield-assertion (eq f-12-4 #xE))
3081       (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
3082       (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3083     )
3084     (define-derived-operand
3085       (name (.sym dst16- offset -8-FB-relative- xmode))
3086       (comment (.str "m16c dsp:8[fb] relative destination " xmode))
3087       (attrs (machine 16))
3088       (mode xmode)
3089       (args ((.sym Dsp- offset -s8)))
3090       (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3091       (base-ifield f-12-4)
3092       (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3093       (ifield-assertion (eq f-12-4 #xB))
3094       (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
3095       (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3096     )
3097     (define-derived-operand
3098       (name (.sym dst16- offset -8-An-relative- xmode))
3099       (comment (.str "m16c dsp:8[An] relative destination " xmode))
3100       (attrs (machine 16))
3101       (mode xmode)
3102       (args (Dst16An (.sym Dsp- offset -u8)))
3103       (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3104       (base-ifield f-12-4)
3105       (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3106       (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3107       (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)))
3108       (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3109     )
3110     (define-derived-operand
3111       (name (.sym dst16- offset -16-An-relative- xmode))
3112       (comment (.str "m16c dsp:16[An] relative destination " xmode))
3113       (attrs (machine 16))
3114       (mode xmode)
3115       (args (Dst16An (.sym Dsp- offset -u16)))
3116       (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3117       (base-ifield f-12-4)
3118       (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3119       (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3120       (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)))
3121       (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3122     )
3123   )
3124 )
3125
3126 (dst16-relative-operand 16 QI)
3127 (dst16-relative-operand 24 QI)
3128 (dst16-relative-operand 32 QI)
3129 (dst16-relative-operand 40 QI)
3130 (dst16-relative-operand 48 QI)
3131 (dst16-relative-operand 16 HI)
3132 (dst16-relative-operand 24 HI)
3133 (dst16-relative-operand 32 HI)
3134 (dst16-relative-operand 40 HI)
3135 (dst16-relative-operand 48 HI)
3136 (dst16-relative-operand 16 SI)
3137 (dst16-relative-operand 24 SI)
3138 (dst16-relative-operand 32 SI)
3139 (dst16-relative-operand 40 SI)
3140 (dst16-relative-operand 48 SI)
3141
3142 (define-pmacro (dst16-relative-Ext-operand offset smode dmode)
3143   (begin
3144     (define-derived-operand
3145       (name (.sym dst16- offset -8-SB-relative-Ext- smode))
3146       (comment (.str "m16c dsp:8[sb] relative destination " smode))
3147       (attrs (machine 16))
3148       (mode dmode)
3149       (args ((.sym Dsp- offset -u8)))
3150       (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3151       (base-ifield f-12-4)
3152       (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3153       (ifield-assertion (eq f-12-4 #xA))
3154       (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3155       (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3156     )
3157     (define-derived-operand
3158       (name (.sym dst16- offset -16-SB-relative-Ext- smode))
3159       (comment (.str "m16c dsp:16[sb] relative destination " smode))
3160       (attrs (machine 16))
3161       (mode dmode)
3162       (args ((.sym Dsp- offset -u16)))
3163       (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3164       (base-ifield f-12-4)
3165       (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3166       (ifield-assertion (eq f-12-4 #xE))
3167       (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3168       (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3169     )
3170     (define-derived-operand
3171       (name (.sym dst16- offset -8-FB-relative-Ext- smode))
3172       (comment (.str "m16c dsp:8[fb] relative destination " smode))
3173       (attrs (machine 16))
3174       (mode dmode)
3175       (args ((.sym Dsp- offset -s8)))
3176       (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3177       (base-ifield f-12-4)
3178       (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3179       (ifield-assertion (eq f-12-4 #xB))
3180       (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3181       (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3182     )
3183     (define-derived-operand
3184       (name (.sym dst16- offset -8-An-relative-Ext- smode))
3185       (comment (.str "m16c dsp:8[An] relative destination " smode))
3186       (attrs (machine 16))
3187       (mode dmode)
3188       (args (Dst16An (.sym Dsp- offset -u8)))
3189       (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3190       (base-ifield f-12-4)
3191       (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3192       (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3193       (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An)))
3194       (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3195     )
3196     (define-derived-operand
3197       (name (.sym dst16- offset -16-An-relative-Ext- smode))
3198       (comment (.str "m16c dsp:16[An] relative destination " smode))
3199       (attrs (machine 16))
3200       (mode dmode)
3201       (args (Dst16An (.sym Dsp- offset -u16)))
3202       (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3203       (base-ifield f-12-4)
3204       (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3205       (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3206       (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An)))
3207       (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3208     )
3209   )
3210 )
3211
3212 (dst16-relative-Ext-operand 16 QI HI)
3213
3214 (define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode)
3215   (begin
3216     (define-derived-operand
3217       (name (.sym dst32- offset -8-SB-relative- group - smode))
3218       (comment (.str "m32c dsp:8[sb] relative destination " smode))
3219       (attrs (machine 32))
3220       (mode dmode)
3221       (args ((.sym Dsp- offset -u8)))
3222       (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3223       (base-ifield (.sym f- base1 -6))
3224       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
3225       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3226       (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8)))
3227       (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8)))
3228 ;       (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3229 ;       (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3230     )
3231     (define-derived-operand
3232       (name (.sym dst32- offset -16-SB-relative- group - smode))
3233       (comment (.str "m32c dsp:16[sb] relative destination " smode))
3234       (attrs (machine 32))
3235       (mode dmode)
3236       (args ((.sym Dsp- offset -u16)))
3237       (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3238       (base-ifield (.sym f- base1 -6))
3239       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
3240       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3241       (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16)))
3242       (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16)))
3243 ;       (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3244 ;       (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3245     )
3246     (define-derived-operand
3247       (name (.sym dst32- offset -8-FB-relative- group - smode))
3248       (comment (.str "m32c dsp:8[fb] relative destination " smode))
3249       (attrs (machine 32))
3250       (mode dmode)
3251       (args ((.sym Dsp- offset -s8)))
3252       (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3253       (base-ifield (.sym f- base1 -6))
3254       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
3255       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3256       (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8)))
3257       (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8)))
3258 ;       (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3259 ;       (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3260     )
3261     (define-derived-operand
3262       (name (.sym dst32- offset -16-FB-relative- group - smode))
3263       (comment (.str "m32c dsp:16[fb] relative destination " smode))
3264       (attrs (machine 32))
3265       (mode dmode)
3266       (args ((.sym Dsp- offset -s16)))
3267       (syntax (.str "${Dsp-" offset "-s16}[fb]"))
3268       (base-ifield (.sym f- base1 -6))
3269       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
3270       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3271       (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16)))
3272       (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16)))
3273 ;       (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb))))
3274 ;       (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
3275     )
3276     (define-derived-operand
3277       (name (.sym dst32- offset -8-An-relative- group - smode))
3278       (comment (.str "m32c dsp:8[An] relative destination " smode))
3279       (attrs (machine 32))
3280       (mode dmode)
3281       (args ((.sym Dst32An group) (.sym Dsp- offset -u8)))
3282       (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]"))
3283       (base-ifield (.sym f- base1 -6))
3284       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group)))
3285       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3286       (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8)))
3287       (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8)))
3288 ;       (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group))))
3289 ;       (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval))
3290     )
3291     (define-derived-operand
3292       (name (.sym dst32- offset -16-An-relative- group - smode))
3293       (comment (.str "m32c dsp:16[An] relative destination " smode))
3294       (attrs (machine 32))
3295       (mode dmode)
3296       (args ((.sym Dst32An group) (.sym Dsp- offset -u16)))
3297       (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]"))
3298       (base-ifield (.sym f- base1 -6))
3299       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group)))
3300       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3301       (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16)))
3302       (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16)))
3303 ;       (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group))))
3304 ;       (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval))
3305     )
3306     (define-derived-operand
3307       (name (.sym dst32- offset -24-An-relative- group - smode))
3308       (comment (.str "m32c dsp:16[An] relative destination " smode))
3309       (attrs (machine 32))
3310       (mode dmode)
3311       (args ((.sym Dst32An group) (.sym Dsp- offset -u24)))
3312       (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]"))
3313       (base-ifield (.sym f- base1 -6))
3314       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group)))
3315       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3316       (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24)))
3317       (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24)))
3318 ;       (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group))))
3319 ;       (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval))
3320     )
3321   )
3322 )
3323
3324 (dst32-relative-operand 16 Unprefixed 4 8 QI QI)
3325 (dst32-relative-operand 24 Unprefixed 4 8 QI QI)
3326 (dst32-relative-operand 32 Unprefixed 4 8 QI QI)
3327 (dst32-relative-operand 40 Unprefixed 4 8 QI QI)
3328 (dst32-relative-operand 16 Unprefixed 4 8 HI HI)
3329 (dst32-relative-operand 24 Unprefixed 4 8 HI HI)
3330 (dst32-relative-operand 32 Unprefixed 4 8 HI HI)
3331 (dst32-relative-operand 40 Unprefixed 4 8 HI HI)
3332 (dst32-relative-operand 16 Unprefixed 4 8 SI SI)
3333 (dst32-relative-operand 24 Unprefixed 4 8 SI SI)
3334 (dst32-relative-operand 32 Unprefixed 4 8 SI SI)
3335 (dst32-relative-operand 40 Unprefixed 4 8 SI SI)
3336
3337 (dst32-relative-operand 24 Prefixed 12 16 QI QI)
3338 (dst32-relative-operand 32 Prefixed 12 16 QI QI)
3339 (dst32-relative-operand 40 Prefixed 12 16 QI QI)
3340 (dst32-relative-operand 48 Prefixed 12 16 QI QI)
3341 (dst32-relative-operand 24 Prefixed 12 16 HI HI)
3342 (dst32-relative-operand 32 Prefixed 12 16 HI HI)
3343 (dst32-relative-operand 40 Prefixed 12 16 HI HI)
3344 (dst32-relative-operand 48 Prefixed 12 16 HI HI)
3345 (dst32-relative-operand 24 Prefixed 12 16 SI SI)
3346 (dst32-relative-operand 32 Prefixed 12 16 SI SI)
3347 (dst32-relative-operand 40 Prefixed 12 16 SI SI)
3348 (dst32-relative-operand 48 Prefixed 12 16 SI SI)
3349
3350 (dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI)
3351 (dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI)
3352
3353 ;-------------------------------------------------------------
3354 ; Absolute address
3355 ;-------------------------------------------------------------
3356
3357 (define-pmacro (dst16-absolute offset xmode)
3358   (begin
3359     (define-derived-operand
3360       (name (.sym dst16- offset -16-absolute- xmode))
3361       (comment (.str "m16c absolute address " xmode))
3362       (attrs (machine 16))
3363       (mode xmode)
3364       (args ((.sym Dsp- offset -u16)))
3365       (syntax (.str "${Dsp-" offset "-u16}"))
3366       (base-ifield f-12-4)
3367       (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16)))
3368       (ifield-assertion (eq f-12-4 #xF))
3369       (getter (mem16 xmode (.sym Dsp- offset -u16)))
3370       (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval))
3371     )
3372   )
3373 )
3374
3375 (dst16-absolute 16 QI)
3376 (dst16-absolute 24 QI)
3377 (dst16-absolute 32 QI)
3378 (dst16-absolute 40 QI)
3379 (dst16-absolute 48 QI)
3380 (dst16-absolute 16 HI)
3381 (dst16-absolute 24 HI)
3382 (dst16-absolute 32 HI)
3383 (dst16-absolute 40 HI)
3384 (dst16-absolute 48 HI)
3385 (dst16-absolute 16 SI)
3386 (dst16-absolute 24 SI)
3387 (dst16-absolute 32 SI)
3388 (dst16-absolute 40 SI)
3389 (dst16-absolute 48 SI)
3390
3391 (define-derived-operand
3392   (name dst16-16-16-absolute-Ext-QI)
3393   (comment "m16c absolute address QI")
3394   (attrs (machine 16))
3395   (mode HI)
3396   (args (Dsp-16-u16))
3397   (syntax "${Dsp-16-u16}")
3398   (base-ifield f-12-4)
3399   (encoding (+ (f-12-4 #xF) Dsp-16-u16))
3400   (ifield-assertion (eq f-12-4 #xF))
3401   (getter (mem16 QI Dsp-16-u16))
3402   (setter (set (mem16 HI Dsp-16-u16) newval))
3403 )
3404
3405 (define-pmacro (dst32-absolute offset group base1 base2 smode dmode)
3406   (begin
3407     (define-derived-operand
3408       (name (.sym dst32- offset -16-absolute- group - smode))
3409       (comment (.str "m32c absolute address " smode))
3410       (attrs (machine 32))
3411       (mode dmode)
3412       (args ((.sym Dsp- offset -u16)))
3413       (syntax (.str "${Dsp-" offset "-u16}"))
3414       (base-ifield (.sym f- base1 -6))
3415       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
3416       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
3417       (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16)))
3418       (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16)))
3419 ;      (getter (mem32 smode (.sym Dsp- offset -u16)))
3420 ;      (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval))
3421     )
3422     (define-derived-operand
3423       (name (.sym dst32- offset -24-absolute- group - smode))
3424       (comment (.str "m32c absolute address " smode))
3425       (attrs (machine 32))
3426       (mode dmode)
3427       (args ((.sym Dsp- offset -u24)))
3428       (syntax (.str "${Dsp-" offset "-u24}"))
3429       (base-ifield (.sym f- base1 -6))
3430       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
3431       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
3432       (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24)))
3433       (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24)))
3434 ;      (getter (mem32 smode (.sym Dsp- offset -u24)))
3435 ;      (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval))
3436     )
3437   )
3438 )
3439
3440 (dst32-absolute 16 Unprefixed 4 8 QI QI)
3441 (dst32-absolute 24 Unprefixed 4 8 QI QI)
3442 (dst32-absolute 32 Unprefixed 4 8 QI QI)
3443 (dst32-absolute 40 Unprefixed 4 8 QI QI)
3444 (dst32-absolute 16 Unprefixed 4 8 HI HI)
3445 (dst32-absolute 24 Unprefixed 4 8 HI HI)
3446 (dst32-absolute 32 Unprefixed 4 8 HI HI)
3447 (dst32-absolute 40 Unprefixed 4 8 HI HI)
3448 (dst32-absolute 16 Unprefixed 4 8 SI SI)
3449 (dst32-absolute 24 Unprefixed 4 8 SI SI)
3450 (dst32-absolute 32 Unprefixed 4 8 SI SI)
3451 (dst32-absolute 40 Unprefixed 4 8 SI SI)
3452
3453 (dst32-absolute 24 Prefixed 12 16 QI QI)
3454 (dst32-absolute 32 Prefixed 12 16 QI QI)
3455 (dst32-absolute 40 Prefixed 12 16 QI QI)
3456 (dst32-absolute 48 Prefixed 12 16 QI QI)
3457 (dst32-absolute 24 Prefixed 12 16 HI HI)
3458 (dst32-absolute 32 Prefixed 12 16 HI HI)
3459 (dst32-absolute 40 Prefixed 12 16 HI HI)
3460 (dst32-absolute 48 Prefixed 12 16 HI HI)
3461 (dst32-absolute 24 Prefixed 12 16 SI SI)
3462 (dst32-absolute 32 Prefixed 12 16 SI SI)
3463 (dst32-absolute 40 Prefixed 12 16 SI SI)
3464 (dst32-absolute 48 Prefixed 12 16 SI SI)
3465
3466 (dst32-absolute 16 ExtUnprefixed 4 8 QI HI)
3467 (dst32-absolute 16 ExtUnprefixed 4 8 HI SI)
3468
3469 ;-------------------------------------------------------------
3470 ; An indirect indirect
3471 ;-------------------------------------------------------------
3472
3473 ;(define-pmacro (dst-An-indirect-indirect-operand xmode)
3474 ;   (define-derived-operand
3475 ;     (name (.sym dst32-An-indirect-indirect- xmode))
3476 ;     (comment (.str "m32c An indirect indirect destination " xmode))
3477 ;     (attrs (machine 32))
3478 ;     (mode xmode)
3479 ;     (args (Dst32AnPrefixed))
3480 ;     (syntax (.str "[[$Dst32AnPrefixed]]"))
3481 ;     (base-ifield f-12-6)
3482 ;     (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed))
3483 ;     (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0)))
3484 ;     (getter (mem32 xmode (indirect-addr Dst32AnPrefixed)))
3485 ;     (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval))
3486 ;   )
3487 ;)
3488
3489 ; (dst-An-indirect-indirect-operand QI)
3490 ; (dst-An-indirect-indirect-operand HI)
3491 ; (dst-An-indirect-indirect-operand SI)
3492
3493 ;-------------------------------------------------------------
3494 ; Relative indirect
3495 ;-------------------------------------------------------------
3496
3497 (define-pmacro (dst-relative-indirect-operand offset xmode)
3498   (begin
3499 ;     (define-derived-operand
3500 ;       (name (.sym dst32- offset -8-SB-relative-indirect- xmode))
3501 ;       (comment (.str "m32c dsp:8[sb] relative destination " xmode))
3502 ;       (attrs (machine 32))
3503 ;       (mode xmode)
3504 ;       (args ((.sym Dsp- offset -u8)))
3505 ;       (syntax (.str "[${Dsp-" offset "-u8}[sb]]"))
3506 ;       (base-ifield f-12-6)
3507 ;       (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8)))
3508 ;       (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2)))
3509 ;       (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))))
3510 ;       (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval))
3511 ;     )
3512 ;     (define-derived-operand
3513 ;       (name (.sym dst32- offset -16-SB-relative-indirect- xmode))
3514 ;       (comment (.str "m32c dsp:16[sb] relative destination " xmode))
3515 ;       (attrs (machine 32))
3516 ;       (mode xmode)
3517 ;       (args ((.sym Dsp- offset -u16)))
3518 ;       (syntax (.str "[${Dsp-" offset "-u16}[sb]]"))
3519 ;       (base-ifield f-12-6)
3520 ;       (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16)))
3521 ;       (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2)))
3522 ;       (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))))
3523 ;       (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval))
3524 ;     )
3525 ;     (define-derived-operand
3526 ;       (name (.sym dst32- offset -8-FB-relative-indirect- xmode))
3527 ;       (comment (.str "m32c dsp:8[fb] relative destination " xmode))
3528 ;       (attrs (machine 32))
3529 ;       (mode xmode)
3530 ;       (args ((.sym Dsp- offset -s8)))
3531 ;       (syntax (.str "[${Dsp-" offset "-s8}[fb]]"))
3532 ;       (base-ifield f-12-6)
3533 ;       (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8)))
3534 ;       (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3)))
3535 ;       (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))))
3536 ;       (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval))
3537 ;     )
3538 ;     (define-derived-operand
3539 ;       (name (.sym dst32- offset -16-FB-relative-indirect- xmode))
3540 ;       (comment (.str "m32c dsp:16[fb] relative destination " xmode))
3541 ;       (attrs (machine 32))
3542 ;       (mode xmode)
3543 ;       (args ((.sym Dsp- offset -s16)))
3544 ;       (syntax (.str "[${Dsp-" offset "-s16}[fb]]"))
3545 ;       (base-ifield f-12-6)
3546 ;       (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16)))
3547 ;       (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3)))
3548 ;       (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))))
3549 ;       (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval))
3550 ;     )
3551 ;     (define-derived-operand
3552 ;       (name (.sym dst32- offset -8-An-relative-indirect- xmode))
3553 ;       (comment (.str "m32c dsp:8[An] relative indirect destination " xmode))
3554 ;       (attrs (machine 32))
3555 ;       (mode xmode)
3556 ;       (args (Dst32AnPrefixed (.sym Dsp- offset -u8)))
3557 ;       (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]"))
3558 ;       (base-ifield f-12-6)
3559 ;       (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed))
3560 ;       (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0)))
3561 ;       (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))))
3562 ;       (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval))
3563 ;     )
3564 ;     (define-derived-operand
3565 ;       (name (.sym dst32- offset -16-An-relative-indirect- xmode))
3566 ;       (comment (.str "m32c dsp:16[An] relative destination " xmode))
3567 ;       (attrs (machine 32))
3568 ;       (mode xmode)
3569 ;       (args (Dst32AnPrefixed (.sym Dsp- offset -u16)))
3570 ;       (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]"))
3571 ;       (base-ifield f-12-6)
3572 ;       (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed))
3573 ;       (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0)))
3574 ;       (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))))
3575 ;       (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval))
3576 ;     )
3577 ;     (define-derived-operand
3578 ;       (name (.sym dst32- offset -24-An-relative-indirect- xmode))
3579 ;       (comment (.str "m32c dsp:24[An] relative destination " xmode))
3580 ;       (attrs (machine 32))
3581 ;       (mode xmode)
3582 ;       (args (Dst32AnPrefixed (.sym Dsp- offset -u24)))
3583 ;       (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]"))
3584 ;       (base-ifield f-12-6)
3585 ;       (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed))
3586 ;       (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0)))
3587 ;       (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))))
3588 ;       (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval))
3589 ;     )
3590   )
3591 )
3592
3593 ; (dst-relative-indirect-operand 24 QI)
3594 ; (dst-relative-indirect-operand 32 QI)
3595 ; (dst-relative-indirect-operand 40 QI)
3596 ; (dst-relative-indirect-operand 48 QI)
3597 ; (dst-relative-indirect-operand 24 HI)
3598 ; (dst-relative-indirect-operand 32 HI)
3599 ; (dst-relative-indirect-operand 40 HI)
3600 ; (dst-relative-indirect-operand 48 HI)
3601 ; (dst-relative-indirect-operand 24 SI)
3602 ; (dst-relative-indirect-operand 32 SI)
3603 ; (dst-relative-indirect-operand 40 SI)
3604 ; (dst-relative-indirect-operand 48 SI)
3605
3606 ;-------------------------------------------------------------
3607 ; Absolute indirect
3608 ;-------------------------------------------------------------
3609
3610 (define-pmacro (dst-absolute-indirect offset xmode)
3611   (begin
3612 ;     (define-derived-operand
3613 ;       (name (.sym dst32- offset -16-absolute-indirect-derived- xmode))
3614 ;       (comment (.str "m32c absolute indirect address " xmode))
3615 ;       (attrs (machine 32))
3616 ;       (mode xmode)
3617 ;       (args ((.sym Dsp- offset -u16)))
3618 ;       (syntax (.str "[${Dsp-" offset "-u16}]"))
3619 ;       (base-ifield f-12-6)
3620 ;       (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16)))
3621 ;       (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3)))
3622 ;       (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
3623 ;       (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
3624 ;     )
3625 ;     (define-derived-operand
3626 ;       (name (.sym dst32- offset -24-absolute-indirect-derived- xmode))
3627 ;       (comment (.str "m32c absolute indirect address " xmode))
3628 ;       (attrs (machine 32))
3629 ;       (mode xmode)
3630 ;       (args ((.sym Dsp- offset -u24)))
3631 ;       (syntax (.str "[${Dsp-" offset "-u24}]"))
3632 ;       (base-ifield f-12-6)
3633 ;       (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24)))
3634 ;       (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2)))
3635 ;       (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
3636 ;       (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
3637 ;     )
3638   )
3639 )
3640
3641 (dst-absolute-indirect 24 QI)
3642 (dst-absolute-indirect 32 QI)
3643 (dst-absolute-indirect 40 QI)
3644 (dst-absolute-indirect 48 QI)
3645 (dst-absolute-indirect 24 HI)
3646 (dst-absolute-indirect 32 HI)
3647 (dst-absolute-indirect 40 HI)
3648 (dst-absolute-indirect 48 HI)
3649 (dst-absolute-indirect 24 SI)
3650 (dst-absolute-indirect 32 SI)
3651 (dst-absolute-indirect 40 SI)
3652 (dst-absolute-indirect 48 SI)
3653
3654 ;-------------------------------------------------------------
3655 ; Bit operands
3656 ;-------------------------------------------------------------
3657 (define-pmacro (get-register-bit reg bitno)
3658   (and (srl reg bitno) 1)
3659 )
3660
3661 (define-pmacro (set-register-bit reg bitno value)
3662   (set reg (or (and reg (inv (sll 1 bitno)))
3663                (sll (and QI value 1) bitno)))
3664 )
3665
3666 (define-pmacro (get-memory-bit mach base bitno)
3667   (and (srl (mem-mach mach QI (add base (div bitno 8)))
3668             (mod bitno 8))
3669        1)
3670 )
3671
3672 (define-pmacro (set-memory-bit mach base bitno value)
3673   (sequence ((USI addr))
3674             (set addr (add base (div bitno 8)))
3675             (set (mem-mach mach QI addr)
3676                  (or (and (mem-mach mach QI addr)
3677                           (inv (sll 1 (mod bitno 8))))
3678                      (sll (and QI value 1) (mod bitno 8)))))
3679 )
3680
3681 ;-------------------------------------------------------------
3682 ; Rn direct
3683 ;-------------------------------------------------------------
3684
3685 (define-derived-operand
3686   (name bit16-Rn-direct)
3687   (comment "m16c Rn direct bit")
3688   (attrs (machine 16))
3689   (mode BI)
3690   (args (Bitno16R Bit16Rn))
3691   (syntax "$Bitno16R,$Bit16Rn")
3692   (base-ifield f-12-4)
3693   (encoding (+ (f-12-2 0) Bit16Rn Bitno16R))
3694   (ifield-assertion (eq f-12-2 0))
3695   (getter (get-register-bit Bit16Rn Bitno16R))
3696   (setter (set-register-bit Bit16Rn Bitno16R newval))
3697 )
3698
3699 (define-pmacro (bit32-Rn-direct-operand group base)
3700   (begin
3701     (define-derived-operand
3702       (name (.sym bit32-Rn-direct- group))
3703       (comment "m32c Rn direct bit")
3704       (attrs (machine 32))
3705       (mode BI)
3706       (args ((.sym Bitno32 group) (.sym Bit32Rn group)))
3707       (syntax (.str "$Bitno32" group ",$Bit32Rn" group))
3708       (base-ifield (.sym f- base -6))
3709       (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group)))
3710       (ifield-assertion (eq (.sym f- base -3) 4))
3711       (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group)))
3712       (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval))
3713     )
3714   )
3715 )
3716
3717 (bit32-Rn-direct-operand Unprefixed  4)
3718 (bit32-Rn-direct-operand   Prefixed 12)
3719
3720 ;-------------------------------------------------------------
3721 ; An direct
3722 ;-------------------------------------------------------------
3723
3724 (define-derived-operand
3725   (name bit16-An-direct)
3726   (comment "m16c An direct bit")
3727   (attrs (machine 16))
3728   (mode BI)
3729   (args (Bitno16R Bit16An))
3730   (syntax "$Bitno16R,$Bit16An")
3731   (base-ifield f-12-4)
3732   (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R))
3733   (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
3734   (getter (get-register-bit Bit16An Bitno16R))
3735   (setter (set-register-bit Bit16An Bitno16R newval))
3736 )
3737
3738 (define-pmacro (bit32-An-direct-operand group base1 base2)
3739   (begin
3740     (define-derived-operand
3741       (name (.sym bit32-An-direct- group))
3742       (comment "m32c An direct bit")
3743       (attrs (machine 32))
3744       (mode BI)
3745       (args ((.sym Bitno32 group) (.sym Bit32An group)))
3746       (syntax (.str "$Bitno32" group ",$Bit32An" group))
3747       (base-ifield (.sym f- base1 -6))
3748       (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group)))
3749       (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3750       (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group)))
3751       (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval))
3752     )
3753   )
3754 )
3755
3756 (bit32-An-direct-operand Unprefixed  4  8)
3757 (bit32-An-direct-operand   Prefixed 12 16)
3758
3759 ;-------------------------------------------------------------
3760 ; An indirect
3761 ;-------------------------------------------------------------
3762
3763 (define-derived-operand
3764   (name bit16-An-indirect)
3765   (comment "m16c An indirect bit")
3766   (attrs (machine 16))
3767   (mode BI)
3768   (args (Bit16An))
3769   (syntax "[$Bit16An]")
3770   (base-ifield f-12-4)
3771   (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An))
3772   (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3773   (getter (get-memory-bit 16 0 Bit16An))
3774   (setter (set-memory-bit 16 0 Bit16An newval))
3775 )
3776
3777 (define-pmacro (bit32-An-indirect-operand group base1 base2)
3778   (begin
3779     (define-derived-operand
3780       (name (.sym bit32-An-indirect- group))
3781       (comment "m32c An indirect destination ")
3782       (attrs (machine 32))
3783       (mode BI)
3784       (args ((.sym Bitno32 group) (.sym Bit32An group)))
3785       (syntax (.str "$Bitno32" group ",[$Bit32An" group "]"))
3786       (base-ifield (.sym f- base1 -6))
3787       (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group)))
3788       (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3789       (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group)))
3790       (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval))
3791     )
3792   )
3793 )
3794
3795 (bit32-An-indirect-operand Unprefixed  4  8)
3796 (bit32-An-indirect-operand   Prefixed 12 16)
3797
3798 ;-------------------------------------------------------------
3799 ; dsp:d[r] relative
3800 ;-------------------------------------------------------------
3801
3802 (define-pmacro (bit16-relative-operand offset)
3803   (begin
3804     (define-derived-operand
3805       (name (.sym bit16- offset -8-SB-relative))
3806       (comment (.str "m16c dsp:8[sb] relative bit " xmode))
3807       (attrs (machine 16))
3808       (mode BI)
3809       (args ((.sym BitBase16- offset -u8)))
3810       (syntax (.str "${BitBase16-" offset "-u8}[sb]"))
3811       (base-ifield f-12-4)
3812       (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8)))
3813       (ifield-assertion (eq f-12-4 #xA))
3814       (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8)))
3815       (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval))
3816     )
3817     (define-derived-operand
3818       (name (.sym bit16- offset -16-SB-relative))
3819       (comment (.str "m16c dsp:16[sb] relative bit " xmode))
3820       (attrs (machine 16))
3821       (mode BI)
3822       (args ((.sym BitBase16- offset -u16)))
3823       (syntax (.str "${BitBase16-" offset "-u16}[sb]"))
3824       (base-ifield f-12-4)
3825       (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16)))
3826       (ifield-assertion (eq f-12-4 #xE))
3827       (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16)))
3828       (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval))
3829     )
3830     (define-derived-operand
3831       (name (.sym bit16- offset -8-FB-relative))
3832       (comment (.str "m16c dsp:8[fb] relative bit " xmode))
3833       (attrs (machine 16))
3834       (mode BI)
3835       (args ((.sym BitBase16- offset -s8)))
3836       (syntax (.str "${BitBase16-" offset "-s8}[fb]"))
3837       (base-ifield f-12-4)
3838       (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8)))
3839       (ifield-assertion (eq f-12-4 #xB))
3840       (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8)))
3841       (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval))
3842     )
3843     (define-derived-operand
3844       (name (.sym bit16- offset -8-An-relative))
3845       (comment (.str "m16c dsp:8[An] relative bit " xmode))
3846       (attrs (machine 16))
3847       (mode BI)
3848       (args (Bit16An (.sym Dsp- offset -u8)))
3849       (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]"))
3850       (base-ifield f-12-4)
3851       (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An))
3852       (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3853       (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An))
3854       (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval))
3855     )
3856     (define-derived-operand
3857       (name (.sym bit16- offset -16-An-relative))
3858       (comment (.str "m16c dsp:16[An] relative bit " xmode))
3859       (attrs (machine 16))
3860       (mode BI)
3861       (args (Bit16An (.sym Dsp- offset -u16)))
3862       (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]"))
3863       (base-ifield f-12-4)
3864       (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An))
3865       (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3866       (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An))
3867       (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval))
3868     )
3869   )
3870 )
3871
3872 (bit16-relative-operand 16)
3873
3874 (define-pmacro (bit32-relative-operand offset group base1 base2)
3875   (begin
3876     (define-derived-operand
3877       (name (.sym bit32- offset -11-SB-relative- group))
3878       (comment "m32c bit,base:11[sb] relative bit")
3879       (attrs (machine 32))
3880       (mode BI)
3881       (args ((.sym BitBase32- offset -u11- group)))
3882       (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]"))
3883       (base-ifield (.sym f- base1 -12))
3884       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group)))
3885       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3886       (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group)))
3887       (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval))
3888     )
3889     (define-derived-operand
3890       (name (.sym bit32- offset -19-SB-relative- group))
3891       (comment "m32c bit,base:19[sb] relative bit")
3892       (attrs (machine 32))
3893       (mode BI)
3894       (args ((.sym BitBase32- offset -u19- group)))
3895       (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]"))
3896       (base-ifield (.sym f- base1 -12))
3897       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group)))
3898       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3899       (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group)))
3900       (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval))
3901     )
3902     (define-derived-operand
3903       (name (.sym bit32- offset -11-FB-relative- group))
3904       (comment "m32c bit,base:11[fb] relative bit")
3905       (attrs (machine 32))
3906       (mode BI)
3907       (args ((.sym BitBase32- offset -s11- group)))
3908       (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]"))
3909       (base-ifield (.sym f- base1 -12))
3910       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group)))
3911       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3912       (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group)))
3913       (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval))
3914     )
3915     (define-derived-operand
3916       (name (.sym bit32- offset -19-FB-relative- group))
3917       (comment "m32c bit,base:19[fb] relative bit")
3918       (attrs (machine 32))
3919       (mode BI)
3920       (args ((.sym BitBase32- offset -s19- group)))
3921       (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]"))
3922       (base-ifield (.sym f- base1 -12))
3923       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group)))
3924       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3925       (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group)))
3926       (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval))
3927     )
3928     (define-derived-operand
3929       (name (.sym bit32- offset -11-An-relative- group))
3930       (comment "m32c bit,base:11[An] relative bit")
3931       (attrs (machine 32))
3932       (mode BI)
3933       (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
3934       (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]"))
3935       (base-ifield (.sym f- base1 -12))
3936       (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
3937       (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3938       (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group)))
3939       (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval))
3940     )
3941     (define-derived-operand
3942       (name (.sym bit32- offset -19-An-relative- group))
3943       (comment "m32c bit,base:19[An] relative bit")
3944       (attrs (machine 32))
3945       (mode BI)
3946       (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
3947       (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]"))
3948       (base-ifield (.sym f- base1 -12))
3949       (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
3950       (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3951       (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group)))
3952       (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval))
3953     )
3954     (define-derived-operand
3955       (name (.sym bit32- offset -27-An-relative- group))
3956       (comment "m32c bit,base:27[An] relative bit")
3957       (attrs (machine 32))
3958       (mode BI)
3959       (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
3960       (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]"))
3961       (base-ifield (.sym f- base1 -12))
3962       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
3963       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3964       (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group)))
3965       (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval))
3966     )
3967   )
3968 )
3969
3970 (bit32-relative-operand 16 Unprefixed  4  8)
3971 (bit32-relative-operand 24   Prefixed 12 16)
3972
3973 (define-derived-operand
3974   (name bit16-11-SB-relative-S)
3975   (comment "m16c bit,base:11[sb] relative bit")
3976   (attrs (machine 16))
3977   (mode BI)
3978   (args (BitBase16-8-u11-S))
3979   (syntax "${BitBase16-8-u11-S}[sb]")
3980   (base-ifield (.sym f-5-3))
3981   (encoding (+ BitBase16-8-u11-S))
3982 ;  (ifield-assertion (#t))
3983   (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S))
3984   (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval))
3985 )
3986
3987 (define-derived-operand
3988   (name Rn16-push-S-derived)
3989   (comment "m16c r0[lh] for push,pop short version")
3990   (attrs (machine 16))
3991   (mode QI)
3992   (args (Rn16-push-S))
3993   (syntax "${Rn16-push-S}")
3994   (base-ifield (.sym f-4-1))
3995   (encoding (+ Rn16-push-S))
3996 ;  (ifield-assertion (#t))
3997   (getter (trunc QI Rn16-push-S))
3998   (setter (set Rn16-push-S newval))
3999 )
4000
4001 (define-derived-operand
4002   (name An16-push-S-derived)
4003   (comment "m16c r0[lh] for push,pop short version")
4004   (attrs (machine 16))
4005   (mode HI)
4006   (args (An16-push-S))
4007   (syntax "${An16-push-S}")
4008   (base-ifield (.sym f-4-1))
4009   (encoding (+ An16-push-S))
4010 ;  (ifield-assertion (#t))
4011   (getter (trunc QI An16-push-S))
4012   (setter (set An16-push-S newval))
4013 )
4014
4015 ;-------------------------------------------------------------
4016 ; Absolute address
4017 ;-------------------------------------------------------------
4018
4019 (define-pmacro (bit16-absolute offset)
4020   (begin
4021     (define-derived-operand
4022       (name (.sym bit16- offset -16-absolute))
4023       (comment "m16c absolute address")
4024       (attrs (machine 16))
4025       (mode BI)
4026       (args ((.sym BitBase16- offset -u16)))
4027       (syntax (.str "${BitBase16-" offset "-u16}"))
4028       (base-ifield f-12-4)
4029       (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16)))
4030       (ifield-assertion (eq f-12-4 #xF))
4031       (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16)))
4032       (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval))
4033     )
4034   )
4035 )
4036
4037 (bit16-absolute 16)
4038
4039 (define-pmacro (bit32-absolute offset group base1 base2)
4040   (begin
4041     (define-derived-operand
4042       (name (.sym bit32- offset -19-absolute- group))
4043       (comment "m32c absolute address bit")
4044       (attrs (machine 32))
4045       (mode BI)
4046       (args ((.sym BitBase32- offset -u19- group)))
4047       (syntax (.str "${BitBase32-" offset "-u19-" group "}"))
4048       (base-ifield (.sym f- base1 -12))
4049       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group)))
4050       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
4051       (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group)))
4052       (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval))
4053     )
4054     (define-derived-operand
4055       (name (.sym bit32- offset -27-absolute- group))
4056       (comment "m32c absolute address bit")
4057       (attrs (machine 32))
4058       (mode BI)
4059       (args ((.sym BitBase32- offset -u27- group)))
4060       (syntax (.str "${BitBase32-" offset "-u27-" group "}"))
4061       (base-ifield (.sym f- base1 -12))
4062       (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group)))
4063       (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
4064       (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group)))
4065       (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval))
4066     )
4067   )
4068 )
4069
4070 (bit32-absolute 16 Unprefixed  4  8)
4071 (bit32-absolute 24   Prefixed 12 16)
4072
4073 ;-------------------------------------------------------------
4074 ; Destination operands for short fomat insns
4075 ;-------------------------------------------------------------
4076
4077 (define-derived-operand
4078   (name dst16-3-S-R0l-direct-QI)
4079   (comment "m16c R0l direct QI")
4080   (attrs (machine 16))
4081   (mode QI)
4082   (args (R0l))
4083   (syntax "r0l")
4084   (base-ifield f-5-3)
4085   (encoding (+ (f-5-3 4)))
4086   (ifield-assertion (eq f-5-3 4))
4087   (getter (trunc QI R0l))
4088   (setter (set R0l newval))
4089 )
4090 (define-derived-operand
4091   (name dst16-3-S-R0h-direct-QI)
4092   (comment "m16c R0h direct QI")
4093   (attrs (machine 16))
4094   (mode QI)
4095   (args (R0h))
4096   (syntax "r0h")
4097   (base-ifield f-5-3)
4098   (encoding (+ (f-5-3 3)))
4099   (ifield-assertion (eq f-5-3 3))
4100   (getter (trunc QI R0h))
4101   (setter (set R0h newval))
4102 )
4103 (define-derived-operand
4104   (name dst16-3-S-8-8-SB-relative-QI)
4105   (comment "m16c SB relative QI")
4106   (attrs (machine 16))
4107   (mode QI)
4108   (args (Dsp-8-u8))
4109   (syntax "${Dsp-8-u8}[sb]")
4110   (base-ifield f-5-3)
4111   (encoding (+ (f-5-3 5) Dsp-8-u8))
4112   (ifield-assertion (eq f-5-3 5))
4113   (getter (mem16 QI (add Dsp-8-u8 (reg h-sb))))
4114   (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval))
4115 )
4116 (define-derived-operand
4117   (name dst16-3-S-8-8-FB-relative-QI)
4118   (comment "m16c FB relative QI")
4119   (attrs (machine 16))
4120   (mode QI)
4121   (args (Dsp-8-s8))
4122   (syntax "${Dsp-8-s8}[fb]")
4123   (base-ifield f-5-3)
4124   (encoding (+ (f-5-3 6) Dsp-8-s8))
4125   (ifield-assertion (eq f-5-3 6))
4126   (getter (mem16 QI (add Dsp-8-s8 (reg h-fb))))
4127   (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval))
4128 )
4129 (define-derived-operand
4130   (name dst16-3-S-8-16-absolute-QI)
4131   (comment "m16c absolute address QI")
4132   (attrs (machine 16))
4133   (mode QI)
4134   (args (Dsp-8-u16))
4135   (syntax "${Dsp-8-u16}")
4136   (base-ifield f-5-3)
4137   (encoding (+ (f-5-3 7) Dsp-8-u16))
4138   (ifield-assertion (eq f-5-3 7))
4139   (getter (mem16 QI Dsp-8-u16))
4140   (setter (set (mem16 QI Dsp-8-u16) newval))
4141 )
4142 (define-derived-operand
4143   (name dst16-3-S-16-8-SB-relative-QI)
4144   (comment "m16c SB relative QI")
4145   (attrs (machine 16))
4146   (mode QI)
4147   (args (Dsp-16-u8))
4148   (syntax "${Dsp-16-u8}[sb]")
4149   (base-ifield f-5-3)
4150   (encoding (+ (f-5-3 5) Dsp-16-u8))
4151   (ifield-assertion (eq f-5-3 5))
4152   (getter (mem16 QI (add Dsp-16-u8 (reg h-sb))))
4153   (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval))
4154 )
4155 (define-derived-operand
4156   (name dst16-3-S-16-8-FB-relative-QI)
4157   (comment "m16c FB relative QI")
4158   (attrs (machine 16))
4159   (mode QI)
4160   (args (Dsp-16-s8))
4161   (syntax "${Dsp-16-s8}[fb]")
4162   (base-ifield f-5-3)
4163   (encoding (+ (f-5-3 6) Dsp-16-s8))
4164   (ifield-assertion (eq f-5-3 6))
4165   (getter (mem16 QI (add Dsp-16-s8 (reg h-fb))))
4166   (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval))
4167 )
4168 (define-derived-operand
4169   (name dst16-3-S-16-16-absolute-QI)
4170   (comment "m16c absolute address QI")
4171   (attrs (machine 16))
4172   (mode QI)
4173   (args (Dsp-16-u16))
4174   (syntax "${Dsp-16-u16}")
4175   (base-ifield f-5-3)
4176   (encoding (+ (f-5-3 7) Dsp-16-u16))
4177   (ifield-assertion (eq f-5-3 7))
4178   (getter (mem16 QI Dsp-16-u16))
4179   (setter (set (mem16 QI Dsp-16-u16) newval))
4180 )
4181 (define-derived-operand
4182   (name srcdst16-r0l-r0h-S-derived)
4183   (comment "m16c r0l/r0h operand for short format insns")
4184   (attrs (machine 16))
4185   (mode SI)
4186   (args (SrcDst16-r0l-r0h-S-normal))
4187   (syntax "${SrcDst16-r0l-r0h-S-normal}")
4188   (base-ifield f-6-3)
4189   (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal))
4190   (ifield-assertion (eq f-6-2 0))
4191   (getter (trunc SI SrcDst16-r0l-r0h-S-normal))
4192   (setter ()) ; no setter
4193 )
4194 (define-derived-operand
4195   (name dst32-2-S-R0l-direct-QI)
4196   (comment "m32c R0l direct QI")
4197   (attrs (machine 32))
4198   (mode QI)
4199   (args (R0l))
4200   (syntax "r0l")
4201   (base-ifield f-2-2)
4202   (encoding (+ (f-2-2 0)))
4203   (ifield-assertion (eq f-2-2 0))
4204   (getter (trunc QI R0l))
4205   (setter (set R0l newval))
4206 )
4207 (define-derived-operand
4208   (name dst32-2-S-R0-direct-HI)
4209   (comment "m32c R0 direct HI")
4210   (attrs (machine 32))
4211   (mode HI)
4212   (args (R0))
4213   (syntax "r0")
4214   (base-ifield f-2-2)
4215   (encoding (+ (f-2-2 0)))
4216   (ifield-assertion (eq f-2-2 0))
4217   (getter (trunc HI R0))
4218   (setter (set R0 newval))
4219 )
4220 (define-derived-operand
4221   (name dst32-1-S-A0-direct-HI)
4222   (comment "m32c A0 direct HI")
4223   (attrs (machine 32))
4224   (mode HI)
4225   (args (A0))
4226   (syntax "a0")
4227   (base-ifield f-7-1)
4228   (encoding (+ (f-7-1 0)))
4229   (ifield-assertion (eq f-7-1 0))
4230   (getter (trunc HI A0))
4231   (setter (set A0 newval))
4232 )
4233 (define-derived-operand
4234   (name dst32-1-S-A1-direct-HI)
4235   (comment "m32c A1 direct HI")
4236   (attrs (machine 32))
4237   (mode HI)
4238   (args (A1))
4239   (syntax "a1")
4240   (base-ifield f-7-1)
4241   (encoding (+ (f-7-1 1)))
4242   (ifield-assertion (eq f-7-1 1))
4243   (getter (trunc HI A1))
4244   (setter (set A1 newval))
4245 )
4246 (define-pmacro (dst32-2-S-operands xmode)
4247   (begin
4248     (define-derived-operand
4249       (name (.sym dst32-2-S-8-SB-relative- xmode))
4250       (comment "m32c SB relative for short binary insns")
4251       (attrs (machine 32))
4252       (mode xmode)
4253       (args (Dsp-8-u8))
4254       (syntax "${Dsp-8-u8}[sb]")
4255       (base-ifield f-2-2)
4256       (encoding (+ (f-2-2 2) Dsp-8-u8))
4257       (ifield-assertion (eq f-2-2 2))
4258       (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
4259       (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
4260 ;      (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb))))
4261 ;      (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval))
4262     )
4263     (define-derived-operand
4264       (name (.sym dst32-2-S-8-FB-relative- xmode))
4265       (comment "m32c FB relative for short binary insns")
4266       (attrs (machine 32))
4267       (mode xmode)
4268       (args (Dsp-8-s8))
4269       (syntax "${Dsp-8-s8}[fb]")
4270       (base-ifield f-2-2)
4271       (encoding (+ (f-2-2 3) Dsp-8-s8))
4272       (ifield-assertion (eq f-2-2 3))
4273       (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
4274       (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
4275 ;      (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb))))
4276 ;      (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval))
4277     )
4278     (define-derived-operand
4279       (name (.sym dst32-2-S-16-absolute- xmode))
4280       (comment "m32c absolute address for short binary insns")
4281       (attrs (machine 32))
4282       (mode xmode)
4283       (args (Dsp-8-u16))
4284       (syntax "${Dsp-8-u16}")
4285       (base-ifield f-2-2)
4286       (encoding (+ (f-2-2 1) Dsp-8-u16))
4287       (ifield-assertion (eq f-2-2 1))
4288       (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
4289       (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
4290 ;      (getter (mem32 xmode Dsp-8-u16))
4291 ;      (setter (set (mem32 xmode Dsp-8-u16) newval))
4292     )
4293 ;     (define-derived-operand
4294 ;       (name (.sym dst32-2-S-8-SB-relative-indirect- xmode))
4295 ;       (comment "m32c SB relative for short binary insns")
4296 ;       (attrs (machine 32))
4297 ;       (mode xmode)
4298 ;       (args (Dsp-16-u8))
4299 ;       (syntax "[${Dsp-16-u8}[sb]]")
4300 ;       (base-ifield f-10-2)
4301 ;       (encoding (+ (f-10-2 2) Dsp-16-u8))
4302 ;       (ifield-assertion (eq f-10-2 2))
4303 ;       (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))))
4304 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval))
4305 ;     )
4306 ;     (define-derived-operand
4307 ;       (name (.sym dst32-2-S-8-FB-relative-indirect- xmode))
4308 ;       (comment "m32c FB relative for short binary insns")
4309 ;       (attrs (machine 32))
4310 ;       (mode xmode)
4311 ;       (args (Dsp-16-s8))
4312 ;       (syntax "[${Dsp-16-s8}[fb]]")
4313 ;       (base-ifield f-10-2)
4314 ;       (encoding (+ (f-10-2 3) Dsp-16-s8))
4315 ;       (ifield-assertion (eq f-10-2 3))
4316 ;       (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))))
4317 ;       (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval))
4318 ;     )
4319 ;     (define-derived-operand
4320 ;       (name (.sym dst32-2-S-16-absolute-indirect- xmode))
4321 ;       (comment "m32c absolute address for short binary insns")
4322 ;       (attrs (machine 32))
4323 ;       (mode xmode)
4324 ;       (args (Dsp-16-u16))
4325 ;       (syntax "[${Dsp-16-u16}]")
4326 ;       (base-ifield f-10-2)
4327 ;       (encoding (+ (f-10-2 1) Dsp-16-u16))
4328 ;       (ifield-assertion (eq f-10-2 1))
4329 ;       (getter (mem32 xmode (indirect-addr Dsp-16-u16)))
4330 ;       (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval))
4331 ;     )
4332   )
4333 )
4334
4335 (dst32-2-S-operands QI)
4336 (dst32-2-S-operands HI)
4337 (dst32-2-S-operands SI)
4338
4339 ;=============================================================
4340 ; Anyof operands
4341 ;-------------------------------------------------------------
4342 ; Source operands with no additional fields
4343 ;-------------------------------------------------------------
4344
4345 (define-pmacro (src16-basic-operand xmode)
4346   (begin
4347     (define-anyof-operand
4348       (name (.sym src16-basic- xmode))
4349       (comment (.str "m16c source operand of size " xmode " with no additional fields"))
4350       (attrs (machine 16))
4351       (mode xmode)
4352       (choices
4353        (.sym src16-Rn-direct- xmode)
4354        (.sym src16-An-direct- xmode)
4355        (.sym src16-An-indirect- xmode)
4356       )
4357     )
4358   )
4359 )
4360 (src16-basic-operand QI)
4361 (src16-basic-operand HI)
4362
4363 (define-pmacro (src32-basic-operand xmode)
4364   (begin
4365     (define-anyof-operand
4366       (name (.sym src32-basic-Unprefixed- xmode))
4367       (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4368       (attrs (machine 32))
4369       (mode xmode)
4370       (choices
4371        (.sym src32-Rn-direct-Unprefixed- xmode)
4372        (.sym src32-An-direct-Unprefixed- xmode)
4373        (.sym src32-An-indirect-Unprefixed- xmode)
4374       )
4375     )
4376     (define-anyof-operand
4377       (name (.sym src32-basic-Prefixed- xmode))
4378       (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4379       (attrs (machine 32))
4380       (mode xmode)
4381       (choices
4382        (.sym src32-Rn-direct-Prefixed- xmode)
4383        (.sym src32-An-direct-Prefixed- xmode)
4384        (.sym src32-An-indirect-Prefixed- xmode)
4385       )
4386     )
4387 ;     (define-anyof-operand
4388 ;       (name (.sym src32-basic-indirect- xmode))
4389 ;       (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields"))
4390 ;       (attrs (machine 32))
4391 ;       (mode xmode)
4392 ;       (choices
4393 ;        (.sym src32-An-indirect-indirect- xmode)
4394 ;       )
4395 ;     )
4396   )
4397 )
4398
4399 (src32-basic-operand QI)
4400 (src32-basic-operand HI)
4401 (src32-basic-operand SI)
4402
4403 (define-anyof-operand
4404   (name src32-basic-ExtPrefixed-QI)
4405   (comment "m32c source operand of size QI with no additional fields")
4406   (attrs (machine 32))
4407   (mode QI)
4408   (choices
4409    src32-Rn-direct-Prefixed-QI
4410    src32-An-indirect-Prefixed-QI
4411   )
4412 )
4413
4414 ;-------------------------------------------------------------
4415 ; Source operands with additional fields at offset 16 bits
4416 ;-------------------------------------------------------------
4417
4418 (define-pmacro (src16-16-operand xmode)
4419   (begin
4420     (define-anyof-operand
4421       (name (.sym src16-16-8- xmode))
4422       (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4423       (attrs (machine 16))
4424       (mode xmode)
4425       (choices
4426        (.sym src16-16-8-An-relative- xmode)
4427        (.sym src16-16-8-SB-relative- xmode)
4428        (.sym src16-16-8-FB-relative- xmode)
4429       )
4430     )
4431     (define-anyof-operand
4432       (name (.sym src16-16-16- xmode))
4433       (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4434       (attrs (machine 16))
4435       (mode xmode)
4436       (choices
4437        (.sym src16-16-16-An-relative- xmode)
4438        (.sym src16-16-16-SB-relative- xmode)
4439        (.sym src16-16-16-absolute- xmode)
4440       )
4441     )
4442   )
4443 )
4444 (src16-16-operand QI)
4445 (src16-16-operand HI)
4446
4447 (define-pmacro (src32-16-operand xmode)
4448   (begin
4449     (define-anyof-operand
4450       (name (.sym src32-16-8-Unprefixed- xmode))
4451       (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4452       (attrs (machine 32))
4453       (mode xmode)
4454       (choices
4455        (.sym src32-16-8-An-relative-Unprefixed- xmode)
4456        (.sym src32-16-8-SB-relative-Unprefixed- xmode)
4457        (.sym src32-16-8-FB-relative-Unprefixed- xmode)
4458       )
4459     )
4460     (define-anyof-operand
4461       (name (.sym src32-16-16-Unprefixed- xmode))
4462       (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4463       (attrs (machine 32))
4464       (mode xmode)
4465       (choices
4466        (.sym src32-16-16-An-relative-Unprefixed- xmode)
4467        (.sym src32-16-16-SB-relative-Unprefixed- xmode)
4468        (.sym src32-16-16-FB-relative-Unprefixed- xmode)
4469        (.sym src32-16-16-absolute-Unprefixed- xmode)
4470       )
4471     )
4472     (define-anyof-operand
4473       (name (.sym src32-16-24-Unprefixed- xmode))
4474       (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4475       (attrs (machine 32))
4476       (mode xmode)
4477       (choices
4478        (.sym src32-16-24-An-relative-Unprefixed- xmode)
4479        (.sym src32-16-24-absolute-Unprefixed- xmode)
4480       )
4481     )
4482   )
4483 )
4484
4485 (src32-16-operand QI)
4486 (src32-16-operand HI)
4487 (src32-16-operand SI)
4488
4489 ;-------------------------------------------------------------
4490 ; Source operands with additional fields at offset 24 bits
4491 ;-------------------------------------------------------------
4492
4493 (define-pmacro (src-24-operand group xmode)
4494   (begin
4495     (define-anyof-operand
4496       (name (.sym src32-24-8- group - xmode))
4497       (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24"))
4498       (attrs (machine 32))
4499       (mode xmode)
4500       (choices
4501        (.sym src32-24-8-An-relative- group - xmode)
4502        (.sym src32-24-8-SB-relative- group - xmode)
4503        (.sym src32-24-8-FB-relative- group - xmode)
4504       )
4505     )
4506     (define-anyof-operand
4507       (name (.sym src32-24-16- group - xmode))
4508       (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4509       (attrs (machine 32))
4510       (mode xmode)
4511       (choices
4512        (.sym src32-24-16-An-relative- group - xmode)
4513        (.sym src32-24-16-SB-relative- group - xmode)
4514        (.sym src32-24-16-FB-relative- group - xmode)
4515        (.sym src32-24-16-absolute- group - xmode)
4516       )
4517     )
4518     (define-anyof-operand
4519       (name (.sym src32-24-24- group - xmode))
4520       (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4521       (attrs (machine 32))
4522       (mode xmode)
4523       (choices
4524        (.sym src32-24-24-An-relative- group - xmode)
4525        (.sym src32-24-24-absolute- group - xmode)
4526       )
4527     )
4528   )
4529 )
4530
4531 (src-24-operand Prefixed   QI)
4532 (src-24-operand Prefixed   HI)
4533 (src-24-operand Prefixed   SI)
4534
4535 (define-pmacro (src-24-indirect-operand xmode)
4536   (begin
4537 ;     (define-anyof-operand
4538 ;       (name (.sym src32-24-8-indirect- xmode))
4539 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4540 ;       (attrs (machine 32))
4541 ;       (mode xmode)
4542 ;       (choices
4543 ;        (.sym src32-24-8-An-relative-indirect- xmode)
4544 ;        (.sym src32-24-8-SB-relative-indirect- xmode)
4545 ;        (.sym src32-24-8-FB-relative-indirect- xmode)
4546 ;       )
4547 ;     )
4548 ;     (define-anyof-operand
4549 ;       (name (.sym src32-24-16-indirect- xmode))
4550 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4551 ;       (attrs (machine 32))
4552 ;       (mode xmode)
4553 ;       (choices
4554 ;        (.sym src32-24-16-An-relative-indirect- xmode)
4555 ;        (.sym src32-24-16-SB-relative-indirect- xmode)
4556 ;        (.sym src32-24-16-FB-relative-indirect- xmode)
4557 ;       )
4558 ;     )
4559 ;     (define-anyof-operand
4560 ;       (name (.sym src32-24-24-indirect- xmode))
4561 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4562 ;       (attrs (machine 32))
4563 ;       (mode xmode)
4564 ;       (choices
4565 ;        (.sym src32-24-24-An-relative-indirect- xmode)
4566 ;       )
4567 ;     )
4568 ;     (define-anyof-operand
4569 ;       (name (.sym src32-24-16-absolute-indirect- xmode))
4570 ;       (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect"))
4571 ;       (attrs (machine 32))
4572 ;       (mode xmode)
4573 ;       (choices
4574 ;        (.sym src32-24-16-absolute-indirect-derived- xmode)
4575 ;       )
4576 ;     )
4577 ;     (define-anyof-operand
4578 ;       (name (.sym src32-24-24-absolute-indirect- xmode))
4579 ;       (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect"))
4580 ;       (attrs (machine 32))
4581 ;       (mode xmode)
4582 ;       (choices
4583 ;        (.sym src32-24-24-absolute-indirect-derived- xmode)
4584 ;       )
4585 ;     )
4586   )
4587 )
4588
4589 ; (src-24-indirect-operand QI)
4590 ; (src-24-indirect-operand HI)
4591 ; (src-24-indirect-operand SI)
4592
4593 ;-------------------------------------------------------------
4594 ; Destination operands with no additional fields
4595 ;-------------------------------------------------------------
4596
4597 (define-pmacro (dst16-basic-operand xmode)
4598   (begin
4599     (define-anyof-operand
4600       (name (.sym dst16-basic- xmode))
4601       (comment (.str "m16c destination operand of size " xmode " with no additional fields"))
4602       (attrs (machine 16))
4603       (mode xmode)
4604       (choices
4605        (.sym dst16-Rn-direct- xmode)
4606        (.sym dst16-An-direct- xmode)
4607        (.sym dst16-An-indirect- xmode)
4608       )
4609     )
4610   )
4611 )
4612
4613 (dst16-basic-operand QI)
4614 (dst16-basic-operand HI)
4615 (dst16-basic-operand SI)
4616
4617 (define-pmacro (dst32-basic-operand xmode)
4618   (begin
4619     (define-anyof-operand
4620       (name (.sym dst32-basic-Unprefixed- xmode))
4621       (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4622       (attrs (machine 32))
4623       (mode xmode)
4624       (choices
4625        (.sym dst32-Rn-direct-Unprefixed- xmode)
4626        (.sym dst32-An-direct-Unprefixed- xmode)
4627        (.sym dst32-An-indirect-Unprefixed- xmode)
4628       )
4629     )
4630     (define-anyof-operand
4631       (name (.sym dst32-basic-Prefixed- xmode))
4632       (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4633       (attrs (machine 32))
4634       (mode xmode)
4635       (choices
4636        (.sym dst32-Rn-direct-Prefixed- xmode)
4637        (.sym dst32-An-direct-Prefixed- xmode)
4638        (.sym dst32-An-indirect-Prefixed- xmode)
4639       )
4640     )
4641   )
4642 )
4643
4644 (dst32-basic-operand QI)
4645 (dst32-basic-operand HI)
4646 (dst32-basic-operand SI)
4647
4648 ;-------------------------------------------------------------
4649 ; Destination operands with possible additional fields at offset 16 bits
4650 ;-------------------------------------------------------------
4651
4652 (define-pmacro (dst16-16-operand xmode)
4653   (begin
4654     (define-anyof-operand
4655       (name (.sym dst16-16- xmode))
4656       (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4657       (attrs (machine 16))
4658       (mode xmode)
4659       (choices
4660        (.sym dst16-Rn-direct- xmode)
4661        (.sym dst16-An-direct- xmode)
4662        (.sym dst16-An-indirect- xmode)
4663        (.sym dst16-16-8-An-relative- xmode)
4664        (.sym dst16-16-16-An-relative- xmode)
4665        (.sym dst16-16-8-SB-relative- xmode)
4666        (.sym dst16-16-16-SB-relative- xmode)
4667        (.sym dst16-16-8-FB-relative- xmode)
4668        (.sym dst16-16-16-absolute- xmode)
4669       )
4670     )
4671     (define-anyof-operand
4672       (name (.sym dst16-16-8- xmode))
4673       (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4674       (attrs (machine 16))
4675       (mode xmode)
4676       (choices
4677        (.sym dst16-16-8-An-relative- xmode)
4678        (.sym dst16-16-8-SB-relative- xmode)
4679        (.sym dst16-16-8-FB-relative- xmode)
4680       )
4681     )
4682     (define-anyof-operand
4683       (name (.sym dst16-16-16- xmode))
4684       (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4685       (attrs (machine 16))
4686       (mode xmode)
4687       (choices
4688        (.sym dst16-16-16-An-relative- xmode)
4689        (.sym dst16-16-16-SB-relative- xmode)
4690        (.sym dst16-16-16-absolute- xmode)
4691       )
4692     )
4693   )
4694 )
4695
4696 (dst16-16-operand QI)
4697 (dst16-16-operand HI)
4698 (dst16-16-operand SI)
4699
4700 (define-anyof-operand
4701   (name dst16-16-Ext-QI)
4702   (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16")
4703   (attrs (machine 16))
4704   (mode QI)
4705   (choices
4706    dst16-Rn-direct-Ext-QI
4707    dst16-An-indirect-Ext-QI
4708    dst16-16-8-An-relative-Ext-QI
4709    dst16-16-16-An-relative-Ext-QI
4710    dst16-16-8-SB-relative-Ext-QI
4711    dst16-16-16-SB-relative-Ext-QI
4712    dst16-16-8-FB-relative-Ext-QI
4713    dst16-16-16-absolute-Ext-QI
4714   )
4715 )
4716
4717 (define-derived-operand
4718   (name dst16-An-indirect-Mova-HI)
4719   (comment "m16c addressof An indirect destination HI")
4720   (attrs (ISA m16c))
4721   (mode HI)
4722   (args (Dst16An))
4723   (syntax "[$Dst16An]")
4724   (base-ifield f-12-4)
4725   (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
4726   (ifield-assertion
4727     (andif (eq f-12-2 1) (eq f-14-1 1)))
4728   (getter Dst16An)
4729   (setter (nop))
4730   )
4731
4732 (define-derived-operand
4733   (name dst16-16-8-An-relative-Mova-HI)
4734   (comment
4735     "m16c addressof dsp:8[An] relative destination HI")
4736   (attrs (ISA m16c))
4737   (mode HI)
4738   (args (Dst16An Dsp-16-u8))
4739   (syntax "${Dsp-16-u8}[$Dst16An]")
4740   (base-ifield f-12-4)
4741   (encoding
4742     (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An))
4743   (ifield-assertion
4744     (andif (eq f-12-2 2) (eq f-14-1 0)))
4745   (getter (add Dsp-16-u8 Dst16An))
4746   (setter (nop))
4747 )
4748 (define-derived-operand
4749   (name dst16-16-16-An-relative-Mova-HI)
4750   (comment
4751     "m16c addressof dsp:16[An] relative destination HI")
4752   (attrs (ISA m16c))
4753   (mode HI)
4754   (args (Dst16An Dsp-16-u16))
4755   (syntax "${Dsp-16-u16}[$Dst16An]")
4756   (base-ifield f-12-4)
4757   (encoding
4758     (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An))
4759   (ifield-assertion
4760     (andif (eq f-12-2 3) (eq f-14-1 0)))
4761   (getter (add Dsp-16-u16 Dst16An))
4762   (setter (nop))
4763   )
4764 (define-derived-operand
4765   (name dst16-16-8-SB-relative-Mova-HI)
4766   (comment
4767     "m16c addressof dsp:8[sb] relative destination HI")
4768   (attrs (ISA m16c))
4769   (mode HI)
4770   (args (Dsp-16-u8))
4771   (syntax "${Dsp-16-u8}[sb]")
4772   (base-ifield f-12-4)
4773   (encoding (+ (f-12-4 10) Dsp-16-u8))
4774   (ifield-assertion (eq f-12-4 10))
4775   (getter (add Dsp-16-u8 (reg h-sb)))
4776   (setter (nop))
4777 )
4778 (define-derived-operand
4779   (name dst16-16-16-SB-relative-Mova-HI)
4780   (comment
4781     "m16c addressof dsp:16[sb] relative destination HI")
4782   (attrs (ISA m16c))
4783   (mode HI)
4784   (args (Dsp-16-u16))
4785   (syntax "${Dsp-16-u16}[sb]")
4786   (base-ifield f-12-4)
4787   (encoding (+ (f-12-4 14) Dsp-16-u16))
4788   (ifield-assertion (eq f-12-4 14))
4789   (getter (add Dsp-16-u16 (reg h-sb)))
4790   (setter (nop))
4791   )
4792 (define-derived-operand
4793   (name dst16-16-8-FB-relative-Mova-HI)
4794   (comment
4795     "m16c addressof dsp:8[fb] relative destination HI")
4796   (attrs (ISA m16c))
4797   (mode HI)
4798   (args (Dsp-16-s8))
4799   (syntax "${Dsp-16-s8}[fb]")
4800   (base-ifield f-12-4)
4801   (encoding (+ (f-12-4 11) Dsp-16-s8))
4802   (ifield-assertion (eq f-12-4 11))
4803   (getter (add Dsp-16-s8 (reg h-fb)))
4804   (setter (nop))
4805     )
4806 (define-derived-operand
4807   (name dst16-16-16-absolute-Mova-HI)
4808   (comment "m16c addressof absolute address HI")
4809   (attrs (ISA m16c))
4810   (mode HI)
4811   (args (Dsp-16-u16))
4812   (syntax "${Dsp-16-u16}")
4813   (base-ifield f-12-4)
4814   (encoding (+ (f-12-4 15) Dsp-16-u16))
4815   (ifield-assertion (eq f-12-4 15))
4816   (getter Dsp-16-u16)
4817   (setter (nop))
4818   )
4819
4820 (define-anyof-operand
4821   (name dst16-16-Mova-HI)
4822   (comment "m16c addressof destination operand of size HI with additional fields at offset 16")
4823   (attrs (machine 16))
4824   (mode HI)
4825   (choices
4826    dst16-An-indirect-Mova-HI
4827    dst16-16-8-An-relative-Mova-HI
4828    dst16-16-16-An-relative-Mova-HI
4829    dst16-16-8-SB-relative-Mova-HI
4830    dst16-16-16-SB-relative-Mova-HI
4831    dst16-16-8-FB-relative-Mova-HI
4832    dst16-16-16-absolute-Mova-HI
4833   )
4834 )
4835
4836 (define-derived-operand
4837   (name dst32-An-indirect-Unprefixed-Mova-SI)
4838   (comment "m32c addressof An indirect destination SI")
4839   (attrs (ISA m32c))
4840   (mode SI)
4841   (args (Dst32AnUnprefixed))
4842   (syntax "[$Dst32AnUnprefixed]")
4843   (base-ifield f-4-6)
4844   (encoding
4845     (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed))
4846   (ifield-assertion
4847     (andif (eq f-4-3 0) (eq f-8-1 0)))
4848   (getter Dst32AnUnprefixed)
4849   (setter (nop))
4850   )
4851
4852 (define-derived-operand
4853   (name dst32-16-8-An-relative-Unprefixed-Mova-SI)
4854   (comment "m32c addressof dsp:8[An] relative destination SI")
4855   (attrs (ISA m32c))
4856   (mode SI)
4857   (args (Dst32AnUnprefixed Dsp-16-u8))
4858   (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]")
4859   (base-ifield f-4-6)
4860   (encoding
4861     (+ (f-4-3 1)
4862        (f-8-1 0)
4863        Dsp-16-u8
4864        Dst32AnUnprefixed))
4865   (ifield-assertion
4866     (andif (eq f-4-3 1) (eq f-8-1 0)))
4867   (getter (add Dsp-16-u8 Dst32AnUnprefixed))
4868   (setter (nop))
4869 )
4870
4871 (define-derived-operand
4872   (name dst32-16-16-An-relative-Unprefixed-Mova-SI)
4873   (comment
4874     "m32c addressof dsp:16[An] relative destination SI")
4875   (attrs (ISA m32c))
4876   (mode SI)
4877   (args (Dst32AnUnprefixed Dsp-16-u16))
4878   (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]")
4879   (base-ifield f-4-6)
4880   (encoding
4881     (+ (f-4-3 2)
4882        (f-8-1 0)
4883        Dsp-16-u16
4884        Dst32AnUnprefixed))
4885   (ifield-assertion
4886     (andif (eq f-4-3 2) (eq f-8-1 0)))
4887   (getter (add Dsp-16-u16 Dst32AnUnprefixed))
4888   (setter (nop))
4889   )
4890
4891 (define-derived-operand
4892   (name dst32-16-24-An-relative-Unprefixed-Mova-SI)
4893   (comment "addressof m32c dsp:16[An] relative destination SI")
4894   (attrs (ISA m32c))
4895   (mode SI)
4896   (args (Dst32AnUnprefixed Dsp-16-u24))
4897   (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]")
4898   (base-ifield f-4-6)
4899   (encoding
4900     (+ (f-4-3 3)
4901        (f-8-1 0)
4902        Dsp-16-u24
4903        Dst32AnUnprefixed))
4904   (ifield-assertion
4905     (andif (eq f-4-3 3) (eq f-8-1 0)))
4906   (getter (add Dsp-16-u24 Dst32AnUnprefixed))
4907   (setter (nop))
4908   )
4909
4910 (define-derived-operand
4911   (name dst32-16-8-SB-relative-Unprefixed-Mova-SI)
4912   (comment "m32c addressof dsp:8[sb] relative destination SI")
4913   (attrs (ISA m32c))
4914   (mode SI)
4915   (args (Dsp-16-u8))
4916   (syntax "${Dsp-16-u8}[sb]")
4917   (base-ifield f-4-6)
4918   (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8))
4919   (ifield-assertion
4920     (andif (eq f-4-3 1) (eq f-8-2 2)))
4921   (getter (add Dsp-16-u8 (reg h-sb)))
4922   (setter (nop))
4923   )
4924
4925 (define-derived-operand
4926   (name dst32-16-16-SB-relative-Unprefixed-Mova-SI)
4927   (comment "m32c addressof dsp:16[sb] relative destination SI")
4928   (attrs (ISA m32c))
4929   (mode SI)
4930   (args (Dsp-16-u16))
4931   (syntax "${Dsp-16-u16}[sb]")
4932   (base-ifield f-4-6)
4933   (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16))
4934   (ifield-assertion
4935     (andif (eq f-4-3 2) (eq f-8-2 2)))
4936   (getter (add Dsp-16-u16 (reg h-sb)))
4937   (setter (nop))
4938   )
4939
4940 (define-derived-operand
4941   (name dst32-16-8-FB-relative-Unprefixed-Mova-SI)
4942   (comment "m32c addressof dsp:8[fb] relative destination SI")
4943   (attrs (ISA m32c))
4944   (mode SI)
4945   (args (Dsp-16-s8))
4946   (syntax "${Dsp-16-s8}[fb]")
4947   (base-ifield f-4-6)
4948   (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8))
4949   (ifield-assertion
4950     (andif (eq f-4-3 1) (eq f-8-2 3)))
4951   (getter (add Dsp-16-s8 (reg h-fb)))
4952   (setter (nop))
4953   )
4954
4955 (define-derived-operand
4956   (name dst32-16-16-FB-relative-Unprefixed-Mova-SI)
4957   (comment "m32c addressof dsp:16[fb] relative destination SI")
4958   (attrs (ISA m32c))
4959   (mode SI)
4960   (args (Dsp-16-s16))
4961   (syntax "${Dsp-16-s16}[fb]")
4962   (base-ifield f-4-6)
4963   (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16))
4964   (ifield-assertion
4965     (andif (eq f-4-3 2) (eq f-8-2 3)))
4966   (getter (add Dsp-16-s16 (reg h-fb)))
4967   (setter (nop))
4968   )
4969
4970 (define-derived-operand
4971   (name dst32-16-16-absolute-Unprefixed-Mova-SI)
4972   (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
4973   (mode SI)
4974   (args (Dsp-16-u16))
4975   (syntax "${Dsp-16-u16}")
4976   (base-ifield f-4-6)
4977   (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16))
4978   (ifield-assertion
4979     (andif (eq f-4-3 3) (eq f-8-2 3)))
4980   (getter Dsp-16-u16)
4981   (setter (nop))
4982   )
4983
4984 (define-derived-operand
4985   (name dst32-16-24-absolute-Unprefixed-Mova-SI)
4986   (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
4987   (mode SI)
4988   (args (Dsp-16-u24))
4989   (syntax "${Dsp-16-u24}")
4990   (base-ifield f-4-6)
4991   (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24))
4992   (ifield-assertion
4993     (andif (eq f-4-3 3) (eq f-8-2 2)))
4994   (getter Dsp-16-u24)
4995   (setter (nop))
4996   )
4997
4998 (define-anyof-operand
4999   (name dst32-16-Unprefixed-Mova-SI)
5000   (comment
5001     "m32c addressof destination operand of size SI with additional fields at offset 16")
5002   (attrs (ISA m32c))
5003   (mode SI)
5004   (choices
5005     dst32-An-indirect-Unprefixed-Mova-SI
5006     dst32-16-8-An-relative-Unprefixed-Mova-SI
5007     dst32-16-16-An-relative-Unprefixed-Mova-SI
5008     dst32-16-24-An-relative-Unprefixed-Mova-SI
5009     dst32-16-8-SB-relative-Unprefixed-Mova-SI
5010     dst32-16-16-SB-relative-Unprefixed-Mova-SI
5011     dst32-16-8-FB-relative-Unprefixed-Mova-SI
5012     dst32-16-16-FB-relative-Unprefixed-Mova-SI
5013     dst32-16-16-absolute-Unprefixed-Mova-SI
5014     dst32-16-24-absolute-Unprefixed-Mova-SI))
5015
5016 (define-pmacro (dst32-16-operand xmode)
5017   (begin
5018     (define-anyof-operand
5019       (name (.sym dst32-16-Unprefixed- xmode))
5020       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5021       (attrs (machine 32))
5022       (mode xmode)
5023       (choices
5024        (.sym dst32-Rn-direct-Unprefixed- xmode)
5025        (.sym dst32-An-direct-Unprefixed- xmode)
5026        (.sym dst32-An-indirect-Unprefixed- xmode)
5027        (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5028        (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5029        (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5030        (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5031        (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5032        (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5033        (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5034        (.sym dst32-16-16-absolute-Unprefixed- xmode)
5035        (.sym dst32-16-24-absolute-Unprefixed- xmode)
5036       )
5037     )
5038     (define-anyof-operand
5039       (name (.sym dst32-16-8-Unprefixed- xmode))
5040       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5041       (attrs (machine 32))
5042       (mode xmode)
5043       (choices
5044        (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5045        (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5046        (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5047       )
5048     )
5049     (define-anyof-operand
5050       (name (.sym dst32-16-16-Unprefixed- xmode))
5051       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5052       (attrs (machine 32))
5053       (mode xmode)
5054       (choices
5055        (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5056        (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5057        (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5058        (.sym dst32-16-16-absolute-Unprefixed- xmode)
5059       )
5060     )
5061     (define-anyof-operand
5062       (name (.sym dst32-16-24-Unprefixed- xmode))
5063       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5064       (attrs (machine 32))
5065       (mode xmode)
5066       (choices
5067        (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5068        (.sym dst32-16-24-absolute-Unprefixed- xmode)
5069       )
5070     )
5071   )
5072 )
5073
5074 (dst32-16-operand QI)
5075 (dst32-16-operand HI)
5076 (dst32-16-operand SI)
5077
5078 (define-pmacro (dst32-16-Ext-operand smode dmode)
5079   (begin
5080     (define-anyof-operand
5081       (name (.sym dst32-16-ExtUnprefixed- smode))
5082       (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16"))
5083       (attrs (machine 32))
5084       (mode dmode)
5085       (choices
5086        (.sym dst32-Rn-direct-ExtUnprefixed- smode)
5087        (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version
5088        (.sym dst32-An-indirect-ExtUnprefixed- smode)
5089        (.sym dst32-16-8-An-relative-ExtUnprefixed- smode)
5090        (.sym dst32-16-16-An-relative-ExtUnprefixed- smode)
5091        (.sym dst32-16-24-An-relative-ExtUnprefixed- smode)
5092        (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode)
5093        (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode)
5094        (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode)
5095        (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode)
5096        (.sym dst32-16-16-absolute-ExtUnprefixed- smode)
5097        (.sym dst32-16-24-absolute-ExtUnprefixed- smode)
5098       )
5099     )
5100   )
5101 )
5102
5103 (dst32-16-Ext-operand QI HI)
5104 (dst32-16-Ext-operand HI SI)
5105
5106 (define-anyof-operand
5107   (name dst32-16-Unprefixed-Mulex-HI)
5108   (comment "m32c destination operand of size HI with additional fields at offset 16")
5109   (attrs (machine 32))
5110   (mode HI)
5111   (choices
5112    dst32-R3-direct-Unprefixed-HI
5113    dst32-An-direct-Unprefixed-HI
5114    dst32-An-indirect-Unprefixed-HI
5115    dst32-16-8-An-relative-Unprefixed-HI
5116    dst32-16-16-An-relative-Unprefixed-HI
5117    dst32-16-24-An-relative-Unprefixed-HI
5118    dst32-16-8-SB-relative-Unprefixed-HI
5119    dst32-16-16-SB-relative-Unprefixed-HI
5120    dst32-16-8-FB-relative-Unprefixed-HI
5121    dst32-16-16-FB-relative-Unprefixed-HI
5122    dst32-16-16-absolute-Unprefixed-HI
5123    dst32-16-24-absolute-Unprefixed-HI
5124   )
5125 )
5126 ;-------------------------------------------------------------
5127 ; Destination operands with possible additional fields at offset 24 bits
5128 ;-------------------------------------------------------------
5129
5130 (define-pmacro (dst16-24-operand xmode)
5131   (begin
5132     (define-anyof-operand
5133       (name (.sym dst16-24- xmode))
5134       (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24"))
5135       (attrs (machine 16))
5136       (mode xmode)
5137       (choices
5138        (.sym dst16-Rn-direct- xmode)
5139        (.sym dst16-An-direct- xmode)
5140        (.sym dst16-An-indirect- xmode)
5141        (.sym dst16-24-8-An-relative- xmode)
5142        (.sym dst16-24-16-An-relative- xmode)
5143        (.sym dst16-24-8-SB-relative- xmode)
5144        (.sym dst16-24-16-SB-relative- xmode)
5145        (.sym dst16-24-8-FB-relative- xmode)
5146        (.sym dst16-24-16-absolute- xmode)
5147       )
5148     )
5149   )
5150 )
5151
5152 (dst16-24-operand QI)
5153 (dst16-24-operand HI)
5154
5155 (define-pmacro (dst32-24-operand xmode)
5156   (begin
5157     (define-anyof-operand
5158       (name (.sym dst32-24-Unprefixed- xmode))
5159       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5160       (attrs (machine 32))
5161       (mode xmode)
5162       (choices
5163        (.sym dst32-Rn-direct-Unprefixed- xmode)
5164        (.sym dst32-An-direct-Unprefixed- xmode)
5165        (.sym dst32-An-indirect-Unprefixed- xmode)
5166        (.sym dst32-24-8-An-relative-Unprefixed- xmode)
5167        (.sym dst32-24-16-An-relative-Unprefixed- xmode)
5168        (.sym dst32-24-24-An-relative-Unprefixed- xmode)
5169        (.sym dst32-24-8-SB-relative-Unprefixed- xmode)
5170        (.sym dst32-24-16-SB-relative-Unprefixed- xmode)
5171        (.sym dst32-24-8-FB-relative-Unprefixed- xmode)
5172        (.sym dst32-24-16-FB-relative-Unprefixed- xmode)
5173        (.sym dst32-24-16-absolute-Unprefixed- xmode)
5174        (.sym dst32-24-24-absolute-Unprefixed- xmode)
5175       )
5176     )
5177     (define-anyof-operand
5178       (name (.sym dst32-24-Prefixed- xmode))
5179       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5180       (attrs (machine 32))
5181       (mode xmode)
5182       (choices
5183        (.sym dst32-Rn-direct-Prefixed- xmode)
5184        (.sym dst32-An-direct-Prefixed- xmode)
5185        (.sym dst32-An-indirect-Prefixed- xmode)
5186        (.sym dst32-24-8-An-relative-Prefixed- xmode)
5187        (.sym dst32-24-16-An-relative-Prefixed- xmode)
5188        (.sym dst32-24-24-An-relative-Prefixed- xmode)
5189        (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5190        (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5191        (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5192        (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5193        (.sym dst32-24-16-absolute-Prefixed- xmode)
5194        (.sym dst32-24-24-absolute-Prefixed- xmode)
5195       )
5196     )
5197     (define-anyof-operand
5198       (name (.sym dst32-24-8-Prefixed- xmode))
5199       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5200       (attrs (machine 32))
5201       (mode xmode)
5202       (choices
5203        (.sym dst32-24-8-An-relative-Prefixed- xmode)
5204        (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5205        (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5206       )
5207     )
5208     (define-anyof-operand
5209       (name (.sym dst32-24-16-Prefixed- xmode))
5210       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5211       (attrs (machine 32))
5212       (mode xmode)
5213       (choices
5214        (.sym dst32-24-16-An-relative-Prefixed- xmode)
5215        (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5216        (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5217        (.sym dst32-24-16-absolute-Prefixed- xmode)
5218       )
5219     )
5220     (define-anyof-operand
5221       (name (.sym dst32-24-24-Prefixed- xmode))
5222       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5223       (attrs (machine 32))
5224       (mode xmode)
5225       (choices
5226        (.sym dst32-24-24-An-relative-Prefixed- xmode)
5227        (.sym dst32-24-24-absolute-Prefixed- xmode)
5228       )
5229     )
5230 ;     (define-anyof-operand
5231 ;       (name (.sym dst32-24-indirect- xmode))
5232 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5233 ;       (attrs (machine 32))
5234 ;       (mode xmode)
5235 ;       (choices
5236 ;        (.sym dst32-An-indirect-indirect- xmode)
5237 ;        (.sym dst32-24-8-An-relative-indirect- xmode)
5238 ;        (.sym dst32-24-16-An-relative-indirect- xmode)
5239 ;        (.sym dst32-24-24-An-relative-indirect- xmode)
5240 ;        (.sym dst32-24-8-SB-relative-indirect- xmode)
5241 ;        (.sym dst32-24-16-SB-relative-indirect- xmode)
5242 ;        (.sym dst32-24-8-FB-relative-indirect- xmode)
5243 ;        (.sym dst32-24-16-FB-relative-indirect- xmode)
5244 ;       )
5245 ;     )
5246 ;     (define-anyof-operand
5247 ;       (name (.sym dst32-basic-indirect- xmode))
5248 ;       (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
5249 ;       (attrs (machine 32))
5250 ;       (mode xmode)
5251 ;       (choices
5252 ;        (.sym dst32-An-indirect-indirect- xmode)
5253 ;       )
5254 ;     )
5255 ;     (define-anyof-operand
5256 ;       (name (.sym dst32-24-8-indirect- xmode))
5257 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5258 ;       (attrs (machine 32))
5259 ;       (mode xmode)
5260 ;       (choices
5261 ;        (.sym dst32-24-8-An-relative-indirect- xmode)
5262 ;        (.sym dst32-24-8-SB-relative-indirect- xmode)
5263 ;        (.sym dst32-24-8-FB-relative-indirect- xmode)
5264 ;       )
5265 ;     )
5266 ;     (define-anyof-operand
5267 ;       (name (.sym dst32-24-16-indirect- xmode))
5268 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5269 ;       (attrs (machine 32))
5270 ;       (mode xmode)
5271 ;       (choices
5272 ;        (.sym dst32-24-16-An-relative-indirect- xmode)
5273 ;        (.sym dst32-24-16-SB-relative-indirect- xmode)
5274 ;        (.sym dst32-24-16-FB-relative-indirect- xmode)
5275 ;       )
5276 ;     )
5277 ;     (define-anyof-operand
5278 ;       (name (.sym dst32-24-24-indirect- xmode))
5279 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5280 ;       (attrs (machine 32))
5281 ;       (mode xmode)
5282 ;       (choices
5283 ;        (.sym dst32-24-24-An-relative-indirect- xmode)
5284 ;       )
5285 ;     )
5286 ;     (define-anyof-operand
5287 ;       (name (.sym dst32-24-absolute-indirect- xmode))
5288 ;       (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5289 ;       (attrs (machine 32))
5290 ;       (mode xmode)
5291 ;       (choices
5292 ;        (.sym dst32-24-16-absolute-indirect-derived- xmode)
5293 ;        (.sym dst32-24-24-absolute-indirect-derived- xmode)
5294 ;       )
5295 ;     )
5296 ;     (define-anyof-operand
5297 ;       (name (.sym dst32-24-16-absolute-indirect- xmode))
5298 ;       (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5299 ;       (attrs (machine 32))
5300 ;       (mode xmode)
5301 ;       (choices
5302 ;        (.sym dst32-24-16-absolute-indirect-derived- xmode)
5303 ;       )
5304 ;     )
5305 ;     (define-anyof-operand
5306 ;       (name (.sym dst32-24-24-absolute-indirect- xmode))
5307 ;       (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5308 ;       (attrs (machine 32))
5309 ;       (mode xmode)
5310 ;       (choices
5311 ;        (.sym dst32-24-24-absolute-indirect-derived- xmode)
5312 ;       )
5313 ;     )
5314   )
5315 )
5316
5317 (dst32-24-operand QI)
5318 (dst32-24-operand HI)
5319 (dst32-24-operand SI)
5320
5321 ;-------------------------------------------------------------
5322 ; Destination operands with possible additional fields at offset 32 bits
5323 ;-------------------------------------------------------------
5324
5325 (define-pmacro (dst16-32-operand xmode)
5326   (begin
5327     (define-anyof-operand
5328       (name (.sym dst16-32- xmode))
5329       (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32"))
5330       (attrs (machine 16))
5331       (mode xmode)
5332       (choices
5333        (.sym dst16-Rn-direct- xmode)
5334        (.sym dst16-An-direct- xmode)
5335        (.sym dst16-An-indirect- xmode)
5336        (.sym dst16-32-8-An-relative- xmode)
5337        (.sym dst16-32-16-An-relative- xmode)
5338        (.sym dst16-32-8-SB-relative- xmode)
5339        (.sym dst16-32-16-SB-relative- xmode)
5340        (.sym dst16-32-8-FB-relative- xmode)
5341        (.sym dst16-32-16-absolute- xmode)
5342       )
5343     )
5344   )
5345 )
5346 (dst16-32-operand QI)
5347 (dst16-32-operand HI)
5348
5349 ; This macro actually handles operands at offset 32, 40 and 48 bits
5350 (define-pmacro (dst32-32plus-operand offset xmode)
5351   (begin
5352     (define-anyof-operand
5353       (name (.sym dst32- offset -Unprefixed- xmode))
5354       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5355       (attrs (machine 32))
5356       (mode xmode)
5357       (choices
5358        (.sym dst32-Rn-direct-Unprefixed- xmode)
5359        (.sym dst32-An-direct-Unprefixed- xmode)
5360        (.sym dst32-An-indirect-Unprefixed- xmode)
5361        (.sym dst32- offset -8-An-relative-Unprefixed- xmode)
5362        (.sym dst32- offset -16-An-relative-Unprefixed- xmode)
5363        (.sym dst32- offset -24-An-relative-Unprefixed- xmode)
5364        (.sym dst32- offset -8-SB-relative-Unprefixed- xmode)
5365        (.sym dst32- offset -16-SB-relative-Unprefixed- xmode)
5366        (.sym dst32- offset -8-FB-relative-Unprefixed- xmode)
5367        (.sym dst32- offset -16-FB-relative-Unprefixed- xmode)
5368        (.sym dst32- offset -16-absolute-Unprefixed- xmode)
5369        (.sym dst32- offset -24-absolute-Unprefixed- xmode)
5370       )
5371     )
5372     (define-anyof-operand
5373       (name (.sym dst32- offset -Prefixed- xmode))
5374       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5375       (attrs (machine 32))
5376       (mode xmode)
5377       (choices
5378        (.sym dst32-Rn-direct-Prefixed- xmode)
5379        (.sym dst32-An-direct-Prefixed- xmode)
5380        (.sym dst32-An-indirect-Prefixed- xmode)
5381        (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5382        (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5383        (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5384        (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5385        (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5386        (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5387        (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5388        (.sym dst32- offset -16-absolute-Prefixed- xmode)
5389        (.sym dst32- offset -24-absolute-Prefixed- xmode)
5390       )
5391     )
5392 ;     (define-anyof-operand
5393 ;       (name (.sym dst32- offset -indirect- xmode))
5394 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5395 ;       (attrs (machine 32))
5396 ;       (mode xmode)
5397 ;       (choices
5398 ;        (.sym dst32-An-indirect-indirect- xmode)
5399 ;        (.sym dst32- offset -8-An-relative-indirect- xmode)
5400 ;        (.sym dst32- offset -16-An-relative-indirect- xmode)
5401 ;        (.sym dst32- offset -24-An-relative-indirect- xmode)
5402 ;        (.sym dst32- offset -8-SB-relative-indirect- xmode)
5403 ;        (.sym dst32- offset -16-SB-relative-indirect- xmode)
5404 ;        (.sym dst32- offset -8-FB-relative-indirect- xmode)
5405 ;        (.sym dst32- offset -16-FB-relative-indirect- xmode)
5406 ;       )
5407 ;     )
5408 ;     (define-anyof-operand
5409 ;       (name (.sym dst32- offset -absolute-indirect- xmode))
5410 ;       (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5411 ;       (attrs (machine 32))
5412 ;       (mode xmode)
5413 ;       (choices
5414 ;        (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5415 ;        (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5416 ;       )
5417 ;     )
5418   )
5419 )
5420
5421 (dst32-32plus-operand 32 QI)
5422 (dst32-32plus-operand 32 HI)
5423 (dst32-32plus-operand 32 SI)
5424 (dst32-32plus-operand 40 QI)
5425 (dst32-32plus-operand 40 HI)
5426 (dst32-32plus-operand 40 SI)
5427
5428 ;-------------------------------------------------------------
5429 ; Destination operands with possible additional fields at offset 48 bits
5430 ;-------------------------------------------------------------
5431
5432 (define-pmacro (dst32-48-operand offset xmode)
5433   (begin
5434     (define-anyof-operand
5435       (name (.sym dst32- offset -Prefixed- xmode))
5436       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5437       (attrs (machine 32))
5438       (mode xmode)
5439       (choices
5440        (.sym dst32-Rn-direct-Prefixed- xmode)
5441        (.sym dst32-An-direct-Prefixed- xmode)
5442        (.sym dst32-An-indirect-Prefixed- xmode)
5443        (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5444        (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5445        (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5446        (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5447        (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5448        (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5449        (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5450        (.sym dst32- offset -16-absolute-Prefixed- xmode)
5451        (.sym dst32- offset -24-absolute-Prefixed- xmode)
5452       )
5453     )
5454 ;     (define-anyof-operand
5455 ;       (name (.sym dst32- offset -indirect- xmode))
5456 ;       (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5457 ;       (attrs (machine 32))
5458 ;       (mode xmode)
5459 ;       (choices
5460 ;        (.sym dst32-An-indirect-indirect- xmode)
5461 ;        (.sym dst32- offset -8-An-relative-indirect- xmode)
5462 ;        (.sym dst32- offset -16-An-relative-indirect- xmode)
5463 ;        (.sym dst32- offset -24-An-relative-indirect- xmode)
5464 ;        (.sym dst32- offset -8-SB-relative-indirect- xmode)
5465 ;        (.sym dst32- offset -16-SB-relative-indirect- xmode)
5466 ;        (.sym dst32- offset -8-FB-relative-indirect- xmode)
5467 ;        (.sym dst32- offset -16-FB-relative-indirect- xmode)
5468 ;       )
5469 ;     )
5470 ;     (define-anyof-operand
5471 ;       (name (.sym dst32- offset -absolute-indirect- xmode))
5472 ;       (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5473 ;       (attrs (machine 32))
5474 ;       (mode xmode)
5475 ;       (choices
5476 ;        (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5477 ;        (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5478 ;       )
5479 ;     )
5480   )
5481 )
5482
5483 (dst32-48-operand 48 QI)
5484 (dst32-48-operand 48 HI)
5485 (dst32-48-operand 48 SI)
5486
5487 ;-------------------------------------------------------------
5488 ; Bit operands for m16c
5489 ;-------------------------------------------------------------
5490
5491 (define-pmacro (bit16-operand offset)
5492   (begin
5493     (define-anyof-operand
5494       (name (.sym bit16- offset))
5495       (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5496       (attrs (machine 16))
5497       (mode BI)
5498       (choices
5499        bit16-Rn-direct
5500        bit16-An-direct
5501        bit16-An-indirect
5502        (.sym bit16- offset -8-An-relative)
5503        (.sym bit16- offset -16-An-relative)
5504        (.sym bit16- offset -8-SB-relative)
5505        (.sym bit16- offset -16-SB-relative)
5506        (.sym bit16- offset -8-FB-relative)
5507        (.sym bit16- offset -16-absolute)
5508       )
5509     )
5510     (define-anyof-operand
5511       (name (.sym bit16- offset -basic))
5512       (comment (.str "m16c bit operand with no additional fields"))
5513       (attrs (machine 16))
5514       (mode BI)
5515       (choices
5516        bit16-An-indirect
5517       )
5518     )
5519     (define-anyof-operand
5520       (name (.sym bit16- offset -8))
5521       (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5522       (attrs (machine 16))
5523       (mode BI)
5524       (choices
5525        bit16-Rn-direct
5526        bit16-An-direct
5527        (.sym bit16- offset -8-An-relative)
5528        (.sym bit16- offset -8-SB-relative)
5529        (.sym bit16- offset -8-FB-relative)
5530       )
5531     )
5532     (define-anyof-operand
5533       (name (.sym bit16- offset -16))
5534       (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5535       (attrs (machine 16))
5536       (mode BI)
5537       (choices
5538        (.sym bit16- offset -16-An-relative)
5539        (.sym bit16- offset -16-SB-relative)
5540        (.sym bit16- offset -16-absolute)
5541       )
5542     )
5543   )
5544 )
5545
5546 (bit16-operand 16)
5547
5548 ;-------------------------------------------------------------
5549 ; Bit operands for m32c
5550 ;-------------------------------------------------------------
5551
5552 (define-pmacro (bit32-operand offset group)
5553   (begin
5554     (define-anyof-operand
5555       (name (.sym bit32- offset - group))
5556       (comment (.str "m32c bit operand with possible additional fields at offset 24"))
5557       (attrs (machine 32))
5558       (mode BI)
5559       (choices
5560        (.sym bit32-Rn-direct- group)
5561        (.sym bit32-An-direct- group)
5562        (.sym bit32-An-indirect- group)
5563        (.sym bit32- offset -11-An-relative- group)
5564        (.sym bit32- offset -19-An-relative- group)
5565        (.sym bit32- offset -27-An-relative- group)
5566        (.sym bit32- offset -11-SB-relative- group)
5567        (.sym bit32- offset -19-SB-relative- group)
5568        (.sym bit32- offset -11-FB-relative- group)
5569        (.sym bit32- offset -19-FB-relative- group)
5570        (.sym bit32- offset -19-absolute- group)
5571        (.sym bit32- offset -27-absolute- group)
5572       )
5573     )
5574   )
5575 )
5576
5577 (bit32-operand 16 Unprefixed)
5578 (bit32-operand 24 Prefixed)
5579
5580 (define-anyof-operand
5581   (name bit32-basic-Unprefixed)
5582   (comment "m32c bit operand with no additional fields")
5583   (attrs (machine 32))
5584   (mode BI)
5585   (choices
5586    bit32-Rn-direct-Unprefixed
5587    bit32-An-direct-Unprefixed
5588    bit32-An-indirect-Unprefixed
5589   )
5590 )
5591
5592 (define-anyof-operand
5593   (name bit32-16-8-Unprefixed)
5594   (comment "m32c bit operand with 8 bit additional fields")
5595   (attrs (machine 32))
5596   (mode BI)
5597   (choices
5598    bit32-16-11-An-relative-Unprefixed
5599    bit32-16-11-SB-relative-Unprefixed
5600    bit32-16-11-FB-relative-Unprefixed
5601   )
5602 )
5603
5604 (define-anyof-operand
5605   (name bit32-16-16-Unprefixed)
5606   (comment "m32c bit operand with 16 bit additional fields")
5607   (attrs (machine 32))
5608   (mode BI)
5609   (choices
5610    bit32-16-19-An-relative-Unprefixed
5611    bit32-16-19-SB-relative-Unprefixed
5612    bit32-16-19-FB-relative-Unprefixed
5613    bit32-16-19-absolute-Unprefixed
5614   )
5615 )
5616
5617 (define-anyof-operand
5618   (name bit32-16-24-Unprefixed)
5619   (comment "m32c bit operand with 24 bit additional fields")
5620   (attrs (machine 32))
5621   (mode BI)
5622   (choices
5623    bit32-16-27-An-relative-Unprefixed
5624    bit32-16-27-absolute-Unprefixed
5625   )
5626 )
5627
5628 ;-------------------------------------------------------------
5629 ; Operands for short format binary insns
5630 ;-------------------------------------------------------------
5631
5632 (define-anyof-operand
5633   (name src16-2-S)
5634   (comment "m16c source operand of size QI for short format insns")
5635   (attrs (machine 16))
5636   (mode QI)
5637   (choices
5638    src16-2-S-8-SB-relative-QI
5639    src16-2-S-8-FB-relative-QI
5640    src16-2-S-16-absolute-QI
5641   )
5642 )
5643
5644 (define-anyof-operand
5645   (name src32-2-S-QI)
5646   (comment "m32c source operand of size QI for short format insns")
5647   (attrs (machine 32))
5648   (mode QI)
5649   (choices
5650    src32-2-S-8-SB-relative-QI
5651    src32-2-S-8-FB-relative-QI
5652    src32-2-S-16-absolute-QI
5653   )
5654 )
5655
5656 (define-anyof-operand
5657   (name src32-2-S-HI)
5658   (comment "m32c source operand of size QI for short format insns")
5659   (attrs (machine 32))
5660   (mode HI)
5661   (choices
5662    src32-2-S-8-SB-relative-HI
5663    src32-2-S-8-FB-relative-HI
5664    src32-2-S-16-absolute-HI
5665   )
5666 )
5667
5668 (define-anyof-operand
5669   (name Dst16-3-S-8)
5670   (comment "m16c destination operand of size QI for short format insns")
5671   (attrs (machine 16))
5672   (mode QI)
5673   (choices
5674    dst16-3-S-R0l-direct-QI
5675    dst16-3-S-R0h-direct-QI
5676    dst16-3-S-8-8-SB-relative-QI
5677    dst16-3-S-8-8-FB-relative-QI
5678    dst16-3-S-8-16-absolute-QI
5679   )
5680 )
5681
5682 (define-anyof-operand
5683   (name Dst16-3-S-16)
5684   (comment "m16c destination operand of size QI for short format insns")
5685   (attrs (machine 16))
5686   (mode QI)
5687   (choices
5688    dst16-3-S-R0l-direct-QI
5689    dst16-3-S-R0h-direct-QI
5690    dst16-3-S-16-8-SB-relative-QI
5691    dst16-3-S-16-8-FB-relative-QI
5692    dst16-3-S-16-16-absolute-QI
5693   )
5694 )
5695
5696 (define-anyof-operand
5697   (name srcdst16-r0l-r0h-S)
5698   (comment "m16c r0l/r0h operand of size QI for short format insns")
5699   (attrs (machine 16))
5700   (mode SI)
5701   (choices
5702    srcdst16-r0l-r0h-S-derived
5703   )
5704 )
5705
5706 (define-anyof-operand
5707   (name dst32-2-S-basic-QI)
5708   (comment "m32c r0l operand of size QI for short format binary insns")
5709   (attrs (machine 32))
5710   (mode QI)
5711   (choices
5712    dst32-2-S-R0l-direct-QI
5713   )
5714 )
5715
5716 (define-anyof-operand
5717   (name dst32-2-S-basic-HI)
5718   (comment "m32c r0 operand of size HI for short format binary insns")
5719   (attrs (machine 32))
5720   (mode HI)
5721   (choices
5722    dst32-2-S-R0-direct-HI
5723   )
5724 )
5725
5726 (define-pmacro (dst32-2-S-operands xmode)
5727   (begin
5728     (define-anyof-operand
5729       (name (.sym dst32-2-S-8- xmode))
5730       (comment "m32c operand of size " xmode " for short format binary insns")
5731       (attrs (machine 32))
5732       (mode xmode)
5733       (choices
5734        (.sym dst32-2-S-8-SB-relative- xmode)
5735        (.sym dst32-2-S-8-FB-relative- xmode)
5736       )
5737     )
5738     (define-anyof-operand
5739       (name (.sym dst32-2-S-16- xmode))
5740       (comment "m32c operand of size " xmode " for short format binary insns")
5741       (attrs (machine 32))
5742       (mode xmode)
5743       (choices
5744        (.sym dst32-2-S-16-absolute- xmode)
5745       )
5746     )
5747 ;     (define-anyof-operand
5748 ;       (name (.sym dst32-2-S-8-indirect- xmode))
5749 ;       (comment "m32c operand of size " xmode " for short format binary insns")
5750 ;       (attrs (machine 32))
5751 ;       (mode xmode)
5752 ;       (choices
5753 ;        (.sym dst32-2-S-8-SB-relative-indirect- xmode)
5754 ;        (.sym dst32-2-S-8-FB-relative-indirect- xmode)
5755 ;       )
5756 ;     )
5757 ;     (define-anyof-operand
5758 ;       (name (.sym dst32-2-S-absolute-indirect- xmode))
5759 ;       (comment "m32c operand of size " xmode " for short format binary insns")
5760 ;       (attrs (machine 32))
5761 ;       (mode xmode)
5762 ;       (choices
5763 ;        (.sym dst32-2-S-16-absolute-indirect- xmode)
5764 ;       )
5765 ;     )
5766   )
5767 )
5768
5769 (dst32-2-S-operands QI)
5770 (dst32-2-S-operands HI)
5771 (dst32-2-S-operands SI)
5772
5773 (define-anyof-operand
5774   (name dst32-an-S)
5775   (comment "m32c An operand for short format binary insns")
5776   (attrs (machine 32))
5777   (mode HI)
5778   (choices
5779    dst32-1-S-A0-direct-HI
5780    dst32-1-S-A1-direct-HI
5781   )
5782 )
5783
5784 (define-anyof-operand
5785   (name bit16-11-S)
5786   (comment "m16c bit operand for short format insns")
5787   (attrs (machine 16))
5788   (mode BI)
5789   (choices
5790    bit16-11-SB-relative-S
5791   )
5792 )
5793
5794 (define-anyof-operand
5795   (name Rn16-push-S-anyof)
5796   (comment "m16c bit operand for short format insns")
5797   (attrs (machine 16))
5798   (mode QI)
5799   (choices
5800    Rn16-push-S-derived
5801   )
5802 )
5803
5804 (define-anyof-operand
5805   (name An16-push-S-anyof)
5806   (comment "m16c bit operand for short format insns")
5807   (attrs (machine 16))
5808   (mode HI)
5809   (choices
5810    An16-push-S-derived
5811   )
5812 )
5813
5814 ;=============================================================
5815 ; Common macros for instruction definitions
5816 ;
5817 (define-pmacro (set-z x)
5818   (sequence ()
5819             (set zbit (zflag x)))
5820
5821 )
5822
5823 (define-pmacro (set-s x)
5824   (sequence ()
5825             (set sbit (nflag x)))
5826 )
5827
5828 (define-pmacro (set-z-and-s x)
5829   (sequence ()
5830             (set-z x)
5831             (set-s x))
5832 )
5833 \f
5834 ;=============================================================
5835 ; Unary insn macros
5836 ;-------------------------------------------------------------
5837
5838 (define-pmacro (unary-insn-defn mach group mode wstr op encoding sem)
5839   (dni (.sym op mach wstr - group)
5840        (.str op wstr " dst" mach "-" group "-" mode)
5841        ((machine mach))
5842        (.str op wstr " ${dst" mach "-" group "-" mode "}")
5843        encoding
5844        (sem mode (.sym dst mach - group - mode))
5845        ())
5846 )
5847
5848
5849 (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem)
5850   (unary-insn-defn 16 16 mode wstr op
5851                    (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode))
5852                    sem)
5853 )
5854
5855 (define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem)
5856   (begin
5857     ; Multi insns are tried for assembly in the reverse order in which they appear here, so
5858     ; define the absolute-indirect insns first in order to prevent them from being selected
5859     ; when the mode is register-indirect
5860 ;     (unary-insn-defn 32 24-absolute-indirect mode wstr op
5861 ;                    (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
5862 ;                    sem)
5863     (unary-insn-defn 32 16-Unprefixed mode wstr op
5864                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3))
5865                      sem)
5866 ;     (unary-insn-defn 32 24-indirect mode wstr op
5867 ;                    (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
5868 ;                    sem)
5869   )
5870 )
5871
5872 (define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem)
5873   (begin
5874     (.apply (.sym unary mach -defn) (QI .b 0 op opc1 opc2 opc3 sem))
5875     (.apply (.sym unary mach -defn) (HI .w 1 op opc1 opc2 opc3 sem))
5876   )
5877 )
5878
5879 (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
5880   (begin
5881     (unary-insn-mach 16 op opc16-1 opc16-2 opc16-3 sem)
5882     (unary-insn-mach 32 op opc32-1 opc32-2 opc32-3 sem)
5883   )
5884 )
5885
5886 ;-------------------------------------------------------------
5887 ; Sign/zero extension macros
5888 ;-------------------------------------------------------------
5889
5890 (define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem)
5891   (dni (.sym op mach wstr - group)
5892        (.str op wstr " dst" mach "-" group "-" smode)
5893        ((machine mach))
5894        (.str op wstr " ${dst" mach "-" group "-" smode "}")
5895        encoding
5896        (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode))
5897        ())
5898 )
5899
5900 (define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
5901   (ext-insn-defn 16 16-Ext smode dmode wstr op
5902                    (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode))
5903                    sem)
5904 )
5905
5906 (define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
5907   (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op
5908                  (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode))
5909                  sem)
5910 )
5911
5912 (define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem)
5913   (dni (.sym op 32 wstr - src-group - dst-group)
5914        (.str op 32 wstr  " src32-" src-group "-QI,dst32-" dst-group "-HI")
5915        ((machine 32))
5916        (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}")
5917        encoding
5918        (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI))
5919        ())
5920 )
5921
5922 (define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem)
5923   (begin
5924     (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr
5925                        (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2))
5926                        sem)
5927     (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr
5928                        (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2))
5929                        sem)
5930     (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr
5931                        (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2))
5932                        sem)
5933     (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr
5934                        (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2))
5935                        sem)
5936   )
5937 )
5938
5939 ;=============================================================
5940 ; Binary Arithmetic macros
5941 ;
5942 ;-------------------------------------------------------------
5943 ;<arith>.size:S src2,r0[l] -- for m32c
5944 ;-------------------------------------------------------------
5945
5946 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem)
5947   (dni (.sym op 32 wstr .S-src2-r0- xmode)
5948        (.str op 32 wstr ":S src2,r0[l]")
5949        ((machine 32))
5950        (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}")
5951        (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit))
5952        (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S))
5953        ())
5954 )
5955
5956 ;-------------------------------------------------------------
5957 ;<arith>.b:S src2,r0l/r0h -- for m16c
5958 ;-------------------------------------------------------------
5959
5960 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem)
5961   (begin
5962     (dni (.sym op 16 .b.S-src2)
5963          (.str op ".b:S src2,r0[lh]")
5964          ((machine 16))
5965          (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}")
5966          (+ opc1 opc2 Dst16RnQI-S src16-2-S)
5967          (sem QI src16-2-S Dst16RnQI-S)
5968          ())
5969     (dni (.sym op 16 .b.S-r0l-r0h)
5970          (.str op ".b:S r0l/r0h")
5971          ((machine 16))
5972          (.str op ".b$S ${srcdst16-r0l-r0h-S}")
5973          (+ opc1 opc2 srcdst16-r0l-r0h-S)
5974          (if (eq srcdst16-r0l-r0h-S 0)
5975              (sem QI R0h R0l)
5976              (sem QI R0l R0h))
5977          ())
5978   )
5979 )
5980
5981 ;-------------------------------------------------------------
5982 ;<arith>.b:S #imm8,dst3 -- for m16c
5983 ;-------------------------------------------------------------
5984
5985 (define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem)
5986   (dni (.sym op 16 .b.S-imm8-dst3)
5987        (.str op sz ":S imm8,dst3")
5988        ((machine 16))
5989        (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}")
5990        (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI)
5991        (sem QI Imm-8-QI Dst16-3-S-16)
5992        ())
5993 )
5994
5995 ;-------------------------------------------------------------
5996 ;<arith>.size:Q #imm4,sp -- for m16c
5997 ;-------------------------------------------------------------
5998
5999 (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem)
6000   (dni (.sym op 16 -Q-sp)
6001        (.str op ":Q #imm4,sp")
6002        ((machine 16))
6003        (.str op "${size}$Q #${Imm-12-s4},sp")
6004        (+ opc1 opc2 opc3 Imm-12-s4)
6005        (sem QI Imm-12-s4 sp)
6006        ())
6007 )
6008
6009 ;-------------------------------------------------------------
6010 ;<arith>.size:G #imm,sp -- for m16c
6011 ;-------------------------------------------------------------
6012
6013 (define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem)
6014   (dni (.sym op 16 wstr - G-sp)
6015        (.str op wstr " imm-sp " mode)
6016        ((machine 16))
6017        (.str op wstr "$G #${Imm-16-" mode "},sp")
6018        (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode))
6019        (sem mode (.sym Imm-16- mode) sp)
6020        ())
6021 )
6022
6023 (define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem)
6024   (begin
6025     (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem)
6026     (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem)
6027   )
6028 )
6029
6030 ;-------------------------------------------------------------
6031 ;<arith>.size:G #imm,dst -- for m16c and m32c
6032 ;-------------------------------------------------------------
6033
6034 (define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem)
6035   (dni (.sym op mach wstr - imm-G - dstgroup)
6036        (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode)
6037        ((machine mach))
6038        (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}")
6039        encoding
6040        (sem dmode src (.sym dst mach - dstgroup - dmode))
6041        ())
6042 )
6043
6044 ; m16c variants
6045 (define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6046   (begin
6047     (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix
6048                                (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode))
6049                                sem)
6050     (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix
6051                                (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode))
6052                                sem)
6053     (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix
6054                                (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode))
6055                                sem)
6056   )
6057 )
6058
6059 ; m32c Unprefixed variants
6060 (define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6061   (begin
6062     (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix
6063                                (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode))
6064                                sem)
6065     (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix
6066                                (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode))
6067                                sem)
6068     (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix
6069                                (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode))
6070                                sem)
6071     (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix
6072                                (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode))
6073                                sem)
6074   )
6075 )
6076
6077 ; m32c Prefixed variants
6078 (define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6079   (begin
6080     (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix
6081                                (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode))
6082                                sem)
6083     (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix
6084                                (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode))
6085                                sem)
6086     (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix
6087                                (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode))
6088                                sem)
6089     (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix
6090                                (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode))
6091                                sem)
6092   )
6093 )
6094
6095 ; All m32c variants
6096 (define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6097   (begin
6098     ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6099     ; define the absolute-indirect insns first in order to prevent them from being selected
6100     ; when the mode is register-indirect
6101 ;     (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix
6102 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode))
6103 ;                              sem)
6104 ;     (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix
6105 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode))
6106 ;                              sem)
6107     ; Unprefixed modes next
6108     (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6109
6110     ; Remaining indirect modes
6111 ;     (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix
6112 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode))
6113 ;                              sem)
6114 ;     (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix
6115 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode))
6116 ;                              sem)
6117 ;     (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix
6118 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode))
6119 ;                              sem)
6120 ;     (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix
6121 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode))
6122 ;                              sem)
6123   )
6124 )
6125
6126 (define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem)
6127   (begin
6128     (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem))
6129     (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem))
6130   )
6131 )
6132
6133 (define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6134   (begin
6135     (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem)
6136     (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem)
6137   )
6138 )
6139
6140 ;-------------------------------------------------------------
6141 ;<arith>.size:Q #imm4,dst -- for m16c and m32c
6142 ;-------------------------------------------------------------
6143
6144 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)
6145   (dni (.sym op mach wstr - imm4-Q - dstgroup)
6146        (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)
6147        ((machine mach))
6148        (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}")
6149        encoding
6150        (sem mode src (.sym dst mach - dstgroup - mode))
6151        ())
6152 )
6153
6154 ; m16c variants
6155 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6156   (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op
6157                    (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode))
6158                    sem)
6159 )
6160
6161 (define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6162   (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op
6163                    (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode))
6164                    sem)
6165 )
6166
6167 ; m32c variants
6168 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6169   (begin
6170     ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6171     ; define the absolute-indirect insns first in order to prevent them from being selected
6172     ; when the mode is register-indirect
6173 ;     (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op
6174 ;                    (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6175 ;                    sem)
6176     (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op
6177                      (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4)
6178                      sem)
6179 ;     (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op
6180 ;                    (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6181 ;                    sem)
6182   )
6183 )
6184
6185 (define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6186   (begin
6187     ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6188     ; define the absolute-indirect insns first in order to prevent them from being selected
6189     ; when the mode is register-indirect
6190 ;     (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op
6191 ;                    (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6192 ;                    sem)
6193     (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op
6194                      (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4)
6195                      sem)
6196 ;     (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op
6197 ;                    (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6198 ;                    sem)
6199   )
6200 )
6201
6202 (define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem)
6203   (begin
6204     (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem))
6205     (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem))
6206   )
6207 )
6208
6209 (define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
6210   (begin
6211     (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
6212     (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
6213   )
6214 )
6215
6216 ;-------------------------------------------------------------
6217 ;<arith>.size:G src,dst -- for m16c and m32c
6218 ;-------------------------------------------------------------
6219
6220 (define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem)
6221   (dni (.sym op mach wstr - srcgroup - dstgroup)
6222        (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode)
6223        ((machine mach))
6224        (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}")
6225        encoding
6226        (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode))
6227        ())
6228 )
6229
6230 ; m16c variants
6231 (define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6232   (begin
6233     (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix
6234                                (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode))
6235                                sem)
6236     (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix
6237                                (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode))
6238                                sem)
6239     (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix
6240                                (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode))
6241                                sem)
6242   )
6243 )
6244
6245 ; m32c Prefixed variants
6246 (define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem)
6247   (begin
6248     (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix
6249                                (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6250                                sem)
6251     (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix
6252                                (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6253                                sem)
6254     (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix
6255                                (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6256                                sem)
6257     (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix
6258                                (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6259                                sem)
6260   )
6261 )
6262
6263 ; all m32c variants
6264 (define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6265   (begin
6266     ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6267     ; define the absolute-indirect insns first in order to prevent them from being selected
6268     ; when the mode is register-indirect
6269 ;     (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix
6270 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6271 ;                                 (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6272 ;                              sem)
6273 ;     (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix
6274 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6275 ;                                 (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6276 ;                              sem)
6277 ;     (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix
6278 ;                              (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6279 ;                                 (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6280 ;                              sem)
6281 ;     (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix
6282 ;                              (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6283 ;                                 (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6284 ;                              sem)
6285 ;     (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix
6286 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6287 ;                                 (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6288 ;                              sem)
6289 ;     (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix
6290 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6291 ;                                 (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6292 ;                              sem)
6293 ;     (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix
6294 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6295 ;                                 (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6296 ;                              sem)
6297 ;     (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix
6298 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6299 ;                                 (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6300 ;                              sem)
6301 ;     (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix
6302 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6303 ;                                 (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6304 ;                              sem)
6305 ;     (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix
6306 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6307 ;                                 (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6308 ;                              sem)
6309 ;     (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix
6310 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6311 ;                                 (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6312 ;                              sem)
6313 ;     (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix
6314 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6315 ;                                 (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6316 ;                              sem)
6317 ;     (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix
6318 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6319 ;                                 (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6320 ;                              sem)
6321 ;     (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix
6322 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6323 ;                                 (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6324 ;                              sem)
6325     (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix
6326                                (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2))
6327                                sem)
6328     (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix
6329                                (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2))
6330                                sem)
6331     (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix
6332                                (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2))
6333                                sem)
6334     (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix
6335                                (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2))
6336                                sem)
6337 ;     (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix
6338 ;                              (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6339 ;                                 (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6340 ;                              sem)
6341 ;     (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix
6342 ;                              (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6343 ;                                 (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6344 ;                              sem)
6345 ;     (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix
6346 ;                              (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6347 ;                                 (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6348 ;                              sem)
6349 ;     (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix
6350 ;                              (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6351 ;                                 (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6352 ;                              sem)
6353 ;     (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix
6354 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6355 ;                                 (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6356 ;                              sem)
6357 ;     (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix
6358 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6359 ;                                 (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6360 ;                              sem)
6361 ;     (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix
6362 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6363 ;                                 (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6364 ;                              sem)
6365 ;     (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix
6366 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6367 ;                                 (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6368 ;                              sem)
6369 ;     (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix
6370 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6371 ;                                 (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6372 ;                              sem)
6373 ;     (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix
6374 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6375 ;                                 (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6376 ;                              sem)
6377 ;     (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix
6378 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6379 ;                                 (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6380 ;                              sem)
6381 ;     (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix
6382 ;                              (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6383 ;                                 (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6384 ;                              sem)
6385   )
6386 )
6387
6388 (define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem)
6389   (begin
6390     (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem))
6391     (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem))
6392   )
6393 )
6394
6395 (define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem)
6396   (begin
6397     (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem)
6398     (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem)
6399   )
6400 )
6401
6402 ;-------------------------------------------------------------
6403 ;<arith>.size:S #imm,dst -- for m32c
6404 ;-------------------------------------------------------------
6405
6406 (define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem)
6407   (dni (.sym op 32 wstr - imm-S - dstgroup)
6408        (.str op wstr " 32-imm-S-" dstgroup "-" mode)
6409        ((machine 32))
6410        (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}")
6411        encoding
6412        (sem mode src (.sym dst32- dstgroup - mode))
6413        ())
6414 )
6415
6416 (define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem)
6417   (dni (.sym op 32 wstr - imm-Z - dstgroup)
6418        (.str op wstr " 32-imm-Z-" dstgroup "-" mode)
6419        ((machine 32))
6420        (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}")
6421        encoding
6422        (sem mode (const 0) (.sym dst32- dstgroup - mode))
6423        ())
6424 )
6425
6426 (define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem)
6427   (begin
6428 ;     (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6429 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6430 ;                              sem)
6431     (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6432                                (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode))
6433                                sem)
6434     (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6435                                (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode))
6436                                sem)
6437     (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6438                                (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode))
6439                                sem)
6440 ;     (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6441 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6442 ;                              sem)
6443   )
6444 )
6445
6446 (define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem)
6447   (begin
6448 ;     (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6449 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6450 ;                              sem)
6451     (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6452                                (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit))
6453                                sem)
6454     (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6455                                (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit))
6456                                sem)
6457     (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6458                                (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit))
6459                                sem)
6460 ;     (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6461 ;                              (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6462 ;                              sem)
6463   )
6464 )
6465
6466 ;-------------------------------------------------------------
6467 ;<arith>.L:S #imm1,An -- for m32c
6468 ;-------------------------------------------------------------
6469
6470 (define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem)
6471   (begin
6472     (dni (.sym op 32.l-s-imm1-S-an)
6473          (.str op ".l 32-imm1-S-an")
6474          ((machine 32))
6475          (.str op ".l$S #${Imm1-S},${dst32-an-S}")
6476          (+ opc1 Imm1-S opc2 dst32-an-S)
6477          (sem SI Imm1-S dst32-an-S)
6478          ())
6479   )
6480 )
6481
6482 ;-------------------------------------------------------------
6483 ;<arith>.L:Q #imm3,sp -- for m32c
6484 ;-------------------------------------------------------------
6485
6486 (define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem)
6487   (begin
6488     (dni (.sym op 32.l-imm3-Q)
6489          (.str op ".l 32-imm3-Q")
6490          ((machine 32))
6491          (.str op ".l$Q #${Imm3-S},sp")
6492          (+ opc1 Imm3-S opc2)
6493          (sem SI Imm3-S sp)
6494          ())
6495   )
6496 )
6497
6498 ;-------------------------------------------------------------
6499 ;<arith>.L:S #imm8,sp -- for m32c
6500 ;-------------------------------------------------------------
6501
6502 (define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem)
6503   (begin
6504     (dni (.sym op 32.l-imm8-S)
6505          (.str op ".l 32-imm8-S")
6506          ((machine 32))
6507          (.str op ".l$S #${Imm-16-QI},sp")
6508          (+ opc1 opc2 opc3 opc4 Imm-16-QI)
6509          (sem SI Imm-16-QI sp)
6510          ())
6511   )
6512 )
6513
6514 ;-------------------------------------------------------------
6515 ;<arith>.L:G #imm16,sp -- for m32c
6516 ;-------------------------------------------------------------
6517
6518 (define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem)
6519   (begin
6520     (dni (.sym op 32.l-imm16-G)
6521          (.str op ".l 32-imm16-G")
6522          ((machine 32))
6523          (.str op ".l$G #${Imm-16-HI},sp")
6524          (+ opc1 opc2 opc3 opc4 Imm-16-HI)
6525          (sem SI Imm-16-HI sp)
6526          ())
6527   )
6528 )
6529
6530 ;-------------------------------------------------------------
6531 ;<arith>jnz.size #imm4,dst,label -- for m16c and m32c
6532 ;-------------------------------------------------------------
6533
6534 (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem)
6535   (dni (.sym op mach wstr - imm4 - dstgroup)
6536        (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode)
6537        ((machine mach))
6538        (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}")
6539        encoding
6540        (sem mode src (.sym dst mach - dstgroup - mode) label)
6541        ())
6542 )
6543
6544 ; m16c variants
6545 (define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op opc1 opc2 sem)
6546   (begin
6547     (arith-jnz-imm4-dst-defn 16 Imm-8-s4 basic Lab-16-8 mode wstr op
6548                              (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-basic- mode) Lab-16-8)
6549                              sem)
6550     (arith-jnz-imm4-dst-defn 16 Imm-8-s4 16-16 Lab-32-8 mode wstr op
6551                              (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-16-16- mode) Lab-16-8)
6552                              sem)
6553     (arith-jnz-imm4-dst-defn 16 Imm-8-s4 16-8 Lab-24-8 mode wstr op
6554                              (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-16-8- mode) Lab-16-8)
6555                              sem)
6556   )
6557 )
6558
6559 ; m32c variants
6560 (define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op opc1 opc2 sem)
6561   (begin
6562     (arith-jnz-imm4-dst-defn 32 Imm-12-s4 basic-Unprefixed Lab-16-8 mode wstr op
6563                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-16-8)
6564                      sem)
6565     (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-24-Unprefixed Lab-40-8 mode wstr op
6566                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-40-8)
6567                      sem)
6568     (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-16-Unprefixed Lab-32-8 mode wstr op
6569                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-32-8)
6570                      sem)
6571     (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-8-Unprefixed Lab-24-8 mode wstr op
6572                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-24-8)
6573                      sem)
6574   )
6575 )
6576
6577 (define-pmacro (arith-jnz-imm4-dst-mach mach op opc1 opc2 sem)
6578   (begin
6579     (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op opc1 opc2 sem))
6580     (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op opc1 opc2 sem))
6581   )
6582 )
6583
6584 (define-pmacro (arith-jnz-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
6585   (begin
6586     (arith-jnz-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
6587     (arith-jnz-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
6588   )
6589 )
6590
6591 ;-------------------------------------------------------------
6592 ;mov.size dsp8[sp],dst -- for m16c and m32c
6593 ;-------------------------------------------------------------
6594 (define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem)
6595   (dni (.sym op mach wstr -dspsp-dst- dstgroup)
6596        (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6597        ((machine mach))
6598        (.str op wstr " ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}")
6599        encoding
6600        (sem mach mode dsp (.sym dst mach - dstgroup - mode))
6601        ())
6602 )
6603 (define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem)
6604   (dni (.sym op mach wstr -dst-dspsp- dstgroup)
6605        (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6606        ((machine mach))
6607        (.str op wstr " ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]")
6608        encoding
6609        (sem mach mode (.sym dst mach - dstgroup - mode) dsp)
6610        ())
6611 )
6612
6613 ; m16c variants
6614 (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6615   (begin
6616     (mov-dspsp-dst-defn 16 basic Dsp-16-u8 mode wstr op
6617                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u8)
6618                              sem)
6619     (mov-dspsp-dst-defn 16 16-16 Dsp-32-u8 mode wstr op
6620                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u8)
6621                              sem)
6622     (mov-dspsp-dst-defn 16 16-8 Dsp-24-u8 mode wstr op
6623                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u8)
6624                              sem)
6625   )
6626 )
6627
6628 (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6629   (begin
6630     (mov-src-dspsp-defn 16 basic Dsp-16-u8 mode wstr op
6631                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u8)
6632                              sem)
6633     (mov-src-dspsp-defn 16 16-16 Dsp-32-u8 mode wstr op
6634                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u8)
6635                              sem)
6636     (mov-src-dspsp-defn 16 16-8 Dsp-24-u8 mode wstr op
6637                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u8)
6638                              sem)
6639   )
6640 )
6641
6642 ; m32c variants
6643 (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6644   (begin
6645     (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-u8 mode wstr op
6646                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-u8)
6647                      sem)
6648     (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-u8 mode wstr op
6649                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-u8)
6650                      sem)
6651     (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-u8 mode wstr op
6652                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-u8)
6653                      sem)
6654     (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-u8 mode wstr op
6655                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-u8)
6656                      sem)
6657   )
6658 )
6659 (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6660   (begin
6661     (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-u8 mode wstr op
6662                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-u8)
6663                      sem)
6664     (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-u8 mode wstr op
6665                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-u8)
6666                      sem)
6667     (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-u8 mode wstr op
6668                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-u8)
6669                      sem)
6670     (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-u8 mode wstr op
6671                      (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-u8)
6672                      sem)
6673   )
6674 )
6675
6676 (define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem)
6677   (begin
6678     (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6679     (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6680   )
6681 )
6682
6683 (define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem)
6684   (begin
6685     (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6686     (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6687   )
6688 )
6689
6690 (define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6691   (begin
6692     (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6693     (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6694   )
6695 )
6696 (define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6697   (begin
6698     (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6699     (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6700   )
6701 )
6702
6703 ;-------------------------------------------------------------
6704 ; lde dsp24,dst -- for m16c
6705 ; TODO abs20[a0], [a0a1] for dsp24
6706 ;-------------------------------------------------------------
6707
6708 (define-pmacro (lde-defn mach dstgroup dsp mode wstr op encoding sem)
6709   (dni (.sym op mach wstr -dst-dspsp- dstgroup)
6710        (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6711        ((machine mach))
6712        (.str op wstr " ${" dsp "},${dst" mach "-" dstgroup "-" mode "}")
6713        encoding
6714        (sem mode (.sym dst mach - dstgroup - mode) dsp)
6715        ())
6716 )
6717
6718 (define-pmacro (lde-dst mode wstr wbit op opc1 opc2 opc3 sem)
6719   (begin
6720     (lde-defn 16 basic Dsp-16-u20 mode wstr op
6721                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u20)
6722                              sem)
6723     (lde-defn 16 16-16 Dsp-32-u20 mode wstr op
6724                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u20)
6725                              sem)
6726     (lde-defn 16 16-8 Dsp-24-u20 mode wstr op
6727                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u20)
6728                              sem)
6729   )
6730 )
6731
6732 ;-------------------------------------------------------------
6733 ; ste src,dsp24 -- for m16c
6734 ; TODO abs20[a0], [a0a1] for dsp24
6735 ;-------------------------------------------------------------
6736
6737 (define-pmacro (ste-defn mach dstgroup dsp mode wstr op encoding sem)
6738   (dni (.sym op mach wstr -dst-dspsp- dstgroup)
6739        (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6740        ((machine mach))
6741        (.str op wstr " ${dst" mach "-" dstgroup "-" mode "},${" dsp "}")
6742        encoding
6743        (sem mode (.sym dst mach - dstgroup - mode) dsp)
6744        ())
6745 )
6746
6747 (define-pmacro (ste-dst mode wstr wbit op opc1 opc2 opc3 sem)
6748   (begin
6749     (ste-defn 16 basic Dsp-16-u20 mode wstr op
6750                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u20)
6751                              sem)
6752     (ste-defn 16 16-16 Dsp-32-u20 mode wstr op
6753                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u20)
6754                              sem)
6755     (ste-defn 16 16-8 Dsp-24-u20 mode wstr op
6756                              (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u20)
6757                              sem)
6758   )
6759 )
6760
6761 ;=============================================================
6762 ; Division
6763 ;-------------------------------------------------------------
6764
6765 (define-pmacro (div-sem divop modop opmode reg src quot rem max min)
6766   (sequence ()
6767             (if (eq src 0)
6768                 (set obit (const BI 1))
6769                 (sequence ((opmode quot-result) (opmode rem-result))
6770                           (set quot-result (divop opmode (ext opmode reg) src))
6771                           (set rem-result  (modop opmode (ext opmode reg) src))
6772                           (set obit (orif (gt opmode quot-result max)
6773                                           (lt opmode quot-result min)))
6774                           (set quot quot-result)
6775                           (set rem  rem-result))))
6776 )
6777
6778 ;<divop>.size #imm -- for m16c and m32c
6779 (define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6780   (dni (.sym op mach wstr - src)
6781        (.str op mach wstr "-" src)
6782        ((machine mach))
6783        (.str op wstr " #${" src "}")
6784        encoding
6785        (sem divop modop opmode reg src quot rem max min)
6786        ())
6787 )
6788 (define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6789   (div-imm-defn 16 wstr op (.sym Imm-16 - smode)
6790                 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode))
6791                 divop modop opmode reg quot rem max min
6792                 sem)
6793 )
6794 (define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6795   (div-imm-defn 32 wstr op (.sym Imm-16 - smode)
6796                 (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode))
6797                 divop modop opmode reg quot rem max min
6798                 sem)
6799 )
6800 (define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem)
6801   (begin
6802     (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0   R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem))
6803     (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0  R2  max-HI min-HI opc1 opc2 opc3 opc4 sem))
6804   )
6805 )
6806 (define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem)
6807   (begin
6808     (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem)
6809     (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem)
6810   )
6811 )
6812
6813 ;<divop>.size src -- for m16c and m32c
6814 (define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6815   (dni (.sym op mach wstr - src)
6816        (.str op mach wstr "-" src)
6817        ((machine mach))
6818        (.str op wstr " ${" src "}")
6819        encoding
6820        (sem divop modop opmode reg src quot rem max min)
6821        ())
6822 )
6823 (define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
6824   (div-src-defn 16 wstr op (.sym dst16-16 - smode)
6825                 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode))
6826                 divop modop opmode reg quot rem max min
6827                 sem)
6828 )
6829 (define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
6830   (begin
6831     ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6832     ; define the absolute-indirect insns first in order to prevent them from being selected
6833     ; when the mode is register-indirect
6834 ;     (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode)
6835 ;                 (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode))
6836 ;                 divop modop opmode reg quot rem max min
6837 ;                 sem)
6838     (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode)
6839                   (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode))
6840                   divop modop opmode reg quot rem max min
6841                   sem)
6842 ;     (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode)
6843 ;                 (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode))
6844 ;                 divop modop opmode reg quot rem max min
6845 ;                 sem)
6846   )
6847 )
6848 (define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem)
6849   (begin
6850     (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0   R0l R0h max-QI min-QI opc1 opc2 opc3 sem))
6851     (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0  R2  max-HI min-HI opc1 opc2 opc3 sem))
6852   )
6853 )
6854 (define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6855   (begin
6856     (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem)
6857     (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem)
6858   )
6859 )
6860
6861 ;=============================================================
6862 ; Bit manipulation
6863 ;
6864 (define-pmacro (bit-insn-defn mach op suffix opnd encoding sem)
6865   (dni (.sym op mach - suffix - opnd)
6866        (.str op mach ":" suffix " " opnd)
6867        ((machine mach))
6868        (.str op "$" suffix " ${" opnd "}")
6869        encoding
6870        (sem opnd)
6871        ())
6872 )
6873
6874 (define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem)
6875   (bit-insn-defn 16 op X bit16-16
6876                  (+ opc1 opc2 opc3 bit16-16)
6877                  sem)
6878 )
6879
6880 (define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem)
6881   (begin
6882     (bit-insn-defn 32 op X bit32-24-Prefixed
6883                    (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3))
6884                    sem)
6885   )
6886 )
6887
6888 (define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6889   (begin
6890     (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
6891     (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem)
6892   )
6893 )
6894
6895 (define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem)
6896   (begin
6897     (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem)
6898     (bit-insn-defn 16 op G bit16-16-16    (+ opc1 opc2 opc3 bit16-16-16) sem)
6899     (bit-insn-defn 16 op S bit16-11-S     (+ opc4 opc5 opc6 bit16-11-S) sem)
6900     (bit-insn-defn 16 op G bit16-16-8     (+ opc1 opc2 opc3 bit16-16-8) sem)
6901   )
6902 )
6903
6904 (define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem)
6905   (begin
6906     (bit-insn-defn 32 op X bit32-16-Unprefixed
6907                    (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3))
6908                    sem)
6909   )
6910 )
6911
6912 (define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6913   (begin
6914     (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
6915     (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
6916   )
6917 )
6918
6919 (define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem)
6920   (begin
6921     (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem)
6922     (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
6923   )
6924 )
6925
6926 ;=============================================================
6927 ; Bit condition
6928 ;
6929 (define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem)
6930   (dni (.sym op mach - bit-opnd - cond-opnd)
6931        (.str op mach " " bit-opnd " " cond-opnd)
6932        ((machine mach))
6933        (.str op "${" cond-opnd "} ${" bit-opnd "}")
6934        encoding
6935        (sem mach bit-opnd cond-opnd)
6936        ())
6937 )
6938
6939 (define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem)
6940   (begin
6941     (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem)
6942     (bitcond-insn-defn 16 op bit16-16-16    cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem)
6943     (bitcond-insn-defn 16 op bit16-16-8     cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem)
6944   )
6945 )
6946
6947 (define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem)
6948   (begin
6949     (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40
6950                        (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40)
6951                        sem)
6952     (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32
6953                        (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32)
6954                        sem)
6955     (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24
6956                        (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24)
6957                        sem)
6958     (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16
6959                        (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16)
6960                        sem)
6961   )
6962 )
6963
6964 (define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6965   (begin
6966     (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem)
6967     (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem)
6968   )
6969 )
6970
6971 ;=============================================================
6972 ;<insn>.size #imm1,#imm2,dst -- for m32c
6973 ;
6974 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem)
6975   (dni (.sym op 32 wstr - src1 - src2 - dstgroup)
6976        (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode)
6977        ((machine 32))
6978        (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}")
6979        encoding
6980        (sem xmode src1 src2 (.sym dst32- dstgroup - xmode))
6981        ())
6982 )
6983
6984 ; m32c Prefixed variants
6985 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
6986   (begin
6987     (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op
6988                              (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
6989                                 (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode))
6990                              sem)
6991     (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op
6992                              (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
6993                                 (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode))
6994                              sem)
6995     (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op
6996                              (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
6997                                 (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode))
6998                              sem)
6999     (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op
7000                              (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7001                                 (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode))
7002                              sem)
7003   )
7004 )
7005
7006 ; m32c Unprefixed variants
7007 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7008   (begin
7009     (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op
7010                              (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7011                                 (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode))
7012                              sem)
7013     (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op
7014                              (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7015                                 (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode))
7016                              sem)
7017     (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op
7018                              (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7019                                 (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode))
7020                              sem)
7021     (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op
7022                              (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7023                                 (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode))
7024                              sem)
7025   )
7026 )
7027
7028 (define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem)
7029   (begin
7030     (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7031     (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem)
7032   )
7033 )
7034 (define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem)
7035   (begin
7036     (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem)
7037     (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7038   )
7039 )
7040 \f
7041 ;=============================================================
7042 ; Insn definitions
7043 ;-------------------------------------------------------------
7044 ; abs - absolute
7045 ;-------------------------------------------------------------
7046
7047 (define-pmacro (abs-sem mode dst)
7048   (sequence ((mode result))
7049             (set result (abs mode dst))
7050             (set obit (eq result dst))
7051             (set-z-and-s result)
7052             (set dst result))
7053 )
7054 (unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem)
7055
7056 ;-------------------------------------------------------------
7057 ; adcf - addition carry flag
7058 ;-------------------------------------------------------------
7059
7060 (define-pmacro (adcf-sem mode dst)
7061   (sequence ((mode result))
7062             (set result (addc mode dst 0 cbit))
7063             (set obit (add-oflag mode dst 0 cbit))
7064             (set cbit (add-cflag mode dst 0 cbit))
7065             (set-z-and-s result)
7066             (set dst result))
7067 )
7068 (unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem)
7069
7070 ;-------------------------------------------------------------
7071 ; add - binary addition
7072 ;-------------------------------------------------------------
7073
7074 (define-pmacro (add-sem mode src1 dst)
7075   (sequence ((mode result))
7076             (set result (add mode src1 dst))
7077             (set obit (add-oflag mode src1 dst 0))
7078             (set cbit (add-cflag mode src1 dst 0))
7079             (set-z-and-s result)
7080             (set dst result))
7081 )
7082
7083 ; add.L:G #imm32,dst (m32 #2)
7084 (binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem)
7085 ; add.size:G #imm,dst (m16 #1 m32 #1)
7086 (binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem)
7087 ; add.size:Q #imm4,dst (m16 #2 m32 #3)
7088 (binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem)
7089 (binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem)
7090 ; add.b:S #imm8,dst3 (m16 #3)
7091 (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem)
7092 ; add.BW:Q #imm4,sp (m16 #7)
7093 (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem)
7094 ; add.BW:G #imm,sp (m16 #6)
7095 (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem)
7096 ; add.BW:G src,dst (m16 #4 m32 #6)
7097 (binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem)
7098 ; add.B.S src2,r0l/r0h (m16 #5)
7099 (binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem)
7100 ; add.L:G src,dst (m32 #7)
7101 (binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem)
7102 ; add.L:S #imm{1,2},A0/A1 (m32 #5)
7103 (binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem)
7104 ; add.L:Q #imm3,sp (m32 #9)
7105 (binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem)
7106 ; add.L:S #imm8,sp (m32 #10)
7107 (binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem)
7108 ; add.L:G #imm16,sp (m32 #8)
7109 (binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem)
7110 ; add.BW:S #imm,dst2 (m32 #4)
7111 (binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem)
7112 (binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem)
7113
7114 ;-------------------------------------------------------------
7115 ; adc - binary add with carry
7116 ;-------------------------------------------------------------
7117
7118 (define-pmacro (addc-sem mode src dst)
7119   (sequence ((mode result))
7120             (set result (addc mode src dst cbit))
7121             (set obit (add-oflag mode src dst cbit))
7122             (set cbit (add-cflag mode src dst cbit))
7123             (set-z-and-s result)
7124             (set dst result))
7125 )
7126
7127 ; adc.size:G #imm,dst
7128 (binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7129 (binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7130 (binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem)
7131 (binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem)
7132
7133 ; adc.BW:G src,dst
7134 (binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7135 (binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7136 (binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem)
7137 (binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem)
7138
7139 ;-------------------------------------------------------------
7140 ; dadc - decimal add with carry
7141 ; dadd - decimal addition
7142 ;-------------------------------------------------------------
7143
7144 (define-pmacro (dadc-sem mode src dst)
7145   (sequence ((mode result))
7146             (set result (subc mode dst src (not cbit)))
7147             (set cbit (sub-cflag mode dst src (not cbit)))
7148             (set-z-and-s result)
7149             (set dst result))
7150 )
7151
7152 (define-pmacro (decimal-subtraction16-insn op opc1 opc2)
7153   (begin
7154     ; op.b #imm8,r0l
7155     (dni (.sym op 16.b-imm8)
7156          (.str op ".b #imm8")
7157          ((machine 16))
7158          (.str op ".b #${Imm-16-QI}")
7159          (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI)
7160          ((.sym op -sem) QI Imm-16-QI R0l)
7161          ())
7162     ; op.w #imm16,r0
7163     (dni (.sym op 16.w-imm16)
7164          (.str op ".b #imm16")
7165          ((machine 16))
7166          (.str op ".w #${Imm-16-HI}")
7167          (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI)
7168          ((.sym op -sem) HI Imm-16-HI R0)
7169          ())
7170     ; op.b #r0h,r0l
7171     (dni (.sym op 16.b-r0h-r0l)
7172          (.str op ".b r0h,r0l")
7173          ((machine 16))
7174          (.str op ".b r0h,r0l")
7175          (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2))
7176          ((.sym op -sem) QI R0h R0l)
7177          ())
7178     ; op.w #r1,r0
7179     (dni (.sym op 16.w-r1-r0)
7180          (.str op ".b r1,r0")
7181          ((machine 16))
7182          (.str op ".w r1,r0")
7183          (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2))
7184          ((.sym op -sem) HI R1 R0)
7185          ())
7186   )
7187 )
7188
7189 ; dadc for m16c
7190 (decimal-subtraction16-insn dadc #xE #x6 )
7191
7192 ; dadc.size #imm,dst
7193 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem)
7194 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem)
7195 ; dadc.BW src,dst
7196 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem)
7197 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem)
7198
7199 (define-pmacro (dadd-sem mode src dst)
7200   (sequence ((mode result))
7201             (set result (subc mode dst src 0))
7202             (set cbit (sub-cflag mode dst src 0))
7203             (set-z-and-s result)
7204             (set dst result))
7205 )
7206
7207 ; dadd for m16c
7208 (decimal-subtraction16-insn dadd #xC #x4)
7209
7210 ; dadd.size #imm,dst
7211 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem)
7212 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem)
7213 ; dadd.BW src,dst
7214 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem)
7215 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem)
7216
7217 ;-------------------------------------------------------------;
7218 ; addx - Add extend sign with no carry
7219 ;-------------------------------------------------------------;
7220
7221 (define-pmacro (addx-sem mode src dst)
7222   (sequence ((SI source) (SI result))
7223             (set source (zext SI (trunc QI src)))
7224             (set result (add SI source dst))
7225             (set obit (add-oflag SI source dst 0))
7226             (set cbit (add-cflag SI source dst 0))
7227             (set-z-and-s result)
7228             (set dst result))
7229 )
7230
7231 ; addx #imm,dst
7232 (binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem)
7233 ; addx src,dst
7234 (binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem)
7235
7236 ;-------------------------------------------------------------
7237 ; adjnz - Add/Sub and branch if not zero
7238 ;-------------------------------------------------------------
7239
7240 (define-pmacro (arith-jnz-sem mode src dst label)
7241   (sequence ((mode result))
7242             (set result (add mode src dst))
7243             (set dst result)
7244             (if (ne result 0)
7245                 (set pc label)))
7246 )
7247
7248 ; adjnz.size #imm4,dst,label
7249 (arith-jnz-imm4-dst adjnz (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem)
7250
7251 ;-------------------------------------------------------------
7252 ; and - binary and
7253 ;-------------------------------------------------------------
7254
7255 (define-pmacro (and-sem mode src1 dst)
7256   (sequence ((mode result))
7257             (set result (and mode src1 dst))
7258             (set-z-and-s result)
7259             (set dst result))
7260 )
7261
7262 ; and.size:G #imm,dst (m16 #1 m32 #1)
7263 (binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem)
7264 ; and.b:S #imm8,dst3 (m16 #2)
7265 (binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem)
7266 ; and.BW:G src,dst (m16 #3 m32 #3)
7267 (binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem)
7268 ; and.B.S src2,r0l/r0h (m16 #4)
7269 (binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem)
7270 ; and.BW:S #imm,dst2 (m32 #2)
7271 (binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem)
7272 (binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem)
7273
7274 ;-------------------------------------------------------------
7275 ; band - bit and
7276 ;-------------------------------------------------------------
7277
7278 (define-pmacro (band-sem src)
7279   (set cbit (and src cbit))
7280 )
7281 (bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem)
7282
7283 ;-------------------------------------------------------------
7284 ; bclr - bit clear
7285 ;-------------------------------------------------------------
7286
7287 (define-pmacro (bclr-sem dst)
7288   (set dst 0)
7289 )
7290 (bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem)
7291
7292 ;-------------------------------------------------------------
7293 ; bitindex - bit index
7294 ;-------------------------------------------------------------
7295
7296 (define-pmacro (bitindex-sem mode dst)
7297   (set BitIndex dst)
7298 )
7299 (unary-insn-defn 32 16-Unprefixed QI .b bitindex
7300                      (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE))
7301                      bitindex-sem)
7302 (unary-insn-defn 32 16-Unprefixed HI .w bitindex
7303                      (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE))
7304                      bitindex-sem)
7305
7306 ;-------------------------------------------------------------
7307 ; bmCnd - bit move condition
7308 ;-------------------------------------------------------------
7309
7310 (define-pmacro (test-condition16 cond)
7311   (case UQI cond
7312         ((#x00) (trunc BI cbit))
7313         ((#x01) (not (or cbit zbit)))
7314         ((#x02) (trunc BI zbit))
7315         ((#x03) (trunc BI sbit))
7316         ((#x04) (or zbit (xor sbit obit)))
7317         ((#x05) (trunc BI obit))
7318         ((#x06) (xor sbit obit))
7319         ((#xf8) (not cbit))
7320         ((#xf9) (or cbit zbit))
7321         ((#xfa) (not zbit))
7322         ((#xfb) (not sbit))
7323         ((#xfc) (not (or zbit (xor sbit obit))))
7324         ((#xfd) (not obit))
7325         ((#xfe) (not (xor sbit obit)))
7326         (else   (const BI 0))
7327   )
7328 )
7329
7330 (define-pmacro (test-condition32 cond)
7331   (case UQI cond
7332         ((#x00) (not cbit))
7333         ((#x01) (or cbit zbit))
7334         ((#x02) (not zbit))
7335         ((#x03) (not sbit))
7336         ((#x04) (not obit))
7337         ((#x05) (not (or zbit (xor sbit obit))))
7338         ((#x06) (not (xor sbit obit)))
7339         ((#x08) (trunc BI cbit))
7340         ((#x09) (not (or cbit zbit)))
7341         ((#x0a) (trunc BI zbit))
7342         ((#x0b) (trunc BI sbit))
7343         ((#x0c) (trunc BI obit))
7344         ((#x0d) (or zbit (xor sbit obit)))
7345         ((#x0e) (xor sbit obit))
7346         (else   (const BI 0))
7347   )
7348 )
7349
7350 (define-pmacro (bitcond-sem mach op cond)
7351   (if ((.sym test-condition mach) cond)
7352       (set op 1)
7353       (set op 0))
7354 )
7355 (bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem)
7356
7357 (dni bm16-c
7358      "bm16 C"
7359      ((machine 16))
7360      "bm$cond16c c"
7361      (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c)
7362      (bitcond-sem 16 cbit cond16c)
7363      ())
7364
7365 (dni bm32-c
7366      "bm32 C"
7367      ((machine 32))
7368      "bm$cond32 c"
7369      (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32)
7370      (bitcond-sem 32 cbit cond32)
7371      ())
7372
7373 ;-------------------------------------------------------------
7374 ; bnand
7375 ;-------------------------------------------------------------
7376
7377 (define-pmacro (bnand-sem src)
7378   (set cbit (and (inv src) cbit))
7379 )
7380 (bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem)
7381
7382 ;-------------------------------------------------------------
7383 ; bnor
7384 ;-------------------------------------------------------------
7385
7386 (define-pmacro (bnor-sem src)
7387   (set cbit (or (inv src) cbit))
7388 )
7389 (bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem)
7390
7391 ;-------------------------------------------------------------
7392 ; bnot
7393 ;-------------------------------------------------------------
7394
7395 (define-pmacro (bnot-sem dst)
7396   (set dst (inv dst))
7397 )
7398 (bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem)
7399
7400 ;-------------------------------------------------------------
7401 ; bntst
7402 ;-------------------------------------------------------------
7403
7404 (define-pmacro (bntst-sem src)
7405   (set cbit (inv src))
7406   (set zbit (inv src))
7407 )
7408 (bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem)
7409
7410 ;-------------------------------------------------------------
7411 ; bnxor
7412 ;-------------------------------------------------------------
7413
7414 (define-pmacro (bnxor-sem src)
7415   (set cbit (xor (inv src) cbit))
7416 )
7417 (bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem)
7418
7419 ;-------------------------------------------------------------
7420 ; bor
7421 ;-------------------------------------------------------------
7422
7423 (define-pmacro (bor-sem src)
7424   (set cbit (or src cbit))
7425 )
7426 (bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem)
7427
7428 ;-------------------------------------------------------------
7429 ; brk
7430 ;-------------------------------------------------------------
7431
7432 (dni brk16
7433      "brk"
7434      ((machine 16))
7435      "brk"
7436      (+ (f-0-4 #x0) (f-4-4 #x0))
7437      (nop)
7438      ())
7439
7440 (dni brk32
7441      "brk"
7442      ((machine 32))
7443      "brk"
7444      (+ (f-0-4 #x0) (f-4-4 #x0))
7445      (nop)
7446      ())
7447
7448 ;-------------------------------------------------------------
7449 ; brk2
7450 ;-------------------------------------------------------------
7451
7452 (dni brk232
7453      "brk2"
7454      ((machine 32))
7455      "brk2"
7456      (+ (f-0-4 #x0) (f-4-4 #x8))
7457      (nop)
7458      ())
7459
7460 ;-------------------------------------------------------------
7461 ; bset
7462 ;-------------------------------------------------------------
7463
7464 (define-pmacro (bset-sem dst)
7465   (set dst 1)
7466 )
7467 (bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem)
7468
7469 ;-------------------------------------------------------------
7470 ; btst
7471 ;-------------------------------------------------------------
7472
7473 (define-pmacro (btst-sem dst)
7474   (set zbit (inv dst))
7475   (set cbit dst)
7476 )
7477 (bitdst-insn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) #xD #x0 #x0 btst-sem)
7478
7479 ;-------------------------------------------------------------
7480 ; btstc
7481 ;-------------------------------------------------------------
7482
7483 (define-pmacro (btstc-sem dst)
7484   (set zbit (inv dst))
7485   (set cbit dst)
7486   (set dst (const 0))
7487 )
7488 (bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem)
7489
7490 ;-------------------------------------------------------------
7491 ; btsts
7492 ;-------------------------------------------------------------
7493
7494 (define-pmacro (btsts-sem dst)
7495   (set zbit (inv dst))
7496   (set cbit dst)
7497   (set dst (const 0))
7498 )
7499 (bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem)
7500
7501 ;-------------------------------------------------------------
7502 ; bxor
7503 ;-------------------------------------------------------------
7504
7505 (define-pmacro (bxor-sem src)
7506   (set cbit (xor src cbit))
7507 )
7508 (bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem)
7509
7510 ;-------------------------------------------------------------
7511 ; clip
7512 ;-------------------------------------------------------------
7513
7514 (define-pmacro (clip-sem mode imm1 imm2 dest)
7515   (sequence ()
7516             (if (gt mode imm1 dest)
7517                 (set dest imm1))
7518             (if (lt mode imm2 dest)
7519                 (set dest imm2)))
7520 )
7521
7522 (insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem)
7523
7524 ;-------------------------------------------------------------
7525 ; cmp - binary compare
7526 ;-------------------------------------------------------------
7527
7528 (define-pmacro (cmp-sem mode src1 dst)
7529   (sequence ((mode result))
7530             (set result (sub mode dst src1))
7531             (set obit (sub-oflag mode dst src1 0))
7532             (set cbit (not (sub-cflag mode dst src1 0)))
7533             (set-z-and-s result))
7534 )
7535
7536 ; cmp.L:G #imm32,dst (m32 #2)
7537 (binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem)
7538 ; cmp.size:G #imm,dst (m16 #1 m32 #1)
7539 (binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem)
7540 ; cmp.size:Q #imm4,dst (m16 #2 m32 #3)
7541 (binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem)
7542 ; cmp.b:S #imm8,dst3 (m16 #3)
7543 (binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem)
7544 ; cmp.BW:G src,dst (m16 #4 m32 #5)
7545 (binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem)
7546 ; cmp.B.S src2,r0l/r0h (m16 #5)
7547 (binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem)
7548 ; cmp.L:G src,dst (m32 #6)
7549 (binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem)
7550 ; cmp.BW:S #imm,dst2 (m32 #4)
7551 (binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem)
7552 (binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem)
7553 ; cmp.BW:s src2,r0[l] (m32 #7)
7554 (binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem)
7555 (binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem)
7556
7557 ;-------------------------------------------------------------
7558 ; cmpx - binary compare extend sign
7559 ;-------------------------------------------------------------
7560
7561 (define-pmacro (cmpx-sem mode src1 dst)
7562   (sequence ((mode result))
7563             (set result (sub mode dst (ext mode src1)))
7564             (set obit (sub-oflag mode dst (ext mode src1) 0))
7565             (set cbit (sub-cflag mode dst (ext mode src1) 0))
7566             (set-z-and-s result))
7567 )
7568
7569 (binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem)
7570
7571 ;-------------------------------------------------------------
7572 ; dec - decrement
7573 ;-------------------------------------------------------------
7574
7575 (define-pmacro (dec-sem mode dest)
7576   (sequence ((mode result))
7577             (set result (sub mode dest 1))
7578             (set-z-and-s result)
7579             (set dest result))
7580 )
7581
7582 (dni dec16.b
7583      "dec.b Dst16-3-S-8"
7584      ((machine 16))
7585      "dec.b ${Dst16-3-S-8}"
7586      (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8)
7587      (dec-sem QI Dst16-3-S-8)
7588      ())
7589
7590 (dni dec16.w
7591      "dec.w Dst16An-S"
7592      ((machine 16))
7593      "dec.w ${Dst16An-S}"
7594      (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S)
7595      (dec-sem HI Dst16An-S)
7596      ())
7597
7598 (unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem)
7599 (unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem)
7600
7601 ;-------------------------------------------------------------
7602 ; div - divide
7603 ; divu - divide unsigned
7604 ; divx - divide extension
7605 ;-------------------------------------------------------------
7606
7607 ; div.BW #imm
7608 (div-imm div  div  mod  SI  127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem)
7609 (div-imm divu udiv umod USI 255    0 65535      0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem)
7610 (div-imm divx div  mod  SI  127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem)
7611 ; div.BW src
7612 (div-src div  div  mod  SI  127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem)
7613 (div-src divu udiv umod USI 255    0 65535      0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem)
7614 (div-src divx div  mod  SI  127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem)
7615
7616 (div-src-defn 32 .l div dst32-24-Prefixed-SI
7617               (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI)
7618               div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7619               div-sem)
7620 (div-src-defn 32 .l divu dst32-24-Prefixed-SI
7621               (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI)
7622               udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0
7623               div-sem)
7624 (div-src-defn 32 .l divx dst32-24-Prefixed-SI
7625               (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI)
7626               div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7627               div-sem)
7628
7629 ;-------------------------------------------------------------
7630 ; dsbb - decimal subtraction with borrow
7631 ; dsub - decimal subtraction
7632 ;-------------------------------------------------------------
7633
7634 (define-pmacro (dsbb-sem mode src dst)
7635   (sequence ((mode result))
7636             (set result (subc mode dst src (not cbit)))
7637             (set cbit (sub-cflag mode dst src (not cbit)))
7638             (set-z-and-s result)
7639             (set dst result))
7640 )
7641
7642 ; dsbb for m16c
7643 (decimal-subtraction16-insn dsbb #xF #x7)
7644
7645 ; dsbb.size #imm,dst
7646 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem)
7647 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem)
7648 ; dsbb.BW src,dst
7649 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem)
7650 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem)
7651
7652 (define-pmacro (dsub-sem mode src dst)
7653   (sequence ((mode result))
7654             (set result (subc mode dst src 0))
7655             (set cbit (sub-cflag mode dst src 0))
7656             (set-z-and-s result)
7657             (set dst result))
7658 )
7659
7660 ; dsub for m16c
7661 (decimal-subtraction16-insn dsub #xD #x5)
7662
7663 ; dsub.size #imm,dst
7664 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem)
7665 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem)
7666 ; dsub.BW src,dst
7667 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem)
7668 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem)
7669
7670 ;-------------------------------------------------------------
7671 ; sub - binary subtraction
7672 ;-------------------------------------------------------------
7673
7674 (define-pmacro (sub-sem mode src1 dst)
7675   (sequence ((mode result))
7676             (set result (sub mode dst src1))
7677             (set obit (sub-oflag mode dst src1 0))
7678             (set cbit (sub-cflag mode dst src1 0))
7679             (set dst result)
7680             (set-z-and-s result)))
7681
7682 ; sub.size:G #imm,dst (m16 #1 m32 #1)
7683 (binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem)
7684 ; sub.b:S #imm8,dst3 (m16 #2)
7685 (binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem)
7686 ; sub.BW:G src,dst (m16 #3 m32 #4)
7687 (binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem)
7688 ; sub.B.S src2,r0l/r0h (m16 #4)
7689 (binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem)
7690 ; sub.L:G #imm32,dst (m32 #2)
7691 (binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem)
7692 ; sub.BW:S #imm,dst2 (m32 #3)
7693 (binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem)
7694 (binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem)
7695 ; sub.L:G src,dst (m32 #5)
7696 (binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem)
7697
7698 ;-------------------------------------------------------------
7699 ; enter - enter function
7700 ; exitd - exit and deallocate stack frame
7701 ;-------------------------------------------------------------
7702
7703 (define-pmacro (enter16-sem mach amt)
7704      (sequence ()
7705                (set (reg h-sp) (sub (reg h-sp) 2))
7706                (set (mem16 HI (reg h-sp)) (reg h-fb))
7707                (set (reg h-fb) (reg h-sp))
7708                (set (reg h-sp) (sub (reg h-sp) amt))))
7709
7710 (define-pmacro (exit16-sem mach)
7711      (sequence ((SI newpc))
7712                (set (reg h-sp) (reg h-fb))
7713                (set (reg h-fb) (mem16 HI (reg h-sp)))
7714                (set (reg h-sp) (add (reg h-sp) 2))
7715                (set newpc (mem16 HI (reg h-sp)))
7716                (set (reg h-sp) (add (reg h-sp) 2))
7717                (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16))))
7718                (set (reg h-sp) (add (reg h-sp) 1))
7719                (set pc newpc)))
7720
7721 (define-pmacro (enter32-sem mach amt)
7722      (sequence ()
7723                (set (reg h-sp) (sub (reg h-sp) 4))
7724                (set (mem32 SI (reg h-sp)) (reg h-fb))
7725                (set (reg h-fb) (reg h-sp))
7726                (set (reg h-sp) (sub (reg h-sp) amt))))
7727
7728 (define-pmacro (exit32-sem mach)
7729      (sequence ((SI newpc))
7730                (set (reg h-sp) (reg h-fb))
7731                (set (reg h-fb) (mem32 SI (reg h-sp)))
7732                (set (reg h-sp) (add (reg h-sp) 4))
7733                (set newpc (mem32 SI (reg h-sp)))
7734                (set (reg h-sp) (add (reg h-sp) 4))
7735                (set pc newpc)))
7736
7737 (dni enter16 "enter #Imm-16-QI" ((machine 16))
7738      ("enter #${Dsp-16-u8}")
7739      (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8)
7740      (enter16-sem 16 Dsp-16-u8)
7741      ())
7742
7743 (dni exitd16 "exitd" ((machine 16))
7744      ("exitd")
7745      (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2))
7746      (exit16-sem 16)
7747      ())
7748
7749 (dni enter32 "enter #Imm-8-QI" ((machine 32))
7750      ("enter #${Dsp-8-u8}")
7751      (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8)
7752      (enter32-sem 32 Dsp-8-u8)
7753      ())
7754
7755 (dni exitd32 "exitd" ((machine 32))
7756      ("exitd")
7757      (+ (f-0-4 #xF) (f-4-4 #xC))
7758      (exit32-sem 32)
7759      ())
7760
7761 ;-------------------------------------------------------------
7762 ; fclr - flag register clear
7763 ; fset - flag register set
7764 ;-------------------------------------------------------------
7765
7766 (define-pmacro (set-flags-sem flag)
7767   (sequence ((SI tmp))
7768             (case DFLT flag
7769                   ((#x0) (set cbit 1))
7770                   ((#x1) (set dbit 1))
7771                   ((#x2) (set zbit 1))
7772                   ((#x3) (set sbit 1))
7773                   ((#x4) (set bbit 1))
7774                   ((#x5) (set obit 1))
7775                   ((#x6) (set ibit 1))
7776                   ((#x7) (set ubit 1)))
7777             )
7778   )
7779
7780 (define-pmacro (clear-flags-sem flag)
7781   (sequence ((SI tmp))
7782             (case DFLT flag
7783                   ((#x0) (set cbit 0))
7784                   ((#x1) (set dbit 0))
7785                   ((#x2) (set zbit 0))
7786                   ((#x3) (set sbit 0))
7787                   ((#x4) (set bbit 0))
7788                   ((#x5) (set obit 0))
7789                   ((#x6) (set ibit 0))
7790                   ((#x7) (set ubit 0)))
7791             )
7792   )
7793
7794 (dni fclr16 "fclr flag" ((machine 16))
7795      ("fclr ${flags16}")
7796      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5))
7797      (clear-flags-sem flags16)
7798      ())
7799
7800 (dni fset16 "fset flag" ((machine 16))
7801      ("fset ${flags16}")
7802      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4))
7803      (set-flags-sem flags16)
7804      ())
7805
7806 (dni fclr "fclr" ((machine 32))
7807      ("fclr ${flags32}")
7808      (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32)
7809      (clear-flags-sem flags32)
7810      ())
7811
7812 (dni fset "fset" ((machine 32))
7813      ("fset ${flags32}")
7814      (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32)
7815      (set-flags-sem flags32)
7816      ())
7817
7818 ;-------------------------------------------------------------
7819 ; inc - increment
7820 ;-------------------------------------------------------------
7821
7822 (define-pmacro (inc-sem mode dest)
7823   (sequence ((mode result))
7824             (set result (add mode dest 1))
7825             (set-z-and-s result)
7826             (set dest result))
7827 )
7828
7829 (dni inc16.b
7830      "inc.b Dst16-3-S-8"
7831      ((machine 16))
7832      "inc.b ${Dst16-3-S-8}"
7833      (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8)
7834      (inc-sem QI Dst16-3-S-8)
7835      ())
7836
7837 (dni inc16.w
7838      "inc.w Dst16An-S"
7839      ((machine 16))
7840      "inc.w ${Dst16An-S}"
7841      (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S)
7842      (inc-sem HI Dst16An-S)
7843      ())
7844
7845 (unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem)
7846 (unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem)
7847
7848 ;-------------------------------------------------------------
7849 ; freit - fast return from interrupt (m32)
7850 ; int - interrupt
7851 ; into - interrupt on overflow
7852 ;-------------------------------------------------------------
7853
7854 ; ??? semantics
7855 (dni freit32 "FREIT" ((machine 32))
7856      ("freit")
7857      (+ (f-0-4 9) (f-4-4 #xF))
7858      (nop)
7859      ())
7860
7861 (dni int16 "int Dsp-10-u6" ((machine 16))
7862      ("int #${Dsp-10-u6}")
7863      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6)
7864      (c-call VOID "do_int" pc Dsp-10-u6)
7865      ())
7866
7867 (dni into16 "into" ((machine 16))
7868      ("into")
7869      (+ (f-0-4 #xF) (f-4-4 6))
7870      (nop)
7871      ())
7872
7873 (dni int32 "int Dsp-8-u6" ((machine 32))
7874      ("int #${Dsp-8-u6}")
7875      (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0))
7876      (c-call VOID "do_int" pc Dsp-8-u6)
7877      ())
7878
7879 (dni into32 "into" ((machine 32))
7880      ("into")
7881      (+ (f-0-4 #xB) (f-4-4 #xF))
7882      (nop)
7883      ())
7884
7885 ;-------------------------------------------------------------
7886 ; index (m32c)
7887 ;-------------------------------------------------------------
7888
7889 ; TODO add support to insns allowing index
7890 (define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d))
7891 (define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d))
7892 (define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0)))
7893 (define-pmacro (indexw-sem mode d)
7894   (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2))))
7895 (define-pmacro (indexwd-sem mode d)
7896   (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
7897 (define-pmacro (indexws-sem mode d)
7898   (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
7899 (define-pmacro (indexl-sem mode d)
7900   (set SrcIndex d) (set DstIndex (sll d (const 2))))
7901 (define-pmacro (indexld-sem mode d)
7902   (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
7903 (define-pmacro (indexls-sem mode d)
7904   (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
7905
7906 ; indexb src (index byte)
7907 (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem)
7908 (unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem)
7909 ; indexbd src (index byte dest)
7910 (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem)
7911 (unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem)
7912 ; indexbs src (index byte src)
7913 (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem)
7914 (unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem)
7915 ; indexl src (index long)
7916 (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem)
7917 (unary32-defn HI .w 0 indexl 9 3 3 indexl-sem)
7918 ; indexld src (index long dest)
7919 (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem)
7920 (unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem)
7921 ; indexls src (index long src)
7922 (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem)
7923 (unary32-defn HI .w 0 indexls 9 1 3 indexls-sem)
7924 ; indexw src (index word)
7925 (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem)
7926 (unary32-defn HI .w 0 indexw 8 3 3 indexw-sem)
7927 ; indexwd src (index word dest)
7928 (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem)
7929 (unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem)
7930 ; indexws (index word src)
7931 (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem)
7932 (unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem)
7933
7934 ;-------------------------------------------------------------
7935 ; jcc - jump on condition
7936 ;-------------------------------------------------------------
7937
7938 (define-pmacro (jcnd32-sem cnd label)
7939   (sequence ()
7940             (case DFLT cnd
7941                   ((#x00) (if (not cbit) (set pc label))) ;ltu nc
7942                   ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu
7943                   ((#x02) (if (not zbit) (set pc label))) ;ne nz
7944                   ((#x03) (if (not sbit) (set pc label))) ;pz
7945                   ((#x04) (if (not obit) (set pc label))) ;no
7946                   ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
7947                   ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge
7948                   ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c
7949                   ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu
7950                   ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z
7951                   ((#x0b) (if (trunc BI sbit) (set pc label))) ;n
7952                   ((#x0c) (if (trunc BI obit) (set pc label))) ;o
7953                   ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le
7954                   ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
7955                   )
7956         )
7957   )
7958
7959 (define-pmacro (jcnd16-sem cnd label)
7960   (sequence ()
7961             (case DFLT cnd
7962                   ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c
7963                   ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu
7964                   ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z
7965                   ((#x03) (if (trunc BI sbit) (set pc label))) ;n
7966                   ((#x04) (if (not cbit) (set pc label))) ;ltu nc
7967                   ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu
7968                   ((#x06) (if (not zbit) (set pc label))) ;ne nz
7969                   ((#x07) (if (not sbit) (set pc label))) ;pz
7970                   ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le
7971                   ((#x09) (if (trunc BI obit) (set pc label))) ;o
7972                   ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge
7973                   ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
7974                   ((#x0d) (if (not obit) (set pc label))) ;no
7975                   ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
7976                   )
7977         )
7978   )
7979
7980 (dni jcnd16-5
7981      "jCnd label"
7982      (RELAXABLE (machine 16))
7983      "j$cond16j5 ${Lab-8-8}"
7984      (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
7985      (jcnd16-sem cond16j5 Lab-8-8)
7986      ()
7987 )
7988
7989 (dni jcnd16
7990      "jCnd label"
7991      (RELAXABLE (machine 16))
7992      "j$cond16j ${Lab-16-8}"
7993      (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
7994      (jcnd16-sem cond16j Lab-16-8)
7995      ()
7996 )
7997
7998 (dni jcnd32
7999      "jCnd label"
8000      (RELAXABLE (machine 32))
8001      "j$cond32j ${Lab-8-8}"
8002      (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
8003      (jcnd32-sem cond32j Lab-8-8)
8004      ()
8005 )
8006
8007 ;-------------------------------------------------------------
8008 ; jmp - jump
8009 ;-------------------------------------------------------------
8010
8011 ; jmp.s label3 (m16 #1)
8012 (dni jmp16.s "jmp.s Lab-5-3" (RELAXABLE (machine 16))
8013      ("jmp.s ${Lab-5-3}")
8014      (+ (f-0-4 6) (f-4-1 0) Lab-5-3)
8015      (sequence () (set pc Lab-5-3))
8016      ())
8017 ; jmp.b label8 (m16 #2)
8018 (dni jmp16.b "jmp.b Lab-8-8" (RELAXABLE (machine 16))
8019      ("jmp.b ${Lab-8-8}")
8020      (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
8021      (sequence () (set pc Lab-8-8))
8022      ())
8023 ; jmp.w label16 (m16 #3)
8024 (dni jmp16.w "jmp.w Lab-8-16" (RELAXABLE (machine 16))
8025      ("jmp.w ${Lab-8-16}")
8026      (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
8027      (sequence () (set pc Lab-8-16))
8028      ())
8029 ; jmp.a label24 (m16 #4)
8030 (dni jmp16.a "jmp.a Lab-8-24" ((machine 16))
8031      ("jmp.a ${Lab-8-24}")
8032      (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24)
8033      (sequence () (set pc Lab-8-24))
8034      ())
8035
8036 (define-pmacro (jmp16-sem mode dst)
8037   (set pc (and dst #xfffff))
8038 )
8039 (define-pmacro (jmp32-sem mode dst)
8040   (set pc dst)
8041 )
8042 ; jmpi.w dst (m16 #1 m32 #2)
8043 (unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem)
8044 (unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem)
8045 ; jmpi.a dst (m16 #2 m32 #2)
8046 (unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem)
8047 (unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem)
8048 ; jmps imm8 (m16 #1)
8049 (dni jmps16 "jmps Imm-8-QI" ((machine 16))
8050      ("jmps #${Imm-8-QI}")
8051      (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI)
8052      (sequence () (set pc Imm-8-QI))
8053      ())
8054 ; jmp.s label3 (m32 #1)
8055 (dni jmp32.s
8056      "jmp.s label"
8057      (RELAXABLE (machine 32))
8058      "jmp.s ${Lab32-jmp-s}"
8059      (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
8060      (set pc Lab32-jmp-s)
8061      ()
8062 )
8063 ; jmp.b label8 (m32 #2)
8064 (dni jmp32.b "jmp.b Lab-8-8" (RELAXABLE (machine 32))
8065      ("jmp.b ${Lab-8-8}")
8066      (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
8067      (set pc Lab-8-8)
8068      ())
8069 ; jmp.w label16 (m32 #3)
8070 (dni jmp32.w "jmp.w Lab-8-16" (RELAXABLE (machine 32))
8071      ("jmp.w ${Lab-8-16}")
8072      (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
8073      (set pc Lab-8-16)
8074      ())
8075 ; jmp.a label24 (m32 #4)
8076 (dni jmp32.a "jmp.a Lab-8-24" ((machine 32))
8077      ("jmp.a ${Lab-8-24}")
8078      (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24)
8079      (set pc Lab-8-24)
8080      ())
8081 ; jmp.s imm8 (m32 #1)
8082 (dni jmps32 "jmps Imm-8-QI" ((machine 32))
8083      ("jmps #${Imm-8-QI}")
8084      (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI)
8085      (set pc Imm-8-QI)
8086      ())
8087
8088 ;-------------------------------------------------------------
8089 ; jsr jump subroutine
8090 ;-------------------------------------------------------------
8091
8092 (define-pmacro (jsr16-sem length dst)
8093   (sequence ((SI tpc))
8094             (set tpc (add pc length))
8095             (set (reg h-sp) (sub (reg h-sp) 2))
8096             (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8))
8097             (set (reg h-sp) (sub (reg h-sp) 1))
8098             (set (mem16 QI (reg h-sp)) (and tpc #xff))
8099             (set pc dst)
8100             )
8101 )
8102 (define-pmacro (jsr32-sem length dst)
8103   (sequence ((SI tpc))
8104             (set tpc (add pc length))
8105             (set (reg h-sp) (sub (reg h-sp) 2))
8106             (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16))
8107             (set (reg h-sp) (sub (reg h-sp) 2))
8108             (set (mem32 HI (reg h-sp)) (and tpc #xffff))
8109             (set pc dst)
8110             )
8111 )
8112
8113 ; jsr.w label16 (m16 #1)
8114 (dni jsr16.w "jsr.w Lab-8-16" (RELAXABLE (machine 16))
8115      ("jsr.w ${Lab-8-16}")
8116      (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
8117      (jsr16-sem 3 Lab-8-16)
8118      ())
8119 ; jsr.a label24 (m16 #2)
8120 (dni jsr16.a "jsr.a Lab-8-24" ((machine 16))
8121      ("jsr.a ${Lab-8-24}")
8122      (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24)
8123      (jsr16-sem 4 Lab-8-24)
8124      ())
8125 (define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3        op16-sem
8126                                op32 op32-1 op32-2 op32-3 op32-4 op32-sem len)
8127   (begin
8128     (dni (.sym jsri16 mode - op16)
8129          (.str "jsri." mode " " op16)
8130          ((machine 16))
8131          (.str "jsri." mode " ${" op16 "}")
8132          (+ op16-1 op16-2 op16-3 op16)
8133          (op16-sem len op16)
8134          ())
8135     (dni (.sym jsri32 mode - op32)
8136          (.str "jsri." mode " " op32)
8137          ((machine 32))
8138          (.str "jsri." mode " ${" op32 "}")
8139          (+ op32-1 op32-2 op32-3 op32-4 op32)
8140          (op32-sem len op32)
8141          ())
8142     )
8143   )
8144 ; jsri.w dst (m16 #1 m32 #1))
8145 (jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8146               dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2)
8147 (jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8148               dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3)
8149 (jsri-defn w dst16-16-16-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8150               dst32-16-16-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
8151 (dni jsri32.w "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
8152      ("jsri.w ${dst32-16-24-Unprefixed-HI}")
8153      (+ (f-0-4 #xC) (f-7-1 1) dst32-16-24-Unprefixed-HI (f-10-2 #x1) (f-12-4 #xF))
8154      (jsr32-sem 6 dst32-16-24-Unprefixed-HI)
8155      ())
8156
8157 ; jsri.a (m16 #2 m32 #2)
8158 (jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8159               dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2)
8160 (jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8161               dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3)
8162 (jsri-defn a dst16-16-16-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8163               dst32-16-16-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
8164 (dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
8165      ("jsri.w ${dst32-16-24-Unprefixed-SI}")
8166      (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1))
8167      (jsr32-sem 6 dst32-16-24-Unprefixed-SI)
8168      ())
8169 ; jsr.w label16 (m32 #1)
8170 (dni jsr32.w "jsr.w label" (RELAXABLE (machine 32))
8171      ("jsr.w ${Lab-8-16}")
8172      (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
8173      (jsr32-sem 3 Lab-8-16)
8174      ())
8175 ; jsr.a label16 (m32 #2)
8176 (dni jsr32.a "jsr.a label" ((machine 32))
8177      ("jsr.a ${Lab-8-24}")
8178      (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24)
8179      (jsr32-sem 4 Lab-8-24)
8180      ())
8181 ; jsrs imm8 (m16 #1)
8182 (dni jsrs16 "jsrs Imm-8-QI" ((machine 16))
8183      ("jsrs #${Imm-8-QI}")
8184      (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI)
8185      (jsr16-sem 2 Imm-8-QI)
8186      ())
8187 ; jsrs imm8 (m32 #1)
8188 (dni jsrs "jsrs #Imm-8-QI" ((machine 32))
8189      ("jsrs #${Imm-8-QI}")
8190      (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI)
8191      (jsr32-sem 2 Imm-8-QI)
8192      ())
8193
8194 ;-------------------------------------------------------------
8195 ; ldc - load control register
8196 ; stc - store control register
8197 ;-------------------------------------------------------------
8198
8199 (define-pmacro (ldc32-cr1-sem src dst)
8200   (sequence ()
8201             (case DFLT dst
8202                   ((#x0) (set (reg h-dct0) src))
8203                   ((#x1) (set (reg h-dct1) src))
8204                   ((#x2) (sequence ((HI tflag))
8205                                    (set tflag src)
8206                                    (if (and tflag #x1) (set cbit 1))
8207                                    (if (and tflag #x2) (set dbit 1))
8208                                    (if (and tflag #x4) (set zbit 1))
8209                                    (if (and tflag #x8) (set sbit 1))
8210                                    (if (and tflag #x10) (set bbit 1))
8211                                    (if (and tflag #x20) (set obit 1))
8212                                    (if (and tflag #x40) (set ibit 1))
8213                                    (if (and tflag #x80) (set ubit 1))))
8214                   ((#x3) (set (reg h-svf) src))
8215                   ((#x4) (set (reg h-drc0) src))
8216                   ((#x5) (set (reg h-drc1) src))
8217                   ((#x6) (set (reg h-dmd0) src))
8218                   ((#x7) (set (reg h-dmd1) src))
8219             )
8220   )
8221 )
8222 (define-pmacro (ldc32-cr2-sem src dst)
8223   (sequence ()
8224             (case DFLT dst
8225                   ((#x0) (set (reg h-intb) src))
8226                   ((#x1) (set (reg h-sp) src))
8227                   ((#x2) (set (reg h-sb) src))
8228                   ((#x3) (set (reg h-fb) src))
8229                   ((#x4) (set (reg h-svp) src))
8230                   ((#x5) (set (reg h-vct) src))
8231                   ((#x7) (set (reg h-isp) src))
8232             )
8233   )
8234 )
8235 (define-pmacro (ldc32-cr3-sem src dst)
8236   (sequence ()
8237             (case DFLT dst
8238                   ((#x2) (set (reg h-dma0) src))
8239                   ((#x3) (set (reg h-dma1) src))
8240                   ((#x4) (set (reg h-dra0) src))
8241                   ((#x5) (set (reg h-dra1) src))
8242                   ((#x6) (set (reg h-dsa0) src))
8243                   ((#x7) (set (reg h-dsa1) src))
8244             )
8245   )
8246 )
8247 (define-pmacro (ldc16-sem src dst)
8248   (sequence ()
8249             (case DFLT dst
8250                   ((#x1) (set (reg h-intb) src))
8251                   ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16)))))
8252                   ((#x3) (sequence ((HI tflag))
8253                                    (set tflag src)
8254                                    (if (and tflag #x1) (set cbit 1))
8255                                    (if (and tflag #x2) (set dbit 1))
8256                                    (if (and tflag #x4) (set zbit 1))
8257                                    (if (and tflag #x8) (set sbit 1))
8258                                    (if (and tflag #x10) (set bbit 1))
8259                                    (if (and tflag #x20) (set obit 1))
8260                                    (if (and tflag #x40) (set ibit 1))
8261                                    (if (and tflag #x80) (set ubit 1))))
8262                   ((#x4) (set (reg h-isp) src))
8263                   ((#x5) (set (reg h-sp) src))
8264                   ((#x6) (set (reg h-sb) src))
8265                   ((#x7) (set (reg h-fb) src))
8266             )
8267   )
8268 )
8269
8270 (define-pmacro (stc32-cr1-sem src dst)
8271   (sequence ()
8272             (case DFLT src
8273                   ((#x0) (set dst (reg h-dct0)))
8274                   ((#x1) (set dst (reg h-dct1)))
8275                   ((#x2) (sequence ((HI tflag))
8276                                    (set tflag 0)
8277                                    (if (eq cbit 1) (set tflag (or tflag #x1)))
8278                                    (if (eq dbit 1) (set tflag (or tflag #x2)))
8279                                    (if (eq zbit 1) (set tflag (or tflag #x4)))
8280                                    (if (eq sbit 1) (set tflag (or tflag #x8)))
8281                                    (if (eq bbit 1) (set tflag (or tflag #x10)))
8282                                    (if (eq obit 1) (set tflag (or tflag #x20)))
8283                                    (if (eq ibit 1) (set tflag (or tflag #x40)))
8284                                    (if (eq ubit 1) (set tflag (or tflag #x80)))
8285                                    (set dst tflag)))
8286                   ((#x3) (set dst (reg h-svf)))
8287                   ((#x4) (set dst (reg h-drc0)))
8288                   ((#x5) (set dst (reg h-drc1)))
8289                   ((#x6) (set dst (reg h-dmd0)))
8290                   ((#x7) (set dst (reg h-dmd1)))
8291             )
8292   )
8293 )
8294 (define-pmacro (stc32-cr2-sem src dst)
8295   (sequence ()
8296             (case DFLT src
8297                   ((#x0) (set dst (reg h-intb)))
8298                   ((#x1) (set dst (reg h-sp)))
8299                   ((#x2) (set dst (reg h-sb)))
8300                   ((#x3) (set dst (reg h-fb)))
8301                   ((#x4) (set dst (reg h-svp)))
8302                   ((#x5) (set dst (reg h-vct)))
8303                   ((#x7) (set dst (reg h-isp)))
8304             )
8305   )
8306 )
8307 (define-pmacro (stc32-cr3-sem src dst)
8308   (sequence ()
8309             (case DFLT src
8310                   ((#x2) (set dst (reg h-dma0)))
8311                   ((#x3) (set dst (reg h-dma1)))
8312                   ((#x4) (set dst (reg h-dra0)))
8313                   ((#x5) (set dst (reg h-dra1)))
8314                   ((#x6) (set dst (reg h-dsa0)))
8315                   ((#x7) (set dst (reg h-dsa1)))
8316             )
8317   )
8318 )
8319 (define-pmacro (stc16-sem src dst)
8320   (sequence ()
8321             (case DFLT src
8322                   ((#x1) (set dst (and (reg h-intb) (const #xffff))))
8323                   ((#x2) (set dst (srl (reg h-intb) (const 16))))
8324                   ((#x3) (sequence ((HI tflag))
8325                                    (set tflag 0)
8326                                    (if (eq cbit 1) (set tflag (or tflag #x1)))
8327                                    (if (eq dbit 1) (set tflag (or tflag #x2)))
8328                                    (if (eq zbit 1) (set tflag (or tflag #x4)))
8329                                    (if (eq sbit 1) (set tflag (or tflag #x8)))
8330                                    (if (eq bbit 1) (set tflag (or tflag #x10)))
8331                                    (if (eq obit 1) (set tflag (or tflag #x20)))
8332                                    (if (eq ibit 1) (set tflag (or tflag #x40)))
8333                                    (if (eq ubit 1) (set tflag (or tflag #x80)))
8334                                    (set dst tflag)))
8335                   ((#x4) (set dst (reg h-isp)))
8336                   ((#x5) (set dst (reg h-sp)))
8337                   ((#x6) (set dst (reg h-sb)))
8338                   ((#x7) (set dst (reg h-fb)))
8339             )
8340   )
8341 )
8342
8343 (dni ldc16.imm16 "ldc #imm,dst" ((machine 16))
8344      ("ldc #${Imm-16-HI},${cr16}")
8345      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI)
8346      (ldc16-sem Imm-16-HI cr16)
8347      ())
8348
8349 (dni ldc16.dst "ldc src,dest" ((machine 16))
8350      ("ldc ${dst16-16-HI},${cr16}")
8351      (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI)
8352      (ldc16-sem dst16-16-HI cr16)
8353      ())
8354 ; ldc src,dest (m32c #4)
8355 (dni ldc32.src-cr1 "ldc src,dst" ((machine 32))
8356      ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}")
8357      (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI  (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32)
8358      (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32)
8359      ())
8360 ; ldc src,dest (m32c #5)
8361 (dni ldc32.src-cr2 "ldc src,dest" ((machine 32))
8362      ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}")
8363      (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32)
8364      (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32)
8365      ())
8366 ; ldc src,dest (m32c #6)
8367 (dni ldc32.src-cr3 "ldc src,dst" ((machine 32))
8368      ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}")
8369      (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32)
8370      (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32)
8371      ())
8372 ; ldc src,dest (m32c #1)
8373 (dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32))
8374      ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}")
8375      (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI)
8376      (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32)
8377      ())
8378 ; ldc src,dest (m32c #2)
8379 (dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32))
8380      ("ldc #${Dsp-16-u24},${cr2-32}")
8381      (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1)  cr2-32 Dsp-16-u24)
8382      (ldc32-cr2-sem Dsp-16-u24 cr2-32)
8383      ())
8384 ; ldc src,dest (m32c #3)
8385 (dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32))
8386      ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}")
8387      (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24)
8388      (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32)
8389      ())
8390
8391 (dni stc16.src "stc src,dest" ((machine 16))
8392      ("stc ${cr16},${dst16-16-HI}")
8393      (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI)
8394      (stc16-sem cr16 dst16-16-HI )
8395      ())
8396
8397 (dni stc16.pc "stc pc,dest" ((machine 16))
8398      ("stc pc,${dst16-16-HI}")
8399      (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI)
8400      (sequence () (set dst16-16-HI (reg h-pc)))
8401      ())
8402
8403 (dni stc32.src-cr1 "stc src,dst" ((machine 32))
8404      ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}")
8405      (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI  (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32)
8406      (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI )
8407      ())
8408
8409 (dni stc32.src-cr2 "stc src,dest" ((machine 32))
8410      ("stc ${cr2-32},${dst32-16-Unprefixed-SI}")
8411      (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32)
8412      (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI )
8413      ())
8414
8415 (dni stc32.src-cr3 "stc src,dst" ((machine 32))
8416      ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}")
8417      (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32)
8418      (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI )
8419      ())
8420
8421 ;-------------------------------------------------------------
8422 ; ldctx - load context
8423 ; stctx - store context
8424 ;-------------------------------------------------------------
8425
8426 ; ??? semantics
8427 (dni ldctx16 "ldctx abs16,abs24" ((machine 16))
8428      ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8429      (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8430      (nop)
8431      ())
8432 (dni ldctx32 "ldctx abs16,abs24" ((machine 32))
8433      ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8434      (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8435      (nop)
8436      ())
8437 (dni stctx16 "stctx abs16,abs24" ((machine 16))
8438      ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8439      (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8440      (nop)
8441      ())
8442 (dni stctx32 "stctx abs16,abs24" ((machine 32))
8443      ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8444      (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8445      (nop)
8446      ())
8447
8448 ;-------------------------------------------------------------
8449 ; lde - load from extra far data area (m16)
8450 ; ste - store to extra far data area (m16)
8451 ;-------------------------------------------------------------
8452
8453 ; A special variant of mem16 for lde and ste
8454 (define-pmacro (extra-mem16 mode address)
8455   (mem mode (and #xfffff address)))
8456
8457 (define-pmacro (lde-sem mode src1 dst)
8458   (set mode src1 (extra-mem16 mode dst))
8459 )
8460 (lde-dst QI .b 0 lde (f-0-4 #x7) (f-4-3 2) (f-8-4 #x8) lde-sem)
8461 (lde-dst HI .w 1 lde (f-0-4 #x7) (f-4-3 2) (f-8-4 #x8) lde-sem)
8462
8463 (define-pmacro (ste-sem mode src1 dst)
8464   (set (extra-mem16 mode dst) src1)
8465 )
8466 (ste-dst QI .b 0 ste (f-0-4 #x7) (f-4-3 2) (f-8-4 #x0) ste-sem)
8467 (ste-dst HI .w 1 ste (f-0-4 #x7) (f-4-3 2) (f-8-4 #x0) ste-sem)
8468
8469 ;-------------------------------------------------------------
8470 ; ldipl - load interrupt permission level
8471 ;-------------------------------------------------------------
8472
8473 ; ??? semantics
8474 ; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl
8475 (dni ldipl16.imm "ldipl #imm" ((machine 16))
8476      ("ldipl #${Imm-13-u3}")
8477      (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3)
8478      (nop)
8479      ())
8480 (dni ldipl32.imm "ldipl #imm" ((machine 32))
8481      ("ldipl #${Imm-13-u3}")
8482      (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3)
8483      (nop)
8484      ())
8485
8486
8487 ;-------------------------------------------------------------
8488 ; max - maximum value
8489 ;-------------------------------------------------------------
8490
8491 ; TODO check semantics for min -1,0
8492 (define-pmacro (max-sem mode src dst)
8493   (sequence ()
8494             (if (gt mode src dst)
8495                 (set mode dst src)))
8496 )
8497
8498 ; max.size:G #imm,dst
8499 (binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem)
8500 (binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem)
8501
8502 ; max.BW:G src,dst
8503 (binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem)
8504 (binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem)
8505
8506 ;-------------------------------------------------------------
8507 ; min - minimum value
8508 ;-------------------------------------------------------------
8509
8510 (define-pmacro (min-sem mode src dst)
8511   (sequence ()
8512          (if (lt mode src dst)
8513              (set mode dst src)))
8514 )
8515
8516 ; min.size:G #imm,dst
8517 (binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem)
8518 (binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem)
8519
8520 ; min.BW:G src,dst
8521 (binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem)
8522 (binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem)
8523
8524 ;-------------------------------------------------------------
8525 ; mov - move
8526 ;-------------------------------------------------------------
8527
8528 (define-pmacro (mov-sem mode src1 dst)
8529   (sequence ((mode result))
8530             (set result src1)
8531             (set-z-and-s result)
8532             (set mode dst src1))
8533 )
8534
8535 (define-pmacro (mov-dspsp-dst-sem mach mode src1 dst)
8536   (set dst (mem-mach mach mode (add sp src1)))
8537 )
8538
8539 (define-pmacro (mov-src-dspsp-sem mach mode src dst1)
8540   (set (mem-mach mach mode (add sp dst1)) src)
8541 )
8542
8543 (define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2)
8544   (dni (.sym mov16. size .S-imm- regn)
8545        (.str "mov." size ":S " imm "," regn)
8546        ((machine 16))
8547        (.str "mov." size "$S #${" imm "}," regn)
8548        (+ op1 op2 imm)
8549        (mov-sem mode imm (reg (.sym h- regn)))
8550        ())
8551 )
8552 ; mov.size:G #imm,dst (m16 #1 m32 #1)
8553 (binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem)
8554 ; mov.L:G #imm32,dst (m32 #2)
8555 (binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem)
8556 ; mov.BW:S #imm,dst2 (m32 #4)
8557 (binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem)
8558 (binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem)
8559 ; mov.b:S #imm8,dst3 (m16 #3)
8560 (binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem)
8561 ; mov.b:S #imm8,aN (m16 #4)
8562 (mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2))
8563 (mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA))
8564 (mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2))
8565 (mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA))
8566 ; mov.WL:S #imm,A0/A1 (m32 #5)
8567 (define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2)
8568   (dni (.sym mov32- sz - regn)
8569        (.str "mov." sz ":s" imm "," regn)
8570        ((machine 32))
8571        (.str "mov." sz "$S #${" imm "}," regn)
8572        (+ (f-0-4 op1) (f-4-4 op2) imm)
8573        (mov-sem mode imm (reg (.sym h- regn)))
8574        ())
8575 )
8576 (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC)
8577 (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD)
8578 (mov32-wl-s-defn SI l #xB Dsp-8-u24 a0 #xC)
8579 (mov32-wl-s-defn SI l #xB Dsp-8-u24 a1 #xD)
8580
8581 ; mov.size:Q #imm4,dst (m16 #2 m32 #3)
8582 (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8583 (binary-arith16-imm4-dst-defn QI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8584 (binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
8585 (binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
8586
8587 ; mov.BW:Z #0,dst (m16 #5 m32 #6)
8588 (dni mov16.b-Z-imm8-dst3
8589      "mov.b:Z #0,Dst16-3-S-8"
8590      ((machine 16))
8591      "mov.b$Z #0,${Dst16-3-S-8}"
8592      (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8)
8593      (mov-sem QI (const 0) Dst16-3-S-8)
8594      ())
8595 ; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem)
8596 (binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem)
8597 (binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem)
8598 ; mov.BW:G src,dst (m16 #6 m32 #7)
8599 (binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem)
8600 ; mov.B:S src2,a0/a1 (m16 #7)
8601 (dni (.sym mov 16 .b.S-An)
8602      (.str mov ".b:S src2,a[01]")
8603      ((machine 16))
8604      (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}")
8605      (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S)
8606      (mov-sem QI src16-2-S Dst16AnQI-S)
8607      ())
8608 (define-pmacro (mov16-b-s-an-defn op1 op2 op2c)
8609   (dni (.sym mov16.b.S- op1 - op2)
8610        (.str mov ".b:S " op1 "," op2)
8611        ((machine 16))
8612        (.str mov ".b$S " op1 "," op2)
8613        (+ (f-0-4 #x3) op2c)
8614        (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2)))
8615        ())
8616   )
8617 (mov16-b-s-an-defn r0l a1 (f-4-4 #x4))
8618 (mov16-b-s-an-defn r0h a0 (f-4-4 #x0))
8619
8620 ; mov.L:G src,dst (m32 #8)
8621 (binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem)
8622 ; mov.B:S r0l/r0h,dst2 (m16 #8)
8623 (dni (.sym mov 16 .b.S-Rn-An)
8624      (.str mov ".b:S r0[lh],src2")
8625      ((machine 16))
8626      (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}")
8627      (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S)
8628      (mov-sem QI src16-2-S Dst16RnQI-S)
8629      ())
8630
8631 ; mov.B.S src2,r0l/r0h (m16 #9)
8632 (binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem)
8633
8634 ; mov.BW:S src2,r0l/r0 (m32 #9)
8635 ; mov.BW:S src2,r1l/r1 (m32 #10)
8636 (define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2)
8637   (begin
8638     (dni (.sym mov32. sz - src - dst)
8639          (.str "mov." sz "src," dst)
8640          ((machine 32))
8641          (.str "mov."  sz "$S ${" (.sym src - mode) "}," dst)
8642          (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode))
8643          (mov-sem mode (.sym src - mode) (reg (.sym h- dst)))
8644          ())
8645     )
8646   )
8647 (mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4)
8648 (mov32-src-r w 1 HI dst32-2-S-16 r0 0 4)
8649 (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4)
8650 (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4)
8651 (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7)
8652 (mov32-src-r w 1 HI dst32-2-S-basic r1l 1 7)
8653 (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7)
8654 (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7)
8655 (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7)
8656 (mov32-src-r w 1 HI dst32-2-S-8 r1 1 7)
8657
8658 ; mov.BW:S r0l/r0,dst2 (m32 #11)
8659 (define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2)
8660   (begin
8661     (dni (.sym mov32. sz - src - dst)
8662          (.str "mov." sz "src," dst)
8663          ((machine 32))
8664          (.str "mov."  sz "$S " src ",${" (.sym dst - mode) "}")
8665          (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode))
8666          (mov-sem mode (reg (.sym h- src)) (.sym dst - mode))
8667          ())
8668     )
8669   )
8670 (mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0)
8671 (mov32-r-dest w 1 HI r0  dst32-2-S-16 0 0)
8672 (mov32-r-dest b 0 QI r0l dst32-2-S-8  0 0)
8673 (mov32-r-dest w 1 HI r0  dst32-2-S-8  0 0)
8674
8675 ; mov.L:S src,A0/A1    (m32 #12)
8676 (define-pmacro (mov32-src-a src dst dstcode opc1 opc2)
8677   (begin
8678     (dni (.sym mov32. sz - src - dst)
8679          (.str "mov." sz "src," dst)
8680          ((machine 32))
8681          (.str "mov.l" "$S ${" (.sym src - SI) "}," dst)
8682          (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode))
8683          (mov-sem SI (.sym src - SI) (reg (.sym h- dst)))
8684          ())
8685     )
8686   )
8687 (mov32-src-a dst32-2-S-16 a0 0 1 4)
8688 (mov32-src-a dst32-2-S-16 a1 1 1 4)
8689 (mov32-src-a dst32-2-S-8 a0 0 1 4)
8690 (mov32-src-a dst32-2-S-8 a1 1 1 4)
8691
8692 ; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13)
8693 ; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14)
8694 (mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem)
8695 (mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem)
8696
8697 ;-------------------------------------------------------------
8698 ; mova - move effective address
8699 ;-------------------------------------------------------------
8700
8701 (define-pmacro (mov16a-defn dst dstop dstcode)
8702   (dni (.sym mova16. src - dst)
8703        (.str "mova src," dst)
8704        ((machine 16))
8705        (.str "mova ${dst16-16-Mova-HI}," dst)
8706        (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode))
8707        (sequence () (set HI (reg dstop) dst16-16-Mova-HI))
8708        ())
8709 )
8710 (mov16a-defn r0 h-r0 0)
8711 (mov16a-defn r1 h-r1 1)
8712 (mov16a-defn r2 h-r2 2)
8713 (mov16a-defn r3 h-r3 3)
8714 (mov16a-defn a0 h-a0 4)
8715 (mov16a-defn a1 h-a1 5)
8716
8717 (define-pmacro (mov32a-defn dst dstop dstcode)
8718   (dni (.sym mova32. src - dst)
8719        (.str "mova src," dst)
8720        ((machine 32))
8721        (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst)
8722        (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode))
8723        (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI))
8724        ())
8725 )
8726 (mov32a-defn r2r0 h-r2r0 0)
8727 (mov32a-defn r3r1 h-r3r1 1)
8728 (mov32a-defn a0 h-a0 2)
8729 (mov32a-defn a1 h-a1 3)
8730
8731 ;-------------------------------------------------------------
8732 ; movDir - move nibble
8733 ;-------------------------------------------------------------
8734
8735 (define-pmacro (movdir-sem nib src dst)
8736   (sequence ((SI tmp))
8737             (case DFLT nib
8738                   ((0) (set dst (or (and dst #xf0) (and src #xf))))
8739                   ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4))))
8740                   ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4))))
8741                   ((3) (set dst (or (and dst #x0f) (and src #xf0))))
8742                   )
8743             )
8744   )
8745 ; movDir src,dst
8746 (define-pmacro (mov16dir-1-defn nib dircode dir)
8747   (dni (.sym mov nib 16 ".r0l-dst")
8748        (.str "mov" nib " r0l,dst")
8749        ((machine 16))
8750        (.str "mov" nib " r0l,${dst16-16-QI}")
8751        (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8752        (movdir-sem dircode (reg h-r0l) dst16-16-QI)
8753        ())
8754 )
8755 (mov16dir-1-defn ll 0 8)
8756 (mov16dir-1-defn lh 1 #xA)
8757 (mov16dir-1-defn hl 2 9)
8758 (mov16dir-1-defn hh 3 #xB)
8759 (define-pmacro (mov16dir-2-defn nib dircode dir)
8760   (dni (.sym mov nib 16 ".src-r0l")
8761        (.str "mov" nib " src,r0l")
8762        ((machine 16))
8763        (.str "mov" nib " ${dst16-16-QI},r0l")
8764        (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8765        (movdir-sem dircode dst16-16-QI (reg h-r0l))
8766        ())
8767 )
8768 (mov16dir-2-defn ll 0 0)
8769 (mov16dir-2-defn lh 1 2)
8770 (mov16dir-2-defn hl 2 1)
8771 (mov16dir-2-defn hh 3 3)
8772
8773 (define-pmacro (mov32dir-1-defn nib o1o0)
8774   (dni (.sym mov nib 32 ".r0l-dst")
8775        (.str "mov" nib " r0l,dst")
8776        ((machine 32))
8777        (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}")
8778        (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8779        (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI)
8780        ())
8781 )
8782 (mov32dir-1-defn ll 0)
8783 (mov32dir-1-defn lh 1)
8784 (mov32dir-1-defn hl 2)
8785 (mov32dir-1-defn hh 3)
8786 (define-pmacro (mov32dir-2-defn nib o1o0)
8787   (dni (.sym mov nib 32 ".src-r0l")
8788        (.str "mov" nib " src,r0l")
8789        ((machine 32))
8790        (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l")
8791        (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8792        (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l))
8793        ())
8794 )
8795 (mov32dir-2-defn ll 0)
8796 (mov32dir-2-defn lh 1)
8797 (mov32dir-2-defn hl 2)
8798 (mov32dir-2-defn hh 3)
8799
8800 ;-------------------------------------------------------------
8801 ; movx - move extend sign (m32)
8802 ;-------------------------------------------------------------
8803
8804 (define-pmacro (movx-sem mode src dst)
8805   (sequence ((SI source) (SI result))
8806             (set SI result src)
8807             (set-z-and-s result)
8808             (set dst result))
8809 )
8810
8811 ; movx #imm,dst
8812 (binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem)
8813
8814 ;-------------------------------------------------------------
8815 ; mul - multiply
8816 ;-------------------------------------------------------------
8817
8818 (define-pmacro (mul-sem mode src1 dst)
8819   (sequence ((mode result))
8820             (set obit (add-oflag mode src1 dst 0))
8821             (set result (mul mode src1 dst))
8822             (set dst result))
8823 )
8824
8825 ; mul.BW #imm,dst
8826 (binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem)
8827 ; mul.BW src,dst
8828 (binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem)
8829
8830 ;-------------------------------------------------------------
8831 ; mulex - multiple extend sign (m32)
8832 ;-------------------------------------------------------------
8833
8834 ; mulex src,dst
8835 ; (dni mulex-absolute-indirect "mulex [src]" ((machine 32))
8836 ;      ("mulex ${dst32-24-absolute-indirect-HI}")
8837 ;      (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
8838 ;      (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI)))
8839 ;      ())
8840 (dni mulex "mulex src" ((machine 32))
8841      ("mulex ${dst32-16-Unprefixed-Mulex-HI}")
8842      (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
8843      (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI)))
8844      ())
8845 ; (dni mulex-indirect "mulex [src]" ((machine 32))
8846 ;      ("mulex ${dst32-24-indirect-HI}")
8847 ;      (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
8848 ;      (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI)))
8849 ;      ())
8850
8851 ;-------------------------------------------------------------
8852 ; mulu - multiply unsigned
8853 ;-------------------------------------------------------------
8854
8855 (define-pmacro (mulu-sem mode src1 dst)
8856   (sequence ((mode result))
8857             (set obit (add-oflag mode src1 dst 0))
8858             (set result (mul mode src1 dst))
8859             (set dst result))
8860 )
8861
8862 ; mulu.BW #imm,dst
8863 (binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem)
8864 ; mulu.BW src,dst
8865 (binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem)
8866
8867 ;-------------------------------------------------------------
8868 ; neg - twos complement
8869 ;-------------------------------------------------------------
8870
8871 (define-pmacro (neg-sem mode dst)
8872   (sequence ((mode result))
8873             (set result (neg mode dst))
8874             (set-z-and-s result)
8875             (set dst result))
8876 )
8877
8878 ; neg.BW:G
8879 (unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem)
8880
8881 ;-------------------------------------------------------------
8882 ; not - twos complement
8883 ;-------------------------------------------------------------
8884
8885 (define-pmacro (not-sem mode dst)
8886   (sequence ((mode result))
8887             (set result (not mode dst))
8888             (set-z-and-s result)
8889             (set dst result))
8890 )
8891
8892 ; not.BW:G
8893 (unary-insn not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem)
8894
8895 ;-------------------------------------------------------------
8896 ; nop
8897 ;-------------------------------------------------------------
8898
8899 (dni nop16
8900      "nop"
8901      ((machine 16))
8902      "nop"
8903      (+ (f-0-4 #x0) (f-4-4 #x4))
8904      (nop)
8905      ())
8906
8907 (dni nop32
8908      "nop"
8909      ((machine 32))
8910      "nop"
8911      (+ (f-0-4 #xD) (f-4-4 #xE))
8912      (nop)
8913      ())
8914
8915 ;-------------------------------------------------------------
8916 ; or - logical or
8917 ;-------------------------------------------------------------
8918
8919 (define-pmacro (or-sem mode src1 dst)
8920   (sequence ((mode result))
8921             (set result (or mode src1 dst))
8922             (set-z-and-s result)
8923             (set dst result))
8924 )
8925
8926 ; or.BW #imm,dst (m16 #1 m32 #1)
8927 (binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem)
8928 ; or.b:S #imm8,dst3 (m16 #2 m32 #2)
8929 (binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem)
8930 (binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem)
8931 (binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem)
8932 ; or.BW src,dst (m16 #3 m32 #3)
8933 (binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem)
8934
8935 ;-------------------------------------------------------------
8936 ; pop - restore register/memory
8937 ;-------------------------------------------------------------
8938
8939 ; TODO future: split this into .b and .w semantics
8940 (define-pmacro (pop-sem-mach mach mode dst)
8941   (sequence ((mode b_or_w) (SI length))
8942             (set b_or_w -1)
8943             (set b_or_w (srl b_or_w #x8))
8944             (if (eq b_or_w #x0)
8945                 (set length 1)    ; .b
8946                 (set length 2))   ; .w
8947
8948             (case DFLT length
8949                   ((1) (set dst (mem-mach mach QI (reg h-sp))))
8950                   ((2) (set dst (mem-mach mach HI (reg h-sp)))))
8951             (set (reg h-sp) (add (reg h-sp) length))
8952             )
8953 )
8954
8955 (define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest))
8956 (define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest))
8957
8958 ; pop.BW:G (m16 #1)
8959 (unary-insn-mach 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16)
8960 ; pop.BW:G (m32 #1)
8961 (unary-insn-mach 32 pop #xB #x2 #xF pop-sem32)
8962
8963 ; pop.b:S r0l/r0h
8964 (dni pop16.b-s-rn  "pop.b:S r0[lh]" ((machine 16))
8965      "pop.b$S ${Rn16-push-S-anyof}"
8966      (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2))
8967      (pop-sem16 QI Rn16-push-S-anyof)
8968      ())
8969 ; pop.w:S a0/a1
8970 (dni pop16.b-s-an  "pop.w:S a[01]" ((machine 16))
8971      "pop.w$S ${An16-push-S-anyof}"
8972      (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2))
8973      (pop-sem16 HI An16-push-S-anyof)
8974      ())
8975
8976 ;-------------------------------------------------------------
8977 ; popc - pop control register
8978 ; pushc - push control register
8979 ;-------------------------------------------------------------
8980
8981 (define-pmacro (popc32-cr1-sem mode dst)
8982   (sequence ()
8983             (case DFLT dst
8984                   ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp))))
8985                   ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp))))
8986                   ((#x2) (sequence ((HI tflag))
8987                                    (set tflag (mem32 mode (reg h-sp)))
8988                                    (if (and tflag #x1) (set cbit 1))
8989                                    (if (and tflag #x2) (set dbit 1))
8990                                    (if (and tflag #x4) (set zbit 1))
8991                                    (if (and tflag #x8) (set sbit 1))
8992                                    (if (and tflag #x10) (set bbit 1))
8993                                    (if (and tflag #x20) (set obit 1))
8994                                    (if (and tflag #x40) (set ibit 1))
8995                                    (if (and tflag #x80) (set ubit 1))))
8996                   ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp))))
8997                   ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp))))
8998                   ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp))))
8999                   ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp))))
9000                   ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp))))
9001             )
9002             (set (reg h-sp) (add (reg h-sp) 2))
9003   )
9004 )
9005 (define-pmacro (popc32-cr2-sem mode dst)
9006   (sequence ()
9007             (case DFLT dst
9008                   ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp))))
9009                   ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp))))
9010                   ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp))))
9011                   ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp))))
9012                   ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp))))
9013             )
9014             (set (reg h-sp) (add (reg h-sp) 4))
9015   )
9016 )
9017 (define-pmacro (popc16-sem mode dst)
9018   (sequence ()
9019             (case DFLT dst
9020                   ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000)
9021                                                (mem16 mode (reg h-sp)))))
9022                   ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000)
9023                                                (mem16 mode (reg h-sp)))))
9024                   ((#x3) (sequence ((HI tflag))
9025                                    (set tflag (mem16 mode (reg h-sp)))
9026                                    (if (and tflag #x1) (set cbit 1))
9027                                    (if (and tflag #x2) (set dbit 1))
9028                                    (if (and tflag #x4) (set zbit 1))
9029                                    (if (and tflag #x8) (set sbit 1))
9030                                    (if (and tflag #x10) (set bbit 1))
9031                                    (if (and tflag #x20) (set obit 1))
9032                                    (if (and tflag #x40) (set ibit 1))
9033                                    (if (and tflag #x80) (set ubit 1))))
9034                   ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp))))
9035                   ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp))))
9036                   ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp))))
9037                   ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp))))
9038             )
9039             (set (reg h-sp) (add (reg h-sp) 2))
9040   )
9041 )
9042 ; popc dest (m16c #1)
9043 (dni popc16.imm16 "popc dst" ((machine 16))
9044      ("popc ${cr16}")
9045      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16)
9046      (popc16-sem HI cr16)
9047      ())
9048 ; popc dest (m32c #1)
9049 (dni popc32.imm16-cr1 "popc dst" ((machine 32))
9050      ("popc ${cr1-Unprefixed-32}")
9051      (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9052      (popc32-cr1-sem HI cr1-Unprefixed-32)
9053      ())
9054 ; popc dest (m32c #2)
9055 (dni popc32.imm16-cr2 "popc dst" ((machine 32))
9056      ("popc ${cr2-32}")
9057      (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32)
9058      (popc32-cr2-sem SI cr2-32)
9059      ())
9060
9061 (define-pmacro (pushc32-cr1-sem mode dst)
9062   (sequence ()
9063             (set (reg h-sp) (sub (reg h-sp) 2))
9064             (case DFLT dst
9065                   ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0)))
9066                   ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1)))
9067                   ((#x2) (sequence ((HI tflag))
9068                                    (set tflag 0)
9069                                    (if (eq cbit 1) (set tflag (or tflag #x1)))
9070                                    (if (eq dbit 1) (set tflag (or tflag #x2)))
9071                                    (if (eq zbit 1) (set tflag (or tflag #x4)))
9072                                    (if (eq sbit 1) (set tflag (or tflag #x8)))
9073                                    (if (eq bbit 1) (set tflag (or tflag #x10)))
9074                                    (if (eq obit 1) (set tflag (or tflag #x20)))
9075                                    (if (eq ibit 1) (set tflag (or tflag #x40)))
9076                                    (if (eq ubit 1) (set tflag (or tflag #x80)))
9077                                    (set (mem32 mode (reg h-sp)) tflag)))
9078                   ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf)))
9079                   ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0)))
9080                   ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1)))
9081                   ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0)))
9082                   ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1)))
9083             )
9084   )
9085 )
9086 (define-pmacro (pushc32-cr2-sem mode dst)
9087   (sequence ()
9088             (set (reg h-sp) (sub (reg h-sp) 4))
9089             (case DFLT dst
9090                   ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb)))
9091                   ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp)))
9092                   ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb)))
9093                   ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb)))
9094                   ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp)))
9095             )
9096   )
9097 )
9098 (define-pmacro (pushc16-sem mode dst)
9099   (sequence ()
9100             (set (reg h-sp) (sub (reg h-sp) 2))
9101             (case DFLT dst
9102                   ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff)))
9103                   ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000)))
9104                   ((#x3) (sequence ((HI tflag))
9105                                    (if (eq cbit 1) (set tflag (or tflag #x1)))
9106                                    (if (eq dbit 1) (set tflag (or tflag #x2)))
9107                                    (if (eq zbit 1) (set tflag (or tflag #x4)))
9108                                    (if (eq sbit 1) (set tflag (or tflag #x8)))
9109                                    (if (eq bbit 1) (set tflag (or tflag #x10)))
9110                                    (if (eq obit 1) (set tflag (or tflag #x20)))
9111                                    (if (eq ibit 1) (set tflag (or tflag #x40)))
9112                                    (if (eq ubit 1) (set tflag (or tflag #x80)))
9113                                    (set (mem16 mode (reg h-sp)) tflag)))
9114
9115                   ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp)))
9116                   ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp)))
9117                   ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb)))
9118                   ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb)))
9119             )
9120   )
9121 )
9122 ; pushc src (m16c)
9123 (dni pushc16.imm16 "pushc dst" ((machine 16))
9124      ("pushc ${cr16}")
9125      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16)
9126      (pushc16-sem HI cr16)
9127      ())
9128 ; pushc src (m32c #1)
9129 (dni pushc32.imm16-cr1 "pushc dst" ((machine 32))
9130      ("pushc ${cr1-Unprefixed-32}")
9131      (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9132      (pushc32-cr1-sem HI cr1-Unprefixed-32)
9133      ())
9134 ; pushc src (m32c #2)
9135 (dni pushc32.imm16-cr2 "pushc dst" ((machine 32))
9136      ("pushc ${cr2-32}")
9137      (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32)
9138      (pushc32-cr2-sem SI cr2-32)
9139      ())
9140
9141 ;-------------------------------------------------------------
9142 ; popm - pop multiple
9143 ; pushm - push multiple
9144 ;-------------------------------------------------------------
9145
9146 (define-pmacro (popm-sem machine dst)
9147      (sequence ((SI addrlen))
9148                (if (eq machine 16)
9149                    (set addrlen 2)
9150                    (set addrlen 4))
9151                (if (and dst 1)
9152                    (sequence () (set R0 (mem-mach machine HI (reg h-sp)))
9153                              (set (reg h-sp) (add (reg h-sp) 2))))
9154                (if (and dst 2)
9155                    (sequence () (set R1 (mem-mach machine HI (reg h-sp)))
9156                              (set (reg h-sp) (add (reg h-sp) 2))))
9157                (if (and dst 4)
9158                    (sequence () (set R2 (mem-mach machine HI (reg h-sp)))
9159                              (set (reg h-sp) (add (reg h-sp) 2))))
9160                (if (and dst 8)
9161                    (sequence () (set R3 (mem-mach machine HI (reg h-sp)))
9162                              (set (reg h-sp) (add (reg h-sp) 2))))
9163                (if (and dst 16)
9164                    (sequence () (set A0 (mem-mach machine HI (reg h-sp)))
9165                              (set (reg h-sp) (add (reg h-sp) addrlen))))
9166                (if (and dst 32)
9167                    (sequence () (set A1 (mem-mach machine HI (reg h-sp)))
9168                              (set (reg h-sp) (add (reg h-sp) addrlen))))
9169                (if (and dst 64)
9170                    (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp)))
9171                              (set (reg h-sp) (add (reg h-sp) addrlen))))
9172                (if (eq dst 128)
9173                    (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp)))
9174                              (set (reg h-sp) (add (reg h-sp) addrlen))))
9175                )
9176 )
9177
9178 (define-pmacro (pushm-sem machine dst)
9179      (sequence ((SI count) (SI addrlen))
9180                (if (eq machine 16)
9181                    (set addrlen 2)
9182                    (set addrlen 4))
9183                (if (eq dst 1)
9184                    (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9185                              (set (mem-mach machine HI (reg h-sp)) (reg h-fb))))
9186                (if (and dst 2)
9187                    (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9188                              (set (mem-mach machine HI (reg h-sp)) (reg h-sb))))
9189                (if (and dst 4)
9190                    (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9191                              (set (mem-mach machine HI (reg h-sp)) A1)))
9192                (if (and dst 8)
9193                    (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9194                              (set (mem-mach machine HI (reg h-sp)) A0)))
9195                (if (and dst 16)
9196                    (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9197                              (set (mem-mach machine HI (reg h-sp)) R3)))
9198                (if (and dst 32)
9199                    (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9200                              (set (mem-mach machine HI (reg h-sp)) R2)))
9201                (if (and dst 64)
9202                    (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9203                              (set (mem-mach machine HI (reg h-sp)) R1)))
9204                (if (and dst 128)
9205                    (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9206                              (set (mem-mach machine HI (reg h-sp)) R0)))
9207                )
9208 )
9209
9210 (dni popm16 "popm regs" ((machine 16))
9211      ("popm ${Regsetpop}")
9212      (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop)
9213      (popm-sem 16 Regsetpop)
9214      ())
9215 (dni pushm16 "pushm regs" ((machine 16))
9216      ("pushm ${Regsetpush}")
9217      (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush)
9218      (pushm-sem 16 Regsetpush)
9219      ())
9220 (dni popm "popm regs" ((machine 32))
9221      ("popm ${Regsetpop}")
9222      (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop)
9223      (popm-sem 32 Regsetpop)
9224      ())
9225 (dni pushm "pushm regs" ((machine 32))
9226      ("pushm ${Regsetpush}")
9227      (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush)
9228      (pushm-sem 32 Regsetpush)
9229      ())
9230
9231 ;-------------------------------------------------------------
9232 ; push - Save register/memory/immediate data
9233 ;-------------------------------------------------------------
9234
9235 ; TODO future: split this into .b and .w semantics
9236 (define-pmacro (push-sem-mach mach mode dst)
9237   (sequence ((mode b_or_w) (SI length))
9238             (set b_or_w -1)
9239             (set b_or_w (srl b_or_w #x8))
9240             (if (eq b_or_w #x0)
9241                 (set length 1)    ; .b
9242                 (if (eq b_or_w #xff)
9243                     (set length 2)   ; .w
9244                     (set length 4))) ; .l
9245             (set (reg h-sp) (sub (reg h-sp) length))
9246             (case DFLT length
9247                   ((1) (set (mem-mach mach QI (reg h-sp)) dst))
9248                   ((2) (set (mem-mach mach HI (reg h-sp)) dst))
9249                   ((4) (set (mem-mach mach SI (reg h-sp)) dst)))
9250             )
9251   )
9252
9253 (define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst))
9254 (define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst))
9255
9256 ; push.BW:G imm (m16 #1 m32 #1)
9257 (dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16))
9258      ("push.b$G #${Imm-16-QI}")
9259      (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI)
9260      (push-sem16 QI Imm-16-QI)
9261      ())
9262
9263 (dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16))
9264      ("push.w$G #${Imm-16-HI}")
9265      (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI)
9266      (push-sem16 HI Imm-16-HI)
9267      ())
9268
9269 (dni push32.b.imm "push.w #Imm-8-QI" ((machine 32))
9270      ("push.b #Imm-8-QI")
9271      (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI)
9272      (push-sem32 QI Imm-8-QI)
9273      ())
9274
9275 (dni push32.w.imm "push.w #Imm-8-HI" ((machine 32))
9276      ("push.w #${Imm-8-HI}")
9277      (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI)
9278      (push-sem32 HI Imm-8-HI)
9279      ())
9280
9281 ; push.BW:G src (m16 #2)
9282 (unary-insn-mach 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16)
9283 ; push.BW:G src (m32 #2)
9284 (unary-insn-mach 32 push #xC #x0 #xE push-sem32)
9285
9286
9287 ; push.b:S r0l/r0h (m16 #3)
9288 (dni push16.b-s-rn  "push.b:S r0[lh]" ((machine 16))
9289      "push.b$S ${Rn16-push-S-anyof}"
9290      (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2))
9291      (push-sem16 QI Rn16-push-S-anyof)
9292      ())
9293 ; push.w:S a0/a1 (m16 #4)
9294 (dni push16.b-s-an  "push.w:S a[01]" ((machine 16))
9295      "push.w$S ${An16-push-S-anyof}"
9296      (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2))
9297      (push-sem16 HI An16-push-S-anyof)
9298      ())
9299
9300 ; push.l imm32 (m32 #3)
9301 (dni push32.l.imm "push.l #Imm-16-SI" ((machine 32))
9302      ("push.l #${Imm-16-SI}")
9303      (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI)
9304      (push-sem32 SI Imm-16-SI)
9305      ())
9306 ; push.l src (m32 #4)
9307 (unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32)
9308
9309 ;-------------------------------------------------------------
9310 ; pusha - push effective address
9311 ;------------------------------------------------------------
9312
9313 (define-pmacro (push16a-sem mode dst)
9314   (sequence ()
9315             (set (reg h-sp) (sub (reg h-sp) 2))
9316             (set (mem16 HI (reg h-sp)) dst))
9317 )
9318 (define-pmacro (push32a-sem mode dst)
9319   (sequence ()
9320             (set (reg h-sp) (sub (reg h-sp) 4))
9321             (set (mem32 SI (reg h-sp)) dst))
9322 )
9323 (unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem)
9324 (unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem)
9325
9326 ;-------------------------------------------------------------
9327 ; reit - return from interrupt
9328 ;-------------------------------------------------------------
9329
9330 ; ??? semantics
9331 (dni reit16 "REIT" ((machine 16))
9332      ("reit")
9333      (+ (f-0-4 #xF) (f-4-4 #xB))
9334      (nop)
9335      ())
9336 (dni reit32 "REIT" ((machine 32))
9337      ("reit")
9338      (+ (f-0-4 9) (f-4-4 #xE))
9339      (nop)
9340      ())
9341
9342 ;-------------------------------------------------------------
9343 ; rmpa - repeat multiple and addition
9344 ;-------------------------------------------------------------
9345
9346 ; TODO semantics
9347 (dni rmpa16.b "rmpa.size" ((machine 16))
9348      ("rmpa.b")
9349      (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1))
9350      (nop)
9351      ())
9352 (dni rmpa16.w "rmpa.size" ((machine 16))
9353      ("rmpa.w")
9354      (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1))
9355      (nop)
9356      ())
9357 (dni rmpa32.b "rmpa.size" ((machine 32))
9358      ("rmpa.b")
9359      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3))
9360      (nop)
9361      ())
9362
9363 (dni rmpa32.w "rmpa.size" ((machine 32))
9364      ("rmpa.w")
9365      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3))
9366      (nop)
9367      ())
9368
9369 ;-------------------------------------------------------------
9370 ; rolc - rotate left with carry
9371 ;-------------------------------------------------------------
9372
9373 ; TODO check semantics
9374 ; TODO future: split this into .b and .w semantics
9375 (define-pmacro (rolc-sem mode dst)
9376   (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask))
9377             (set b_or_w -1)
9378             (set b_or_w (srl b_or_w #x8))
9379             (if (eq b_or_w #x0)
9380                 (set mask #x8000)      ; .b
9381                 (set mask #x80000000)) ; .w
9382             (set ocbit cbit)
9383             (set cbit (and dst mask))
9384             (set result (sll mode dst 1))
9385             (set result (or result ocbit))
9386             (set-z-and-s result)
9387             (set dst result))
9388 )
9389 ; rolc.BW src,dst
9390 (unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem)
9391
9392 ;-------------------------------------------------------------
9393 ; rorc - rotate right with carry
9394 ;-------------------------------------------------------------
9395
9396 ; TODO check semantics
9397 ; TODO future: split this into .b and .w semantics
9398 (define-pmacro (rorc-sem mode dst)
9399   (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt))
9400             (set b_or_w -1)
9401             (set b_or_w (srl b_or_w #x8))
9402             (if (eq b_or_w #x0)
9403                 (sequence () (set mask #x7fff) (set shamt 15))     ; .b
9404                 (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w
9405             (set ocbit cbit)
9406             (set cbit (and dst #x1))
9407             (set result (srl mode dst (const 1)))
9408             (set result (or (and result mask) (sll ocbit shamt)))
9409             (set-z-and-s result)
9410             (set dst result))
9411 )
9412 ; rorc.BW src,dst
9413 (unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem)
9414
9415 ;-------------------------------------------------------------
9416 ; rot - rotate
9417 ;-------------------------------------------------------------
9418
9419 ; TODO future: split this into .b and .w semantics
9420 (define-pmacro (rot-1-sem mode src1 dst)
9421   (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift))
9422             (case DFLT src1
9423                   ((#x0) (set shift 1))
9424                   ((#x1) (set shift 2))
9425                   ((#x2) (set shift 3))
9426                   ((#x3) (set shift 4))
9427                   ((#x4) (set shift 5))
9428                   ((#x5) (set shift 6))
9429                   ((#x6) (set shift 7))
9430                   ((#x7) (set shift 8))
9431                   ((-8) (set shift -1))
9432                   ((-7) (set shift -2))
9433                   ((-6) (set shift -3))
9434                   ((-5) (set shift -4))
9435                   ((-4) (set shift -5))
9436                   ((-3) (set shift -6))
9437                   ((-2) (set shift -7))
9438                   ((-1) (set shift -8))
9439                   (else (set shift 0))
9440                   )
9441             (set b_or_w -1)
9442             (set b_or_w (srl b_or_w #x8))
9443             (if (eq b_or_w #x0)
9444                 (set mask #x7fff)     ; .b
9445                 (set mask #x7fffffff)) ; .w
9446             (set tmp dst)
9447             (if (gt mode shift 0)
9448                 (sequence ()
9449                           (set tmp (rol mode tmp shift))
9450                           (set cbit (and tmp #x1)))
9451                 (sequence ()
9452                           (set tmp (ror mode tmp (mul shift -1)))
9453                           (set cbit (and tmp mask))))
9454             (set-z-and-s tmp)
9455             (set dst tmp))
9456 )
9457 (define-pmacro (rot-2-sem mode dst)
9458   (sequence ((mode tmp) (mode b_or_w) (USI mask))
9459             (set b_or_w -1)
9460             (set b_or_w (srl b_or_w #x8))
9461             (if (eq b_or_w #x0)
9462                 (set mask #x7fff)     ; .b
9463                 (set mask #x7fffffff)) ; .w
9464             (set tmp dst)
9465             (if (gt mode (reg h-r1h) 0)
9466                 (sequence ()
9467                           (set tmp (rol mode tmp (reg h-r1h)))
9468                           (set cbit (and tmp #x1)))
9469                 (sequence ()
9470                           (set tmp (ror mode tmp (reg h-r1h)))
9471                           (set cbit (and tmp mask))))
9472             (set-z-and-s tmp)
9473             (set dst tmp))
9474 )
9475
9476 ; rot.BW #imm4,dst
9477 (binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9478 (binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9479 (binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem)
9480 (binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem)
9481 ; rot.BW src,dst
9482
9483 (dni rot16.b-dst "rot r1h,dest" ((machine 16))
9484      ("rot.b r1h,${dst16-16-HI}")
9485      (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-HI)
9486      (rot-2-sem QI dst16-16-HI)
9487      ())
9488 (dni rot16.w-dst "rot r1h,dest" ((machine 16))
9489      ("rot.w r1h,${dst16-16-HI}")
9490      (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI)
9491      (rot-2-sem HI dst16-16-HI)
9492      ())
9493
9494 (dni rot32.b-dst "rot r1h,dest" ((machine 32))
9495      ("rot.b r1h,${dst32-16-Unprefixed-SI}")
9496      (+ (f-0-4 #xA) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
9497      (rot-2-sem QI dst32-16-Unprefixed-SI)
9498      ())
9499 (dni rot32.w-dst "rot r1h,dest" ((machine 32))
9500      ("rot.w r1h,${dst32-16-Unprefixed-SI}")
9501      (+ (f-0-4 #xA) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
9502      (rot-2-sem HI dst32-16-Unprefixed-SI)
9503      ())
9504
9505 ;-------------------------------------------------------------
9506 ; rts - return from subroutine
9507 ;-------------------------------------------------------------
9508
9509 (define-pmacro (rts16-sem)
9510   (sequence ((SI tpc))
9511             (set tpc (mem16 HI (reg h-sp)))
9512             (set (reg h-sp) (add (reg h-sp) 2))
9513             (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16)))
9514             (set (reg h-sp) (add (reg h-sp) 1))
9515             (set pc tpc)
9516             )
9517 )
9518 (define-pmacro (rts32-sem)
9519   (sequence ((SI tpc))
9520             (set tpc (mem32 HI (reg h-sp)))
9521             (set (reg h-sp) (add (reg h-sp) 2))
9522             (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16)))
9523             (set (reg h-sp) (add (reg h-sp) 2))
9524             (set pc tpc)
9525             )
9526 )
9527
9528 (dni rts16 "rts" ((machine 16))
9529      ("rts")
9530      (+ (f-0-4 #xF) (f-4-4 3))
9531      (rts16-sem)
9532      ())
9533
9534 (dni rts32 "rts" ((machine 32))
9535      ("rts")
9536      (+ (f-0-4 #xD) (f-4-4 #xF))
9537      (rts32-sem)
9538      ())
9539
9540 ;-------------------------------------------------------------
9541 ; sbb - subtract with borrow
9542 ;-------------------------------------------------------------
9543
9544 (define-pmacro (sbb-sem mode src dst)
9545   (sequence ((mode result))
9546             (set result (subc mode dst src cbit))
9547             (set obit (add-oflag mode dst src cbit))
9548             (set cbit (add-oflag mode dst src cbit))
9549             (set-z-and-s result)
9550             (set dst result))
9551 )
9552
9553 ; sbb.size:G #imm,dst
9554 (binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9555 (binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9556 (binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem)
9557 (binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem)
9558
9559 ; sbb.BW:G src,dst
9560 (binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9561 (binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9562 (binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem)
9563 (binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem)
9564
9565 ;-------------------------------------------------------------
9566 ; sbjnz - subtract then jump on not zero
9567 ;-------------------------------------------------------------
9568
9569 (define-pmacro (sub-jnz-sem mode src dst label)
9570   (sequence ((mode result))
9571             (set result (sub mode dst src))
9572             (set dst result)
9573             (if (ne result 0)
9574                 (set pc label)))
9575 )
9576
9577 ; sbjnz.size #imm4,dst,label
9578 (arith-jnz-imm4-dst sbjnz (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem)
9579
9580 ;-------------------------------------------------------------
9581 ; sccnd - store condition on condition (m32)
9582 ;-------------------------------------------------------------
9583
9584 (define-pmacro (sccnd-sem cnd dst)
9585   (sequence ()
9586             (set dst 0)
9587             (case DFLT cnd
9588                   ((#x00) (if (not cbit) (set dst 1))) ;ltu nc
9589                   ((#x01) (if (or cbit zbit) (set dst 1))) ;leu
9590                   ((#x02) (if (not zbit) (set dst 1))) ;ne nz
9591                   ((#x03) (if (not sbit) (set dst 1))) ;pz
9592                   ((#x04) (if (not obit) (set dst 1))) ;no
9593                   ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt
9594                   ((#x06) (if (xor sbit obit) (set dst 1))) ;ge
9595                   ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c
9596                   ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu
9597                   ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z
9598                   ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n
9599                   ((#x0c) (if (trunc BI obit) (set dst 1))) ;o
9600                   ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le
9601                   ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt
9602                   )
9603         )
9604   )
9605
9606 ; scCND dst
9607 (dni sccnd
9608      "sccnd dst"
9609      ((machine 32))
9610      "sc$sccond32 ${dst32-16-Unprefixed-HI}"
9611      (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32)
9612      (sccnd-sem sccond32 dst32-16-Unprefixed-HI)
9613      ())
9614
9615 ;-------------------------------------------------------------
9616 ; scmpu - string compare unequal (m32)
9617 ;-------------------------------------------------------------
9618
9619 ; TODO semantics
9620 (dni scmpu.b "scmpu.b" ((machine 32))
9621      ("scmpu.b")
9622      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3))
9623      (c-call VOID "scmpu_QI_semantics")
9624      ())
9625
9626 (dni scmpu.w "scmpu.w" ((machine 32))
9627      ("scmpu.w")
9628      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3))
9629      (c-call VOID "scmpu_HI_semantics")
9630      ())
9631
9632 ;-------------------------------------------------------------
9633 ; sha - shift arithmetic
9634 ;-------------------------------------------------------------
9635
9636 ; TODO future: split this into .b and .w semantics
9637 (define-pmacro (sha-sem mode src1 dst)
9638   (sequence ((mode result)(mode shift)(mode shmode))
9639              (case DFLT src1
9640                    ((#x0) (set shift 1))
9641                    ((#x1) (set shift 2))
9642                    ((#x2) (set shift 3))
9643                    ((#x3) (set shift 4))
9644                    ((#x4) (set shift 5))
9645                    ((#x5) (set shift 6))
9646                    ((#x6) (set shift 7))
9647                    ((#x7) (set shift 8))
9648                    ((-8) (set shift -1))
9649                    ((-7) (set shift -2))
9650                    ((-6) (set shift -3))
9651                    ((-5) (set shift -4))
9652                    ((-4) (set shift -5))
9653                    ((-3) (set shift -6))
9654                    ((-2) (set shift -7))
9655                    ((-1) (set shift -8))
9656                    (else (set shift 0))
9657                    )
9658              (set shmode -1)
9659              (set shmode (srl shmode #x8))
9660              (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1))))
9661              (if (gt mode shift 0) (set result (sll mode dst shift)))
9662              (if (eq shmode #x0) ; QI
9663                  (sequence
9664                    ((mode cbitamt))
9665                     (if (lt mode shift #x0)
9666                         (set cbitamt (sub #x8 shift)) ; sra
9667                         (set cbitamt (sub shift 1)))  ; sll
9668                     (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9669                     (set obit (ne (and dst #x80) (and result #x80)))
9670                     ))
9671              (if (eq shmode #xff) ; HI
9672                  (sequence
9673                    ((mode cbitamt))
9674                     (if (lt mode shift #x0)
9675                         (set cbitamt (sub 16 shift)) ; sra
9676                         (set cbitamt (sub shift 1))) ; sll
9677                     (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9678                     (set obit (ne (and dst #x8000) (and result #x8000)))
9679                     ))
9680             (set-z-and-s result)
9681             (set dst result))
9682 )
9683 (define-pmacro (shar1h-sem mode dst)
9684   (sequence ((mode result)(mode shmode))
9685              (set shmode -1)
9686              (set shmode (srl shmode #x8))
9687              (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h))))
9688              (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9689              (if (eq shmode #x0) ; QI
9690                  (sequence
9691                    ((mode cbitamt))
9692                     (if (lt mode (reg h-r1h) #x0)
9693                         (set cbitamt (sub #x8 (reg h-r1h))) ; sra
9694                         (set cbitamt (sub (reg h-r1h) 1)))  ; sll
9695                     (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9696                     (set obit (ne (and dst #x80) (and result #x80)))
9697                     ))
9698              (if (eq shmode #xff) ; HI
9699                  (sequence
9700                    ((mode cbitamt))
9701                     (if (lt mode (reg h-r1h) #x0)
9702                         (set cbitamt (sub 16 (reg h-r1h))) ; sra
9703                         (set cbitamt (sub (reg h-r1h) 1))) ; sll
9704                     (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9705                     (set obit (ne (and dst #x8000) (and result #x8000)))
9706                     ))
9707             (set-z-and-s result)
9708             (set dst result))
9709 )
9710 ; sha.BW #imm4,dst (m16 #1 m32 #1)
9711 (binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9712 (binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9713 (binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem)
9714 (binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem)
9715 ; sha.BW r1h,dst (m16 #2 m32 #3)
9716 (dni sha16.b-dst "sha.b r1h,dest" ((machine 16))
9717      ("sha.b r1h,${dst16-16-QI}")
9718      (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI)
9719      (shar1h-sem HI dst16-16-QI)
9720      ())
9721 (dni sha16.w-dst "sha.w r1h,dest" ((machine 16))
9722      ("sha.w r1h,${dst16-16-HI}")
9723      (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI)
9724      (shar1h-sem HI dst16-16-HI)
9725      ())
9726 (dni sha32.b-dst "sha.b r1h,dest" ((machine 32))
9727      ("sha.b r1h,${dst32-16-Unprefixed-QI}")
9728      (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9729      (shar1h-sem QI dst32-16-Unprefixed-QI)
9730      ())
9731 (dni sha32.w-dst "sha.w r1h,dest" ((machine 32))
9732      ("sha.w r1h,${dst32-16-Unprefixed-HI}")
9733      (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9734      (shar1h-sem HI dst32-16-Unprefixed-HI)
9735      ())
9736 ; sha.L #imm,dst (m16 #3)
9737 (dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16))
9738      "sha.l #${Imm-sh-12-s4},r2r0"
9739      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4)
9740      (sha-sem SI Imm-sh-12-s4 (reg h-r2r0))
9741      ())
9742 (dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16))
9743      "sha.l #${Imm-sh-12-s4},r3r1"
9744      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4)
9745      (sha-sem SI Imm-sh-12-s4 (reg h-r3r1))
9746      ())
9747 ; sha.L r1h,dst (m16 #4)
9748 (dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16))
9749      "sha.l r1h,r2r0"
9750      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1))
9751      (sha-sem SI (reg h-r1h) (reg h-r2r0))
9752      ())
9753 (dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16))
9754      "sha.l r1h,r3r1"
9755      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1))
9756      (sha-sem SI (reg h-r1h) (reg h-r3r1))
9757      ())
9758 ; sha.L #imm8,dst (m32 #2)
9759 (binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem)
9760 ; sha.L r1h,dst (m32 #4)
9761 (dni sha32.l-dst "sha.l r1h,dest" ((machine 32))
9762      ("sha.l r1h,${dst32-16-Unprefixed-SI}")
9763      (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1))
9764      (shar1h-sem QI dst32-16-Unprefixed-SI)
9765      ())
9766
9767 ;-------------------------------------------------------------
9768 ; shanc - shift arithmetic non carry (m32)
9769 ;-------------------------------------------------------------
9770
9771 ; TODO check semantics
9772 ; shanc.L #imm8,dst
9773 (binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem)
9774
9775 ;-------------------------------------------------------------
9776 ; shl - shift logical
9777 ;-------------------------------------------------------------
9778
9779 ; TODO future: split this into .b and .w semantics
9780 (define-pmacro (shl-sem mode src1 dst)
9781   (sequence ((mode result)(mode shift)(mode shmode))
9782             (case DFLT src1
9783                   ((#x0) (set shift 1))
9784                   ((#x1) (set shift 2))
9785                   ((#x2) (set shift 3))
9786                   ((#x3) (set shift 4))
9787                   ((#x4) (set shift 5))
9788                   ((#x5) (set shift 6))
9789                   ((#x6) (set shift 7))
9790                   ((#x7) (set shift 8))
9791                   ((-8) (set shift -1))
9792                   ((-7) (set shift -2))
9793                   ((-6) (set shift -3))
9794                   ((-5) (set shift -4))
9795                   ((-4) (set shift -5))
9796                   ((-3) (set shift -6))
9797                   ((-2) (set shift -7))
9798                   ((-1) (set shift -8))
9799                   (else (set shift 0))
9800                   )
9801             (set shmode -1)
9802             (set shmode (srl shmode #x8))
9803             (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1))))
9804             (if (gt mode shift 0) (set result (sll mode dst shift)))
9805             (if (eq shmode #x0) ; QI
9806                 (sequence
9807                   ((mode cbitamt))
9808                   (if (lt mode shift #x0)
9809                       (set cbitamt (sub #x8 shift)); srl
9810                       (set cbitamt (sub shift 1))) ; sll
9811                   (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9812                   (set obit (ne (and dst #x80) (and result #x80)))
9813                   ))
9814             (if (eq shmode #xff) ; HI
9815                 (sequence
9816                   ((mode cbitamt))
9817                   (if (lt mode shift #x0)
9818                       (set cbitamt (sub 16 shift)) ; srl
9819                       (set cbitamt (sub shift 1))) ; sll
9820                   (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9821                   (set obit (ne (and dst #x8000) (and result #x8000)))
9822                   ))
9823             (set-z-and-s result)
9824             (set dst result))
9825   )
9826 (define-pmacro (shlr1h-sem mode dst)
9827   (sequence ((mode result)(mode shmode))
9828             (set shmode -1)
9829             (set shmode (srl shmode #x8))
9830             (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h))))
9831             (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9832             (if (eq shmode #x0) ; QI
9833                 (sequence
9834                   ((mode cbitamt))
9835                   (if (lt mode (reg h-r1h) #x0)
9836                       (set cbitamt (sub #x8 (reg h-r1h))) ; srl
9837                       (set cbitamt (sub (reg h-r1h) 1)))  ; sll
9838                   (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9839                   (set obit (ne (and dst #x80) (and result #x80)))
9840                   ))
9841             (if (eq shmode #xff) ; HI
9842                 (sequence
9843                   ((mode cbitamt))
9844                   (if (lt mode (reg h-r1h) #x0)
9845                       (set cbitamt (sub 16 (reg h-r1h))) ; srl
9846                       (set cbitamt (sub (reg h-r1h) 1))) ; sll
9847                   (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9848                   (set obit (ne (and dst #x8000) (and result #x8000)))
9849                   ))
9850             (set-z-and-s result)
9851             (set dst result))
9852   )
9853 ; shl.BW #imm4,dst (m16 #1 m32 #1)
9854 (binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
9855 (binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
9856 (binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem)
9857 (binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem)
9858 ; shl.BW r1h,dst (m16 #2 m32 #3)
9859 (dni shl16.b-dst "shl.b r1h,dest" ((machine 16))
9860      ("shl.b r1h,${dst16-16-QI}")
9861      (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI)
9862      (shlr1h-sem HI dst16-16-QI)
9863      ())
9864 (dni shl16.w-dst "shl.w r1h,dest" ((machine 16))
9865      ("shl.w r1h,${dst16-16-HI}")
9866      (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI)
9867      (shlr1h-sem HI dst16-16-HI)
9868      ())
9869 (dni shl32.b-dst "shl.b r1h,dest" ((machine 32))
9870      ("shl.b r1h,${dst32-16-Unprefixed-QI}")
9871      (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9872      (shlr1h-sem QI dst32-16-Unprefixed-QI)
9873      ())
9874 (dni shl32.w-dst "shl.w r1h,dest" ((machine 32))
9875      ("shl.w r1h,${dst32-16-Unprefixed-HI}")
9876      (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9877      (shlr1h-sem HI dst32-16-Unprefixed-HI)
9878      ())
9879 ; shl.L #imm,dst (m16 #3)
9880 (dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16))
9881      "shl.l #${Imm-sh-12-s4},r2r0"
9882      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4)
9883      (shl-sem SI Imm-sh-12-s4 (reg h-r2r0))
9884      ())
9885 (dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16))
9886      "shl.l #${Imm-sh-12-s4},r3r1"
9887      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4)
9888      (shl-sem SI Imm-sh-12-s4 (reg h-r3r1))
9889      ())
9890 ; shl.L r1h,dst (m16 #4)
9891 (dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16))
9892      "shl.l r1h,r2r0"
9893      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1))
9894      (shl-sem SI (reg h-r1h) (reg h-r2r0))
9895      ())
9896 (dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16))
9897      "shl.l r1h,r3r1"
9898      (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1))
9899      (shl-sem SI (reg h-r1h) (reg h-r3r1))
9900      ())
9901 ; shl.L #imm8,dst (m32 #2)
9902 (binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem)
9903 ; shl.L r1h,dst (m32 #4)
9904 (dni shl32.l-dst "shl.l r1h,dest" ((machine 32))
9905      ("shl.l r1h,${dst32-16-Unprefixed-SI}")
9906      (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1))
9907      (shlr1h-sem QI dst32-16-Unprefixed-SI)
9908      ())
9909
9910 ;-------------------------------------------------------------
9911 ; shlnc - shift logical non carry
9912 ;-------------------------------------------------------------
9913
9914 ; TODO check semantics
9915 ; shlnc.L #imm8,dst
9916 (binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem)
9917
9918 ;-------------------------------------------------------------
9919 ; sin - string input (m32)
9920 ;-------------------------------------------------------------
9921
9922 ; TODO semantics
9923 (dni sin32.b "sin" ((machine 32))
9924      ("sin.b")
9925      (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3))
9926      (c-call VOID "sin_QI_semantics")
9927      ())
9928
9929 (dni sin32.w "sin" ((machine 32))
9930      ("sin.w")
9931      (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3))
9932      (c-call VOID "sin_HI_semantics")
9933      ())
9934
9935 ;-------------------------------------------------------------
9936 ; smovb - string move backward
9937 ;-------------------------------------------------------------
9938
9939 ; TODO semantics
9940 (dni smovb16.b "smovb.b" ((machine 16))
9941      ("smovb.b")
9942      (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9))
9943      (c-call VOID "smovb_QI_semantics")
9944      ())
9945
9946 (dni smovb16.w "smovb.w" ((machine 16))
9947      ("smovb.w")
9948      (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9))
9949      (c-call VOID "smovb_HI_semantics")
9950      ())
9951
9952 (dni smovb32.b "smovb.b" ((machine 32))
9953      ("smovb.b")
9954      (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3))
9955      (c-call VOID "smovb_QI_semantics")
9956      ())
9957
9958 (dni smovb32.w "smovb.w" ((machine 32))
9959      ("smovb.w")
9960      (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3))
9961      (c-call VOID "smovb_HI_semantics")
9962      ())
9963
9964 ;-------------------------------------------------------------
9965 ; smovf - string move forward (m32)
9966 ;-------------------------------------------------------------
9967
9968 ; TODO semantics
9969 (dni smovf16.b "smovf.b" ((machine 16))
9970      ("smovf.b")
9971      (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8))
9972      (c-call VOID "smovf_QI_semantics")
9973      ())
9974
9975 (dni smovf16.w "smovf.w" ((machine 16))
9976      ("smovf.w")
9977      (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8))
9978      (c-call VOID "smovf_HI_semantics")
9979      ())
9980
9981 (dni smovf32.b "smovf.b" ((machine 32))
9982      ("smovf.b")
9983      (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8)  (f-12-4 3))
9984      (c-call VOID "smovf_QI_semantics")
9985      ())
9986
9987 (dni smovf32.w "smovf.w" ((machine 32))
9988      ("smovf.w")
9989      (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9)  (f-12-4 3))
9990      (c-call VOID "smovf_HI_semantics")
9991      ())
9992
9993 ;-------------------------------------------------------------
9994 ; smovu - string move unequal (m32)
9995 ;-------------------------------------------------------------
9996
9997 ; TODO semantics
9998 (dni smovu.b "smovu.b" ((machine 32))
9999      ("smovu.b")
10000      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8)  (f-12-4 3))
10001      (c-call VOID "smovu_QI_semantics")
10002      ())
10003
10004 (dni smovu.w "smovu.w" ((machine 32))
10005      ("smovu.w")
10006      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9)  (f-12-4 3))
10007      (c-call VOID "smovu_HI_semantics")
10008      ())
10009
10010 ;-------------------------------------------------------------
10011 ; sout - string output (m32)
10012 ;-------------------------------------------------------------
10013
10014 ; TODO semantics
10015 (dni sout.b "sout.b" ((machine 32))
10016      ("sout.b")
10017      (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3))
10018      (c-call VOID "sout_QI_semantics")
10019      ())
10020
10021 (dni sout.w "sout" ((machine 32))
10022      ("sout.w")
10023      (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3))
10024      (c-call VOID "sout_HI_semantics")
10025      ())
10026
10027 ;-------------------------------------------------------------
10028 ; sstr - string store
10029 ;-------------------------------------------------------------
10030
10031 ; TODO semantics
10032 (dni sstr16.b "sstr.b" ((machine 16))
10033      ("sstr.b")
10034      (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA))
10035      (c-call VOID "sstr_QI_semantics")
10036      ())
10037
10038 (dni sstr16.w "sstr.w" ((machine 16))
10039      ("sstr.w")
10040      (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA))
10041      (c-call VOID "sstr_HI_semantics")
10042      ())
10043
10044 (dni sstr.b "sstr" ((machine 32))
10045      ("sstr.b")
10046      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3))
10047      (c-call VOID "sstr_QI_semantics")
10048      ())
10049
10050 (dni sstr.w "sstr" ((machine 32))
10051      ("sstr.w")
10052      (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3))
10053      (c-call VOID "sstr_HI_semantics")
10054      ())
10055
10056 ;-------------------------------------------------------------
10057 ; stnz - store on not zero
10058 ;-------------------------------------------------------------
10059
10060 (define-pmacro (stnz-sem mode src dst)
10061   (sequence ()
10062             (if (ne zbit (const 1))
10063                 (set dst src)))
10064 )
10065 ; stnz #imm8,dst3 (m16)
10066 (binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem)
10067 ; stnz.BW #imm,dst (m32)
10068 (binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem)
10069 (binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem)
10070
10071 ;-------------------------------------------------------------
10072 ; stz - store on zero
10073 ;-------------------------------------------------------------
10074
10075 (define-pmacro (stz-sem mode src dst)
10076   (sequence ()
10077             (if (eq zbit (const 1))
10078                 (set dst src)))
10079 )
10080 ; stz #imm8,dst3 (m16)
10081 (binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem)
10082 ; stz.BW #imm,dst (m32)
10083 (binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem)
10084 (binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem)
10085
10086 ;-------------------------------------------------------------
10087 ; stzx - store on zero extention
10088 ;-------------------------------------------------------------
10089
10090 (define-pmacro (stzx-sem mode src1 src2 dst)
10091   (sequence ()
10092             (if (eq zbit (const 1))
10093                 (set dst src1)
10094                 (set dst src2)))
10095   )
10096 ; stzx #imm8,dst3 (m16)
10097 (dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16))
10098      ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h")
10099      (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI)
10100      (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h))
10101      ())
10102 (dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16))
10103      ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l")
10104      (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI)
10105      (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l))
10106      ())
10107 (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16))
10108      ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[sb]")
10109      (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI)
10110      (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8)))
10111      ())
10112 (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16))
10113      ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[fb]")
10114      (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u8 Imm-24-QI)
10115      (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-fb) Dsp-24-u8)))
10116      ())
10117 (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16))
10118      ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u16")
10119      (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u16 Imm-32-QI)
10120      (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16))
10121      ())
10122 ; stzx.BW #imm,dst (m32)
10123 (insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem)
10124
10125 ;-------------------------------------------------------------
10126 ; subx - subtract extend (m32)
10127 ;-------------------------------------------------------------
10128
10129 (define-pmacro (subx-sem mode src1 dst)
10130   (sequence ((mode result))
10131             (set result (sub mode dst (ext mode src1)))
10132             (set obit (sub-oflag mode dst (ext mode src1) 0))
10133             (set cbit (sub-cflag mode dst (ext mode src1) 0))
10134             (set dst result)
10135             (set-z-and-s result)))
10136 ; subx #imm8,dst
10137 (binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem)
10138 ; subx src,dst
10139 (binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem)
10140
10141 ;-------------------------------------------------------------
10142 ; tst - test
10143 ;-------------------------------------------------------------
10144
10145 (define-pmacro (tst-sem mode src1 dst)
10146   (sequence ((mode result))
10147             (set result (and mode dst src1))
10148             (set-z-and-s result))
10149 )
10150
10151 ; tst.BW #imm,dst (m16 #1 m32 #1)
10152 (binary-arith-imm-dst tst X (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem)
10153 ; tst.BW src,dst (m16 #2 m32 #3)
10154 (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10155 (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10156 (binary-arith32-src-dst-Prefixed QI QI .b 0 tst X #x1 #x9 tst-sem)
10157 (binary-arith32-src-dst-Prefixed HI HI .w 1 tst X #x1 #x9 tst-sem)
10158 ; tst.BW:S #imm,dst2 (m32 #2)
10159 (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem)
10160 (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem)
10161
10162 ;-------------------------------------------------------------
10163 ; und - undefined
10164 ;-------------------------------------------------------------
10165
10166 (dni und16 "und" ((machine 16))
10167      ("und")
10168      (+ (f-0-4 #xF) (f-4-4 #xF))
10169      (nop)
10170      ())
10171
10172 (dni und32 "und" ((machine 32))
10173      ("und")
10174      (+ (f-0-4 #xF) (f-4-4 #xF))
10175      (nop)
10176      ())
10177
10178 ;-------------------------------------------------------------
10179 ; wait
10180 ;-------------------------------------------------------------
10181
10182 ; ??? semantics
10183 (dni wait16 "wait" ((machine 16))
10184      ("wait")
10185      (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3))
10186      (nop)
10187      ())
10188
10189 (dni wait "wait" ((machine 32))
10190      ("wait")
10191      (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3))
10192      (nop)
10193      ())
10194
10195 ;-------------------------------------------------------------
10196 ; xchg - exchange
10197 ;-------------------------------------------------------------
10198
10199 (define-pmacro (xchg-sem mode src dst)
10200   (sequence ((mode result))
10201             (set result src)
10202             (set src dst)
10203             (set dst result))
10204   )
10205 (define-pmacro (xchg16-defn mode sz szc src srcreg)
10206   (dni (.sym xchg16 sz - srcreg)
10207        (.str "xchg" sz "-" srcreg ",dst16-16-" mode)
10208        ((machine 16))
10209        (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}")
10210        (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode))
10211        (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode))
10212        ())
10213 )
10214 (xchg16-defn QI b 0 0 r0l)
10215 (xchg16-defn QI b 0 1 r0h)
10216 (xchg16-defn QI b 0 2 r1l)
10217 (xchg16-defn QI b 0 3 r1h)
10218 (xchg16-defn QI w 1 0 r0)
10219 (xchg16-defn HI w 1 1 r1)
10220 (xchg16-defn HI w 1 2 r2)
10221 (xchg16-defn HI w 1 3 r3)
10222 (define-pmacro (xchg32-defn mode sz szc src srcreg)
10223   (dni (.sym xchg32 sz - srcreg)
10224        (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode)
10225        ((machine 32))
10226        (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}")
10227        (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src))
10228        (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode))
10229        ())
10230 )
10231 (xchg32-defn QI b 0 0 r0l)
10232 (xchg32-defn QI b 0 1 r1l)
10233 (xchg32-defn QI b 0 2 a0)
10234 (xchg32-defn QI b 0 3 a1)
10235 (xchg32-defn QI b 0 4 r0h)
10236 (xchg32-defn QI b 0 5 r1h)
10237 (xchg32-defn HI w 1 0 r0)
10238 (xchg32-defn HI w 1 1 r1)
10239 (xchg32-defn HI w 1 2 a0)
10240 (xchg32-defn HI w 1 3 a1)
10241 (xchg32-defn HI w 1 4 r2)
10242 (xchg32-defn HI w 1 5 r3)
10243
10244 ;-------------------------------------------------------------
10245 ; xor - exclusive or
10246 ;-------------------------------------------------------------
10247
10248 (define-pmacro (xor-sem mode src1 dst)
10249   (sequence ((mode result))
10250             (set result (xor mode src1 dst))
10251             (set-z-and-s result)
10252             (set dst result))
10253 )
10254
10255 ; xor.BW #imm,dst (m16 #1 m32 #1)
10256 (binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem)
10257 ; xor.BW src,dst (m16 #3 m32 #3)
10258 (binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem)
10259
10260 ;-------------------------------------------------------------
10261 ; Widening
10262 ;-------------------------------------------------------------
10263
10264 (define-pmacro (exts-sem smode dmode src dst)
10265   (set dst (ext dmode (trunc smode src)))
10266 )
10267 (define-pmacro (extz-sem smode dmode src dst)
10268   (set dst (zext dmode (trunc smode src)))
10269 )
10270
10271 ; exts.b dst for m16c
10272 (ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem)
10273
10274 ; exts.w r0 for m16c
10275 (dni exts16.w-r0
10276      "exts.w r0"
10277      ((machine 16))
10278      "exts.w r0"
10279      (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3))
10280      (exts-sem HI SI R0 R2R0)
10281      ())
10282
10283 ; exts.size dst for m32c
10284 (ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10285 (ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10286 ; exts.b src,dst for m32c
10287 (ext32-binary-defn exts .b #x1 #x7 exts-sem)
10288
10289 ; extz.b src,dst for m32c
10290 (ext32-binary-defn extz "" #x1 #xB extz-sem)
10291
10292 ;-------------------------------------------------------------
10293 ; Indirect
10294 ;-------------------------------------------------------------
10295
10296 ; TODO semantics
10297 (dni srcind "SRC-INDIRECT" ((machine 32))
10298      ("src-indirect")
10299      (+ (f-0-4 4) (f-4-4 1))
10300      (set (reg h-src-indirect) 1)
10301      ())
10302
10303 (dni destind "DEST-INDIRECT" ((machine 32))
10304      ("dest-indirect")
10305      (+ (f-0-4 0) (f-4-4 9))
10306      (set (reg h-dst-indirect) 1)
10307      ())
10308
10309 (dni srcdestind "SRC-DEST-INDIRECT" ((machine 32))
10310      ("src-dest-indirect")
10311      (+ (f-0-4 4) (f-4-4 9))
10312      (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1))
10313      ())