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Merge branch 'for-4.5/drivers' of git://git.kernel.dk/linux-block
[deliverable/linux.git] / drivers / block / mtip32xx / mtip32xx.c
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/blk-mq.h>
35 #include <linux/bio.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/idr.h>
38 #include <linux/kthread.h>
39 #include <../drivers/ata/ahci.h>
40 #include <linux/export.h>
41 #include <linux/debugfs.h>
42 #include <linux/prefetch.h>
43 #include "mtip32xx.h"
44
45 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
46
47 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
48 #define AHCI_RX_FIS_SZ 0x100
49 #define AHCI_RX_FIS_OFFSET 0x0
50 #define AHCI_IDFY_SZ ATA_SECT_SIZE
51 #define AHCI_IDFY_OFFSET 0x400
52 #define AHCI_SECTBUF_SZ ATA_SECT_SIZE
53 #define AHCI_SECTBUF_OFFSET 0x800
54 #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE
55 #define AHCI_SMARTBUF_OFFSET 0xC00
56 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
57 #define BLOCK_DMA_ALLOC_SZ 4096
58
59 /* DMA region containing command table (should be 8192 bytes) */
60 #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr)
61 #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
62 #define AHCI_CMD_TBL_OFFSET 0x0
63
64 /* DMA region per command (contains header and SGL) */
65 #define AHCI_CMD_TBL_HDR_SZ 0x80
66 #define AHCI_CMD_TBL_HDR_OFFSET 0x0
67 #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
68 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
69 #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
70
71
72 #define HOST_CAP_NZDMA (1 << 19)
73 #define HOST_HSORG 0xFC
74 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
75 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
76 #define HSORG_HWREV 0xFF00
77 #define HSORG_STYLE 0x8
78 #define HSORG_SLOTGROUPS 0x7
79
80 #define PORT_COMMAND_ISSUE 0x38
81 #define PORT_SDBV 0x7C
82
83 #define PORT_OFFSET 0x100
84 #define PORT_MEM_SIZE 0x80
85
86 #define PORT_IRQ_ERR \
87 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
88 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
89 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
90 PORT_IRQ_OVERFLOW)
91 #define PORT_IRQ_LEGACY \
92 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
93 #define PORT_IRQ_HANDLED \
94 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
95 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
96 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
97 #define DEF_PORT_IRQ \
98 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
99
100 /* product numbers */
101 #define MTIP_PRODUCT_UNKNOWN 0x00
102 #define MTIP_PRODUCT_ASICFPGA 0x11
103
104 /* Device instance number, incremented each time a device is probed. */
105 static int instance;
106
107 static struct list_head online_list;
108 static struct list_head removing_list;
109 static spinlock_t dev_lock;
110
111 /*
112 * Global variable used to hold the major block device number
113 * allocated in mtip_init().
114 */
115 static int mtip_major;
116 static struct dentry *dfs_parent;
117 static struct dentry *dfs_device_status;
118
119 static u32 cpu_use[NR_CPUS];
120
121 static DEFINE_SPINLOCK(rssd_index_lock);
122 static DEFINE_IDA(rssd_index_ida);
123
124 static int mtip_block_initialize(struct driver_data *dd);
125
126 #ifdef CONFIG_COMPAT
127 struct mtip_compat_ide_task_request_s {
128 __u8 io_ports[8];
129 __u8 hob_ports[8];
130 ide_reg_valid_t out_flags;
131 ide_reg_valid_t in_flags;
132 int data_phase;
133 int req_cmd;
134 compat_ulong_t out_size;
135 compat_ulong_t in_size;
136 };
137 #endif
138
139 /*
140 * This function check_for_surprise_removal is called
141 * while card is removed from the system and it will
142 * read the vendor id from the configration space
143 *
144 * @pdev Pointer to the pci_dev structure.
145 *
146 * return value
147 * true if device removed, else false
148 */
149 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
150 {
151 u16 vendor_id = 0;
152 struct driver_data *dd = pci_get_drvdata(pdev);
153
154 if (dd->sr)
155 return true;
156
157 /* Read the vendorID from the configuration space */
158 pci_read_config_word(pdev, 0x00, &vendor_id);
159 if (vendor_id == 0xFFFF) {
160 dd->sr = true;
161 if (dd->queue)
162 set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags);
163 else
164 dev_warn(&dd->pdev->dev,
165 "%s: dd->queue is NULL\n", __func__);
166 return true; /* device removed */
167 }
168
169 return false; /* device present */
170 }
171
172 static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd)
173 {
174 struct request *rq;
175
176 rq = blk_mq_alloc_request(dd->queue, 0, BLK_MQ_REQ_RESERVED);
177 return blk_mq_rq_to_pdu(rq);
178 }
179
180 static void mtip_put_int_command(struct driver_data *dd, struct mtip_cmd *cmd)
181 {
182 blk_put_request(blk_mq_rq_from_pdu(cmd));
183 }
184
185 /*
186 * Once we add support for one hctx per mtip group, this will change a bit
187 */
188 static struct request *mtip_rq_from_tag(struct driver_data *dd,
189 unsigned int tag)
190 {
191 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
192
193 return blk_mq_tag_to_rq(hctx->tags, tag);
194 }
195
196 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
197 unsigned int tag)
198 {
199 struct request *rq = mtip_rq_from_tag(dd, tag);
200
201 return blk_mq_rq_to_pdu(rq);
202 }
203
204 /*
205 * IO completion function.
206 *
207 * This completion function is called by the driver ISR when a
208 * command that was issued by the kernel completes. It first calls the
209 * asynchronous completion function which normally calls back into the block
210 * layer passing the asynchronous callback data, then unmaps the
211 * scatter list associated with the completed command, and finally
212 * clears the allocated bit associated with the completed command.
213 *
214 * @port Pointer to the port data structure.
215 * @tag Tag of the command.
216 * @data Pointer to driver_data.
217 * @status Completion status.
218 *
219 * return value
220 * None
221 */
222 static void mtip_async_complete(struct mtip_port *port,
223 int tag, struct mtip_cmd *cmd, int status)
224 {
225 struct driver_data *dd = port->dd;
226 struct request *rq;
227
228 if (unlikely(!dd) || unlikely(!port))
229 return;
230
231 if (unlikely(status == PORT_IRQ_TF_ERR)) {
232 dev_warn(&port->dd->pdev->dev,
233 "Command tag %d failed due to TFE\n", tag);
234 }
235
236 /* Unmap the DMA scatter list entries */
237 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents, cmd->direction);
238
239 rq = mtip_rq_from_tag(dd, tag);
240
241 if (unlikely(cmd->unaligned))
242 up(&port->cmd_slot_unal);
243
244 blk_mq_end_request(rq, status ? -EIO : 0);
245 }
246
247 /*
248 * Reset the HBA (without sleeping)
249 *
250 * @dd Pointer to the driver data structure.
251 *
252 * return value
253 * 0 The reset was successful.
254 * -1 The HBA Reset bit did not clear.
255 */
256 static int mtip_hba_reset(struct driver_data *dd)
257 {
258 unsigned long timeout;
259
260 /* Set the reset bit */
261 writel(HOST_RESET, dd->mmio + HOST_CTL);
262
263 /* Flush */
264 readl(dd->mmio + HOST_CTL);
265
266 /*
267 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
268 * is 1 sec but in LUN failure conditions, up to 10 secs are required
269 */
270 timeout = jiffies + msecs_to_jiffies(10000);
271 do {
272 mdelay(10);
273 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
274 return -1;
275
276 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
277 && time_before(jiffies, timeout));
278
279 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
280 return -1;
281
282 return 0;
283 }
284
285 /*
286 * Issue a command to the hardware.
287 *
288 * Set the appropriate bit in the s_active and Command Issue hardware
289 * registers, causing hardware command processing to begin.
290 *
291 * @port Pointer to the port structure.
292 * @tag The tag of the command to be issued.
293 *
294 * return value
295 * None
296 */
297 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
298 {
299 int group = tag >> 5;
300
301 /* guard SACT and CI registers */
302 spin_lock(&port->cmd_issue_lock[group]);
303 writel((1 << MTIP_TAG_BIT(tag)),
304 port->s_active[MTIP_TAG_INDEX(tag)]);
305 writel((1 << MTIP_TAG_BIT(tag)),
306 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
307 spin_unlock(&port->cmd_issue_lock[group]);
308 }
309
310 /*
311 * Enable/disable the reception of FIS
312 *
313 * @port Pointer to the port data structure
314 * @enable 1 to enable, 0 to disable
315 *
316 * return value
317 * Previous state: 1 enabled, 0 disabled
318 */
319 static int mtip_enable_fis(struct mtip_port *port, int enable)
320 {
321 u32 tmp;
322
323 /* enable FIS reception */
324 tmp = readl(port->mmio + PORT_CMD);
325 if (enable)
326 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
327 else
328 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
329
330 /* Flush */
331 readl(port->mmio + PORT_CMD);
332
333 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
334 }
335
336 /*
337 * Enable/disable the DMA engine
338 *
339 * @port Pointer to the port data structure
340 * @enable 1 to enable, 0 to disable
341 *
342 * return value
343 * Previous state: 1 enabled, 0 disabled.
344 */
345 static int mtip_enable_engine(struct mtip_port *port, int enable)
346 {
347 u32 tmp;
348
349 /* enable FIS reception */
350 tmp = readl(port->mmio + PORT_CMD);
351 if (enable)
352 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
353 else
354 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
355
356 readl(port->mmio + PORT_CMD);
357 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
358 }
359
360 /*
361 * Enables the port DMA engine and FIS reception.
362 *
363 * return value
364 * None
365 */
366 static inline void mtip_start_port(struct mtip_port *port)
367 {
368 /* Enable FIS reception */
369 mtip_enable_fis(port, 1);
370
371 /* Enable the DMA engine */
372 mtip_enable_engine(port, 1);
373 }
374
375 /*
376 * Deinitialize a port by disabling port interrupts, the DMA engine,
377 * and FIS reception.
378 *
379 * @port Pointer to the port structure
380 *
381 * return value
382 * None
383 */
384 static inline void mtip_deinit_port(struct mtip_port *port)
385 {
386 /* Disable interrupts on this port */
387 writel(0, port->mmio + PORT_IRQ_MASK);
388
389 /* Disable the DMA engine */
390 mtip_enable_engine(port, 0);
391
392 /* Disable FIS reception */
393 mtip_enable_fis(port, 0);
394 }
395
396 /*
397 * Initialize a port.
398 *
399 * This function deinitializes the port by calling mtip_deinit_port() and
400 * then initializes it by setting the command header and RX FIS addresses,
401 * clearing the SError register and any pending port interrupts before
402 * re-enabling the default set of port interrupts.
403 *
404 * @port Pointer to the port structure.
405 *
406 * return value
407 * None
408 */
409 static void mtip_init_port(struct mtip_port *port)
410 {
411 int i;
412 mtip_deinit_port(port);
413
414 /* Program the command list base and FIS base addresses */
415 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
416 writel((port->command_list_dma >> 16) >> 16,
417 port->mmio + PORT_LST_ADDR_HI);
418 writel((port->rxfis_dma >> 16) >> 16,
419 port->mmio + PORT_FIS_ADDR_HI);
420 }
421
422 writel(port->command_list_dma & 0xFFFFFFFF,
423 port->mmio + PORT_LST_ADDR);
424 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
425
426 /* Clear SError */
427 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
428
429 /* reset the completed registers.*/
430 for (i = 0; i < port->dd->slot_groups; i++)
431 writel(0xFFFFFFFF, port->completed[i]);
432
433 /* Clear any pending interrupts for this port */
434 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
435
436 /* Clear any pending interrupts on the HBA. */
437 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
438 port->dd->mmio + HOST_IRQ_STAT);
439
440 /* Enable port interrupts */
441 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
442 }
443
444 /*
445 * Restart a port
446 *
447 * @port Pointer to the port data structure.
448 *
449 * return value
450 * None
451 */
452 static void mtip_restart_port(struct mtip_port *port)
453 {
454 unsigned long timeout;
455
456 /* Disable the DMA engine */
457 mtip_enable_engine(port, 0);
458
459 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
460 timeout = jiffies + msecs_to_jiffies(500);
461 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
462 && time_before(jiffies, timeout))
463 ;
464
465 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
466 return;
467
468 /*
469 * Chip quirk: escalate to hba reset if
470 * PxCMD.CR not clear after 500 ms
471 */
472 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
473 dev_warn(&port->dd->pdev->dev,
474 "PxCMD.CR not clear, escalating reset\n");
475
476 if (mtip_hba_reset(port->dd))
477 dev_err(&port->dd->pdev->dev,
478 "HBA reset escalation failed.\n");
479
480 /* 30 ms delay before com reset to quiesce chip */
481 mdelay(30);
482 }
483
484 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
485
486 /* Set PxSCTL.DET */
487 writel(readl(port->mmio + PORT_SCR_CTL) |
488 1, port->mmio + PORT_SCR_CTL);
489 readl(port->mmio + PORT_SCR_CTL);
490
491 /* Wait 1 ms to quiesce chip function */
492 timeout = jiffies + msecs_to_jiffies(1);
493 while (time_before(jiffies, timeout))
494 ;
495
496 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
497 return;
498
499 /* Clear PxSCTL.DET */
500 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
501 port->mmio + PORT_SCR_CTL);
502 readl(port->mmio + PORT_SCR_CTL);
503
504 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
505 timeout = jiffies + msecs_to_jiffies(500);
506 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
507 && time_before(jiffies, timeout))
508 ;
509
510 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
511 return;
512
513 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
514 dev_warn(&port->dd->pdev->dev,
515 "COM reset failed\n");
516
517 mtip_init_port(port);
518 mtip_start_port(port);
519
520 }
521
522 static int mtip_device_reset(struct driver_data *dd)
523 {
524 int rv = 0;
525
526 if (mtip_check_surprise_removal(dd->pdev))
527 return 0;
528
529 if (mtip_hba_reset(dd) < 0)
530 rv = -EFAULT;
531
532 mdelay(1);
533 mtip_init_port(dd->port);
534 mtip_start_port(dd->port);
535
536 /* Enable interrupts on the HBA. */
537 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
538 dd->mmio + HOST_CTL);
539 return rv;
540 }
541
542 /*
543 * Helper function for tag logging
544 */
545 static void print_tags(struct driver_data *dd,
546 char *msg,
547 unsigned long *tagbits,
548 int cnt)
549 {
550 unsigned char tagmap[128];
551 int group, tagmap_len = 0;
552
553 memset(tagmap, 0, sizeof(tagmap));
554 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
555 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
556 tagbits[group-1]);
557 dev_warn(&dd->pdev->dev,
558 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
559 }
560
561 /*
562 * Internal command completion callback function.
563 *
564 * This function is normally called by the driver ISR when an internal
565 * command completed. This function signals the command completion by
566 * calling complete().
567 *
568 * @port Pointer to the port data structure.
569 * @tag Tag of the command that has completed.
570 * @data Pointer to a completion structure.
571 * @status Completion status.
572 *
573 * return value
574 * None
575 */
576 static void mtip_completion(struct mtip_port *port,
577 int tag, struct mtip_cmd *command, int status)
578 {
579 struct completion *waiting = command->comp_data;
580 if (unlikely(status == PORT_IRQ_TF_ERR))
581 dev_warn(&port->dd->pdev->dev,
582 "Internal command %d completed with TFE\n", tag);
583
584 complete(waiting);
585 }
586
587 static void mtip_null_completion(struct mtip_port *port,
588 int tag, struct mtip_cmd *command, int status)
589 {
590 }
591
592 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
593 dma_addr_t buffer_dma, unsigned int sectors);
594 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
595 struct smart_attr *attrib);
596 /*
597 * Handle an error.
598 *
599 * @dd Pointer to the DRIVER_DATA structure.
600 *
601 * return value
602 * None
603 */
604 static void mtip_handle_tfe(struct driver_data *dd)
605 {
606 int group, tag, bit, reissue, rv;
607 struct mtip_port *port;
608 struct mtip_cmd *cmd;
609 u32 completed;
610 struct host_to_dev_fis *fis;
611 unsigned long tagaccum[SLOTBITS_IN_LONGS];
612 unsigned int cmd_cnt = 0;
613 unsigned char *buf;
614 char *fail_reason = NULL;
615 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
616
617 dev_warn(&dd->pdev->dev, "Taskfile error\n");
618
619 port = dd->port;
620
621 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
622
623 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
624 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
625 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
626
627 if (cmd->comp_data && cmd->comp_func) {
628 cmd->comp_func(port, MTIP_TAG_INTERNAL,
629 cmd, PORT_IRQ_TF_ERR);
630 }
631 goto handle_tfe_exit;
632 }
633
634 /* clear the tag accumulator */
635 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
636
637 /* Loop through all the groups */
638 for (group = 0; group < dd->slot_groups; group++) {
639 completed = readl(port->completed[group]);
640
641 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
642
643 /* clear completed status register in the hardware.*/
644 writel(completed, port->completed[group]);
645
646 /* Process successfully completed commands */
647 for (bit = 0; bit < 32 && completed; bit++) {
648 if (!(completed & (1<<bit)))
649 continue;
650 tag = (group << 5) + bit;
651
652 /* Skip the internal command slot */
653 if (tag == MTIP_TAG_INTERNAL)
654 continue;
655
656 cmd = mtip_cmd_from_tag(dd, tag);
657 if (likely(cmd->comp_func)) {
658 set_bit(tag, tagaccum);
659 cmd_cnt++;
660 cmd->comp_func(port, tag, cmd, 0);
661 } else {
662 dev_err(&port->dd->pdev->dev,
663 "Missing completion func for tag %d",
664 tag);
665 if (mtip_check_surprise_removal(dd->pdev)) {
666 /* don't proceed further */
667 return;
668 }
669 }
670 }
671 }
672
673 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
674
675 /* Restart the port */
676 mdelay(20);
677 mtip_restart_port(port);
678
679 /* Trying to determine the cause of the error */
680 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
681 dd->port->log_buf,
682 dd->port->log_buf_dma, 1);
683 if (rv) {
684 dev_warn(&dd->pdev->dev,
685 "Error in READ LOG EXT (10h) command\n");
686 /* non-critical error, don't fail the load */
687 } else {
688 buf = (unsigned char *)dd->port->log_buf;
689 if (buf[259] & 0x1) {
690 dev_info(&dd->pdev->dev,
691 "Write protect bit is set.\n");
692 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
693 fail_all_ncq_write = 1;
694 fail_reason = "write protect";
695 }
696 if (buf[288] == 0xF7) {
697 dev_info(&dd->pdev->dev,
698 "Exceeded Tmax, drive in thermal shutdown.\n");
699 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
700 fail_all_ncq_cmds = 1;
701 fail_reason = "thermal shutdown";
702 }
703 if (buf[288] == 0xBF) {
704 set_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
705 dev_info(&dd->pdev->dev,
706 "Drive indicates rebuild has failed. Secure erase required.\n");
707 fail_all_ncq_cmds = 1;
708 fail_reason = "rebuild failed";
709 }
710 }
711
712 /* clear the tag accumulator */
713 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
714
715 /* Loop through all the groups */
716 for (group = 0; group < dd->slot_groups; group++) {
717 for (bit = 0; bit < 32; bit++) {
718 reissue = 1;
719 tag = (group << 5) + bit;
720 cmd = mtip_cmd_from_tag(dd, tag);
721
722 fis = (struct host_to_dev_fis *)cmd->command;
723
724 /* Should re-issue? */
725 if (tag == MTIP_TAG_INTERNAL ||
726 fis->command == ATA_CMD_SET_FEATURES)
727 reissue = 0;
728 else {
729 if (fail_all_ncq_cmds ||
730 (fail_all_ncq_write &&
731 fis->command == ATA_CMD_FPDMA_WRITE)) {
732 dev_warn(&dd->pdev->dev,
733 " Fail: %s w/tag %d [%s].\n",
734 fis->command == ATA_CMD_FPDMA_WRITE ?
735 "write" : "read",
736 tag,
737 fail_reason != NULL ?
738 fail_reason : "unknown");
739 if (cmd->comp_func) {
740 cmd->comp_func(port, tag,
741 cmd, -ENODATA);
742 }
743 continue;
744 }
745 }
746
747 /*
748 * First check if this command has
749 * exceeded its retries.
750 */
751 if (reissue && (cmd->retries-- > 0)) {
752
753 set_bit(tag, tagaccum);
754
755 /* Re-issue the command. */
756 mtip_issue_ncq_command(port, tag);
757
758 continue;
759 }
760
761 /* Retire a command that will not be reissued */
762 dev_warn(&port->dd->pdev->dev,
763 "retiring tag %d\n", tag);
764
765 if (cmd->comp_func)
766 cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR);
767 else
768 dev_warn(&port->dd->pdev->dev,
769 "Bad completion for tag %d\n",
770 tag);
771 }
772 }
773 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
774
775 handle_tfe_exit:
776 /* clear eh_active */
777 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
778 wake_up_interruptible(&port->svc_wait);
779 }
780
781 /*
782 * Handle a set device bits interrupt
783 */
784 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
785 u32 completed)
786 {
787 struct driver_data *dd = port->dd;
788 int tag, bit;
789 struct mtip_cmd *command;
790
791 if (!completed) {
792 WARN_ON_ONCE(!completed);
793 return;
794 }
795 /* clear completed status register in the hardware.*/
796 writel(completed, port->completed[group]);
797
798 /* Process completed commands. */
799 for (bit = 0; (bit < 32) && completed; bit++) {
800 if (completed & 0x01) {
801 tag = (group << 5) | bit;
802
803 /* skip internal command slot. */
804 if (unlikely(tag == MTIP_TAG_INTERNAL))
805 continue;
806
807 command = mtip_cmd_from_tag(dd, tag);
808 if (likely(command->comp_func))
809 command->comp_func(port, tag, command, 0);
810 else {
811 dev_dbg(&dd->pdev->dev,
812 "Null completion for tag %d",
813 tag);
814
815 if (mtip_check_surprise_removal(
816 dd->pdev)) {
817 return;
818 }
819 }
820 }
821 completed >>= 1;
822 }
823
824 /* If last, re-enable interrupts */
825 if (atomic_dec_return(&dd->irq_workers_active) == 0)
826 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
827 }
828
829 /*
830 * Process legacy pio and d2h interrupts
831 */
832 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
833 {
834 struct mtip_port *port = dd->port;
835 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
836
837 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
838 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
839 & (1 << MTIP_TAG_INTERNAL))) {
840 if (cmd->comp_func) {
841 cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0);
842 return;
843 }
844 }
845
846 return;
847 }
848
849 /*
850 * Demux and handle errors
851 */
852 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
853 {
854
855 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
856 dev_warn(&dd->pdev->dev,
857 "Clearing PxSERR.DIAG.x\n");
858 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
859 }
860
861 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
862 dev_warn(&dd->pdev->dev,
863 "Clearing PxSERR.DIAG.n\n");
864 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
865 }
866
867 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
868 dev_warn(&dd->pdev->dev,
869 "Port stat errors %x unhandled\n",
870 (port_stat & ~PORT_IRQ_HANDLED));
871 if (mtip_check_surprise_removal(dd->pdev))
872 return;
873 }
874 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
875 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
876 wake_up_interruptible(&dd->port->svc_wait);
877 }
878 }
879
880 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
881 {
882 struct driver_data *dd = (struct driver_data *) data;
883 struct mtip_port *port = dd->port;
884 u32 hba_stat, port_stat;
885 int rv = IRQ_NONE;
886 int do_irq_enable = 1, i, workers;
887 struct mtip_work *twork;
888
889 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
890 if (hba_stat) {
891 rv = IRQ_HANDLED;
892
893 /* Acknowledge the interrupt status on the port.*/
894 port_stat = readl(port->mmio + PORT_IRQ_STAT);
895 if (unlikely(port_stat == 0xFFFFFFFF)) {
896 mtip_check_surprise_removal(dd->pdev);
897 return IRQ_HANDLED;
898 }
899 writel(port_stat, port->mmio + PORT_IRQ_STAT);
900
901 /* Demux port status */
902 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
903 do_irq_enable = 0;
904 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
905
906 /* Start at 1: group zero is always local? */
907 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
908 i++) {
909 twork = &dd->work[i];
910 twork->completed = readl(port->completed[i]);
911 if (twork->completed)
912 workers++;
913 }
914
915 atomic_set(&dd->irq_workers_active, workers);
916 if (workers) {
917 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
918 twork = &dd->work[i];
919 if (twork->completed)
920 queue_work_on(
921 twork->cpu_binding,
922 dd->isr_workq,
923 &twork->work);
924 }
925
926 if (likely(dd->work[0].completed))
927 mtip_workq_sdbfx(port, 0,
928 dd->work[0].completed);
929
930 } else {
931 /*
932 * Chip quirk: SDB interrupt but nothing
933 * to complete
934 */
935 do_irq_enable = 1;
936 }
937 }
938
939 if (unlikely(port_stat & PORT_IRQ_ERR)) {
940 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
941 /* don't proceed further */
942 return IRQ_HANDLED;
943 }
944 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
945 &dd->dd_flag))
946 return rv;
947
948 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
949 }
950
951 if (unlikely(port_stat & PORT_IRQ_LEGACY))
952 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
953 }
954
955 /* acknowledge interrupt */
956 if (unlikely(do_irq_enable))
957 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
958
959 return rv;
960 }
961
962 /*
963 * HBA interrupt subroutine.
964 *
965 * @irq IRQ number.
966 * @instance Pointer to the driver data structure.
967 *
968 * return value
969 * IRQ_HANDLED A HBA interrupt was pending and handled.
970 * IRQ_NONE This interrupt was not for the HBA.
971 */
972 static irqreturn_t mtip_irq_handler(int irq, void *instance)
973 {
974 struct driver_data *dd = instance;
975
976 return mtip_handle_irq(dd);
977 }
978
979 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
980 {
981 writel(1 << MTIP_TAG_BIT(tag),
982 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
983 }
984
985 static bool mtip_pause_ncq(struct mtip_port *port,
986 struct host_to_dev_fis *fis)
987 {
988 struct host_to_dev_fis *reply;
989 unsigned long task_file_data;
990
991 reply = port->rxfis + RX_FIS_D2H_REG;
992 task_file_data = readl(port->mmio+PORT_TFDATA);
993
994 if ((task_file_data & 1))
995 return false;
996
997 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
998 port->ic_pause_timer = jiffies;
999 return true;
1000 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1001 (fis->features == 0x03)) {
1002 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1003 port->ic_pause_timer = jiffies;
1004 return true;
1005 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1006 ((fis->command == 0xFC) &&
1007 (fis->features == 0x27 || fis->features == 0x72 ||
1008 fis->features == 0x62 || fis->features == 0x26))) {
1009 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1010 /* Com reset after secure erase or lowlevel format */
1011 mtip_restart_port(port);
1012 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1013 return false;
1014 }
1015
1016 return false;
1017 }
1018
1019 /*
1020 * Wait for port to quiesce
1021 *
1022 * @port Pointer to port data structure
1023 * @timeout Max duration to wait (ms)
1024 *
1025 * return value
1026 * 0 Success
1027 * -EBUSY Commands still active
1028 */
1029 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1030 {
1031 unsigned long to;
1032 unsigned int n;
1033 unsigned int active = 1;
1034
1035 blk_mq_stop_hw_queues(port->dd->queue);
1036
1037 to = jiffies + msecs_to_jiffies(timeout);
1038 do {
1039 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1040 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1041 msleep(20);
1042 continue; /* svc thd is actively issuing commands */
1043 }
1044
1045 msleep(100);
1046 if (mtip_check_surprise_removal(port->dd->pdev))
1047 goto err_fault;
1048 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1049 goto err_fault;
1050
1051 /*
1052 * Ignore s_active bit 0 of array element 0.
1053 * This bit will always be set
1054 */
1055 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1056 for (n = 1; n < port->dd->slot_groups; n++)
1057 active |= readl(port->s_active[n]);
1058
1059 if (!active)
1060 break;
1061 } while (time_before(jiffies, to));
1062
1063 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1064 return active ? -EBUSY : 0;
1065 err_fault:
1066 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1067 return -EFAULT;
1068 }
1069
1070 /*
1071 * Execute an internal command and wait for the completion.
1072 *
1073 * @port Pointer to the port data structure.
1074 * @fis Pointer to the FIS that describes the command.
1075 * @fis_len Length in WORDS of the FIS.
1076 * @buffer DMA accessible for command data.
1077 * @buf_len Length, in bytes, of the data buffer.
1078 * @opts Command header options, excluding the FIS length
1079 * and the number of PRD entries.
1080 * @timeout Time in ms to wait for the command to complete.
1081 *
1082 * return value
1083 * 0 Command completed successfully.
1084 * -EFAULT The buffer address is not correctly aligned.
1085 * -EBUSY Internal command or other IO in progress.
1086 * -EAGAIN Time out waiting for command to complete.
1087 */
1088 static int mtip_exec_internal_command(struct mtip_port *port,
1089 struct host_to_dev_fis *fis,
1090 int fis_len,
1091 dma_addr_t buffer,
1092 int buf_len,
1093 u32 opts,
1094 gfp_t atomic,
1095 unsigned long timeout)
1096 {
1097 struct mtip_cmd_sg *command_sg;
1098 DECLARE_COMPLETION_ONSTACK(wait);
1099 struct mtip_cmd *int_cmd;
1100 struct driver_data *dd = port->dd;
1101 int rv = 0;
1102
1103 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1104 if (buffer & 0x00000007) {
1105 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1106 return -EFAULT;
1107 }
1108
1109 int_cmd = mtip_get_int_command(dd);
1110
1111 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1112
1113 if (fis->command == ATA_CMD_SEC_ERASE_PREP)
1114 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1115
1116 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1117
1118 if (atomic == GFP_KERNEL) {
1119 if (fis->command != ATA_CMD_STANDBYNOW1) {
1120 /* wait for io to complete if non atomic */
1121 if (mtip_quiesce_io(port,
1122 MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
1123 dev_warn(&dd->pdev->dev,
1124 "Failed to quiesce IO\n");
1125 mtip_put_int_command(dd, int_cmd);
1126 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1127 wake_up_interruptible(&port->svc_wait);
1128 return -EBUSY;
1129 }
1130 }
1131
1132 /* Set the completion function and data for the command. */
1133 int_cmd->comp_data = &wait;
1134 int_cmd->comp_func = mtip_completion;
1135
1136 } else {
1137 /* Clear completion - we're going to poll */
1138 int_cmd->comp_data = NULL;
1139 int_cmd->comp_func = mtip_null_completion;
1140 }
1141
1142 /* Copy the command to the command table */
1143 memcpy(int_cmd->command, fis, fis_len*4);
1144
1145 /* Populate the SG list */
1146 int_cmd->command_header->opts =
1147 __force_bit2int cpu_to_le32(opts | fis_len);
1148 if (buf_len) {
1149 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1150
1151 command_sg->info =
1152 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1153 command_sg->dba =
1154 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1155 command_sg->dba_upper =
1156 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1157
1158 int_cmd->command_header->opts |=
1159 __force_bit2int cpu_to_le32((1 << 16));
1160 }
1161
1162 /* Populate the command header */
1163 int_cmd->command_header->byte_count = 0;
1164
1165 /* Issue the command to the hardware */
1166 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1167
1168 if (atomic == GFP_KERNEL) {
1169 /* Wait for the command to complete or timeout. */
1170 if ((rv = wait_for_completion_interruptible_timeout(
1171 &wait,
1172 msecs_to_jiffies(timeout))) <= 0) {
1173 if (rv == -ERESTARTSYS) { /* interrupted */
1174 dev_err(&dd->pdev->dev,
1175 "Internal command [%02X] was interrupted after %lu ms\n",
1176 fis->command, timeout);
1177 rv = -EINTR;
1178 goto exec_ic_exit;
1179 } else if (rv == 0) /* timeout */
1180 dev_err(&dd->pdev->dev,
1181 "Internal command did not complete [%02X] within timeout of %lu ms\n",
1182 fis->command, timeout);
1183 else
1184 dev_err(&dd->pdev->dev,
1185 "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
1186 fis->command, rv, timeout);
1187
1188 if (mtip_check_surprise_removal(dd->pdev) ||
1189 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1190 &dd->dd_flag)) {
1191 dev_err(&dd->pdev->dev,
1192 "Internal command [%02X] wait returned due to SR\n",
1193 fis->command);
1194 rv = -ENXIO;
1195 goto exec_ic_exit;
1196 }
1197 mtip_device_reset(dd); /* recover from timeout issue */
1198 rv = -EAGAIN;
1199 goto exec_ic_exit;
1200 }
1201 } else {
1202 u32 hba_stat, port_stat;
1203
1204 /* Spin for <timeout> checking if command still outstanding */
1205 timeout = jiffies + msecs_to_jiffies(timeout);
1206 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1207 & (1 << MTIP_TAG_INTERNAL))
1208 && time_before(jiffies, timeout)) {
1209 if (mtip_check_surprise_removal(dd->pdev)) {
1210 rv = -ENXIO;
1211 goto exec_ic_exit;
1212 }
1213 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1214 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1215 &dd->dd_flag)) {
1216 rv = -ENXIO;
1217 goto exec_ic_exit;
1218 }
1219 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1220 if (!port_stat)
1221 continue;
1222
1223 if (port_stat & PORT_IRQ_ERR) {
1224 dev_err(&dd->pdev->dev,
1225 "Internal command [%02X] failed\n",
1226 fis->command);
1227 mtip_device_reset(dd);
1228 rv = -EIO;
1229 goto exec_ic_exit;
1230 } else {
1231 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1232 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1233 if (hba_stat)
1234 writel(hba_stat,
1235 dd->mmio + HOST_IRQ_STAT);
1236 }
1237 break;
1238 }
1239 }
1240
1241 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1242 & (1 << MTIP_TAG_INTERNAL)) {
1243 rv = -ENXIO;
1244 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1245 mtip_device_reset(dd);
1246 rv = -EAGAIN;
1247 }
1248 }
1249 exec_ic_exit:
1250 /* Clear the allocated and active bits for the internal command. */
1251 mtip_put_int_command(dd, int_cmd);
1252 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1253 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1254 /* NCQ paused */
1255 return rv;
1256 }
1257 wake_up_interruptible(&port->svc_wait);
1258
1259 return rv;
1260 }
1261
1262 /*
1263 * Byte-swap ATA ID strings.
1264 *
1265 * ATA identify data contains strings in byte-swapped 16-bit words.
1266 * They must be swapped (on all architectures) to be usable as C strings.
1267 * This function swaps bytes in-place.
1268 *
1269 * @buf The buffer location of the string
1270 * @len The number of bytes to swap
1271 *
1272 * return value
1273 * None
1274 */
1275 static inline void ata_swap_string(u16 *buf, unsigned int len)
1276 {
1277 int i;
1278 for (i = 0; i < (len/2); i++)
1279 be16_to_cpus(&buf[i]);
1280 }
1281
1282 static void mtip_set_timeout(struct driver_data *dd,
1283 struct host_to_dev_fis *fis,
1284 unsigned int *timeout, u8 erasemode)
1285 {
1286 switch (fis->command) {
1287 case ATA_CMD_DOWNLOAD_MICRO:
1288 *timeout = 120000; /* 2 minutes */
1289 break;
1290 case ATA_CMD_SEC_ERASE_UNIT:
1291 case 0xFC:
1292 if (erasemode)
1293 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1294 else
1295 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1296 break;
1297 case ATA_CMD_STANDBYNOW1:
1298 *timeout = 120000; /* 2 minutes */
1299 break;
1300 case 0xF7:
1301 case 0xFA:
1302 *timeout = 60000; /* 60 seconds */
1303 break;
1304 case ATA_CMD_SMART:
1305 *timeout = 15000; /* 15 seconds */
1306 break;
1307 default:
1308 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
1309 break;
1310 }
1311 }
1312
1313 /*
1314 * Request the device identity information.
1315 *
1316 * If a user space buffer is not specified, i.e. is NULL, the
1317 * identify information is still read from the drive and placed
1318 * into the identify data buffer (@e port->identify) in the
1319 * port data structure.
1320 * When the identify buffer contains valid identify information @e
1321 * port->identify_valid is non-zero.
1322 *
1323 * @port Pointer to the port structure.
1324 * @user_buffer A user space buffer where the identify data should be
1325 * copied.
1326 *
1327 * return value
1328 * 0 Command completed successfully.
1329 * -EFAULT An error occurred while coping data to the user buffer.
1330 * -1 Command failed.
1331 */
1332 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1333 {
1334 int rv = 0;
1335 struct host_to_dev_fis fis;
1336
1337 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1338 return -EFAULT;
1339
1340 /* Build the FIS. */
1341 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1342 fis.type = 0x27;
1343 fis.opts = 1 << 7;
1344 fis.command = ATA_CMD_ID_ATA;
1345
1346 /* Set the identify information as invalid. */
1347 port->identify_valid = 0;
1348
1349 /* Clear the identify information. */
1350 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1351
1352 /* Execute the command. */
1353 if (mtip_exec_internal_command(port,
1354 &fis,
1355 5,
1356 port->identify_dma,
1357 sizeof(u16) * ATA_ID_WORDS,
1358 0,
1359 GFP_KERNEL,
1360 MTIP_INT_CMD_TIMEOUT_MS)
1361 < 0) {
1362 rv = -1;
1363 goto out;
1364 }
1365
1366 /*
1367 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1368 * perform field-sensitive swapping on the string fields.
1369 * See the kernel use of ata_id_string() for proof of this.
1370 */
1371 #ifdef __LITTLE_ENDIAN
1372 ata_swap_string(port->identify + 27, 40); /* model string*/
1373 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1374 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1375 #else
1376 {
1377 int i;
1378 for (i = 0; i < ATA_ID_WORDS; i++)
1379 port->identify[i] = le16_to_cpu(port->identify[i]);
1380 }
1381 #endif
1382
1383 /* Check security locked state */
1384 if (port->identify[128] & 0x4)
1385 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1386 else
1387 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1388
1389 #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
1390 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1391 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1392 port->dd->trim_supp = true;
1393 else
1394 #endif
1395 port->dd->trim_supp = false;
1396
1397 /* Set the identify buffer as valid. */
1398 port->identify_valid = 1;
1399
1400 if (user_buffer) {
1401 if (copy_to_user(
1402 user_buffer,
1403 port->identify,
1404 ATA_ID_WORDS * sizeof(u16))) {
1405 rv = -EFAULT;
1406 goto out;
1407 }
1408 }
1409
1410 out:
1411 return rv;
1412 }
1413
1414 /*
1415 * Issue a standby immediate command to the device.
1416 *
1417 * @port Pointer to the port structure.
1418 *
1419 * return value
1420 * 0 Command was executed successfully.
1421 * -1 An error occurred while executing the command.
1422 */
1423 static int mtip_standby_immediate(struct mtip_port *port)
1424 {
1425 int rv;
1426 struct host_to_dev_fis fis;
1427 unsigned long start;
1428 unsigned int timeout;
1429
1430 /* Build the FIS. */
1431 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1432 fis.type = 0x27;
1433 fis.opts = 1 << 7;
1434 fis.command = ATA_CMD_STANDBYNOW1;
1435
1436 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1437
1438 start = jiffies;
1439 rv = mtip_exec_internal_command(port,
1440 &fis,
1441 5,
1442 0,
1443 0,
1444 0,
1445 GFP_ATOMIC,
1446 timeout);
1447 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1448 jiffies_to_msecs(jiffies - start));
1449 if (rv)
1450 dev_warn(&port->dd->pdev->dev,
1451 "STANDBY IMMEDIATE command failed.\n");
1452
1453 return rv;
1454 }
1455
1456 /*
1457 * Issue a READ LOG EXT command to the device.
1458 *
1459 * @port pointer to the port structure.
1460 * @page page number to fetch
1461 * @buffer pointer to buffer
1462 * @buffer_dma dma address corresponding to @buffer
1463 * @sectors page length to fetch, in sectors
1464 *
1465 * return value
1466 * @rv return value from mtip_exec_internal_command()
1467 */
1468 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1469 dma_addr_t buffer_dma, unsigned int sectors)
1470 {
1471 struct host_to_dev_fis fis;
1472
1473 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1474 fis.type = 0x27;
1475 fis.opts = 1 << 7;
1476 fis.command = ATA_CMD_READ_LOG_EXT;
1477 fis.sect_count = sectors & 0xFF;
1478 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1479 fis.lba_low = page;
1480 fis.lba_mid = 0;
1481 fis.device = ATA_DEVICE_OBS;
1482
1483 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1484
1485 return mtip_exec_internal_command(port,
1486 &fis,
1487 5,
1488 buffer_dma,
1489 sectors * ATA_SECT_SIZE,
1490 0,
1491 GFP_ATOMIC,
1492 MTIP_INT_CMD_TIMEOUT_MS);
1493 }
1494
1495 /*
1496 * Issue a SMART READ DATA command to the device.
1497 *
1498 * @port pointer to the port structure.
1499 * @buffer pointer to buffer
1500 * @buffer_dma dma address corresponding to @buffer
1501 *
1502 * return value
1503 * @rv return value from mtip_exec_internal_command()
1504 */
1505 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1506 dma_addr_t buffer_dma)
1507 {
1508 struct host_to_dev_fis fis;
1509
1510 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1511 fis.type = 0x27;
1512 fis.opts = 1 << 7;
1513 fis.command = ATA_CMD_SMART;
1514 fis.features = 0xD0;
1515 fis.sect_count = 1;
1516 fis.lba_mid = 0x4F;
1517 fis.lba_hi = 0xC2;
1518 fis.device = ATA_DEVICE_OBS;
1519
1520 return mtip_exec_internal_command(port,
1521 &fis,
1522 5,
1523 buffer_dma,
1524 ATA_SECT_SIZE,
1525 0,
1526 GFP_ATOMIC,
1527 15000);
1528 }
1529
1530 /*
1531 * Get the value of a smart attribute
1532 *
1533 * @port pointer to the port structure
1534 * @id attribute number
1535 * @attrib pointer to return attrib information corresponding to @id
1536 *
1537 * return value
1538 * -EINVAL NULL buffer passed or unsupported attribute @id.
1539 * -EPERM Identify data not valid, SMART not supported or not enabled
1540 */
1541 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1542 struct smart_attr *attrib)
1543 {
1544 int rv, i;
1545 struct smart_attr *pattr;
1546
1547 if (!attrib)
1548 return -EINVAL;
1549
1550 if (!port->identify_valid) {
1551 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1552 return -EPERM;
1553 }
1554 if (!(port->identify[82] & 0x1)) {
1555 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1556 return -EPERM;
1557 }
1558 if (!(port->identify[85] & 0x1)) {
1559 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1560 return -EPERM;
1561 }
1562
1563 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1564 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1565 if (rv) {
1566 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1567 return rv;
1568 }
1569
1570 pattr = (struct smart_attr *)(port->smart_buf + 2);
1571 for (i = 0; i < 29; i++, pattr++)
1572 if (pattr->attr_id == id) {
1573 memcpy(attrib, pattr, sizeof(struct smart_attr));
1574 break;
1575 }
1576
1577 if (i == 29) {
1578 dev_warn(&port->dd->pdev->dev,
1579 "Query for invalid SMART attribute ID\n");
1580 rv = -EINVAL;
1581 }
1582
1583 return rv;
1584 }
1585
1586 /*
1587 * Trim unused sectors
1588 *
1589 * @dd pointer to driver_data structure
1590 * @lba starting lba
1591 * @len # of 512b sectors to trim
1592 *
1593 * return value
1594 * -ENOMEM Out of dma memory
1595 * -EINVAL Invalid parameters passed in, trim not supported
1596 * -EIO Error submitting trim request to hw
1597 */
1598 static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1599 unsigned int len)
1600 {
1601 int i, rv = 0;
1602 u64 tlba, tlen, sect_left;
1603 struct mtip_trim_entry *buf;
1604 dma_addr_t dma_addr;
1605 struct host_to_dev_fis fis;
1606
1607 if (!len || dd->trim_supp == false)
1608 return -EINVAL;
1609
1610 /* Trim request too big */
1611 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1612
1613 /* Trim request not aligned on 4k boundary */
1614 WARN_ON(len % 8 != 0);
1615
1616 /* Warn if vu_trim structure is too big */
1617 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1618
1619 /* Allocate a DMA buffer for the trim structure */
1620 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1621 GFP_KERNEL);
1622 if (!buf)
1623 return -ENOMEM;
1624 memset(buf, 0, ATA_SECT_SIZE);
1625
1626 for (i = 0, sect_left = len, tlba = lba;
1627 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1628 i++) {
1629 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1630 MTIP_MAX_TRIM_ENTRY_LEN :
1631 sect_left);
1632 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1633 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1634 tlba += tlen;
1635 sect_left -= tlen;
1636 }
1637 WARN_ON(sect_left != 0);
1638
1639 /* Build the fis */
1640 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1641 fis.type = 0x27;
1642 fis.opts = 1 << 7;
1643 fis.command = 0xfb;
1644 fis.features = 0x60;
1645 fis.sect_count = 1;
1646 fis.device = ATA_DEVICE_OBS;
1647
1648 if (mtip_exec_internal_command(dd->port,
1649 &fis,
1650 5,
1651 dma_addr,
1652 ATA_SECT_SIZE,
1653 0,
1654 GFP_KERNEL,
1655 MTIP_TRIM_TIMEOUT_MS) < 0)
1656 rv = -EIO;
1657
1658 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1659 return rv;
1660 }
1661
1662 /*
1663 * Get the drive capacity.
1664 *
1665 * @dd Pointer to the device data structure.
1666 * @sectors Pointer to the variable that will receive the sector count.
1667 *
1668 * return value
1669 * 1 Capacity was returned successfully.
1670 * 0 The identify information is invalid.
1671 */
1672 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1673 {
1674 struct mtip_port *port = dd->port;
1675 u64 total, raw0, raw1, raw2, raw3;
1676 raw0 = port->identify[100];
1677 raw1 = port->identify[101];
1678 raw2 = port->identify[102];
1679 raw3 = port->identify[103];
1680 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1681 *sectors = total;
1682 return (bool) !!port->identify_valid;
1683 }
1684
1685 /*
1686 * Display the identify command data.
1687 *
1688 * @port Pointer to the port data structure.
1689 *
1690 * return value
1691 * None
1692 */
1693 static void mtip_dump_identify(struct mtip_port *port)
1694 {
1695 sector_t sectors;
1696 unsigned short revid;
1697 char cbuf[42];
1698
1699 if (!port->identify_valid)
1700 return;
1701
1702 strlcpy(cbuf, (char *)(port->identify+10), 21);
1703 dev_info(&port->dd->pdev->dev,
1704 "Serial No.: %s\n", cbuf);
1705
1706 strlcpy(cbuf, (char *)(port->identify+23), 9);
1707 dev_info(&port->dd->pdev->dev,
1708 "Firmware Ver.: %s\n", cbuf);
1709
1710 strlcpy(cbuf, (char *)(port->identify+27), 41);
1711 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1712
1713 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1714 port->identify[128],
1715 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1716
1717 if (mtip_hw_get_capacity(port->dd, &sectors))
1718 dev_info(&port->dd->pdev->dev,
1719 "Capacity: %llu sectors (%llu MB)\n",
1720 (u64)sectors,
1721 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1722
1723 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1724 switch (revid & 0xFF) {
1725 case 0x1:
1726 strlcpy(cbuf, "A0", 3);
1727 break;
1728 case 0x3:
1729 strlcpy(cbuf, "A2", 3);
1730 break;
1731 default:
1732 strlcpy(cbuf, "?", 2);
1733 break;
1734 }
1735 dev_info(&port->dd->pdev->dev,
1736 "Card Type: %s\n", cbuf);
1737 }
1738
1739 /*
1740 * Map the commands scatter list into the command table.
1741 *
1742 * @command Pointer to the command.
1743 * @nents Number of scatter list entries.
1744 *
1745 * return value
1746 * None
1747 */
1748 static inline void fill_command_sg(struct driver_data *dd,
1749 struct mtip_cmd *command,
1750 int nents)
1751 {
1752 int n;
1753 unsigned int dma_len;
1754 struct mtip_cmd_sg *command_sg;
1755 struct scatterlist *sg = command->sg;
1756
1757 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1758
1759 for (n = 0; n < nents; n++) {
1760 dma_len = sg_dma_len(sg);
1761 if (dma_len > 0x400000)
1762 dev_err(&dd->pdev->dev,
1763 "DMA segment length truncated\n");
1764 command_sg->info = __force_bit2int
1765 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1766 command_sg->dba = __force_bit2int
1767 cpu_to_le32(sg_dma_address(sg));
1768 command_sg->dba_upper = __force_bit2int
1769 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1770 command_sg++;
1771 sg++;
1772 }
1773 }
1774
1775 /*
1776 * @brief Execute a drive command.
1777 *
1778 * return value 0 The command completed successfully.
1779 * return value -1 An error occurred while executing the command.
1780 */
1781 static int exec_drive_task(struct mtip_port *port, u8 *command)
1782 {
1783 struct host_to_dev_fis fis;
1784 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1785 unsigned int to;
1786
1787 /* Build the FIS. */
1788 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1789 fis.type = 0x27;
1790 fis.opts = 1 << 7;
1791 fis.command = command[0];
1792 fis.features = command[1];
1793 fis.sect_count = command[2];
1794 fis.sector = command[3];
1795 fis.cyl_low = command[4];
1796 fis.cyl_hi = command[5];
1797 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1798
1799 mtip_set_timeout(port->dd, &fis, &to, 0);
1800
1801 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1802 __func__,
1803 command[0],
1804 command[1],
1805 command[2],
1806 command[3],
1807 command[4],
1808 command[5],
1809 command[6]);
1810
1811 /* Execute the command. */
1812 if (mtip_exec_internal_command(port,
1813 &fis,
1814 5,
1815 0,
1816 0,
1817 0,
1818 GFP_KERNEL,
1819 to) < 0) {
1820 return -1;
1821 }
1822
1823 command[0] = reply->command; /* Status*/
1824 command[1] = reply->features; /* Error*/
1825 command[4] = reply->cyl_low;
1826 command[5] = reply->cyl_hi;
1827
1828 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1829 __func__,
1830 command[0],
1831 command[1],
1832 command[4],
1833 command[5]);
1834
1835 return 0;
1836 }
1837
1838 /*
1839 * @brief Execute a drive command.
1840 *
1841 * @param port Pointer to the port data structure.
1842 * @param command Pointer to the user specified command parameters.
1843 * @param user_buffer Pointer to the user space buffer where read sector
1844 * data should be copied.
1845 *
1846 * return value 0 The command completed successfully.
1847 * return value -EFAULT An error occurred while copying the completion
1848 * data to the user space buffer.
1849 * return value -1 An error occurred while executing the command.
1850 */
1851 static int exec_drive_command(struct mtip_port *port, u8 *command,
1852 void __user *user_buffer)
1853 {
1854 struct host_to_dev_fis fis;
1855 struct host_to_dev_fis *reply;
1856 u8 *buf = NULL;
1857 dma_addr_t dma_addr = 0;
1858 int rv = 0, xfer_sz = command[3];
1859 unsigned int to;
1860
1861 if (xfer_sz) {
1862 if (!user_buffer)
1863 return -EFAULT;
1864
1865 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1866 ATA_SECT_SIZE * xfer_sz,
1867 &dma_addr,
1868 GFP_KERNEL);
1869 if (!buf) {
1870 dev_err(&port->dd->pdev->dev,
1871 "Memory allocation failed (%d bytes)\n",
1872 ATA_SECT_SIZE * xfer_sz);
1873 return -ENOMEM;
1874 }
1875 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1876 }
1877
1878 /* Build the FIS. */
1879 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1880 fis.type = 0x27;
1881 fis.opts = 1 << 7;
1882 fis.command = command[0];
1883 fis.features = command[2];
1884 fis.sect_count = command[3];
1885 if (fis.command == ATA_CMD_SMART) {
1886 fis.sector = command[1];
1887 fis.cyl_low = 0x4F;
1888 fis.cyl_hi = 0xC2;
1889 }
1890
1891 mtip_set_timeout(port->dd, &fis, &to, 0);
1892
1893 if (xfer_sz)
1894 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1895 else
1896 reply = (port->rxfis + RX_FIS_D2H_REG);
1897
1898 dbg_printk(MTIP_DRV_NAME
1899 " %s: User Command: cmd %x, sect %x, "
1900 "feat %x, sectcnt %x\n",
1901 __func__,
1902 command[0],
1903 command[1],
1904 command[2],
1905 command[3]);
1906
1907 /* Execute the command. */
1908 if (mtip_exec_internal_command(port,
1909 &fis,
1910 5,
1911 (xfer_sz ? dma_addr : 0),
1912 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1913 0,
1914 GFP_KERNEL,
1915 to)
1916 < 0) {
1917 rv = -EFAULT;
1918 goto exit_drive_command;
1919 }
1920
1921 /* Collect the completion status. */
1922 command[0] = reply->command; /* Status*/
1923 command[1] = reply->features; /* Error*/
1924 command[2] = reply->sect_count;
1925
1926 dbg_printk(MTIP_DRV_NAME
1927 " %s: Completion Status: stat %x, "
1928 "err %x, nsect %x\n",
1929 __func__,
1930 command[0],
1931 command[1],
1932 command[2]);
1933
1934 if (xfer_sz) {
1935 if (copy_to_user(user_buffer,
1936 buf,
1937 ATA_SECT_SIZE * command[3])) {
1938 rv = -EFAULT;
1939 goto exit_drive_command;
1940 }
1941 }
1942 exit_drive_command:
1943 if (buf)
1944 dmam_free_coherent(&port->dd->pdev->dev,
1945 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1946 return rv;
1947 }
1948
1949 /*
1950 * Indicates whether a command has a single sector payload.
1951 *
1952 * @command passed to the device to perform the certain event.
1953 * @features passed to the device to perform the certain event.
1954 *
1955 * return value
1956 * 1 command is one that always has a single sector payload,
1957 * regardless of the value in the Sector Count field.
1958 * 0 otherwise
1959 *
1960 */
1961 static unsigned int implicit_sector(unsigned char command,
1962 unsigned char features)
1963 {
1964 unsigned int rv = 0;
1965
1966 /* list of commands that have an implicit sector count of 1 */
1967 switch (command) {
1968 case ATA_CMD_SEC_SET_PASS:
1969 case ATA_CMD_SEC_UNLOCK:
1970 case ATA_CMD_SEC_ERASE_PREP:
1971 case ATA_CMD_SEC_ERASE_UNIT:
1972 case ATA_CMD_SEC_FREEZE_LOCK:
1973 case ATA_CMD_SEC_DISABLE_PASS:
1974 case ATA_CMD_PMP_READ:
1975 case ATA_CMD_PMP_WRITE:
1976 rv = 1;
1977 break;
1978 case ATA_CMD_SET_MAX:
1979 if (features == ATA_SET_MAX_UNLOCK)
1980 rv = 1;
1981 break;
1982 case ATA_CMD_SMART:
1983 if ((features == ATA_SMART_READ_VALUES) ||
1984 (features == ATA_SMART_READ_THRESHOLDS))
1985 rv = 1;
1986 break;
1987 case ATA_CMD_CONF_OVERLAY:
1988 if ((features == ATA_DCO_IDENTIFY) ||
1989 (features == ATA_DCO_SET))
1990 rv = 1;
1991 break;
1992 }
1993 return rv;
1994 }
1995
1996 /*
1997 * Executes a taskfile
1998 * See ide_taskfile_ioctl() for derivation
1999 */
2000 static int exec_drive_taskfile(struct driver_data *dd,
2001 void __user *buf,
2002 ide_task_request_t *req_task,
2003 int outtotal)
2004 {
2005 struct host_to_dev_fis fis;
2006 struct host_to_dev_fis *reply;
2007 u8 *outbuf = NULL;
2008 u8 *inbuf = NULL;
2009 dma_addr_t outbuf_dma = 0;
2010 dma_addr_t inbuf_dma = 0;
2011 dma_addr_t dma_buffer = 0;
2012 int err = 0;
2013 unsigned int taskin = 0;
2014 unsigned int taskout = 0;
2015 u8 nsect = 0;
2016 unsigned int timeout;
2017 unsigned int force_single_sector;
2018 unsigned int transfer_size;
2019 unsigned long task_file_data;
2020 int intotal = outtotal + req_task->out_size;
2021 int erasemode = 0;
2022
2023 taskout = req_task->out_size;
2024 taskin = req_task->in_size;
2025 /* 130560 = 512 * 0xFF*/
2026 if (taskin > 130560 || taskout > 130560) {
2027 err = -EINVAL;
2028 goto abort;
2029 }
2030
2031 if (taskout) {
2032 outbuf = memdup_user(buf + outtotal, taskout);
2033 if (IS_ERR(outbuf)) {
2034 err = PTR_ERR(outbuf);
2035 outbuf = NULL;
2036 goto abort;
2037 }
2038 outbuf_dma = pci_map_single(dd->pdev,
2039 outbuf,
2040 taskout,
2041 DMA_TO_DEVICE);
2042 if (outbuf_dma == 0) {
2043 err = -ENOMEM;
2044 goto abort;
2045 }
2046 dma_buffer = outbuf_dma;
2047 }
2048
2049 if (taskin) {
2050 inbuf = memdup_user(buf + intotal, taskin);
2051 if (IS_ERR(inbuf)) {
2052 err = PTR_ERR(inbuf);
2053 inbuf = NULL;
2054 goto abort;
2055 }
2056 inbuf_dma = pci_map_single(dd->pdev,
2057 inbuf,
2058 taskin, DMA_FROM_DEVICE);
2059 if (inbuf_dma == 0) {
2060 err = -ENOMEM;
2061 goto abort;
2062 }
2063 dma_buffer = inbuf_dma;
2064 }
2065
2066 /* only supports PIO and non-data commands from this ioctl. */
2067 switch (req_task->data_phase) {
2068 case TASKFILE_OUT:
2069 nsect = taskout / ATA_SECT_SIZE;
2070 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2071 break;
2072 case TASKFILE_IN:
2073 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2074 break;
2075 case TASKFILE_NO_DATA:
2076 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2077 break;
2078 default:
2079 err = -EINVAL;
2080 goto abort;
2081 }
2082
2083 /* Build the FIS. */
2084 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2085
2086 fis.type = 0x27;
2087 fis.opts = 1 << 7;
2088 fis.command = req_task->io_ports[7];
2089 fis.features = req_task->io_ports[1];
2090 fis.sect_count = req_task->io_ports[2];
2091 fis.lba_low = req_task->io_ports[3];
2092 fis.lba_mid = req_task->io_ports[4];
2093 fis.lba_hi = req_task->io_ports[5];
2094 /* Clear the dev bit*/
2095 fis.device = req_task->io_ports[6] & ~0x10;
2096
2097 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2098 req_task->in_flags.all =
2099 IDE_TASKFILE_STD_IN_FLAGS |
2100 (IDE_HOB_STD_IN_FLAGS << 8);
2101 fis.lba_low_ex = req_task->hob_ports[3];
2102 fis.lba_mid_ex = req_task->hob_ports[4];
2103 fis.lba_hi_ex = req_task->hob_ports[5];
2104 fis.features_ex = req_task->hob_ports[1];
2105 fis.sect_cnt_ex = req_task->hob_ports[2];
2106
2107 } else {
2108 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2109 }
2110
2111 force_single_sector = implicit_sector(fis.command, fis.features);
2112
2113 if ((taskin || taskout) && (!fis.sect_count)) {
2114 if (nsect)
2115 fis.sect_count = nsect;
2116 else {
2117 if (!force_single_sector) {
2118 dev_warn(&dd->pdev->dev,
2119 "data movement but "
2120 "sect_count is 0\n");
2121 err = -EINVAL;
2122 goto abort;
2123 }
2124 }
2125 }
2126
2127 dbg_printk(MTIP_DRV_NAME
2128 " %s: cmd %x, feat %x, nsect %x,"
2129 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2130 " head/dev %x\n",
2131 __func__,
2132 fis.command,
2133 fis.features,
2134 fis.sect_count,
2135 fis.lba_low,
2136 fis.lba_mid,
2137 fis.lba_hi,
2138 fis.device);
2139
2140 /* check for erase mode support during secure erase.*/
2141 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
2142 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
2143 erasemode = 1;
2144 }
2145
2146 mtip_set_timeout(dd, &fis, &timeout, erasemode);
2147
2148 /* Determine the correct transfer size.*/
2149 if (force_single_sector)
2150 transfer_size = ATA_SECT_SIZE;
2151 else
2152 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2153
2154 /* Execute the command.*/
2155 if (mtip_exec_internal_command(dd->port,
2156 &fis,
2157 5,
2158 dma_buffer,
2159 transfer_size,
2160 0,
2161 GFP_KERNEL,
2162 timeout) < 0) {
2163 err = -EIO;
2164 goto abort;
2165 }
2166
2167 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2168
2169 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2170 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2171 req_task->io_ports[7] = reply->control;
2172 } else {
2173 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2174 req_task->io_ports[7] = reply->command;
2175 }
2176
2177 /* reclaim the DMA buffers.*/
2178 if (inbuf_dma)
2179 pci_unmap_single(dd->pdev, inbuf_dma,
2180 taskin, DMA_FROM_DEVICE);
2181 if (outbuf_dma)
2182 pci_unmap_single(dd->pdev, outbuf_dma,
2183 taskout, DMA_TO_DEVICE);
2184 inbuf_dma = 0;
2185 outbuf_dma = 0;
2186
2187 /* return the ATA registers to the caller.*/
2188 req_task->io_ports[1] = reply->features;
2189 req_task->io_ports[2] = reply->sect_count;
2190 req_task->io_ports[3] = reply->lba_low;
2191 req_task->io_ports[4] = reply->lba_mid;
2192 req_task->io_ports[5] = reply->lba_hi;
2193 req_task->io_ports[6] = reply->device;
2194
2195 if (req_task->out_flags.all & 1) {
2196
2197 req_task->hob_ports[3] = reply->lba_low_ex;
2198 req_task->hob_ports[4] = reply->lba_mid_ex;
2199 req_task->hob_ports[5] = reply->lba_hi_ex;
2200 req_task->hob_ports[1] = reply->features_ex;
2201 req_task->hob_ports[2] = reply->sect_cnt_ex;
2202 }
2203 dbg_printk(MTIP_DRV_NAME
2204 " %s: Completion: stat %x,"
2205 "err %x, sect_cnt %x, lbalo %x,"
2206 "lbamid %x, lbahi %x, dev %x\n",
2207 __func__,
2208 req_task->io_ports[7],
2209 req_task->io_ports[1],
2210 req_task->io_ports[2],
2211 req_task->io_ports[3],
2212 req_task->io_ports[4],
2213 req_task->io_ports[5],
2214 req_task->io_ports[6]);
2215
2216 if (taskout) {
2217 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2218 err = -EFAULT;
2219 goto abort;
2220 }
2221 }
2222 if (taskin) {
2223 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2224 err = -EFAULT;
2225 goto abort;
2226 }
2227 }
2228 abort:
2229 if (inbuf_dma)
2230 pci_unmap_single(dd->pdev, inbuf_dma,
2231 taskin, DMA_FROM_DEVICE);
2232 if (outbuf_dma)
2233 pci_unmap_single(dd->pdev, outbuf_dma,
2234 taskout, DMA_TO_DEVICE);
2235 kfree(outbuf);
2236 kfree(inbuf);
2237
2238 return err;
2239 }
2240
2241 /*
2242 * Handle IOCTL calls from the Block Layer.
2243 *
2244 * This function is called by the Block Layer when it receives an IOCTL
2245 * command that it does not understand. If the IOCTL command is not supported
2246 * this function returns -ENOTTY.
2247 *
2248 * @dd Pointer to the driver data structure.
2249 * @cmd IOCTL command passed from the Block Layer.
2250 * @arg IOCTL argument passed from the Block Layer.
2251 *
2252 * return value
2253 * 0 The IOCTL completed successfully.
2254 * -ENOTTY The specified command is not supported.
2255 * -EFAULT An error occurred copying data to a user space buffer.
2256 * -EIO An error occurred while executing the command.
2257 */
2258 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2259 unsigned long arg)
2260 {
2261 switch (cmd) {
2262 case HDIO_GET_IDENTITY:
2263 {
2264 if (copy_to_user((void __user *)arg, dd->port->identify,
2265 sizeof(u16) * ATA_ID_WORDS))
2266 return -EFAULT;
2267 break;
2268 }
2269 case HDIO_DRIVE_CMD:
2270 {
2271 u8 drive_command[4];
2272
2273 /* Copy the user command info to our buffer. */
2274 if (copy_from_user(drive_command,
2275 (void __user *) arg,
2276 sizeof(drive_command)))
2277 return -EFAULT;
2278
2279 /* Execute the drive command. */
2280 if (exec_drive_command(dd->port,
2281 drive_command,
2282 (void __user *) (arg+4)))
2283 return -EIO;
2284
2285 /* Copy the status back to the users buffer. */
2286 if (copy_to_user((void __user *) arg,
2287 drive_command,
2288 sizeof(drive_command)))
2289 return -EFAULT;
2290
2291 break;
2292 }
2293 case HDIO_DRIVE_TASK:
2294 {
2295 u8 drive_command[7];
2296
2297 /* Copy the user command info to our buffer. */
2298 if (copy_from_user(drive_command,
2299 (void __user *) arg,
2300 sizeof(drive_command)))
2301 return -EFAULT;
2302
2303 /* Execute the drive command. */
2304 if (exec_drive_task(dd->port, drive_command))
2305 return -EIO;
2306
2307 /* Copy the status back to the users buffer. */
2308 if (copy_to_user((void __user *) arg,
2309 drive_command,
2310 sizeof(drive_command)))
2311 return -EFAULT;
2312
2313 break;
2314 }
2315 case HDIO_DRIVE_TASKFILE: {
2316 ide_task_request_t req_task;
2317 int ret, outtotal;
2318
2319 if (copy_from_user(&req_task, (void __user *) arg,
2320 sizeof(req_task)))
2321 return -EFAULT;
2322
2323 outtotal = sizeof(req_task);
2324
2325 ret = exec_drive_taskfile(dd, (void __user *) arg,
2326 &req_task, outtotal);
2327
2328 if (copy_to_user((void __user *) arg, &req_task,
2329 sizeof(req_task)))
2330 return -EFAULT;
2331
2332 return ret;
2333 }
2334
2335 default:
2336 return -EINVAL;
2337 }
2338 return 0;
2339 }
2340
2341 /*
2342 * Submit an IO to the hw
2343 *
2344 * This function is called by the block layer to issue an io
2345 * to the device. Upon completion, the callback function will
2346 * be called with the data parameter passed as the callback data.
2347 *
2348 * @dd Pointer to the driver data structure.
2349 * @start First sector to read.
2350 * @nsect Number of sectors to read.
2351 * @nents Number of entries in scatter list for the read command.
2352 * @tag The tag of this read command.
2353 * @callback Pointer to the function that should be called
2354 * when the read completes.
2355 * @data Callback data passed to the callback function
2356 * when the read completes.
2357 * @dir Direction (read or write)
2358 *
2359 * return value
2360 * None
2361 */
2362 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2363 struct mtip_cmd *command, int nents,
2364 struct blk_mq_hw_ctx *hctx)
2365 {
2366 struct host_to_dev_fis *fis;
2367 struct mtip_port *port = dd->port;
2368 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2369 u64 start = blk_rq_pos(rq);
2370 unsigned int nsect = blk_rq_sectors(rq);
2371
2372 /* Map the scatter list for DMA access */
2373 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2374
2375 prefetch(&port->flags);
2376
2377 command->scatter_ents = nents;
2378
2379 /*
2380 * The number of retries for this command before it is
2381 * reported as a failure to the upper layers.
2382 */
2383 command->retries = MTIP_MAX_RETRIES;
2384
2385 /* Fill out fis */
2386 fis = command->command;
2387 fis->type = 0x27;
2388 fis->opts = 1 << 7;
2389 if (dma_dir == DMA_FROM_DEVICE)
2390 fis->command = ATA_CMD_FPDMA_READ;
2391 else
2392 fis->command = ATA_CMD_FPDMA_WRITE;
2393 fis->lba_low = start & 0xFF;
2394 fis->lba_mid = (start >> 8) & 0xFF;
2395 fis->lba_hi = (start >> 16) & 0xFF;
2396 fis->lba_low_ex = (start >> 24) & 0xFF;
2397 fis->lba_mid_ex = (start >> 32) & 0xFF;
2398 fis->lba_hi_ex = (start >> 40) & 0xFF;
2399 fis->device = 1 << 6;
2400 fis->features = nsect & 0xFF;
2401 fis->features_ex = (nsect >> 8) & 0xFF;
2402 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5));
2403 fis->sect_cnt_ex = 0;
2404 fis->control = 0;
2405 fis->res2 = 0;
2406 fis->res3 = 0;
2407 fill_command_sg(dd, command, nents);
2408
2409 if (unlikely(command->unaligned))
2410 fis->device |= 1 << 7;
2411
2412 /* Populate the command header */
2413 command->command_header->opts =
2414 __force_bit2int cpu_to_le32(
2415 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2416 command->command_header->byte_count = 0;
2417
2418 /*
2419 * Set the completion function and data for the command
2420 * within this layer.
2421 */
2422 command->comp_data = dd;
2423 command->comp_func = mtip_async_complete;
2424 command->direction = dma_dir;
2425
2426 /*
2427 * To prevent this command from being issued
2428 * if an internal command is in progress or error handling is active.
2429 */
2430 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2431 set_bit(rq->tag, port->cmds_to_issue);
2432 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2433 return;
2434 }
2435
2436 /* Issue the command to the hardware */
2437 mtip_issue_ncq_command(port, rq->tag);
2438 }
2439
2440 /*
2441 * Sysfs status dump.
2442 *
2443 * @dev Pointer to the device structure, passed by the kernrel.
2444 * @attr Pointer to the device_attribute structure passed by the kernel.
2445 * @buf Pointer to the char buffer that will receive the stats info.
2446 *
2447 * return value
2448 * The size, in bytes, of the data copied into buf.
2449 */
2450 static ssize_t mtip_hw_show_status(struct device *dev,
2451 struct device_attribute *attr,
2452 char *buf)
2453 {
2454 struct driver_data *dd = dev_to_disk(dev)->private_data;
2455 int size = 0;
2456
2457 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2458 size += sprintf(buf, "%s", "thermal_shutdown\n");
2459 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2460 size += sprintf(buf, "%s", "write_protect\n");
2461 else
2462 size += sprintf(buf, "%s", "online\n");
2463
2464 return size;
2465 }
2466
2467 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2468
2469 /* debugsfs entries */
2470
2471 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2472 {
2473 int size = 0;
2474 struct driver_data *dd, *tmp;
2475 unsigned long flags;
2476 char id_buf[42];
2477 u16 status = 0;
2478
2479 spin_lock_irqsave(&dev_lock, flags);
2480 size += sprintf(&buf[size], "Devices Present:\n");
2481 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2482 if (dd->pdev) {
2483 if (dd->port &&
2484 dd->port->identify &&
2485 dd->port->identify_valid) {
2486 strlcpy(id_buf,
2487 (char *) (dd->port->identify + 10), 21);
2488 status = *(dd->port->identify + 141);
2489 } else {
2490 memset(id_buf, 0, 42);
2491 status = 0;
2492 }
2493
2494 if (dd->port &&
2495 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2496 size += sprintf(&buf[size],
2497 " device %s %s (ftl rebuild %d %%)\n",
2498 dev_name(&dd->pdev->dev),
2499 id_buf,
2500 status);
2501 } else {
2502 size += sprintf(&buf[size],
2503 " device %s %s\n",
2504 dev_name(&dd->pdev->dev),
2505 id_buf);
2506 }
2507 }
2508 }
2509
2510 size += sprintf(&buf[size], "Devices Being Removed:\n");
2511 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2512 if (dd->pdev) {
2513 if (dd->port &&
2514 dd->port->identify &&
2515 dd->port->identify_valid) {
2516 strlcpy(id_buf,
2517 (char *) (dd->port->identify+10), 21);
2518 status = *(dd->port->identify + 141);
2519 } else {
2520 memset(id_buf, 0, 42);
2521 status = 0;
2522 }
2523
2524 if (dd->port &&
2525 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2526 size += sprintf(&buf[size],
2527 " device %s %s (ftl rebuild %d %%)\n",
2528 dev_name(&dd->pdev->dev),
2529 id_buf,
2530 status);
2531 } else {
2532 size += sprintf(&buf[size],
2533 " device %s %s\n",
2534 dev_name(&dd->pdev->dev),
2535 id_buf);
2536 }
2537 }
2538 }
2539 spin_unlock_irqrestore(&dev_lock, flags);
2540
2541 return size;
2542 }
2543
2544 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2545 size_t len, loff_t *offset)
2546 {
2547 struct driver_data *dd = (struct driver_data *)f->private_data;
2548 int size = *offset;
2549 char *buf;
2550 int rv = 0;
2551
2552 if (!len || *offset)
2553 return 0;
2554
2555 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2556 if (!buf) {
2557 dev_err(&dd->pdev->dev,
2558 "Memory allocation: status buffer\n");
2559 return -ENOMEM;
2560 }
2561
2562 size += show_device_status(NULL, buf);
2563
2564 *offset = size <= len ? size : len;
2565 size = copy_to_user(ubuf, buf, *offset);
2566 if (size)
2567 rv = -EFAULT;
2568
2569 kfree(buf);
2570 return rv ? rv : *offset;
2571 }
2572
2573 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2574 size_t len, loff_t *offset)
2575 {
2576 struct driver_data *dd = (struct driver_data *)f->private_data;
2577 char *buf;
2578 u32 group_allocated;
2579 int size = *offset;
2580 int n, rv = 0;
2581
2582 if (!len || size)
2583 return 0;
2584
2585 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2586 if (!buf) {
2587 dev_err(&dd->pdev->dev,
2588 "Memory allocation: register buffer\n");
2589 return -ENOMEM;
2590 }
2591
2592 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2593
2594 for (n = dd->slot_groups-1; n >= 0; n--)
2595 size += sprintf(&buf[size], "%08X ",
2596 readl(dd->port->s_active[n]));
2597
2598 size += sprintf(&buf[size], "]\n");
2599 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2600
2601 for (n = dd->slot_groups-1; n >= 0; n--)
2602 size += sprintf(&buf[size], "%08X ",
2603 readl(dd->port->cmd_issue[n]));
2604
2605 size += sprintf(&buf[size], "]\n");
2606 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2607
2608 for (n = dd->slot_groups-1; n >= 0; n--)
2609 size += sprintf(&buf[size], "%08X ",
2610 readl(dd->port->completed[n]));
2611
2612 size += sprintf(&buf[size], "]\n");
2613 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2614 readl(dd->port->mmio + PORT_IRQ_STAT));
2615 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2616 readl(dd->mmio + HOST_IRQ_STAT));
2617 size += sprintf(&buf[size], "\n");
2618
2619 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2620
2621 for (n = dd->slot_groups-1; n >= 0; n--) {
2622 if (sizeof(long) > sizeof(u32))
2623 group_allocated =
2624 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2625 else
2626 group_allocated = dd->port->cmds_to_issue[n];
2627 size += sprintf(&buf[size], "%08X ", group_allocated);
2628 }
2629 size += sprintf(&buf[size], "]\n");
2630
2631 *offset = size <= len ? size : len;
2632 size = copy_to_user(ubuf, buf, *offset);
2633 if (size)
2634 rv = -EFAULT;
2635
2636 kfree(buf);
2637 return rv ? rv : *offset;
2638 }
2639
2640 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2641 size_t len, loff_t *offset)
2642 {
2643 struct driver_data *dd = (struct driver_data *)f->private_data;
2644 char *buf;
2645 int size = *offset;
2646 int rv = 0;
2647
2648 if (!len || size)
2649 return 0;
2650
2651 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2652 if (!buf) {
2653 dev_err(&dd->pdev->dev,
2654 "Memory allocation: flag buffer\n");
2655 return -ENOMEM;
2656 }
2657
2658 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2659 dd->port->flags);
2660 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2661 dd->dd_flag);
2662
2663 *offset = size <= len ? size : len;
2664 size = copy_to_user(ubuf, buf, *offset);
2665 if (size)
2666 rv = -EFAULT;
2667
2668 kfree(buf);
2669 return rv ? rv : *offset;
2670 }
2671
2672 static const struct file_operations mtip_device_status_fops = {
2673 .owner = THIS_MODULE,
2674 .open = simple_open,
2675 .read = mtip_hw_read_device_status,
2676 .llseek = no_llseek,
2677 };
2678
2679 static const struct file_operations mtip_regs_fops = {
2680 .owner = THIS_MODULE,
2681 .open = simple_open,
2682 .read = mtip_hw_read_registers,
2683 .llseek = no_llseek,
2684 };
2685
2686 static const struct file_operations mtip_flags_fops = {
2687 .owner = THIS_MODULE,
2688 .open = simple_open,
2689 .read = mtip_hw_read_flags,
2690 .llseek = no_llseek,
2691 };
2692
2693 /*
2694 * Create the sysfs related attributes.
2695 *
2696 * @dd Pointer to the driver data structure.
2697 * @kobj Pointer to the kobj for the block device.
2698 *
2699 * return value
2700 * 0 Operation completed successfully.
2701 * -EINVAL Invalid parameter.
2702 */
2703 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2704 {
2705 if (!kobj || !dd)
2706 return -EINVAL;
2707
2708 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2709 dev_warn(&dd->pdev->dev,
2710 "Error creating 'status' sysfs entry\n");
2711 return 0;
2712 }
2713
2714 /*
2715 * Remove the sysfs related attributes.
2716 *
2717 * @dd Pointer to the driver data structure.
2718 * @kobj Pointer to the kobj for the block device.
2719 *
2720 * return value
2721 * 0 Operation completed successfully.
2722 * -EINVAL Invalid parameter.
2723 */
2724 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2725 {
2726 if (!kobj || !dd)
2727 return -EINVAL;
2728
2729 sysfs_remove_file(kobj, &dev_attr_status.attr);
2730
2731 return 0;
2732 }
2733
2734 static int mtip_hw_debugfs_init(struct driver_data *dd)
2735 {
2736 if (!dfs_parent)
2737 return -1;
2738
2739 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2740 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2741 dev_warn(&dd->pdev->dev,
2742 "Error creating node %s under debugfs\n",
2743 dd->disk->disk_name);
2744 dd->dfs_node = NULL;
2745 return -1;
2746 }
2747
2748 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2749 &mtip_flags_fops);
2750 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2751 &mtip_regs_fops);
2752
2753 return 0;
2754 }
2755
2756 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2757 {
2758 if (dd->dfs_node)
2759 debugfs_remove_recursive(dd->dfs_node);
2760 }
2761
2762 /*
2763 * Perform any init/resume time hardware setup
2764 *
2765 * @dd Pointer to the driver data structure.
2766 *
2767 * return value
2768 * None
2769 */
2770 static inline void hba_setup(struct driver_data *dd)
2771 {
2772 u32 hwdata;
2773 hwdata = readl(dd->mmio + HOST_HSORG);
2774
2775 /* interrupt bug workaround: use only 1 IS bit.*/
2776 writel(hwdata |
2777 HSORG_DISABLE_SLOTGRP_INTR |
2778 HSORG_DISABLE_SLOTGRP_PXIS,
2779 dd->mmio + HOST_HSORG);
2780 }
2781
2782 static int mtip_device_unaligned_constrained(struct driver_data *dd)
2783 {
2784 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2785 }
2786
2787 /*
2788 * Detect the details of the product, and store anything needed
2789 * into the driver data structure. This includes product type and
2790 * version and number of slot groups.
2791 *
2792 * @dd Pointer to the driver data structure.
2793 *
2794 * return value
2795 * None
2796 */
2797 static void mtip_detect_product(struct driver_data *dd)
2798 {
2799 u32 hwdata;
2800 unsigned int rev, slotgroups;
2801
2802 /*
2803 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2804 * info register:
2805 * [15:8] hardware/software interface rev#
2806 * [ 3] asic-style interface
2807 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2808 */
2809 hwdata = readl(dd->mmio + HOST_HSORG);
2810
2811 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2812 dd->slot_groups = 1;
2813
2814 if (hwdata & 0x8) {
2815 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2816 rev = (hwdata & HSORG_HWREV) >> 8;
2817 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2818 dev_info(&dd->pdev->dev,
2819 "ASIC-FPGA design, HS rev 0x%x, "
2820 "%i slot groups [%i slots]\n",
2821 rev,
2822 slotgroups,
2823 slotgroups * 32);
2824
2825 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2826 dev_warn(&dd->pdev->dev,
2827 "Warning: driver only supports "
2828 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2829 slotgroups = MTIP_MAX_SLOT_GROUPS;
2830 }
2831 dd->slot_groups = slotgroups;
2832 return;
2833 }
2834
2835 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2836 }
2837
2838 /*
2839 * Blocking wait for FTL rebuild to complete
2840 *
2841 * @dd Pointer to the DRIVER_DATA structure.
2842 *
2843 * return value
2844 * 0 FTL rebuild completed successfully
2845 * -EFAULT FTL rebuild error/timeout/interruption
2846 */
2847 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2848 {
2849 unsigned long timeout, cnt = 0, start;
2850
2851 dev_warn(&dd->pdev->dev,
2852 "FTL rebuild in progress. Polling for completion.\n");
2853
2854 start = jiffies;
2855 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2856
2857 do {
2858 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2859 &dd->dd_flag)))
2860 return -EFAULT;
2861 if (mtip_check_surprise_removal(dd->pdev))
2862 return -EFAULT;
2863
2864 if (mtip_get_identify(dd->port, NULL) < 0)
2865 return -EFAULT;
2866
2867 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2868 MTIP_FTL_REBUILD_MAGIC) {
2869 ssleep(1);
2870 /* Print message every 3 minutes */
2871 if (cnt++ >= 180) {
2872 dev_warn(&dd->pdev->dev,
2873 "FTL rebuild in progress (%d secs).\n",
2874 jiffies_to_msecs(jiffies - start) / 1000);
2875 cnt = 0;
2876 }
2877 } else {
2878 dev_warn(&dd->pdev->dev,
2879 "FTL rebuild complete (%d secs).\n",
2880 jiffies_to_msecs(jiffies - start) / 1000);
2881 mtip_block_initialize(dd);
2882 return 0;
2883 }
2884 } while (time_before(jiffies, timeout));
2885
2886 /* Check for timeout */
2887 dev_err(&dd->pdev->dev,
2888 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2889 jiffies_to_msecs(jiffies - start) / 1000);
2890 return -EFAULT;
2891 }
2892
2893 /*
2894 * service thread to issue queued commands
2895 *
2896 * @data Pointer to the driver data structure.
2897 *
2898 * return value
2899 * 0
2900 */
2901
2902 static int mtip_service_thread(void *data)
2903 {
2904 struct driver_data *dd = (struct driver_data *)data;
2905 unsigned long slot, slot_start, slot_wrap;
2906 unsigned int num_cmd_slots = dd->slot_groups * 32;
2907 struct mtip_port *port = dd->port;
2908
2909 while (1) {
2910 if (kthread_should_stop() ||
2911 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2912 goto st_out;
2913 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2914
2915 /*
2916 * the condition is to check neither an internal command is
2917 * is in progress nor error handling is active
2918 */
2919 wait_event_interruptible(port->svc_wait, (port->flags) &&
2920 !(port->flags & MTIP_PF_PAUSE_IO));
2921
2922 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2923
2924 if (kthread_should_stop() ||
2925 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2926 goto st_out;
2927
2928 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2929 &dd->dd_flag)))
2930 goto st_out;
2931
2932 restart_eh:
2933 /* Demux bits: start with error handling */
2934 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2935 mtip_handle_tfe(dd);
2936 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2937 }
2938
2939 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2940 goto restart_eh;
2941
2942 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2943 slot = 1;
2944 /* used to restrict the loop to one iteration */
2945 slot_start = num_cmd_slots;
2946 slot_wrap = 0;
2947 while (1) {
2948 slot = find_next_bit(port->cmds_to_issue,
2949 num_cmd_slots, slot);
2950 if (slot_wrap == 1) {
2951 if ((slot_start >= slot) ||
2952 (slot >= num_cmd_slots))
2953 break;
2954 }
2955 if (unlikely(slot_start == num_cmd_slots))
2956 slot_start = slot;
2957
2958 if (unlikely(slot == num_cmd_slots)) {
2959 slot = 1;
2960 slot_wrap = 1;
2961 continue;
2962 }
2963
2964 /* Issue the command to the hardware */
2965 mtip_issue_ncq_command(port, slot);
2966
2967 clear_bit(slot, port->cmds_to_issue);
2968 }
2969
2970 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2971 }
2972
2973 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2974 if (mtip_ftl_rebuild_poll(dd) < 0)
2975 set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
2976 &dd->dd_flag);
2977 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2978 }
2979 }
2980
2981 st_out:
2982 return 0;
2983 }
2984
2985 /*
2986 * DMA region teardown
2987 *
2988 * @dd Pointer to driver_data structure
2989 *
2990 * return value
2991 * None
2992 */
2993 static void mtip_dma_free(struct driver_data *dd)
2994 {
2995 struct mtip_port *port = dd->port;
2996
2997 if (port->block1)
2998 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2999 port->block1, port->block1_dma);
3000
3001 if (port->command_list) {
3002 dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3003 port->command_list, port->command_list_dma);
3004 }
3005 }
3006
3007 /*
3008 * DMA region setup
3009 *
3010 * @dd Pointer to driver_data structure
3011 *
3012 * return value
3013 * -ENOMEM Not enough free DMA region space to initialize driver
3014 */
3015 static int mtip_dma_alloc(struct driver_data *dd)
3016 {
3017 struct mtip_port *port = dd->port;
3018
3019 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
3020 port->block1 =
3021 dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3022 &port->block1_dma, GFP_KERNEL);
3023 if (!port->block1)
3024 return -ENOMEM;
3025 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
3026
3027 /* Allocate dma memory for command list */
3028 port->command_list =
3029 dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3030 &port->command_list_dma, GFP_KERNEL);
3031 if (!port->command_list) {
3032 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3033 port->block1, port->block1_dma);
3034 port->block1 = NULL;
3035 port->block1_dma = 0;
3036 return -ENOMEM;
3037 }
3038 memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
3039
3040 /* Setup all pointers into first DMA region */
3041 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
3042 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
3043 port->identify = port->block1 + AHCI_IDFY_OFFSET;
3044 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
3045 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
3046 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
3047 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
3048 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
3049
3050 return 0;
3051 }
3052
3053 static int mtip_hw_get_identify(struct driver_data *dd)
3054 {
3055 struct smart_attr attr242;
3056 unsigned char *buf;
3057 int rv;
3058
3059 if (mtip_get_identify(dd->port, NULL) < 0)
3060 return -EFAULT;
3061
3062 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3063 MTIP_FTL_REBUILD_MAGIC) {
3064 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3065 return MTIP_FTL_REBUILD_MAGIC;
3066 }
3067 mtip_dump_identify(dd->port);
3068
3069 /* check write protect, over temp and rebuild statuses */
3070 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3071 dd->port->log_buf,
3072 dd->port->log_buf_dma, 1);
3073 if (rv) {
3074 dev_warn(&dd->pdev->dev,
3075 "Error in READ LOG EXT (10h) command\n");
3076 /* non-critical error, don't fail the load */
3077 } else {
3078 buf = (unsigned char *)dd->port->log_buf;
3079 if (buf[259] & 0x1) {
3080 dev_info(&dd->pdev->dev,
3081 "Write protect bit is set.\n");
3082 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3083 }
3084 if (buf[288] == 0xF7) {
3085 dev_info(&dd->pdev->dev,
3086 "Exceeded Tmax, drive in thermal shutdown.\n");
3087 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3088 }
3089 if (buf[288] == 0xBF) {
3090 dev_info(&dd->pdev->dev,
3091 "Drive indicates rebuild has failed.\n");
3092 /* TODO */
3093 }
3094 }
3095
3096 /* get write protect progess */
3097 memset(&attr242, 0, sizeof(struct smart_attr));
3098 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3099 dev_warn(&dd->pdev->dev,
3100 "Unable to check write protect progress\n");
3101 else
3102 dev_info(&dd->pdev->dev,
3103 "Write protect progress: %u%% (%u blocks)\n",
3104 attr242.cur, le32_to_cpu(attr242.data));
3105
3106 return rv;
3107 }
3108
3109 /*
3110 * Called once for each card.
3111 *
3112 * @dd Pointer to the driver data structure.
3113 *
3114 * return value
3115 * 0 on success, else an error code.
3116 */
3117 static int mtip_hw_init(struct driver_data *dd)
3118 {
3119 int i;
3120 int rv;
3121 unsigned int num_command_slots;
3122 unsigned long timeout, timetaken;
3123
3124 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3125
3126 mtip_detect_product(dd);
3127 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3128 rv = -EIO;
3129 goto out1;
3130 }
3131 num_command_slots = dd->slot_groups * 32;
3132
3133 hba_setup(dd);
3134
3135 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3136 dd->numa_node);
3137 if (!dd->port) {
3138 dev_err(&dd->pdev->dev,
3139 "Memory allocation: port structure\n");
3140 return -ENOMEM;
3141 }
3142
3143 /* Continue workqueue setup */
3144 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3145 dd->work[i].port = dd->port;
3146
3147 /* Enable unaligned IO constraints for some devices */
3148 if (mtip_device_unaligned_constrained(dd))
3149 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3150 else
3151 dd->unal_qdepth = 0;
3152
3153 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
3154
3155 /* Spinlock to prevent concurrent issue */
3156 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3157 spin_lock_init(&dd->port->cmd_issue_lock[i]);
3158
3159 /* Set the port mmio base address. */
3160 dd->port->mmio = dd->mmio + PORT_OFFSET;
3161 dd->port->dd = dd;
3162
3163 /* DMA allocations */
3164 rv = mtip_dma_alloc(dd);
3165 if (rv < 0)
3166 goto out1;
3167
3168 /* Setup the pointers to the extended s_active and CI registers. */
3169 for (i = 0; i < dd->slot_groups; i++) {
3170 dd->port->s_active[i] =
3171 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3172 dd->port->cmd_issue[i] =
3173 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3174 dd->port->completed[i] =
3175 dd->port->mmio + i*0x80 + PORT_SDBV;
3176 }
3177
3178 timetaken = jiffies;
3179 timeout = jiffies + msecs_to_jiffies(30000);
3180 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3181 time_before(jiffies, timeout)) {
3182 mdelay(100);
3183 }
3184 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3185 timetaken = jiffies - timetaken;
3186 dev_warn(&dd->pdev->dev,
3187 "Surprise removal detected at %u ms\n",
3188 jiffies_to_msecs(timetaken));
3189 rv = -ENODEV;
3190 goto out2 ;
3191 }
3192 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3193 timetaken = jiffies - timetaken;
3194 dev_warn(&dd->pdev->dev,
3195 "Removal detected at %u ms\n",
3196 jiffies_to_msecs(timetaken));
3197 rv = -EFAULT;
3198 goto out2;
3199 }
3200
3201 /* Conditionally reset the HBA. */
3202 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3203 if (mtip_hba_reset(dd) < 0) {
3204 dev_err(&dd->pdev->dev,
3205 "Card did not reset within timeout\n");
3206 rv = -EIO;
3207 goto out2;
3208 }
3209 } else {
3210 /* Clear any pending interrupts on the HBA */
3211 writel(readl(dd->mmio + HOST_IRQ_STAT),
3212 dd->mmio + HOST_IRQ_STAT);
3213 }
3214
3215 mtip_init_port(dd->port);
3216 mtip_start_port(dd->port);
3217
3218 /* Setup the ISR and enable interrupts. */
3219 rv = devm_request_irq(&dd->pdev->dev,
3220 dd->pdev->irq,
3221 mtip_irq_handler,
3222 IRQF_SHARED,
3223 dev_driver_string(&dd->pdev->dev),
3224 dd);
3225
3226 if (rv) {
3227 dev_err(&dd->pdev->dev,
3228 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3229 goto out2;
3230 }
3231 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
3232
3233 /* Enable interrupts on the HBA. */
3234 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3235 dd->mmio + HOST_CTL);
3236
3237 init_waitqueue_head(&dd->port->svc_wait);
3238
3239 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3240 rv = -EFAULT;
3241 goto out3;
3242 }
3243
3244 return rv;
3245
3246 out3:
3247 /* Disable interrupts on the HBA. */
3248 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3249 dd->mmio + HOST_CTL);
3250
3251 /* Release the IRQ. */
3252 irq_set_affinity_hint(dd->pdev->irq, NULL);
3253 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3254
3255 out2:
3256 mtip_deinit_port(dd->port);
3257 mtip_dma_free(dd);
3258
3259 out1:
3260 /* Free the memory allocated for the for structure. */
3261 kfree(dd->port);
3262
3263 return rv;
3264 }
3265
3266 static void mtip_standby_drive(struct driver_data *dd)
3267 {
3268 if (dd->sr)
3269 return;
3270
3271 /*
3272 * Send standby immediate (E0h) to the drive so that it
3273 * saves its state.
3274 */
3275 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3276 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))
3277 if (mtip_standby_immediate(dd->port))
3278 dev_warn(&dd->pdev->dev,
3279 "STANDBY IMMEDIATE failed\n");
3280 }
3281
3282 /*
3283 * Called to deinitialize an interface.
3284 *
3285 * @dd Pointer to the driver data structure.
3286 *
3287 * return value
3288 * 0
3289 */
3290 static int mtip_hw_exit(struct driver_data *dd)
3291 {
3292 /*
3293 * Send standby immediate (E0h) to the drive so that it
3294 * saves its state.
3295 */
3296 if (!dd->sr) {
3297 /* de-initialize the port. */
3298 mtip_deinit_port(dd->port);
3299
3300 /* Disable interrupts on the HBA. */
3301 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3302 dd->mmio + HOST_CTL);
3303 }
3304
3305 /* Release the IRQ. */
3306 irq_set_affinity_hint(dd->pdev->irq, NULL);
3307 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3308 msleep(1000);
3309
3310 /* Free dma regions */
3311 mtip_dma_free(dd);
3312
3313 /* Free the memory allocated for the for structure. */
3314 kfree(dd->port);
3315 dd->port = NULL;
3316
3317 return 0;
3318 }
3319
3320 /*
3321 * Issue a Standby Immediate command to the device.
3322 *
3323 * This function is called by the Block Layer just before the
3324 * system powers off during a shutdown.
3325 *
3326 * @dd Pointer to the driver data structure.
3327 *
3328 * return value
3329 * 0
3330 */
3331 static int mtip_hw_shutdown(struct driver_data *dd)
3332 {
3333 /*
3334 * Send standby immediate (E0h) to the drive so that it
3335 * saves its state.
3336 */
3337 if (!dd->sr && dd->port)
3338 mtip_standby_immediate(dd->port);
3339
3340 return 0;
3341 }
3342
3343 /*
3344 * Suspend function
3345 *
3346 * This function is called by the Block Layer just before the
3347 * system hibernates.
3348 *
3349 * @dd Pointer to the driver data structure.
3350 *
3351 * return value
3352 * 0 Suspend was successful
3353 * -EFAULT Suspend was not successful
3354 */
3355 static int mtip_hw_suspend(struct driver_data *dd)
3356 {
3357 /*
3358 * Send standby immediate (E0h) to the drive
3359 * so that it saves its state.
3360 */
3361 if (mtip_standby_immediate(dd->port) != 0) {
3362 dev_err(&dd->pdev->dev,
3363 "Failed standby-immediate command\n");
3364 return -EFAULT;
3365 }
3366
3367 /* Disable interrupts on the HBA.*/
3368 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3369 dd->mmio + HOST_CTL);
3370 mtip_deinit_port(dd->port);
3371
3372 return 0;
3373 }
3374
3375 /*
3376 * Resume function
3377 *
3378 * This function is called by the Block Layer as the
3379 * system resumes.
3380 *
3381 * @dd Pointer to the driver data structure.
3382 *
3383 * return value
3384 * 0 Resume was successful
3385 * -EFAULT Resume was not successful
3386 */
3387 static int mtip_hw_resume(struct driver_data *dd)
3388 {
3389 /* Perform any needed hardware setup steps */
3390 hba_setup(dd);
3391
3392 /* Reset the HBA */
3393 if (mtip_hba_reset(dd) != 0) {
3394 dev_err(&dd->pdev->dev,
3395 "Unable to reset the HBA\n");
3396 return -EFAULT;
3397 }
3398
3399 /*
3400 * Enable the port, DMA engine, and FIS reception specific
3401 * h/w in controller.
3402 */
3403 mtip_init_port(dd->port);
3404 mtip_start_port(dd->port);
3405
3406 /* Enable interrupts on the HBA.*/
3407 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3408 dd->mmio + HOST_CTL);
3409
3410 return 0;
3411 }
3412
3413 /*
3414 * Helper function for reusing disk name
3415 * upon hot insertion.
3416 */
3417 static int rssd_disk_name_format(char *prefix,
3418 int index,
3419 char *buf,
3420 int buflen)
3421 {
3422 const int base = 'z' - 'a' + 1;
3423 char *begin = buf + strlen(prefix);
3424 char *end = buf + buflen;
3425 char *p;
3426 int unit;
3427
3428 p = end - 1;
3429 *p = '\0';
3430 unit = base;
3431 do {
3432 if (p == begin)
3433 return -EINVAL;
3434 *--p = 'a' + (index % unit);
3435 index = (index / unit) - 1;
3436 } while (index >= 0);
3437
3438 memmove(begin, p, end - p);
3439 memcpy(buf, prefix, strlen(prefix));
3440
3441 return 0;
3442 }
3443
3444 /*
3445 * Block layer IOCTL handler.
3446 *
3447 * @dev Pointer to the block_device structure.
3448 * @mode ignored
3449 * @cmd IOCTL command passed from the user application.
3450 * @arg Argument passed from the user application.
3451 *
3452 * return value
3453 * 0 IOCTL completed successfully.
3454 * -ENOTTY IOCTL not supported or invalid driver data
3455 * structure pointer.
3456 */
3457 static int mtip_block_ioctl(struct block_device *dev,
3458 fmode_t mode,
3459 unsigned cmd,
3460 unsigned long arg)
3461 {
3462 struct driver_data *dd = dev->bd_disk->private_data;
3463
3464 if (!capable(CAP_SYS_ADMIN))
3465 return -EACCES;
3466
3467 if (!dd)
3468 return -ENOTTY;
3469
3470 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3471 return -ENOTTY;
3472
3473 switch (cmd) {
3474 case BLKFLSBUF:
3475 return -ENOTTY;
3476 default:
3477 return mtip_hw_ioctl(dd, cmd, arg);
3478 }
3479 }
3480
3481 #ifdef CONFIG_COMPAT
3482 /*
3483 * Block layer compat IOCTL handler.
3484 *
3485 * @dev Pointer to the block_device structure.
3486 * @mode ignored
3487 * @cmd IOCTL command passed from the user application.
3488 * @arg Argument passed from the user application.
3489 *
3490 * return value
3491 * 0 IOCTL completed successfully.
3492 * -ENOTTY IOCTL not supported or invalid driver data
3493 * structure pointer.
3494 */
3495 static int mtip_block_compat_ioctl(struct block_device *dev,
3496 fmode_t mode,
3497 unsigned cmd,
3498 unsigned long arg)
3499 {
3500 struct driver_data *dd = dev->bd_disk->private_data;
3501
3502 if (!capable(CAP_SYS_ADMIN))
3503 return -EACCES;
3504
3505 if (!dd)
3506 return -ENOTTY;
3507
3508 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3509 return -ENOTTY;
3510
3511 switch (cmd) {
3512 case BLKFLSBUF:
3513 return -ENOTTY;
3514 case HDIO_DRIVE_TASKFILE: {
3515 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3516 ide_task_request_t req_task;
3517 int compat_tasksize, outtotal, ret;
3518
3519 compat_tasksize =
3520 sizeof(struct mtip_compat_ide_task_request_s);
3521
3522 compat_req_task =
3523 (struct mtip_compat_ide_task_request_s __user *) arg;
3524
3525 if (copy_from_user(&req_task, (void __user *) arg,
3526 compat_tasksize - (2 * sizeof(compat_long_t))))
3527 return -EFAULT;
3528
3529 if (get_user(req_task.out_size, &compat_req_task->out_size))
3530 return -EFAULT;
3531
3532 if (get_user(req_task.in_size, &compat_req_task->in_size))
3533 return -EFAULT;
3534
3535 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3536
3537 ret = exec_drive_taskfile(dd, (void __user *) arg,
3538 &req_task, outtotal);
3539
3540 if (copy_to_user((void __user *) arg, &req_task,
3541 compat_tasksize -
3542 (2 * sizeof(compat_long_t))))
3543 return -EFAULT;
3544
3545 if (put_user(req_task.out_size, &compat_req_task->out_size))
3546 return -EFAULT;
3547
3548 if (put_user(req_task.in_size, &compat_req_task->in_size))
3549 return -EFAULT;
3550
3551 return ret;
3552 }
3553 default:
3554 return mtip_hw_ioctl(dd, cmd, arg);
3555 }
3556 }
3557 #endif
3558
3559 /*
3560 * Obtain the geometry of the device.
3561 *
3562 * You may think that this function is obsolete, but some applications,
3563 * fdisk for example still used CHS values. This function describes the
3564 * device as having 224 heads and 56 sectors per cylinder. These values are
3565 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3566 * partition is described in terms of a start and end cylinder this means
3567 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3568 * affects performance.
3569 *
3570 * @dev Pointer to the block_device strucutre.
3571 * @geo Pointer to a hd_geometry structure.
3572 *
3573 * return value
3574 * 0 Operation completed successfully.
3575 * -ENOTTY An error occurred while reading the drive capacity.
3576 */
3577 static int mtip_block_getgeo(struct block_device *dev,
3578 struct hd_geometry *geo)
3579 {
3580 struct driver_data *dd = dev->bd_disk->private_data;
3581 sector_t capacity;
3582
3583 if (!dd)
3584 return -ENOTTY;
3585
3586 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3587 dev_warn(&dd->pdev->dev,
3588 "Could not get drive capacity.\n");
3589 return -ENOTTY;
3590 }
3591
3592 geo->heads = 224;
3593 geo->sectors = 56;
3594 sector_div(capacity, (geo->heads * geo->sectors));
3595 geo->cylinders = capacity;
3596 return 0;
3597 }
3598
3599 /*
3600 * Block device operation function.
3601 *
3602 * This structure contains pointers to the functions required by the block
3603 * layer.
3604 */
3605 static const struct block_device_operations mtip_block_ops = {
3606 .ioctl = mtip_block_ioctl,
3607 #ifdef CONFIG_COMPAT
3608 .compat_ioctl = mtip_block_compat_ioctl,
3609 #endif
3610 .getgeo = mtip_block_getgeo,
3611 .owner = THIS_MODULE
3612 };
3613
3614 static inline bool is_se_active(struct driver_data *dd)
3615 {
3616 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3617 if (dd->port->ic_pause_timer) {
3618 unsigned long to = dd->port->ic_pause_timer +
3619 msecs_to_jiffies(1000);
3620 if (time_after(jiffies, to)) {
3621 clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3622 &dd->port->flags);
3623 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3624 dd->port->ic_pause_timer = 0;
3625 wake_up_interruptible(&dd->port->svc_wait);
3626 return false;
3627 }
3628 }
3629 return true;
3630 }
3631 return false;
3632 }
3633
3634 /*
3635 * Block layer make request function.
3636 *
3637 * This function is called by the kernel to process a BIO for
3638 * the P320 device.
3639 *
3640 * @queue Pointer to the request queue. Unused other than to obtain
3641 * the driver data structure.
3642 * @rq Pointer to the request.
3643 *
3644 */
3645 static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq)
3646 {
3647 struct driver_data *dd = hctx->queue->queuedata;
3648 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3649 unsigned int nents;
3650
3651 if (is_se_active(dd))
3652 return -ENODATA;
3653
3654 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3655 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3656 &dd->dd_flag))) {
3657 return -ENXIO;
3658 }
3659 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3660 return -ENODATA;
3661 }
3662 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3663 &dd->dd_flag) &&
3664 rq_data_dir(rq))) {
3665 return -ENODATA;
3666 }
3667 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)))
3668 return -ENODATA;
3669 if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))
3670 return -ENXIO;
3671 }
3672
3673 if (rq->cmd_flags & REQ_DISCARD) {
3674 int err;
3675
3676 err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq));
3677 blk_mq_end_request(rq, err);
3678 return 0;
3679 }
3680
3681 /* Create the scatter list for this request. */
3682 nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg);
3683
3684 /* Issue the read/write. */
3685 mtip_hw_submit_io(dd, rq, cmd, nents, hctx);
3686 return 0;
3687 }
3688
3689 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3690 struct request *rq)
3691 {
3692 struct driver_data *dd = hctx->queue->queuedata;
3693 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3694
3695 if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
3696 return false;
3697
3698 /*
3699 * If unaligned depth must be limited on this controller, mark it
3700 * as unaligned if the IO isn't on a 4k boundary (start of length).
3701 */
3702 if (blk_rq_sectors(rq) <= 64) {
3703 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3704 cmd->unaligned = 1;
3705 }
3706
3707 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3708 return true;
3709
3710 return false;
3711 }
3712
3713 static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3714 const struct blk_mq_queue_data *bd)
3715 {
3716 struct request *rq = bd->rq;
3717 int ret;
3718
3719 if (unlikely(mtip_check_unal_depth(hctx, rq)))
3720 return BLK_MQ_RQ_QUEUE_BUSY;
3721
3722 blk_mq_start_request(rq);
3723
3724 ret = mtip_submit_request(hctx, rq);
3725 if (likely(!ret))
3726 return BLK_MQ_RQ_QUEUE_OK;
3727
3728 rq->errors = ret;
3729 return BLK_MQ_RQ_QUEUE_ERROR;
3730 }
3731
3732 static void mtip_free_cmd(void *data, struct request *rq,
3733 unsigned int hctx_idx, unsigned int request_idx)
3734 {
3735 struct driver_data *dd = data;
3736 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3737
3738 if (!cmd->command)
3739 return;
3740
3741 dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3742 cmd->command, cmd->command_dma);
3743 }
3744
3745 static int mtip_init_cmd(void *data, struct request *rq, unsigned int hctx_idx,
3746 unsigned int request_idx, unsigned int numa_node)
3747 {
3748 struct driver_data *dd = data;
3749 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3750 u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64;
3751
3752 /*
3753 * For flush requests, request_idx starts at the end of the
3754 * tag space. Since we don't support FLUSH/FUA, simply return
3755 * 0 as there's nothing to be done.
3756 */
3757 if (request_idx >= MTIP_MAX_COMMAND_SLOTS)
3758 return 0;
3759
3760 cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3761 &cmd->command_dma, GFP_KERNEL);
3762 if (!cmd->command)
3763 return -ENOMEM;
3764
3765 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3766
3767 /* Point the command headers at the command tables. */
3768 cmd->command_header = dd->port->command_list +
3769 (sizeof(struct mtip_cmd_hdr) * request_idx);
3770 cmd->command_header_dma = dd->port->command_list_dma +
3771 (sizeof(struct mtip_cmd_hdr) * request_idx);
3772
3773 if (host_cap_64)
3774 cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16);
3775
3776 cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
3777
3778 sg_init_table(cmd->sg, MTIP_MAX_SG);
3779 return 0;
3780 }
3781
3782 static struct blk_mq_ops mtip_mq_ops = {
3783 .queue_rq = mtip_queue_rq,
3784 .map_queue = blk_mq_map_queue,
3785 .init_request = mtip_init_cmd,
3786 .exit_request = mtip_free_cmd,
3787 };
3788
3789 /*
3790 * Block layer initialization function.
3791 *
3792 * This function is called once by the PCI layer for each P320
3793 * device that is connected to the system.
3794 *
3795 * @dd Pointer to the driver data structure.
3796 *
3797 * return value
3798 * 0 on success else an error code.
3799 */
3800 static int mtip_block_initialize(struct driver_data *dd)
3801 {
3802 int rv = 0, wait_for_rebuild = 0;
3803 sector_t capacity;
3804 unsigned int index = 0;
3805 struct kobject *kobj;
3806
3807 if (dd->disk)
3808 goto skip_create_disk; /* hw init done, before rebuild */
3809
3810 if (mtip_hw_init(dd)) {
3811 rv = -EINVAL;
3812 goto protocol_init_error;
3813 }
3814
3815 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3816 if (dd->disk == NULL) {
3817 dev_err(&dd->pdev->dev,
3818 "Unable to allocate gendisk structure\n");
3819 rv = -EINVAL;
3820 goto alloc_disk_error;
3821 }
3822
3823 /* Generate the disk name, implemented same as in sd.c */
3824 do {
3825 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3826 goto ida_get_error;
3827
3828 spin_lock(&rssd_index_lock);
3829 rv = ida_get_new(&rssd_index_ida, &index);
3830 spin_unlock(&rssd_index_lock);
3831 } while (rv == -EAGAIN);
3832
3833 if (rv)
3834 goto ida_get_error;
3835
3836 rv = rssd_disk_name_format("rssd",
3837 index,
3838 dd->disk->disk_name,
3839 DISK_NAME_LEN);
3840 if (rv)
3841 goto disk_index_error;
3842
3843 dd->disk->driverfs_dev = &dd->pdev->dev;
3844 dd->disk->major = dd->major;
3845 dd->disk->first_minor = index * MTIP_MAX_MINORS;
3846 dd->disk->minors = MTIP_MAX_MINORS;
3847 dd->disk->fops = &mtip_block_ops;
3848 dd->disk->private_data = dd;
3849 dd->index = index;
3850
3851 mtip_hw_debugfs_init(dd);
3852
3853 skip_create_disk:
3854 memset(&dd->tags, 0, sizeof(dd->tags));
3855 dd->tags.ops = &mtip_mq_ops;
3856 dd->tags.nr_hw_queues = 1;
3857 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3858 dd->tags.reserved_tags = 1;
3859 dd->tags.cmd_size = sizeof(struct mtip_cmd);
3860 dd->tags.numa_node = dd->numa_node;
3861 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3862 dd->tags.driver_data = dd;
3863
3864 rv = blk_mq_alloc_tag_set(&dd->tags);
3865 if (rv) {
3866 dev_err(&dd->pdev->dev,
3867 "Unable to allocate request queue\n");
3868 goto block_queue_alloc_init_error;
3869 }
3870
3871 /* Allocate the request queue. */
3872 dd->queue = blk_mq_init_queue(&dd->tags);
3873 if (IS_ERR(dd->queue)) {
3874 dev_err(&dd->pdev->dev,
3875 "Unable to allocate request queue\n");
3876 rv = -ENOMEM;
3877 goto block_queue_alloc_init_error;
3878 }
3879
3880 dd->disk->queue = dd->queue;
3881 dd->queue->queuedata = dd;
3882
3883 /* Initialize the protocol layer. */
3884 wait_for_rebuild = mtip_hw_get_identify(dd);
3885 if (wait_for_rebuild < 0) {
3886 dev_err(&dd->pdev->dev,
3887 "Protocol layer initialization failed\n");
3888 rv = -EINVAL;
3889 goto init_hw_cmds_error;
3890 }
3891
3892 /*
3893 * if rebuild pending, start the service thread, and delay the block
3894 * queue creation and add_disk()
3895 */
3896 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3897 goto start_service_thread;
3898
3899 /* Set device limits. */
3900 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
3901 clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags);
3902 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3903 blk_queue_physical_block_size(dd->queue, 4096);
3904 blk_queue_max_hw_sectors(dd->queue, 0xffff);
3905 blk_queue_max_segment_size(dd->queue, 0x400000);
3906 blk_queue_io_min(dd->queue, 4096);
3907 blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask);
3908
3909 /*
3910 * write back cache is not supported in the device. FUA depends on
3911 * write back cache support, hence setting flush support to zero.
3912 */
3913 blk_queue_flush(dd->queue, 0);
3914
3915 /* Signal trim support */
3916 if (dd->trim_supp == true) {
3917 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
3918 dd->queue->limits.discard_granularity = 4096;
3919 blk_queue_max_discard_sectors(dd->queue,
3920 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
3921 dd->queue->limits.discard_zeroes_data = 0;
3922 }
3923
3924 /* Set the capacity of the device in 512 byte sectors. */
3925 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3926 dev_warn(&dd->pdev->dev,
3927 "Could not read drive capacity\n");
3928 rv = -EIO;
3929 goto read_capacity_error;
3930 }
3931 set_capacity(dd->disk, capacity);
3932
3933 /* Enable the block device and add it to /dev */
3934 add_disk(dd->disk);
3935
3936 dd->bdev = bdget_disk(dd->disk, 0);
3937 /*
3938 * Now that the disk is active, initialize any sysfs attributes
3939 * managed by the protocol layer.
3940 */
3941 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3942 if (kobj) {
3943 mtip_hw_sysfs_init(dd, kobj);
3944 kobject_put(kobj);
3945 }
3946
3947 if (dd->mtip_svc_handler) {
3948 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3949 return rv; /* service thread created for handling rebuild */
3950 }
3951
3952 start_service_thread:
3953 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
3954 dd, dd->numa_node,
3955 "mtip_svc_thd_%02d", index);
3956
3957 if (IS_ERR(dd->mtip_svc_handler)) {
3958 dev_err(&dd->pdev->dev, "service thread failed to start\n");
3959 dd->mtip_svc_handler = NULL;
3960 rv = -EFAULT;
3961 goto kthread_run_error;
3962 }
3963 wake_up_process(dd->mtip_svc_handler);
3964 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3965 rv = wait_for_rebuild;
3966
3967 return rv;
3968
3969 kthread_run_error:
3970 bdput(dd->bdev);
3971 dd->bdev = NULL;
3972
3973 /* Delete our gendisk. This also removes the device from /dev */
3974 del_gendisk(dd->disk);
3975
3976 read_capacity_error:
3977 init_hw_cmds_error:
3978 blk_cleanup_queue(dd->queue);
3979 blk_mq_free_tag_set(&dd->tags);
3980 block_queue_alloc_init_error:
3981 mtip_hw_debugfs_exit(dd);
3982 disk_index_error:
3983 spin_lock(&rssd_index_lock);
3984 ida_remove(&rssd_index_ida, index);
3985 spin_unlock(&rssd_index_lock);
3986
3987 ida_get_error:
3988 put_disk(dd->disk);
3989
3990 alloc_disk_error:
3991 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3992
3993 protocol_init_error:
3994 return rv;
3995 }
3996
3997 /*
3998 * Block layer deinitialization function.
3999 *
4000 * Called by the PCI layer as each P320 device is removed.
4001 *
4002 * @dd Pointer to the driver data structure.
4003 *
4004 * return value
4005 * 0
4006 */
4007 static int mtip_block_remove(struct driver_data *dd)
4008 {
4009 struct kobject *kobj;
4010
4011 mtip_hw_debugfs_exit(dd);
4012
4013 if (dd->mtip_svc_handler) {
4014 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4015 wake_up_interruptible(&dd->port->svc_wait);
4016 kthread_stop(dd->mtip_svc_handler);
4017 }
4018
4019 /* Clean up the sysfs attributes, if created */
4020 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
4021 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4022 if (kobj) {
4023 mtip_hw_sysfs_exit(dd, kobj);
4024 kobject_put(kobj);
4025 }
4026 }
4027
4028 if (!dd->sr)
4029 mtip_standby_drive(dd);
4030 else
4031 dev_info(&dd->pdev->dev, "device %s surprise removal\n",
4032 dd->disk->disk_name);
4033
4034 /*
4035 * Delete our gendisk structure. This also removes the device
4036 * from /dev
4037 */
4038 if (dd->bdev) {
4039 bdput(dd->bdev);
4040 dd->bdev = NULL;
4041 }
4042 if (dd->disk) {
4043 del_gendisk(dd->disk);
4044 if (dd->disk->queue) {
4045 blk_cleanup_queue(dd->queue);
4046 blk_mq_free_tag_set(&dd->tags);
4047 dd->queue = NULL;
4048 }
4049 put_disk(dd->disk);
4050 }
4051 dd->disk = NULL;
4052
4053 spin_lock(&rssd_index_lock);
4054 ida_remove(&rssd_index_ida, dd->index);
4055 spin_unlock(&rssd_index_lock);
4056
4057 /* De-initialize the protocol layer. */
4058 mtip_hw_exit(dd);
4059
4060 return 0;
4061 }
4062
4063 /*
4064 * Function called by the PCI layer when just before the
4065 * machine shuts down.
4066 *
4067 * If a protocol layer shutdown function is present it will be called
4068 * by this function.
4069 *
4070 * @dd Pointer to the driver data structure.
4071 *
4072 * return value
4073 * 0
4074 */
4075 static int mtip_block_shutdown(struct driver_data *dd)
4076 {
4077 mtip_hw_shutdown(dd);
4078
4079 /* Delete our gendisk structure, and cleanup the blk queue. */
4080 if (dd->disk) {
4081 dev_info(&dd->pdev->dev,
4082 "Shutting down %s ...\n", dd->disk->disk_name);
4083
4084 del_gendisk(dd->disk);
4085 if (dd->disk->queue) {
4086 blk_cleanup_queue(dd->queue);
4087 blk_mq_free_tag_set(&dd->tags);
4088 }
4089 put_disk(dd->disk);
4090 dd->disk = NULL;
4091 dd->queue = NULL;
4092 }
4093
4094 spin_lock(&rssd_index_lock);
4095 ida_remove(&rssd_index_ida, dd->index);
4096 spin_unlock(&rssd_index_lock);
4097 return 0;
4098 }
4099
4100 static int mtip_block_suspend(struct driver_data *dd)
4101 {
4102 dev_info(&dd->pdev->dev,
4103 "Suspending %s ...\n", dd->disk->disk_name);
4104 mtip_hw_suspend(dd);
4105 return 0;
4106 }
4107
4108 static int mtip_block_resume(struct driver_data *dd)
4109 {
4110 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4111 dd->disk->disk_name);
4112 mtip_hw_resume(dd);
4113 return 0;
4114 }
4115
4116 static void drop_cpu(int cpu)
4117 {
4118 cpu_use[cpu]--;
4119 }
4120
4121 static int get_least_used_cpu_on_node(int node)
4122 {
4123 int cpu, least_used_cpu, least_cnt;
4124 const struct cpumask *node_mask;
4125
4126 node_mask = cpumask_of_node(node);
4127 least_used_cpu = cpumask_first(node_mask);
4128 least_cnt = cpu_use[least_used_cpu];
4129 cpu = least_used_cpu;
4130
4131 for_each_cpu(cpu, node_mask) {
4132 if (cpu_use[cpu] < least_cnt) {
4133 least_used_cpu = cpu;
4134 least_cnt = cpu_use[cpu];
4135 }
4136 }
4137 cpu_use[least_used_cpu]++;
4138 return least_used_cpu;
4139 }
4140
4141 /* Helper for selecting a node in round robin mode */
4142 static inline int mtip_get_next_rr_node(void)
4143 {
4144 static int next_node = -1;
4145
4146 if (next_node == -1) {
4147 next_node = first_online_node;
4148 return next_node;
4149 }
4150
4151 next_node = next_online_node(next_node);
4152 if (next_node == MAX_NUMNODES)
4153 next_node = first_online_node;
4154 return next_node;
4155 }
4156
4157 static DEFINE_HANDLER(0);
4158 static DEFINE_HANDLER(1);
4159 static DEFINE_HANDLER(2);
4160 static DEFINE_HANDLER(3);
4161 static DEFINE_HANDLER(4);
4162 static DEFINE_HANDLER(5);
4163 static DEFINE_HANDLER(6);
4164 static DEFINE_HANDLER(7);
4165
4166 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4167 {
4168 int pos;
4169 unsigned short pcie_dev_ctrl;
4170
4171 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4172 if (pos) {
4173 pci_read_config_word(pdev,
4174 pos + PCI_EXP_DEVCTL,
4175 &pcie_dev_ctrl);
4176 if (pcie_dev_ctrl & (1 << 11) ||
4177 pcie_dev_ctrl & (1 << 4)) {
4178 dev_info(&dd->pdev->dev,
4179 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4180 pdev->vendor, pdev->device);
4181 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4182 PCI_EXP_DEVCTL_RELAX_EN);
4183 pci_write_config_word(pdev,
4184 pos + PCI_EXP_DEVCTL,
4185 pcie_dev_ctrl);
4186 }
4187 }
4188 }
4189
4190 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4191 {
4192 /*
4193 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4194 * device with device id 0x5aXX
4195 */
4196 if (pdev->bus && pdev->bus->self) {
4197 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4198 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4199 mtip_disable_link_opts(dd, pdev->bus->self);
4200 } else {
4201 /* Check further up the topology */
4202 struct pci_dev *parent_dev = pdev->bus->self;
4203 if (parent_dev->bus &&
4204 parent_dev->bus->parent &&
4205 parent_dev->bus->parent->self &&
4206 parent_dev->bus->parent->self->vendor ==
4207 PCI_VENDOR_ID_ATI &&
4208 (parent_dev->bus->parent->self->device &
4209 0xff00) == 0x5a00) {
4210 mtip_disable_link_opts(dd,
4211 parent_dev->bus->parent->self);
4212 }
4213 }
4214 }
4215 }
4216
4217 /*
4218 * Called for each supported PCI device detected.
4219 *
4220 * This function allocates the private data structure, enables the
4221 * PCI device and then calls the block layer initialization function.
4222 *
4223 * return value
4224 * 0 on success else an error code.
4225 */
4226 static int mtip_pci_probe(struct pci_dev *pdev,
4227 const struct pci_device_id *ent)
4228 {
4229 int rv = 0;
4230 struct driver_data *dd = NULL;
4231 char cpu_list[256];
4232 const struct cpumask *node_mask;
4233 int cpu, i = 0, j = 0;
4234 int my_node = NUMA_NO_NODE;
4235 unsigned long flags;
4236
4237 /* Allocate memory for this devices private data. */
4238 my_node = pcibus_to_node(pdev->bus);
4239 if (my_node != NUMA_NO_NODE) {
4240 if (!node_online(my_node))
4241 my_node = mtip_get_next_rr_node();
4242 } else {
4243 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4244 my_node = mtip_get_next_rr_node();
4245 }
4246 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4247 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4248 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
4249
4250 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4251 if (dd == NULL) {
4252 dev_err(&pdev->dev,
4253 "Unable to allocate memory for driver data\n");
4254 return -ENOMEM;
4255 }
4256
4257 /* Attach the private data to this PCI device. */
4258 pci_set_drvdata(pdev, dd);
4259
4260 rv = pcim_enable_device(pdev);
4261 if (rv < 0) {
4262 dev_err(&pdev->dev, "Unable to enable device\n");
4263 goto iomap_err;
4264 }
4265
4266 /* Map BAR5 to memory. */
4267 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4268 if (rv < 0) {
4269 dev_err(&pdev->dev, "Unable to map regions\n");
4270 goto iomap_err;
4271 }
4272
4273 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4274 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4275
4276 if (rv) {
4277 rv = pci_set_consistent_dma_mask(pdev,
4278 DMA_BIT_MASK(32));
4279 if (rv) {
4280 dev_warn(&pdev->dev,
4281 "64-bit DMA enable failed\n");
4282 goto setmask_err;
4283 }
4284 }
4285 }
4286
4287 /* Copy the info we may need later into the private data structure. */
4288 dd->major = mtip_major;
4289 dd->instance = instance;
4290 dd->pdev = pdev;
4291 dd->numa_node = my_node;
4292
4293 INIT_LIST_HEAD(&dd->online_list);
4294 INIT_LIST_HEAD(&dd->remove_list);
4295
4296 memset(dd->workq_name, 0, 32);
4297 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4298
4299 dd->isr_workq = create_workqueue(dd->workq_name);
4300 if (!dd->isr_workq) {
4301 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4302 rv = -ENOMEM;
4303 goto block_initialize_err;
4304 }
4305
4306 memset(cpu_list, 0, sizeof(cpu_list));
4307
4308 node_mask = cpumask_of_node(dd->numa_node);
4309 if (!cpumask_empty(node_mask)) {
4310 for_each_cpu(cpu, node_mask)
4311 {
4312 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4313 j = strlen(cpu_list);
4314 }
4315
4316 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4317 dd->numa_node,
4318 topology_physical_package_id(cpumask_first(node_mask)),
4319 nr_cpus_node(dd->numa_node),
4320 cpu_list);
4321 } else
4322 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4323
4324 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4325 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4326 cpu_to_node(dd->isr_binding), dd->isr_binding);
4327
4328 /* first worker context always runs in ISR */
4329 dd->work[0].cpu_binding = dd->isr_binding;
4330 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4331 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4332 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4333 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4334 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4335 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4336 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4337
4338 /* Log the bindings */
4339 for_each_present_cpu(cpu) {
4340 memset(cpu_list, 0, sizeof(cpu_list));
4341 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4342 if (dd->work[i].cpu_binding == cpu) {
4343 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4344 j = strlen(cpu_list);
4345 }
4346 }
4347 if (j)
4348 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4349 }
4350
4351 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4352 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4353 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4354 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4355 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4356 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4357 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4358 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4359
4360 pci_set_master(pdev);
4361 rv = pci_enable_msi(pdev);
4362 if (rv) {
4363 dev_warn(&pdev->dev,
4364 "Unable to enable MSI interrupt.\n");
4365 goto msi_initialize_err;
4366 }
4367
4368 mtip_fix_ero_nosnoop(dd, pdev);
4369
4370 /* Initialize the block layer. */
4371 rv = mtip_block_initialize(dd);
4372 if (rv < 0) {
4373 dev_err(&pdev->dev,
4374 "Unable to initialize block layer\n");
4375 goto block_initialize_err;
4376 }
4377
4378 /*
4379 * Increment the instance count so that each device has a unique
4380 * instance number.
4381 */
4382 instance++;
4383 if (rv != MTIP_FTL_REBUILD_MAGIC)
4384 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4385 else
4386 rv = 0; /* device in rebuild state, return 0 from probe */
4387
4388 /* Add to online list even if in ftl rebuild */
4389 spin_lock_irqsave(&dev_lock, flags);
4390 list_add(&dd->online_list, &online_list);
4391 spin_unlock_irqrestore(&dev_lock, flags);
4392
4393 goto done;
4394
4395 block_initialize_err:
4396 pci_disable_msi(pdev);
4397
4398 msi_initialize_err:
4399 if (dd->isr_workq) {
4400 flush_workqueue(dd->isr_workq);
4401 destroy_workqueue(dd->isr_workq);
4402 drop_cpu(dd->work[0].cpu_binding);
4403 drop_cpu(dd->work[1].cpu_binding);
4404 drop_cpu(dd->work[2].cpu_binding);
4405 }
4406 setmask_err:
4407 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4408
4409 iomap_err:
4410 kfree(dd);
4411 pci_set_drvdata(pdev, NULL);
4412 return rv;
4413 done:
4414 return rv;
4415 }
4416
4417 /*
4418 * Called for each probed device when the device is removed or the
4419 * driver is unloaded.
4420 *
4421 * return value
4422 * None
4423 */
4424 static void mtip_pci_remove(struct pci_dev *pdev)
4425 {
4426 struct driver_data *dd = pci_get_drvdata(pdev);
4427 unsigned long flags, to;
4428
4429 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4430
4431 spin_lock_irqsave(&dev_lock, flags);
4432 list_del_init(&dd->online_list);
4433 list_add(&dd->remove_list, &removing_list);
4434 spin_unlock_irqrestore(&dev_lock, flags);
4435
4436 mtip_check_surprise_removal(pdev);
4437 synchronize_irq(dd->pdev->irq);
4438
4439 /* Spin until workers are done */
4440 to = jiffies + msecs_to_jiffies(4000);
4441 do {
4442 msleep(20);
4443 } while (atomic_read(&dd->irq_workers_active) != 0 &&
4444 time_before(jiffies, to));
4445
4446 if (atomic_read(&dd->irq_workers_active) != 0) {
4447 dev_warn(&dd->pdev->dev,
4448 "Completion workers still active!\n");
4449 }
4450
4451 blk_mq_stop_hw_queues(dd->queue);
4452 /* Clean up the block layer. */
4453 mtip_block_remove(dd);
4454
4455 if (dd->isr_workq) {
4456 flush_workqueue(dd->isr_workq);
4457 destroy_workqueue(dd->isr_workq);
4458 drop_cpu(dd->work[0].cpu_binding);
4459 drop_cpu(dd->work[1].cpu_binding);
4460 drop_cpu(dd->work[2].cpu_binding);
4461 }
4462
4463 pci_disable_msi(pdev);
4464
4465 spin_lock_irqsave(&dev_lock, flags);
4466 list_del_init(&dd->remove_list);
4467 spin_unlock_irqrestore(&dev_lock, flags);
4468
4469 kfree(dd);
4470
4471 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4472 pci_set_drvdata(pdev, NULL);
4473 }
4474
4475 /*
4476 * Called for each probed device when the device is suspended.
4477 *
4478 * return value
4479 * 0 Success
4480 * <0 Error
4481 */
4482 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4483 {
4484 int rv = 0;
4485 struct driver_data *dd = pci_get_drvdata(pdev);
4486
4487 if (!dd) {
4488 dev_err(&pdev->dev,
4489 "Driver private datastructure is NULL\n");
4490 return -EFAULT;
4491 }
4492
4493 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4494
4495 /* Disable ports & interrupts then send standby immediate */
4496 rv = mtip_block_suspend(dd);
4497 if (rv < 0) {
4498 dev_err(&pdev->dev,
4499 "Failed to suspend controller\n");
4500 return rv;
4501 }
4502
4503 /*
4504 * Save the pci config space to pdev structure &
4505 * disable the device
4506 */
4507 pci_save_state(pdev);
4508 pci_disable_device(pdev);
4509
4510 /* Move to Low power state*/
4511 pci_set_power_state(pdev, PCI_D3hot);
4512
4513 return rv;
4514 }
4515
4516 /*
4517 * Called for each probed device when the device is resumed.
4518 *
4519 * return value
4520 * 0 Success
4521 * <0 Error
4522 */
4523 static int mtip_pci_resume(struct pci_dev *pdev)
4524 {
4525 int rv = 0;
4526 struct driver_data *dd;
4527
4528 dd = pci_get_drvdata(pdev);
4529 if (!dd) {
4530 dev_err(&pdev->dev,
4531 "Driver private datastructure is NULL\n");
4532 return -EFAULT;
4533 }
4534
4535 /* Move the device to active State */
4536 pci_set_power_state(pdev, PCI_D0);
4537
4538 /* Restore PCI configuration space */
4539 pci_restore_state(pdev);
4540
4541 /* Enable the PCI device*/
4542 rv = pcim_enable_device(pdev);
4543 if (rv < 0) {
4544 dev_err(&pdev->dev,
4545 "Failed to enable card during resume\n");
4546 goto err;
4547 }
4548 pci_set_master(pdev);
4549
4550 /*
4551 * Calls hbaReset, initPort, & startPort function
4552 * then enables interrupts
4553 */
4554 rv = mtip_block_resume(dd);
4555 if (rv < 0)
4556 dev_err(&pdev->dev, "Unable to resume\n");
4557
4558 err:
4559 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4560
4561 return rv;
4562 }
4563
4564 /*
4565 * Shutdown routine
4566 *
4567 * return value
4568 * None
4569 */
4570 static void mtip_pci_shutdown(struct pci_dev *pdev)
4571 {
4572 struct driver_data *dd = pci_get_drvdata(pdev);
4573 if (dd)
4574 mtip_block_shutdown(dd);
4575 }
4576
4577 /* Table of device ids supported by this driver. */
4578 static const struct pci_device_id mtip_pci_tbl[] = {
4579 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4580 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4581 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4582 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4583 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4584 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4585 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4586 { 0 }
4587 };
4588
4589 /* Structure that describes the PCI driver functions. */
4590 static struct pci_driver mtip_pci_driver = {
4591 .name = MTIP_DRV_NAME,
4592 .id_table = mtip_pci_tbl,
4593 .probe = mtip_pci_probe,
4594 .remove = mtip_pci_remove,
4595 .suspend = mtip_pci_suspend,
4596 .resume = mtip_pci_resume,
4597 .shutdown = mtip_pci_shutdown,
4598 };
4599
4600 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4601
4602 /*
4603 * Module initialization function.
4604 *
4605 * Called once when the module is loaded. This function allocates a major
4606 * block device number to the Cyclone devices and registers the PCI layer
4607 * of the driver.
4608 *
4609 * Return value
4610 * 0 on success else error code.
4611 */
4612 static int __init mtip_init(void)
4613 {
4614 int error;
4615
4616 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4617
4618 spin_lock_init(&dev_lock);
4619
4620 INIT_LIST_HEAD(&online_list);
4621 INIT_LIST_HEAD(&removing_list);
4622
4623 /* Allocate a major block device number to use with this driver. */
4624 error = register_blkdev(0, MTIP_DRV_NAME);
4625 if (error <= 0) {
4626 pr_err("Unable to register block device (%d)\n",
4627 error);
4628 return -EBUSY;
4629 }
4630 mtip_major = error;
4631
4632 dfs_parent = debugfs_create_dir("rssd", NULL);
4633 if (IS_ERR_OR_NULL(dfs_parent)) {
4634 pr_warn("Error creating debugfs parent\n");
4635 dfs_parent = NULL;
4636 }
4637 if (dfs_parent) {
4638 dfs_device_status = debugfs_create_file("device_status",
4639 S_IRUGO, dfs_parent, NULL,
4640 &mtip_device_status_fops);
4641 if (IS_ERR_OR_NULL(dfs_device_status)) {
4642 pr_err("Error creating device_status node\n");
4643 dfs_device_status = NULL;
4644 }
4645 }
4646
4647 /* Register our PCI operations. */
4648 error = pci_register_driver(&mtip_pci_driver);
4649 if (error) {
4650 debugfs_remove(dfs_parent);
4651 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4652 }
4653
4654 return error;
4655 }
4656
4657 /*
4658 * Module de-initialization function.
4659 *
4660 * Called once when the module is unloaded. This function deallocates
4661 * the major block device number allocated by mtip_init() and
4662 * unregisters the PCI layer of the driver.
4663 *
4664 * Return value
4665 * none
4666 */
4667 static void __exit mtip_exit(void)
4668 {
4669 /* Release the allocated major block device number. */
4670 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4671
4672 /* Unregister the PCI driver. */
4673 pci_unregister_driver(&mtip_pci_driver);
4674
4675 debugfs_remove_recursive(dfs_parent);
4676 }
4677
4678 MODULE_AUTHOR("Micron Technology, Inc");
4679 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4680 MODULE_LICENSE("GPL");
4681 MODULE_VERSION(MTIP_DRV_VERSION);
4682
4683 module_init(mtip_init);
4684 module_exit(mtip_exit);
Linux kernel - Deliverables
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