2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/list_sort.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/pci.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/t10-pi.h>
42 #include <linux/types.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_MINORS (1U << MINORBITS)
47 #define NVME_Q_DEPTH 1024
48 #define NVME_AQ_DEPTH 256
49 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
51 #define ADMIN_TIMEOUT (admin_timeout * HZ)
52 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
54 static unsigned char admin_timeout
= 60;
55 module_param(admin_timeout
, byte
, 0644);
56 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout
= 30;
59 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
60 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
62 static unsigned char shutdown_timeout
= 5;
63 module_param(shutdown_timeout
, byte
, 0644);
64 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
66 static int nvme_major
;
67 module_param(nvme_major
, int, 0);
69 static int nvme_char_major
;
70 module_param(nvme_char_major
, int, 0);
72 static int use_threaded_interrupts
;
73 module_param(use_threaded_interrupts
, int, 0);
75 static DEFINE_SPINLOCK(dev_list_lock
);
76 static LIST_HEAD(dev_list
);
77 static struct task_struct
*nvme_thread
;
78 static struct workqueue_struct
*nvme_workq
;
79 static wait_queue_head_t nvme_kthread_wait
;
81 static struct class *nvme_class
;
83 static void nvme_reset_failed_dev(struct work_struct
*ws
);
84 static int nvme_reset(struct nvme_dev
*dev
);
85 static int nvme_process_cq(struct nvme_queue
*nvmeq
);
87 struct async_cmd_info
{
88 struct kthread_work work
;
89 struct kthread_worker
*worker
;
97 * An NVM Express queue. Each device has at least two (one for admin
98 * commands and one for I/O commands).
101 struct device
*q_dmadev
;
102 struct nvme_dev
*dev
;
103 char irqname
[24]; /* nvme4294967295-65535\0 */
105 struct nvme_command
*sq_cmds
;
106 volatile struct nvme_completion
*cqes
;
107 struct blk_mq_tags
**tags
;
108 dma_addr_t sq_dma_addr
;
109 dma_addr_t cq_dma_addr
;
119 struct async_cmd_info cmdinfo
;
123 * Check we didin't inadvertently grow the command struct
125 static inline void _nvme_check_size(void)
127 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
129 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
130 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
131 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
136 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
137 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
141 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
142 struct nvme_completion
*);
144 struct nvme_cmd_info
{
145 nvme_completion_fn fn
;
148 struct nvme_queue
*nvmeq
;
149 struct nvme_iod iod
[0];
153 * Max size of iod being embedded in the request payload
155 #define NVME_INT_PAGES 2
156 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
157 #define NVME_INT_MASK 0x01
160 * Will slightly overestimate the number of pages needed. This is OK
161 * as it only leads to a small amount of wasted memory for the lifetime of
164 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
166 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->page_size
, dev
->page_size
);
167 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
170 static unsigned int nvme_cmd_size(struct nvme_dev
*dev
)
172 unsigned int ret
= sizeof(struct nvme_cmd_info
);
174 ret
+= sizeof(struct nvme_iod
);
175 ret
+= sizeof(__le64
*) * nvme_npages(NVME_INT_BYTES(dev
), dev
);
176 ret
+= sizeof(struct scatterlist
) * NVME_INT_PAGES
;
181 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
182 unsigned int hctx_idx
)
184 struct nvme_dev
*dev
= data
;
185 struct nvme_queue
*nvmeq
= dev
->queues
[0];
187 WARN_ON(hctx_idx
!= 0);
188 WARN_ON(dev
->admin_tagset
.tags
[0] != hctx
->tags
);
189 WARN_ON(nvmeq
->tags
);
191 hctx
->driver_data
= nvmeq
;
192 nvmeq
->tags
= &dev
->admin_tagset
.tags
[0];
196 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx
*hctx
, unsigned int hctx_idx
)
198 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
203 static int nvme_admin_init_request(void *data
, struct request
*req
,
204 unsigned int hctx_idx
, unsigned int rq_idx
,
205 unsigned int numa_node
)
207 struct nvme_dev
*dev
= data
;
208 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
209 struct nvme_queue
*nvmeq
= dev
->queues
[0];
216 static int nvme_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
217 unsigned int hctx_idx
)
219 struct nvme_dev
*dev
= data
;
220 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
223 nvmeq
->tags
= &dev
->tagset
.tags
[hctx_idx
];
225 WARN_ON(dev
->tagset
.tags
[hctx_idx
] != hctx
->tags
);
226 hctx
->driver_data
= nvmeq
;
230 static int nvme_init_request(void *data
, struct request
*req
,
231 unsigned int hctx_idx
, unsigned int rq_idx
,
232 unsigned int numa_node
)
234 struct nvme_dev
*dev
= data
;
235 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
236 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
243 static void nvme_set_info(struct nvme_cmd_info
*cmd
, void *ctx
,
244 nvme_completion_fn handler
)
249 blk_mq_start_request(blk_mq_rq_from_pdu(cmd
));
252 static void *iod_get_private(struct nvme_iod
*iod
)
254 return (void *) (iod
->private & ~0x1UL
);
258 * If bit 0 is set, the iod is embedded in the request payload.
260 static bool iod_should_kfree(struct nvme_iod
*iod
)
262 return (iod
->private & NVME_INT_MASK
) == 0;
265 /* Special values must be less than 0x1000 */
266 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
267 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
268 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
269 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
271 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
272 struct nvme_completion
*cqe
)
274 if (ctx
== CMD_CTX_CANCELLED
)
276 if (ctx
== CMD_CTX_COMPLETED
) {
277 dev_warn(nvmeq
->q_dmadev
,
278 "completed id %d twice on queue %d\n",
279 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
282 if (ctx
== CMD_CTX_INVALID
) {
283 dev_warn(nvmeq
->q_dmadev
,
284 "invalid id %d completed on queue %d\n",
285 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
288 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
291 static void *cancel_cmd_info(struct nvme_cmd_info
*cmd
, nvme_completion_fn
*fn
)
298 cmd
->fn
= special_completion
;
299 cmd
->ctx
= CMD_CTX_CANCELLED
;
303 static void async_req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
304 struct nvme_completion
*cqe
)
306 u32 result
= le32_to_cpup(&cqe
->result
);
307 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
309 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
310 ++nvmeq
->dev
->event_limit
;
311 if (status
!= NVME_SC_SUCCESS
)
314 switch (result
& 0xff07) {
315 case NVME_AER_NOTICE_NS_CHANGED
:
316 dev_info(nvmeq
->q_dmadev
, "rescanning\n");
317 schedule_work(&nvmeq
->dev
->scan_work
);
319 dev_warn(nvmeq
->q_dmadev
, "async event result %08x\n", result
);
323 static void abort_completion(struct nvme_queue
*nvmeq
, void *ctx
,
324 struct nvme_completion
*cqe
)
326 struct request
*req
= ctx
;
328 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
329 u32 result
= le32_to_cpup(&cqe
->result
);
331 blk_mq_free_request(req
);
333 dev_warn(nvmeq
->q_dmadev
, "Abort status:%x result:%x", status
, result
);
334 ++nvmeq
->dev
->abort_limit
;
337 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
338 struct nvme_completion
*cqe
)
340 struct async_cmd_info
*cmdinfo
= ctx
;
341 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
342 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
343 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
344 blk_mq_free_request(cmdinfo
->req
);
347 static inline struct nvme_cmd_info
*get_cmd_from_tag(struct nvme_queue
*nvmeq
,
350 struct request
*req
= blk_mq_tag_to_rq(*nvmeq
->tags
, tag
);
352 return blk_mq_rq_to_pdu(req
);
356 * Called with local interrupts disabled and the q_lock held. May not sleep.
358 static void *nvme_finish_cmd(struct nvme_queue
*nvmeq
, int tag
,
359 nvme_completion_fn
*fn
)
361 struct nvme_cmd_info
*cmd
= get_cmd_from_tag(nvmeq
, tag
);
363 if (tag
>= nvmeq
->q_depth
) {
364 *fn
= special_completion
;
365 return CMD_CTX_INVALID
;
370 cmd
->fn
= special_completion
;
371 cmd
->ctx
= CMD_CTX_COMPLETED
;
376 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
377 * @nvmeq: The queue to use
378 * @cmd: The command to send
380 * Safe to use from interrupt context
382 static int __nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
384 u16 tail
= nvmeq
->sq_tail
;
386 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
387 if (++tail
== nvmeq
->q_depth
)
389 writel(tail
, nvmeq
->q_db
);
390 nvmeq
->sq_tail
= tail
;
395 static int nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
399 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
400 ret
= __nvme_submit_cmd(nvmeq
, cmd
);
401 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
405 static __le64
**iod_list(struct nvme_iod
*iod
)
407 return ((void *)iod
) + iod
->offset
;
410 static inline void iod_init(struct nvme_iod
*iod
, unsigned nbytes
,
411 unsigned nseg
, unsigned long private)
413 iod
->private = private;
414 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
416 iod
->length
= nbytes
;
420 static struct nvme_iod
*
421 __nvme_alloc_iod(unsigned nseg
, unsigned bytes
, struct nvme_dev
*dev
,
422 unsigned long priv
, gfp_t gfp
)
424 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
425 sizeof(__le64
*) * nvme_npages(bytes
, dev
) +
426 sizeof(struct scatterlist
) * nseg
, gfp
);
429 iod_init(iod
, bytes
, nseg
, priv
);
434 static struct nvme_iod
*nvme_alloc_iod(struct request
*rq
, struct nvme_dev
*dev
,
437 unsigned size
= !(rq
->cmd_flags
& REQ_DISCARD
) ? blk_rq_bytes(rq
) :
438 sizeof(struct nvme_dsm_range
);
439 struct nvme_iod
*iod
;
441 if (rq
->nr_phys_segments
<= NVME_INT_PAGES
&&
442 size
<= NVME_INT_BYTES(dev
)) {
443 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(rq
);
446 iod_init(iod
, size
, rq
->nr_phys_segments
,
447 (unsigned long) rq
| NVME_INT_MASK
);
451 return __nvme_alloc_iod(rq
->nr_phys_segments
, size
, dev
,
452 (unsigned long) rq
, gfp
);
455 static void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
457 const int last_prp
= dev
->page_size
/ 8 - 1;
459 __le64
**list
= iod_list(iod
);
460 dma_addr_t prp_dma
= iod
->first_dma
;
462 if (iod
->npages
== 0)
463 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
464 for (i
= 0; i
< iod
->npages
; i
++) {
465 __le64
*prp_list
= list
[i
];
466 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
467 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
468 prp_dma
= next_prp_dma
;
471 if (iod_should_kfree(iod
))
475 static int nvme_error_status(u16 status
)
477 switch (status
& 0x7ff) {
478 case NVME_SC_SUCCESS
:
480 case NVME_SC_CAP_EXCEEDED
:
487 #ifdef CONFIG_BLK_DEV_INTEGRITY
488 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
490 if (be32_to_cpu(pi
->ref_tag
) == v
)
491 pi
->ref_tag
= cpu_to_be32(p
);
494 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
496 if (be32_to_cpu(pi
->ref_tag
) == p
)
497 pi
->ref_tag
= cpu_to_be32(v
);
501 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
503 * The virtual start sector is the one that was originally submitted by the
504 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
505 * start sector may be different. Remap protection information to match the
506 * physical LBA on writes, and back to the original seed on reads.
508 * Type 0 and 3 do not have a ref tag, so no remapping required.
510 static void nvme_dif_remap(struct request
*req
,
511 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
513 struct nvme_ns
*ns
= req
->rq_disk
->private_data
;
514 struct bio_integrity_payload
*bip
;
515 struct t10_pi_tuple
*pi
;
517 u32 i
, nlb
, ts
, phys
, virt
;
519 if (!ns
->pi_type
|| ns
->pi_type
== NVME_NS_DPS_PI_TYPE3
)
522 bip
= bio_integrity(req
->bio
);
526 pmap
= kmap_atomic(bip
->bip_vec
->bv_page
) + bip
->bip_vec
->bv_offset
;
529 virt
= bip_get_seed(bip
);
530 phys
= nvme_block_nr(ns
, blk_rq_pos(req
));
531 nlb
= (blk_rq_bytes(req
) >> ns
->lba_shift
);
532 ts
= ns
->disk
->integrity
->tuple_size
;
534 for (i
= 0; i
< nlb
; i
++, virt
++, phys
++) {
535 pi
= (struct t10_pi_tuple
*)p
;
536 dif_swap(phys
, virt
, pi
);
542 static int nvme_noop_verify(struct blk_integrity_iter
*iter
)
547 static int nvme_noop_generate(struct blk_integrity_iter
*iter
)
552 struct blk_integrity nvme_meta_noop
= {
553 .name
= "NVME_META_NOOP",
554 .generate_fn
= nvme_noop_generate
,
555 .verify_fn
= nvme_noop_verify
,
558 static void nvme_init_integrity(struct nvme_ns
*ns
)
560 struct blk_integrity integrity
;
562 switch (ns
->pi_type
) {
563 case NVME_NS_DPS_PI_TYPE3
:
564 integrity
= t10_pi_type3_crc
;
566 case NVME_NS_DPS_PI_TYPE1
:
567 case NVME_NS_DPS_PI_TYPE2
:
568 integrity
= t10_pi_type1_crc
;
571 integrity
= nvme_meta_noop
;
574 integrity
.tuple_size
= ns
->ms
;
575 blk_integrity_register(ns
->disk
, &integrity
);
576 blk_queue_max_integrity_segments(ns
->queue
, 1);
578 #else /* CONFIG_BLK_DEV_INTEGRITY */
579 static void nvme_dif_remap(struct request
*req
,
580 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
583 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
586 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
589 static void nvme_init_integrity(struct nvme_ns
*ns
)
594 static void req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
595 struct nvme_completion
*cqe
)
597 struct nvme_iod
*iod
= ctx
;
598 struct request
*req
= iod_get_private(iod
);
599 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
601 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
603 if (unlikely(status
)) {
604 if (!(status
& NVME_SC_DNR
|| blk_noretry_request(req
))
605 && (jiffies
- req
->start_time
) < req
->timeout
) {
608 blk_mq_requeue_request(req
);
609 spin_lock_irqsave(req
->q
->queue_lock
, flags
);
610 if (!blk_queue_stopped(req
->q
))
611 blk_mq_kick_requeue_list(req
->q
);
612 spin_unlock_irqrestore(req
->q
->queue_lock
, flags
);
615 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
616 if (cmd_rq
->ctx
== CMD_CTX_CANCELLED
)
617 req
->errors
= -EINTR
;
619 req
->errors
= status
;
621 req
->errors
= nvme_error_status(status
);
625 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
) {
626 u32 result
= le32_to_cpup(&cqe
->result
);
627 req
->special
= (void *)(uintptr_t)result
;
631 dev_warn(nvmeq
->dev
->dev
,
632 "completing aborted command with status:%04x\n",
636 dma_unmap_sg(nvmeq
->dev
->dev
, iod
->sg
, iod
->nents
,
637 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
638 if (blk_integrity_rq(req
)) {
639 if (!rq_data_dir(req
))
640 nvme_dif_remap(req
, nvme_dif_complete
);
641 dma_unmap_sg(nvmeq
->dev
->dev
, iod
->meta_sg
, 1,
642 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
645 nvme_free_iod(nvmeq
->dev
, iod
);
647 blk_mq_complete_request(req
);
650 /* length is in bytes. gfp flags indicates whether we may sleep. */
651 static int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
,
652 int total_len
, gfp_t gfp
)
654 struct dma_pool
*pool
;
655 int length
= total_len
;
656 struct scatterlist
*sg
= iod
->sg
;
657 int dma_len
= sg_dma_len(sg
);
658 u64 dma_addr
= sg_dma_address(sg
);
659 u32 page_size
= dev
->page_size
;
660 int offset
= dma_addr
& (page_size
- 1);
662 __le64
**list
= iod_list(iod
);
666 length
-= (page_size
- offset
);
670 dma_len
-= (page_size
- offset
);
672 dma_addr
+= (page_size
- offset
);
675 dma_addr
= sg_dma_address(sg
);
676 dma_len
= sg_dma_len(sg
);
679 if (length
<= page_size
) {
680 iod
->first_dma
= dma_addr
;
684 nprps
= DIV_ROUND_UP(length
, page_size
);
685 if (nprps
<= (256 / 8)) {
686 pool
= dev
->prp_small_pool
;
689 pool
= dev
->prp_page_pool
;
693 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
695 iod
->first_dma
= dma_addr
;
697 return (total_len
- length
) + page_size
;
700 iod
->first_dma
= prp_dma
;
703 if (i
== page_size
>> 3) {
704 __le64
*old_prp_list
= prp_list
;
705 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
707 return total_len
- length
;
708 list
[iod
->npages
++] = prp_list
;
709 prp_list
[0] = old_prp_list
[i
- 1];
710 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
713 prp_list
[i
++] = cpu_to_le64(dma_addr
);
714 dma_len
-= page_size
;
715 dma_addr
+= page_size
;
723 dma_addr
= sg_dma_address(sg
);
724 dma_len
= sg_dma_len(sg
);
730 static void nvme_submit_priv(struct nvme_queue
*nvmeq
, struct request
*req
,
731 struct nvme_iod
*iod
)
733 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
735 memcpy(cmnd
, req
->cmd
, sizeof(struct nvme_command
));
736 cmnd
->rw
.command_id
= req
->tag
;
737 if (req
->nr_phys_segments
) {
738 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
739 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
742 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
744 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
748 * We reuse the small pool to allocate the 16-byte range here as it is not
749 * worth having a special pool for these or additional cases to handle freeing
752 static void nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
753 struct request
*req
, struct nvme_iod
*iod
)
755 struct nvme_dsm_range
*range
=
756 (struct nvme_dsm_range
*)iod_list(iod
)[0];
757 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
759 range
->cattr
= cpu_to_le32(0);
760 range
->nlb
= cpu_to_le32(blk_rq_bytes(req
) >> ns
->lba_shift
);
761 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
763 memset(cmnd
, 0, sizeof(*cmnd
));
764 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
765 cmnd
->dsm
.command_id
= req
->tag
;
766 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
767 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
769 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
771 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
773 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
776 static void nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
779 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
781 memset(cmnd
, 0, sizeof(*cmnd
));
782 cmnd
->common
.opcode
= nvme_cmd_flush
;
783 cmnd
->common
.command_id
= cmdid
;
784 cmnd
->common
.nsid
= cpu_to_le32(ns
->ns_id
);
786 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
788 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
791 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
794 struct request
*req
= iod_get_private(iod
);
795 struct nvme_command
*cmnd
;
799 if (req
->cmd_flags
& REQ_FUA
)
800 control
|= NVME_RW_FUA
;
801 if (req
->cmd_flags
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
802 control
|= NVME_RW_LR
;
804 if (req
->cmd_flags
& REQ_RAHEAD
)
805 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
807 cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
808 memset(cmnd
, 0, sizeof(*cmnd
));
810 cmnd
->rw
.opcode
= (rq_data_dir(req
) ? nvme_cmd_write
: nvme_cmd_read
);
811 cmnd
->rw
.command_id
= req
->tag
;
812 cmnd
->rw
.nsid
= cpu_to_le32(ns
->ns_id
);
813 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
814 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
815 cmnd
->rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
816 cmnd
->rw
.length
= cpu_to_le16((blk_rq_bytes(req
) >> ns
->lba_shift
) - 1);
818 if (blk_integrity_rq(req
)) {
819 cmnd
->rw
.metadata
= cpu_to_le64(sg_dma_address(iod
->meta_sg
));
820 switch (ns
->pi_type
) {
821 case NVME_NS_DPS_PI_TYPE3
:
822 control
|= NVME_RW_PRINFO_PRCHK_GUARD
;
824 case NVME_NS_DPS_PI_TYPE1
:
825 case NVME_NS_DPS_PI_TYPE2
:
826 control
|= NVME_RW_PRINFO_PRCHK_GUARD
|
827 NVME_RW_PRINFO_PRCHK_REF
;
828 cmnd
->rw
.reftag
= cpu_to_le32(
829 nvme_block_nr(ns
, blk_rq_pos(req
)));
833 control
|= NVME_RW_PRINFO_PRACT
;
835 cmnd
->rw
.control
= cpu_to_le16(control
);
836 cmnd
->rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
838 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
840 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
846 * NOTE: ns is NULL when called on the admin queue.
848 static int nvme_queue_rq(struct blk_mq_hw_ctx
*hctx
,
849 const struct blk_mq_queue_data
*bd
)
851 struct nvme_ns
*ns
= hctx
->queue
->queuedata
;
852 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
853 struct nvme_dev
*dev
= nvmeq
->dev
;
854 struct request
*req
= bd
->rq
;
855 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
856 struct nvme_iod
*iod
;
857 enum dma_data_direction dma_dir
;
860 * If formated with metadata, require the block layer provide a buffer
861 * unless this namespace is formated such that the metadata can be
862 * stripped/generated by the controller with PRACT=1.
864 if (ns
&& ns
->ms
&& !blk_integrity_rq(req
)) {
865 if (!(ns
->pi_type
&& ns
->ms
== 8) &&
866 req
->cmd_type
!= REQ_TYPE_DRV_PRIV
) {
867 req
->errors
= -EFAULT
;
868 blk_mq_complete_request(req
);
869 return BLK_MQ_RQ_QUEUE_OK
;
873 iod
= nvme_alloc_iod(req
, dev
, GFP_ATOMIC
);
875 return BLK_MQ_RQ_QUEUE_BUSY
;
877 if (req
->cmd_flags
& REQ_DISCARD
) {
880 * We reuse the small pool to allocate the 16-byte range here
881 * as it is not worth having a special pool for these or
882 * additional cases to handle freeing the iod.
884 range
= dma_pool_alloc(dev
->prp_small_pool
, GFP_ATOMIC
,
888 iod_list(iod
)[0] = (__le64
*)range
;
890 } else if (req
->nr_phys_segments
) {
891 dma_dir
= rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
893 sg_init_table(iod
->sg
, req
->nr_phys_segments
);
894 iod
->nents
= blk_rq_map_sg(req
->q
, req
, iod
->sg
);
898 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
))
901 if (blk_rq_bytes(req
) !=
902 nvme_setup_prps(dev
, iod
, blk_rq_bytes(req
), GFP_ATOMIC
)) {
903 dma_unmap_sg(dev
->dev
, iod
->sg
, iod
->nents
, dma_dir
);
906 if (blk_integrity_rq(req
)) {
907 if (blk_rq_count_integrity_sg(req
->q
, req
->bio
) != 1)
910 sg_init_table(iod
->meta_sg
, 1);
911 if (blk_rq_map_integrity_sg(
912 req
->q
, req
->bio
, iod
->meta_sg
) != 1)
915 if (rq_data_dir(req
))
916 nvme_dif_remap(req
, nvme_dif_prep
);
918 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->meta_sg
, 1, dma_dir
))
923 nvme_set_info(cmd
, iod
, req_completion
);
924 spin_lock_irq(&nvmeq
->q_lock
);
925 if (req
->cmd_type
== REQ_TYPE_DRV_PRIV
)
926 nvme_submit_priv(nvmeq
, req
, iod
);
927 else if (req
->cmd_flags
& REQ_DISCARD
)
928 nvme_submit_discard(nvmeq
, ns
, req
, iod
);
929 else if (req
->cmd_flags
& REQ_FLUSH
)
930 nvme_submit_flush(nvmeq
, ns
, req
->tag
);
932 nvme_submit_iod(nvmeq
, iod
, ns
);
934 nvme_process_cq(nvmeq
);
935 spin_unlock_irq(&nvmeq
->q_lock
);
936 return BLK_MQ_RQ_QUEUE_OK
;
939 nvme_free_iod(dev
, iod
);
940 return BLK_MQ_RQ_QUEUE_ERROR
;
942 nvme_free_iod(dev
, iod
);
943 return BLK_MQ_RQ_QUEUE_BUSY
;
946 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
950 head
= nvmeq
->cq_head
;
951 phase
= nvmeq
->cq_phase
;
955 nvme_completion_fn fn
;
956 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
957 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
959 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
960 if (++head
== nvmeq
->q_depth
) {
964 ctx
= nvme_finish_cmd(nvmeq
, cqe
.command_id
, &fn
);
965 fn(nvmeq
, ctx
, &cqe
);
968 /* If the controller ignores the cq head doorbell and continuously
969 * writes to the queue, it is theoretically possible to wrap around
970 * the queue twice and mistakenly return IRQ_NONE. Linux only
971 * requires that 0.1% of your interrupts are handled, so this isn't
974 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
977 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
978 nvmeq
->cq_head
= head
;
979 nvmeq
->cq_phase
= phase
;
985 static irqreturn_t
nvme_irq(int irq
, void *data
)
988 struct nvme_queue
*nvmeq
= data
;
989 spin_lock(&nvmeq
->q_lock
);
990 nvme_process_cq(nvmeq
);
991 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
993 spin_unlock(&nvmeq
->q_lock
);
997 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
999 struct nvme_queue
*nvmeq
= data
;
1000 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
1001 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
1003 return IRQ_WAKE_THREAD
;
1007 * Returns 0 on success. If the result is negative, it's a Linux error code;
1008 * if the result is positive, it's an NVM Express status code
1010 int __nvme_submit_sync_cmd(struct request_queue
*q
, struct nvme_command
*cmd
,
1011 void *buffer
, void __user
*ubuffer
, unsigned bufflen
,
1012 u32
*result
, unsigned timeout
)
1014 bool write
= cmd
->common
.opcode
& 1;
1015 struct bio
*bio
= NULL
;
1016 struct request
*req
;
1019 req
= blk_mq_alloc_request(q
, write
, GFP_KERNEL
, false);
1021 return PTR_ERR(req
);
1023 req
->cmd_type
= REQ_TYPE_DRV_PRIV
;
1024 req
->cmd_flags
|= REQ_FAILFAST_DRIVER
;
1025 req
->__data_len
= 0;
1026 req
->__sector
= (sector_t
) -1;
1027 req
->bio
= req
->biotail
= NULL
;
1029 req
->timeout
= timeout
? timeout
: ADMIN_TIMEOUT
;
1031 req
->cmd
= (unsigned char *)cmd
;
1032 req
->cmd_len
= sizeof(struct nvme_command
);
1033 req
->special
= (void *)0;
1035 if (buffer
&& bufflen
) {
1036 ret
= blk_rq_map_kern(q
, req
, buffer
, bufflen
, __GFP_WAIT
);
1039 } else if (ubuffer
&& bufflen
) {
1040 ret
= blk_rq_map_user(q
, req
, NULL
, ubuffer
, bufflen
, __GFP_WAIT
);
1046 blk_execute_rq(req
->q
, NULL
, req
, 0);
1048 blk_rq_unmap_user(bio
);
1050 *result
= (u32
)(uintptr_t)req
->special
;
1053 blk_mq_free_request(req
);
1057 int nvme_submit_sync_cmd(struct request_queue
*q
, struct nvme_command
*cmd
,
1058 void *buffer
, unsigned bufflen
)
1060 return __nvme_submit_sync_cmd(q
, cmd
, buffer
, NULL
, bufflen
, NULL
, 0);
1063 static int nvme_submit_async_admin_req(struct nvme_dev
*dev
)
1065 struct nvme_queue
*nvmeq
= dev
->queues
[0];
1066 struct nvme_command c
;
1067 struct nvme_cmd_info
*cmd_info
;
1068 struct request
*req
;
1070 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
, true);
1072 return PTR_ERR(req
);
1074 req
->cmd_flags
|= REQ_NO_TIMEOUT
;
1075 cmd_info
= blk_mq_rq_to_pdu(req
);
1076 nvme_set_info(cmd_info
, NULL
, async_req_completion
);
1078 memset(&c
, 0, sizeof(c
));
1079 c
.common
.opcode
= nvme_admin_async_event
;
1080 c
.common
.command_id
= req
->tag
;
1082 blk_mq_free_request(req
);
1083 return __nvme_submit_cmd(nvmeq
, &c
);
1086 static int nvme_submit_admin_async_cmd(struct nvme_dev
*dev
,
1087 struct nvme_command
*cmd
,
1088 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
1090 struct nvme_queue
*nvmeq
= dev
->queues
[0];
1091 struct request
*req
;
1092 struct nvme_cmd_info
*cmd_rq
;
1094 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
1096 return PTR_ERR(req
);
1098 req
->timeout
= timeout
;
1099 cmd_rq
= blk_mq_rq_to_pdu(req
);
1101 nvme_set_info(cmd_rq
, cmdinfo
, async_completion
);
1102 cmdinfo
->status
= -EINTR
;
1104 cmd
->common
.command_id
= req
->tag
;
1106 return nvme_submit_cmd(nvmeq
, cmd
);
1109 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
1111 struct nvme_command c
;
1113 memset(&c
, 0, sizeof(c
));
1114 c
.delete_queue
.opcode
= opcode
;
1115 c
.delete_queue
.qid
= cpu_to_le16(id
);
1117 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1120 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
1121 struct nvme_queue
*nvmeq
)
1123 struct nvme_command c
;
1124 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
1127 * Note: we (ab)use the fact the the prp fields survive if no data
1128 * is attached to the request.
1130 memset(&c
, 0, sizeof(c
));
1131 c
.create_cq
.opcode
= nvme_admin_create_cq
;
1132 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
1133 c
.create_cq
.cqid
= cpu_to_le16(qid
);
1134 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1135 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
1136 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
1138 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1141 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
1142 struct nvme_queue
*nvmeq
)
1144 struct nvme_command c
;
1145 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
1148 * Note: we (ab)use the fact the the prp fields survive if no data
1149 * is attached to the request.
1151 memset(&c
, 0, sizeof(c
));
1152 c
.create_sq
.opcode
= nvme_admin_create_sq
;
1153 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
1154 c
.create_sq
.sqid
= cpu_to_le16(qid
);
1155 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1156 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
1157 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1159 return nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, 0);
1162 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1164 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1167 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1169 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1172 int nvme_identify_ctrl(struct nvme_dev
*dev
, struct nvme_id_ctrl
**id
)
1174 struct nvme_command c
= {
1175 .identify
.opcode
= nvme_admin_identify
,
1176 .identify
.cns
= cpu_to_le32(1),
1180 *id
= kmalloc(sizeof(struct nvme_id_ctrl
), GFP_KERNEL
);
1184 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *id
,
1185 sizeof(struct nvme_id_ctrl
));
1191 int nvme_identify_ns(struct nvme_dev
*dev
, unsigned nsid
,
1192 struct nvme_id_ns
**id
)
1194 struct nvme_command c
= {
1195 .identify
.opcode
= nvme_admin_identify
,
1196 .identify
.nsid
= cpu_to_le32(nsid
),
1200 *id
= kmalloc(sizeof(struct nvme_id_ns
), GFP_KERNEL
);
1204 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *id
,
1205 sizeof(struct nvme_id_ns
));
1211 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1212 dma_addr_t dma_addr
, u32
*result
)
1214 struct nvme_command c
;
1216 memset(&c
, 0, sizeof(c
));
1217 c
.features
.opcode
= nvme_admin_get_features
;
1218 c
.features
.nsid
= cpu_to_le32(nsid
);
1219 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1220 c
.features
.fid
= cpu_to_le32(fid
);
1222 return __nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, NULL
, 0,
1226 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1227 dma_addr_t dma_addr
, u32
*result
)
1229 struct nvme_command c
;
1231 memset(&c
, 0, sizeof(c
));
1232 c
.features
.opcode
= nvme_admin_set_features
;
1233 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1234 c
.features
.fid
= cpu_to_le32(fid
);
1235 c
.features
.dword11
= cpu_to_le32(dword11
);
1237 return __nvme_submit_sync_cmd(dev
->admin_q
, &c
, NULL
, NULL
, 0,
1241 int nvme_get_log_page(struct nvme_dev
*dev
, struct nvme_smart_log
**log
)
1243 struct nvme_command c
= {
1244 .common
.opcode
= nvme_admin_get_log_page
,
1245 .common
.nsid
= cpu_to_le32(0xFFFFFFFF),
1246 .common
.cdw10
[0] = cpu_to_le32(
1247 (((sizeof(struct nvme_smart_log
) / 4) - 1) << 16) |
1252 *log
= kmalloc(sizeof(struct nvme_smart_log
), GFP_KERNEL
);
1256 error
= nvme_submit_sync_cmd(dev
->admin_q
, &c
, *log
,
1257 sizeof(struct nvme_smart_log
));
1264 * nvme_abort_req - Attempt aborting a request
1266 * Schedule controller reset if the command was already aborted once before and
1267 * still hasn't been returned to the driver, or if this is the admin queue.
1269 static void nvme_abort_req(struct request
*req
)
1271 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
1272 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
1273 struct nvme_dev
*dev
= nvmeq
->dev
;
1274 struct request
*abort_req
;
1275 struct nvme_cmd_info
*abort_cmd
;
1276 struct nvme_command cmd
;
1278 if (!nvmeq
->qid
|| cmd_rq
->aborted
) {
1279 unsigned long flags
;
1281 spin_lock_irqsave(&dev_list_lock
, flags
);
1282 if (work_busy(&dev
->reset_work
))
1284 list_del_init(&dev
->node
);
1285 dev_warn(dev
->dev
, "I/O %d QID %d timeout, reset controller\n",
1286 req
->tag
, nvmeq
->qid
);
1287 dev
->reset_workfn
= nvme_reset_failed_dev
;
1288 queue_work(nvme_workq
, &dev
->reset_work
);
1290 spin_unlock_irqrestore(&dev_list_lock
, flags
);
1294 if (!dev
->abort_limit
)
1297 abort_req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
,
1299 if (IS_ERR(abort_req
))
1302 abort_cmd
= blk_mq_rq_to_pdu(abort_req
);
1303 nvme_set_info(abort_cmd
, abort_req
, abort_completion
);
1305 memset(&cmd
, 0, sizeof(cmd
));
1306 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1307 cmd
.abort
.cid
= req
->tag
;
1308 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1309 cmd
.abort
.command_id
= abort_req
->tag
;
1312 cmd_rq
->aborted
= 1;
1314 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", req
->tag
,
1316 if (nvme_submit_cmd(dev
->queues
[0], &cmd
) < 0) {
1317 dev_warn(nvmeq
->q_dmadev
,
1318 "Could not abort I/O %d QID %d",
1319 req
->tag
, nvmeq
->qid
);
1320 blk_mq_free_request(abort_req
);
1324 static void nvme_cancel_queue_ios(struct request
*req
, void *data
, bool reserved
)
1326 struct nvme_queue
*nvmeq
= data
;
1328 nvme_completion_fn fn
;
1329 struct nvme_cmd_info
*cmd
;
1330 struct nvme_completion cqe
;
1332 if (!blk_mq_request_started(req
))
1335 cmd
= blk_mq_rq_to_pdu(req
);
1337 if (cmd
->ctx
== CMD_CTX_CANCELLED
)
1340 if (blk_queue_dying(req
->q
))
1341 cqe
.status
= cpu_to_le16((NVME_SC_ABORT_REQ
| NVME_SC_DNR
) << 1);
1343 cqe
.status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1);
1346 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n",
1347 req
->tag
, nvmeq
->qid
);
1348 ctx
= cancel_cmd_info(cmd
, &fn
);
1349 fn(nvmeq
, ctx
, &cqe
);
1352 static enum blk_eh_timer_return
nvme_timeout(struct request
*req
, bool reserved
)
1354 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
1355 struct nvme_queue
*nvmeq
= cmd
->nvmeq
;
1357 dev_warn(nvmeq
->q_dmadev
, "Timeout I/O %d QID %d\n", req
->tag
,
1359 spin_lock_irq(&nvmeq
->q_lock
);
1360 nvme_abort_req(req
);
1361 spin_unlock_irq(&nvmeq
->q_lock
);
1364 * The aborted req will be completed on receiving the abort req.
1365 * We enable the timer again. If hit twice, it'll cause a device reset,
1366 * as the device then is in a faulty state.
1368 return BLK_EH_RESET_TIMER
;
1371 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1373 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1374 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1375 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1376 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1380 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1384 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1385 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1387 dev
->queues
[i
] = NULL
;
1388 nvme_free_queue(nvmeq
);
1393 * nvme_suspend_queue - put queue into suspended state
1394 * @nvmeq - queue to suspend
1396 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1400 spin_lock_irq(&nvmeq
->q_lock
);
1401 if (nvmeq
->cq_vector
== -1) {
1402 spin_unlock_irq(&nvmeq
->q_lock
);
1405 vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1406 nvmeq
->dev
->online_queues
--;
1407 nvmeq
->cq_vector
= -1;
1408 spin_unlock_irq(&nvmeq
->q_lock
);
1410 if (!nvmeq
->qid
&& nvmeq
->dev
->admin_q
)
1411 blk_mq_freeze_queue_start(nvmeq
->dev
->admin_q
);
1413 irq_set_affinity_hint(vector
, NULL
);
1414 free_irq(vector
, nvmeq
);
1419 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1421 spin_lock_irq(&nvmeq
->q_lock
);
1422 if (nvmeq
->tags
&& *nvmeq
->tags
)
1423 blk_mq_all_tag_busy_iter(*nvmeq
->tags
, nvme_cancel_queue_ios
, nvmeq
);
1424 spin_unlock_irq(&nvmeq
->q_lock
);
1427 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1429 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1433 if (nvme_suspend_queue(nvmeq
))
1436 /* Don't tell the adapter to delete the admin queue.
1437 * Don't tell a removed adapter to delete IO queues. */
1438 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1439 adapter_delete_sq(dev
, qid
);
1440 adapter_delete_cq(dev
, qid
);
1443 spin_lock_irq(&nvmeq
->q_lock
);
1444 nvme_process_cq(nvmeq
);
1445 spin_unlock_irq(&nvmeq
->q_lock
);
1448 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1451 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
), GFP_KERNEL
);
1455 nvmeq
->cqes
= dma_zalloc_coherent(dev
->dev
, CQ_SIZE(depth
),
1456 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1460 nvmeq
->sq_cmds
= dma_alloc_coherent(dev
->dev
, SQ_SIZE(depth
),
1461 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1462 if (!nvmeq
->sq_cmds
)
1465 nvmeq
->q_dmadev
= dev
->dev
;
1467 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1468 dev
->instance
, qid
);
1469 spin_lock_init(&nvmeq
->q_lock
);
1471 nvmeq
->cq_phase
= 1;
1472 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1473 nvmeq
->q_depth
= depth
;
1475 dev
->queues
[qid
] = nvmeq
;
1477 /* make sure queue descriptor is set before queue count, for kthread */
1484 dma_free_coherent(dev
->dev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1485 nvmeq
->cq_dma_addr
);
1491 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1494 if (use_threaded_interrupts
)
1495 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1496 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1498 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1499 IRQF_SHARED
, name
, nvmeq
);
1502 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1504 struct nvme_dev
*dev
= nvmeq
->dev
;
1506 spin_lock_irq(&nvmeq
->q_lock
);
1509 nvmeq
->cq_phase
= 1;
1510 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1511 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1512 dev
->online_queues
++;
1513 spin_unlock_irq(&nvmeq
->q_lock
);
1516 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1518 struct nvme_dev
*dev
= nvmeq
->dev
;
1521 nvmeq
->cq_vector
= qid
- 1;
1522 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1526 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1530 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1534 nvme_init_queue(nvmeq
, qid
);
1538 adapter_delete_sq(dev
, qid
);
1540 adapter_delete_cq(dev
, qid
);
1544 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1546 unsigned long timeout
;
1547 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1549 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1551 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1553 if (fatal_signal_pending(current
))
1555 if (time_after(jiffies
, timeout
)) {
1557 "Device not ready; aborting %s\n", enabled
?
1558 "initialisation" : "reset");
1567 * If the device has been passed off to us in an enabled state, just clear
1568 * the enabled bit. The spec says we should set the 'shutdown notification
1569 * bits', but doing so may cause the device to complete commands to the
1570 * admin queue ... and we don't know what memory that might be pointing at!
1572 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1574 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1575 dev
->ctrl_config
&= ~NVME_CC_ENABLE
;
1576 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1578 return nvme_wait_ready(dev
, cap
, false);
1581 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1583 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1584 dev
->ctrl_config
|= NVME_CC_ENABLE
;
1585 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1587 return nvme_wait_ready(dev
, cap
, true);
1590 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1592 unsigned long timeout
;
1594 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1595 dev
->ctrl_config
|= NVME_CC_SHN_NORMAL
;
1597 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1599 timeout
= SHUTDOWN_TIMEOUT
+ jiffies
;
1600 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1601 NVME_CSTS_SHST_CMPLT
) {
1603 if (fatal_signal_pending(current
))
1605 if (time_after(jiffies
, timeout
)) {
1607 "Device shutdown incomplete; abort shutdown\n");
1615 static struct blk_mq_ops nvme_mq_admin_ops
= {
1616 .queue_rq
= nvme_queue_rq
,
1617 .map_queue
= blk_mq_map_queue
,
1618 .init_hctx
= nvme_admin_init_hctx
,
1619 .exit_hctx
= nvme_admin_exit_hctx
,
1620 .init_request
= nvme_admin_init_request
,
1621 .timeout
= nvme_timeout
,
1624 static struct blk_mq_ops nvme_mq_ops
= {
1625 .queue_rq
= nvme_queue_rq
,
1626 .map_queue
= blk_mq_map_queue
,
1627 .init_hctx
= nvme_init_hctx
,
1628 .init_request
= nvme_init_request
,
1629 .timeout
= nvme_timeout
,
1632 static void nvme_dev_remove_admin(struct nvme_dev
*dev
)
1634 if (dev
->admin_q
&& !blk_queue_dying(dev
->admin_q
)) {
1635 blk_cleanup_queue(dev
->admin_q
);
1636 blk_mq_free_tag_set(&dev
->admin_tagset
);
1640 static int nvme_alloc_admin_tags(struct nvme_dev
*dev
)
1642 if (!dev
->admin_q
) {
1643 dev
->admin_tagset
.ops
= &nvme_mq_admin_ops
;
1644 dev
->admin_tagset
.nr_hw_queues
= 1;
1645 dev
->admin_tagset
.queue_depth
= NVME_AQ_DEPTH
- 1;
1646 dev
->admin_tagset
.reserved_tags
= 1;
1647 dev
->admin_tagset
.timeout
= ADMIN_TIMEOUT
;
1648 dev
->admin_tagset
.numa_node
= dev_to_node(dev
->dev
);
1649 dev
->admin_tagset
.cmd_size
= nvme_cmd_size(dev
);
1650 dev
->admin_tagset
.driver_data
= dev
;
1652 if (blk_mq_alloc_tag_set(&dev
->admin_tagset
))
1655 dev
->admin_q
= blk_mq_init_queue(&dev
->admin_tagset
);
1656 if (IS_ERR(dev
->admin_q
)) {
1657 blk_mq_free_tag_set(&dev
->admin_tagset
);
1660 if (!blk_get_queue(dev
->admin_q
)) {
1661 nvme_dev_remove_admin(dev
);
1662 dev
->admin_q
= NULL
;
1666 blk_mq_unfreeze_queue(dev
->admin_q
);
1671 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1675 u64 cap
= readq(&dev
->bar
->cap
);
1676 struct nvme_queue
*nvmeq
;
1677 unsigned page_shift
= PAGE_SHIFT
;
1678 unsigned dev_page_min
= NVME_CAP_MPSMIN(cap
) + 12;
1679 unsigned dev_page_max
= NVME_CAP_MPSMAX(cap
) + 12;
1681 if (page_shift
< dev_page_min
) {
1683 "Minimum device page size (%u) too large for "
1684 "host (%u)\n", 1 << dev_page_min
,
1688 if (page_shift
> dev_page_max
) {
1690 "Device maximum page size (%u) smaller than "
1691 "host (%u); enabling work-around\n",
1692 1 << dev_page_max
, 1 << page_shift
);
1693 page_shift
= dev_page_max
;
1696 result
= nvme_disable_ctrl(dev
, cap
);
1700 nvmeq
= dev
->queues
[0];
1702 nvmeq
= nvme_alloc_queue(dev
, 0, NVME_AQ_DEPTH
);
1707 aqa
= nvmeq
->q_depth
- 1;
1710 dev
->page_size
= 1 << page_shift
;
1712 dev
->ctrl_config
= NVME_CC_CSS_NVM
;
1713 dev
->ctrl_config
|= (page_shift
- 12) << NVME_CC_MPS_SHIFT
;
1714 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1715 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1717 writel(aqa
, &dev
->bar
->aqa
);
1718 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1719 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1721 result
= nvme_enable_ctrl(dev
, cap
);
1725 nvmeq
->cq_vector
= 0;
1726 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1733 nvme_free_queues(dev
, 0);
1737 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1739 struct nvme_dev
*dev
= ns
->dev
;
1740 struct nvme_user_io io
;
1741 struct nvme_command c
;
1742 unsigned length
, meta_len
;
1744 dma_addr_t meta_dma
= 0;
1746 void __user
*metadata
;
1748 if (copy_from_user(&io
, uio
, sizeof(io
)))
1751 switch (io
.opcode
) {
1752 case nvme_cmd_write
:
1754 case nvme_cmd_compare
:
1760 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1761 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1762 metadata
= (void __user
*)(unsigned long)io
.metadata
;
1763 write
= io
.opcode
& 1;
1770 if (((io
.metadata
& 3) || !io
.metadata
) && !ns
->ext
)
1773 meta
= dma_alloc_coherent(dev
->dev
, meta_len
,
1774 &meta_dma
, GFP_KERNEL
);
1781 if (copy_from_user(meta
, metadata
, meta_len
)) {
1788 memset(&c
, 0, sizeof(c
));
1789 c
.rw
.opcode
= io
.opcode
;
1790 c
.rw
.flags
= io
.flags
;
1791 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1792 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1793 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1794 c
.rw
.control
= cpu_to_le16(io
.control
);
1795 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1796 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1797 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1798 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1799 c
.rw
.metadata
= cpu_to_le64(meta_dma
);
1801 status
= __nvme_submit_sync_cmd(ns
->queue
, &c
, NULL
,
1802 (void __user
*)io
.addr
, length
, NULL
, 0);
1805 if (status
== NVME_SC_SUCCESS
&& !write
) {
1806 if (copy_to_user(metadata
, meta
, meta_len
))
1809 dma_free_coherent(dev
->dev
, meta_len
, meta
, meta_dma
);
1814 static int nvme_user_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
1815 struct nvme_passthru_cmd __user
*ucmd
)
1817 struct nvme_passthru_cmd cmd
;
1818 struct nvme_command c
;
1819 unsigned timeout
= 0;
1822 if (!capable(CAP_SYS_ADMIN
))
1824 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1827 memset(&c
, 0, sizeof(c
));
1828 c
.common
.opcode
= cmd
.opcode
;
1829 c
.common
.flags
= cmd
.flags
;
1830 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1831 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1832 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1833 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1834 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1835 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1836 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1837 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1838 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1841 timeout
= msecs_to_jiffies(cmd
.timeout_ms
);
1843 status
= __nvme_submit_sync_cmd(ns
? ns
->queue
: dev
->admin_q
, &c
,
1844 NULL
, (void __user
*)cmd
.addr
, cmd
.data_len
,
1845 &cmd
.result
, timeout
);
1847 if (put_user(cmd
.result
, &ucmd
->result
))
1854 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1857 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1861 force_successful_syscall_return();
1863 case NVME_IOCTL_ADMIN_CMD
:
1864 return nvme_user_cmd(ns
->dev
, NULL
, (void __user
*)arg
);
1865 case NVME_IOCTL_IO_CMD
:
1866 return nvme_user_cmd(ns
->dev
, ns
, (void __user
*)arg
);
1867 case NVME_IOCTL_SUBMIT_IO
:
1868 return nvme_submit_io(ns
, (void __user
*)arg
);
1869 case SG_GET_VERSION_NUM
:
1870 return nvme_sg_get_version_num((void __user
*)arg
);
1872 return nvme_sg_io(ns
, (void __user
*)arg
);
1878 #ifdef CONFIG_COMPAT
1879 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1880 unsigned int cmd
, unsigned long arg
)
1884 return -ENOIOCTLCMD
;
1886 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1889 #define nvme_compat_ioctl NULL
1892 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1897 spin_lock(&dev_list_lock
);
1898 ns
= bdev
->bd_disk
->private_data
;
1901 else if (!kref_get_unless_zero(&ns
->dev
->kref
))
1903 spin_unlock(&dev_list_lock
);
1908 static void nvme_free_dev(struct kref
*kref
);
1910 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1912 struct nvme_ns
*ns
= disk
->private_data
;
1913 struct nvme_dev
*dev
= ns
->dev
;
1915 kref_put(&dev
->kref
, nvme_free_dev
);
1918 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1920 /* some standard values */
1921 geo
->heads
= 1 << 6;
1922 geo
->sectors
= 1 << 5;
1923 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1927 static void nvme_config_discard(struct nvme_ns
*ns
)
1929 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1930 ns
->queue
->limits
.discard_zeroes_data
= 0;
1931 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1932 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1933 ns
->queue
->limits
.max_discard_sectors
= 0xffffffff;
1934 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
1937 static int nvme_revalidate_disk(struct gendisk
*disk
)
1939 struct nvme_ns
*ns
= disk
->private_data
;
1940 struct nvme_dev
*dev
= ns
->dev
;
1941 struct nvme_id_ns
*id
;
1946 if (nvme_identify_ns(dev
, ns
->ns_id
, &id
)) {
1947 dev_warn(dev
->dev
, "%s: Identify failure nvme%dn%d\n", __func__
,
1948 dev
->instance
, ns
->ns_id
);
1951 if (id
->ncap
== 0) {
1957 lbaf
= id
->flbas
& NVME_NS_FLBAS_LBA_MASK
;
1958 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
1959 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
1960 ns
->ext
= ns
->ms
&& (id
->flbas
& NVME_NS_FLBAS_META_EXT
);
1963 * If identify namespace failed, use default 512 byte block size so
1964 * block layer can use before failing read/write for 0 capacity.
1966 if (ns
->lba_shift
== 0)
1968 bs
= 1 << ns
->lba_shift
;
1970 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
1971 pi_type
= ns
->ms
== sizeof(struct t10_pi_tuple
) ?
1972 id
->dps
& NVME_NS_DPS_PI_MASK
: 0;
1974 if (blk_get_integrity(disk
) && (ns
->pi_type
!= pi_type
||
1976 bs
!= queue_logical_block_size(disk
->queue
) ||
1977 (ns
->ms
&& ns
->ext
)))
1978 blk_integrity_unregister(disk
);
1980 ns
->pi_type
= pi_type
;
1981 blk_queue_logical_block_size(ns
->queue
, bs
);
1983 if (ns
->ms
&& !blk_get_integrity(disk
) && (disk
->flags
& GENHD_FL_UP
) &&
1985 nvme_init_integrity(ns
);
1987 if (ns
->ms
&& !blk_get_integrity(disk
))
1988 set_capacity(disk
, 0);
1990 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
1992 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
1993 nvme_config_discard(ns
);
1999 static const struct block_device_operations nvme_fops
= {
2000 .owner
= THIS_MODULE
,
2001 .ioctl
= nvme_ioctl
,
2002 .compat_ioctl
= nvme_compat_ioctl
,
2004 .release
= nvme_release
,
2005 .getgeo
= nvme_getgeo
,
2006 .revalidate_disk
= nvme_revalidate_disk
,
2009 static int nvme_kthread(void *data
)
2011 struct nvme_dev
*dev
, *next
;
2013 while (!kthread_should_stop()) {
2014 set_current_state(TASK_INTERRUPTIBLE
);
2015 spin_lock(&dev_list_lock
);
2016 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
2018 if (readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
) {
2019 if (work_busy(&dev
->reset_work
))
2021 list_del_init(&dev
->node
);
2023 "Failed status: %x, reset controller\n",
2024 readl(&dev
->bar
->csts
));
2025 dev
->reset_workfn
= nvme_reset_failed_dev
;
2026 queue_work(nvme_workq
, &dev
->reset_work
);
2029 for (i
= 0; i
< dev
->queue_count
; i
++) {
2030 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2033 spin_lock_irq(&nvmeq
->q_lock
);
2034 nvme_process_cq(nvmeq
);
2036 while ((i
== 0) && (dev
->event_limit
> 0)) {
2037 if (nvme_submit_async_admin_req(dev
))
2041 spin_unlock_irq(&nvmeq
->q_lock
);
2044 spin_unlock(&dev_list_lock
);
2045 schedule_timeout(round_jiffies_relative(HZ
));
2050 static void nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
)
2053 struct gendisk
*disk
;
2054 int node
= dev_to_node(dev
->dev
);
2056 ns
= kzalloc_node(sizeof(*ns
), GFP_KERNEL
, node
);
2060 ns
->queue
= blk_mq_init_queue(&dev
->tagset
);
2061 if (IS_ERR(ns
->queue
))
2063 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
2064 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
2065 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS
, ns
->queue
);
2067 ns
->queue
->queuedata
= ns
;
2069 disk
= alloc_disk_node(0, node
);
2071 goto out_free_queue
;
2075 ns
->lba_shift
= 9; /* set to a default value for 512 until disk is validated */
2076 list_add_tail(&ns
->list
, &dev
->namespaces
);
2078 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
2079 if (dev
->max_hw_sectors
)
2080 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
2081 if (dev
->stripe_size
)
2082 blk_queue_chunk_sectors(ns
->queue
, dev
->stripe_size
>> 9);
2083 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
2084 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
2086 disk
->major
= nvme_major
;
2087 disk
->first_minor
= 0;
2088 disk
->fops
= &nvme_fops
;
2089 disk
->private_data
= ns
;
2090 disk
->queue
= ns
->queue
;
2091 disk
->driverfs_dev
= dev
->device
;
2092 disk
->flags
= GENHD_FL_EXT_DEVT
;
2093 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
2096 * Initialize capacity to 0 until we establish the namespace format and
2097 * setup integrity extentions if necessary. The revalidate_disk after
2098 * add_disk allows the driver to register with integrity if the format
2101 set_capacity(disk
, 0);
2102 if (nvme_revalidate_disk(ns
->disk
))
2107 revalidate_disk(ns
->disk
);
2111 list_del(&ns
->list
);
2113 blk_cleanup_queue(ns
->queue
);
2118 static void nvme_create_io_queues(struct nvme_dev
*dev
)
2122 for (i
= dev
->queue_count
; i
<= dev
->max_qid
; i
++)
2123 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
))
2126 for (i
= dev
->online_queues
; i
<= dev
->queue_count
- 1; i
++)
2127 if (nvme_create_queue(dev
->queues
[i
], i
))
2131 static int set_queue_count(struct nvme_dev
*dev
, int count
)
2135 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
2137 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
2142 dev_err(dev
->dev
, "Could not set queue count (%d)\n", status
);
2145 return min(result
& 0xffff, result
>> 16) + 1;
2148 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
2150 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
2153 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
2155 struct nvme_queue
*adminq
= dev
->queues
[0];
2156 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2157 int result
, i
, vecs
, nr_io_queues
, size
;
2159 nr_io_queues
= num_possible_cpus();
2160 result
= set_queue_count(dev
, nr_io_queues
);
2163 if (result
< nr_io_queues
)
2164 nr_io_queues
= result
;
2166 size
= db_bar_size(dev
, nr_io_queues
);
2170 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
2173 if (!--nr_io_queues
)
2175 size
= db_bar_size(dev
, nr_io_queues
);
2177 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2178 adminq
->q_db
= dev
->dbs
;
2181 /* Deregister the admin queue's interrupt */
2182 free_irq(dev
->entry
[0].vector
, adminq
);
2185 * If we enable msix early due to not intx, disable it again before
2186 * setting up the full range we need.
2189 pci_disable_msix(pdev
);
2191 for (i
= 0; i
< nr_io_queues
; i
++)
2192 dev
->entry
[i
].entry
= i
;
2193 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2195 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2199 for (i
= 0; i
< vecs
; i
++)
2200 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2205 * Should investigate if there's a performance win from allocating
2206 * more queues than interrupt vectors; it might allow the submission
2207 * path to scale better, even if the receive path is limited by the
2208 * number of interrupts.
2210 nr_io_queues
= vecs
;
2211 dev
->max_qid
= nr_io_queues
;
2213 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2217 /* Free previously allocated queues that are no longer usable */
2218 nvme_free_queues(dev
, nr_io_queues
+ 1);
2219 nvme_create_io_queues(dev
);
2224 nvme_free_queues(dev
, 1);
2228 static void nvme_free_namespace(struct nvme_ns
*ns
)
2230 list_del(&ns
->list
);
2232 spin_lock(&dev_list_lock
);
2233 ns
->disk
->private_data
= NULL
;
2234 spin_unlock(&dev_list_lock
);
2240 static int ns_cmp(void *priv
, struct list_head
*a
, struct list_head
*b
)
2242 struct nvme_ns
*nsa
= container_of(a
, struct nvme_ns
, list
);
2243 struct nvme_ns
*nsb
= container_of(b
, struct nvme_ns
, list
);
2245 return nsa
->ns_id
- nsb
->ns_id
;
2248 static struct nvme_ns
*nvme_find_ns(struct nvme_dev
*dev
, unsigned nsid
)
2252 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2253 if (ns
->ns_id
== nsid
)
2255 if (ns
->ns_id
> nsid
)
2261 static inline bool nvme_io_incapable(struct nvme_dev
*dev
)
2263 return (!dev
->bar
|| readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
||
2264 dev
->online_queues
< 2);
2267 static void nvme_ns_remove(struct nvme_ns
*ns
)
2269 bool kill
= nvme_io_incapable(ns
->dev
) && !blk_queue_dying(ns
->queue
);
2272 blk_set_queue_dying(ns
->queue
);
2273 if (ns
->disk
->flags
& GENHD_FL_UP
) {
2274 if (blk_get_integrity(ns
->disk
))
2275 blk_integrity_unregister(ns
->disk
);
2276 del_gendisk(ns
->disk
);
2278 if (kill
|| !blk_queue_dying(ns
->queue
)) {
2279 blk_mq_abort_requeue_list(ns
->queue
);
2280 blk_cleanup_queue(ns
->queue
);
2284 static void nvme_scan_namespaces(struct nvme_dev
*dev
, unsigned nn
)
2286 struct nvme_ns
*ns
, *next
;
2289 for (i
= 1; i
<= nn
; i
++) {
2290 ns
= nvme_find_ns(dev
, i
);
2292 if (revalidate_disk(ns
->disk
)) {
2294 nvme_free_namespace(ns
);
2297 nvme_alloc_ns(dev
, i
);
2299 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2300 if (ns
->ns_id
> nn
) {
2302 nvme_free_namespace(ns
);
2305 list_sort(NULL
, &dev
->namespaces
, ns_cmp
);
2308 static void nvme_dev_scan(struct work_struct
*work
)
2310 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, scan_work
);
2311 struct nvme_id_ctrl
*ctrl
;
2313 if (!dev
->tagset
.tags
)
2315 if (nvme_identify_ctrl(dev
, &ctrl
))
2317 nvme_scan_namespaces(dev
, le32_to_cpup(&ctrl
->nn
));
2322 * Return: error value if an error occurred setting up the queues or calling
2323 * Identify Device. 0 if these succeeded, even if adding some of the
2324 * namespaces failed. At the moment, these failures are silent. TBD which
2325 * failures should be reported.
2327 static int nvme_dev_add(struct nvme_dev
*dev
)
2329 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2332 struct nvme_id_ctrl
*ctrl
;
2333 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2335 res
= nvme_identify_ctrl(dev
, &ctrl
);
2337 dev_err(dev
->dev
, "Identify Controller failed (%d)\n", res
);
2341 nn
= le32_to_cpup(&ctrl
->nn
);
2342 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2343 dev
->abort_limit
= ctrl
->acl
+ 1;
2344 dev
->vwc
= ctrl
->vwc
;
2345 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2346 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2347 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2349 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2350 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2351 (pdev
->device
== 0x0953) && ctrl
->vs
[3]) {
2352 unsigned int max_hw_sectors
;
2354 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2355 max_hw_sectors
= dev
->stripe_size
>> (shift
- 9);
2356 if (dev
->max_hw_sectors
) {
2357 dev
->max_hw_sectors
= min(max_hw_sectors
,
2358 dev
->max_hw_sectors
);
2360 dev
->max_hw_sectors
= max_hw_sectors
;
2364 if (!dev
->tagset
.tags
) {
2365 dev
->tagset
.ops
= &nvme_mq_ops
;
2366 dev
->tagset
.nr_hw_queues
= dev
->online_queues
- 1;
2367 dev
->tagset
.timeout
= NVME_IO_TIMEOUT
;
2368 dev
->tagset
.numa_node
= dev_to_node(dev
->dev
);
2369 dev
->tagset
.queue_depth
=
2370 min_t(int, dev
->q_depth
, BLK_MQ_MAX_DEPTH
) - 1;
2371 dev
->tagset
.cmd_size
= nvme_cmd_size(dev
);
2372 dev
->tagset
.flags
= BLK_MQ_F_SHOULD_MERGE
;
2373 dev
->tagset
.driver_data
= dev
;
2375 if (blk_mq_alloc_tag_set(&dev
->tagset
))
2378 schedule_work(&dev
->scan_work
);
2382 static int nvme_dev_map(struct nvme_dev
*dev
)
2385 int bars
, result
= -ENOMEM
;
2386 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2388 if (pci_enable_device_mem(pdev
))
2391 dev
->entry
[0].vector
= pdev
->irq
;
2392 pci_set_master(pdev
);
2393 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2397 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2400 if (dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(64)) &&
2401 dma_set_mask_and_coherent(dev
->dev
, DMA_BIT_MASK(32)))
2404 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2408 if (readl(&dev
->bar
->csts
) == -1) {
2414 * Some devices don't advertse INTx interrupts, pre-enable a single
2415 * MSIX vec for setup. We'll adjust this later.
2418 result
= pci_enable_msix(pdev
, dev
->entry
, 1);
2423 cap
= readq(&dev
->bar
->cap
);
2424 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2425 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2426 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2434 pci_release_regions(pdev
);
2436 pci_disable_device(pdev
);
2440 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2442 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2444 if (pdev
->msi_enabled
)
2445 pci_disable_msi(pdev
);
2446 else if (pdev
->msix_enabled
)
2447 pci_disable_msix(pdev
);
2452 pci_release_regions(pdev
);
2455 if (pci_is_enabled(pdev
))
2456 pci_disable_device(pdev
);
2459 struct nvme_delq_ctx
{
2460 struct task_struct
*waiter
;
2461 struct kthread_worker
*worker
;
2465 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2467 dq
->waiter
= current
;
2471 set_current_state(TASK_KILLABLE
);
2472 if (!atomic_read(&dq
->refcount
))
2474 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2475 fatal_signal_pending(current
)) {
2477 * Disable the controller first since we can't trust it
2478 * at this point, but leave the admin queue enabled
2479 * until all queue deletion requests are flushed.
2480 * FIXME: This may take a while if there are more h/w
2481 * queues than admin tags.
2483 set_current_state(TASK_RUNNING
);
2484 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2485 nvme_clear_queue(dev
->queues
[0]);
2486 flush_kthread_worker(dq
->worker
);
2487 nvme_disable_queue(dev
, 0);
2491 set_current_state(TASK_RUNNING
);
2494 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2496 atomic_dec(&dq
->refcount
);
2498 wake_up_process(dq
->waiter
);
2501 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2503 atomic_inc(&dq
->refcount
);
2507 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2509 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2513 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2514 kthread_work_func_t fn
)
2516 struct nvme_command c
;
2518 memset(&c
, 0, sizeof(c
));
2519 c
.delete_queue
.opcode
= opcode
;
2520 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2522 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2523 return nvme_submit_admin_async_cmd(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
,
2527 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2529 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2531 nvme_del_queue_end(nvmeq
);
2534 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2536 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2537 nvme_del_cq_work_handler
);
2540 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2542 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2544 int status
= nvmeq
->cmdinfo
.status
;
2547 status
= nvme_delete_cq(nvmeq
);
2549 nvme_del_queue_end(nvmeq
);
2552 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2554 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2555 nvme_del_sq_work_handler
);
2558 static void nvme_del_queue_start(struct kthread_work
*work
)
2560 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2562 if (nvme_delete_sq(nvmeq
))
2563 nvme_del_queue_end(nvmeq
);
2566 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2569 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2570 struct nvme_delq_ctx dq
;
2571 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2572 &worker
, "nvme%d", dev
->instance
);
2574 if (IS_ERR(kworker_task
)) {
2576 "Failed to create queue del task\n");
2577 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2578 nvme_disable_queue(dev
, i
);
2583 atomic_set(&dq
.refcount
, 0);
2584 dq
.worker
= &worker
;
2585 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2586 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2588 if (nvme_suspend_queue(nvmeq
))
2590 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2591 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2592 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2593 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2595 nvme_wait_dq(&dq
, dev
);
2596 kthread_stop(kworker_task
);
2600 * Remove the node from the device list and check
2601 * for whether or not we need to stop the nvme_thread.
2603 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2605 struct task_struct
*tmp
= NULL
;
2607 spin_lock(&dev_list_lock
);
2608 list_del_init(&dev
->node
);
2609 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2613 spin_unlock(&dev_list_lock
);
2619 static void nvme_freeze_queues(struct nvme_dev
*dev
)
2623 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2624 blk_mq_freeze_queue_start(ns
->queue
);
2626 spin_lock_irq(ns
->queue
->queue_lock
);
2627 queue_flag_set(QUEUE_FLAG_STOPPED
, ns
->queue
);
2628 spin_unlock_irq(ns
->queue
->queue_lock
);
2630 blk_mq_cancel_requeue_work(ns
->queue
);
2631 blk_mq_stop_hw_queues(ns
->queue
);
2635 static void nvme_unfreeze_queues(struct nvme_dev
*dev
)
2639 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2640 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED
, ns
->queue
);
2641 blk_mq_unfreeze_queue(ns
->queue
);
2642 blk_mq_start_stopped_hw_queues(ns
->queue
, true);
2643 blk_mq_kick_requeue_list(ns
->queue
);
2647 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2652 nvme_dev_list_remove(dev
);
2655 nvme_freeze_queues(dev
);
2656 csts
= readl(&dev
->bar
->csts
);
2658 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2659 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2660 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2661 nvme_suspend_queue(nvmeq
);
2664 nvme_disable_io_queues(dev
);
2665 nvme_shutdown_ctrl(dev
);
2666 nvme_disable_queue(dev
, 0);
2668 nvme_dev_unmap(dev
);
2670 for (i
= dev
->queue_count
- 1; i
>= 0; i
--)
2671 nvme_clear_queue(dev
->queues
[i
]);
2674 static void nvme_dev_remove(struct nvme_dev
*dev
)
2678 list_for_each_entry(ns
, &dev
->namespaces
, list
)
2682 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2684 dev
->prp_page_pool
= dma_pool_create("prp list page", dev
->dev
,
2685 PAGE_SIZE
, PAGE_SIZE
, 0);
2686 if (!dev
->prp_page_pool
)
2689 /* Optimisation for I/Os between 4k and 128k */
2690 dev
->prp_small_pool
= dma_pool_create("prp list 256", dev
->dev
,
2692 if (!dev
->prp_small_pool
) {
2693 dma_pool_destroy(dev
->prp_page_pool
);
2699 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2701 dma_pool_destroy(dev
->prp_page_pool
);
2702 dma_pool_destroy(dev
->prp_small_pool
);
2705 static DEFINE_IDA(nvme_instance_ida
);
2707 static int nvme_set_instance(struct nvme_dev
*dev
)
2709 int instance
, error
;
2712 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2715 spin_lock(&dev_list_lock
);
2716 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2717 spin_unlock(&dev_list_lock
);
2718 } while (error
== -EAGAIN
);
2723 dev
->instance
= instance
;
2727 static void nvme_release_instance(struct nvme_dev
*dev
)
2729 spin_lock(&dev_list_lock
);
2730 ida_remove(&nvme_instance_ida
, dev
->instance
);
2731 spin_unlock(&dev_list_lock
);
2734 static void nvme_free_namespaces(struct nvme_dev
*dev
)
2736 struct nvme_ns
*ns
, *next
;
2738 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
)
2739 nvme_free_namespace(ns
);
2742 static void nvme_free_dev(struct kref
*kref
)
2744 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2746 put_device(dev
->dev
);
2747 put_device(dev
->device
);
2748 nvme_free_namespaces(dev
);
2749 nvme_release_instance(dev
);
2750 if (dev
->tagset
.tags
)
2751 blk_mq_free_tag_set(&dev
->tagset
);
2753 blk_put_queue(dev
->admin_q
);
2759 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2761 struct nvme_dev
*dev
;
2762 int instance
= iminor(inode
);
2765 spin_lock(&dev_list_lock
);
2766 list_for_each_entry(dev
, &dev_list
, node
) {
2767 if (dev
->instance
== instance
) {
2768 if (!dev
->admin_q
) {
2772 if (!kref_get_unless_zero(&dev
->kref
))
2774 f
->private_data
= dev
;
2779 spin_unlock(&dev_list_lock
);
2784 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2786 struct nvme_dev
*dev
= f
->private_data
;
2787 kref_put(&dev
->kref
, nvme_free_dev
);
2791 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2793 struct nvme_dev
*dev
= f
->private_data
;
2797 case NVME_IOCTL_ADMIN_CMD
:
2798 return nvme_user_cmd(dev
, NULL
, (void __user
*)arg
);
2799 case NVME_IOCTL_IO_CMD
:
2800 if (list_empty(&dev
->namespaces
))
2802 ns
= list_first_entry(&dev
->namespaces
, struct nvme_ns
, list
);
2803 return nvme_user_cmd(dev
, ns
, (void __user
*)arg
);
2804 case NVME_IOCTL_RESET
:
2805 dev_warn(dev
->dev
, "resetting controller\n");
2806 return nvme_reset(dev
);
2812 static const struct file_operations nvme_dev_fops
= {
2813 .owner
= THIS_MODULE
,
2814 .open
= nvme_dev_open
,
2815 .release
= nvme_dev_release
,
2816 .unlocked_ioctl
= nvme_dev_ioctl
,
2817 .compat_ioctl
= nvme_dev_ioctl
,
2820 static void nvme_set_irq_hints(struct nvme_dev
*dev
)
2822 struct nvme_queue
*nvmeq
;
2825 for (i
= 0; i
< dev
->online_queues
; i
++) {
2826 nvmeq
= dev
->queues
[i
];
2828 if (!nvmeq
->tags
|| !(*nvmeq
->tags
))
2831 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2832 blk_mq_tags_cpumask(*nvmeq
->tags
));
2836 static int nvme_dev_start(struct nvme_dev
*dev
)
2839 bool start_thread
= false;
2841 result
= nvme_dev_map(dev
);
2845 result
= nvme_configure_admin_queue(dev
);
2849 spin_lock(&dev_list_lock
);
2850 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
2851 start_thread
= true;
2854 list_add(&dev
->node
, &dev_list
);
2855 spin_unlock(&dev_list_lock
);
2858 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2859 wake_up_all(&nvme_kthread_wait
);
2861 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2863 if (IS_ERR_OR_NULL(nvme_thread
)) {
2864 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2868 nvme_init_queue(dev
->queues
[0], 0);
2869 result
= nvme_alloc_admin_tags(dev
);
2873 result
= nvme_setup_io_queues(dev
);
2877 nvme_set_irq_hints(dev
);
2879 dev
->event_limit
= 1;
2883 nvme_dev_remove_admin(dev
);
2884 blk_put_queue(dev
->admin_q
);
2885 dev
->admin_q
= NULL
;
2886 dev
->queues
[0]->tags
= NULL
;
2888 nvme_disable_queue(dev
, 0);
2889 nvme_dev_list_remove(dev
);
2891 nvme_dev_unmap(dev
);
2895 static int nvme_remove_dead_ctrl(void *arg
)
2897 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
2898 struct pci_dev
*pdev
= to_pci_dev(dev
->dev
);
2900 if (pci_get_drvdata(pdev
))
2901 pci_stop_and_remove_bus_device_locked(pdev
);
2902 kref_put(&dev
->kref
, nvme_free_dev
);
2906 static void nvme_remove_disks(struct work_struct
*ws
)
2908 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2910 nvme_free_queues(dev
, 1);
2911 nvme_dev_remove(dev
);
2914 static int nvme_dev_resume(struct nvme_dev
*dev
)
2918 ret
= nvme_dev_start(dev
);
2921 if (dev
->online_queues
< 2) {
2922 spin_lock(&dev_list_lock
);
2923 dev
->reset_workfn
= nvme_remove_disks
;
2924 queue_work(nvme_workq
, &dev
->reset_work
);
2925 spin_unlock(&dev_list_lock
);
2927 nvme_unfreeze_queues(dev
);
2929 nvme_set_irq_hints(dev
);
2934 static void nvme_dead_ctrl(struct nvme_dev
*dev
)
2936 dev_warn(dev
->dev
, "Device failed to resume\n");
2937 kref_get(&dev
->kref
);
2938 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
2941 "Failed to start controller remove task\n");
2942 kref_put(&dev
->kref
, nvme_free_dev
);
2946 static void nvme_dev_reset(struct nvme_dev
*dev
)
2948 bool in_probe
= work_busy(&dev
->probe_work
);
2950 nvme_dev_shutdown(dev
);
2952 /* Synchronize with device probe so that work will see failure status
2953 * and exit gracefully without trying to schedule another reset */
2954 flush_work(&dev
->probe_work
);
2956 /* Fail this device if reset occured during probe to avoid
2957 * infinite initialization loops. */
2959 nvme_dead_ctrl(dev
);
2962 /* Schedule device resume asynchronously so the reset work is available
2963 * to cleanup errors that may occur during reinitialization */
2964 schedule_work(&dev
->probe_work
);
2967 static void nvme_reset_failed_dev(struct work_struct
*ws
)
2969 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2970 nvme_dev_reset(dev
);
2973 static void nvme_reset_workfn(struct work_struct
*work
)
2975 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, reset_work
);
2976 dev
->reset_workfn(work
);
2979 static int nvme_reset(struct nvme_dev
*dev
)
2983 if (!dev
->admin_q
|| blk_queue_dying(dev
->admin_q
))
2986 spin_lock(&dev_list_lock
);
2987 if (!work_pending(&dev
->reset_work
)) {
2988 dev
->reset_workfn
= nvme_reset_failed_dev
;
2989 queue_work(nvme_workq
, &dev
->reset_work
);
2992 spin_unlock(&dev_list_lock
);
2995 flush_work(&dev
->reset_work
);
2996 flush_work(&dev
->probe_work
);
3003 static ssize_t
nvme_sysfs_reset(struct device
*dev
,
3004 struct device_attribute
*attr
, const char *buf
,
3007 struct nvme_dev
*ndev
= dev_get_drvdata(dev
);
3010 ret
= nvme_reset(ndev
);
3016 static DEVICE_ATTR(reset_controller
, S_IWUSR
, NULL
, nvme_sysfs_reset
);
3018 static void nvme_async_probe(struct work_struct
*work
);
3019 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
3021 int node
, result
= -ENOMEM
;
3022 struct nvme_dev
*dev
;
3024 node
= dev_to_node(&pdev
->dev
);
3025 if (node
== NUMA_NO_NODE
)
3026 set_dev_node(&pdev
->dev
, 0);
3028 dev
= kzalloc_node(sizeof(*dev
), GFP_KERNEL
, node
);
3031 dev
->entry
= kzalloc_node(num_possible_cpus() * sizeof(*dev
->entry
),
3035 dev
->queues
= kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3040 INIT_LIST_HEAD(&dev
->namespaces
);
3041 dev
->reset_workfn
= nvme_reset_failed_dev
;
3042 INIT_WORK(&dev
->reset_work
, nvme_reset_workfn
);
3043 dev
->dev
= get_device(&pdev
->dev
);
3044 pci_set_drvdata(pdev
, dev
);
3045 result
= nvme_set_instance(dev
);
3049 result
= nvme_setup_prp_pools(dev
);
3053 kref_init(&dev
->kref
);
3054 dev
->device
= device_create(nvme_class
, &pdev
->dev
,
3055 MKDEV(nvme_char_major
, dev
->instance
),
3056 dev
, "nvme%d", dev
->instance
);
3057 if (IS_ERR(dev
->device
)) {
3058 result
= PTR_ERR(dev
->device
);
3061 get_device(dev
->device
);
3062 dev_set_drvdata(dev
->device
, dev
);
3064 result
= device_create_file(dev
->device
, &dev_attr_reset_controller
);
3068 INIT_LIST_HEAD(&dev
->node
);
3069 INIT_WORK(&dev
->scan_work
, nvme_dev_scan
);
3070 INIT_WORK(&dev
->probe_work
, nvme_async_probe
);
3071 schedule_work(&dev
->probe_work
);
3075 device_destroy(nvme_class
, MKDEV(nvme_char_major
, dev
->instance
));
3076 put_device(dev
->device
);
3078 nvme_release_prp_pools(dev
);
3080 nvme_release_instance(dev
);
3082 put_device(dev
->dev
);
3090 static void nvme_async_probe(struct work_struct
*work
)
3092 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, probe_work
);
3094 if (nvme_dev_resume(dev
) && !work_busy(&dev
->reset_work
))
3095 nvme_dead_ctrl(dev
);
3098 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
3100 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3103 nvme_dev_shutdown(dev
);
3105 nvme_dev_resume(dev
);
3108 static void nvme_shutdown(struct pci_dev
*pdev
)
3110 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3111 nvme_dev_shutdown(dev
);
3114 static void nvme_remove(struct pci_dev
*pdev
)
3116 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3118 spin_lock(&dev_list_lock
);
3119 list_del_init(&dev
->node
);
3120 spin_unlock(&dev_list_lock
);
3122 pci_set_drvdata(pdev
, NULL
);
3123 flush_work(&dev
->probe_work
);
3124 flush_work(&dev
->reset_work
);
3125 flush_work(&dev
->scan_work
);
3126 device_remove_file(dev
->device
, &dev_attr_reset_controller
);
3127 nvme_dev_remove(dev
);
3128 nvme_dev_shutdown(dev
);
3129 nvme_dev_remove_admin(dev
);
3130 device_destroy(nvme_class
, MKDEV(nvme_char_major
, dev
->instance
));
3131 nvme_free_queues(dev
, 0);
3132 nvme_release_prp_pools(dev
);
3133 kref_put(&dev
->kref
, nvme_free_dev
);
3136 /* These functions are yet to be implemented */
3137 #define nvme_error_detected NULL
3138 #define nvme_dump_registers NULL
3139 #define nvme_link_reset NULL
3140 #define nvme_slot_reset NULL
3141 #define nvme_error_resume NULL
3143 #ifdef CONFIG_PM_SLEEP
3144 static int nvme_suspend(struct device
*dev
)
3146 struct pci_dev
*pdev
= to_pci_dev(dev
);
3147 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3149 nvme_dev_shutdown(ndev
);
3153 static int nvme_resume(struct device
*dev
)
3155 struct pci_dev
*pdev
= to_pci_dev(dev
);
3156 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3158 if (nvme_dev_resume(ndev
) && !work_busy(&ndev
->reset_work
)) {
3159 ndev
->reset_workfn
= nvme_reset_failed_dev
;
3160 queue_work(nvme_workq
, &ndev
->reset_work
);
3166 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
3168 static const struct pci_error_handlers nvme_err_handler
= {
3169 .error_detected
= nvme_error_detected
,
3170 .mmio_enabled
= nvme_dump_registers
,
3171 .link_reset
= nvme_link_reset
,
3172 .slot_reset
= nvme_slot_reset
,
3173 .resume
= nvme_error_resume
,
3174 .reset_notify
= nvme_reset_notify
,
3177 /* Move to pci_ids.h later */
3178 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3180 static const struct pci_device_id nvme_id_table
[] = {
3181 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
3184 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
3186 static struct pci_driver nvme_driver
= {
3188 .id_table
= nvme_id_table
,
3189 .probe
= nvme_probe
,
3190 .remove
= nvme_remove
,
3191 .shutdown
= nvme_shutdown
,
3193 .pm
= &nvme_dev_pm_ops
,
3195 .err_handler
= &nvme_err_handler
,
3198 static int __init
nvme_init(void)
3202 init_waitqueue_head(&nvme_kthread_wait
);
3204 nvme_workq
= create_singlethread_workqueue("nvme");
3208 result
= register_blkdev(nvme_major
, "nvme");
3211 else if (result
> 0)
3212 nvme_major
= result
;
3214 result
= __register_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme",
3217 goto unregister_blkdev
;
3218 else if (result
> 0)
3219 nvme_char_major
= result
;
3221 nvme_class
= class_create(THIS_MODULE
, "nvme");
3222 if (IS_ERR(nvme_class
)) {
3223 result
= PTR_ERR(nvme_class
);
3224 goto unregister_chrdev
;
3227 result
= pci_register_driver(&nvme_driver
);
3233 class_destroy(nvme_class
);
3235 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3237 unregister_blkdev(nvme_major
, "nvme");
3239 destroy_workqueue(nvme_workq
);
3243 static void __exit
nvme_exit(void)
3245 pci_unregister_driver(&nvme_driver
);
3246 unregister_blkdev(nvme_major
, "nvme");
3247 destroy_workqueue(nvme_workq
);
3248 class_destroy(nvme_class
);
3249 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3250 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
3254 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3255 MODULE_LICENSE("GPL");
3256 MODULE_VERSION("1.0");
3257 module_init(nvme_init
);
3258 module_exit(nvme_exit
);