mm: update min_free_kbytes from khugepaged after core initialization
[deliverable/linux.git] / drivers / clk / Kconfig
1
2 config CLKDEV_LOOKUP
3 bool
4 select HAVE_CLK
5
6 config HAVE_CLK_PREPARE
7 bool
8
9 config COMMON_CLK
10 bool
11 select HAVE_CLK_PREPARE
12 select CLKDEV_LOOKUP
13 select SRCU
14 select RATIONAL
15 ---help---
16 The common clock framework is a single definition of struct
17 clk, useful across many platforms, as well as an
18 implementation of the clock API in include/linux/clk.h.
19 Architectures utilizing the common struct clk should select
20 this option.
21
22 menu "Common Clock Framework"
23 depends on COMMON_CLK
24
25 config COMMON_CLK_WM831X
26 tristate "Clock driver for WM831x/2x PMICs"
27 depends on MFD_WM831X
28 ---help---
29 Supports the clocking subsystem of the WM831x/2x series of
30 PMICs from Wolfson Microelectronics.
31
32 source "drivers/clk/versatile/Kconfig"
33
34 config COMMON_CLK_MAX_GEN
35 bool
36
37 config COMMON_CLK_MAX77686
38 tristate "Clock driver for Maxim 77686 MFD"
39 depends on MFD_MAX77686
40 select COMMON_CLK_MAX_GEN
41 ---help---
42 This driver supports Maxim 77686 crystal oscillator clock.
43
44 config COMMON_CLK_MAX77802
45 tristate "Clock driver for Maxim 77802 PMIC"
46 depends on MFD_MAX77686
47 select COMMON_CLK_MAX_GEN
48 ---help---
49 This driver supports Maxim 77802 crystal oscillator clock.
50
51 config COMMON_CLK_RK808
52 tristate "Clock driver for RK808"
53 depends on MFD_RK808
54 ---help---
55 This driver supports RK808 crystal oscillator clock. These
56 multi-function devices have two fixed-rate oscillators,
57 clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
58 by control register.
59
60 config COMMON_CLK_SCPI
61 tristate "Clock driver controlled via SCPI interface"
62 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
63 ---help---
64 This driver provides support for clocks that are controlled
65 by firmware that implements the SCPI interface.
66
67 This driver uses SCPI Message Protocol to interact with the
68 firmware providing all the clock controls.
69
70 config COMMON_CLK_SI5351
71 tristate "Clock driver for SiLabs 5351A/B/C"
72 depends on I2C
73 select REGMAP_I2C
74 select RATIONAL
75 ---help---
76 This driver supports Silicon Labs 5351A/B/C programmable clock
77 generators.
78
79 config COMMON_CLK_SI514
80 tristate "Clock driver for SiLabs 514 devices"
81 depends on I2C
82 depends on OF
83 select REGMAP_I2C
84 help
85 ---help---
86 This driver supports the Silicon Labs 514 programmable clock
87 generator.
88
89 config COMMON_CLK_SI570
90 tristate "Clock driver for SiLabs 570 and compatible devices"
91 depends on I2C
92 depends on OF
93 select REGMAP_I2C
94 help
95 ---help---
96 This driver supports Silicon Labs 570/571/598/599 programmable
97 clock generators.
98
99 config COMMON_CLK_CDCE706
100 tristate "Clock driver for TI CDCE706 clock synthesizer"
101 depends on I2C
102 select REGMAP_I2C
103 select RATIONAL
104 ---help---
105 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
106
107 config COMMON_CLK_CDCE925
108 tristate "Clock driver for TI CDCE925 devices"
109 depends on I2C
110 depends on OF
111 select REGMAP_I2C
112 help
113 ---help---
114 This driver supports the TI CDCE925 programmable clock synthesizer.
115 The chip contains two PLLs with spread-spectrum clocking support and
116 five output dividers. The driver only supports the following setup,
117 and uses a fixed setting for the output muxes.
118 Y1 is derived from the input clock
119 Y2 and Y3 derive from PLL1
120 Y4 and Y5 derive from PLL2
121 Given a target output frequency, the driver will set the PLL and
122 divider to best approximate the desired output.
123
124 config COMMON_CLK_CS2000_CP
125 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
126 depends on I2C
127 help
128 If you say yes here you get support for the CS2000 clock multiplier.
129
130 config COMMON_CLK_S2MPS11
131 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
132 depends on MFD_SEC_CORE
133 ---help---
134 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
135 clock. These multi-function devices have two (S2MPS14) or three
136 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
137
138 config CLK_TWL6040
139 tristate "External McPDM functional clock from twl6040"
140 depends on TWL6040_CORE
141 ---help---
142 Enable the external functional clock support on OMAP4+ platforms for
143 McPDM. McPDM module is using the external bit clock on the McPDM bus
144 as functional clock.
145
146 config COMMON_CLK_AXI_CLKGEN
147 tristate "AXI clkgen driver"
148 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
149 help
150 ---help---
151 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
152 FPGAs. It is commonly used in Analog Devices' reference designs.
153
154 config CLK_QORIQ
155 bool "Clock driver for Freescale QorIQ platforms"
156 depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
157 ---help---
158 This adds the clock driver support for Freescale QorIQ platforms
159 using common clock framework.
160
161 config COMMON_CLK_XGENE
162 bool "Clock driver for APM XGene SoC"
163 default y
164 depends on ARM64 || COMPILE_TEST
165 ---help---
166 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
167
168 config COMMON_CLK_KEYSTONE
169 tristate "Clock drivers for Keystone based SOCs"
170 depends on (ARCH_KEYSTONE || COMPILE_TEST) && OF
171 ---help---
172 Supports clock drivers for Keystone based SOCs. These SOCs have local
173 a power sleep control module that gate the clock to the IPs and PLLs.
174
175 config COMMON_CLK_NXP
176 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
177 select REGMAP_MMIO if ARCH_LPC32XX
178 ---help---
179 Support for clock providers on NXP platforms.
180
181 config COMMON_CLK_PALMAS
182 tristate "Clock driver for TI Palmas devices"
183 depends on MFD_PALMAS
184 ---help---
185 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
186 using common clock framework.
187
188 config COMMON_CLK_PWM
189 tristate "Clock driver for PWMs used as clock outputs"
190 depends on PWM
191 ---help---
192 Adapter driver so that any PWM output can be (mis)used as clock signal
193 at 50% duty cycle.
194
195 config COMMON_CLK_PXA
196 def_bool COMMON_CLK && ARCH_PXA
197 ---help---
198 Support for the Marvell PXA SoC.
199
200 source "drivers/clk/bcm/Kconfig"
201 source "drivers/clk/hisilicon/Kconfig"
202 source "drivers/clk/mvebu/Kconfig"
203 source "drivers/clk/qcom/Kconfig"
204 source "drivers/clk/samsung/Kconfig"
205 source "drivers/clk/tegra/Kconfig"
206 source "drivers/clk/ti/Kconfig"
207
208 endmenu
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