Merge remote-tracking branch 'dma-buf/for-next'
[deliverable/linux.git] / drivers / clk / clk.c
1 /*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 #include <linux/clk/clk-conf.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/spinlock.h>
18 #include <linux/err.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/of.h>
22 #include <linux/device.h>
23 #include <linux/init.h>
24 #include <linux/sched.h>
25 #include <linux/clkdev.h>
26
27 #include "clk.h"
28
29 static DEFINE_SPINLOCK(enable_lock);
30 static DEFINE_MUTEX(prepare_lock);
31
32 static struct task_struct *prepare_owner;
33 static struct task_struct *enable_owner;
34
35 static int prepare_refcnt;
36 static int enable_refcnt;
37
38 static HLIST_HEAD(clk_root_list);
39 static HLIST_HEAD(clk_orphan_list);
40 static LIST_HEAD(clk_notifier_list);
41
42 /*** private data structures ***/
43
44 struct clk_core {
45 const char *name;
46 const struct clk_ops *ops;
47 struct clk_hw *hw;
48 struct module *owner;
49 struct clk_core *parent;
50 const char **parent_names;
51 struct clk_core **parents;
52 u8 num_parents;
53 u8 new_parent_index;
54 unsigned long rate;
55 unsigned long req_rate;
56 unsigned long new_rate;
57 struct clk_core *new_parent;
58 struct clk_core *new_child;
59 unsigned long flags;
60 bool orphan;
61 unsigned int enable_count;
62 unsigned int prepare_count;
63 unsigned long min_rate;
64 unsigned long max_rate;
65 unsigned long accuracy;
66 int phase;
67 struct hlist_head children;
68 struct hlist_node child_node;
69 struct hlist_head clks;
70 unsigned int notifier_count;
71 #ifdef CONFIG_DEBUG_FS
72 struct dentry *dentry;
73 struct hlist_node debug_node;
74 #endif
75 struct kref ref;
76 };
77
78 #define CREATE_TRACE_POINTS
79 #include <trace/events/clk.h>
80
81 struct clk {
82 struct clk_core *core;
83 const char *dev_id;
84 const char *con_id;
85 unsigned long min_rate;
86 unsigned long max_rate;
87 struct hlist_node clks_node;
88 };
89
90 /*** locking ***/
91 static void clk_prepare_lock(void)
92 {
93 if (!mutex_trylock(&prepare_lock)) {
94 if (prepare_owner == current) {
95 prepare_refcnt++;
96 return;
97 }
98 mutex_lock(&prepare_lock);
99 }
100 WARN_ON_ONCE(prepare_owner != NULL);
101 WARN_ON_ONCE(prepare_refcnt != 0);
102 prepare_owner = current;
103 prepare_refcnt = 1;
104 }
105
106 static void clk_prepare_unlock(void)
107 {
108 WARN_ON_ONCE(prepare_owner != current);
109 WARN_ON_ONCE(prepare_refcnt == 0);
110
111 if (--prepare_refcnt)
112 return;
113 prepare_owner = NULL;
114 mutex_unlock(&prepare_lock);
115 }
116
117 static unsigned long clk_enable_lock(void)
118 __acquires(enable_lock)
119 {
120 unsigned long flags;
121
122 if (!spin_trylock_irqsave(&enable_lock, flags)) {
123 if (enable_owner == current) {
124 enable_refcnt++;
125 __acquire(enable_lock);
126 return flags;
127 }
128 spin_lock_irqsave(&enable_lock, flags);
129 }
130 WARN_ON_ONCE(enable_owner != NULL);
131 WARN_ON_ONCE(enable_refcnt != 0);
132 enable_owner = current;
133 enable_refcnt = 1;
134 return flags;
135 }
136
137 static void clk_enable_unlock(unsigned long flags)
138 __releases(enable_lock)
139 {
140 WARN_ON_ONCE(enable_owner != current);
141 WARN_ON_ONCE(enable_refcnt == 0);
142
143 if (--enable_refcnt) {
144 __release(enable_lock);
145 return;
146 }
147 enable_owner = NULL;
148 spin_unlock_irqrestore(&enable_lock, flags);
149 }
150
151 static bool clk_core_is_prepared(struct clk_core *core)
152 {
153 /*
154 * .is_prepared is optional for clocks that can prepare
155 * fall back to software usage counter if it is missing
156 */
157 if (!core->ops->is_prepared)
158 return core->prepare_count;
159
160 return core->ops->is_prepared(core->hw);
161 }
162
163 static bool clk_core_is_enabled(struct clk_core *core)
164 {
165 /*
166 * .is_enabled is only mandatory for clocks that gate
167 * fall back to software usage counter if .is_enabled is missing
168 */
169 if (!core->ops->is_enabled)
170 return core->enable_count;
171
172 return core->ops->is_enabled(core->hw);
173 }
174
175 /*** helper functions ***/
176
177 const char *__clk_get_name(const struct clk *clk)
178 {
179 return !clk ? NULL : clk->core->name;
180 }
181 EXPORT_SYMBOL_GPL(__clk_get_name);
182
183 const char *clk_hw_get_name(const struct clk_hw *hw)
184 {
185 return hw->core->name;
186 }
187 EXPORT_SYMBOL_GPL(clk_hw_get_name);
188
189 struct clk_hw *__clk_get_hw(struct clk *clk)
190 {
191 return !clk ? NULL : clk->core->hw;
192 }
193 EXPORT_SYMBOL_GPL(__clk_get_hw);
194
195 unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
196 {
197 return hw->core->num_parents;
198 }
199 EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
200
201 struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
202 {
203 return hw->core->parent ? hw->core->parent->hw : NULL;
204 }
205 EXPORT_SYMBOL_GPL(clk_hw_get_parent);
206
207 static struct clk_core *__clk_lookup_subtree(const char *name,
208 struct clk_core *core)
209 {
210 struct clk_core *child;
211 struct clk_core *ret;
212
213 if (!strcmp(core->name, name))
214 return core;
215
216 hlist_for_each_entry(child, &core->children, child_node) {
217 ret = __clk_lookup_subtree(name, child);
218 if (ret)
219 return ret;
220 }
221
222 return NULL;
223 }
224
225 static struct clk_core *clk_core_lookup(const char *name)
226 {
227 struct clk_core *root_clk;
228 struct clk_core *ret;
229
230 if (!name)
231 return NULL;
232
233 /* search the 'proper' clk tree first */
234 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
235 ret = __clk_lookup_subtree(name, root_clk);
236 if (ret)
237 return ret;
238 }
239
240 /* if not found, then search the orphan tree */
241 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
242 ret = __clk_lookup_subtree(name, root_clk);
243 if (ret)
244 return ret;
245 }
246
247 return NULL;
248 }
249
250 static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
251 u8 index)
252 {
253 if (!core || index >= core->num_parents)
254 return NULL;
255
256 if (!core->parents[index])
257 core->parents[index] =
258 clk_core_lookup(core->parent_names[index]);
259
260 return core->parents[index];
261 }
262
263 struct clk_hw *
264 clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
265 {
266 struct clk_core *parent;
267
268 parent = clk_core_get_parent_by_index(hw->core, index);
269
270 return !parent ? NULL : parent->hw;
271 }
272 EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
273
274 unsigned int __clk_get_enable_count(struct clk *clk)
275 {
276 return !clk ? 0 : clk->core->enable_count;
277 }
278
279 static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
280 {
281 unsigned long ret;
282
283 if (!core) {
284 ret = 0;
285 goto out;
286 }
287
288 ret = core->rate;
289
290 if (!core->num_parents)
291 goto out;
292
293 if (!core->parent)
294 ret = 0;
295
296 out:
297 return ret;
298 }
299
300 unsigned long clk_hw_get_rate(const struct clk_hw *hw)
301 {
302 return clk_core_get_rate_nolock(hw->core);
303 }
304 EXPORT_SYMBOL_GPL(clk_hw_get_rate);
305
306 static unsigned long __clk_get_accuracy(struct clk_core *core)
307 {
308 if (!core)
309 return 0;
310
311 return core->accuracy;
312 }
313
314 unsigned long __clk_get_flags(struct clk *clk)
315 {
316 return !clk ? 0 : clk->core->flags;
317 }
318 EXPORT_SYMBOL_GPL(__clk_get_flags);
319
320 unsigned long clk_hw_get_flags(const struct clk_hw *hw)
321 {
322 return hw->core->flags;
323 }
324 EXPORT_SYMBOL_GPL(clk_hw_get_flags);
325
326 bool clk_hw_is_prepared(const struct clk_hw *hw)
327 {
328 return clk_core_is_prepared(hw->core);
329 }
330
331 bool clk_hw_is_enabled(const struct clk_hw *hw)
332 {
333 return clk_core_is_enabled(hw->core);
334 }
335
336 bool __clk_is_enabled(struct clk *clk)
337 {
338 if (!clk)
339 return false;
340
341 return clk_core_is_enabled(clk->core);
342 }
343 EXPORT_SYMBOL_GPL(__clk_is_enabled);
344
345 static bool mux_is_better_rate(unsigned long rate, unsigned long now,
346 unsigned long best, unsigned long flags)
347 {
348 if (flags & CLK_MUX_ROUND_CLOSEST)
349 return abs(now - rate) < abs(best - rate);
350
351 return now <= rate && now > best;
352 }
353
354 static int
355 clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req,
356 unsigned long flags)
357 {
358 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
359 int i, num_parents, ret;
360 unsigned long best = 0;
361 struct clk_rate_request parent_req = *req;
362
363 /* if NO_REPARENT flag set, pass through to current parent */
364 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
365 parent = core->parent;
366 if (core->flags & CLK_SET_RATE_PARENT) {
367 ret = __clk_determine_rate(parent ? parent->hw : NULL,
368 &parent_req);
369 if (ret)
370 return ret;
371
372 best = parent_req.rate;
373 } else if (parent) {
374 best = clk_core_get_rate_nolock(parent);
375 } else {
376 best = clk_core_get_rate_nolock(core);
377 }
378
379 goto out;
380 }
381
382 /* find the parent that can provide the fastest rate <= rate */
383 num_parents = core->num_parents;
384 for (i = 0; i < num_parents; i++) {
385 parent = clk_core_get_parent_by_index(core, i);
386 if (!parent)
387 continue;
388
389 if (core->flags & CLK_SET_RATE_PARENT) {
390 parent_req = *req;
391 ret = __clk_determine_rate(parent->hw, &parent_req);
392 if (ret)
393 continue;
394 } else {
395 parent_req.rate = clk_core_get_rate_nolock(parent);
396 }
397
398 if (mux_is_better_rate(req->rate, parent_req.rate,
399 best, flags)) {
400 best_parent = parent;
401 best = parent_req.rate;
402 }
403 }
404
405 if (!best_parent)
406 return -EINVAL;
407
408 out:
409 if (best_parent)
410 req->best_parent_hw = best_parent->hw;
411 req->best_parent_rate = best;
412 req->rate = best;
413
414 return 0;
415 }
416
417 struct clk *__clk_lookup(const char *name)
418 {
419 struct clk_core *core = clk_core_lookup(name);
420
421 return !core ? NULL : core->hw->clk;
422 }
423
424 static void clk_core_get_boundaries(struct clk_core *core,
425 unsigned long *min_rate,
426 unsigned long *max_rate)
427 {
428 struct clk *clk_user;
429
430 *min_rate = core->min_rate;
431 *max_rate = core->max_rate;
432
433 hlist_for_each_entry(clk_user, &core->clks, clks_node)
434 *min_rate = max(*min_rate, clk_user->min_rate);
435
436 hlist_for_each_entry(clk_user, &core->clks, clks_node)
437 *max_rate = min(*max_rate, clk_user->max_rate);
438 }
439
440 void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
441 unsigned long max_rate)
442 {
443 hw->core->min_rate = min_rate;
444 hw->core->max_rate = max_rate;
445 }
446 EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
447
448 /*
449 * Helper for finding best parent to provide a given frequency. This can be used
450 * directly as a determine_rate callback (e.g. for a mux), or from a more
451 * complex clock that may combine a mux with other operations.
452 */
453 int __clk_mux_determine_rate(struct clk_hw *hw,
454 struct clk_rate_request *req)
455 {
456 return clk_mux_determine_rate_flags(hw, req, 0);
457 }
458 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
459
460 int __clk_mux_determine_rate_closest(struct clk_hw *hw,
461 struct clk_rate_request *req)
462 {
463 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
464 }
465 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
466
467 /*** clk api ***/
468
469 static void clk_core_unprepare(struct clk_core *core)
470 {
471 lockdep_assert_held(&prepare_lock);
472
473 if (!core)
474 return;
475
476 if (WARN_ON(core->prepare_count == 0))
477 return;
478
479 if (WARN_ON(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL))
480 return;
481
482 if (--core->prepare_count > 0)
483 return;
484
485 WARN_ON(core->enable_count > 0);
486
487 trace_clk_unprepare(core);
488
489 if (core->ops->unprepare)
490 core->ops->unprepare(core->hw);
491
492 trace_clk_unprepare_complete(core);
493 clk_core_unprepare(core->parent);
494 }
495
496 static void clk_core_unprepare_lock(struct clk_core *core)
497 {
498 clk_prepare_lock();
499 clk_core_unprepare(core);
500 clk_prepare_unlock();
501 }
502
503 /**
504 * clk_unprepare - undo preparation of a clock source
505 * @clk: the clk being unprepared
506 *
507 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
508 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
509 * if the operation may sleep. One example is a clk which is accessed over
510 * I2c. In the complex case a clk gate operation may require a fast and a slow
511 * part. It is this reason that clk_unprepare and clk_disable are not mutually
512 * exclusive. In fact clk_disable must be called before clk_unprepare.
513 */
514 void clk_unprepare(struct clk *clk)
515 {
516 if (IS_ERR_OR_NULL(clk))
517 return;
518
519 clk_core_unprepare_lock(clk->core);
520 }
521 EXPORT_SYMBOL_GPL(clk_unprepare);
522
523 static int clk_core_prepare(struct clk_core *core)
524 {
525 int ret = 0;
526
527 lockdep_assert_held(&prepare_lock);
528
529 if (!core)
530 return 0;
531
532 if (core->prepare_count == 0) {
533 ret = clk_core_prepare(core->parent);
534 if (ret)
535 return ret;
536
537 trace_clk_prepare(core);
538
539 if (core->ops->prepare)
540 ret = core->ops->prepare(core->hw);
541
542 trace_clk_prepare_complete(core);
543
544 if (ret) {
545 clk_core_unprepare(core->parent);
546 return ret;
547 }
548 }
549
550 core->prepare_count++;
551
552 return 0;
553 }
554
555 static int clk_core_prepare_lock(struct clk_core *core)
556 {
557 int ret;
558
559 clk_prepare_lock();
560 ret = clk_core_prepare(core);
561 clk_prepare_unlock();
562
563 return ret;
564 }
565
566 /**
567 * clk_prepare - prepare a clock source
568 * @clk: the clk being prepared
569 *
570 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
571 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
572 * operation may sleep. One example is a clk which is accessed over I2c. In
573 * the complex case a clk ungate operation may require a fast and a slow part.
574 * It is this reason that clk_prepare and clk_enable are not mutually
575 * exclusive. In fact clk_prepare must be called before clk_enable.
576 * Returns 0 on success, -EERROR otherwise.
577 */
578 int clk_prepare(struct clk *clk)
579 {
580 if (!clk)
581 return 0;
582
583 return clk_core_prepare_lock(clk->core);
584 }
585 EXPORT_SYMBOL_GPL(clk_prepare);
586
587 static void clk_core_disable(struct clk_core *core)
588 {
589 lockdep_assert_held(&enable_lock);
590
591 if (!core)
592 return;
593
594 if (WARN_ON(core->enable_count == 0))
595 return;
596
597 if (WARN_ON(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL))
598 return;
599
600 if (--core->enable_count > 0)
601 return;
602
603 trace_clk_disable_rcuidle(core);
604
605 if (core->ops->disable)
606 core->ops->disable(core->hw);
607
608 trace_clk_disable_complete_rcuidle(core);
609
610 clk_core_disable(core->parent);
611 }
612
613 static void clk_core_disable_lock(struct clk_core *core)
614 {
615 unsigned long flags;
616
617 flags = clk_enable_lock();
618 clk_core_disable(core);
619 clk_enable_unlock(flags);
620 }
621
622 /**
623 * clk_disable - gate a clock
624 * @clk: the clk being gated
625 *
626 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
627 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
628 * clk if the operation is fast and will never sleep. One example is a
629 * SoC-internal clk which is controlled via simple register writes. In the
630 * complex case a clk gate operation may require a fast and a slow part. It is
631 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
632 * In fact clk_disable must be called before clk_unprepare.
633 */
634 void clk_disable(struct clk *clk)
635 {
636 if (IS_ERR_OR_NULL(clk))
637 return;
638
639 clk_core_disable_lock(clk->core);
640 }
641 EXPORT_SYMBOL_GPL(clk_disable);
642
643 static int clk_core_enable(struct clk_core *core)
644 {
645 int ret = 0;
646
647 lockdep_assert_held(&enable_lock);
648
649 if (!core)
650 return 0;
651
652 if (WARN_ON(core->prepare_count == 0))
653 return -ESHUTDOWN;
654
655 if (core->enable_count == 0) {
656 ret = clk_core_enable(core->parent);
657
658 if (ret)
659 return ret;
660
661 trace_clk_enable_rcuidle(core);
662
663 if (core->ops->enable)
664 ret = core->ops->enable(core->hw);
665
666 trace_clk_enable_complete_rcuidle(core);
667
668 if (ret) {
669 clk_core_disable(core->parent);
670 return ret;
671 }
672 }
673
674 core->enable_count++;
675 return 0;
676 }
677
678 static int clk_core_enable_lock(struct clk_core *core)
679 {
680 unsigned long flags;
681 int ret;
682
683 flags = clk_enable_lock();
684 ret = clk_core_enable(core);
685 clk_enable_unlock(flags);
686
687 return ret;
688 }
689
690 /**
691 * clk_enable - ungate a clock
692 * @clk: the clk being ungated
693 *
694 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
695 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
696 * if the operation will never sleep. One example is a SoC-internal clk which
697 * is controlled via simple register writes. In the complex case a clk ungate
698 * operation may require a fast and a slow part. It is this reason that
699 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
700 * must be called before clk_enable. Returns 0 on success, -EERROR
701 * otherwise.
702 */
703 int clk_enable(struct clk *clk)
704 {
705 if (!clk)
706 return 0;
707
708 return clk_core_enable_lock(clk->core);
709 }
710 EXPORT_SYMBOL_GPL(clk_enable);
711
712 static int clk_core_prepare_enable(struct clk_core *core)
713 {
714 int ret;
715
716 ret = clk_core_prepare_lock(core);
717 if (ret)
718 return ret;
719
720 ret = clk_core_enable_lock(core);
721 if (ret)
722 clk_core_unprepare_lock(core);
723
724 return ret;
725 }
726
727 static void clk_core_disable_unprepare(struct clk_core *core)
728 {
729 clk_core_disable_lock(core);
730 clk_core_unprepare_lock(core);
731 }
732
733 static void clk_unprepare_unused_subtree(struct clk_core *core)
734 {
735 struct clk_core *child;
736
737 lockdep_assert_held(&prepare_lock);
738
739 hlist_for_each_entry(child, &core->children, child_node)
740 clk_unprepare_unused_subtree(child);
741
742 if (core->prepare_count)
743 return;
744
745 if (core->flags & CLK_IGNORE_UNUSED)
746 return;
747
748 if (clk_core_is_prepared(core)) {
749 trace_clk_unprepare(core);
750 if (core->ops->unprepare_unused)
751 core->ops->unprepare_unused(core->hw);
752 else if (core->ops->unprepare)
753 core->ops->unprepare(core->hw);
754 trace_clk_unprepare_complete(core);
755 }
756 }
757
758 static void clk_disable_unused_subtree(struct clk_core *core)
759 {
760 struct clk_core *child;
761 unsigned long flags;
762
763 lockdep_assert_held(&prepare_lock);
764
765 hlist_for_each_entry(child, &core->children, child_node)
766 clk_disable_unused_subtree(child);
767
768 if (core->flags & CLK_OPS_PARENT_ENABLE)
769 clk_core_prepare_enable(core->parent);
770
771 flags = clk_enable_lock();
772
773 if (core->enable_count)
774 goto unlock_out;
775
776 if (core->flags & CLK_IGNORE_UNUSED)
777 goto unlock_out;
778
779 /*
780 * some gate clocks have special needs during the disable-unused
781 * sequence. call .disable_unused if available, otherwise fall
782 * back to .disable
783 */
784 if (clk_core_is_enabled(core)) {
785 trace_clk_disable(core);
786 if (core->ops->disable_unused)
787 core->ops->disable_unused(core->hw);
788 else if (core->ops->disable)
789 core->ops->disable(core->hw);
790 trace_clk_disable_complete(core);
791 }
792
793 unlock_out:
794 clk_enable_unlock(flags);
795 if (core->flags & CLK_OPS_PARENT_ENABLE)
796 clk_core_disable_unprepare(core->parent);
797 }
798
799 static bool clk_ignore_unused;
800 static int __init clk_ignore_unused_setup(char *__unused)
801 {
802 clk_ignore_unused = true;
803 return 1;
804 }
805 __setup("clk_ignore_unused", clk_ignore_unused_setup);
806
807 static int clk_disable_unused(void)
808 {
809 struct clk_core *core;
810
811 if (clk_ignore_unused) {
812 pr_warn("clk: Not disabling unused clocks\n");
813 return 0;
814 }
815
816 clk_prepare_lock();
817
818 hlist_for_each_entry(core, &clk_root_list, child_node)
819 clk_disable_unused_subtree(core);
820
821 hlist_for_each_entry(core, &clk_orphan_list, child_node)
822 clk_disable_unused_subtree(core);
823
824 hlist_for_each_entry(core, &clk_root_list, child_node)
825 clk_unprepare_unused_subtree(core);
826
827 hlist_for_each_entry(core, &clk_orphan_list, child_node)
828 clk_unprepare_unused_subtree(core);
829
830 clk_prepare_unlock();
831
832 return 0;
833 }
834 late_initcall_sync(clk_disable_unused);
835
836 static int clk_core_round_rate_nolock(struct clk_core *core,
837 struct clk_rate_request *req)
838 {
839 struct clk_core *parent;
840 long rate;
841
842 lockdep_assert_held(&prepare_lock);
843
844 if (!core)
845 return 0;
846
847 parent = core->parent;
848 if (parent) {
849 req->best_parent_hw = parent->hw;
850 req->best_parent_rate = parent->rate;
851 } else {
852 req->best_parent_hw = NULL;
853 req->best_parent_rate = 0;
854 }
855
856 if (core->ops->determine_rate) {
857 return core->ops->determine_rate(core->hw, req);
858 } else if (core->ops->round_rate) {
859 rate = core->ops->round_rate(core->hw, req->rate,
860 &req->best_parent_rate);
861 if (rate < 0)
862 return rate;
863
864 req->rate = rate;
865 } else if (core->flags & CLK_SET_RATE_PARENT) {
866 return clk_core_round_rate_nolock(parent, req);
867 } else {
868 req->rate = core->rate;
869 }
870
871 return 0;
872 }
873
874 /**
875 * __clk_determine_rate - get the closest rate actually supported by a clock
876 * @hw: determine the rate of this clock
877 * @req: target rate request
878 *
879 * Useful for clk_ops such as .set_rate and .determine_rate.
880 */
881 int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
882 {
883 if (!hw) {
884 req->rate = 0;
885 return 0;
886 }
887
888 return clk_core_round_rate_nolock(hw->core, req);
889 }
890 EXPORT_SYMBOL_GPL(__clk_determine_rate);
891
892 unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
893 {
894 int ret;
895 struct clk_rate_request req;
896
897 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
898 req.rate = rate;
899
900 ret = clk_core_round_rate_nolock(hw->core, &req);
901 if (ret)
902 return 0;
903
904 return req.rate;
905 }
906 EXPORT_SYMBOL_GPL(clk_hw_round_rate);
907
908 /**
909 * clk_round_rate - round the given rate for a clk
910 * @clk: the clk for which we are rounding a rate
911 * @rate: the rate which is to be rounded
912 *
913 * Takes in a rate as input and rounds it to a rate that the clk can actually
914 * use which is then returned. If clk doesn't support round_rate operation
915 * then the parent rate is returned.
916 */
917 long clk_round_rate(struct clk *clk, unsigned long rate)
918 {
919 struct clk_rate_request req;
920 int ret;
921
922 if (!clk)
923 return 0;
924
925 clk_prepare_lock();
926
927 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
928 req.rate = rate;
929
930 ret = clk_core_round_rate_nolock(clk->core, &req);
931 clk_prepare_unlock();
932
933 if (ret)
934 return ret;
935
936 return req.rate;
937 }
938 EXPORT_SYMBOL_GPL(clk_round_rate);
939
940 /**
941 * __clk_notify - call clk notifier chain
942 * @core: clk that is changing rate
943 * @msg: clk notifier type (see include/linux/clk.h)
944 * @old_rate: old clk rate
945 * @new_rate: new clk rate
946 *
947 * Triggers a notifier call chain on the clk rate-change notification
948 * for 'clk'. Passes a pointer to the struct clk and the previous
949 * and current rates to the notifier callback. Intended to be called by
950 * internal clock code only. Returns NOTIFY_DONE from the last driver
951 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
952 * a driver returns that.
953 */
954 static int __clk_notify(struct clk_core *core, unsigned long msg,
955 unsigned long old_rate, unsigned long new_rate)
956 {
957 struct clk_notifier *cn;
958 struct clk_notifier_data cnd;
959 int ret = NOTIFY_DONE;
960
961 cnd.old_rate = old_rate;
962 cnd.new_rate = new_rate;
963
964 list_for_each_entry(cn, &clk_notifier_list, node) {
965 if (cn->clk->core == core) {
966 cnd.clk = cn->clk;
967 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
968 &cnd);
969 }
970 }
971
972 return ret;
973 }
974
975 /**
976 * __clk_recalc_accuracies
977 * @core: first clk in the subtree
978 *
979 * Walks the subtree of clks starting with clk and recalculates accuracies as
980 * it goes. Note that if a clk does not implement the .recalc_accuracy
981 * callback then it is assumed that the clock will take on the accuracy of its
982 * parent.
983 */
984 static void __clk_recalc_accuracies(struct clk_core *core)
985 {
986 unsigned long parent_accuracy = 0;
987 struct clk_core *child;
988
989 lockdep_assert_held(&prepare_lock);
990
991 if (core->parent)
992 parent_accuracy = core->parent->accuracy;
993
994 if (core->ops->recalc_accuracy)
995 core->accuracy = core->ops->recalc_accuracy(core->hw,
996 parent_accuracy);
997 else
998 core->accuracy = parent_accuracy;
999
1000 hlist_for_each_entry(child, &core->children, child_node)
1001 __clk_recalc_accuracies(child);
1002 }
1003
1004 static long clk_core_get_accuracy(struct clk_core *core)
1005 {
1006 unsigned long accuracy;
1007
1008 clk_prepare_lock();
1009 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1010 __clk_recalc_accuracies(core);
1011
1012 accuracy = __clk_get_accuracy(core);
1013 clk_prepare_unlock();
1014
1015 return accuracy;
1016 }
1017
1018 /**
1019 * clk_get_accuracy - return the accuracy of clk
1020 * @clk: the clk whose accuracy is being returned
1021 *
1022 * Simply returns the cached accuracy of the clk, unless
1023 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1024 * issued.
1025 * If clk is NULL then returns 0.
1026 */
1027 long clk_get_accuracy(struct clk *clk)
1028 {
1029 if (!clk)
1030 return 0;
1031
1032 return clk_core_get_accuracy(clk->core);
1033 }
1034 EXPORT_SYMBOL_GPL(clk_get_accuracy);
1035
1036 static unsigned long clk_recalc(struct clk_core *core,
1037 unsigned long parent_rate)
1038 {
1039 if (core->ops->recalc_rate)
1040 return core->ops->recalc_rate(core->hw, parent_rate);
1041 return parent_rate;
1042 }
1043
1044 /**
1045 * __clk_recalc_rates
1046 * @core: first clk in the subtree
1047 * @msg: notification type (see include/linux/clk.h)
1048 *
1049 * Walks the subtree of clks starting with clk and recalculates rates as it
1050 * goes. Note that if a clk does not implement the .recalc_rate callback then
1051 * it is assumed that the clock will take on the rate of its parent.
1052 *
1053 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1054 * if necessary.
1055 */
1056 static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
1057 {
1058 unsigned long old_rate;
1059 unsigned long parent_rate = 0;
1060 struct clk_core *child;
1061
1062 lockdep_assert_held(&prepare_lock);
1063
1064 old_rate = core->rate;
1065
1066 if (core->parent)
1067 parent_rate = core->parent->rate;
1068
1069 core->rate = clk_recalc(core, parent_rate);
1070
1071 /*
1072 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1073 * & ABORT_RATE_CHANGE notifiers
1074 */
1075 if (core->notifier_count && msg)
1076 __clk_notify(core, msg, old_rate, core->rate);
1077
1078 hlist_for_each_entry(child, &core->children, child_node)
1079 __clk_recalc_rates(child, msg);
1080 }
1081
1082 static unsigned long clk_core_get_rate(struct clk_core *core)
1083 {
1084 unsigned long rate;
1085
1086 clk_prepare_lock();
1087
1088 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1089 __clk_recalc_rates(core, 0);
1090
1091 rate = clk_core_get_rate_nolock(core);
1092 clk_prepare_unlock();
1093
1094 return rate;
1095 }
1096
1097 /**
1098 * clk_get_rate - return the rate of clk
1099 * @clk: the clk whose rate is being returned
1100 *
1101 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1102 * is set, which means a recalc_rate will be issued.
1103 * If clk is NULL then returns 0.
1104 */
1105 unsigned long clk_get_rate(struct clk *clk)
1106 {
1107 if (!clk)
1108 return 0;
1109
1110 return clk_core_get_rate(clk->core);
1111 }
1112 EXPORT_SYMBOL_GPL(clk_get_rate);
1113
1114 static int clk_fetch_parent_index(struct clk_core *core,
1115 struct clk_core *parent)
1116 {
1117 int i;
1118
1119 if (!parent)
1120 return -EINVAL;
1121
1122 for (i = 0; i < core->num_parents; i++)
1123 if (clk_core_get_parent_by_index(core, i) == parent)
1124 return i;
1125
1126 return -EINVAL;
1127 }
1128
1129 /*
1130 * Update the orphan status of @core and all its children.
1131 */
1132 static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1133 {
1134 struct clk_core *child;
1135
1136 core->orphan = is_orphan;
1137
1138 hlist_for_each_entry(child, &core->children, child_node)
1139 clk_core_update_orphan_status(child, is_orphan);
1140 }
1141
1142 static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
1143 {
1144 bool was_orphan = core->orphan;
1145
1146 hlist_del(&core->child_node);
1147
1148 if (new_parent) {
1149 bool becomes_orphan = new_parent->orphan;
1150
1151 /* avoid duplicate POST_RATE_CHANGE notifications */
1152 if (new_parent->new_child == core)
1153 new_parent->new_child = NULL;
1154
1155 hlist_add_head(&core->child_node, &new_parent->children);
1156
1157 if (was_orphan != becomes_orphan)
1158 clk_core_update_orphan_status(core, becomes_orphan);
1159 } else {
1160 hlist_add_head(&core->child_node, &clk_orphan_list);
1161 if (!was_orphan)
1162 clk_core_update_orphan_status(core, true);
1163 }
1164
1165 core->parent = new_parent;
1166 }
1167
1168 static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1169 struct clk_core *parent)
1170 {
1171 unsigned long flags;
1172 struct clk_core *old_parent = core->parent;
1173
1174 /*
1175 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
1176 *
1177 * 2. Migrate prepare state between parents and prevent race with
1178 * clk_enable().
1179 *
1180 * If the clock is not prepared, then a race with
1181 * clk_enable/disable() is impossible since we already have the
1182 * prepare lock (future calls to clk_enable() need to be preceded by
1183 * a clk_prepare()).
1184 *
1185 * If the clock is prepared, migrate the prepared state to the new
1186 * parent and also protect against a race with clk_enable() by
1187 * forcing the clock and the new parent on. This ensures that all
1188 * future calls to clk_enable() are practically NOPs with respect to
1189 * hardware and software states.
1190 *
1191 * See also: Comment for clk_set_parent() below.
1192 */
1193
1194 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
1195 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1196 clk_core_prepare_enable(old_parent);
1197 clk_core_prepare_enable(parent);
1198 }
1199
1200 /* migrate prepare count if > 0 */
1201 if (core->prepare_count) {
1202 clk_core_prepare_enable(parent);
1203 clk_core_enable_lock(core);
1204 }
1205
1206 /* update the clk tree topology */
1207 flags = clk_enable_lock();
1208 clk_reparent(core, parent);
1209 clk_enable_unlock(flags);
1210
1211 return old_parent;
1212 }
1213
1214 static void __clk_set_parent_after(struct clk_core *core,
1215 struct clk_core *parent,
1216 struct clk_core *old_parent)
1217 {
1218 /*
1219 * Finish the migration of prepare state and undo the changes done
1220 * for preventing a race with clk_enable().
1221 */
1222 if (core->prepare_count) {
1223 clk_core_disable_lock(core);
1224 clk_core_disable_unprepare(old_parent);
1225 }
1226
1227 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1228 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1229 clk_core_disable_unprepare(parent);
1230 clk_core_disable_unprepare(old_parent);
1231 }
1232 }
1233
1234 static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1235 u8 p_index)
1236 {
1237 unsigned long flags;
1238 int ret = 0;
1239 struct clk_core *old_parent;
1240
1241 old_parent = __clk_set_parent_before(core, parent);
1242
1243 trace_clk_set_parent(core, parent);
1244
1245 /* change clock input source */
1246 if (parent && core->ops->set_parent)
1247 ret = core->ops->set_parent(core->hw, p_index);
1248
1249 trace_clk_set_parent_complete(core, parent);
1250
1251 if (ret) {
1252 flags = clk_enable_lock();
1253 clk_reparent(core, old_parent);
1254 clk_enable_unlock(flags);
1255 __clk_set_parent_after(core, old_parent, parent);
1256
1257 return ret;
1258 }
1259
1260 __clk_set_parent_after(core, parent, old_parent);
1261
1262 return 0;
1263 }
1264
1265 /**
1266 * __clk_speculate_rates
1267 * @core: first clk in the subtree
1268 * @parent_rate: the "future" rate of clk's parent
1269 *
1270 * Walks the subtree of clks starting with clk, speculating rates as it
1271 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1272 *
1273 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1274 * pre-rate change notifications and returns early if no clks in the
1275 * subtree have subscribed to the notifications. Note that if a clk does not
1276 * implement the .recalc_rate callback then it is assumed that the clock will
1277 * take on the rate of its parent.
1278 */
1279 static int __clk_speculate_rates(struct clk_core *core,
1280 unsigned long parent_rate)
1281 {
1282 struct clk_core *child;
1283 unsigned long new_rate;
1284 int ret = NOTIFY_DONE;
1285
1286 lockdep_assert_held(&prepare_lock);
1287
1288 new_rate = clk_recalc(core, parent_rate);
1289
1290 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1291 if (core->notifier_count)
1292 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1293
1294 if (ret & NOTIFY_STOP_MASK) {
1295 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1296 __func__, core->name, ret);
1297 goto out;
1298 }
1299
1300 hlist_for_each_entry(child, &core->children, child_node) {
1301 ret = __clk_speculate_rates(child, new_rate);
1302 if (ret & NOTIFY_STOP_MASK)
1303 break;
1304 }
1305
1306 out:
1307 return ret;
1308 }
1309
1310 static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1311 struct clk_core *new_parent, u8 p_index)
1312 {
1313 struct clk_core *child;
1314
1315 core->new_rate = new_rate;
1316 core->new_parent = new_parent;
1317 core->new_parent_index = p_index;
1318 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1319 core->new_child = NULL;
1320 if (new_parent && new_parent != core->parent)
1321 new_parent->new_child = core;
1322
1323 hlist_for_each_entry(child, &core->children, child_node) {
1324 child->new_rate = clk_recalc(child, new_rate);
1325 clk_calc_subtree(child, child->new_rate, NULL, 0);
1326 }
1327 }
1328
1329 /*
1330 * calculate the new rates returning the topmost clock that has to be
1331 * changed.
1332 */
1333 static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1334 unsigned long rate)
1335 {
1336 struct clk_core *top = core;
1337 struct clk_core *old_parent, *parent;
1338 unsigned long best_parent_rate = 0;
1339 unsigned long new_rate;
1340 unsigned long min_rate;
1341 unsigned long max_rate;
1342 int p_index = 0;
1343 long ret;
1344
1345 /* sanity */
1346 if (IS_ERR_OR_NULL(core))
1347 return NULL;
1348
1349 /* save parent rate, if it exists */
1350 parent = old_parent = core->parent;
1351 if (parent)
1352 best_parent_rate = parent->rate;
1353
1354 clk_core_get_boundaries(core, &min_rate, &max_rate);
1355
1356 /* find the closest rate and parent clk/rate */
1357 if (core->ops->determine_rate) {
1358 struct clk_rate_request req;
1359
1360 req.rate = rate;
1361 req.min_rate = min_rate;
1362 req.max_rate = max_rate;
1363 if (parent) {
1364 req.best_parent_hw = parent->hw;
1365 req.best_parent_rate = parent->rate;
1366 } else {
1367 req.best_parent_hw = NULL;
1368 req.best_parent_rate = 0;
1369 }
1370
1371 ret = core->ops->determine_rate(core->hw, &req);
1372 if (ret < 0)
1373 return NULL;
1374
1375 best_parent_rate = req.best_parent_rate;
1376 new_rate = req.rate;
1377 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
1378 } else if (core->ops->round_rate) {
1379 ret = core->ops->round_rate(core->hw, rate,
1380 &best_parent_rate);
1381 if (ret < 0)
1382 return NULL;
1383
1384 new_rate = ret;
1385 if (new_rate < min_rate || new_rate > max_rate)
1386 return NULL;
1387 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1388 /* pass-through clock without adjustable parent */
1389 core->new_rate = core->rate;
1390 return NULL;
1391 } else {
1392 /* pass-through clock with adjustable parent */
1393 top = clk_calc_new_rates(parent, rate);
1394 new_rate = parent->new_rate;
1395 goto out;
1396 }
1397
1398 /* some clocks must be gated to change parent */
1399 if (parent != old_parent &&
1400 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1401 pr_debug("%s: %s not gated but wants to reparent\n",
1402 __func__, core->name);
1403 return NULL;
1404 }
1405
1406 /* try finding the new parent index */
1407 if (parent && core->num_parents > 1) {
1408 p_index = clk_fetch_parent_index(core, parent);
1409 if (p_index < 0) {
1410 pr_debug("%s: clk %s can not be parent of clk %s\n",
1411 __func__, parent->name, core->name);
1412 return NULL;
1413 }
1414 }
1415
1416 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1417 best_parent_rate != parent->rate)
1418 top = clk_calc_new_rates(parent, best_parent_rate);
1419
1420 out:
1421 clk_calc_subtree(core, new_rate, parent, p_index);
1422
1423 return top;
1424 }
1425
1426 /*
1427 * Notify about rate changes in a subtree. Always walk down the whole tree
1428 * so that in case of an error we can walk down the whole tree again and
1429 * abort the change.
1430 */
1431 static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1432 unsigned long event)
1433 {
1434 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
1435 int ret = NOTIFY_DONE;
1436
1437 if (core->rate == core->new_rate)
1438 return NULL;
1439
1440 if (core->notifier_count) {
1441 ret = __clk_notify(core, event, core->rate, core->new_rate);
1442 if (ret & NOTIFY_STOP_MASK)
1443 fail_clk = core;
1444 }
1445
1446 hlist_for_each_entry(child, &core->children, child_node) {
1447 /* Skip children who will be reparented to another clock */
1448 if (child->new_parent && child->new_parent != core)
1449 continue;
1450 tmp_clk = clk_propagate_rate_change(child, event);
1451 if (tmp_clk)
1452 fail_clk = tmp_clk;
1453 }
1454
1455 /* handle the new child who might not be in core->children yet */
1456 if (core->new_child) {
1457 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1458 if (tmp_clk)
1459 fail_clk = tmp_clk;
1460 }
1461
1462 return fail_clk;
1463 }
1464
1465 /*
1466 * walk down a subtree and set the new rates notifying the rate
1467 * change on the way
1468 */
1469 static void clk_change_rate(struct clk_core *core)
1470 {
1471 struct clk_core *child;
1472 struct hlist_node *tmp;
1473 unsigned long old_rate;
1474 unsigned long best_parent_rate = 0;
1475 bool skip_set_rate = false;
1476 struct clk_core *old_parent;
1477 struct clk_core *parent = NULL;
1478
1479 old_rate = core->rate;
1480
1481 if (core->new_parent) {
1482 parent = core->new_parent;
1483 best_parent_rate = core->new_parent->rate;
1484 } else if (core->parent) {
1485 parent = core->parent;
1486 best_parent_rate = core->parent->rate;
1487 }
1488
1489 if (core->flags & CLK_SET_RATE_UNGATE) {
1490 unsigned long flags;
1491
1492 clk_core_prepare(core);
1493 flags = clk_enable_lock();
1494 clk_core_enable(core);
1495 clk_enable_unlock(flags);
1496 }
1497
1498 if (core->new_parent && core->new_parent != core->parent) {
1499 old_parent = __clk_set_parent_before(core, core->new_parent);
1500 trace_clk_set_parent(core, core->new_parent);
1501
1502 if (core->ops->set_rate_and_parent) {
1503 skip_set_rate = true;
1504 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1505 best_parent_rate,
1506 core->new_parent_index);
1507 } else if (core->ops->set_parent) {
1508 core->ops->set_parent(core->hw, core->new_parent_index);
1509 }
1510
1511 trace_clk_set_parent_complete(core, core->new_parent);
1512 __clk_set_parent_after(core, core->new_parent, old_parent);
1513 }
1514
1515 if (core->flags & CLK_OPS_PARENT_ENABLE)
1516 clk_core_prepare_enable(parent);
1517
1518 trace_clk_set_rate(core, core->new_rate);
1519
1520 if (!skip_set_rate && core->ops->set_rate)
1521 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
1522
1523 trace_clk_set_rate_complete(core, core->new_rate);
1524
1525 core->rate = clk_recalc(core, best_parent_rate);
1526
1527 if (core->flags & CLK_SET_RATE_UNGATE) {
1528 unsigned long flags;
1529
1530 flags = clk_enable_lock();
1531 clk_core_disable(core);
1532 clk_enable_unlock(flags);
1533 clk_core_unprepare(core);
1534 }
1535
1536 if (core->flags & CLK_OPS_PARENT_ENABLE)
1537 clk_core_disable_unprepare(parent);
1538
1539 if (core->notifier_count && old_rate != core->rate)
1540 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
1541
1542 if (core->flags & CLK_RECALC_NEW_RATES)
1543 (void)clk_calc_new_rates(core, core->new_rate);
1544
1545 /*
1546 * Use safe iteration, as change_rate can actually swap parents
1547 * for certain clock types.
1548 */
1549 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1550 /* Skip children who will be reparented to another clock */
1551 if (child->new_parent && child->new_parent != core)
1552 continue;
1553 clk_change_rate(child);
1554 }
1555
1556 /* handle the new child who might not be in core->children yet */
1557 if (core->new_child)
1558 clk_change_rate(core->new_child);
1559 }
1560
1561 static int clk_core_set_rate_nolock(struct clk_core *core,
1562 unsigned long req_rate)
1563 {
1564 struct clk_core *top, *fail_clk;
1565 unsigned long rate = req_rate;
1566
1567 if (!core)
1568 return 0;
1569
1570 /* bail early if nothing to do */
1571 if (rate == clk_core_get_rate_nolock(core))
1572 return 0;
1573
1574 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1575 return -EBUSY;
1576
1577 /* calculate new rates and get the topmost changed clock */
1578 top = clk_calc_new_rates(core, rate);
1579 if (!top)
1580 return -EINVAL;
1581
1582 /* notify that we are about to change rates */
1583 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1584 if (fail_clk) {
1585 pr_debug("%s: failed to set %s rate\n", __func__,
1586 fail_clk->name);
1587 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1588 return -EBUSY;
1589 }
1590
1591 /* change the rates */
1592 clk_change_rate(top);
1593
1594 core->req_rate = req_rate;
1595
1596 return 0;
1597 }
1598
1599 /**
1600 * clk_set_rate - specify a new rate for clk
1601 * @clk: the clk whose rate is being changed
1602 * @rate: the new rate for clk
1603 *
1604 * In the simplest case clk_set_rate will only adjust the rate of clk.
1605 *
1606 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1607 * propagate up to clk's parent; whether or not this happens depends on the
1608 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1609 * after calling .round_rate then upstream parent propagation is ignored. If
1610 * *parent_rate comes back with a new rate for clk's parent then we propagate
1611 * up to clk's parent and set its rate. Upward propagation will continue
1612 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1613 * .round_rate stops requesting changes to clk's parent_rate.
1614 *
1615 * Rate changes are accomplished via tree traversal that also recalculates the
1616 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1617 *
1618 * Returns 0 on success, -EERROR otherwise.
1619 */
1620 int clk_set_rate(struct clk *clk, unsigned long rate)
1621 {
1622 int ret;
1623
1624 if (!clk)
1625 return 0;
1626
1627 /* prevent racing with updates to the clock topology */
1628 clk_prepare_lock();
1629
1630 ret = clk_core_set_rate_nolock(clk->core, rate);
1631
1632 clk_prepare_unlock();
1633
1634 return ret;
1635 }
1636 EXPORT_SYMBOL_GPL(clk_set_rate);
1637
1638 /**
1639 * clk_set_rate_range - set a rate range for a clock source
1640 * @clk: clock source
1641 * @min: desired minimum clock rate in Hz, inclusive
1642 * @max: desired maximum clock rate in Hz, inclusive
1643 *
1644 * Returns success (0) or negative errno.
1645 */
1646 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
1647 {
1648 int ret = 0;
1649
1650 if (!clk)
1651 return 0;
1652
1653 if (min > max) {
1654 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1655 __func__, clk->core->name, clk->dev_id, clk->con_id,
1656 min, max);
1657 return -EINVAL;
1658 }
1659
1660 clk_prepare_lock();
1661
1662 if (min != clk->min_rate || max != clk->max_rate) {
1663 clk->min_rate = min;
1664 clk->max_rate = max;
1665 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
1666 }
1667
1668 clk_prepare_unlock();
1669
1670 return ret;
1671 }
1672 EXPORT_SYMBOL_GPL(clk_set_rate_range);
1673
1674 /**
1675 * clk_set_min_rate - set a minimum clock rate for a clock source
1676 * @clk: clock source
1677 * @rate: desired minimum clock rate in Hz, inclusive
1678 *
1679 * Returns success (0) or negative errno.
1680 */
1681 int clk_set_min_rate(struct clk *clk, unsigned long rate)
1682 {
1683 if (!clk)
1684 return 0;
1685
1686 return clk_set_rate_range(clk, rate, clk->max_rate);
1687 }
1688 EXPORT_SYMBOL_GPL(clk_set_min_rate);
1689
1690 /**
1691 * clk_set_max_rate - set a maximum clock rate for a clock source
1692 * @clk: clock source
1693 * @rate: desired maximum clock rate in Hz, inclusive
1694 *
1695 * Returns success (0) or negative errno.
1696 */
1697 int clk_set_max_rate(struct clk *clk, unsigned long rate)
1698 {
1699 if (!clk)
1700 return 0;
1701
1702 return clk_set_rate_range(clk, clk->min_rate, rate);
1703 }
1704 EXPORT_SYMBOL_GPL(clk_set_max_rate);
1705
1706 /**
1707 * clk_get_parent - return the parent of a clk
1708 * @clk: the clk whose parent gets returned
1709 *
1710 * Simply returns clk->parent. Returns NULL if clk is NULL.
1711 */
1712 struct clk *clk_get_parent(struct clk *clk)
1713 {
1714 struct clk *parent;
1715
1716 if (!clk)
1717 return NULL;
1718
1719 clk_prepare_lock();
1720 /* TODO: Create a per-user clk and change callers to call clk_put */
1721 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
1722 clk_prepare_unlock();
1723
1724 return parent;
1725 }
1726 EXPORT_SYMBOL_GPL(clk_get_parent);
1727
1728 static struct clk_core *__clk_init_parent(struct clk_core *core)
1729 {
1730 u8 index = 0;
1731
1732 if (core->num_parents > 1 && core->ops->get_parent)
1733 index = core->ops->get_parent(core->hw);
1734
1735 return clk_core_get_parent_by_index(core, index);
1736 }
1737
1738 static void clk_core_reparent(struct clk_core *core,
1739 struct clk_core *new_parent)
1740 {
1741 clk_reparent(core, new_parent);
1742 __clk_recalc_accuracies(core);
1743 __clk_recalc_rates(core, POST_RATE_CHANGE);
1744 }
1745
1746 void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
1747 {
1748 if (!hw)
1749 return;
1750
1751 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
1752 }
1753
1754 /**
1755 * clk_has_parent - check if a clock is a possible parent for another
1756 * @clk: clock source
1757 * @parent: parent clock source
1758 *
1759 * This function can be used in drivers that need to check that a clock can be
1760 * the parent of another without actually changing the parent.
1761 *
1762 * Returns true if @parent is a possible parent for @clk, false otherwise.
1763 */
1764 bool clk_has_parent(struct clk *clk, struct clk *parent)
1765 {
1766 struct clk_core *core, *parent_core;
1767 unsigned int i;
1768
1769 /* NULL clocks should be nops, so return success if either is NULL. */
1770 if (!clk || !parent)
1771 return true;
1772
1773 core = clk->core;
1774 parent_core = parent->core;
1775
1776 /* Optimize for the case where the parent is already the parent. */
1777 if (core->parent == parent_core)
1778 return true;
1779
1780 for (i = 0; i < core->num_parents; i++)
1781 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1782 return true;
1783
1784 return false;
1785 }
1786 EXPORT_SYMBOL_GPL(clk_has_parent);
1787
1788 static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1789 {
1790 int ret = 0;
1791 int p_index = 0;
1792 unsigned long p_rate = 0;
1793
1794 if (!core)
1795 return 0;
1796
1797 /* prevent racing with updates to the clock topology */
1798 clk_prepare_lock();
1799
1800 if (core->parent == parent)
1801 goto out;
1802
1803 /* verify ops for for multi-parent clks */
1804 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1805 ret = -ENOSYS;
1806 goto out;
1807 }
1808
1809 /* check that we are allowed to re-parent if the clock is in use */
1810 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1811 ret = -EBUSY;
1812 goto out;
1813 }
1814
1815 /* try finding the new parent index */
1816 if (parent) {
1817 p_index = clk_fetch_parent_index(core, parent);
1818 if (p_index < 0) {
1819 pr_debug("%s: clk %s can not be parent of clk %s\n",
1820 __func__, parent->name, core->name);
1821 ret = p_index;
1822 goto out;
1823 }
1824 p_rate = parent->rate;
1825 }
1826
1827 /* propagate PRE_RATE_CHANGE notifications */
1828 ret = __clk_speculate_rates(core, p_rate);
1829
1830 /* abort if a driver objects */
1831 if (ret & NOTIFY_STOP_MASK)
1832 goto out;
1833
1834 /* do the re-parent */
1835 ret = __clk_set_parent(core, parent, p_index);
1836
1837 /* propagate rate an accuracy recalculation accordingly */
1838 if (ret) {
1839 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1840 } else {
1841 __clk_recalc_rates(core, POST_RATE_CHANGE);
1842 __clk_recalc_accuracies(core);
1843 }
1844
1845 out:
1846 clk_prepare_unlock();
1847
1848 return ret;
1849 }
1850
1851 /**
1852 * clk_set_parent - switch the parent of a mux clk
1853 * @clk: the mux clk whose input we are switching
1854 * @parent: the new input to clk
1855 *
1856 * Re-parent clk to use parent as its new input source. If clk is in
1857 * prepared state, the clk will get enabled for the duration of this call. If
1858 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1859 * that, the reparenting is glitchy in hardware, etc), use the
1860 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1861 *
1862 * After successfully changing clk's parent clk_set_parent will update the
1863 * clk topology, sysfs topology and propagate rate recalculation via
1864 * __clk_recalc_rates.
1865 *
1866 * Returns 0 on success, -EERROR otherwise.
1867 */
1868 int clk_set_parent(struct clk *clk, struct clk *parent)
1869 {
1870 if (!clk)
1871 return 0;
1872
1873 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
1874 }
1875 EXPORT_SYMBOL_GPL(clk_set_parent);
1876
1877 /**
1878 * clk_set_phase - adjust the phase shift of a clock signal
1879 * @clk: clock signal source
1880 * @degrees: number of degrees the signal is shifted
1881 *
1882 * Shifts the phase of a clock signal by the specified
1883 * degrees. Returns 0 on success, -EERROR otherwise.
1884 *
1885 * This function makes no distinction about the input or reference
1886 * signal that we adjust the clock signal phase against. For example
1887 * phase locked-loop clock signal generators we may shift phase with
1888 * respect to feedback clock signal input, but for other cases the
1889 * clock phase may be shifted with respect to some other, unspecified
1890 * signal.
1891 *
1892 * Additionally the concept of phase shift does not propagate through
1893 * the clock tree hierarchy, which sets it apart from clock rates and
1894 * clock accuracy. A parent clock phase attribute does not have an
1895 * impact on the phase attribute of a child clock.
1896 */
1897 int clk_set_phase(struct clk *clk, int degrees)
1898 {
1899 int ret = -EINVAL;
1900
1901 if (!clk)
1902 return 0;
1903
1904 /* sanity check degrees */
1905 degrees %= 360;
1906 if (degrees < 0)
1907 degrees += 360;
1908
1909 clk_prepare_lock();
1910
1911 /* bail early if nothing to do */
1912 if (degrees == clk->core->phase)
1913 goto out;
1914
1915 trace_clk_set_phase(clk->core, degrees);
1916
1917 if (clk->core->ops->set_phase)
1918 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
1919
1920 trace_clk_set_phase_complete(clk->core, degrees);
1921
1922 if (!ret)
1923 clk->core->phase = degrees;
1924
1925 out:
1926 clk_prepare_unlock();
1927
1928 return ret;
1929 }
1930 EXPORT_SYMBOL_GPL(clk_set_phase);
1931
1932 static int clk_core_get_phase(struct clk_core *core)
1933 {
1934 int ret;
1935
1936 clk_prepare_lock();
1937 ret = core->phase;
1938 clk_prepare_unlock();
1939
1940 return ret;
1941 }
1942
1943 /**
1944 * clk_get_phase - return the phase shift of a clock signal
1945 * @clk: clock signal source
1946 *
1947 * Returns the phase shift of a clock node in degrees, otherwise returns
1948 * -EERROR.
1949 */
1950 int clk_get_phase(struct clk *clk)
1951 {
1952 if (!clk)
1953 return 0;
1954
1955 return clk_core_get_phase(clk->core);
1956 }
1957 EXPORT_SYMBOL_GPL(clk_get_phase);
1958
1959 /**
1960 * clk_is_match - check if two clk's point to the same hardware clock
1961 * @p: clk compared against q
1962 * @q: clk compared against p
1963 *
1964 * Returns true if the two struct clk pointers both point to the same hardware
1965 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1966 * share the same struct clk_core object.
1967 *
1968 * Returns false otherwise. Note that two NULL clks are treated as matching.
1969 */
1970 bool clk_is_match(const struct clk *p, const struct clk *q)
1971 {
1972 /* trivial case: identical struct clk's or both NULL */
1973 if (p == q)
1974 return true;
1975
1976 /* true if clk->core pointers match. Avoid dereferencing garbage */
1977 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1978 if (p->core == q->core)
1979 return true;
1980
1981 return false;
1982 }
1983 EXPORT_SYMBOL_GPL(clk_is_match);
1984
1985 /*** debugfs support ***/
1986
1987 #ifdef CONFIG_DEBUG_FS
1988 #include <linux/debugfs.h>
1989
1990 static struct dentry *rootdir;
1991 static int inited = 0;
1992 static DEFINE_MUTEX(clk_debug_lock);
1993 static HLIST_HEAD(clk_debug_list);
1994
1995 static struct hlist_head *all_lists[] = {
1996 &clk_root_list,
1997 &clk_orphan_list,
1998 NULL,
1999 };
2000
2001 static struct hlist_head *orphan_list[] = {
2002 &clk_orphan_list,
2003 NULL,
2004 };
2005
2006 static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
2007 int level)
2008 {
2009 if (!c)
2010 return;
2011
2012 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
2013 level * 3 + 1, "",
2014 30 - level * 3, c->name,
2015 c->enable_count, c->prepare_count, clk_core_get_rate(c),
2016 clk_core_get_accuracy(c), clk_core_get_phase(c));
2017 }
2018
2019 static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2020 int level)
2021 {
2022 struct clk_core *child;
2023
2024 if (!c)
2025 return;
2026
2027 clk_summary_show_one(s, c, level);
2028
2029 hlist_for_each_entry(child, &c->children, child_node)
2030 clk_summary_show_subtree(s, child, level + 1);
2031 }
2032
2033 static int clk_summary_show(struct seq_file *s, void *data)
2034 {
2035 struct clk_core *c;
2036 struct hlist_head **lists = (struct hlist_head **)s->private;
2037
2038 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
2039 seq_puts(s, "----------------------------------------------------------------------------------------\n");
2040
2041 clk_prepare_lock();
2042
2043 for (; *lists; lists++)
2044 hlist_for_each_entry(c, *lists, child_node)
2045 clk_summary_show_subtree(s, c, 0);
2046
2047 clk_prepare_unlock();
2048
2049 return 0;
2050 }
2051
2052
2053 static int clk_summary_open(struct inode *inode, struct file *file)
2054 {
2055 return single_open(file, clk_summary_show, inode->i_private);
2056 }
2057
2058 static const struct file_operations clk_summary_fops = {
2059 .open = clk_summary_open,
2060 .read = seq_read,
2061 .llseek = seq_lseek,
2062 .release = single_release,
2063 };
2064
2065 static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2066 {
2067 if (!c)
2068 return;
2069
2070 /* This should be JSON format, i.e. elements separated with a comma */
2071 seq_printf(s, "\"%s\": { ", c->name);
2072 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2073 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
2074 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2075 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
2076 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
2077 }
2078
2079 static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
2080 {
2081 struct clk_core *child;
2082
2083 if (!c)
2084 return;
2085
2086 clk_dump_one(s, c, level);
2087
2088 hlist_for_each_entry(child, &c->children, child_node) {
2089 seq_printf(s, ",");
2090 clk_dump_subtree(s, child, level + 1);
2091 }
2092
2093 seq_printf(s, "}");
2094 }
2095
2096 static int clk_dump(struct seq_file *s, void *data)
2097 {
2098 struct clk_core *c;
2099 bool first_node = true;
2100 struct hlist_head **lists = (struct hlist_head **)s->private;
2101
2102 seq_printf(s, "{");
2103
2104 clk_prepare_lock();
2105
2106 for (; *lists; lists++) {
2107 hlist_for_each_entry(c, *lists, child_node) {
2108 if (!first_node)
2109 seq_puts(s, ",");
2110 first_node = false;
2111 clk_dump_subtree(s, c, 0);
2112 }
2113 }
2114
2115 clk_prepare_unlock();
2116
2117 seq_puts(s, "}\n");
2118 return 0;
2119 }
2120
2121
2122 static int clk_dump_open(struct inode *inode, struct file *file)
2123 {
2124 return single_open(file, clk_dump, inode->i_private);
2125 }
2126
2127 static const struct file_operations clk_dump_fops = {
2128 .open = clk_dump_open,
2129 .read = seq_read,
2130 .llseek = seq_lseek,
2131 .release = single_release,
2132 };
2133
2134 static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2135 {
2136 struct dentry *d;
2137 int ret = -ENOMEM;
2138
2139 if (!core || !pdentry) {
2140 ret = -EINVAL;
2141 goto out;
2142 }
2143
2144 d = debugfs_create_dir(core->name, pdentry);
2145 if (!d)
2146 goto out;
2147
2148 core->dentry = d;
2149
2150 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2151 (u32 *)&core->rate);
2152 if (!d)
2153 goto err_out;
2154
2155 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2156 (u32 *)&core->accuracy);
2157 if (!d)
2158 goto err_out;
2159
2160 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2161 (u32 *)&core->phase);
2162 if (!d)
2163 goto err_out;
2164
2165 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2166 (u32 *)&core->flags);
2167 if (!d)
2168 goto err_out;
2169
2170 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2171 (u32 *)&core->prepare_count);
2172 if (!d)
2173 goto err_out;
2174
2175 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2176 (u32 *)&core->enable_count);
2177 if (!d)
2178 goto err_out;
2179
2180 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2181 (u32 *)&core->notifier_count);
2182 if (!d)
2183 goto err_out;
2184
2185 if (core->ops->debug_init) {
2186 ret = core->ops->debug_init(core->hw, core->dentry);
2187 if (ret)
2188 goto err_out;
2189 }
2190
2191 ret = 0;
2192 goto out;
2193
2194 err_out:
2195 debugfs_remove_recursive(core->dentry);
2196 core->dentry = NULL;
2197 out:
2198 return ret;
2199 }
2200
2201 /**
2202 * clk_debug_register - add a clk node to the debugfs clk directory
2203 * @core: the clk being added to the debugfs clk directory
2204 *
2205 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2206 * initialized. Otherwise it bails out early since the debugfs clk directory
2207 * will be created lazily by clk_debug_init as part of a late_initcall.
2208 */
2209 static int clk_debug_register(struct clk_core *core)
2210 {
2211 int ret = 0;
2212
2213 mutex_lock(&clk_debug_lock);
2214 hlist_add_head(&core->debug_node, &clk_debug_list);
2215
2216 if (!inited)
2217 goto unlock;
2218
2219 ret = clk_debug_create_one(core, rootdir);
2220 unlock:
2221 mutex_unlock(&clk_debug_lock);
2222
2223 return ret;
2224 }
2225
2226 /**
2227 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2228 * @core: the clk being removed from the debugfs clk directory
2229 *
2230 * Dynamically removes a clk and all its child nodes from the
2231 * debugfs clk directory if clk->dentry points to debugfs created by
2232 * clk_debug_register in __clk_core_init.
2233 */
2234 static void clk_debug_unregister(struct clk_core *core)
2235 {
2236 mutex_lock(&clk_debug_lock);
2237 hlist_del_init(&core->debug_node);
2238 debugfs_remove_recursive(core->dentry);
2239 core->dentry = NULL;
2240 mutex_unlock(&clk_debug_lock);
2241 }
2242
2243 struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2244 void *data, const struct file_operations *fops)
2245 {
2246 struct dentry *d = NULL;
2247
2248 if (hw->core->dentry)
2249 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2250 fops);
2251
2252 return d;
2253 }
2254 EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
2255
2256 /**
2257 * clk_debug_init - lazily populate the debugfs clk directory
2258 *
2259 * clks are often initialized very early during boot before memory can be
2260 * dynamically allocated and well before debugfs is setup. This function
2261 * populates the debugfs clk directory once at boot-time when we know that
2262 * debugfs is setup. It should only be called once at boot-time, all other clks
2263 * added dynamically will be done so with clk_debug_register.
2264 */
2265 static int __init clk_debug_init(void)
2266 {
2267 struct clk_core *core;
2268 struct dentry *d;
2269
2270 rootdir = debugfs_create_dir("clk", NULL);
2271
2272 if (!rootdir)
2273 return -ENOMEM;
2274
2275 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2276 &clk_summary_fops);
2277 if (!d)
2278 return -ENOMEM;
2279
2280 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2281 &clk_dump_fops);
2282 if (!d)
2283 return -ENOMEM;
2284
2285 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2286 &orphan_list, &clk_summary_fops);
2287 if (!d)
2288 return -ENOMEM;
2289
2290 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2291 &orphan_list, &clk_dump_fops);
2292 if (!d)
2293 return -ENOMEM;
2294
2295 mutex_lock(&clk_debug_lock);
2296 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2297 clk_debug_create_one(core, rootdir);
2298
2299 inited = 1;
2300 mutex_unlock(&clk_debug_lock);
2301
2302 return 0;
2303 }
2304 late_initcall(clk_debug_init);
2305 #else
2306 static inline int clk_debug_register(struct clk_core *core) { return 0; }
2307 static inline void clk_debug_reparent(struct clk_core *core,
2308 struct clk_core *new_parent)
2309 {
2310 }
2311 static inline void clk_debug_unregister(struct clk_core *core)
2312 {
2313 }
2314 #endif
2315
2316 /**
2317 * __clk_core_init - initialize the data structures in a struct clk_core
2318 * @core: clk_core being initialized
2319 *
2320 * Initializes the lists in struct clk_core, queries the hardware for the
2321 * parent and rate and sets them both.
2322 */
2323 static int __clk_core_init(struct clk_core *core)
2324 {
2325 int i, ret = 0;
2326 struct clk_core *orphan;
2327 struct hlist_node *tmp2;
2328 unsigned long rate;
2329
2330 if (!core)
2331 return -EINVAL;
2332
2333 clk_prepare_lock();
2334
2335 /* check to see if a clock with this name is already registered */
2336 if (clk_core_lookup(core->name)) {
2337 pr_debug("%s: clk %s already initialized\n",
2338 __func__, core->name);
2339 ret = -EEXIST;
2340 goto out;
2341 }
2342
2343 /* check that clk_ops are sane. See Documentation/clk.txt */
2344 if (core->ops->set_rate &&
2345 !((core->ops->round_rate || core->ops->determine_rate) &&
2346 core->ops->recalc_rate)) {
2347 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
2348 __func__, core->name);
2349 ret = -EINVAL;
2350 goto out;
2351 }
2352
2353 if (core->ops->set_parent && !core->ops->get_parent) {
2354 pr_err("%s: %s must implement .get_parent & .set_parent\n",
2355 __func__, core->name);
2356 ret = -EINVAL;
2357 goto out;
2358 }
2359
2360 if (core->num_parents > 1 && !core->ops->get_parent) {
2361 pr_err("%s: %s must implement .get_parent as it has multi parents\n",
2362 __func__, core->name);
2363 ret = -EINVAL;
2364 goto out;
2365 }
2366
2367 if (core->ops->set_rate_and_parent &&
2368 !(core->ops->set_parent && core->ops->set_rate)) {
2369 pr_err("%s: %s must implement .set_parent & .set_rate\n",
2370 __func__, core->name);
2371 ret = -EINVAL;
2372 goto out;
2373 }
2374
2375 /* throw a WARN if any entries in parent_names are NULL */
2376 for (i = 0; i < core->num_parents; i++)
2377 WARN(!core->parent_names[i],
2378 "%s: invalid NULL in %s's .parent_names\n",
2379 __func__, core->name);
2380
2381 core->parent = __clk_init_parent(core);
2382
2383 /*
2384 * Populate core->parent if parent has already been clk_core_init'd. If
2385 * parent has not yet been clk_core_init'd then place clk in the orphan
2386 * list. If clk doesn't have any parents then place it in the root
2387 * clk list.
2388 *
2389 * Every time a new clk is clk_init'd then we walk the list of orphan
2390 * clocks and re-parent any that are children of the clock currently
2391 * being clk_init'd.
2392 */
2393 if (core->parent) {
2394 hlist_add_head(&core->child_node,
2395 &core->parent->children);
2396 core->orphan = core->parent->orphan;
2397 } else if (!core->num_parents) {
2398 hlist_add_head(&core->child_node, &clk_root_list);
2399 core->orphan = false;
2400 } else {
2401 hlist_add_head(&core->child_node, &clk_orphan_list);
2402 core->orphan = true;
2403 }
2404
2405 /*
2406 * Set clk's accuracy. The preferred method is to use
2407 * .recalc_accuracy. For simple clocks and lazy developers the default
2408 * fallback is to use the parent's accuracy. If a clock doesn't have a
2409 * parent (or is orphaned) then accuracy is set to zero (perfect
2410 * clock).
2411 */
2412 if (core->ops->recalc_accuracy)
2413 core->accuracy = core->ops->recalc_accuracy(core->hw,
2414 __clk_get_accuracy(core->parent));
2415 else if (core->parent)
2416 core->accuracy = core->parent->accuracy;
2417 else
2418 core->accuracy = 0;
2419
2420 /*
2421 * Set clk's phase.
2422 * Since a phase is by definition relative to its parent, just
2423 * query the current clock phase, or just assume it's in phase.
2424 */
2425 if (core->ops->get_phase)
2426 core->phase = core->ops->get_phase(core->hw);
2427 else
2428 core->phase = 0;
2429
2430 /*
2431 * Set clk's rate. The preferred method is to use .recalc_rate. For
2432 * simple clocks and lazy developers the default fallback is to use the
2433 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2434 * then rate is set to zero.
2435 */
2436 if (core->ops->recalc_rate)
2437 rate = core->ops->recalc_rate(core->hw,
2438 clk_core_get_rate_nolock(core->parent));
2439 else if (core->parent)
2440 rate = core->parent->rate;
2441 else
2442 rate = 0;
2443 core->rate = core->req_rate = rate;
2444
2445 /*
2446 * walk the list of orphan clocks and reparent any that newly finds a
2447 * parent.
2448 */
2449 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
2450 struct clk_core *parent = __clk_init_parent(orphan);
2451
2452 if (parent)
2453 clk_core_reparent(orphan, parent);
2454 }
2455
2456 /*
2457 * optional platform-specific magic
2458 *
2459 * The .init callback is not used by any of the basic clock types, but
2460 * exists for weird hardware that must perform initialization magic.
2461 * Please consider other ways of solving initialization problems before
2462 * using this callback, as its use is discouraged.
2463 */
2464 if (core->ops->init)
2465 core->ops->init(core->hw);
2466
2467 if (core->flags & CLK_IS_CRITICAL) {
2468 unsigned long flags;
2469
2470 clk_core_prepare(core);
2471
2472 flags = clk_enable_lock();
2473 clk_core_enable(core);
2474 clk_enable_unlock(flags);
2475 }
2476
2477 kref_init(&core->ref);
2478 out:
2479 clk_prepare_unlock();
2480
2481 if (!ret)
2482 clk_debug_register(core);
2483
2484 return ret;
2485 }
2486
2487 struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2488 const char *con_id)
2489 {
2490 struct clk *clk;
2491
2492 /* This is to allow this function to be chained to others */
2493 if (IS_ERR_OR_NULL(hw))
2494 return (struct clk *) hw;
2495
2496 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2497 if (!clk)
2498 return ERR_PTR(-ENOMEM);
2499
2500 clk->core = hw->core;
2501 clk->dev_id = dev_id;
2502 clk->con_id = con_id;
2503 clk->max_rate = ULONG_MAX;
2504
2505 clk_prepare_lock();
2506 hlist_add_head(&clk->clks_node, &hw->core->clks);
2507 clk_prepare_unlock();
2508
2509 return clk;
2510 }
2511
2512 void __clk_free_clk(struct clk *clk)
2513 {
2514 clk_prepare_lock();
2515 hlist_del(&clk->clks_node);
2516 clk_prepare_unlock();
2517
2518 kfree(clk);
2519 }
2520
2521 /**
2522 * clk_register - allocate a new clock, register it and return an opaque cookie
2523 * @dev: device that is registering this clock
2524 * @hw: link to hardware-specific clock data
2525 *
2526 * clk_register is the primary interface for populating the clock tree with new
2527 * clock nodes. It returns a pointer to the newly allocated struct clk which
2528 * cannot be dereferenced by driver code but may be used in conjunction with the
2529 * rest of the clock API. In the event of an error clk_register will return an
2530 * error code; drivers must test for an error code after calling clk_register.
2531 */
2532 struct clk *clk_register(struct device *dev, struct clk_hw *hw)
2533 {
2534 int i, ret;
2535 struct clk_core *core;
2536
2537 core = kzalloc(sizeof(*core), GFP_KERNEL);
2538 if (!core) {
2539 ret = -ENOMEM;
2540 goto fail_out;
2541 }
2542
2543 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2544 if (!core->name) {
2545 ret = -ENOMEM;
2546 goto fail_name;
2547 }
2548 core->ops = hw->init->ops;
2549 if (dev && dev->driver)
2550 core->owner = dev->driver->owner;
2551 core->hw = hw;
2552 core->flags = hw->init->flags;
2553 core->num_parents = hw->init->num_parents;
2554 core->min_rate = 0;
2555 core->max_rate = ULONG_MAX;
2556 hw->core = core;
2557
2558 /* allocate local copy in case parent_names is __initdata */
2559 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
2560 GFP_KERNEL);
2561
2562 if (!core->parent_names) {
2563 ret = -ENOMEM;
2564 goto fail_parent_names;
2565 }
2566
2567
2568 /* copy each string name in case parent_names is __initdata */
2569 for (i = 0; i < core->num_parents; i++) {
2570 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
2571 GFP_KERNEL);
2572 if (!core->parent_names[i]) {
2573 ret = -ENOMEM;
2574 goto fail_parent_names_copy;
2575 }
2576 }
2577
2578 /* avoid unnecessary string look-ups of clk_core's possible parents. */
2579 core->parents = kcalloc(core->num_parents, sizeof(*core->parents),
2580 GFP_KERNEL);
2581 if (!core->parents) {
2582 ret = -ENOMEM;
2583 goto fail_parents;
2584 };
2585
2586 INIT_HLIST_HEAD(&core->clks);
2587
2588 hw->clk = __clk_create_clk(hw, NULL, NULL);
2589 if (IS_ERR(hw->clk)) {
2590 ret = PTR_ERR(hw->clk);
2591 goto fail_parents;
2592 }
2593
2594 ret = __clk_core_init(core);
2595 if (!ret)
2596 return hw->clk;
2597
2598 __clk_free_clk(hw->clk);
2599 hw->clk = NULL;
2600
2601 fail_parents:
2602 kfree(core->parents);
2603 fail_parent_names_copy:
2604 while (--i >= 0)
2605 kfree_const(core->parent_names[i]);
2606 kfree(core->parent_names);
2607 fail_parent_names:
2608 kfree_const(core->name);
2609 fail_name:
2610 kfree(core);
2611 fail_out:
2612 return ERR_PTR(ret);
2613 }
2614 EXPORT_SYMBOL_GPL(clk_register);
2615
2616 /**
2617 * clk_hw_register - register a clk_hw and return an error code
2618 * @dev: device that is registering this clock
2619 * @hw: link to hardware-specific clock data
2620 *
2621 * clk_hw_register is the primary interface for populating the clock tree with
2622 * new clock nodes. It returns an integer equal to zero indicating success or
2623 * less than zero indicating failure. Drivers must test for an error code after
2624 * calling clk_hw_register().
2625 */
2626 int clk_hw_register(struct device *dev, struct clk_hw *hw)
2627 {
2628 return PTR_ERR_OR_ZERO(clk_register(dev, hw));
2629 }
2630 EXPORT_SYMBOL_GPL(clk_hw_register);
2631
2632 /* Free memory allocated for a clock. */
2633 static void __clk_release(struct kref *ref)
2634 {
2635 struct clk_core *core = container_of(ref, struct clk_core, ref);
2636 int i = core->num_parents;
2637
2638 lockdep_assert_held(&prepare_lock);
2639
2640 kfree(core->parents);
2641 while (--i >= 0)
2642 kfree_const(core->parent_names[i]);
2643
2644 kfree(core->parent_names);
2645 kfree_const(core->name);
2646 kfree(core);
2647 }
2648
2649 /*
2650 * Empty clk_ops for unregistered clocks. These are used temporarily
2651 * after clk_unregister() was called on a clock and until last clock
2652 * consumer calls clk_put() and the struct clk object is freed.
2653 */
2654 static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2655 {
2656 return -ENXIO;
2657 }
2658
2659 static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2660 {
2661 WARN_ON_ONCE(1);
2662 }
2663
2664 static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2665 unsigned long parent_rate)
2666 {
2667 return -ENXIO;
2668 }
2669
2670 static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2671 {
2672 return -ENXIO;
2673 }
2674
2675 static const struct clk_ops clk_nodrv_ops = {
2676 .enable = clk_nodrv_prepare_enable,
2677 .disable = clk_nodrv_disable_unprepare,
2678 .prepare = clk_nodrv_prepare_enable,
2679 .unprepare = clk_nodrv_disable_unprepare,
2680 .set_rate = clk_nodrv_set_rate,
2681 .set_parent = clk_nodrv_set_parent,
2682 };
2683
2684 /**
2685 * clk_unregister - unregister a currently registered clock
2686 * @clk: clock to unregister
2687 */
2688 void clk_unregister(struct clk *clk)
2689 {
2690 unsigned long flags;
2691
2692 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2693 return;
2694
2695 clk_debug_unregister(clk->core);
2696
2697 clk_prepare_lock();
2698
2699 if (clk->core->ops == &clk_nodrv_ops) {
2700 pr_err("%s: unregistered clock: %s\n", __func__,
2701 clk->core->name);
2702 goto unlock;
2703 }
2704 /*
2705 * Assign empty clock ops for consumers that might still hold
2706 * a reference to this clock.
2707 */
2708 flags = clk_enable_lock();
2709 clk->core->ops = &clk_nodrv_ops;
2710 clk_enable_unlock(flags);
2711
2712 if (!hlist_empty(&clk->core->children)) {
2713 struct clk_core *child;
2714 struct hlist_node *t;
2715
2716 /* Reparent all children to the orphan list. */
2717 hlist_for_each_entry_safe(child, t, &clk->core->children,
2718 child_node)
2719 clk_core_set_parent(child, NULL);
2720 }
2721
2722 hlist_del_init(&clk->core->child_node);
2723
2724 if (clk->core->prepare_count)
2725 pr_warn("%s: unregistering prepared clock: %s\n",
2726 __func__, clk->core->name);
2727 kref_put(&clk->core->ref, __clk_release);
2728 unlock:
2729 clk_prepare_unlock();
2730 }
2731 EXPORT_SYMBOL_GPL(clk_unregister);
2732
2733 /**
2734 * clk_hw_unregister - unregister a currently registered clk_hw
2735 * @hw: hardware-specific clock data to unregister
2736 */
2737 void clk_hw_unregister(struct clk_hw *hw)
2738 {
2739 clk_unregister(hw->clk);
2740 }
2741 EXPORT_SYMBOL_GPL(clk_hw_unregister);
2742
2743 static void devm_clk_release(struct device *dev, void *res)
2744 {
2745 clk_unregister(*(struct clk **)res);
2746 }
2747
2748 static void devm_clk_hw_release(struct device *dev, void *res)
2749 {
2750 clk_hw_unregister(*(struct clk_hw **)res);
2751 }
2752
2753 /**
2754 * devm_clk_register - resource managed clk_register()
2755 * @dev: device that is registering this clock
2756 * @hw: link to hardware-specific clock data
2757 *
2758 * Managed clk_register(). Clocks returned from this function are
2759 * automatically clk_unregister()ed on driver detach. See clk_register() for
2760 * more information.
2761 */
2762 struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2763 {
2764 struct clk *clk;
2765 struct clk **clkp;
2766
2767 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2768 if (!clkp)
2769 return ERR_PTR(-ENOMEM);
2770
2771 clk = clk_register(dev, hw);
2772 if (!IS_ERR(clk)) {
2773 *clkp = clk;
2774 devres_add(dev, clkp);
2775 } else {
2776 devres_free(clkp);
2777 }
2778
2779 return clk;
2780 }
2781 EXPORT_SYMBOL_GPL(devm_clk_register);
2782
2783 /**
2784 * devm_clk_hw_register - resource managed clk_hw_register()
2785 * @dev: device that is registering this clock
2786 * @hw: link to hardware-specific clock data
2787 *
2788 * Managed clk_hw_register(). Clocks registered by this function are
2789 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
2790 * for more information.
2791 */
2792 int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
2793 {
2794 struct clk_hw **hwp;
2795 int ret;
2796
2797 hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL);
2798 if (!hwp)
2799 return -ENOMEM;
2800
2801 ret = clk_hw_register(dev, hw);
2802 if (!ret) {
2803 *hwp = hw;
2804 devres_add(dev, hwp);
2805 } else {
2806 devres_free(hwp);
2807 }
2808
2809 return ret;
2810 }
2811 EXPORT_SYMBOL_GPL(devm_clk_hw_register);
2812
2813 static int devm_clk_match(struct device *dev, void *res, void *data)
2814 {
2815 struct clk *c = res;
2816 if (WARN_ON(!c))
2817 return 0;
2818 return c == data;
2819 }
2820
2821 static int devm_clk_hw_match(struct device *dev, void *res, void *data)
2822 {
2823 struct clk_hw *hw = res;
2824
2825 if (WARN_ON(!hw))
2826 return 0;
2827 return hw == data;
2828 }
2829
2830 /**
2831 * devm_clk_unregister - resource managed clk_unregister()
2832 * @clk: clock to unregister
2833 *
2834 * Deallocate a clock allocated with devm_clk_register(). Normally
2835 * this function will not need to be called and the resource management
2836 * code will ensure that the resource is freed.
2837 */
2838 void devm_clk_unregister(struct device *dev, struct clk *clk)
2839 {
2840 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2841 }
2842 EXPORT_SYMBOL_GPL(devm_clk_unregister);
2843
2844 /**
2845 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
2846 * @dev: device that is unregistering the hardware-specific clock data
2847 * @hw: link to hardware-specific clock data
2848 *
2849 * Unregister a clk_hw registered with devm_clk_hw_register(). Normally
2850 * this function will not need to be called and the resource management
2851 * code will ensure that the resource is freed.
2852 */
2853 void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
2854 {
2855 WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match,
2856 hw));
2857 }
2858 EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
2859
2860 /*
2861 * clkdev helpers
2862 */
2863 int __clk_get(struct clk *clk)
2864 {
2865 struct clk_core *core = !clk ? NULL : clk->core;
2866
2867 if (core) {
2868 if (!try_module_get(core->owner))
2869 return 0;
2870
2871 kref_get(&core->ref);
2872 }
2873 return 1;
2874 }
2875
2876 void __clk_put(struct clk *clk)
2877 {
2878 struct module *owner;
2879
2880 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2881 return;
2882
2883 clk_prepare_lock();
2884
2885 hlist_del(&clk->clks_node);
2886 if (clk->min_rate > clk->core->req_rate ||
2887 clk->max_rate < clk->core->req_rate)
2888 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2889
2890 owner = clk->core->owner;
2891 kref_put(&clk->core->ref, __clk_release);
2892
2893 clk_prepare_unlock();
2894
2895 module_put(owner);
2896
2897 kfree(clk);
2898 }
2899
2900 /*** clk rate change notifiers ***/
2901
2902 /**
2903 * clk_notifier_register - add a clk rate change notifier
2904 * @clk: struct clk * to watch
2905 * @nb: struct notifier_block * with callback info
2906 *
2907 * Request notification when clk's rate changes. This uses an SRCU
2908 * notifier because we want it to block and notifier unregistrations are
2909 * uncommon. The callbacks associated with the notifier must not
2910 * re-enter into the clk framework by calling any top-level clk APIs;
2911 * this will cause a nested prepare_lock mutex.
2912 *
2913 * In all notification cases (pre, post and abort rate change) the original
2914 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
2915 * and the new frequency is passed via struct clk_notifier_data.new_rate.
2916 *
2917 * clk_notifier_register() must be called from non-atomic context.
2918 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2919 * allocation failure; otherwise, passes along the return value of
2920 * srcu_notifier_chain_register().
2921 */
2922 int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2923 {
2924 struct clk_notifier *cn;
2925 int ret = -ENOMEM;
2926
2927 if (!clk || !nb)
2928 return -EINVAL;
2929
2930 clk_prepare_lock();
2931
2932 /* search the list of notifiers for this clk */
2933 list_for_each_entry(cn, &clk_notifier_list, node)
2934 if (cn->clk == clk)
2935 break;
2936
2937 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2938 if (cn->clk != clk) {
2939 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2940 if (!cn)
2941 goto out;
2942
2943 cn->clk = clk;
2944 srcu_init_notifier_head(&cn->notifier_head);
2945
2946 list_add(&cn->node, &clk_notifier_list);
2947 }
2948
2949 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2950
2951 clk->core->notifier_count++;
2952
2953 out:
2954 clk_prepare_unlock();
2955
2956 return ret;
2957 }
2958 EXPORT_SYMBOL_GPL(clk_notifier_register);
2959
2960 /**
2961 * clk_notifier_unregister - remove a clk rate change notifier
2962 * @clk: struct clk *
2963 * @nb: struct notifier_block * with callback info
2964 *
2965 * Request no further notification for changes to 'clk' and frees memory
2966 * allocated in clk_notifier_register.
2967 *
2968 * Returns -EINVAL if called with null arguments; otherwise, passes
2969 * along the return value of srcu_notifier_chain_unregister().
2970 */
2971 int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2972 {
2973 struct clk_notifier *cn = NULL;
2974 int ret = -EINVAL;
2975
2976 if (!clk || !nb)
2977 return -EINVAL;
2978
2979 clk_prepare_lock();
2980
2981 list_for_each_entry(cn, &clk_notifier_list, node)
2982 if (cn->clk == clk)
2983 break;
2984
2985 if (cn->clk == clk) {
2986 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2987
2988 clk->core->notifier_count--;
2989
2990 /* XXX the notifier code should handle this better */
2991 if (!cn->notifier_head.head) {
2992 srcu_cleanup_notifier_head(&cn->notifier_head);
2993 list_del(&cn->node);
2994 kfree(cn);
2995 }
2996
2997 } else {
2998 ret = -ENOENT;
2999 }
3000
3001 clk_prepare_unlock();
3002
3003 return ret;
3004 }
3005 EXPORT_SYMBOL_GPL(clk_notifier_unregister);
3006
3007 #ifdef CONFIG_OF
3008 /**
3009 * struct of_clk_provider - Clock provider registration structure
3010 * @link: Entry in global list of clock providers
3011 * @node: Pointer to device tree node of clock provider
3012 * @get: Get clock callback. Returns NULL or a struct clk for the
3013 * given clock specifier
3014 * @data: context pointer to be passed into @get callback
3015 */
3016 struct of_clk_provider {
3017 struct list_head link;
3018
3019 struct device_node *node;
3020 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
3021 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
3022 void *data;
3023 };
3024
3025 static const struct of_device_id __clk_of_table_sentinel
3026 __used __section(__clk_of_table_end);
3027
3028 static LIST_HEAD(of_clk_providers);
3029 static DEFINE_MUTEX(of_clk_mutex);
3030
3031 struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
3032 void *data)
3033 {
3034 return data;
3035 }
3036 EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
3037
3038 struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
3039 {
3040 return data;
3041 }
3042 EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
3043
3044 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
3045 {
3046 struct clk_onecell_data *clk_data = data;
3047 unsigned int idx = clkspec->args[0];
3048
3049 if (idx >= clk_data->clk_num) {
3050 pr_err("%s: invalid clock index %u\n", __func__, idx);
3051 return ERR_PTR(-EINVAL);
3052 }
3053
3054 return clk_data->clks[idx];
3055 }
3056 EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
3057
3058 struct clk_hw *
3059 of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
3060 {
3061 struct clk_hw_onecell_data *hw_data = data;
3062 unsigned int idx = clkspec->args[0];
3063
3064 if (idx >= hw_data->num) {
3065 pr_err("%s: invalid index %u\n", __func__, idx);
3066 return ERR_PTR(-EINVAL);
3067 }
3068
3069 return hw_data->hws[idx];
3070 }
3071 EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
3072
3073 /**
3074 * of_clk_add_provider() - Register a clock provider for a node
3075 * @np: Device node pointer associated with clock provider
3076 * @clk_src_get: callback for decoding clock
3077 * @data: context pointer for @clk_src_get callback.
3078 */
3079 int of_clk_add_provider(struct device_node *np,
3080 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
3081 void *data),
3082 void *data)
3083 {
3084 struct of_clk_provider *cp;
3085 int ret;
3086
3087 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
3088 if (!cp)
3089 return -ENOMEM;
3090
3091 cp->node = of_node_get(np);
3092 cp->data = data;
3093 cp->get = clk_src_get;
3094
3095 mutex_lock(&of_clk_mutex);
3096 list_add(&cp->link, &of_clk_providers);
3097 mutex_unlock(&of_clk_mutex);
3098 pr_debug("Added clock from %s\n", np->full_name);
3099
3100 ret = of_clk_set_defaults(np, true);
3101 if (ret < 0)
3102 of_clk_del_provider(np);
3103
3104 return ret;
3105 }
3106 EXPORT_SYMBOL_GPL(of_clk_add_provider);
3107
3108 /**
3109 * of_clk_add_hw_provider() - Register a clock provider for a node
3110 * @np: Device node pointer associated with clock provider
3111 * @get: callback for decoding clk_hw
3112 * @data: context pointer for @get callback.
3113 */
3114 int of_clk_add_hw_provider(struct device_node *np,
3115 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
3116 void *data),
3117 void *data)
3118 {
3119 struct of_clk_provider *cp;
3120 int ret;
3121
3122 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
3123 if (!cp)
3124 return -ENOMEM;
3125
3126 cp->node = of_node_get(np);
3127 cp->data = data;
3128 cp->get_hw = get;
3129
3130 mutex_lock(&of_clk_mutex);
3131 list_add(&cp->link, &of_clk_providers);
3132 mutex_unlock(&of_clk_mutex);
3133 pr_debug("Added clk_hw provider from %s\n", np->full_name);
3134
3135 ret = of_clk_set_defaults(np, true);
3136 if (ret < 0)
3137 of_clk_del_provider(np);
3138
3139 return ret;
3140 }
3141 EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
3142
3143 /**
3144 * of_clk_del_provider() - Remove a previously registered clock provider
3145 * @np: Device node pointer associated with clock provider
3146 */
3147 void of_clk_del_provider(struct device_node *np)
3148 {
3149 struct of_clk_provider *cp;
3150
3151 mutex_lock(&of_clk_mutex);
3152 list_for_each_entry(cp, &of_clk_providers, link) {
3153 if (cp->node == np) {
3154 list_del(&cp->link);
3155 of_node_put(cp->node);
3156 kfree(cp);
3157 break;
3158 }
3159 }
3160 mutex_unlock(&of_clk_mutex);
3161 }
3162 EXPORT_SYMBOL_GPL(of_clk_del_provider);
3163
3164 static struct clk_hw *
3165 __of_clk_get_hw_from_provider(struct of_clk_provider *provider,
3166 struct of_phandle_args *clkspec)
3167 {
3168 struct clk *clk;
3169 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
3170
3171 if (provider->get_hw) {
3172 hw = provider->get_hw(clkspec, provider->data);
3173 } else if (provider->get) {
3174 clk = provider->get(clkspec, provider->data);
3175 if (!IS_ERR(clk))
3176 hw = __clk_get_hw(clk);
3177 else
3178 hw = ERR_CAST(clk);
3179 }
3180
3181 return hw;
3182 }
3183
3184 struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3185 const char *dev_id, const char *con_id)
3186 {
3187 struct of_clk_provider *provider;
3188 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
3189 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
3190
3191 if (!clkspec)
3192 return ERR_PTR(-EINVAL);
3193
3194 /* Check if we have such a provider in our array */
3195 mutex_lock(&of_clk_mutex);
3196 list_for_each_entry(provider, &of_clk_providers, link) {
3197 if (provider->node == clkspec->np)
3198 hw = __of_clk_get_hw_from_provider(provider, clkspec);
3199 if (!IS_ERR(hw)) {
3200 clk = __clk_create_clk(hw, dev_id, con_id);
3201
3202 if (!IS_ERR(clk) && !__clk_get(clk)) {
3203 __clk_free_clk(clk);
3204 clk = ERR_PTR(-ENOENT);
3205 }
3206
3207 break;
3208 }
3209 }
3210 mutex_unlock(&of_clk_mutex);
3211
3212 return clk;
3213 }
3214
3215 /**
3216 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3217 * @clkspec: pointer to a clock specifier data structure
3218 *
3219 * This function looks up a struct clk from the registered list of clock
3220 * providers, an input is a clock specifier data structure as returned
3221 * from the of_parse_phandle_with_args() function call.
3222 */
3223 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
3224 {
3225 return __of_clk_get_from_provider(clkspec, NULL, __func__);
3226 }
3227 EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
3228
3229 /**
3230 * of_clk_get_parent_count() - Count the number of clocks a device node has
3231 * @np: device node to count
3232 *
3233 * Returns: The number of clocks that are possible parents of this node
3234 */
3235 unsigned int of_clk_get_parent_count(struct device_node *np)
3236 {
3237 int count;
3238
3239 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
3240 if (count < 0)
3241 return 0;
3242
3243 return count;
3244 }
3245 EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
3246
3247 const char *of_clk_get_parent_name(struct device_node *np, int index)
3248 {
3249 struct of_phandle_args clkspec;
3250 struct property *prop;
3251 const char *clk_name;
3252 const __be32 *vp;
3253 u32 pv;
3254 int rc;
3255 int count;
3256 struct clk *clk;
3257
3258 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
3259 &clkspec);
3260 if (rc)
3261 return NULL;
3262
3263 index = clkspec.args_count ? clkspec.args[0] : 0;
3264 count = 0;
3265
3266 /* if there is an indices property, use it to transfer the index
3267 * specified into an array offset for the clock-output-names property.
3268 */
3269 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
3270 if (index == pv) {
3271 index = count;
3272 break;
3273 }
3274 count++;
3275 }
3276 /* We went off the end of 'clock-indices' without finding it */
3277 if (prop && !vp)
3278 return NULL;
3279
3280 if (of_property_read_string_index(clkspec.np, "clock-output-names",
3281 index,
3282 &clk_name) < 0) {
3283 /*
3284 * Best effort to get the name if the clock has been
3285 * registered with the framework. If the clock isn't
3286 * registered, we return the node name as the name of
3287 * the clock as long as #clock-cells = 0.
3288 */
3289 clk = of_clk_get_from_provider(&clkspec);
3290 if (IS_ERR(clk)) {
3291 if (clkspec.args_count == 0)
3292 clk_name = clkspec.np->name;
3293 else
3294 clk_name = NULL;
3295 } else {
3296 clk_name = __clk_get_name(clk);
3297 clk_put(clk);
3298 }
3299 }
3300
3301
3302 of_node_put(clkspec.np);
3303 return clk_name;
3304 }
3305 EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3306
3307 /**
3308 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
3309 * number of parents
3310 * @np: Device node pointer associated with clock provider
3311 * @parents: pointer to char array that hold the parents' names
3312 * @size: size of the @parents array
3313 *
3314 * Return: number of parents for the clock node.
3315 */
3316 int of_clk_parent_fill(struct device_node *np, const char **parents,
3317 unsigned int size)
3318 {
3319 unsigned int i = 0;
3320
3321 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
3322 i++;
3323
3324 return i;
3325 }
3326 EXPORT_SYMBOL_GPL(of_clk_parent_fill);
3327
3328 struct clock_provider {
3329 of_clk_init_cb_t clk_init_cb;
3330 struct device_node *np;
3331 struct list_head node;
3332 };
3333
3334 /*
3335 * This function looks for a parent clock. If there is one, then it
3336 * checks that the provider for this parent clock was initialized, in
3337 * this case the parent clock will be ready.
3338 */
3339 static int parent_ready(struct device_node *np)
3340 {
3341 int i = 0;
3342
3343 while (true) {
3344 struct clk *clk = of_clk_get(np, i);
3345
3346 /* this parent is ready we can check the next one */
3347 if (!IS_ERR(clk)) {
3348 clk_put(clk);
3349 i++;
3350 continue;
3351 }
3352
3353 /* at least one parent is not ready, we exit now */
3354 if (PTR_ERR(clk) == -EPROBE_DEFER)
3355 return 0;
3356
3357 /*
3358 * Here we make assumption that the device tree is
3359 * written correctly. So an error means that there is
3360 * no more parent. As we didn't exit yet, then the
3361 * previous parent are ready. If there is no clock
3362 * parent, no need to wait for them, then we can
3363 * consider their absence as being ready
3364 */
3365 return 1;
3366 }
3367 }
3368
3369 /**
3370 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
3371 * @np: Device node pointer associated with clock provider
3372 * @index: clock index
3373 * @flags: pointer to clk_core->flags
3374 *
3375 * Detects if the clock-critical property exists and, if so, sets the
3376 * corresponding CLK_IS_CRITICAL flag.
3377 *
3378 * Do not use this function. It exists only for legacy Device Tree
3379 * bindings, such as the one-clock-per-node style that are outdated.
3380 * Those bindings typically put all clock data into .dts and the Linux
3381 * driver has no clock data, thus making it impossible to set this flag
3382 * correctly from the driver. Only those drivers may call
3383 * of_clk_detect_critical from their setup functions.
3384 *
3385 * Return: error code or zero on success
3386 */
3387 int of_clk_detect_critical(struct device_node *np,
3388 int index, unsigned long *flags)
3389 {
3390 struct property *prop;
3391 const __be32 *cur;
3392 uint32_t idx;
3393
3394 if (!np || !flags)
3395 return -EINVAL;
3396
3397 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
3398 if (index == idx)
3399 *flags |= CLK_IS_CRITICAL;
3400
3401 return 0;
3402 }
3403
3404 /**
3405 * of_clk_init() - Scan and init clock providers from the DT
3406 * @matches: array of compatible values and init functions for providers.
3407 *
3408 * This function scans the device tree for matching clock providers
3409 * and calls their initialization functions. It also does it by trying
3410 * to follow the dependencies.
3411 */
3412 void __init of_clk_init(const struct of_device_id *matches)
3413 {
3414 const struct of_device_id *match;
3415 struct device_node *np;
3416 struct clock_provider *clk_provider, *next;
3417 bool is_init_done;
3418 bool force = false;
3419 LIST_HEAD(clk_provider_list);
3420
3421 if (!matches)
3422 matches = &__clk_of_table;
3423
3424 /* First prepare the list of the clocks providers */
3425 for_each_matching_node_and_match(np, matches, &match) {
3426 struct clock_provider *parent;
3427
3428 if (!of_device_is_available(np))
3429 continue;
3430
3431 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
3432 if (!parent) {
3433 list_for_each_entry_safe(clk_provider, next,
3434 &clk_provider_list, node) {
3435 list_del(&clk_provider->node);
3436 of_node_put(clk_provider->np);
3437 kfree(clk_provider);
3438 }
3439 of_node_put(np);
3440 return;
3441 }
3442
3443 parent->clk_init_cb = match->data;
3444 parent->np = of_node_get(np);
3445 list_add_tail(&parent->node, &clk_provider_list);
3446 }
3447
3448 while (!list_empty(&clk_provider_list)) {
3449 is_init_done = false;
3450 list_for_each_entry_safe(clk_provider, next,
3451 &clk_provider_list, node) {
3452 if (force || parent_ready(clk_provider->np)) {
3453
3454 clk_provider->clk_init_cb(clk_provider->np);
3455 of_clk_set_defaults(clk_provider->np, true);
3456
3457 list_del(&clk_provider->node);
3458 of_node_put(clk_provider->np);
3459 kfree(clk_provider);
3460 is_init_done = true;
3461 }
3462 }
3463
3464 /*
3465 * We didn't manage to initialize any of the
3466 * remaining providers during the last loop, so now we
3467 * initialize all the remaining ones unconditionally
3468 * in case the clock parent was not mandatory
3469 */
3470 if (!is_init_done)
3471 force = true;
3472 }
3473 }
3474 #endif
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