drivers/clk/sunxi-ng/ccu_nm.c

   1 /*
   2  * Copyright (C) 2016 Maxime Ripard
   3  * Maxime Ripard <maxime.ripard@free-electrons.com>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  */
  10
  11 #include <linux/clk-provider.h>
  12 #include <linux/rational.h>
  13
  14 #include "ccu_frac.h"
  15 #include "ccu_gate.h"
  16 #include "ccu_nm.h"
  17
  18 static void ccu_nm_disable(struct clk_hw *hw)
  19 {
  20         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  21
  22         return ccu_gate_helper_disable(&nm->common, nm->enable);
  23 }
  24
  25 static int ccu_nm_enable(struct clk_hw *hw)
  26 {
  27         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  28
  29         return ccu_gate_helper_enable(&nm->common, nm->enable);
  30 }
  31
  32 static int ccu_nm_is_enabled(struct clk_hw *hw)
  33 {
  34         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  35
  36         return ccu_gate_helper_is_enabled(&nm->common, nm->enable);
  37 }
  38
  39 static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
  40                                         unsigned long parent_rate)
  41 {
  42         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  43         unsigned long n, m;
  44         u32 reg;
  45
  46         if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac))
  47                 return ccu_frac_helper_read_rate(&nm->common, &nm->frac);
  48
  49         reg = readl(nm->common.base + nm->common.reg);
  50
  51         n = reg >> nm->n.shift;
  52         n &= (1 << nm->n.width) - 1;
  53
  54         m = reg >> nm->m.shift;
  55         m &= (1 << nm->m.width) - 1;
  56
  57         return parent_rate * (n + 1) / (m + 1);
  58 }
  59
  60 static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
  61                               unsigned long *parent_rate)
  62 {
  63         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  64         unsigned long max_n, max_m;
  65         unsigned long n, m;
  66
  67         max_n = 1 << nm->n.width;
  68         max_m = nm->m.max ?: 1 << nm->m.width;
  69
  70         rational_best_approximation(rate, *parent_rate, max_n, max_m, &n, &m);
  71
  72         return *parent_rate * n / m;
  73 }
  74
  75 static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
  76                            unsigned long parent_rate)
  77 {
  78         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  79         unsigned long flags;
  80         unsigned long max_n, max_m;
  81         unsigned long n, m;
  82         u32 reg;
  83
  84         if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate))
  85                 return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate);
  86         else
  87                 ccu_frac_helper_disable(&nm->common, &nm->frac);
  88
  89         max_n = 1 << nm->n.width;
  90         max_m = nm->m.max ?: 1 << nm->m.width;
  91
  92         rational_best_approximation(rate, parent_rate, max_n, max_m, &n, &m);
  93
  94         spin_lock_irqsave(nm->common.lock, flags);
  95
  96         reg = readl(nm->common.base + nm->common.reg);
  97         reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
  98         reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
  99
 100         writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift),
 101                nm->common.base + nm->common.reg);
 102
 103         spin_unlock_irqrestore(nm->common.lock, flags);
 104
 105         ccu_helper_wait_for_lock(&nm->common, nm->lock);
 106
 107         return 0;
 108 }
 109
 110 const struct clk_ops ccu_nm_ops = {
 111         .disable        = ccu_nm_disable,
 112         .enable         = ccu_nm_enable,
 113         .is_enabled     = ccu_nm_is_enabled,
 114
 115         .recalc_rate    = ccu_nm_recalc_rate,
 116         .round_rate     = ccu_nm_round_rate,
 117         .set_rate       = ccu_nm_set_rate,
 118 };