drivers/crypto/chelsio/chcr_crypto.h

   1 /*
   2  * This file is part of the Chelsio T6 Crypto driver for Linux.
   3  *
   4  * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  *
  34  */
  35
  36 #ifndef __CHCR_CRYPTO_H__
  37 #define __CHCR_CRYPTO_H__
  38
  39 /* Define following if h/w is not dropping the AAD and IV data before
  40  * giving the processed data
  41  */
  42
  43 #define CHCR_CRA_PRIORITY 300
  44
  45 #define CHCR_AES_MAX_KEY_LEN  (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
  46 #define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */
  47
  48 #define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/
  49 #define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/
  50
  51 #define CHCR_GIVENCRYPT_OP 2
  52 /* CPL/SCMD parameters */
  53
  54 #define CHCR_ENCRYPT_OP 0
  55 #define CHCR_DECRYPT_OP 1
  56
  57 #define CHCR_SCMD_SEQ_NO_CTRL_32BIT     1
  58 #define CHCR_SCMD_SEQ_NO_CTRL_48BIT     2
  59 #define CHCR_SCMD_SEQ_NO_CTRL_64BIT     3
  60
  61 #define CHCR_SCMD_PROTO_VERSION_GENERIC 4
  62
  63 #define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0
  64 #define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1
  65
  66 #define CHCR_SCMD_CIPHER_MODE_NOP           0
  67 #define CHCR_SCMD_CIPHER_MODE_AES_CBC       1
  68 #define CHCR_SCMD_CIPHER_MODE_GENERIC_AES   4
  69 #define CHCR_SCMD_CIPHER_MODE_AES_XTS       6
  70
  71 #define CHCR_SCMD_AUTH_MODE_NOP             0
  72 #define CHCR_SCMD_AUTH_MODE_SHA1            1
  73 #define CHCR_SCMD_AUTH_MODE_SHA224          2
  74 #define CHCR_SCMD_AUTH_MODE_SHA256          3
  75 #define CHCR_SCMD_AUTH_MODE_SHA512_224      5
  76 #define CHCR_SCMD_AUTH_MODE_SHA512_256      6
  77 #define CHCR_SCMD_AUTH_MODE_SHA512_384      7
  78 #define CHCR_SCMD_AUTH_MODE_SHA512_512      8
  79
  80 #define CHCR_SCMD_HMAC_CTRL_NOP             0
  81 #define CHCR_SCMD_HMAC_CTRL_NO_TRUNC        1
  82
  83 #define CHCR_SCMD_IVGEN_CTRL_HW             0
  84 #define CHCR_SCMD_IVGEN_CTRL_SW             1
  85 /* This are not really mac key size. They are intermediate values
  86  * of sha engine and its size
  87  */
  88 #define CHCR_KEYCTX_MAC_KEY_SIZE_128        0
  89 #define CHCR_KEYCTX_MAC_KEY_SIZE_160        1
  90 #define CHCR_KEYCTX_MAC_KEY_SIZE_192        2
  91 #define CHCR_KEYCTX_MAC_KEY_SIZE_256        3
  92 #define CHCR_KEYCTX_MAC_KEY_SIZE_512        4
  93 #define CHCR_KEYCTX_CIPHER_KEY_SIZE_128     0
  94 #define CHCR_KEYCTX_CIPHER_KEY_SIZE_192     1
  95 #define CHCR_KEYCTX_CIPHER_KEY_SIZE_256     2
  96 #define CHCR_KEYCTX_NO_KEY                  15
  97
  98 #define CHCR_CPL_FW4_PLD_IV_OFFSET          (5 * 64) /* bytes. flt #5 and #6 */
  99 #define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */
 100 #define CHCR_CPL_FW4_PLD_DATA_SIZE          (4 * 64) /* bytes. flt #4 to #7 */
 101
 102 #define KEY_CONTEXT_HDR_SALT_AND_PAD        16
 103 #define flits_to_bytes(x)  (x * 8)
 104
 105 #define IV_NOP                  0
 106 #define IV_IMMEDIATE            1
 107 #define IV_DSGL                 2
 108
 109 #define CRYPTO_ALG_SUB_TYPE_MASK            0x0f000000
 110 #define CRYPTO_ALG_SUB_TYPE_HASH_HMAC       0x01000000
 111 #define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\
 112                               CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
 113
 114 #define MAX_SALT                4
 115 #define MAX_SCRATCH_PAD_SIZE    32
 116
 117 #define CHCR_HASH_MAX_BLOCK_SIZE_64  64
 118 #define CHCR_HASH_MAX_BLOCK_SIZE_128 128
 119
 120 /* Aligned to 128 bit boundary */
 121 struct _key_ctx {
 122         __be32 ctx_hdr;
 123         u8 salt[MAX_SALT];
 124         __be64 reserverd;
 125         unsigned char key[0];
 126 };
 127
 128 struct ablk_ctx {
 129         u8 enc;
 130         unsigned int processed_len;
 131         __be32 key_ctx_hdr;
 132         unsigned int enckey_len;
 133         unsigned int dst_nents;
 134         struct scatterlist iv_sg;
 135         u8 key[CHCR_AES_MAX_KEY_LEN];
 136         u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
 137         unsigned char ciph_mode;
 138 };
 139
 140 struct hmac_ctx {
 141         struct shash_desc *desc;
 142         u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];
 143         u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];
 144 };
 145
 146 struct __crypto_ctx {
 147         struct hmac_ctx hmacctx[0];
 148         struct ablk_ctx ablkctx[0];
 149 };
 150
 151 struct chcr_context {
 152         struct chcr_dev *dev;
 153         unsigned char tx_channel_id;
 154         struct __crypto_ctx crypto_ctx[0];
 155 };
 156
 157 struct chcr_ahash_req_ctx {
 158         u32 result;
 159         char bfr[CHCR_HASH_MAX_BLOCK_SIZE_128];
 160         u8 bfr_len;
 161         /* DMA the partial hash in it */
 162         u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
 163         u64 data_len;  /* Data len till time */
 164         void *dummy_payload_ptr;
 165         /* SKB which is being sent to the hardware for processing */
 166         struct sk_buff *skb;
 167 };
 168
 169 struct chcr_blkcipher_req_ctx {
 170         struct sk_buff *skb;
 171 };
 172
 173 struct chcr_alg_template {
 174         u32 type;
 175         u32 is_registered;
 176         union {
 177                 struct crypto_alg crypto;
 178                 struct ahash_alg hash;
 179         } alg;
 180 };
 181
 182 struct chcr_req_ctx {
 183         union {
 184                 struct ahash_request *ahash_req;
 185                 struct ablkcipher_request *ablk_req;
 186         } req;
 187         union {
 188                 struct chcr_ahash_req_ctx *ahash_ctx;
 189                 struct chcr_blkcipher_req_ctx *ablk_ctx;
 190         } ctx;
 191 };
 192
 193 struct sge_opaque_hdr {
 194         void *dev;
 195         dma_addr_t addr[MAX_SKB_FRAGS + 1];
 196 };
 197
 198 typedef struct sk_buff *(*create_wr_t)(struct crypto_async_request *req,
 199                                        struct chcr_context *ctx,
 200                                        unsigned short qid,
 201                                        unsigned short op_type);
 202
 203 #endif /* __CHCR_CRYPTO_H__ */