drivers/gpio/gpio-stmpe.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License, version 2
   5  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   6  */
   7
   8 #include <linux/init.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/slab.h>
  11 #include <linux/gpio.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/of.h>
  14 #include <linux/mfd/stmpe.h>
  15 #include <linux/seq_file.h>
  16
  17 /*
  18  * These registers are modified under the irq bus lock and cached to avoid
  19  * unnecessary writes in bus_sync_unlock.
  20  */
  21 enum { REG_RE, REG_FE, REG_IE };
  22
  23 enum { LSB, CSB, MSB };
  24
  25 #define CACHE_NR_REGS   3
  26 /* No variant has more than 24 GPIOs */
  27 #define CACHE_NR_BANKS  (24 / 8)
  28
  29 struct stmpe_gpio {
  30         struct gpio_chip chip;
  31         struct stmpe *stmpe;
  32         struct device *dev;
  33         struct mutex irq_lock;
  34         u32 norequest_mask;
  35         /* Caches of interrupt control registers for bus_lock */
  36         u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
  37         u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
  38 };
  39
  40 static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset)
  41 {
  42         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
  43         struct stmpe *stmpe = stmpe_gpio->stmpe;
  44         u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)];
  45         u8 mask = 1 << (offset % 8);
  46         int ret;
  47
  48         ret = stmpe_reg_read(stmpe, reg);
  49         if (ret < 0)
  50                 return ret;
  51
  52         return !!(ret & mask);
  53 }
  54
  55 static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
  56 {
  57         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
  58         struct stmpe *stmpe = stmpe_gpio->stmpe;
  59         int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB;
  60         u8 reg = stmpe->regs[which + (offset / 8)];
  61         u8 mask = 1 << (offset % 8);
  62
  63         /*
  64          * Some variants have single register for gpio set/clear functionality.
  65          * For them we need to write 0 to clear and 1 to set.
  66          */
  67         if (stmpe->regs[STMPE_IDX_GPSR_LSB] == stmpe->regs[STMPE_IDX_GPCR_LSB])
  68                 stmpe_set_bits(stmpe, reg, mask, val ? mask : 0);
  69         else
  70                 stmpe_reg_write(stmpe, reg, mask);
  71 }
  72
  73 static int stmpe_gpio_get_direction(struct gpio_chip *chip,
  74                                     unsigned offset)
  75 {
  76         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
  77         struct stmpe *stmpe = stmpe_gpio->stmpe;
  78         u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);
  79         u8 mask = 1 << (offset % 8);
  80         int ret;
  81
  82         ret = stmpe_reg_read(stmpe, reg);
  83         if (ret < 0)
  84                 return ret;
  85
  86         return !(ret & mask);
  87 }
  88
  89 static int stmpe_gpio_direction_output(struct gpio_chip *chip,
  90                                          unsigned offset, int val)
  91 {
  92         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
  93         struct stmpe *stmpe = stmpe_gpio->stmpe;
  94         u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)];
  95         u8 mask = 1 << (offset % 8);
  96
  97         stmpe_gpio_set(chip, offset, val);
  98
  99         return stmpe_set_bits(stmpe, reg, mask, mask);
 100 }
 101
 102 static int stmpe_gpio_direction_input(struct gpio_chip *chip,
 103                                         unsigned offset)
 104 {
 105         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
 106         struct stmpe *stmpe = stmpe_gpio->stmpe;
 107         u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)];
 108         u8 mask = 1 << (offset % 8);
 109
 110         return stmpe_set_bits(stmpe, reg, mask, 0);
 111 }
 112
 113 static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset)
 114 {
 115         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
 116         struct stmpe *stmpe = stmpe_gpio->stmpe;
 117
 118         if (stmpe_gpio->norequest_mask & (1 << offset))
 119                 return -EINVAL;
 120
 121         return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO);
 122 }
 123
 124 static struct gpio_chip template_chip = {
 125         .label                  = "stmpe",
 126         .owner                  = THIS_MODULE,
 127         .get_direction          = stmpe_gpio_get_direction,
 128         .direction_input        = stmpe_gpio_direction_input,
 129         .get                    = stmpe_gpio_get,
 130         .direction_output       = stmpe_gpio_direction_output,
 131         .set                    = stmpe_gpio_set,
 132         .request                = stmpe_gpio_request,
 133         .can_sleep              = true,
 134 };
 135
 136 static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 137 {
 138         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 139         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
 140         int offset = d->hwirq;
 141         int regoffset = offset / 8;
 142         int mask = 1 << (offset % 8);
 143
 144         if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH)
 145                 return -EINVAL;
 146
 147         /* STMPE801 and STMPE 1600 don't have RE and FE registers */
 148         if (stmpe_gpio->stmpe->partnum == STMPE801 ||
 149             stmpe_gpio->stmpe->partnum == STMPE1600)
 150                 return 0;
 151
 152         if (type & IRQ_TYPE_EDGE_RISING)
 153                 stmpe_gpio->regs[REG_RE][regoffset] |= mask;
 154         else
 155                 stmpe_gpio->regs[REG_RE][regoffset] &= ~mask;
 156
 157         if (type & IRQ_TYPE_EDGE_FALLING)
 158                 stmpe_gpio->regs[REG_FE][regoffset] |= mask;
 159         else
 160                 stmpe_gpio->regs[REG_FE][regoffset] &= ~mask;
 161
 162         return 0;
 163 }
 164
 165 static void stmpe_gpio_irq_lock(struct irq_data *d)
 166 {
 167         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 168         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
 169
 170         mutex_lock(&stmpe_gpio->irq_lock);
 171 }
 172
 173 static void stmpe_gpio_irq_sync_unlock(struct irq_data *d)
 174 {
 175         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 176         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
 177         struct stmpe *stmpe = stmpe_gpio->stmpe;
 178         int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
 179         static const u8 regmap[CACHE_NR_REGS][CACHE_NR_BANKS] = {
 180                 [REG_RE][LSB] = STMPE_IDX_GPRER_LSB,
 181                 [REG_RE][CSB] = STMPE_IDX_GPRER_CSB,
 182                 [REG_RE][MSB] = STMPE_IDX_GPRER_MSB,
 183                 [REG_FE][LSB] = STMPE_IDX_GPFER_LSB,
 184                 [REG_FE][CSB] = STMPE_IDX_GPFER_CSB,
 185                 [REG_FE][MSB] = STMPE_IDX_GPFER_MSB,
 186                 [REG_IE][LSB] = STMPE_IDX_IEGPIOR_LSB,
 187                 [REG_IE][CSB] = STMPE_IDX_IEGPIOR_CSB,
 188                 [REG_IE][MSB] = STMPE_IDX_IEGPIOR_MSB,
 189         };
 190         int i, j;
 191
 192         for (i = 0; i < CACHE_NR_REGS; i++) {
 193                 /* STMPE801 and STMPE1600 don't have RE and FE registers */
 194                 if ((stmpe->partnum == STMPE801 ||
 195                      stmpe->partnum == STMPE1600) &&
 196                      (i != REG_IE))
 197                         continue;
 198
 199                 for (j = 0; j < num_banks; j++) {
 200                         u8 old = stmpe_gpio->oldregs[i][j];
 201                         u8 new = stmpe_gpio->regs[i][j];
 202
 203                         if (new == old)
 204                                 continue;
 205
 206                         stmpe_gpio->oldregs[i][j] = new;
 207                         stmpe_reg_write(stmpe, stmpe->regs[regmap[i][j]], new);
 208                 }
 209         }
 210
 211         mutex_unlock(&stmpe_gpio->irq_lock);
 212 }
 213
 214 static void stmpe_gpio_irq_mask(struct irq_data *d)
 215 {
 216         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 217         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
 218         int offset = d->hwirq;
 219         int regoffset = offset / 8;
 220         int mask = 1 << (offset % 8);
 221
 222         stmpe_gpio->regs[REG_IE][regoffset] &= ~mask;
 223 }
 224
 225 static void stmpe_gpio_irq_unmask(struct irq_data *d)
 226 {
 227         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 228         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
 229         struct stmpe *stmpe = stmpe_gpio->stmpe;
 230         int offset = d->hwirq;
 231         int regoffset = offset / 8;
 232         int mask = 1 << (offset % 8);
 233
 234         stmpe_gpio->regs[REG_IE][regoffset] |= mask;
 235
 236         /*
 237          * STMPE1600 workaround: to be able to get IRQ from pins,
 238          * a read must be done on GPMR register, or a write in
 239          * GPSR or GPCR registers
 240          */
 241         if (stmpe->partnum == STMPE1600)
 242                 stmpe_reg_read(stmpe,
 243                                stmpe->regs[STMPE_IDX_GPMR_LSB + regoffset]);
 244 }
 245
 246 static void stmpe_dbg_show_one(struct seq_file *s,
 247                                struct gpio_chip *gc,
 248                                unsigned offset, unsigned gpio)
 249 {
 250         struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
 251         struct stmpe *stmpe = stmpe_gpio->stmpe;
 252         const char *label = gpiochip_is_requested(gc, offset);
 253         bool val = !!stmpe_gpio_get(gc, offset);
 254         u8 bank = offset / 8;
 255         u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank];
 256         u8 mask = 1 << (offset % 8);
 257         int ret;
 258         u8 dir;
 259
 260         ret = stmpe_reg_read(stmpe, dir_reg);
 261         if (ret < 0)
 262                 return;
 263         dir = !!(ret & mask);
 264
 265         if (dir) {
 266                 seq_printf(s, " gpio-%-3d (%-20.20s) out %s",
 267                            gpio, label ?: "(none)",
 268                            val ? "hi" : "lo");
 269         } else {
 270                 u8 edge_det_reg;
 271                 u8 rise_reg;
 272                 u8 fall_reg;
 273                 u8 irqen_reg;
 274
 275                 char *edge_det_values[] = {"edge-inactive",
 276                                            "edge-asserted",
 277                                            "not-supported"};
 278                 char *rise_values[] = {"no-rising-edge-detection",
 279                                        "rising-edge-detection",
 280                                        "not-supported"};
 281                 char *fall_values[] = {"no-falling-edge-detection",
 282                                        "falling-edge-detection",
 283                                        "not-supported"};
 284                 #define NOT_SUPPORTED_IDX 2
 285                 u8 edge_det = NOT_SUPPORTED_IDX;
 286                 u8 rise = NOT_SUPPORTED_IDX;
 287                 u8 fall = NOT_SUPPORTED_IDX;
 288                 bool irqen;
 289
 290                 switch (stmpe->partnum) {
 291                 case STMPE610:
 292                 case STMPE811:
 293                 case STMPE1601:
 294                 case STMPE2401:
 295                 case STMPE2403:
 296                         edge_det_reg = stmpe->regs[STMPE_IDX_GPEDR_LSB + bank];
 297                         ret = stmpe_reg_read(stmpe, edge_det_reg);
 298                         if (ret < 0)
 299                                 return;
 300                         edge_det = !!(ret & mask);
 301
 302                 case STMPE1801:
 303                         rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB + bank];
 304                         fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB + bank];
 305
 306                         ret = stmpe_reg_read(stmpe, rise_reg);
 307                         if (ret < 0)
 308                                 return;
 309                         rise = !!(ret & mask);
 310                         ret = stmpe_reg_read(stmpe, fall_reg);
 311                         if (ret < 0)
 312                                 return;
 313                         fall = !!(ret & mask);
 314
 315                 case STMPE801:
 316                 case STMPE1600:
 317                         irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB + bank];
 318                         break;
 319
 320                 default:
 321                         return;
 322                 }
 323
 324                 ret = stmpe_reg_read(stmpe, irqen_reg);
 325                 if (ret < 0)
 326                         return;
 327                 irqen = !!(ret & mask);
 328
 329                 seq_printf(s, " gpio-%-3d (%-20.20s) in  %s %13s %13s %25s %25s",
 330                            gpio, label ?: "(none)",
 331                            val ? "hi" : "lo",
 332                            edge_det_values[edge_det],
 333                            irqen ? "IRQ-enabled" : "IRQ-disabled",
 334                            rise_values[rise],
 335                            fall_values[fall]);
 336         }
 337 }
 338
 339 static void stmpe_dbg_show(struct seq_file *s, struct gpio_chip *gc)
 340 {
 341         unsigned i;
 342         unsigned gpio = gc->base;
 343
 344         for (i = 0; i < gc->ngpio; i++, gpio++) {
 345                 stmpe_dbg_show_one(s, gc, i, gpio);
 346                 seq_printf(s, "\n");
 347         }
 348 }
 349
 350 static struct irq_chip stmpe_gpio_irq_chip = {
 351         .name                   = "stmpe-gpio",
 352         .irq_bus_lock           = stmpe_gpio_irq_lock,
 353         .irq_bus_sync_unlock    = stmpe_gpio_irq_sync_unlock,
 354         .irq_mask               = stmpe_gpio_irq_mask,
 355         .irq_unmask             = stmpe_gpio_irq_unmask,
 356         .irq_set_type           = stmpe_gpio_irq_set_type,
 357 };
 358
 359 static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
 360 {
 361         struct stmpe_gpio *stmpe_gpio = dev;
 362         struct stmpe *stmpe = stmpe_gpio->stmpe;
 363         u8 statmsbreg;
 364         int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
 365         u8 status[num_banks];
 366         int ret;
 367         int i;
 368
 369         /*
 370          * the stmpe_block_read() call below, imposes to set statmsbreg
 371          * with the register located at the lowest address. As STMPE1600
 372          * variant is the only one which respect registers address's order
 373          * (LSB regs located at lowest address than MSB ones) whereas all
 374          * the others have a registers layout with MSB located before the
 375          * LSB regs.
 376          */
 377         if (stmpe->partnum == STMPE1600)
 378                 statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_LSB];
 379         else
 380                 statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_MSB];
 381
 382         ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status);
 383         if (ret < 0)
 384                 return IRQ_NONE;
 385
 386         for (i = 0; i < num_banks; i++) {
 387                 int bank = (stmpe_gpio->stmpe->partnum == STMPE1600) ? i :
 388                            num_banks - i - 1;
 389                 unsigned int enabled = stmpe_gpio->regs[REG_IE][bank];
 390                 unsigned int stat = status[i];
 391
 392                 stat &= enabled;
 393                 if (!stat)
 394                         continue;
 395
 396                 while (stat) {
 397                         int bit = __ffs(stat);
 398                         int line = bank * 8 + bit;
 399                         int child_irq = irq_find_mapping(stmpe_gpio->chip.irqdomain,
 400                                                          line);
 401
 402                         handle_nested_irq(child_irq);
 403                         stat &= ~(1 << bit);
 404                 }
 405
 406                 /*
 407                  * interrupt status register write has no effect on
 408                  * 801/1801/1600, bits are cleared when read.
 409                  * Edge detect register is not present on 801/1600/1801
 410                  */
 411                 if (stmpe->partnum != STMPE801 || stmpe->partnum != STMPE1600 ||
 412                     stmpe->partnum != STMPE1801) {
 413                         stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
 414                         stmpe_reg_write(stmpe,
 415                                         stmpe->regs[STMPE_IDX_GPEDR_LSB + i],
 416                                         status[i]);
 417                 }
 418         }
 419
 420         return IRQ_HANDLED;
 421 }
 422
 423 static int stmpe_gpio_probe(struct platform_device *pdev)
 424 {
 425         struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent);
 426         struct device_node *np = pdev->dev.of_node;
 427         struct stmpe_gpio *stmpe_gpio;
 428         int ret;
 429         int irq = 0;
 430
 431         irq = platform_get_irq(pdev, 0);
 432
 433         stmpe_gpio = kzalloc(sizeof(struct stmpe_gpio), GFP_KERNEL);
 434         if (!stmpe_gpio)
 435                 return -ENOMEM;
 436
 437         mutex_init(&stmpe_gpio->irq_lock);
 438
 439         stmpe_gpio->dev = &pdev->dev;
 440         stmpe_gpio->stmpe = stmpe;
 441         stmpe_gpio->chip = template_chip;
 442         stmpe_gpio->chip.ngpio = stmpe->num_gpios;
 443         stmpe_gpio->chip.parent = &pdev->dev;
 444         stmpe_gpio->chip.of_node = np;
 445         stmpe_gpio->chip.base = -1;
 446
 447         if (IS_ENABLED(CONFIG_DEBUG_FS))
 448                 stmpe_gpio->chip.dbg_show = stmpe_dbg_show;
 449
 450         of_property_read_u32(np, "st,norequest-mask",
 451                         &stmpe_gpio->norequest_mask);
 452
 453         if (irq < 0)
 454                 dev_info(&pdev->dev,
 455                         "device configured in no-irq mode: "
 456                         "irqs are not available\n");
 457
 458         ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
 459         if (ret)
 460                 goto out_free;
 461
 462         ret = gpiochip_add_data(&stmpe_gpio->chip, stmpe_gpio);
 463         if (ret) {
 464                 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
 465                 goto out_disable;
 466         }
 467
 468         if (irq > 0) {
 469                 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 470                                 stmpe_gpio_irq, IRQF_ONESHOT,
 471                                 "stmpe-gpio", stmpe_gpio);
 472                 if (ret) {
 473                         dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
 474                         goto out_disable;
 475                 }
 476                 ret =  gpiochip_irqchip_add(&stmpe_gpio->chip,
 477                                             &stmpe_gpio_irq_chip,
 478                                             0,
 479                                             handle_simple_irq,
 480                                             IRQ_TYPE_NONE);
 481                 if (ret) {
 482                         dev_err(&pdev->dev,
 483                                 "could not connect irqchip to gpiochip\n");
 484                         goto out_disable;
 485                 }
 486
 487                 gpiochip_set_chained_irqchip(&stmpe_gpio->chip,
 488                                              &stmpe_gpio_irq_chip,
 489                                              irq,
 490                                              NULL);
 491         }
 492
 493         platform_set_drvdata(pdev, stmpe_gpio);
 494
 495         return 0;
 496
 497 out_disable:
 498         stmpe_disable(stmpe, STMPE_BLOCK_GPIO);
 499         gpiochip_remove(&stmpe_gpio->chip);
 500 out_free:
 501         kfree(stmpe_gpio);
 502         return ret;
 503 }
 504
 505 static struct platform_driver stmpe_gpio_driver = {
 506         .driver = {
 507                 .suppress_bind_attrs    = true,
 508                 .name                   = "stmpe-gpio",
 509         },
 510         .probe          = stmpe_gpio_probe,
 511 };
 512
 513 static int __init stmpe_gpio_init(void)
 514 {
 515         return platform_driver_register(&stmpe_gpio_driver);
 516 }
 517 subsys_initcall(stmpe_gpio_init);