drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Christian König <deathsimple@vodafone.de>
  29  */
  30
  31 #include <drm/drmP.h>
  32 #include "amdgpu.h"
  33 #include "amdgpu_trace.h"
  34
  35 #define AMDGPU_BO_LIST_MAX_PRIORITY     32u
  36 #define AMDGPU_BO_LIST_NUM_BUCKETS      (AMDGPU_BO_LIST_MAX_PRIORITY + 1)
  37
  38 static int amdgpu_bo_list_create(struct amdgpu_fpriv *fpriv,
  39                                  struct amdgpu_bo_list **result,
  40                                  int *id)
  41 {
  42         int r;
  43
  44         *result = kzalloc(sizeof(struct amdgpu_bo_list), GFP_KERNEL);
  45         if (!*result)
  46                 return -ENOMEM;
  47
  48         mutex_lock(&fpriv->bo_list_lock);
  49         r = idr_alloc(&fpriv->bo_list_handles, *result,
  50                       1, 0, GFP_KERNEL);
  51         if (r < 0) {
  52                 mutex_unlock(&fpriv->bo_list_lock);
  53                 kfree(*result);
  54                 return r;
  55         }
  56         *id = r;
  57
  58         mutex_init(&(*result)->lock);
  59         (*result)->num_entries = 0;
  60         (*result)->array = NULL;
  61
  62         mutex_lock(&(*result)->lock);
  63         mutex_unlock(&fpriv->bo_list_lock);
  64
  65         return 0;
  66 }
  67
  68 static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
  69 {
  70         struct amdgpu_bo_list *list;
  71
  72         mutex_lock(&fpriv->bo_list_lock);
  73         list = idr_find(&fpriv->bo_list_handles, id);
  74         if (list) {
  75                 mutex_lock(&list->lock);
  76                 idr_remove(&fpriv->bo_list_handles, id);
  77                 mutex_unlock(&list->lock);
  78                 amdgpu_bo_list_free(list);
  79         }
  80         mutex_unlock(&fpriv->bo_list_lock);
  81 }
  82
  83 static int amdgpu_bo_list_set(struct amdgpu_device *adev,
  84                                      struct drm_file *filp,
  85                                      struct amdgpu_bo_list *list,
  86                                      struct drm_amdgpu_bo_list_entry *info,
  87                                      unsigned num_entries)
  88 {
  89         struct amdgpu_bo_list_entry *array;
  90         struct amdgpu_bo *gds_obj = adev->gds.gds_gfx_bo;
  91         struct amdgpu_bo *gws_obj = adev->gds.gws_gfx_bo;
  92         struct amdgpu_bo *oa_obj = adev->gds.oa_gfx_bo;
  93
  94         bool has_userptr = false;
  95         unsigned i;
  96         int r;
  97
  98         array = drm_malloc_ab(num_entries, sizeof(struct amdgpu_bo_list_entry));
  99         if (!array)
 100                 return -ENOMEM;
 101         memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));
 102
 103         for (i = 0; i < num_entries; ++i) {
 104                 struct amdgpu_bo_list_entry *entry = &array[i];
 105                 struct drm_gem_object *gobj;
 106                 struct mm_struct *usermm;
 107
 108                 gobj = drm_gem_object_lookup(adev->ddev, filp, info[i].bo_handle);
 109                 if (!gobj) {
 110                         r = -ENOENT;
 111                         goto error_free;
 112                 }
 113
 114                 entry->robj = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
 115                 drm_gem_object_unreference_unlocked(gobj);
 116                 entry->priority = min(info[i].bo_priority,
 117                                       AMDGPU_BO_LIST_MAX_PRIORITY);
 118                 usermm = amdgpu_ttm_tt_get_usermm(entry->robj->tbo.ttm);
 119                 if (usermm) {
 120                         if (usermm != current->mm) {
 121                                 r = -EPERM;
 122                                 goto error_free;
 123                         }
 124                         has_userptr = true;
 125                 }
 126                 entry->tv.bo = &entry->robj->tbo;
 127                 entry->tv.shared = true;
 128
 129                 if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
 130                         gds_obj = entry->robj;
 131                 if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GWS)
 132                         gws_obj = entry->robj;
 133                 if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_OA)
 134                         oa_obj = entry->robj;
 135
 136                 trace_amdgpu_bo_list_set(list, entry->robj);
 137         }
 138
 139         for (i = 0; i < list->num_entries; ++i)
 140                 amdgpu_bo_unref(&list->array[i].robj);
 141
 142         drm_free_large(list->array);
 143
 144         list->gds_obj = gds_obj;
 145         list->gws_obj = gws_obj;
 146         list->oa_obj = oa_obj;
 147         list->has_userptr = has_userptr;
 148         list->array = array;
 149         list->num_entries = num_entries;
 150
 151         return 0;
 152
 153 error_free:
 154         drm_free_large(array);
 155         return r;
 156 }
 157
 158 struct amdgpu_bo_list *
 159 amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id)
 160 {
 161         struct amdgpu_bo_list *result;
 162
 163         mutex_lock(&fpriv->bo_list_lock);
 164         result = idr_find(&fpriv->bo_list_handles, id);
 165         if (result)
 166                 mutex_lock(&result->lock);
 167         mutex_unlock(&fpriv->bo_list_lock);
 168         return result;
 169 }
 170
 171 void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
 172                              struct list_head *validated)
 173 {
 174         /* This is based on the bucket sort with O(n) time complexity.
 175          * An item with priority "i" is added to bucket[i]. The lists are then
 176          * concatenated in descending order.
 177          */
 178         struct list_head bucket[AMDGPU_BO_LIST_NUM_BUCKETS];
 179         unsigned i;
 180
 181         for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
 182                 INIT_LIST_HEAD(&bucket[i]);
 183
 184         /* Since buffers which appear sooner in the relocation list are
 185          * likely to be used more often than buffers which appear later
 186          * in the list, the sort mustn't change the ordering of buffers
 187          * with the same priority, i.e. it must be stable.
 188          */
 189         for (i = 0; i < list->num_entries; i++) {
 190                 unsigned priority = list->array[i].priority;
 191
 192                 list_add_tail(&list->array[i].tv.head,
 193                               &bucket[priority]);
 194         }
 195
 196         /* Connect the sorted buckets in the output list. */
 197         for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
 198                 list_splice(&bucket[i], validated);
 199 }
 200
 201 void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
 202 {
 203         mutex_unlock(&list->lock);
 204 }
 205
 206 void amdgpu_bo_list_free(struct amdgpu_bo_list *list)
 207 {
 208         unsigned i;
 209
 210         for (i = 0; i < list->num_entries; ++i)
 211                 amdgpu_bo_unref(&list->array[i].robj);
 212
 213         mutex_destroy(&list->lock);
 214         drm_free_large(list->array);
 215         kfree(list);
 216 }
 217
 218 int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
 219                                 struct drm_file *filp)
 220 {
 221         const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
 222
 223         struct amdgpu_device *adev = dev->dev_private;
 224         struct amdgpu_fpriv *fpriv = filp->driver_priv;
 225         union drm_amdgpu_bo_list *args = data;
 226         uint32_t handle = args->in.list_handle;
 227         const void __user *uptr = (const void*)(long)args->in.bo_info_ptr;
 228
 229         struct drm_amdgpu_bo_list_entry *info;
 230         struct amdgpu_bo_list *list;
 231
 232         int r;
 233
 234         info = drm_malloc_ab(args->in.bo_number,
 235                              sizeof(struct drm_amdgpu_bo_list_entry));
 236         if (!info)
 237                 return -ENOMEM;
 238
 239         /* copy the handle array from userspace to a kernel buffer */
 240         r = -EFAULT;
 241         if (likely(info_size == args->in.bo_info_size)) {
 242                 unsigned long bytes = args->in.bo_number *
 243                         args->in.bo_info_size;
 244
 245                 if (copy_from_user(info, uptr, bytes))
 246                         goto error_free;
 247
 248         } else {
 249                 unsigned long bytes = min(args->in.bo_info_size, info_size);
 250                 unsigned i;
 251
 252                 memset(info, 0, args->in.bo_number * info_size);
 253                 for (i = 0; i < args->in.bo_number; ++i) {
 254                         if (copy_from_user(&info[i], uptr, bytes))
 255                                 goto error_free;
 256
 257                         uptr += args->in.bo_info_size;
 258                 }
 259         }
 260
 261         switch (args->in.operation) {
 262         case AMDGPU_BO_LIST_OP_CREATE:
 263                 r = amdgpu_bo_list_create(fpriv, &list, &handle);
 264                 if (r)
 265                         goto error_free;
 266
 267                 r = amdgpu_bo_list_set(adev, filp, list, info,
 268                                               args->in.bo_number);
 269                 amdgpu_bo_list_put(list);
 270                 if (r)
 271                         goto error_free;
 272
 273                 break;
 274
 275         case AMDGPU_BO_LIST_OP_DESTROY:
 276                 amdgpu_bo_list_destroy(fpriv, handle);
 277                 handle = 0;
 278                 break;
 279
 280         case AMDGPU_BO_LIST_OP_UPDATE:
 281                 r = -ENOENT;
 282                 list = amdgpu_bo_list_get(fpriv, handle);
 283                 if (!list)
 284                         goto error_free;
 285
 286                 r = amdgpu_bo_list_set(adev, filp, list, info,
 287                                               args->in.bo_number);
 288                 amdgpu_bo_list_put(list);
 289                 if (r)
 290                         goto error_free;
 291
 292                 break;
 293
 294         default:
 295                 r = -EINVAL;
 296                 goto error_free;
 297         }
 298
 299         memset(args, 0, sizeof(*args));
 300         args->out.list_handle = handle;
 301         drm_free_large(info);
 302
 303         return 0;
 304
 305 error_free:
 306         drm_free_large(info);
 307         return r;
 308 }