drivers/gpu/drm/amd/powerplay/hwmgr/iceland_powertune.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Author: Huang Rui <ray.huang@amd.com>
  23  *
  24  */
  25 #ifndef ICELAND_POWERTUNE_H
  26 #define ICELAND_POWERTUNE_H
  27
  28 #include "smu71.h"
  29
  30 enum iceland_pt_config_reg_type {
  31         ICELAND_CONFIGREG_MMR = 0,
  32         ICELAND_CONFIGREG_SMC_IND,
  33         ICELAND_CONFIGREG_DIDT_IND,
  34         ICELAND_CONFIGREG_CACHE,
  35         ICELAND_CONFIGREG_MAX
  36 };
  37
  38 /* PowerContainment Features */
  39 #define POWERCONTAINMENT_FEATURE_DTE             0x00000001
  40 #define POWERCONTAINMENT_FEATURE_TDCLimit        0x00000002
  41 #define POWERCONTAINMENT_FEATURE_PkgPwrLimit     0x00000004
  42 #define POWERCONTAINMENT_FEATURE_BAPM            0x00000001
  43
  44 struct iceland_pt_config_reg {
  45         uint32_t                           offset;
  46         uint32_t                           mask;
  47         uint32_t                           shift;
  48         uint32_t                           value;
  49         enum iceland_pt_config_reg_type       type;
  50 };
  51
  52 struct iceland_pt_defaults
  53 {
  54         uint8_t   svi_load_line_en;
  55         uint8_t   svi_load_line_vddc;
  56         uint8_t   tdc_vddc_throttle_release_limit_perc;
  57         uint8_t   tdc_mawt;
  58         uint8_t   tdc_waterfall_ctl;
  59         uint8_t   dte_ambient_temp_base;
  60         uint32_t  display_cac;
  61         uint32_t  bamp_temp_gradient;
  62         uint16_t  bapmti_r[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS];
  63         uint16_t  bapmti_rc[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS];
  64 };
  65
  66 void iceland_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr);
  67 int iceland_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr);
  68 int iceland_populate_pm_fuses(struct pp_hwmgr *hwmgr);
  69 int iceland_enable_smc_cac(struct pp_hwmgr *hwmgr);
  70 int iceland_enable_power_containment(struct pp_hwmgr *hwmgr);
  71 int iceland_power_control_set_level(struct pp_hwmgr *hwmgr);
  72
  73 #endif  /* ICELAND_POWERTUNE_H */
  74