drivers/gpu/drm/amd/powerplay/hwmgr/tonga_powertune.h

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #ifndef TONGA_POWERTUNE_H
  25 #define TONGA_POWERTUNE_H
  26
  27 enum _phw_tonga_ptc_config_reg_type {
  28         TONGA_CONFIGREG_MMR = 0,
  29         TONGA_CONFIGREG_SMC_IND,
  30         TONGA_CONFIGREG_DIDT_IND,
  31         TONGA_CONFIGREG_CACHE,
  32
  33         TONGA_CONFIGREG_MAX
  34 };
  35 typedef enum _phw_tonga_ptc_config_reg_type phw_tonga_ptc_config_reg_type;
  36
  37 /* PowerContainment Features */
  38 #define POWERCONTAINMENT_FEATURE_BAPM            0x00000001
  39 #define POWERCONTAINMENT_FEATURE_TDCLimit        0x00000002
  40 #define POWERCONTAINMENT_FEATURE_PkgPwrLimit     0x00000004
  41
  42 struct _phw_tonga_pt_config_reg {
  43         uint32_t                           Offset;
  44         uint32_t                           Mask;
  45         uint32_t                           Shift;
  46         uint32_t                           Value;
  47         phw_tonga_ptc_config_reg_type     Type;
  48 };
  49 typedef struct _phw_tonga_pt_config_reg phw_tonga_pt_config_reg;
  50
  51 struct _phw_tonga_pt_defaults {
  52         uint8_t   svi_load_line_en;
  53         uint8_t   svi_load_line_vddC;
  54         uint8_t   tdc_vddc_throttle_release_limit_perc;
  55         uint8_t   tdc_mawt;
  56         uint8_t   tdc_waterfall_ctl;
  57         uint8_t   dte_ambient_temp_base;
  58         uint32_t  display_cac;
  59         uint32_t  bamp_temp_gradient;
  60         uint16_t  bapmti_r[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
  61         uint16_t  bapmti_rc[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
  62 };
  63 typedef struct _phw_tonga_pt_defaults phw_tonga_pt_defaults;
  64
  65 #endif
  66