2 * Copyright © 2009 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/i2c.h>
30 #include <drm/drm_dp_helper.h>
31 #include <drm/drm_dp_aux_dev.h>
37 * These functions contain some common logic and helpers at various abstraction
38 * levels to deal with Display Port sink devices and related things like DP aux
39 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
43 /* Helpers for DP link training */
44 static u8
dp_link_status(const u8 link_status
[DP_LINK_STATUS_SIZE
], int r
)
46 return link_status
[r
- DP_LANE0_1_STATUS
];
49 static u8
dp_get_lane_status(const u8 link_status
[DP_LINK_STATUS_SIZE
],
52 int i
= DP_LANE0_1_STATUS
+ (lane
>> 1);
53 int s
= (lane
& 1) * 4;
54 u8 l
= dp_link_status(link_status
, i
);
55 return (l
>> s
) & 0xf;
58 bool drm_dp_channel_eq_ok(const u8 link_status
[DP_LINK_STATUS_SIZE
],
65 lane_align
= dp_link_status(link_status
,
66 DP_LANE_ALIGN_STATUS_UPDATED
);
67 if ((lane_align
& DP_INTERLANE_ALIGN_DONE
) == 0)
69 for (lane
= 0; lane
< lane_count
; lane
++) {
70 lane_status
= dp_get_lane_status(link_status
, lane
);
71 if ((lane_status
& DP_CHANNEL_EQ_BITS
) != DP_CHANNEL_EQ_BITS
)
76 EXPORT_SYMBOL(drm_dp_channel_eq_ok
);
78 bool drm_dp_clock_recovery_ok(const u8 link_status
[DP_LINK_STATUS_SIZE
],
84 for (lane
= 0; lane
< lane_count
; lane
++) {
85 lane_status
= dp_get_lane_status(link_status
, lane
);
86 if ((lane_status
& DP_LANE_CR_DONE
) == 0)
91 EXPORT_SYMBOL(drm_dp_clock_recovery_ok
);
93 u8
drm_dp_get_adjust_request_voltage(const u8 link_status
[DP_LINK_STATUS_SIZE
],
96 int i
= DP_ADJUST_REQUEST_LANE0_1
+ (lane
>> 1);
98 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT
:
99 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT
);
100 u8 l
= dp_link_status(link_status
, i
);
102 return ((l
>> s
) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT
;
104 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage
);
106 u8
drm_dp_get_adjust_request_pre_emphasis(const u8 link_status
[DP_LINK_STATUS_SIZE
],
109 int i
= DP_ADJUST_REQUEST_LANE0_1
+ (lane
>> 1);
110 int s
= ((lane
& 1) ?
111 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT
:
112 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT
);
113 u8 l
= dp_link_status(link_status
, i
);
115 return ((l
>> s
) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT
;
117 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis
);
119 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd
[DP_RECEIVER_CAP_SIZE
]) {
120 if (dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] == 0)
123 mdelay(dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] * 4);
125 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay
);
127 void drm_dp_link_train_channel_eq_delay(const u8 dpcd
[DP_RECEIVER_CAP_SIZE
]) {
128 if (dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] == 0)
131 mdelay(dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] * 4);
133 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay
);
135 u8
drm_dp_link_rate_to_bw_code(int link_rate
)
140 return DP_LINK_BW_1_62
;
142 return DP_LINK_BW_2_7
;
144 return DP_LINK_BW_5_4
;
147 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code
);
149 int drm_dp_bw_code_to_link_rate(u8 link_bw
)
152 case DP_LINK_BW_1_62
:
161 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate
);
163 #define AUX_RETRY_INTERVAL 500 /* us */
168 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
169 * independent access to AUX functionality. Drivers can take advantage of
170 * this by filling in the fields of the drm_dp_aux structure.
172 * Transactions are described using a hardware-independent drm_dp_aux_msg
173 * structure, which is passed into a driver's .transfer() implementation.
174 * Both native and I2C-over-AUX transactions are supported.
177 static int drm_dp_dpcd_access(struct drm_dp_aux
*aux
, u8 request
,
178 unsigned int offset
, void *buffer
, size_t size
)
180 struct drm_dp_aux_msg msg
;
184 memset(&msg
, 0, sizeof(msg
));
185 msg
.address
= offset
;
186 msg
.request
= request
;
191 * The specification doesn't give any recommendation on how often to
192 * retry native transactions. We used to retry 7 times like for
193 * aux i2c transactions but real world devices this wasn't
194 * sufficient, bump to 32 which makes Dell 4k monitors happier.
196 for (retry
= 0; retry
< 32; retry
++) {
198 mutex_lock(&aux
->hw_mutex
);
199 err
= aux
->transfer(aux
, &msg
);
200 mutex_unlock(&aux
->hw_mutex
);
209 switch (msg
.reply
& DP_AUX_NATIVE_REPLY_MASK
) {
210 case DP_AUX_NATIVE_REPLY_ACK
:
215 case DP_AUX_NATIVE_REPLY_NACK
:
218 case DP_AUX_NATIVE_REPLY_DEFER
:
219 usleep_range(AUX_RETRY_INTERVAL
, AUX_RETRY_INTERVAL
+ 100);
224 DRM_DEBUG_KMS("too many retries, giving up\n");
229 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
230 * @aux: DisplayPort AUX channel
231 * @offset: address of the (first) register to read
232 * @buffer: buffer to store the register values
233 * @size: number of bytes in @buffer
235 * Returns the number of bytes transferred on success, or a negative error
236 * code on failure. -EIO is returned if the request was NAKed by the sink or
237 * if the retry count was exceeded. If not all bytes were transferred, this
238 * function returns -EPROTO. Errors from the underlying AUX channel transfer
239 * function, with the exception of -EBUSY (which causes the transaction to
240 * be retried), are propagated to the caller.
242 ssize_t
drm_dp_dpcd_read(struct drm_dp_aux
*aux
, unsigned int offset
,
243 void *buffer
, size_t size
)
245 return drm_dp_dpcd_access(aux
, DP_AUX_NATIVE_READ
, offset
, buffer
,
248 EXPORT_SYMBOL(drm_dp_dpcd_read
);
251 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
252 * @aux: DisplayPort AUX channel
253 * @offset: address of the (first) register to write
254 * @buffer: buffer containing the values to write
255 * @size: number of bytes in @buffer
257 * Returns the number of bytes transferred on success, or a negative error
258 * code on failure. -EIO is returned if the request was NAKed by the sink or
259 * if the retry count was exceeded. If not all bytes were transferred, this
260 * function returns -EPROTO. Errors from the underlying AUX channel transfer
261 * function, with the exception of -EBUSY (which causes the transaction to
262 * be retried), are propagated to the caller.
264 ssize_t
drm_dp_dpcd_write(struct drm_dp_aux
*aux
, unsigned int offset
,
265 void *buffer
, size_t size
)
267 return drm_dp_dpcd_access(aux
, DP_AUX_NATIVE_WRITE
, offset
, buffer
,
270 EXPORT_SYMBOL(drm_dp_dpcd_write
);
273 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
274 * @aux: DisplayPort AUX channel
275 * @status: buffer to store the link status in (must be at least 6 bytes)
277 * Returns the number of bytes transferred on success or a negative error
280 int drm_dp_dpcd_read_link_status(struct drm_dp_aux
*aux
,
281 u8 status
[DP_LINK_STATUS_SIZE
])
283 return drm_dp_dpcd_read(aux
, DP_LANE0_1_STATUS
, status
,
284 DP_LINK_STATUS_SIZE
);
286 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status
);
289 * drm_dp_link_probe() - probe a DisplayPort link for capabilities
290 * @aux: DisplayPort AUX channel
291 * @link: pointer to structure in which to return link capabilities
293 * The structure filled in by this function can usually be passed directly
294 * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
295 * configure the link based on the link's capabilities.
297 * Returns 0 on success or a negative error code on failure.
299 int drm_dp_link_probe(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
304 memset(link
, 0, sizeof(*link
));
306 err
= drm_dp_dpcd_read(aux
, DP_DPCD_REV
, values
, sizeof(values
));
310 link
->revision
= values
[0];
311 link
->rate
= drm_dp_bw_code_to_link_rate(values
[1]);
312 link
->num_lanes
= values
[2] & DP_MAX_LANE_COUNT_MASK
;
314 if (values
[2] & DP_ENHANCED_FRAME_CAP
)
315 link
->capabilities
|= DP_LINK_CAP_ENHANCED_FRAMING
;
319 EXPORT_SYMBOL(drm_dp_link_probe
);
322 * drm_dp_link_power_up() - power up a DisplayPort link
323 * @aux: DisplayPort AUX channel
324 * @link: pointer to a structure containing the link configuration
326 * Returns 0 on success or a negative error code on failure.
328 int drm_dp_link_power_up(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
333 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
334 if (link
->revision
< 0x11)
337 err
= drm_dp_dpcd_readb(aux
, DP_SET_POWER
, &value
);
341 value
&= ~DP_SET_POWER_MASK
;
342 value
|= DP_SET_POWER_D0
;
344 err
= drm_dp_dpcd_writeb(aux
, DP_SET_POWER
, value
);
349 * According to the DP 1.1 specification, a "Sink Device must exit the
350 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
351 * Control Field" (register 0x600).
353 usleep_range(1000, 2000);
357 EXPORT_SYMBOL(drm_dp_link_power_up
);
360 * drm_dp_link_power_down() - power down a DisplayPort link
361 * @aux: DisplayPort AUX channel
362 * @link: pointer to a structure containing the link configuration
364 * Returns 0 on success or a negative error code on failure.
366 int drm_dp_link_power_down(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
371 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
372 if (link
->revision
< 0x11)
375 err
= drm_dp_dpcd_readb(aux
, DP_SET_POWER
, &value
);
379 value
&= ~DP_SET_POWER_MASK
;
380 value
|= DP_SET_POWER_D3
;
382 err
= drm_dp_dpcd_writeb(aux
, DP_SET_POWER
, value
);
388 EXPORT_SYMBOL(drm_dp_link_power_down
);
391 * drm_dp_link_configure() - configure a DisplayPort link
392 * @aux: DisplayPort AUX channel
393 * @link: pointer to a structure containing the link configuration
395 * Returns 0 on success or a negative error code on failure.
397 int drm_dp_link_configure(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
402 values
[0] = drm_dp_link_rate_to_bw_code(link
->rate
);
403 values
[1] = link
->num_lanes
;
405 if (link
->capabilities
& DP_LINK_CAP_ENHANCED_FRAMING
)
406 values
[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN
;
408 err
= drm_dp_dpcd_write(aux
, DP_LINK_BW_SET
, values
, sizeof(values
));
414 EXPORT_SYMBOL(drm_dp_link_configure
);
417 * I2C-over-AUX implementation
420 static u32
drm_dp_i2c_functionality(struct i2c_adapter
*adapter
)
422 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
|
423 I2C_FUNC_SMBUS_READ_BLOCK_DATA
|
424 I2C_FUNC_SMBUS_BLOCK_PROC_CALL
|
428 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg
*msg
)
431 * In case of i2c defer or short i2c ack reply to a write,
432 * we need to switch to WRITE_STATUS_UPDATE to drain the
433 * rest of the message
435 if ((msg
->request
& ~DP_AUX_I2C_MOT
) == DP_AUX_I2C_WRITE
) {
436 msg
->request
&= DP_AUX_I2C_MOT
;
437 msg
->request
|= DP_AUX_I2C_WRITE_STATUS_UPDATE
;
441 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */
442 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */
443 #define AUX_STOP_LEN 4
444 #define AUX_CMD_LEN 4
445 #define AUX_ADDRESS_LEN 20
446 #define AUX_REPLY_PAD_LEN 4
447 #define AUX_LENGTH_LEN 8
450 * Calculate the duration of the AUX request/reply in usec. Gives the
451 * "best" case estimate, ie. successful while as short as possible.
453 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg
*msg
)
455 int len
= AUX_PRECHARGE_LEN
+ AUX_SYNC_LEN
+ AUX_STOP_LEN
+
456 AUX_CMD_LEN
+ AUX_ADDRESS_LEN
+ AUX_LENGTH_LEN
;
458 if ((msg
->request
& DP_AUX_I2C_READ
) == 0)
459 len
+= msg
->size
* 8;
464 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg
*msg
)
466 int len
= AUX_PRECHARGE_LEN
+ AUX_SYNC_LEN
+ AUX_STOP_LEN
+
467 AUX_CMD_LEN
+ AUX_REPLY_PAD_LEN
;
470 * For read we expect what was asked. For writes there will
471 * be 0 or 1 data bytes. Assume 0 for the "best" case.
473 if (msg
->request
& DP_AUX_I2C_READ
)
474 len
+= msg
->size
* 8;
479 #define I2C_START_LEN 1
480 #define I2C_STOP_LEN 1
481 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */
482 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */
485 * Calculate the length of the i2c transfer in usec, assuming
486 * the i2c bus speed is as specified. Gives the the "worst"
487 * case estimate, ie. successful while as long as possible.
488 * Doesn't account the the "MOT" bit, and instead assumes each
489 * message includes a START, ADDRESS and STOP. Neither does it
490 * account for additional random variables such as clock stretching.
492 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg
*msg
,
495 /* AUX bitrate is 1MHz, i2c bitrate as specified */
496 return DIV_ROUND_UP((I2C_START_LEN
+ I2C_ADDR_LEN
+
497 msg
->size
* I2C_DATA_LEN
+
498 I2C_STOP_LEN
) * 1000, i2c_speed_khz
);
502 * Deterine how many retries should be attempted to successfully transfer
503 * the specified message, based on the estimated durations of the
504 * i2c and AUX transfers.
506 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg
*msg
,
509 int aux_time_us
= drm_dp_aux_req_duration(msg
) +
510 drm_dp_aux_reply_duration(msg
);
511 int i2c_time_us
= drm_dp_i2c_msg_duration(msg
, i2c_speed_khz
);
513 return DIV_ROUND_UP(i2c_time_us
, aux_time_us
+ AUX_RETRY_INTERVAL
);
517 * FIXME currently assumes 10 kHz as some real world devices seem
518 * to require it. We should query/set the speed via DPCD if supported.
520 static int dp_aux_i2c_speed_khz __read_mostly
= 10;
521 module_param_unsafe(dp_aux_i2c_speed_khz
, int, 0644);
522 MODULE_PARM_DESC(dp_aux_i2c_speed_khz
,
523 "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
526 * Transfer a single I2C-over-AUX message and handle various error conditions,
527 * retrying the transaction as appropriate. It is assumed that the
528 * aux->transfer function does not modify anything in the msg other than the
531 * Returns bytes transferred on success, or a negative error code on failure.
533 static int drm_dp_i2c_do_msg(struct drm_dp_aux
*aux
, struct drm_dp_aux_msg
*msg
)
535 unsigned int retry
, defer_i2c
;
538 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
539 * is required to retry at least seven times upon receiving AUX_DEFER
540 * before giving up the AUX transaction.
542 * We also try to account for the i2c bus speed.
544 int max_retries
= max(7, drm_dp_i2c_retry_count(msg
, dp_aux_i2c_speed_khz
));
546 for (retry
= 0, defer_i2c
= 0; retry
< (max_retries
+ defer_i2c
); retry
++) {
547 mutex_lock(&aux
->hw_mutex
);
548 ret
= aux
->transfer(aux
, msg
);
549 mutex_unlock(&aux
->hw_mutex
);
554 DRM_DEBUG_KMS("transaction failed: %d\n", ret
);
559 switch (msg
->reply
& DP_AUX_NATIVE_REPLY_MASK
) {
560 case DP_AUX_NATIVE_REPLY_ACK
:
562 * For I2C-over-AUX transactions this isn't enough, we
563 * need to check for the I2C ACK reply.
567 case DP_AUX_NATIVE_REPLY_NACK
:
568 DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret
, msg
->size
);
571 case DP_AUX_NATIVE_REPLY_DEFER
:
572 DRM_DEBUG_KMS("native defer\n");
574 * We could check for I2C bit rate capabilities and if
575 * available adjust this interval. We could also be
576 * more careful with DP-to-legacy adapters where a
577 * long legacy cable may force very low I2C bit rates.
579 * For now just defer for long enough to hopefully be
580 * safe for all use-cases.
582 usleep_range(AUX_RETRY_INTERVAL
, AUX_RETRY_INTERVAL
+ 100);
586 DRM_ERROR("invalid native reply %#04x\n", msg
->reply
);
590 switch (msg
->reply
& DP_AUX_I2C_REPLY_MASK
) {
591 case DP_AUX_I2C_REPLY_ACK
:
593 * Both native ACK and I2C ACK replies received. We
594 * can assume the transfer was successful.
596 if (ret
!= msg
->size
)
597 drm_dp_i2c_msg_write_status_update(msg
);
600 case DP_AUX_I2C_REPLY_NACK
:
601 DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret
, msg
->size
);
602 aux
->i2c_nack_count
++;
605 case DP_AUX_I2C_REPLY_DEFER
:
606 DRM_DEBUG_KMS("I2C defer\n");
607 /* DP Compliance Test 4.2.2.5 Requirement:
608 * Must have at least 7 retries for I2C defers on the
609 * transaction to pass this test
611 aux
->i2c_defer_count
++;
614 usleep_range(AUX_RETRY_INTERVAL
, AUX_RETRY_INTERVAL
+ 100);
615 drm_dp_i2c_msg_write_status_update(msg
);
620 DRM_ERROR("invalid I2C reply %#04x\n", msg
->reply
);
625 DRM_DEBUG_KMS("too many retries, giving up\n");
629 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg
*msg
,
630 const struct i2c_msg
*i2c_msg
)
632 msg
->request
= (i2c_msg
->flags
& I2C_M_RD
) ?
633 DP_AUX_I2C_READ
: DP_AUX_I2C_WRITE
;
634 msg
->request
|= DP_AUX_I2C_MOT
;
638 * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
640 * Returns an error code on failure, or a recommended transfer size on success.
642 static int drm_dp_i2c_drain_msg(struct drm_dp_aux
*aux
, struct drm_dp_aux_msg
*orig_msg
)
644 int err
, ret
= orig_msg
->size
;
645 struct drm_dp_aux_msg msg
= *orig_msg
;
647 while (msg
.size
> 0) {
648 err
= drm_dp_i2c_do_msg(aux
, &msg
);
650 return err
== 0 ? -EPROTO
: err
;
652 if (err
< msg
.size
&& err
< ret
) {
653 DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
666 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
667 * packets to be as large as possible. If not, the I2C transactions never
668 * succeed. Hence the default is maximum.
670 static int dp_aux_i2c_transfer_size __read_mostly
= DP_AUX_MAX_PAYLOAD_BYTES
;
671 module_param_unsafe(dp_aux_i2c_transfer_size
, int, 0644);
672 MODULE_PARM_DESC(dp_aux_i2c_transfer_size
,
673 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
675 static int drm_dp_i2c_xfer(struct i2c_adapter
*adapter
, struct i2c_msg
*msgs
,
678 struct drm_dp_aux
*aux
= adapter
->algo_data
;
680 unsigned transfer_size
;
681 struct drm_dp_aux_msg msg
;
684 dp_aux_i2c_transfer_size
= clamp(dp_aux_i2c_transfer_size
, 1, DP_AUX_MAX_PAYLOAD_BYTES
);
686 memset(&msg
, 0, sizeof(msg
));
688 for (i
= 0; i
< num
; i
++) {
689 msg
.address
= msgs
[i
].addr
;
690 drm_dp_i2c_msg_set_request(&msg
, &msgs
[i
]);
691 /* Send a bare address packet to start the transaction.
692 * Zero sized messages specify an address only (bare
693 * address) transaction.
697 err
= drm_dp_i2c_do_msg(aux
, &msg
);
700 * Reset msg.request in case in case it got
701 * changed into a WRITE_STATUS_UPDATE.
703 drm_dp_i2c_msg_set_request(&msg
, &msgs
[i
]);
707 /* We want each transaction to be as large as possible, but
708 * we'll go to smaller sizes if the hardware gives us a
711 transfer_size
= dp_aux_i2c_transfer_size
;
712 for (j
= 0; j
< msgs
[i
].len
; j
+= msg
.size
) {
713 msg
.buffer
= msgs
[i
].buf
+ j
;
714 msg
.size
= min(transfer_size
, msgs
[i
].len
- j
);
716 err
= drm_dp_i2c_drain_msg(aux
, &msg
);
719 * Reset msg.request in case in case it got
720 * changed into a WRITE_STATUS_UPDATE.
722 drm_dp_i2c_msg_set_request(&msg
, &msgs
[i
]);
733 /* Send a bare address packet to close out the transaction.
734 * Zero sized messages specify an address only (bare
735 * address) transaction.
737 msg
.request
&= ~DP_AUX_I2C_MOT
;
740 (void)drm_dp_i2c_do_msg(aux
, &msg
);
745 static const struct i2c_algorithm drm_dp_i2c_algo
= {
746 .functionality
= drm_dp_i2c_functionality
,
747 .master_xfer
= drm_dp_i2c_xfer
,
751 * drm_dp_aux_register() - initialise and register aux channel
752 * @aux: DisplayPort AUX channel
754 * Returns 0 on success or a negative error code on failure.
756 int drm_dp_aux_register(struct drm_dp_aux
*aux
)
760 mutex_init(&aux
->hw_mutex
);
762 aux
->ddc
.algo
= &drm_dp_i2c_algo
;
763 aux
->ddc
.algo_data
= aux
;
764 aux
->ddc
.retries
= 3;
766 aux
->ddc
.class = I2C_CLASS_DDC
;
767 aux
->ddc
.owner
= THIS_MODULE
;
768 aux
->ddc
.dev
.parent
= aux
->dev
;
769 aux
->ddc
.dev
.of_node
= aux
->dev
->of_node
;
771 strlcpy(aux
->ddc
.name
, aux
->name
? aux
->name
: dev_name(aux
->dev
),
772 sizeof(aux
->ddc
.name
));
774 ret
= drm_dp_aux_register_devnode(aux
);
778 ret
= i2c_add_adapter(&aux
->ddc
);
780 drm_dp_aux_unregister_devnode(aux
);
786 EXPORT_SYMBOL(drm_dp_aux_register
);
789 * drm_dp_aux_unregister() - unregister an AUX adapter
790 * @aux: DisplayPort AUX channel
792 void drm_dp_aux_unregister(struct drm_dp_aux
*aux
)
794 drm_dp_aux_unregister_devnode(aux
);
795 i2c_del_adapter(&aux
->ddc
);
797 EXPORT_SYMBOL(drm_dp_aux_unregister
);