drivers/gpu/drm/drm_dp_helper.c

   1 /*
   2  * Copyright © 2009 Keith Packard
   3  *
   4  * Permission to use, copy, modify, distribute, and sell this software and its
   5  * documentation for any purpose is hereby granted without fee, provided that
   6  * the above copyright notice appear in all copies and that both that copyright
   7  * notice and this permission notice appear in supporting documentation, and
   8  * that the name of the copyright holders not be used in advertising or
   9  * publicity pertaining to distribution of the software without specific,
  10  * written prior permission.  The copyright holders make no representations
  11  * about the suitability of this software for any purpose.  It is provided "as
  12  * is" without express or implied warranty.
  13  *
  14  * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16  * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  20  * OF THIS SOFTWARE.
  21  */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/errno.h>
  28 #include <linux/sched.h>
  29 #include <linux/i2c.h>
  30 #include <drm/drm_dp_helper.h>
  31 #include <drm/drm_dp_aux_dev.h>
  32 #include <drm/drmP.h>
  33
  34 /**
  35  * DOC: dp helpers
  36  *
  37  * These functions contain some common logic and helpers at various abstraction
  38  * levels to deal with Display Port sink devices and related things like DP aux
  39  * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
  40  * blocks, ...
  41  */
  42
  43 /* Helpers for DP link training */
  44 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
  45 {
  46         return link_status[r - DP_LANE0_1_STATUS];
  47 }
  48
  49 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
  50                              int lane)
  51 {
  52         int i = DP_LANE0_1_STATUS + (lane >> 1);
  53         int s = (lane & 1) * 4;
  54         u8 l = dp_link_status(link_status, i);
  55         return (l >> s) & 0xf;
  56 }
  57
  58 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  59                           int lane_count)
  60 {
  61         u8 lane_align;
  62         u8 lane_status;
  63         int lane;
  64
  65         lane_align = dp_link_status(link_status,
  66                                     DP_LANE_ALIGN_STATUS_UPDATED);
  67         if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
  68                 return false;
  69         for (lane = 0; lane < lane_count; lane++) {
  70                 lane_status = dp_get_lane_status(link_status, lane);
  71                 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
  72                         return false;
  73         }
  74         return true;
  75 }
  76 EXPORT_SYMBOL(drm_dp_channel_eq_ok);
  77
  78 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  79                               int lane_count)
  80 {
  81         int lane;
  82         u8 lane_status;
  83
  84         for (lane = 0; lane < lane_count; lane++) {
  85                 lane_status = dp_get_lane_status(link_status, lane);
  86                 if ((lane_status & DP_LANE_CR_DONE) == 0)
  87                         return false;
  88         }
  89         return true;
  90 }
  91 EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
  92
  93 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
  94                                      int lane)
  95 {
  96         int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
  97         int s = ((lane & 1) ?
  98                  DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
  99                  DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
 100         u8 l = dp_link_status(link_status, i);
 101
 102         return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
 103 }
 104 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
 105
 106 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
 107                                           int lane)
 108 {
 109         int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
 110         int s = ((lane & 1) ?
 111                  DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
 112                  DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
 113         u8 l = dp_link_status(link_status, i);
 114
 115         return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
 116 }
 117 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
 118
 119 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
 120         if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
 121                 udelay(100);
 122         else
 123                 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
 124 }
 125 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
 126
 127 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
 128         if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
 129                 udelay(400);
 130         else
 131                 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
 132 }
 133 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
 134
 135 u8 drm_dp_link_rate_to_bw_code(int link_rate)
 136 {
 137         switch (link_rate) {
 138         case 162000:
 139         default:
 140                 return DP_LINK_BW_1_62;
 141         case 270000:
 142                 return DP_LINK_BW_2_7;
 143         case 540000:
 144                 return DP_LINK_BW_5_4;
 145         }
 146 }
 147 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
 148
 149 int drm_dp_bw_code_to_link_rate(u8 link_bw)
 150 {
 151         switch (link_bw) {
 152         case DP_LINK_BW_1_62:
 153         default:
 154                 return 162000;
 155         case DP_LINK_BW_2_7:
 156                 return 270000;
 157         case DP_LINK_BW_5_4:
 158                 return 540000;
 159         }
 160 }
 161 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
 162
 163 #define AUX_RETRY_INTERVAL 500 /* us */
 164
 165 /**
 166  * DOC: dp helpers
 167  *
 168  * The DisplayPort AUX channel is an abstraction to allow generic, driver-
 169  * independent access to AUX functionality. Drivers can take advantage of
 170  * this by filling in the fields of the drm_dp_aux structure.
 171  *
 172  * Transactions are described using a hardware-independent drm_dp_aux_msg
 173  * structure, which is passed into a driver's .transfer() implementation.
 174  * Both native and I2C-over-AUX transactions are supported.
 175  */
 176
 177 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
 178                               unsigned int offset, void *buffer, size_t size)
 179 {
 180         struct drm_dp_aux_msg msg;
 181         unsigned int retry, native_reply;
 182         int err = 0, ret = 0;
 183
 184         memset(&msg, 0, sizeof(msg));
 185         msg.address = offset;
 186         msg.request = request;
 187         msg.buffer = buffer;
 188         msg.size = size;
 189
 190         mutex_lock(&aux->hw_mutex);
 191
 192         /*
 193          * The specification doesn't give any recommendation on how often to
 194          * retry native transactions. We used to retry 7 times like for
 195          * aux i2c transactions but real world devices this wasn't
 196          * sufficient, bump to 32 which makes Dell 4k monitors happier.
 197          */
 198         for (retry = 0; retry < 32; retry++) {
 199                 if (ret != 0 && ret != -ETIMEDOUT) {
 200                         usleep_range(AUX_RETRY_INTERVAL,
 201                                      AUX_RETRY_INTERVAL + 100);
 202                 }
 203
 204                 ret = aux->transfer(aux, &msg);
 205
 206                 if (ret >= 0) {
 207                         native_reply = msg.reply & DP_AUX_NATIVE_REPLY_MASK;
 208                         if (native_reply == DP_AUX_NATIVE_REPLY_ACK) {
 209                                 if (ret == size)
 210                                         goto unlock;
 211
 212                                 ret = -EPROTO;
 213                         } else
 214                                 ret = -EIO;
 215                 }
 216
 217                 /*
 218                  * We want the error we return to be the error we received on
 219                  * the first transaction, since we may get a different error the
 220                  * next time we retry
 221                  */
 222                 if (!err)
 223                         err = ret;
 224         }
 225
 226         DRM_DEBUG_KMS("too many retries, giving up\n");
 227         ret = err;
 228
 229 unlock:
 230         mutex_unlock(&aux->hw_mutex);
 231         return ret;
 232 }
 233
 234 /**
 235  * drm_dp_dpcd_read() - read a series of bytes from the DPCD
 236  * @aux: DisplayPort AUX channel
 237  * @offset: address of the (first) register to read
 238  * @buffer: buffer to store the register values
 239  * @size: number of bytes in @buffer
 240  *
 241  * Returns the number of bytes transferred on success, or a negative error
 242  * code on failure. -EIO is returned if the request was NAKed by the sink or
 243  * if the retry count was exceeded. If not all bytes were transferred, this
 244  * function returns -EPROTO. Errors from the underlying AUX channel transfer
 245  * function, with the exception of -EBUSY (which causes the transaction to
 246  * be retried), are propagated to the caller.
 247  */
 248 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
 249                          void *buffer, size_t size)
 250 {
 251         int ret;
 252
 253         /*
 254          * HP ZR24w corrupts the first DPCD access after entering power save
 255          * mode. Eg. on a read, the entire buffer will be filled with the same
 256          * byte. Do a throw away read to avoid corrupting anything we care
 257          * about. Afterwards things will work correctly until the monitor
 258          * gets woken up and subsequently re-enters power save mode.
 259          *
 260          * The user pressing any button on the monitor is enough to wake it
 261          * up, so there is no particularly good place to do the workaround.
 262          * We just have to do it before any DPCD access and hope that the
 263          * monitor doesn't power down exactly after the throw away read.
 264          */
 265         ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV, buffer,
 266                                  1);
 267         if (ret != 1)
 268                 return ret;
 269
 270         return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
 271                                   size);
 272 }
 273 EXPORT_SYMBOL(drm_dp_dpcd_read);
 274
 275 /**
 276  * drm_dp_dpcd_write() - write a series of bytes to the DPCD
 277  * @aux: DisplayPort AUX channel
 278  * @offset: address of the (first) register to write
 279  * @buffer: buffer containing the values to write
 280  * @size: number of bytes in @buffer
 281  *
 282  * Returns the number of bytes transferred on success, or a negative error
 283  * code on failure. -EIO is returned if the request was NAKed by the sink or
 284  * if the retry count was exceeded. If not all bytes were transferred, this
 285  * function returns -EPROTO. Errors from the underlying AUX channel transfer
 286  * function, with the exception of -EBUSY (which causes the transaction to
 287  * be retried), are propagated to the caller.
 288  */
 289 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
 290                           void *buffer, size_t size)
 291 {
 292         return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
 293                                   size);
 294 }
 295 EXPORT_SYMBOL(drm_dp_dpcd_write);
 296
 297 /**
 298  * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
 299  * @aux: DisplayPort AUX channel
 300  * @status: buffer to store the link status in (must be at least 6 bytes)
 301  *
 302  * Returns the number of bytes transferred on success or a negative error
 303  * code on failure.
 304  */
 305 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
 306                                  u8 status[DP_LINK_STATUS_SIZE])
 307 {
 308         return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
 309                                 DP_LINK_STATUS_SIZE);
 310 }
 311 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
 312
 313 /**
 314  * drm_dp_link_probe() - probe a DisplayPort link for capabilities
 315  * @aux: DisplayPort AUX channel
 316  * @link: pointer to structure in which to return link capabilities
 317  *
 318  * The structure filled in by this function can usually be passed directly
 319  * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
 320  * configure the link based on the link's capabilities.
 321  *
 322  * Returns 0 on success or a negative error code on failure.
 323  */
 324 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
 325 {
 326         u8 values[3];
 327         int err;
 328
 329         memset(link, 0, sizeof(*link));
 330
 331         err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
 332         if (err < 0)
 333                 return err;
 334
 335         link->revision = values[0];
 336         link->rate = drm_dp_bw_code_to_link_rate(values[1]);
 337         link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
 338
 339         if (values[2] & DP_ENHANCED_FRAME_CAP)
 340                 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
 341
 342         return 0;
 343 }
 344 EXPORT_SYMBOL(drm_dp_link_probe);
 345
 346 /**
 347  * drm_dp_link_power_up() - power up a DisplayPort link
 348  * @aux: DisplayPort AUX channel
 349  * @link: pointer to a structure containing the link configuration
 350  *
 351  * Returns 0 on success or a negative error code on failure.
 352  */
 353 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
 354 {
 355         u8 value;
 356         int err;
 357
 358         /* DP_SET_POWER register is only available on DPCD v1.1 and later */
 359         if (link->revision < 0x11)
 360                 return 0;
 361
 362         err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
 363         if (err < 0)
 364                 return err;
 365
 366         value &= ~DP_SET_POWER_MASK;
 367         value |= DP_SET_POWER_D0;
 368
 369         err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
 370         if (err < 0)
 371                 return err;
 372
 373         /*
 374          * According to the DP 1.1 specification, a "Sink Device must exit the
 375          * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
 376          * Control Field" (register 0x600).
 377          */
 378         usleep_range(1000, 2000);
 379
 380         return 0;
 381 }
 382 EXPORT_SYMBOL(drm_dp_link_power_up);
 383
 384 /**
 385  * drm_dp_link_power_down() - power down a DisplayPort link
 386  * @aux: DisplayPort AUX channel
 387  * @link: pointer to a structure containing the link configuration
 388  *
 389  * Returns 0 on success or a negative error code on failure.
 390  */
 391 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
 392 {
 393         u8 value;
 394         int err;
 395
 396         /* DP_SET_POWER register is only available on DPCD v1.1 and later */
 397         if (link->revision < 0x11)
 398                 return 0;
 399
 400         err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
 401         if (err < 0)
 402                 return err;
 403
 404         value &= ~DP_SET_POWER_MASK;
 405         value |= DP_SET_POWER_D3;
 406
 407         err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
 408         if (err < 0)
 409                 return err;
 410
 411         return 0;
 412 }
 413 EXPORT_SYMBOL(drm_dp_link_power_down);
 414
 415 /**
 416  * drm_dp_link_configure() - configure a DisplayPort link
 417  * @aux: DisplayPort AUX channel
 418  * @link: pointer to a structure containing the link configuration
 419  *
 420  * Returns 0 on success or a negative error code on failure.
 421  */
 422 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
 423 {
 424         u8 values[2];
 425         int err;
 426
 427         values[0] = drm_dp_link_rate_to_bw_code(link->rate);
 428         values[1] = link->num_lanes;
 429
 430         if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
 431                 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
 432
 433         err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
 434         if (err < 0)
 435                 return err;
 436
 437         return 0;
 438 }
 439 EXPORT_SYMBOL(drm_dp_link_configure);
 440
 441 /*
 442  * I2C-over-AUX implementation
 443  */
 444
 445 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
 446 {
 447         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
 448                I2C_FUNC_SMBUS_READ_BLOCK_DATA |
 449                I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
 450                I2C_FUNC_10BIT_ADDR;
 451 }
 452
 453 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg)
 454 {
 455         /*
 456          * In case of i2c defer or short i2c ack reply to a write,
 457          * we need to switch to WRITE_STATUS_UPDATE to drain the
 458          * rest of the message
 459          */
 460         if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) {
 461                 msg->request &= DP_AUX_I2C_MOT;
 462                 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE;
 463         }
 464 }
 465
 466 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */
 467 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */
 468 #define AUX_STOP_LEN 4
 469 #define AUX_CMD_LEN 4
 470 #define AUX_ADDRESS_LEN 20
 471 #define AUX_REPLY_PAD_LEN 4
 472 #define AUX_LENGTH_LEN 8
 473
 474 /*
 475  * Calculate the duration of the AUX request/reply in usec. Gives the
 476  * "best" case estimate, ie. successful while as short as possible.
 477  */
 478 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg)
 479 {
 480         int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
 481                 AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN;
 482
 483         if ((msg->request & DP_AUX_I2C_READ) == 0)
 484                 len += msg->size * 8;
 485
 486         return len;
 487 }
 488
 489 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg)
 490 {
 491         int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
 492                 AUX_CMD_LEN + AUX_REPLY_PAD_LEN;
 493
 494         /*
 495          * For read we expect what was asked. For writes there will
 496          * be 0 or 1 data bytes. Assume 0 for the "best" case.
 497          */
 498         if (msg->request & DP_AUX_I2C_READ)
 499                 len += msg->size * 8;
 500
 501         return len;
 502 }
 503
 504 #define I2C_START_LEN 1
 505 #define I2C_STOP_LEN 1
 506 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */
 507 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */
 508
 509 /*
 510  * Calculate the length of the i2c transfer in usec, assuming
 511  * the i2c bus speed is as specified. Gives the the "worst"
 512  * case estimate, ie. successful while as long as possible.
 513  * Doesn't account the the "MOT" bit, and instead assumes each
 514  * message includes a START, ADDRESS and STOP. Neither does it
 515  * account for additional random variables such as clock stretching.
 516  */
 517 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg,
 518                                    int i2c_speed_khz)
 519 {
 520         /* AUX bitrate is 1MHz, i2c bitrate as specified */
 521         return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN +
 522                              msg->size * I2C_DATA_LEN +
 523                              I2C_STOP_LEN) * 1000, i2c_speed_khz);
 524 }
 525
 526 /*
 527  * Deterine how many retries should be attempted to successfully transfer
 528  * the specified message, based on the estimated durations of the
 529  * i2c and AUX transfers.
 530  */
 531 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg,
 532                               int i2c_speed_khz)
 533 {
 534         int aux_time_us = drm_dp_aux_req_duration(msg) +
 535                 drm_dp_aux_reply_duration(msg);
 536         int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz);
 537
 538         return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL);
 539 }
 540
 541 /*
 542  * FIXME currently assumes 10 kHz as some real world devices seem
 543  * to require it. We should query/set the speed via DPCD if supported.
 544  */
 545 static int dp_aux_i2c_speed_khz __read_mostly = 10;
 546 module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644);
 547 MODULE_PARM_DESC(dp_aux_i2c_speed_khz,
 548                  "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
 549
 550 /*
 551  * Transfer a single I2C-over-AUX message and handle various error conditions,
 552  * retrying the transaction as appropriate.  It is assumed that the
 553  * aux->transfer function does not modify anything in the msg other than the
 554  * reply field.
 555  *
 556  * Returns bytes transferred on success, or a negative error code on failure.
 557  */
 558 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 559 {
 560         unsigned int retry, defer_i2c;
 561         int ret;
 562         /*
 563          * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
 564          * is required to retry at least seven times upon receiving AUX_DEFER
 565          * before giving up the AUX transaction.
 566          *
 567          * We also try to account for the i2c bus speed.
 568          */
 569         int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz));
 570
 571         for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) {
 572                 ret = aux->transfer(aux, msg);
 573                 if (ret < 0) {
 574                         if (ret == -EBUSY)
 575                                 continue;
 576
 577                         DRM_DEBUG_KMS("transaction failed: %d\n", ret);
 578                         return ret;
 579                 }
 580
 581
 582                 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
 583                 case DP_AUX_NATIVE_REPLY_ACK:
 584                         /*
 585                          * For I2C-over-AUX transactions this isn't enough, we
 586                          * need to check for the I2C ACK reply.
 587                          */
 588                         break;
 589
 590                 case DP_AUX_NATIVE_REPLY_NACK:
 591                         DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size);
 592                         return -EREMOTEIO;
 593
 594                 case DP_AUX_NATIVE_REPLY_DEFER:
 595                         DRM_DEBUG_KMS("native defer\n");
 596                         /*
 597                          * We could check for I2C bit rate capabilities and if
 598                          * available adjust this interval. We could also be
 599                          * more careful with DP-to-legacy adapters where a
 600                          * long legacy cable may force very low I2C bit rates.
 601                          *
 602                          * For now just defer for long enough to hopefully be
 603                          * safe for all use-cases.
 604                          */
 605                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 606                         continue;
 607
 608                 default:
 609                         DRM_ERROR("invalid native reply %#04x\n", msg->reply);
 610                         return -EREMOTEIO;
 611                 }
 612
 613                 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
 614                 case DP_AUX_I2C_REPLY_ACK:
 615                         /*
 616                          * Both native ACK and I2C ACK replies received. We
 617                          * can assume the transfer was successful.
 618                          */
 619                         if (ret != msg->size)
 620                                 drm_dp_i2c_msg_write_status_update(msg);
 621                         return ret;
 622
 623                 case DP_AUX_I2C_REPLY_NACK:
 624                         DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size);
 625                         aux->i2c_nack_count++;
 626                         return -EREMOTEIO;
 627
 628                 case DP_AUX_I2C_REPLY_DEFER:
 629                         DRM_DEBUG_KMS("I2C defer\n");
 630                         /* DP Compliance Test 4.2.2.5 Requirement:
 631                          * Must have at least 7 retries for I2C defers on the
 632                          * transaction to pass this test
 633                          */
 634                         aux->i2c_defer_count++;
 635                         if (defer_i2c < 7)
 636                                 defer_i2c++;
 637                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 638                         drm_dp_i2c_msg_write_status_update(msg);
 639
 640                         continue;
 641
 642                 default:
 643                         DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
 644                         return -EREMOTEIO;
 645                 }
 646         }
 647
 648         DRM_DEBUG_KMS("too many retries, giving up\n");
 649         return -EREMOTEIO;
 650 }
 651
 652 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg,
 653                                        const struct i2c_msg *i2c_msg)
 654 {
 655         msg->request = (i2c_msg->flags & I2C_M_RD) ?
 656                 DP_AUX_I2C_READ : DP_AUX_I2C_WRITE;
 657         msg->request |= DP_AUX_I2C_MOT;
 658 }
 659
 660 /*
 661  * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
 662  *
 663  * Returns an error code on failure, or a recommended transfer size on success.
 664  */
 665 static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg)
 666 {
 667         int err, ret = orig_msg->size;
 668         struct drm_dp_aux_msg msg = *orig_msg;
 669
 670         while (msg.size > 0) {
 671                 err = drm_dp_i2c_do_msg(aux, &msg);
 672                 if (err <= 0)
 673                         return err == 0 ? -EPROTO : err;
 674
 675                 if (err < msg.size && err < ret) {
 676                         DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
 677                                       msg.size, err);
 678                         ret = err;
 679                 }
 680
 681                 msg.size -= err;
 682                 msg.buffer += err;
 683         }
 684
 685         return ret;
 686 }
 687
 688 /*
 689  * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
 690  * packets to be as large as possible. If not, the I2C transactions never
 691  * succeed. Hence the default is maximum.
 692  */
 693 static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES;
 694 module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644);
 695 MODULE_PARM_DESC(dp_aux_i2c_transfer_size,
 696                  "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
 697
 698 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
 699                            int num)
 700 {
 701         struct drm_dp_aux *aux = adapter->algo_data;
 702         unsigned int i, j;
 703         unsigned transfer_size;
 704         struct drm_dp_aux_msg msg;
 705         int err = 0;
 706
 707         dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
 708
 709         memset(&msg, 0, sizeof(msg));
 710
 711         for (i = 0; i < num; i++) {
 712                 msg.address = msgs[i].addr;
 713                 drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
 714                 /* Send a bare address packet to start the transaction.
 715                  * Zero sized messages specify an address only (bare
 716                  * address) transaction.
 717                  */
 718                 msg.buffer = NULL;
 719                 msg.size = 0;
 720                 err = drm_dp_i2c_do_msg(aux, &msg);
 721
 722                 /*
 723                  * Reset msg.request in case in case it got
 724                  * changed into a WRITE_STATUS_UPDATE.
 725                  */
 726                 drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
 727
 728                 if (err < 0)
 729                         break;
 730                 /* We want each transaction to be as large as possible, but
 731                  * we'll go to smaller sizes if the hardware gives us a
 732                  * short reply.
 733                  */
 734                 transfer_size = dp_aux_i2c_transfer_size;
 735                 for (j = 0; j < msgs[i].len; j += msg.size) {
 736                         msg.buffer = msgs[i].buf + j;
 737                         msg.size = min(transfer_size, msgs[i].len - j);
 738
 739                         err = drm_dp_i2c_drain_msg(aux, &msg);
 740
 741                         /*
 742                          * Reset msg.request in case in case it got
 743                          * changed into a WRITE_STATUS_UPDATE.
 744                          */
 745                         drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
 746
 747                         if (err < 0)
 748                                 break;
 749                         transfer_size = err;
 750                 }
 751                 if (err < 0)
 752                         break;
 753         }
 754         if (err >= 0)
 755                 err = num;
 756         /* Send a bare address packet to close out the transaction.
 757          * Zero sized messages specify an address only (bare
 758          * address) transaction.
 759          */
 760         msg.request &= ~DP_AUX_I2C_MOT;
 761         msg.buffer = NULL;
 762         msg.size = 0;
 763         (void)drm_dp_i2c_do_msg(aux, &msg);
 764
 765         return err;
 766 }
 767
 768 static const struct i2c_algorithm drm_dp_i2c_algo = {
 769         .functionality = drm_dp_i2c_functionality,
 770         .master_xfer = drm_dp_i2c_xfer,
 771 };
 772
 773 static struct drm_dp_aux *i2c_to_aux(struct i2c_adapter *i2c)
 774 {
 775         return container_of(i2c, struct drm_dp_aux, ddc);
 776 }
 777
 778 static void lock_bus(struct i2c_adapter *i2c, unsigned int flags)
 779 {
 780         mutex_lock(&i2c_to_aux(i2c)->hw_mutex);
 781 }
 782
 783 static int trylock_bus(struct i2c_adapter *i2c, unsigned int flags)
 784 {
 785         return mutex_trylock(&i2c_to_aux(i2c)->hw_mutex);
 786 }
 787
 788 static void unlock_bus(struct i2c_adapter *i2c, unsigned int flags)
 789 {
 790         mutex_unlock(&i2c_to_aux(i2c)->hw_mutex);
 791 }
 792
 793 /**
 794  * drm_dp_aux_init() - minimally initialise an aux channel
 795  * @aux: DisplayPort AUX channel
 796  *
 797  * If you need to use the drm_dp_aux's i2c adapter prior to registering it
 798  * with the outside world, call drm_dp_aux_init() first. You must still
 799  * call drm_dp_aux_register() once the connector has been registered to
 800  * allow userspace access to the auxiliary DP channel.
 801  */
 802 void drm_dp_aux_init(struct drm_dp_aux *aux)
 803 {
 804         mutex_init(&aux->hw_mutex);
 805
 806         aux->ddc.algo = &drm_dp_i2c_algo;
 807         aux->ddc.algo_data = aux;
 808         aux->ddc.retries = 3;
 809
 810         aux->ddc.lock_bus = lock_bus;
 811         aux->ddc.trylock_bus = trylock_bus;
 812         aux->ddc.unlock_bus = unlock_bus;
 813 }
 814 EXPORT_SYMBOL(drm_dp_aux_init);
 815
 816 /**
 817  * drm_dp_aux_register() - initialise and register aux channel
 818  * @aux: DisplayPort AUX channel
 819  *
 820  * Automatically calls drm_dp_aux_init() if this hasn't been done yet.
 821  *
 822  * Returns 0 on success or a negative error code on failure.
 823  */
 824 int drm_dp_aux_register(struct drm_dp_aux *aux)
 825 {
 826         int ret;
 827
 828         if (!aux->ddc.algo)
 829                 drm_dp_aux_init(aux);
 830
 831         aux->ddc.class = I2C_CLASS_DDC;
 832         aux->ddc.owner = THIS_MODULE;
 833         aux->ddc.dev.parent = aux->dev;
 834         aux->ddc.dev.of_node = aux->dev->of_node;
 835
 836         strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
 837                 sizeof(aux->ddc.name));
 838
 839         ret = drm_dp_aux_register_devnode(aux);
 840         if (ret)
 841                 return ret;
 842
 843         ret = i2c_add_adapter(&aux->ddc);
 844         if (ret) {
 845                 drm_dp_aux_unregister_devnode(aux);
 846                 return ret;
 847         }
 848
 849         return 0;
 850 }
 851 EXPORT_SYMBOL(drm_dp_aux_register);
 852
 853 /**
 854  * drm_dp_aux_unregister() - unregister an AUX adapter
 855  * @aux: DisplayPort AUX channel
 856  */
 857 void drm_dp_aux_unregister(struct drm_dp_aux *aux)
 858 {
 859         drm_dp_aux_unregister_devnode(aux);
 860         i2c_del_adapter(&aux->ddc);
 861 }
 862 EXPORT_SYMBOL(drm_dp_aux_unregister);
 863
 864 #define PSR_SETUP_TIME(x) [DP_PSR_SETUP_TIME_ ## x >> DP_PSR_SETUP_TIME_SHIFT] = (x)
 865
 866 /**
 867  * drm_dp_psr_setup_time() - PSR setup in time usec
 868  * @psr_cap: PSR capabilities from DPCD
 869  *
 870  * Returns:
 871  * PSR setup time for the panel in microseconds,  negative
 872  * error code on failure.
 873  */
 874 int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
 875 {
 876         static const u16 psr_setup_time_us[] = {
 877                 PSR_SETUP_TIME(330),
 878                 PSR_SETUP_TIME(275),
 879                 PSR_SETUP_TIME(165),
 880                 PSR_SETUP_TIME(110),
 881                 PSR_SETUP_TIME(55),
 882                 PSR_SETUP_TIME(0),
 883         };
 884         int i;
 885
 886         i = (psr_cap[1] & DP_PSR_SETUP_TIME_MASK) >> DP_PSR_SETUP_TIME_SHIFT;
 887         if (i >= ARRAY_SIZE(psr_setup_time_us))
 888                 return -EINVAL;
 889
 890         return psr_setup_time_us[i];
 891 }
 892 EXPORT_SYMBOL(drm_dp_psr_setup_time);
 893
 894 #undef PSR_SETUP_TIME