2 * i.MX IPUv3 Graphics driver
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <linux/clk.h>
25 #include <linux/errno.h>
26 #include <drm/drm_gem_cma_helper.h>
27 #include <drm/drm_fb_cma_helper.h>
29 #include <video/imx-ipu-v3.h>
31 #include "ipuv3-plane.h"
33 #define DRIVER_DESC "i.MX IPUv3 Graphics"
38 struct imx_drm_crtc
*imx_crtc
;
40 /* plane[0] is the full plane, plane[1] is the partial plane */
41 struct ipu_plane
*plane
[2];
48 static inline struct ipu_crtc
*to_ipu_crtc(struct drm_crtc
*crtc
)
50 return container_of(crtc
, struct ipu_crtc
, base
);
53 static void ipu_crtc_enable(struct drm_crtc
*crtc
)
55 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
56 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
59 ipu_dc_enable_channel(ipu_crtc
->dc
);
60 ipu_di_enable(ipu_crtc
->di
);
63 static void ipu_crtc_disable(struct drm_crtc
*crtc
)
65 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
66 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
68 ipu_dc_disable_channel(ipu_crtc
->dc
);
69 ipu_di_disable(ipu_crtc
->di
);
72 spin_lock_irq(&crtc
->dev
->event_lock
);
73 if (crtc
->state
->event
) {
74 drm_crtc_send_vblank_event(crtc
, crtc
->state
->event
);
75 crtc
->state
->event
= NULL
;
77 spin_unlock_irq(&crtc
->dev
->event_lock
);
79 drm_crtc_vblank_off(crtc
);
82 static void imx_drm_crtc_reset(struct drm_crtc
*crtc
)
84 struct imx_crtc_state
*state
;
87 if (crtc
->state
->mode_blob
)
88 drm_property_unreference_blob(crtc
->state
->mode_blob
);
90 state
= to_imx_crtc_state(crtc
->state
);
91 memset(state
, 0, sizeof(*state
));
93 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
96 crtc
->state
= &state
->base
;
99 state
->base
.crtc
= crtc
;
102 static struct drm_crtc_state
*imx_drm_crtc_duplicate_state(struct drm_crtc
*crtc
)
104 struct imx_crtc_state
*state
;
106 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
110 __drm_atomic_helper_crtc_duplicate_state(crtc
, &state
->base
);
112 WARN_ON(state
->base
.crtc
!= crtc
);
113 state
->base
.crtc
= crtc
;
118 static void imx_drm_crtc_destroy_state(struct drm_crtc
*crtc
,
119 struct drm_crtc_state
*state
)
121 __drm_atomic_helper_crtc_destroy_state(state
);
122 kfree(to_imx_crtc_state(state
));
125 static const struct drm_crtc_funcs ipu_crtc_funcs
= {
126 .set_config
= drm_atomic_helper_set_config
,
127 .destroy
= drm_crtc_cleanup
,
128 .page_flip
= drm_atomic_helper_page_flip
,
129 .reset
= imx_drm_crtc_reset
,
130 .atomic_duplicate_state
= imx_drm_crtc_duplicate_state
,
131 .atomic_destroy_state
= imx_drm_crtc_destroy_state
,
134 static irqreturn_t
ipu_irq_handler(int irq
, void *dev_id
)
136 struct ipu_crtc
*ipu_crtc
= dev_id
;
138 drm_crtc_handle_vblank(&ipu_crtc
->base
);
143 static bool ipu_crtc_mode_fixup(struct drm_crtc
*crtc
,
144 const struct drm_display_mode
*mode
,
145 struct drm_display_mode
*adjusted_mode
)
147 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
151 drm_display_mode_to_videomode(adjusted_mode
, &vm
);
153 ret
= ipu_di_adjust_videomode(ipu_crtc
->di
, &vm
);
157 if ((vm
.vsync_len
== 0) || (vm
.hsync_len
== 0))
160 drm_display_mode_from_videomode(&vm
, adjusted_mode
);
165 static int ipu_crtc_atomic_check(struct drm_crtc
*crtc
,
166 struct drm_crtc_state
*state
)
168 u32 primary_plane_mask
= 1 << drm_plane_index(crtc
->primary
);
170 if (state
->active
&& (primary_plane_mask
& state
->plane_mask
) == 0)
176 static void ipu_crtc_atomic_begin(struct drm_crtc
*crtc
,
177 struct drm_crtc_state
*old_crtc_state
)
179 drm_crtc_vblank_on(crtc
);
181 spin_lock_irq(&crtc
->dev
->event_lock
);
182 if (crtc
->state
->event
) {
183 WARN_ON(drm_crtc_vblank_get(crtc
));
184 drm_crtc_arm_vblank_event(crtc
, crtc
->state
->event
);
185 crtc
->state
->event
= NULL
;
187 spin_unlock_irq(&crtc
->dev
->event_lock
);
190 static void ipu_crtc_mode_set_nofb(struct drm_crtc
*crtc
)
192 struct drm_device
*dev
= crtc
->dev
;
193 struct drm_encoder
*encoder
;
194 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
195 struct drm_display_mode
*mode
= &crtc
->state
->adjusted_mode
;
196 struct imx_crtc_state
*imx_crtc_state
= to_imx_crtc_state(crtc
->state
);
197 struct ipu_di_signal_cfg sig_cfg
= {};
198 unsigned long encoder_types
= 0;
200 dev_dbg(ipu_crtc
->dev
, "%s: mode->hdisplay: %d\n", __func__
,
202 dev_dbg(ipu_crtc
->dev
, "%s: mode->vdisplay: %d\n", __func__
,
205 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
, head
) {
206 if (encoder
->crtc
== crtc
)
207 encoder_types
|= BIT(encoder
->encoder_type
);
210 dev_dbg(ipu_crtc
->dev
, "%s: attached to encoder types 0x%lx\n",
211 __func__
, encoder_types
);
214 * If we have DAC or LDB, then we need the IPU DI clock to be
215 * the same as the LDB DI clock. For TVDAC, derive the IPU DI
216 * clock from 27 MHz TVE_DI clock, but allow to divide it.
218 if (encoder_types
& (BIT(DRM_MODE_ENCODER_DAC
) |
219 BIT(DRM_MODE_ENCODER_LVDS
)))
220 sig_cfg
.clkflags
= IPU_DI_CLKMODE_SYNC
| IPU_DI_CLKMODE_EXT
;
221 else if (encoder_types
& BIT(DRM_MODE_ENCODER_TVDAC
))
222 sig_cfg
.clkflags
= IPU_DI_CLKMODE_EXT
;
224 sig_cfg
.clkflags
= 0;
226 sig_cfg
.enable_pol
= !(imx_crtc_state
->bus_flags
& DRM_BUS_FLAG_DE_LOW
);
227 /* Default to driving pixel data on negative clock edges */
228 sig_cfg
.clk_pol
= !!(imx_crtc_state
->bus_flags
&
229 DRM_BUS_FLAG_PIXDATA_POSEDGE
);
230 sig_cfg
.bus_format
= imx_crtc_state
->bus_format
;
231 sig_cfg
.v_to_h_sync
= 0;
232 sig_cfg
.hsync_pin
= imx_crtc_state
->di_hsync_pin
;
233 sig_cfg
.vsync_pin
= imx_crtc_state
->di_vsync_pin
;
235 drm_display_mode_to_videomode(mode
, &sig_cfg
.mode
);
237 ipu_dc_init_sync(ipu_crtc
->dc
, ipu_crtc
->di
,
238 mode
->flags
& DRM_MODE_FLAG_INTERLACE
,
239 imx_crtc_state
->bus_format
, mode
->hdisplay
);
240 ipu_di_init_sync_panel(ipu_crtc
->di
, &sig_cfg
);
243 static const struct drm_crtc_helper_funcs ipu_helper_funcs
= {
244 .mode_fixup
= ipu_crtc_mode_fixup
,
245 .mode_set_nofb
= ipu_crtc_mode_set_nofb
,
246 .atomic_check
= ipu_crtc_atomic_check
,
247 .atomic_begin
= ipu_crtc_atomic_begin
,
248 .disable
= ipu_crtc_disable
,
249 .enable
= ipu_crtc_enable
,
252 static int ipu_enable_vblank(struct drm_crtc
*crtc
)
254 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
256 enable_irq(ipu_crtc
->irq
);
261 static void ipu_disable_vblank(struct drm_crtc
*crtc
)
263 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
265 disable_irq_nosync(ipu_crtc
->irq
);
268 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs
= {
269 .enable_vblank
= ipu_enable_vblank
,
270 .disable_vblank
= ipu_disable_vblank
,
271 .crtc_funcs
= &ipu_crtc_funcs
,
272 .crtc_helper_funcs
= &ipu_helper_funcs
,
275 static void ipu_put_resources(struct ipu_crtc
*ipu_crtc
)
277 if (!IS_ERR_OR_NULL(ipu_crtc
->dc
))
278 ipu_dc_put(ipu_crtc
->dc
);
279 if (!IS_ERR_OR_NULL(ipu_crtc
->di
))
280 ipu_di_put(ipu_crtc
->di
);
283 static int ipu_get_resources(struct ipu_crtc
*ipu_crtc
,
284 struct ipu_client_platformdata
*pdata
)
286 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
289 ipu_crtc
->dc
= ipu_dc_get(ipu
, pdata
->dc
);
290 if (IS_ERR(ipu_crtc
->dc
)) {
291 ret
= PTR_ERR(ipu_crtc
->dc
);
295 ipu_crtc
->di
= ipu_di_get(ipu
, pdata
->di
);
296 if (IS_ERR(ipu_crtc
->di
)) {
297 ret
= PTR_ERR(ipu_crtc
->di
);
303 ipu_put_resources(ipu_crtc
);
308 static int ipu_crtc_init(struct ipu_crtc
*ipu_crtc
,
309 struct ipu_client_platformdata
*pdata
, struct drm_device
*drm
)
311 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
315 ret
= ipu_get_resources(ipu_crtc
, pdata
);
317 dev_err(ipu_crtc
->dev
, "getting resources failed with %d.\n",
323 dp
= IPU_DP_FLOW_SYNC_BG
;
324 ipu_crtc
->plane
[0] = ipu_plane_init(drm
, ipu
, pdata
->dma
[0], dp
, 0,
325 DRM_PLANE_TYPE_PRIMARY
);
326 if (IS_ERR(ipu_crtc
->plane
[0])) {
327 ret
= PTR_ERR(ipu_crtc
->plane
[0]);
328 goto err_put_resources
;
331 ret
= imx_drm_add_crtc(drm
, &ipu_crtc
->base
, &ipu_crtc
->imx_crtc
,
332 &ipu_crtc
->plane
[0]->base
, &ipu_crtc_helper_funcs
,
335 dev_err(ipu_crtc
->dev
, "adding crtc failed with %d.\n", ret
);
336 goto err_put_resources
;
339 ret
= ipu_plane_get_resources(ipu_crtc
->plane
[0]);
341 dev_err(ipu_crtc
->dev
, "getting plane 0 resources failed with %d.\n",
343 goto err_remove_crtc
;
346 /* If this crtc is using the DP, add an overlay plane */
347 if (pdata
->dp
>= 0 && pdata
->dma
[1] > 0) {
348 ipu_crtc
->plane
[1] = ipu_plane_init(drm
, ipu
, pdata
->dma
[1],
350 drm_crtc_mask(&ipu_crtc
->base
),
351 DRM_PLANE_TYPE_OVERLAY
);
352 if (IS_ERR(ipu_crtc
->plane
[1])) {
353 ipu_crtc
->plane
[1] = NULL
;
355 ret
= ipu_plane_get_resources(ipu_crtc
->plane
[1]);
357 dev_err(ipu_crtc
->dev
, "getting plane 1 "
358 "resources failed with %d.\n", ret
);
359 goto err_put_plane0_res
;
364 ipu_crtc
->irq
= ipu_plane_irq(ipu_crtc
->plane
[0]);
365 ret
= devm_request_irq(ipu_crtc
->dev
, ipu_crtc
->irq
, ipu_irq_handler
, 0,
366 "imx_drm", ipu_crtc
);
368 dev_err(ipu_crtc
->dev
, "irq request failed with %d.\n", ret
);
369 goto err_put_plane1_res
;
371 /* Only enable IRQ when we actually need it to trigger work. */
372 disable_irq(ipu_crtc
->irq
);
377 if (ipu_crtc
->plane
[1])
378 ipu_plane_put_resources(ipu_crtc
->plane
[1]);
380 ipu_plane_put_resources(ipu_crtc
->plane
[0]);
382 imx_drm_remove_crtc(ipu_crtc
->imx_crtc
);
384 ipu_put_resources(ipu_crtc
);
389 static int ipu_drm_bind(struct device
*dev
, struct device
*master
, void *data
)
391 struct ipu_client_platformdata
*pdata
= dev
->platform_data
;
392 struct drm_device
*drm
= data
;
393 struct ipu_crtc
*ipu_crtc
;
396 ipu_crtc
= devm_kzalloc(dev
, sizeof(*ipu_crtc
), GFP_KERNEL
);
402 ret
= ipu_crtc_init(ipu_crtc
, pdata
, drm
);
406 dev_set_drvdata(dev
, ipu_crtc
);
411 static void ipu_drm_unbind(struct device
*dev
, struct device
*master
,
414 struct ipu_crtc
*ipu_crtc
= dev_get_drvdata(dev
);
416 imx_drm_remove_crtc(ipu_crtc
->imx_crtc
);
418 ipu_put_resources(ipu_crtc
);
419 if (ipu_crtc
->plane
[1])
420 ipu_plane_put_resources(ipu_crtc
->plane
[1]);
421 ipu_plane_put_resources(ipu_crtc
->plane
[0]);
424 static const struct component_ops ipu_crtc_ops
= {
425 .bind
= ipu_drm_bind
,
426 .unbind
= ipu_drm_unbind
,
429 static int ipu_drm_probe(struct platform_device
*pdev
)
431 struct device
*dev
= &pdev
->dev
;
434 if (!dev
->platform_data
)
437 ret
= dma_set_coherent_mask(dev
, DMA_BIT_MASK(32));
441 return component_add(dev
, &ipu_crtc_ops
);
444 static int ipu_drm_remove(struct platform_device
*pdev
)
446 component_del(&pdev
->dev
, &ipu_crtc_ops
);
450 static struct platform_driver ipu_drm_driver
= {
452 .name
= "imx-ipuv3-crtc",
454 .probe
= ipu_drm_probe
,
455 .remove
= ipu_drm_remove
,
457 module_platform_driver(ipu_drm_driver
);
459 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
460 MODULE_DESCRIPTION(DRIVER_DESC
);
461 MODULE_LICENSE("GPL");
462 MODULE_ALIAS("platform:imx-ipuv3-crtc");