Merge remote-tracking branch 'iommu/next'
[deliverable/linux.git] / drivers / gpu / drm / imx / ipuv3-crtc.c
1 /*
2 * i.MX IPUv3 Graphics driver
3 *
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
20 #include <drm/drmP.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <linux/clk.h>
25 #include <linux/errno.h>
26 #include <drm/drm_gem_cma_helper.h>
27 #include <drm/drm_fb_cma_helper.h>
28
29 #include <video/imx-ipu-v3.h>
30 #include "imx-drm.h"
31 #include "ipuv3-plane.h"
32
33 #define DRIVER_DESC "i.MX IPUv3 Graphics"
34
35 struct ipu_crtc {
36 struct device *dev;
37 struct drm_crtc base;
38 struct imx_drm_crtc *imx_crtc;
39
40 /* plane[0] is the full plane, plane[1] is the partial plane */
41 struct ipu_plane *plane[2];
42
43 struct ipu_dc *dc;
44 struct ipu_di *di;
45 int irq;
46 };
47
48 static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
49 {
50 return container_of(crtc, struct ipu_crtc, base);
51 }
52
53 static void ipu_crtc_enable(struct drm_crtc *crtc)
54 {
55 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
56 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
57
58 ipu_dc_enable(ipu);
59 ipu_dc_enable_channel(ipu_crtc->dc);
60 ipu_di_enable(ipu_crtc->di);
61 }
62
63 static void ipu_crtc_disable(struct drm_crtc *crtc)
64 {
65 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
66 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
67
68 ipu_dc_disable_channel(ipu_crtc->dc);
69 ipu_di_disable(ipu_crtc->di);
70 ipu_dc_disable(ipu);
71
72 spin_lock_irq(&crtc->dev->event_lock);
73 if (crtc->state->event) {
74 drm_crtc_send_vblank_event(crtc, crtc->state->event);
75 crtc->state->event = NULL;
76 }
77 spin_unlock_irq(&crtc->dev->event_lock);
78
79 drm_crtc_vblank_off(crtc);
80 }
81
82 static void imx_drm_crtc_reset(struct drm_crtc *crtc)
83 {
84 struct imx_crtc_state *state;
85
86 if (crtc->state) {
87 if (crtc->state->mode_blob)
88 drm_property_unreference_blob(crtc->state->mode_blob);
89
90 state = to_imx_crtc_state(crtc->state);
91 memset(state, 0, sizeof(*state));
92 } else {
93 state = kzalloc(sizeof(*state), GFP_KERNEL);
94 if (!state)
95 return;
96 crtc->state = &state->base;
97 }
98
99 state->base.crtc = crtc;
100 }
101
102 static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
103 {
104 struct imx_crtc_state *state;
105
106 state = kzalloc(sizeof(*state), GFP_KERNEL);
107 if (!state)
108 return NULL;
109
110 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
111
112 WARN_ON(state->base.crtc != crtc);
113 state->base.crtc = crtc;
114
115 return &state->base;
116 }
117
118 static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
119 struct drm_crtc_state *state)
120 {
121 __drm_atomic_helper_crtc_destroy_state(state);
122 kfree(to_imx_crtc_state(state));
123 }
124
125 static const struct drm_crtc_funcs ipu_crtc_funcs = {
126 .set_config = drm_atomic_helper_set_config,
127 .destroy = drm_crtc_cleanup,
128 .page_flip = drm_atomic_helper_page_flip,
129 .reset = imx_drm_crtc_reset,
130 .atomic_duplicate_state = imx_drm_crtc_duplicate_state,
131 .atomic_destroy_state = imx_drm_crtc_destroy_state,
132 };
133
134 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
135 {
136 struct ipu_crtc *ipu_crtc = dev_id;
137
138 drm_crtc_handle_vblank(&ipu_crtc->base);
139
140 return IRQ_HANDLED;
141 }
142
143 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
144 const struct drm_display_mode *mode,
145 struct drm_display_mode *adjusted_mode)
146 {
147 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
148 struct videomode vm;
149 int ret;
150
151 drm_display_mode_to_videomode(adjusted_mode, &vm);
152
153 ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
154 if (ret)
155 return false;
156
157 if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
158 return false;
159
160 drm_display_mode_from_videomode(&vm, adjusted_mode);
161
162 return true;
163 }
164
165 static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
166 struct drm_crtc_state *state)
167 {
168 u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
169
170 if (state->active && (primary_plane_mask & state->plane_mask) == 0)
171 return -EINVAL;
172
173 return 0;
174 }
175
176 static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
177 struct drm_crtc_state *old_crtc_state)
178 {
179 drm_crtc_vblank_on(crtc);
180
181 spin_lock_irq(&crtc->dev->event_lock);
182 if (crtc->state->event) {
183 WARN_ON(drm_crtc_vblank_get(crtc));
184 drm_crtc_arm_vblank_event(crtc, crtc->state->event);
185 crtc->state->event = NULL;
186 }
187 spin_unlock_irq(&crtc->dev->event_lock);
188 }
189
190 static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
191 {
192 struct drm_device *dev = crtc->dev;
193 struct drm_encoder *encoder;
194 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
195 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
196 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
197 struct ipu_di_signal_cfg sig_cfg = {};
198 unsigned long encoder_types = 0;
199
200 dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
201 mode->hdisplay);
202 dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
203 mode->vdisplay);
204
205 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
206 if (encoder->crtc == crtc)
207 encoder_types |= BIT(encoder->encoder_type);
208 }
209
210 dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
211 __func__, encoder_types);
212
213 /*
214 * If we have DAC or LDB, then we need the IPU DI clock to be
215 * the same as the LDB DI clock. For TVDAC, derive the IPU DI
216 * clock from 27 MHz TVE_DI clock, but allow to divide it.
217 */
218 if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
219 BIT(DRM_MODE_ENCODER_LVDS)))
220 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
221 else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
222 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
223 else
224 sig_cfg.clkflags = 0;
225
226 sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
227 /* Default to driving pixel data on negative clock edges */
228 sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
229 DRM_BUS_FLAG_PIXDATA_POSEDGE);
230 sig_cfg.bus_format = imx_crtc_state->bus_format;
231 sig_cfg.v_to_h_sync = 0;
232 sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
233 sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
234
235 drm_display_mode_to_videomode(mode, &sig_cfg.mode);
236
237 ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
238 mode->flags & DRM_MODE_FLAG_INTERLACE,
239 imx_crtc_state->bus_format, mode->hdisplay);
240 ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
241 }
242
243 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
244 .mode_fixup = ipu_crtc_mode_fixup,
245 .mode_set_nofb = ipu_crtc_mode_set_nofb,
246 .atomic_check = ipu_crtc_atomic_check,
247 .atomic_begin = ipu_crtc_atomic_begin,
248 .disable = ipu_crtc_disable,
249 .enable = ipu_crtc_enable,
250 };
251
252 static int ipu_enable_vblank(struct drm_crtc *crtc)
253 {
254 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
255
256 enable_irq(ipu_crtc->irq);
257
258 return 0;
259 }
260
261 static void ipu_disable_vblank(struct drm_crtc *crtc)
262 {
263 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
264
265 disable_irq_nosync(ipu_crtc->irq);
266 }
267
268 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
269 .enable_vblank = ipu_enable_vblank,
270 .disable_vblank = ipu_disable_vblank,
271 .crtc_funcs = &ipu_crtc_funcs,
272 .crtc_helper_funcs = &ipu_helper_funcs,
273 };
274
275 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
276 {
277 if (!IS_ERR_OR_NULL(ipu_crtc->dc))
278 ipu_dc_put(ipu_crtc->dc);
279 if (!IS_ERR_OR_NULL(ipu_crtc->di))
280 ipu_di_put(ipu_crtc->di);
281 }
282
283 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
284 struct ipu_client_platformdata *pdata)
285 {
286 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
287 int ret;
288
289 ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
290 if (IS_ERR(ipu_crtc->dc)) {
291 ret = PTR_ERR(ipu_crtc->dc);
292 goto err_out;
293 }
294
295 ipu_crtc->di = ipu_di_get(ipu, pdata->di);
296 if (IS_ERR(ipu_crtc->di)) {
297 ret = PTR_ERR(ipu_crtc->di);
298 goto err_out;
299 }
300
301 return 0;
302 err_out:
303 ipu_put_resources(ipu_crtc);
304
305 return ret;
306 }
307
308 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
309 struct ipu_client_platformdata *pdata, struct drm_device *drm)
310 {
311 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
312 int dp = -EINVAL;
313 int ret;
314
315 ret = ipu_get_resources(ipu_crtc, pdata);
316 if (ret) {
317 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
318 ret);
319 return ret;
320 }
321
322 if (pdata->dp >= 0)
323 dp = IPU_DP_FLOW_SYNC_BG;
324 ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
325 DRM_PLANE_TYPE_PRIMARY);
326 if (IS_ERR(ipu_crtc->plane[0])) {
327 ret = PTR_ERR(ipu_crtc->plane[0]);
328 goto err_put_resources;
329 }
330
331 ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
332 &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
333 pdata->of_node);
334 if (ret) {
335 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
336 goto err_put_resources;
337 }
338
339 ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
340 if (ret) {
341 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
342 ret);
343 goto err_remove_crtc;
344 }
345
346 /* If this crtc is using the DP, add an overlay plane */
347 if (pdata->dp >= 0 && pdata->dma[1] > 0) {
348 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
349 IPU_DP_FLOW_SYNC_FG,
350 drm_crtc_mask(&ipu_crtc->base),
351 DRM_PLANE_TYPE_OVERLAY);
352 if (IS_ERR(ipu_crtc->plane[1])) {
353 ipu_crtc->plane[1] = NULL;
354 } else {
355 ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
356 if (ret) {
357 dev_err(ipu_crtc->dev, "getting plane 1 "
358 "resources failed with %d.\n", ret);
359 goto err_put_plane0_res;
360 }
361 }
362 }
363
364 ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
365 ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
366 "imx_drm", ipu_crtc);
367 if (ret < 0) {
368 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
369 goto err_put_plane1_res;
370 }
371 /* Only enable IRQ when we actually need it to trigger work. */
372 disable_irq(ipu_crtc->irq);
373
374 return 0;
375
376 err_put_plane1_res:
377 if (ipu_crtc->plane[1])
378 ipu_plane_put_resources(ipu_crtc->plane[1]);
379 err_put_plane0_res:
380 ipu_plane_put_resources(ipu_crtc->plane[0]);
381 err_remove_crtc:
382 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
383 err_put_resources:
384 ipu_put_resources(ipu_crtc);
385
386 return ret;
387 }
388
389 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
390 {
391 struct ipu_client_platformdata *pdata = dev->platform_data;
392 struct drm_device *drm = data;
393 struct ipu_crtc *ipu_crtc;
394 int ret;
395
396 ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
397 if (!ipu_crtc)
398 return -ENOMEM;
399
400 ipu_crtc->dev = dev;
401
402 ret = ipu_crtc_init(ipu_crtc, pdata, drm);
403 if (ret)
404 return ret;
405
406 dev_set_drvdata(dev, ipu_crtc);
407
408 return 0;
409 }
410
411 static void ipu_drm_unbind(struct device *dev, struct device *master,
412 void *data)
413 {
414 struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
415
416 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
417
418 ipu_put_resources(ipu_crtc);
419 if (ipu_crtc->plane[1])
420 ipu_plane_put_resources(ipu_crtc->plane[1]);
421 ipu_plane_put_resources(ipu_crtc->plane[0]);
422 }
423
424 static const struct component_ops ipu_crtc_ops = {
425 .bind = ipu_drm_bind,
426 .unbind = ipu_drm_unbind,
427 };
428
429 static int ipu_drm_probe(struct platform_device *pdev)
430 {
431 struct device *dev = &pdev->dev;
432 int ret;
433
434 if (!dev->platform_data)
435 return -EINVAL;
436
437 ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
438 if (ret)
439 return ret;
440
441 return component_add(dev, &ipu_crtc_ops);
442 }
443
444 static int ipu_drm_remove(struct platform_device *pdev)
445 {
446 component_del(&pdev->dev, &ipu_crtc_ops);
447 return 0;
448 }
449
450 static struct platform_driver ipu_drm_driver = {
451 .driver = {
452 .name = "imx-ipuv3-crtc",
453 },
454 .probe = ipu_drm_probe,
455 .remove = ipu_drm_remove,
456 };
457 module_platform_driver(ipu_drm_driver);
458
459 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
460 MODULE_DESCRIPTION(DRIVER_DESC);
461 MODULE_LICENSE("GPL");
462 MODULE_ALIAS("platform:imx-ipuv3-crtc");
This page took 0.040668 seconds and 5 git commands to generate.