drivers/gpu/drm/mediatek/mtk_disp_rdma.c

   1 /*
   2  * Copyright (c) 2015 MediaTek Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <drm/drmP.h>
  15 #include <linux/clk.h>
  16 #include <linux/component.h>
  17 #include <linux/of_device.h>
  18 #include <linux/of_irq.h>
  19 #include <linux/platform_device.h>
  20
  21 #include "mtk_drm_crtc.h"
  22 #include "mtk_drm_ddp_comp.h"
  23
  24 #define DISP_REG_RDMA_INT_ENABLE                0x0000
  25 #define DISP_REG_RDMA_INT_STATUS                0x0004
  26 #define RDMA_TARGET_LINE_INT                            BIT(5)
  27 #define RDMA_FIFO_UNDERFLOW_INT                         BIT(4)
  28 #define RDMA_EOF_ABNORMAL_INT                           BIT(3)
  29 #define RDMA_FRAME_END_INT                              BIT(2)
  30 #define RDMA_FRAME_START_INT                            BIT(1)
  31 #define RDMA_REG_UPDATE_INT                             BIT(0)
  32 #define DISP_REG_RDMA_GLOBAL_CON                0x0010
  33 #define RDMA_ENGINE_EN                                  BIT(0)
  34 #define DISP_REG_RDMA_SIZE_CON_0                0x0014
  35 #define DISP_REG_RDMA_SIZE_CON_1                0x0018
  36 #define DISP_REG_RDMA_TARGET_LINE               0x001c
  37 #define DISP_REG_RDMA_FIFO_CON                  0x0040
  38 #define RDMA_FIFO_UNDERFLOW_EN                          BIT(31)
  39 #define RDMA_FIFO_PSEUDO_SIZE(bytes)                    (((bytes) / 16) << 16)
  40 #define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes)         ((bytes) / 16)
  41
  42 /**
  43  * struct mtk_disp_rdma - DISP_RDMA driver structure
  44  * @ddp_comp - structure containing type enum and hardware resources
  45  * @crtc - associated crtc to report irq events to
  46  */
  47 struct mtk_disp_rdma {
  48         struct mtk_ddp_comp             ddp_comp;
  49         struct drm_crtc                 *crtc;
  50 };
  51
  52 static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id)
  53 {
  54         struct mtk_disp_rdma *priv = dev_id;
  55         struct mtk_ddp_comp *rdma = &priv->ddp_comp;
  56
  57         /* Clear frame completion interrupt */
  58         writel(0x0, rdma->regs + DISP_REG_RDMA_INT_STATUS);
  59
  60         if (!priv->crtc)
  61                 return IRQ_NONE;
  62
  63         mtk_crtc_ddp_irq(priv->crtc, rdma);
  64
  65         return IRQ_HANDLED;
  66 }
  67
  68 static void rdma_update_bits(struct mtk_ddp_comp *comp, unsigned int reg,
  69                              unsigned int mask, unsigned int val)
  70 {
  71         unsigned int tmp = readl(comp->regs + reg);
  72
  73         tmp = (tmp & ~mask) | (val & mask);
  74         writel(tmp, comp->regs + reg);
  75 }
  76
  77 static void mtk_rdma_enable_vblank(struct mtk_ddp_comp *comp,
  78                                    struct drm_crtc *crtc)
  79 {
  80         struct mtk_disp_rdma *priv = container_of(comp, struct mtk_disp_rdma,
  81                                                   ddp_comp);
  82
  83         priv->crtc = crtc;
  84         rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT,
  85                          RDMA_FRAME_END_INT);
  86 }
  87
  88 static void mtk_rdma_disable_vblank(struct mtk_ddp_comp *comp)
  89 {
  90         struct mtk_disp_rdma *priv = container_of(comp, struct mtk_disp_rdma,
  91                                                   ddp_comp);
  92
  93         priv->crtc = NULL;
  94         rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0);
  95 }
  96
  97 static void mtk_rdma_start(struct mtk_ddp_comp *comp)
  98 {
  99         rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN,
 100                          RDMA_ENGINE_EN);
 101 }
 102
 103 static void mtk_rdma_stop(struct mtk_ddp_comp *comp)
 104 {
 105         rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, 0);
 106 }
 107
 108 static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
 109                             unsigned int height, unsigned int vrefresh,
 110                             unsigned int bpc)
 111 {
 112         unsigned int threshold;
 113         unsigned int reg;
 114
 115         rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width);
 116         rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff, height);
 117
 118         /*
 119          * Enable FIFO underflow since DSI and DPI can't be blocked.
 120          * Keep the FIFO pseudo size reset default of 8 KiB. Set the
 121          * output threshold to 6 microseconds with 7/6 overhead to
 122          * account for blanking, and with a pixel depth of 4 bytes:
 123          */
 124         threshold = width * height * vrefresh * 4 * 7 / 1000000;
 125         reg = RDMA_FIFO_UNDERFLOW_EN |
 126               RDMA_FIFO_PSEUDO_SIZE(SZ_8K) |
 127               RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
 128         writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);
 129 }
 130
 131 static const struct mtk_ddp_comp_funcs mtk_disp_rdma_funcs = {
 132         .config = mtk_rdma_config,
 133         .start = mtk_rdma_start,
 134         .stop = mtk_rdma_stop,
 135         .enable_vblank = mtk_rdma_enable_vblank,
 136         .disable_vblank = mtk_rdma_disable_vblank,
 137 };
 138
 139 static int mtk_disp_rdma_bind(struct device *dev, struct device *master,
 140                               void *data)
 141 {
 142         struct mtk_disp_rdma *priv = dev_get_drvdata(dev);
 143         struct drm_device *drm_dev = data;
 144         int ret;
 145
 146         ret = mtk_ddp_comp_register(drm_dev, &priv->ddp_comp);
 147         if (ret < 0) {
 148                 dev_err(dev, "Failed to register component %s: %d\n",
 149                         dev->of_node->full_name, ret);
 150                 return ret;
 151         }
 152
 153         return 0;
 154
 155 }
 156
 157 static void mtk_disp_rdma_unbind(struct device *dev, struct device *master,
 158                                  void *data)
 159 {
 160         struct mtk_disp_rdma *priv = dev_get_drvdata(dev);
 161         struct drm_device *drm_dev = data;
 162
 163         mtk_ddp_comp_unregister(drm_dev, &priv->ddp_comp);
 164 }
 165
 166 static const struct component_ops mtk_disp_rdma_component_ops = {
 167         .bind   = mtk_disp_rdma_bind,
 168         .unbind = mtk_disp_rdma_unbind,
 169 };
 170
 171 static int mtk_disp_rdma_probe(struct platform_device *pdev)
 172 {
 173         struct device *dev = &pdev->dev;
 174         struct mtk_disp_rdma *priv;
 175         int comp_id;
 176         int irq;
 177         int ret;
 178
 179         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 180         if (!priv)
 181                 return -ENOMEM;
 182
 183         irq = platform_get_irq(pdev, 0);
 184         if (irq < 0)
 185                 return irq;
 186
 187         comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_RDMA);
 188         if (comp_id < 0) {
 189                 dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
 190                 return comp_id;
 191         }
 192
 193         ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
 194                                 &mtk_disp_rdma_funcs);
 195         if (ret) {
 196                 dev_err(dev, "Failed to initialize component: %d\n", ret);
 197                 return ret;
 198         }
 199
 200         /* Disable and clear pending interrupts */
 201         writel(0x0, priv->ddp_comp.regs + DISP_REG_RDMA_INT_ENABLE);
 202         writel(0x0, priv->ddp_comp.regs + DISP_REG_RDMA_INT_STATUS);
 203
 204         ret = devm_request_irq(dev, irq, mtk_disp_rdma_irq_handler,
 205                                IRQF_TRIGGER_NONE, dev_name(dev), priv);
 206         if (ret < 0) {
 207                 dev_err(dev, "Failed to request irq %d: %d\n", irq, ret);
 208                 return ret;
 209         }
 210
 211         platform_set_drvdata(pdev, priv);
 212
 213         ret = component_add(dev, &mtk_disp_rdma_component_ops);
 214         if (ret)
 215                 dev_err(dev, "Failed to add component: %d\n", ret);
 216
 217         return ret;
 218 }
 219
 220 static int mtk_disp_rdma_remove(struct platform_device *pdev)
 221 {
 222         component_del(&pdev->dev, &mtk_disp_rdma_component_ops);
 223
 224         return 0;
 225 }
 226
 227 static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
 228         { .compatible = "mediatek,mt8173-disp-rdma", },
 229         {},
 230 };
 231 MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
 232
 233 struct platform_driver mtk_disp_rdma_driver = {
 234         .probe          = mtk_disp_rdma_probe,
 235         .remove         = mtk_disp_rdma_remove,
 236         .driver         = {
 237                 .name   = "mediatek-disp-rdma",
 238                 .owner  = THIS_MODULE,
 239                 .of_match_table = mtk_disp_rdma_driver_dt_match,
 240         },
 241 };