drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "mdp4_kms.h"
  19
  20 #include "drm_crtc.h"
  21 #include "drm_crtc_helper.h"
  22
  23
  24 struct mdp4_dtv_encoder {
  25         struct drm_encoder base;
  26         struct clk *src_clk;
  27         struct clk *hdmi_clk;
  28         struct clk *mdp_clk;
  29         unsigned long int pixclock;
  30         bool enabled;
  31         uint32_t bsc;
  32 };
  33 #define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_dtv_encoder, base)
  34
  35 static struct mdp4_kms *get_kms(struct drm_encoder *encoder)
  36 {
  37         struct msm_drm_private *priv = encoder->dev->dev_private;
  38         return to_mdp4_kms(to_mdp_kms(priv->kms));
  39 }
  40
  41 #ifdef DOWNSTREAM_CONFIG_MSM_BUS_SCALING
  42 #include <mach/board.h>
  43 /* not ironically named at all.. no, really.. */
  44 static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
  45 {
  46         struct drm_device *dev = mdp4_dtv_encoder->base.dev;
  47         struct lcdc_platform_data *dtv_pdata = mdp4_find_pdata("dtv.0");
  48
  49         if (!dtv_pdata) {
  50                 dev_err(dev->dev, "could not find dtv pdata\n");
  51                 return;
  52         }
  53
  54         if (dtv_pdata->bus_scale_table) {
  55                 mdp4_dtv_encoder->bsc = msm_bus_scale_register_client(
  56                                 dtv_pdata->bus_scale_table);
  57                 DBG("bus scale client: %08x", mdp4_dtv_encoder->bsc);
  58                 DBG("lcdc_power_save: %p", dtv_pdata->lcdc_power_save);
  59                 if (dtv_pdata->lcdc_power_save)
  60                         dtv_pdata->lcdc_power_save(1);
  61         }
  62 }
  63
  64 static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
  65 {
  66         if (mdp4_dtv_encoder->bsc) {
  67                 msm_bus_scale_unregister_client(mdp4_dtv_encoder->bsc);
  68                 mdp4_dtv_encoder->bsc = 0;
  69         }
  70 }
  71
  72 static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx)
  73 {
  74         if (mdp4_dtv_encoder->bsc) {
  75                 DBG("set bus scaling: %d", idx);
  76                 msm_bus_scale_client_update_request(mdp4_dtv_encoder->bsc, idx);
  77         }
  78 }
  79 #else
  80 static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
  81 static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
  82 static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx) {}
  83 #endif
  84
  85 static void mdp4_dtv_encoder_destroy(struct drm_encoder *encoder)
  86 {
  87         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
  88         bs_fini(mdp4_dtv_encoder);
  89         drm_encoder_cleanup(encoder);
  90         kfree(mdp4_dtv_encoder);
  91 }
  92
  93 static const struct drm_encoder_funcs mdp4_dtv_encoder_funcs = {
  94         .destroy = mdp4_dtv_encoder_destroy,
  95 };
  96
  97 static void mdp4_dtv_encoder_mode_set(struct drm_encoder *encoder,
  98                 struct drm_display_mode *mode,
  99                 struct drm_display_mode *adjusted_mode)
 100 {
 101         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
 102         struct mdp4_kms *mdp4_kms = get_kms(encoder);
 103         uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol;
 104         uint32_t display_v_start, display_v_end;
 105         uint32_t hsync_start_x, hsync_end_x;
 106
 107         mode = adjusted_mode;
 108
 109         DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
 110                         mode->base.id, mode->name,
 111                         mode->vrefresh, mode->clock,
 112                         mode->hdisplay, mode->hsync_start,
 113                         mode->hsync_end, mode->htotal,
 114                         mode->vdisplay, mode->vsync_start,
 115                         mode->vsync_end, mode->vtotal,
 116                         mode->type, mode->flags);
 117
 118         mdp4_dtv_encoder->pixclock = mode->clock * 1000;
 119
 120         DBG("pixclock=%lu", mdp4_dtv_encoder->pixclock);
 121
 122         ctrl_pol = 0;
 123         if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 124                 ctrl_pol |= MDP4_DTV_CTRL_POLARITY_HSYNC_LOW;
 125         if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 126                 ctrl_pol |= MDP4_DTV_CTRL_POLARITY_VSYNC_LOW;
 127         /* probably need to get DATA_EN polarity from panel.. */
 128
 129         dtv_hsync_skew = 0;  /* get this from panel? */
 130
 131         hsync_start_x = (mode->htotal - mode->hsync_start);
 132         hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
 133
 134         vsync_period = mode->vtotal * mode->htotal;
 135         vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
 136         display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew;
 137         display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_skew - 1;
 138
 139         mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_CTRL,
 140                         MDP4_DTV_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) |
 141                         MDP4_DTV_HSYNC_CTRL_PERIOD(mode->htotal));
 142         mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_PERIOD, vsync_period);
 143         mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_LEN, vsync_len);
 144         mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_HCTRL,
 145                         MDP4_DTV_DISPLAY_HCTRL_START(hsync_start_x) |
 146                         MDP4_DTV_DISPLAY_HCTRL_END(hsync_end_x));
 147         mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VSTART, display_v_start);
 148         mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VEND, display_v_end);
 149         mdp4_write(mdp4_kms, REG_MDP4_DTV_BORDER_CLR, 0);
 150         mdp4_write(mdp4_kms, REG_MDP4_DTV_UNDERFLOW_CLR,
 151                         MDP4_DTV_UNDERFLOW_CLR_ENABLE_RECOVERY |
 152                         MDP4_DTV_UNDERFLOW_CLR_COLOR(0xff));
 153         mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_SKEW, dtv_hsync_skew);
 154         mdp4_write(mdp4_kms, REG_MDP4_DTV_CTRL_POLARITY, ctrl_pol);
 155         mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_HCTL,
 156                         MDP4_DTV_ACTIVE_HCTL_START(0) |
 157                         MDP4_DTV_ACTIVE_HCTL_END(0));
 158         mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VSTART, 0);
 159         mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VEND, 0);
 160 }
 161
 162 static void mdp4_dtv_encoder_disable(struct drm_encoder *encoder)
 163 {
 164         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
 165         struct mdp4_kms *mdp4_kms = get_kms(encoder);
 166
 167         if (WARN_ON(!mdp4_dtv_encoder->enabled))
 168                 return;
 169
 170         mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
 171
 172         /*
 173          * Wait for a vsync so we know the ENABLE=0 latched before
 174          * the (connector) source of the vsync's gets disabled,
 175          * otherwise we end up in a funny state if we re-enable
 176          * before the disable latches, which results that some of
 177          * the settings changes for the new modeset (like new
 178          * scanout buffer) don't latch properly..
 179          */
 180         mdp_irq_wait(&mdp4_kms->base, MDP4_IRQ_EXTERNAL_VSYNC);
 181
 182         clk_disable_unprepare(mdp4_dtv_encoder->src_clk);
 183         clk_disable_unprepare(mdp4_dtv_encoder->hdmi_clk);
 184         clk_disable_unprepare(mdp4_dtv_encoder->mdp_clk);
 185
 186         bs_set(mdp4_dtv_encoder, 0);
 187
 188         mdp4_dtv_encoder->enabled = false;
 189 }
 190
 191 static void mdp4_dtv_encoder_enable(struct drm_encoder *encoder)
 192 {
 193         struct drm_device *dev = encoder->dev;
 194         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
 195         struct mdp4_kms *mdp4_kms = get_kms(encoder);
 196         unsigned long pc = mdp4_dtv_encoder->pixclock;
 197         int ret;
 198
 199         if (WARN_ON(mdp4_dtv_encoder->enabled))
 200                 return;
 201
 202         mdp4_crtc_set_config(encoder->crtc,
 203                         MDP4_DMA_CONFIG_R_BPC(BPC8) |
 204                         MDP4_DMA_CONFIG_G_BPC(BPC8) |
 205                         MDP4_DMA_CONFIG_B_BPC(BPC8) |
 206                         MDP4_DMA_CONFIG_PACK(0x21));
 207         mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 1);
 208
 209         bs_set(mdp4_dtv_encoder, 1);
 210
 211         DBG("setting src_clk=%lu", pc);
 212
 213         ret = clk_set_rate(mdp4_dtv_encoder->src_clk, pc);
 214         if (ret)
 215                 dev_err(dev->dev, "failed to set src_clk to %lu: %d\n", pc, ret);
 216         clk_prepare_enable(mdp4_dtv_encoder->src_clk);
 217         ret = clk_prepare_enable(mdp4_dtv_encoder->hdmi_clk);
 218         if (ret)
 219                 dev_err(dev->dev, "failed to enable hdmi_clk: %d\n", ret);
 220         ret = clk_prepare_enable(mdp4_dtv_encoder->mdp_clk);
 221         if (ret)
 222                 dev_err(dev->dev, "failed to enabled mdp_clk: %d\n", ret);
 223
 224         mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 1);
 225
 226         mdp4_dtv_encoder->enabled = true;
 227 }
 228
 229 static const struct drm_encoder_helper_funcs mdp4_dtv_encoder_helper_funcs = {
 230         .mode_set = mdp4_dtv_encoder_mode_set,
 231         .enable = mdp4_dtv_encoder_enable,
 232         .disable = mdp4_dtv_encoder_disable,
 233 };
 234
 235 long mdp4_dtv_round_pixclk(struct drm_encoder *encoder, unsigned long rate)
 236 {
 237         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
 238         return clk_round_rate(mdp4_dtv_encoder->src_clk, rate);
 239 }
 240
 241 /* initialize encoder */
 242 struct drm_encoder *mdp4_dtv_encoder_init(struct drm_device *dev)
 243 {
 244         struct drm_encoder *encoder = NULL;
 245         struct mdp4_dtv_encoder *mdp4_dtv_encoder;
 246         int ret;
 247
 248         mdp4_dtv_encoder = kzalloc(sizeof(*mdp4_dtv_encoder), GFP_KERNEL);
 249         if (!mdp4_dtv_encoder) {
 250                 ret = -ENOMEM;
 251                 goto fail;
 252         }
 253
 254         encoder = &mdp4_dtv_encoder->base;
 255
 256         drm_encoder_init(dev, encoder, &mdp4_dtv_encoder_funcs,
 257                          DRM_MODE_ENCODER_TMDS, NULL);
 258         drm_encoder_helper_add(encoder, &mdp4_dtv_encoder_helper_funcs);
 259
 260         mdp4_dtv_encoder->src_clk = devm_clk_get(dev->dev, "src_clk");
 261         if (IS_ERR(mdp4_dtv_encoder->src_clk)) {
 262                 dev_err(dev->dev, "failed to get src_clk\n");
 263                 ret = PTR_ERR(mdp4_dtv_encoder->src_clk);
 264                 goto fail;
 265         }
 266
 267         mdp4_dtv_encoder->hdmi_clk = devm_clk_get(dev->dev, "hdmi_clk");
 268         if (IS_ERR(mdp4_dtv_encoder->hdmi_clk)) {
 269                 dev_err(dev->dev, "failed to get hdmi_clk\n");
 270                 ret = PTR_ERR(mdp4_dtv_encoder->hdmi_clk);
 271                 goto fail;
 272         }
 273
 274         mdp4_dtv_encoder->mdp_clk = devm_clk_get(dev->dev, "mdp_clk");
 275         if (IS_ERR(mdp4_dtv_encoder->mdp_clk)) {
 276                 dev_err(dev->dev, "failed to get mdp_clk\n");
 277                 ret = PTR_ERR(mdp4_dtv_encoder->mdp_clk);
 278                 goto fail;
 279         }
 280
 281         bs_init(mdp4_dtv_encoder);
 282
 283         return encoder;
 284
 285 fail:
 286         if (encoder)
 287                 mdp4_dtv_encoder_destroy(encoder);
 288
 289         return ERR_PTR(ret);
 290 }