drivers/gpu/drm/virtio/virtgpu_ioctl.c

   1 /*
   2  * Copyright (C) 2015 Red Hat, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Authors:
   6  *    Dave Airlie
   7  *    Alon Levy
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25  * OTHER DEALINGS IN THE SOFTWARE.
  26  */
  27
  28 #include <drm/drmP.h>
  29 #include "virtgpu_drv.h"
  30 #include <drm/virtgpu_drm.h>
  31 #include "ttm/ttm_execbuf_util.h"
  32
  33 static void convert_to_hw_box(struct virtio_gpu_box *dst,
  34                               const struct drm_virtgpu_3d_box *src)
  35 {
  36         dst->x = cpu_to_le32(src->x);
  37         dst->y = cpu_to_le32(src->y);
  38         dst->z = cpu_to_le32(src->z);
  39         dst->w = cpu_to_le32(src->w);
  40         dst->h = cpu_to_le32(src->h);
  41         dst->d = cpu_to_le32(src->d);
  42 }
  43
  44 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
  45                                 struct drm_file *file_priv)
  46 {
  47         struct virtio_gpu_device *vgdev = dev->dev_private;
  48         struct drm_virtgpu_map *virtio_gpu_map = data;
  49
  50         return virtio_gpu_mode_dumb_mmap(file_priv, vgdev->ddev,
  51                                          virtio_gpu_map->handle,
  52                                          &virtio_gpu_map->offset);
  53 }
  54
  55 static int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
  56                                            struct list_head *head)
  57 {
  58         struct ttm_validate_buffer *buf;
  59         struct ttm_buffer_object *bo;
  60         struct virtio_gpu_object *qobj;
  61         int ret;
  62
  63         ret = ttm_eu_reserve_buffers(ticket, head, true, NULL);
  64         if (ret != 0)
  65                 return ret;
  66
  67         list_for_each_entry(buf, head, head) {
  68                 bo = buf->bo;
  69                 qobj = container_of(bo, struct virtio_gpu_object, tbo);
  70                 ret = ttm_bo_validate(bo, &qobj->placement, false, false);
  71                 if (ret) {
  72                         ttm_eu_backoff_reservation(ticket, head);
  73                         return ret;
  74                 }
  75         }
  76         return 0;
  77 }
  78
  79 static void virtio_gpu_unref_list(struct list_head *head)
  80 {
  81         struct ttm_validate_buffer *buf;
  82         struct ttm_buffer_object *bo;
  83         struct virtio_gpu_object *qobj;
  84         list_for_each_entry(buf, head, head) {
  85                 bo = buf->bo;
  86                 qobj = container_of(bo, struct virtio_gpu_object, tbo);
  87
  88                 drm_gem_object_unreference_unlocked(&qobj->gem_base);
  89         }
  90 }
  91
  92 static int virtio_gpu_execbuffer(struct drm_device *dev,
  93                                  struct drm_virtgpu_execbuffer *exbuf,
  94                                  struct drm_file *drm_file)
  95 {
  96         struct virtio_gpu_device *vgdev = dev->dev_private;
  97         struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv;
  98         struct drm_gem_object *gobj;
  99         struct virtio_gpu_fence *fence;
 100         struct virtio_gpu_object *qobj;
 101         int ret;
 102         uint32_t *bo_handles = NULL;
 103         void __user *user_bo_handles = NULL;
 104         struct list_head validate_list;
 105         struct ttm_validate_buffer *buflist = NULL;
 106         int i;
 107         struct ww_acquire_ctx ticket;
 108         void *buf;
 109
 110         if (vgdev->has_virgl_3d == false)
 111                 return -ENOSYS;
 112
 113         INIT_LIST_HEAD(&validate_list);
 114         if (exbuf->num_bo_handles) {
 115
 116                 bo_handles = drm_malloc_ab(exbuf->num_bo_handles,
 117                                            sizeof(uint32_t));
 118                 buflist = drm_calloc_large(exbuf->num_bo_handles,
 119                                            sizeof(struct ttm_validate_buffer));
 120                 if (!bo_handles || !buflist) {
 121                         drm_free_large(bo_handles);
 122                         drm_free_large(buflist);
 123                         return -ENOMEM;
 124                 }
 125
 126                 user_bo_handles = (void __user *)(uintptr_t)exbuf->bo_handles;
 127                 if (copy_from_user(bo_handles, user_bo_handles,
 128                                    exbuf->num_bo_handles * sizeof(uint32_t))) {
 129                         ret = -EFAULT;
 130                         drm_free_large(bo_handles);
 131                         drm_free_large(buflist);
 132                         return ret;
 133                 }
 134
 135                 for (i = 0; i < exbuf->num_bo_handles; i++) {
 136                         gobj = drm_gem_object_lookup(drm_file, bo_handles[i]);
 137                         if (!gobj) {
 138                                 drm_free_large(bo_handles);
 139                                 drm_free_large(buflist);
 140                                 return -ENOENT;
 141                         }
 142
 143                         qobj = gem_to_virtio_gpu_obj(gobj);
 144                         buflist[i].bo = &qobj->tbo;
 145
 146                         list_add(&buflist[i].head, &validate_list);
 147                 }
 148                 drm_free_large(bo_handles);
 149         }
 150
 151         ret = virtio_gpu_object_list_validate(&ticket, &validate_list);
 152         if (ret)
 153                 goto out_free;
 154
 155         buf = memdup_user((void __user *)(uintptr_t)exbuf->command,
 156                           exbuf->size);
 157         if (IS_ERR(buf)) {
 158                 ret = PTR_ERR(buf);
 159                 goto out_unresv;
 160         }
 161         virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
 162                               vfpriv->ctx_id, &fence);
 163
 164         ttm_eu_fence_buffer_objects(&ticket, &validate_list, &fence->f);
 165
 166         /* fence the command bo */
 167         virtio_gpu_unref_list(&validate_list);
 168         drm_free_large(buflist);
 169         fence_put(&fence->f);
 170         return 0;
 171
 172 out_unresv:
 173         ttm_eu_backoff_reservation(&ticket, &validate_list);
 174 out_free:
 175         virtio_gpu_unref_list(&validate_list);
 176         drm_free_large(buflist);
 177         return ret;
 178 }
 179
 180 /*
 181  * Usage of execbuffer:
 182  * Relocations need to take into account the full VIRTIO_GPUDrawable size.
 183  * However, the command as passed from user space must *not* contain the initial
 184  * VIRTIO_GPUReleaseInfo struct (first XXX bytes)
 185  */
 186 static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
 187                                        struct drm_file *file_priv)
 188 {
 189         struct drm_virtgpu_execbuffer *execbuffer = data;
 190         return virtio_gpu_execbuffer(dev, execbuffer, file_priv);
 191 }
 192
 193
 194 static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
 195                                      struct drm_file *file_priv)
 196 {
 197         struct virtio_gpu_device *vgdev = dev->dev_private;
 198         struct drm_virtgpu_getparam *param = data;
 199         int value;
 200
 201         switch (param->param) {
 202         case VIRTGPU_PARAM_3D_FEATURES:
 203                 value = vgdev->has_virgl_3d == true ? 1 : 0;
 204                 break;
 205         default:
 206                 return -EINVAL;
 207         }
 208         if (copy_to_user((void __user *)(unsigned long)param->value,
 209                          &value, sizeof(int))) {
 210                 return -EFAULT;
 211         }
 212         return 0;
 213 }
 214
 215 static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data,
 216                                             struct drm_file *file_priv)
 217 {
 218         struct virtio_gpu_device *vgdev = dev->dev_private;
 219         struct drm_virtgpu_resource_create *rc = data;
 220         int ret;
 221         uint32_t res_id;
 222         struct virtio_gpu_object *qobj;
 223         struct drm_gem_object *obj;
 224         uint32_t handle = 0;
 225         uint32_t size;
 226         struct list_head validate_list;
 227         struct ttm_validate_buffer mainbuf;
 228         struct virtio_gpu_fence *fence = NULL;
 229         struct ww_acquire_ctx ticket;
 230         struct virtio_gpu_resource_create_3d rc_3d;
 231
 232         if (vgdev->has_virgl_3d == false) {
 233                 if (rc->depth > 1)
 234                         return -EINVAL;
 235                 if (rc->nr_samples > 1)
 236                         return -EINVAL;
 237                 if (rc->last_level > 1)
 238                         return -EINVAL;
 239                 if (rc->target != 2)
 240                         return -EINVAL;
 241                 if (rc->array_size > 1)
 242                         return -EINVAL;
 243         }
 244
 245         INIT_LIST_HEAD(&validate_list);
 246         memset(&mainbuf, 0, sizeof(struct ttm_validate_buffer));
 247
 248         virtio_gpu_resource_id_get(vgdev, &res_id);
 249
 250         size = rc->size;
 251
 252         /* allocate a single page size object */
 253         if (size == 0)
 254                 size = PAGE_SIZE;
 255
 256         qobj = virtio_gpu_alloc_object(dev, size, false, false);
 257         if (IS_ERR(qobj)) {
 258                 ret = PTR_ERR(qobj);
 259                 goto fail_id;
 260         }
 261         obj = &qobj->gem_base;
 262
 263         if (!vgdev->has_virgl_3d) {
 264                 virtio_gpu_cmd_create_resource(vgdev, res_id, rc->format,
 265                                                rc->width, rc->height);
 266
 267                 ret = virtio_gpu_object_attach(vgdev, qobj, res_id, NULL);
 268         } else {
 269                 /* use a gem reference since unref list undoes them */
 270                 drm_gem_object_reference(&qobj->gem_base);
 271                 mainbuf.bo = &qobj->tbo;
 272                 list_add(&mainbuf.head, &validate_list);
 273
 274                 ret = virtio_gpu_object_list_validate(&ticket, &validate_list);
 275                 if (ret) {
 276                         DRM_DEBUG("failed to validate\n");
 277                         goto fail_unref;
 278                 }
 279
 280                 rc_3d.resource_id = cpu_to_le32(res_id);
 281                 rc_3d.target = cpu_to_le32(rc->target);
 282                 rc_3d.format = cpu_to_le32(rc->format);
 283                 rc_3d.bind = cpu_to_le32(rc->bind);
 284                 rc_3d.width = cpu_to_le32(rc->width);
 285                 rc_3d.height = cpu_to_le32(rc->height);
 286                 rc_3d.depth = cpu_to_le32(rc->depth);
 287                 rc_3d.array_size = cpu_to_le32(rc->array_size);
 288                 rc_3d.last_level = cpu_to_le32(rc->last_level);
 289                 rc_3d.nr_samples = cpu_to_le32(rc->nr_samples);
 290                 rc_3d.flags = cpu_to_le32(rc->flags);
 291
 292                 virtio_gpu_cmd_resource_create_3d(vgdev, &rc_3d, NULL);
 293                 ret = virtio_gpu_object_attach(vgdev, qobj, res_id, &fence);
 294                 if (ret) {
 295                         ttm_eu_backoff_reservation(&ticket, &validate_list);
 296                         goto fail_unref;
 297                 }
 298                 ttm_eu_fence_buffer_objects(&ticket, &validate_list, &fence->f);
 299         }
 300
 301         qobj->hw_res_handle = res_id;
 302
 303         ret = drm_gem_handle_create(file_priv, obj, &handle);
 304         if (ret) {
 305
 306                 drm_gem_object_release(obj);
 307                 if (vgdev->has_virgl_3d) {
 308                         virtio_gpu_unref_list(&validate_list);
 309                         fence_put(&fence->f);
 310                 }
 311                 return ret;
 312         }
 313         drm_gem_object_unreference_unlocked(obj);
 314
 315         rc->res_handle = res_id; /* similiar to a VM address */
 316         rc->bo_handle = handle;
 317
 318         if (vgdev->has_virgl_3d) {
 319                 virtio_gpu_unref_list(&validate_list);
 320                 fence_put(&fence->f);
 321         }
 322         return 0;
 323 fail_unref:
 324         if (vgdev->has_virgl_3d) {
 325                 virtio_gpu_unref_list(&validate_list);
 326                 fence_put(&fence->f);
 327         }
 328 //fail_obj:
 329 //      drm_gem_object_handle_unreference_unlocked(obj);
 330 fail_id:
 331         virtio_gpu_resource_id_put(vgdev, res_id);
 332         return ret;
 333 }
 334
 335 static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data,
 336                                           struct drm_file *file_priv)
 337 {
 338         struct drm_virtgpu_resource_info *ri = data;
 339         struct drm_gem_object *gobj = NULL;
 340         struct virtio_gpu_object *qobj = NULL;
 341
 342         gobj = drm_gem_object_lookup(file_priv, ri->bo_handle);
 343         if (gobj == NULL)
 344                 return -ENOENT;
 345
 346         qobj = gem_to_virtio_gpu_obj(gobj);
 347
 348         ri->size = qobj->gem_base.size;
 349         ri->res_handle = qobj->hw_res_handle;
 350         drm_gem_object_unreference_unlocked(gobj);
 351         return 0;
 352 }
 353
 354 static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
 355                                                void *data,
 356                                                struct drm_file *file)
 357 {
 358         struct virtio_gpu_device *vgdev = dev->dev_private;
 359         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 360         struct drm_virtgpu_3d_transfer_from_host *args = data;
 361         struct drm_gem_object *gobj = NULL;
 362         struct virtio_gpu_object *qobj = NULL;
 363         struct virtio_gpu_fence *fence;
 364         int ret;
 365         u32 offset = args->offset;
 366         struct virtio_gpu_box box;
 367
 368         if (vgdev->has_virgl_3d == false)
 369                 return -ENOSYS;
 370
 371         gobj = drm_gem_object_lookup(file, args->bo_handle);
 372         if (gobj == NULL)
 373                 return -ENOENT;
 374
 375         qobj = gem_to_virtio_gpu_obj(gobj);
 376
 377         ret = virtio_gpu_object_reserve(qobj, false);
 378         if (ret)
 379                 goto out;
 380
 381         ret = ttm_bo_validate(&qobj->tbo, &qobj->placement,
 382                               true, false);
 383         if (unlikely(ret))
 384                 goto out_unres;
 385
 386         convert_to_hw_box(&box, &args->box);
 387         virtio_gpu_cmd_transfer_from_host_3d
 388                 (vgdev, qobj->hw_res_handle,
 389                  vfpriv->ctx_id, offset, args->level,
 390                  &box, &fence);
 391         reservation_object_add_excl_fence(qobj->tbo.resv,
 392                                           &fence->f);
 393
 394         fence_put(&fence->f);
 395 out_unres:
 396         virtio_gpu_object_unreserve(qobj);
 397 out:
 398         drm_gem_object_unreference_unlocked(gobj);
 399         return ret;
 400 }
 401
 402 static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
 403                                              struct drm_file *file)
 404 {
 405         struct virtio_gpu_device *vgdev = dev->dev_private;
 406         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 407         struct drm_virtgpu_3d_transfer_to_host *args = data;
 408         struct drm_gem_object *gobj = NULL;
 409         struct virtio_gpu_object *qobj = NULL;
 410         struct virtio_gpu_fence *fence;
 411         struct virtio_gpu_box box;
 412         int ret;
 413         u32 offset = args->offset;
 414
 415         gobj = drm_gem_object_lookup(file, args->bo_handle);
 416         if (gobj == NULL)
 417                 return -ENOENT;
 418
 419         qobj = gem_to_virtio_gpu_obj(gobj);
 420
 421         ret = virtio_gpu_object_reserve(qobj, false);
 422         if (ret)
 423                 goto out;
 424
 425         ret = ttm_bo_validate(&qobj->tbo, &qobj->placement,
 426                               true, false);
 427         if (unlikely(ret))
 428                 goto out_unres;
 429
 430         convert_to_hw_box(&box, &args->box);
 431         if (!vgdev->has_virgl_3d) {
 432                 virtio_gpu_cmd_transfer_to_host_2d
 433                         (vgdev, qobj->hw_res_handle, offset,
 434                          box.w, box.h, box.x, box.y, NULL);
 435         } else {
 436                 virtio_gpu_cmd_transfer_to_host_3d
 437                         (vgdev, qobj->hw_res_handle,
 438                          vfpriv ? vfpriv->ctx_id : 0, offset,
 439                          args->level, &box, &fence);
 440                 reservation_object_add_excl_fence(qobj->tbo.resv,
 441                                                   &fence->f);
 442                 fence_put(&fence->f);
 443         }
 444
 445 out_unres:
 446         virtio_gpu_object_unreserve(qobj);
 447 out:
 448         drm_gem_object_unreference_unlocked(gobj);
 449         return ret;
 450 }
 451
 452 static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data,
 453                             struct drm_file *file)
 454 {
 455         struct drm_virtgpu_3d_wait *args = data;
 456         struct drm_gem_object *gobj = NULL;
 457         struct virtio_gpu_object *qobj = NULL;
 458         int ret;
 459         bool nowait = false;
 460
 461         gobj = drm_gem_object_lookup(file, args->handle);
 462         if (gobj == NULL)
 463                 return -ENOENT;
 464
 465         qobj = gem_to_virtio_gpu_obj(gobj);
 466
 467         if (args->flags & VIRTGPU_WAIT_NOWAIT)
 468                 nowait = true;
 469         ret = virtio_gpu_object_wait(qobj, nowait);
 470
 471         drm_gem_object_unreference_unlocked(gobj);
 472         return ret;
 473 }
 474
 475 static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 476                                 void *data, struct drm_file *file)
 477 {
 478         struct virtio_gpu_device *vgdev = dev->dev_private;
 479         struct drm_virtgpu_get_caps *args = data;
 480         int size;
 481         int i;
 482         int found_valid = -1;
 483         int ret;
 484         struct virtio_gpu_drv_cap_cache *cache_ent;
 485         void *ptr;
 486         if (vgdev->num_capsets == 0)
 487                 return -ENOSYS;
 488
 489         spin_lock(&vgdev->display_info_lock);
 490         for (i = 0; i < vgdev->num_capsets; i++) {
 491                 if (vgdev->capsets[i].id == args->cap_set_id) {
 492                         if (vgdev->capsets[i].max_version >= args->cap_set_ver) {
 493                                 found_valid = i;
 494                                 break;
 495                         }
 496                 }
 497         }
 498
 499         if (found_valid == -1) {
 500                 spin_unlock(&vgdev->display_info_lock);
 501                 return -EINVAL;
 502         }
 503
 504         size = vgdev->capsets[found_valid].max_size;
 505         if (args->size > size) {
 506                 spin_unlock(&vgdev->display_info_lock);
 507                 return -EINVAL;
 508         }
 509
 510         list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
 511                 if (cache_ent->id == args->cap_set_id &&
 512                     cache_ent->version == args->cap_set_ver) {
 513                         ptr = cache_ent->caps_cache;
 514                         spin_unlock(&vgdev->display_info_lock);
 515                         goto copy_exit;
 516                 }
 517         }
 518         spin_unlock(&vgdev->display_info_lock);
 519
 520         /* not in cache - need to talk to hw */
 521         virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
 522                                   &cache_ent);
 523
 524         ret = wait_event_timeout(vgdev->resp_wq,
 525                                  atomic_read(&cache_ent->is_valid), 5 * HZ);
 526
 527         ptr = cache_ent->caps_cache;
 528
 529 copy_exit:
 530         if (copy_to_user((void __user *)(unsigned long)args->addr, ptr, size))
 531                 return -EFAULT;
 532
 533         return 0;
 534 }
 535
 536 struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = {
 537         DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl,
 538                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 539
 540         DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl,
 541                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 542
 543         DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl,
 544                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 545
 546         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE,
 547                           virtio_gpu_resource_create_ioctl,
 548                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 549
 550         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl,
 551                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 552
 553         /* make transfer async to the main ring? - no sure, can we
 554            thread these in the underlying GL */
 555         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST,
 556                           virtio_gpu_transfer_from_host_ioctl,
 557                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 558         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST,
 559                           virtio_gpu_transfer_to_host_ioctl,
 560                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 561
 562         DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl,
 563                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 564
 565         DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl,
 566                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 567 };