drivers/media/dvb-frontends/si2165.c

   1 /*
   2  *  Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator
   3  *
   4  *  Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  References:
  17  *  http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf
  18  */
  19
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/firmware.h>
  28
  29 #include "dvb_frontend.h"
  30 #include "dvb_math.h"
  31 #include "si2165_priv.h"
  32 #include "si2165.h"
  33
  34 /*
  35  * Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx
  36  * uses 16 MHz xtal
  37  *
  38  * Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx
  39  * uses 24 MHz clock provided by tuner
  40  */
  41
  42 struct si2165_state {
  43         struct i2c_adapter *i2c;
  44
  45         struct dvb_frontend fe;
  46
  47         struct si2165_config config;
  48
  49         u8 chip_revcode;
  50         u8 chip_type;
  51
  52         /* calculated by xtal and div settings */
  53         u32 fvco_hz;
  54         u32 sys_clk;
  55         u32 adc_clk;
  56
  57         bool has_dvbc;
  58         bool has_dvbt;
  59         bool firmware_loaded;
  60 };
  61
  62 #define DEBUG_OTHER     0x01
  63 #define DEBUG_I2C_WRITE 0x02
  64 #define DEBUG_I2C_READ  0x04
  65 #define DEBUG_REG_READ  0x08
  66 #define DEBUG_REG_WRITE 0x10
  67 #define DEBUG_FW_LOAD   0x20
  68
  69 static int debug = 0x00;
  70
  71 #define dprintk(args...) \
  72         do { \
  73                 if (debug & DEBUG_OTHER) \
  74                         printk(KERN_DEBUG "si2165: " args); \
  75         } while (0)
  76
  77 #define deb_i2c_write(args...) \
  78         do { \
  79                 if (debug & DEBUG_I2C_WRITE) \
  80                         printk(KERN_DEBUG "si2165: i2c write: " args); \
  81         } while (0)
  82
  83 #define deb_i2c_read(args...) \
  84         do { \
  85                 if (debug & DEBUG_I2C_READ) \
  86                         printk(KERN_DEBUG "si2165: i2c read: " args); \
  87         } while (0)
  88
  89 #define deb_readreg(args...) \
  90         do { \
  91                 if (debug & DEBUG_REG_READ) \
  92                         printk(KERN_DEBUG "si2165: reg read: " args); \
  93         } while (0)
  94
  95 #define deb_writereg(args...) \
  96         do { \
  97                 if (debug & DEBUG_REG_WRITE) \
  98                         printk(KERN_DEBUG "si2165: reg write: " args); \
  99         } while (0)
 100
 101 #define deb_fw_load(args...) \
 102         do { \
 103                 if (debug & DEBUG_FW_LOAD) \
 104                         printk(KERN_DEBUG "si2165: fw load: " args); \
 105         } while (0)
 106
 107 static int si2165_write(struct si2165_state *state, const u16 reg,
 108                        const u8 *src, const int count)
 109 {
 110         int ret;
 111         struct i2c_msg msg;
 112         u8 buf[2 + 4]; /* write a maximum of 4 bytes of data */
 113
 114         if (count + 2 > sizeof(buf)) {
 115                 dev_warn(&state->i2c->dev,
 116                           "%s: i2c wr reg=%04x: count=%d is too big!\n",
 117                           KBUILD_MODNAME, reg, count);
 118                 return -EINVAL;
 119         }
 120         buf[0] = reg >> 8;
 121         buf[1] = reg & 0xff;
 122         memcpy(buf + 2, src, count);
 123
 124         msg.addr = state->config.i2c_addr;
 125         msg.flags = 0;
 126         msg.buf = buf;
 127         msg.len = count + 2;
 128
 129         if (debug & DEBUG_I2C_WRITE)
 130                 deb_i2c_write("reg: 0x%04x, data: %*ph\n", reg, count, src);
 131
 132         ret = i2c_transfer(state->i2c, &msg, 1);
 133
 134         if (ret != 1) {
 135                 dev_err(&state->i2c->dev, "%s: ret == %d\n", __func__, ret);
 136                 if (ret < 0)
 137                         return ret;
 138                 else
 139                         return -EREMOTEIO;
 140         }
 141
 142         return 0;
 143 }
 144
 145 static int si2165_read(struct si2165_state *state,
 146                        const u16 reg, u8 *val, const int count)
 147 {
 148         int ret;
 149         u8 reg_buf[] = { reg >> 8, reg & 0xff };
 150         struct i2c_msg msg[] = {
 151                 { .addr = state->config.i2c_addr,
 152                   .flags = 0, .buf = reg_buf, .len = 2 },
 153                 { .addr = state->config.i2c_addr,
 154                   .flags = I2C_M_RD, .buf = val, .len = count },
 155         };
 156
 157         ret = i2c_transfer(state->i2c, msg, 2);
 158
 159         if (ret != 2) {
 160                 dev_err(&state->i2c->dev, "%s: error (addr %02x reg %04x error (ret == %i)\n",
 161                         __func__, state->config.i2c_addr, reg, ret);
 162                 if (ret < 0)
 163                         return ret;
 164                 else
 165                         return -EREMOTEIO;
 166         }
 167
 168         if (debug & DEBUG_I2C_READ)
 169                 deb_i2c_read("reg: 0x%04x, data: %*ph\n", reg, count, val);
 170
 171         return 0;
 172 }
 173
 174 static int si2165_readreg8(struct si2165_state *state,
 175                        const u16 reg, u8 *val)
 176 {
 177         int ret;
 178
 179         ret = si2165_read(state, reg, val, 1);
 180         deb_readreg("R(0x%04x)=0x%02x\n", reg, *val);
 181         return ret;
 182 }
 183
 184 static int si2165_readreg16(struct si2165_state *state,
 185                        const u16 reg, u16 *val)
 186 {
 187         u8 buf[2];
 188
 189         int ret = si2165_read(state, reg, buf, 2);
 190         *val = buf[0] | buf[1] << 8;
 191         deb_readreg("R(0x%04x)=0x%04x\n", reg, *val);
 192         return ret;
 193 }
 194
 195 static int si2165_writereg8(struct si2165_state *state, const u16 reg, u8 val)
 196 {
 197         return si2165_write(state, reg, &val, 1);
 198 }
 199
 200 static int si2165_writereg16(struct si2165_state *state, const u16 reg, u16 val)
 201 {
 202         u8 buf[2] = { val & 0xff, (val >> 8) & 0xff };
 203
 204         return si2165_write(state, reg, buf, 2);
 205 }
 206
 207 static int si2165_writereg24(struct si2165_state *state, const u16 reg, u32 val)
 208 {
 209         u8 buf[3] = { val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff };
 210
 211         return si2165_write(state, reg, buf, 3);
 212 }
 213
 214 static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val)
 215 {
 216         u8 buf[4] = {
 217                 val & 0xff,
 218                 (val >> 8) & 0xff,
 219                 (val >> 16) & 0xff,
 220                 (val >> 24) & 0xff
 221         };
 222         return si2165_write(state, reg, buf, 4);
 223 }
 224
 225 static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg,
 226                                  u8 val, u8 mask)
 227 {
 228         if (mask != 0xff) {
 229                 u8 tmp;
 230                 int ret = si2165_readreg8(state, reg, &tmp);
 231
 232                 if (ret < 0)
 233                         return ret;
 234
 235                 val &= mask;
 236                 tmp &= ~mask;
 237                 val |= tmp;
 238         }
 239         return si2165_writereg8(state, reg, val);
 240 }
 241
 242 #define REG16(reg, val) { (reg), (val) & 0xff }, { (reg)+1, (val)>>8 & 0xff }
 243 struct si2165_reg_value_pair {
 244         u16 reg;
 245         u8 val;
 246 };
 247
 248 static int si2165_write_reg_list(struct si2165_state *state,
 249                                  const struct si2165_reg_value_pair *regs,
 250                                  int count)
 251 {
 252         int i;
 253         int ret;
 254
 255         for (i = 0; i < count; i++) {
 256                 ret = si2165_writereg8(state, regs[i].reg, regs[i].val);
 257                 if (ret < 0)
 258                         return ret;
 259         }
 260         return 0;
 261 }
 262
 263 static int si2165_get_tune_settings(struct dvb_frontend *fe,
 264                                     struct dvb_frontend_tune_settings *s)
 265 {
 266         s->min_delay_ms = 1000;
 267         return 0;
 268 }
 269
 270 static int si2165_init_pll(struct si2165_state *state)
 271 {
 272         u32 ref_freq_Hz = state->config.ref_freq_Hz;
 273         u8 divr = 1; /* 1..7 */
 274         u8 divp = 1; /* only 1 or 4 */
 275         u8 divn = 56; /* 1..63 */
 276         u8 divm = 8;
 277         u8 divl = 12;
 278         u8 buf[4];
 279
 280         /*
 281          * hardcoded values can be deleted if calculation is verified
 282          * or it yields the same values as the windows driver
 283          */
 284         switch (ref_freq_Hz) {
 285         case 16000000u:
 286                 divn = 56;
 287                 break;
 288         case 24000000u:
 289                 divr = 2;
 290                 divp = 4;
 291                 divn = 19;
 292                 break;
 293         default:
 294                 /* ref_freq / divr must be between 4 and 16 MHz */
 295                 if (ref_freq_Hz > 16000000u)
 296                         divr = 2;
 297
 298                 /*
 299                  * now select divn and divp such that
 300                  * fvco is in 1624..1824 MHz
 301                  */
 302                 if (1624000000u * divr > ref_freq_Hz * 2u * 63u)
 303                         divp = 4;
 304
 305                 /* is this already correct regarding rounding? */
 306                 divn = 1624000000u * divr / (ref_freq_Hz * 2u * divp);
 307                 break;
 308         }
 309
 310         /* adc_clk and sys_clk depend on xtal and pll settings */
 311         state->fvco_hz = ref_freq_Hz / divr
 312                         * 2u * divn * divp;
 313         state->adc_clk = state->fvco_hz / (divm * 4u);
 314         state->sys_clk = state->fvco_hz / (divl * 2u);
 315
 316         /* write pll registers 0x00a0..0x00a3 at once */
 317         buf[0] = divl;
 318         buf[1] = divm;
 319         buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80;
 320         buf[3] = divr;
 321         return si2165_write(state, 0x00a0, buf, 4);
 322 }
 323
 324 static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl)
 325 {
 326         state->sys_clk = state->fvco_hz / (divl * 2u);
 327         return si2165_writereg8(state, 0x00a0, divl); /* pll_divl */
 328 }
 329
 330 static u32 si2165_get_fe_clk(struct si2165_state *state)
 331 {
 332         /* assume Oversampling mode Ovr4 is used */
 333         return state->adc_clk;
 334 }
 335
 336 static int si2165_wait_init_done(struct si2165_state *state)
 337 {
 338         int ret = -EINVAL;
 339         u8 val = 0;
 340         int i;
 341
 342         for (i = 0; i < 3; ++i) {
 343                 si2165_readreg8(state, 0x0054, &val);
 344                 if (val == 0x01)
 345                         return 0;
 346                 usleep_range(1000, 50000);
 347         }
 348         dev_err(&state->i2c->dev, "%s: init_done was not set\n",
 349                 KBUILD_MODNAME);
 350         return ret;
 351 }
 352
 353 static int si2165_upload_firmware_block(struct si2165_state *state,
 354         const u8 *data, u32 len, u32 *poffset, u32 block_count)
 355 {
 356         int ret;
 357         u8 buf_ctrl[4] = { 0x00, 0x00, 0x00, 0xc0 };
 358         u8 wordcount;
 359         u32 cur_block = 0;
 360         u32 offset = poffset ? *poffset : 0;
 361
 362         if (len < 4)
 363                 return -EINVAL;
 364         if (len % 4 != 0)
 365                 return -EINVAL;
 366
 367         deb_fw_load(
 368                 "si2165_upload_firmware_block called with len=0x%x offset=0x%x blockcount=0x%x\n",
 369                                 len, offset, block_count);
 370         while (offset+12 <= len && cur_block < block_count) {
 371                 deb_fw_load(
 372                         "si2165_upload_firmware_block in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 373                                         len, offset, cur_block, block_count);
 374                 wordcount = data[offset];
 375                 if (wordcount < 1 || data[offset+1] ||
 376                     data[offset+2] || data[offset+3]) {
 377                         dev_warn(&state->i2c->dev,
 378                                  "%s: bad fw data[0..3] = %*ph\n",
 379                                 KBUILD_MODNAME, 4, data);
 380                         return -EINVAL;
 381                 }
 382
 383                 if (offset + 8 + wordcount * 4 > len) {
 384                         dev_warn(&state->i2c->dev,
 385                                  "%s: len is too small for block len=%d, wordcount=%d\n",
 386                                 KBUILD_MODNAME, len, wordcount);
 387                         return -EINVAL;
 388                 }
 389
 390                 buf_ctrl[0] = wordcount - 1;
 391
 392                 ret = si2165_write(state, 0x0364, buf_ctrl, 4);
 393                 if (ret < 0)
 394                         goto error;
 395                 ret = si2165_write(state, 0x0368, data+offset+4, 4);
 396                 if (ret < 0)
 397                         goto error;
 398
 399                 offset += 8;
 400
 401                 while (wordcount > 0) {
 402                         ret = si2165_write(state, 0x36c, data+offset, 4);
 403                         if (ret < 0)
 404                                 goto error;
 405                         wordcount--;
 406                         offset += 4;
 407                 }
 408                 cur_block++;
 409         }
 410
 411         deb_fw_load(
 412                 "si2165_upload_firmware_block after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 413                                 len, offset, cur_block, block_count);
 414
 415         if (poffset)
 416                 *poffset = offset;
 417
 418         deb_fw_load("si2165_upload_firmware_block returned offset=0x%x\n",
 419                                 offset);
 420
 421         return 0;
 422 error:
 423         return ret;
 424 }
 425
 426 static int si2165_upload_firmware(struct si2165_state *state)
 427 {
 428         /* int ret; */
 429         u8 val[3];
 430         u16 val16;
 431         int ret;
 432
 433         const struct firmware *fw = NULL;
 434         u8 *fw_file;
 435         const u8 *data;
 436         u32 len;
 437         u32 offset;
 438         u8 patch_version;
 439         u8 block_count;
 440         u16 crc_expected;
 441
 442         switch (state->chip_revcode) {
 443         case 0x03: /* revision D */
 444                 fw_file = SI2165_FIRMWARE_REV_D;
 445                 break;
 446         default:
 447                 dev_info(&state->i2c->dev, "%s: no firmware file for revision=%d\n",
 448                         KBUILD_MODNAME, state->chip_revcode);
 449                 return 0;
 450         }
 451
 452         /* request the firmware, this will block and timeout */
 453         ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
 454         if (ret) {
 455                 dev_warn(&state->i2c->dev, "%s: firmware file '%s' not found\n",
 456                                 KBUILD_MODNAME, fw_file);
 457                 goto error;
 458         }
 459
 460         data = fw->data;
 461         len = fw->size;
 462
 463         dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s' size=%d\n",
 464                         KBUILD_MODNAME, fw_file, len);
 465
 466         if (len % 4 != 0) {
 467                 dev_warn(&state->i2c->dev, "%s: firmware size is not multiple of 4\n",
 468                                 KBUILD_MODNAME);
 469                 ret = -EINVAL;
 470                 goto error;
 471         }
 472
 473         /* check header (8 bytes) */
 474         if (len < 8) {
 475                 dev_warn(&state->i2c->dev, "%s: firmware header is missing\n",
 476                                 KBUILD_MODNAME);
 477                 ret = -EINVAL;
 478                 goto error;
 479         }
 480
 481         if (data[0] != 1 || data[1] != 0) {
 482                 dev_warn(&state->i2c->dev, "%s: firmware file version is wrong\n",
 483                                 KBUILD_MODNAME);
 484                 ret = -EINVAL;
 485                 goto error;
 486         }
 487
 488         patch_version = data[2];
 489         block_count = data[4];
 490         crc_expected = data[7] << 8 | data[6];
 491
 492         /* start uploading fw */
 493         /* boot/wdog status */
 494         ret = si2165_writereg8(state, 0x0341, 0x00);
 495         if (ret < 0)
 496                 goto error;
 497         /* reset */
 498         ret = si2165_writereg8(state, 0x00c0, 0x00);
 499         if (ret < 0)
 500                 goto error;
 501         /* boot/wdog status */
 502         ret = si2165_readreg8(state, 0x0341, val);
 503         if (ret < 0)
 504                 goto error;
 505
 506         /* enable reset on error */
 507         ret = si2165_readreg8(state, 0x035c, val);
 508         if (ret < 0)
 509                 goto error;
 510         ret = si2165_readreg8(state, 0x035c, val);
 511         if (ret < 0)
 512                 goto error;
 513         ret = si2165_writereg8(state, 0x035c, 0x02);
 514         if (ret < 0)
 515                 goto error;
 516
 517         /* start right after the header */
 518         offset = 8;
 519
 520         dev_info(&state->i2c->dev, "%s: si2165_upload_firmware extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n",
 521                 KBUILD_MODNAME, patch_version, block_count, crc_expected);
 522
 523         ret = si2165_upload_firmware_block(state, data, len, &offset, 1);
 524         if (ret < 0)
 525                 goto error;
 526
 527         ret = si2165_writereg8(state, 0x0344, patch_version);
 528         if (ret < 0)
 529                 goto error;
 530
 531         /* reset crc */
 532         ret = si2165_writereg8(state, 0x0379, 0x01);
 533         if (ret)
 534                 goto error;
 535
 536         ret = si2165_upload_firmware_block(state, data, len,
 537                                            &offset, block_count);
 538         if (ret < 0) {
 539                 dev_err(&state->i2c->dev,
 540                         "%s: firmware could not be uploaded\n",
 541                         KBUILD_MODNAME);
 542                 goto error;
 543         }
 544
 545         /* read crc */
 546         ret = si2165_readreg16(state, 0x037a, &val16);
 547         if (ret)
 548                 goto error;
 549
 550         if (val16 != crc_expected) {
 551                 dev_err(&state->i2c->dev,
 552                         "%s: firmware crc mismatch %04x != %04x\n",
 553                         KBUILD_MODNAME, val16, crc_expected);
 554                 ret = -EINVAL;
 555                 goto error;
 556         }
 557
 558         ret = si2165_upload_firmware_block(state, data, len, &offset, 5);
 559         if (ret)
 560                 goto error;
 561
 562         if (len != offset) {
 563                 dev_err(&state->i2c->dev,
 564                         "%s: firmware len mismatch %04x != %04x\n",
 565                         KBUILD_MODNAME, len, offset);
 566                 ret = -EINVAL;
 567                 goto error;
 568         }
 569
 570         /* reset watchdog error register */
 571         ret = si2165_writereg_mask8(state, 0x0341, 0x02, 0x02);
 572         if (ret < 0)
 573                 goto error;
 574
 575         /* enable reset on error */
 576         ret = si2165_writereg_mask8(state, 0x035c, 0x01, 0x01);
 577         if (ret < 0)
 578                 goto error;
 579
 580         dev_info(&state->i2c->dev, "%s: fw load finished\n", KBUILD_MODNAME);
 581
 582         ret = 0;
 583         state->firmware_loaded = true;
 584 error:
 585         if (fw) {
 586                 release_firmware(fw);
 587                 fw = NULL;
 588         }
 589
 590         return ret;
 591 }
 592
 593 static int si2165_init(struct dvb_frontend *fe)
 594 {
 595         int ret = 0;
 596         struct si2165_state *state = fe->demodulator_priv;
 597         u8 val;
 598         u8 patch_version = 0x00;
 599
 600         dprintk("%s: called\n", __func__);
 601
 602         /* powerup */
 603         ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
 604         if (ret < 0)
 605                 goto error;
 606         /* dsp_clock_enable */
 607         ret = si2165_writereg8(state, 0x0104, 0x01);
 608         if (ret < 0)
 609                 goto error;
 610         ret = si2165_readreg8(state, 0x0000, &val); /* verify chip_mode */
 611         if (ret < 0)
 612                 goto error;
 613         if (val != state->config.chip_mode) {
 614                 dev_err(&state->i2c->dev, "%s: could not set chip_mode\n",
 615                         KBUILD_MODNAME);
 616                 return -EINVAL;
 617         }
 618
 619         /* agc */
 620         ret = si2165_writereg8(state, 0x018b, 0x00);
 621         if (ret < 0)
 622                 goto error;
 623         ret = si2165_writereg8(state, 0x0190, 0x01);
 624         if (ret < 0)
 625                 goto error;
 626         ret = si2165_writereg8(state, 0x0170, 0x00);
 627         if (ret < 0)
 628                 goto error;
 629         ret = si2165_writereg8(state, 0x0171, 0x07);
 630         if (ret < 0)
 631                 goto error;
 632         /* rssi pad */
 633         ret = si2165_writereg8(state, 0x0646, 0x00);
 634         if (ret < 0)
 635                 goto error;
 636         ret = si2165_writereg8(state, 0x0641, 0x00);
 637         if (ret < 0)
 638                 goto error;
 639
 640         ret = si2165_init_pll(state);
 641         if (ret < 0)
 642                 goto error;
 643
 644         /* enable chip_init */
 645         ret = si2165_writereg8(state, 0x0050, 0x01);
 646         if (ret < 0)
 647                 goto error;
 648         /* set start_init */
 649         ret = si2165_writereg8(state, 0x0096, 0x01);
 650         if (ret < 0)
 651                 goto error;
 652         ret = si2165_wait_init_done(state);
 653         if (ret < 0)
 654                 goto error;
 655
 656         /* disable chip_init */
 657         ret = si2165_writereg8(state, 0x0050, 0x00);
 658         if (ret < 0)
 659                 goto error;
 660
 661         /* ber_pkt */
 662         ret = si2165_writereg16(state, 0x0470, 0x7530);
 663         if (ret < 0)
 664                 goto error;
 665
 666         ret = si2165_readreg8(state, 0x0344, &patch_version);
 667         if (ret < 0)
 668                 goto error;
 669
 670         ret = si2165_writereg8(state, 0x00cb, 0x00);
 671         if (ret < 0)
 672                 goto error;
 673
 674         /* dsp_addr_jump */
 675         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 676         if (ret < 0)
 677                 goto error;
 678         /* boot/wdog status */
 679         ret = si2165_readreg8(state, 0x0341, &val);
 680         if (ret < 0)
 681                 goto error;
 682
 683         if (patch_version == 0x00) {
 684                 ret = si2165_upload_firmware(state);
 685                 if (ret < 0)
 686                         goto error;
 687         }
 688
 689         /* ts output config */
 690         ret = si2165_writereg8(state, 0x04e4, 0x20);
 691         if (ret < 0)
 692                 return ret;
 693         ret = si2165_writereg16(state, 0x04ef, 0x00fe);
 694         if (ret < 0)
 695                 return ret;
 696         ret = si2165_writereg24(state, 0x04f4, 0x555555);
 697         if (ret < 0)
 698                 return ret;
 699         ret = si2165_writereg8(state, 0x04e5, 0x01);
 700         if (ret < 0)
 701                 return ret;
 702
 703         return 0;
 704 error:
 705         return ret;
 706 }
 707
 708 static int si2165_sleep(struct dvb_frontend *fe)
 709 {
 710         int ret;
 711         struct si2165_state *state = fe->demodulator_priv;
 712
 713         /* dsp clock disable */
 714         ret = si2165_writereg8(state, 0x0104, 0x00);
 715         if (ret < 0)
 716                 return ret;
 717         /* chip mode */
 718         ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
 719         if (ret < 0)
 720                 return ret;
 721         return 0;
 722 }
 723
 724 static int si2165_read_status(struct dvb_frontend *fe, enum fe_status *status)
 725 {
 726         int ret;
 727         u8 fec_lock = 0;
 728         struct si2165_state *state = fe->demodulator_priv;
 729
 730         if (!state->has_dvbt)
 731                 return -EINVAL;
 732
 733         /* check fec_lock */
 734         ret = si2165_readreg8(state, 0x4e0, &fec_lock);
 735         if (ret < 0)
 736                 return ret;
 737         *status = 0;
 738         if (fec_lock & 0x01) {
 739                 *status |= FE_HAS_SIGNAL;
 740                 *status |= FE_HAS_CARRIER;
 741                 *status |= FE_HAS_VITERBI;
 742                 *status |= FE_HAS_SYNC;
 743                 *status |= FE_HAS_LOCK;
 744         }
 745
 746         return 0;
 747 }
 748
 749 static int si2165_set_oversamp(struct si2165_state *state, u32 dvb_rate)
 750 {
 751         u64 oversamp;
 752         u32 reg_value;
 753
 754         oversamp = si2165_get_fe_clk(state);
 755         oversamp <<= 23;
 756         do_div(oversamp, dvb_rate);
 757         reg_value = oversamp & 0x3fffffff;
 758
 759         dprintk("%s: Write oversamp=%#x\n", __func__, reg_value);
 760         return si2165_writereg32(state, 0x00e4, reg_value);
 761 }
 762
 763 static int si2165_set_if_freq_shift(struct si2165_state *state)
 764 {
 765         struct dvb_frontend *fe = &state->fe;
 766         u64 if_freq_shift;
 767         s32 reg_value = 0;
 768         u32 fe_clk = si2165_get_fe_clk(state);
 769         u32 IF = 0;
 770
 771         if (!fe->ops.tuner_ops.get_if_frequency) {
 772                 dev_err(&state->i2c->dev,
 773                         "%s: Error: get_if_frequency() not defined at tuner. Can't work without it!\n",
 774                         KBUILD_MODNAME);
 775                 return -EINVAL;
 776         }
 777
 778         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
 779         if_freq_shift = IF;
 780         if_freq_shift <<= 29;
 781
 782         do_div(if_freq_shift, fe_clk);
 783         reg_value = (s32)if_freq_shift;
 784
 785         if (state->config.inversion)
 786                 reg_value = -reg_value;
 787
 788         reg_value = reg_value & 0x1fffffff;
 789
 790         /* if_freq_shift, usbdump contained 0x023ee08f; */
 791         return si2165_writereg32(state, 0x00e8, reg_value);
 792 }
 793
 794 static const struct si2165_reg_value_pair dvbt_regs[] = {
 795         /* standard = DVB-T */
 796         { 0x00ec, 0x01 },
 797         { 0x08f8, 0x00 },
 798         /* impulsive_noise_remover */
 799         { 0x031c, 0x01 },
 800         { 0x00cb, 0x00 },
 801         /* agc2 */
 802         { 0x016e, 0x41 },
 803         { 0x016c, 0x0e },
 804         { 0x016d, 0x10 },
 805         /* agc */
 806         { 0x015b, 0x03 },
 807         { 0x0150, 0x78 },
 808         /* agc */
 809         { 0x01a0, 0x78 },
 810         { 0x01c8, 0x68 },
 811         /* freq_sync_range */
 812         REG16(0x030c, 0x0064),
 813         /* gp_reg0 */
 814         { 0x0387, 0x00 }
 815 };
 816
 817 static int si2165_set_frontend_dvbt(struct dvb_frontend *fe)
 818 {
 819         int ret;
 820         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 821         struct si2165_state *state = fe->demodulator_priv;
 822         u32 dvb_rate = 0;
 823         u16 bw10k;
 824         u32 bw_hz = p->bandwidth_hz;
 825
 826         dprintk("%s: called\n", __func__);
 827
 828         if (!state->has_dvbt)
 829                 return -EINVAL;
 830
 831         /* no bandwidth auto-detection */
 832         if (bw_hz == 0)
 833                 return -EINVAL;
 834
 835         dvb_rate = bw_hz * 8 / 7;
 836         bw10k = bw_hz / 10000;
 837
 838         ret = si2165_adjust_pll_divl(state, 12);
 839         if (ret < 0)
 840                 return ret;
 841
 842         /* bandwidth in 10KHz steps */
 843         ret = si2165_writereg16(state, 0x0308, bw10k);
 844         if (ret < 0)
 845                 return ret;
 846         ret = si2165_set_oversamp(state, dvb_rate);
 847         if (ret < 0)
 848                 return ret;
 849
 850         ret = si2165_write_reg_list(state, dvbt_regs, ARRAY_SIZE(dvbt_regs));
 851         if (ret < 0)
 852                 return ret;
 853
 854         return 0;
 855 }
 856
 857 static const struct si2165_reg_value_pair dvbc_regs[] = {
 858         /* standard = DVB-C */
 859         { 0x00ec, 0x05 },
 860         { 0x08f8, 0x00 },
 861
 862         /* agc2 */
 863         { 0x016e, 0x50 },
 864         { 0x016c, 0x0e },
 865         { 0x016d, 0x10 },
 866         /* agc */
 867         { 0x015b, 0x03 },
 868         { 0x0150, 0x68 },
 869         /* agc */
 870         { 0x01a0, 0x68 },
 871         { 0x01c8, 0x50 },
 872
 873         { 0x0278, 0x0d },
 874
 875         { 0x023a, 0x05 },
 876         { 0x0261, 0x09 },
 877         REG16(0x0350, 0x3e80),
 878         { 0x02f4, 0x00 },
 879
 880         { 0x00cb, 0x01 },
 881         REG16(0x024c, 0x0000),
 882         REG16(0x027c, 0x0000),
 883         { 0x0232, 0x03 },
 884         { 0x02f4, 0x0b },
 885         { 0x018b, 0x00 },
 886 };
 887
 888 static int si2165_set_frontend_dvbc(struct dvb_frontend *fe)
 889 {
 890         struct si2165_state *state = fe->demodulator_priv;
 891         int ret;
 892         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 893         const u32 dvb_rate = p->symbol_rate;
 894         const u32 bw_hz = p->bandwidth_hz;
 895
 896         if (!state->has_dvbc)
 897                 return -EINVAL;
 898
 899         if (dvb_rate == 0)
 900                 return -EINVAL;
 901
 902         ret = si2165_adjust_pll_divl(state, 14);
 903         if (ret < 0)
 904                 return ret;
 905
 906         /* Oversampling */
 907         ret = si2165_set_oversamp(state, dvb_rate);
 908         if (ret < 0)
 909                 return ret;
 910
 911         ret = si2165_writereg32(state, 0x00c4, bw_hz);
 912         if (ret < 0)
 913                 return ret;
 914
 915         ret = si2165_write_reg_list(state, dvbc_regs, ARRAY_SIZE(dvbc_regs));
 916         if (ret < 0)
 917                 return ret;
 918
 919         return 0;
 920 }
 921
 922 static const struct si2165_reg_value_pair agc_rewrite[] = {
 923         { 0x012a, 0x46 },
 924         { 0x012c, 0x00 },
 925         { 0x012e, 0x0a },
 926         { 0x012f, 0xff },
 927         { 0x0123, 0x70 }
 928 };
 929
 930 static int si2165_set_frontend(struct dvb_frontend *fe)
 931 {
 932         struct si2165_state *state = fe->demodulator_priv;
 933         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 934         u32 delsys = p->delivery_system;
 935         int ret;
 936         u8 val[3];
 937
 938         /* initial setting of if freq shift */
 939         ret = si2165_set_if_freq_shift(state);
 940         if (ret < 0)
 941                 return ret;
 942
 943         switch (delsys) {
 944         case SYS_DVBT:
 945                 ret = si2165_set_frontend_dvbt(fe);
 946                 if (ret < 0)
 947                         return ret;
 948                 break;
 949         case SYS_DVBC_ANNEX_A:
 950                 ret = si2165_set_frontend_dvbc(fe);
 951                 if (ret < 0)
 952                         return ret;
 953                 break;
 954         default:
 955                 return -EINVAL;
 956         }
 957
 958         /* dsp_addr_jump */
 959         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 960         if (ret < 0)
 961                 return ret;
 962
 963         if (fe->ops.tuner_ops.set_params)
 964                 fe->ops.tuner_ops.set_params(fe);
 965
 966         /* recalc if_freq_shift if IF might has changed */
 967         ret = si2165_set_if_freq_shift(state);
 968         if (ret < 0)
 969                 return ret;
 970
 971         /* boot/wdog status */
 972         ret = si2165_readreg8(state, 0x0341, val);
 973         if (ret < 0)
 974                 return ret;
 975         ret = si2165_writereg8(state, 0x0341, 0x00);
 976         if (ret < 0)
 977                 return ret;
 978
 979         /* reset all */
 980         ret = si2165_writereg8(state, 0x00c0, 0x00);
 981         if (ret < 0)
 982                 return ret;
 983         /* gp_reg0 */
 984         ret = si2165_writereg32(state, 0x0384, 0x00000000);
 985         if (ret < 0)
 986                 return ret;
 987
 988         /* write adc values after each reset*/
 989         ret = si2165_write_reg_list(state, agc_rewrite,
 990                                     ARRAY_SIZE(agc_rewrite));
 991         if (ret < 0)
 992                 return ret;
 993
 994         /* start_synchro */
 995         ret = si2165_writereg8(state, 0x02e0, 0x01);
 996         if (ret < 0)
 997                 return ret;
 998         /* boot/wdog status */
 999         ret = si2165_readreg8(state, 0x0341, val);
1000         if (ret < 0)
1001                 return ret;
1002
1003         return 0;
1004 }
1005
1006 static void si2165_release(struct dvb_frontend *fe)
1007 {
1008         struct si2165_state *state = fe->demodulator_priv;
1009
1010         dprintk("%s: called\n", __func__);
1011         kfree(state);
1012 }
1013
1014 static struct dvb_frontend_ops si2165_ops = {
1015         .info = {
1016                 .name = "Silicon Labs ",
1017                  /* For DVB-C */
1018                 .symbol_rate_min = 1000000,
1019                 .symbol_rate_max = 7200000,
1020                 /* For DVB-T */
1021                 .frequency_stepsize = 166667,
1022                 .caps = FE_CAN_FEC_1_2 |
1023                         FE_CAN_FEC_2_3 |
1024                         FE_CAN_FEC_3_4 |
1025                         FE_CAN_FEC_5_6 |
1026                         FE_CAN_FEC_7_8 |
1027                         FE_CAN_FEC_AUTO |
1028                         FE_CAN_QPSK |
1029                         FE_CAN_QAM_16 |
1030                         FE_CAN_QAM_32 |
1031                         FE_CAN_QAM_64 |
1032                         FE_CAN_QAM_128 |
1033                         FE_CAN_QAM_256 |
1034                         FE_CAN_QAM_AUTO |
1035                         FE_CAN_GUARD_INTERVAL_AUTO |
1036                         FE_CAN_HIERARCHY_AUTO |
1037                         FE_CAN_MUTE_TS |
1038                         FE_CAN_TRANSMISSION_MODE_AUTO |
1039                         FE_CAN_RECOVER
1040         },
1041
1042         .get_tune_settings = si2165_get_tune_settings,
1043
1044         .init = si2165_init,
1045         .sleep = si2165_sleep,
1046
1047         .set_frontend      = si2165_set_frontend,
1048         .read_status       = si2165_read_status,
1049
1050         .release = si2165_release,
1051 };
1052
1053 struct dvb_frontend *si2165_attach(const struct si2165_config *config,
1054                                    struct i2c_adapter *i2c)
1055 {
1056         struct si2165_state *state = NULL;
1057         int n;
1058         int io_ret;
1059         u8 val;
1060         char rev_char;
1061         const char *chip_name;
1062
1063         if (config == NULL || i2c == NULL)
1064                 goto error;
1065
1066         /* allocate memory for the internal state */
1067         state = kzalloc(sizeof(struct si2165_state), GFP_KERNEL);
1068         if (state == NULL)
1069                 goto error;
1070
1071         /* setup the state */
1072         state->i2c = i2c;
1073         state->config = *config;
1074
1075         if (state->config.ref_freq_Hz < 4000000
1076             || state->config.ref_freq_Hz > 27000000) {
1077                 dev_err(&state->i2c->dev, "%s: ref_freq of %d Hz not supported by this driver\n",
1078                          KBUILD_MODNAME, state->config.ref_freq_Hz);
1079                 goto error;
1080         }
1081
1082         /* create dvb_frontend */
1083         memcpy(&state->fe.ops, &si2165_ops,
1084                 sizeof(struct dvb_frontend_ops));
1085         state->fe.demodulator_priv = state;
1086
1087         /* powerup */
1088         io_ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
1089         if (io_ret < 0)
1090                 goto error;
1091
1092         io_ret = si2165_readreg8(state, 0x0000, &val);
1093         if (io_ret < 0)
1094                 goto error;
1095         if (val != state->config.chip_mode)
1096                 goto error;
1097
1098         io_ret = si2165_readreg8(state, 0x0023, &state->chip_revcode);
1099         if (io_ret < 0)
1100                 goto error;
1101
1102         io_ret = si2165_readreg8(state, 0x0118, &state->chip_type);
1103         if (io_ret < 0)
1104                 goto error;
1105
1106         /* powerdown */
1107         io_ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
1108         if (io_ret < 0)
1109                 goto error;
1110
1111         if (state->chip_revcode < 26)
1112                 rev_char = 'A' + state->chip_revcode;
1113         else
1114                 rev_char = '?';
1115
1116         switch (state->chip_type) {
1117         case 0x06:
1118                 chip_name = "Si2161";
1119                 state->has_dvbt = true;
1120                 break;
1121         case 0x07:
1122                 chip_name = "Si2165";
1123                 state->has_dvbt = true;
1124                 state->has_dvbc = true;
1125                 break;
1126         default:
1127                 dev_err(&state->i2c->dev, "%s: Unsupported Silicon Labs chip (type %d, rev %d)\n",
1128                         KBUILD_MODNAME, state->chip_type, state->chip_revcode);
1129                 goto error;
1130         }
1131
1132         dev_info(&state->i2c->dev,
1133                 "%s: Detected Silicon Labs %s-%c (type %d, rev %d)\n",
1134                 KBUILD_MODNAME, chip_name, rev_char, state->chip_type,
1135                 state->chip_revcode);
1136
1137         strlcat(state->fe.ops.info.name, chip_name,
1138                         sizeof(state->fe.ops.info.name));
1139
1140         n = 0;
1141         if (state->has_dvbt) {
1142                 state->fe.ops.delsys[n++] = SYS_DVBT;
1143                 strlcat(state->fe.ops.info.name, " DVB-T",
1144                         sizeof(state->fe.ops.info.name));
1145         }
1146         if (state->has_dvbc) {
1147                 state->fe.ops.delsys[n++] = SYS_DVBC_ANNEX_A;
1148                 strlcat(state->fe.ops.info.name, " DVB-C",
1149                         sizeof(state->fe.ops.info.name));
1150         }
1151
1152         return &state->fe;
1153
1154 error:
1155         kfree(state);
1156         return NULL;
1157 }
1158 EXPORT_SYMBOL(si2165_attach);
1159
1160 module_param(debug, int, 0644);
1161 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1162
1163 MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver");
1164 MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>");
1165 MODULE_LICENSE("GPL");
1166 MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D);