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raid5: allow arbitrary max_hw_sectors
[deliverable/linux.git] / drivers / media / pci / cobalt / cobalt-driver.c
1 /*
2 * cobalt driver initialization and card probing
3 *
4 * Derived from cx18-driver.c
5 *
6 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
7 * All rights reserved.
8 *
9 * This program is free software; you may redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
17 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
18 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include <linux/delay.h>
24 #include <media/i2c/adv7604.h>
25 #include <media/i2c/adv7842.h>
26 #include <media/i2c/adv7511.h>
27 #include <media/v4l2-event.h>
28 #include <media/v4l2-ctrls.h>
29
30 #include "cobalt-driver.h"
31 #include "cobalt-irq.h"
32 #include "cobalt-i2c.h"
33 #include "cobalt-v4l2.h"
34 #include "cobalt-flash.h"
35 #include "cobalt-alsa.h"
36 #include "cobalt-omnitek.h"
37
38 /* add your revision and whatnot here */
39 static struct pci_device_id cobalt_pci_tbl[] = {
40 {PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_COBALT,
41 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
42 {0,}
43 };
44
45 MODULE_DEVICE_TABLE(pci, cobalt_pci_tbl);
46
47 static atomic_t cobalt_instance = ATOMIC_INIT(0);
48
49 int cobalt_debug;
50 module_param_named(debug, cobalt_debug, int, 0644);
51 MODULE_PARM_DESC(debug, "Debug level. Default: 0\n");
52
53 int cobalt_ignore_err;
54 module_param_named(ignore_err, cobalt_ignore_err, int, 0644);
55 MODULE_PARM_DESC(ignore_err,
56 "If set then ignore missing i2c adapters/receivers. Default: 0\n");
57
58 MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com> & Morten Hestnes");
59 MODULE_DESCRIPTION("cobalt driver");
60 MODULE_LICENSE("GPL");
61
62 static u8 edid[256] = {
63 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
64 0x50, 0x21, 0x9C, 0x27, 0x00, 0x00, 0x00, 0x00,
65 0x19, 0x12, 0x01, 0x03, 0x80, 0x00, 0x00, 0x78,
66 0x0E, 0x00, 0xB2, 0xA0, 0x57, 0x49, 0x9B, 0x26,
67 0x10, 0x48, 0x4F, 0x2F, 0xCF, 0x00, 0x31, 0x59,
68 0x45, 0x59, 0x61, 0x59, 0x81, 0x99, 0x01, 0x01,
69 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3A,
70 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40, 0x58, 0x2C,
71 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E,
72 0x00, 0x00, 0x00, 0xFD, 0x00, 0x31, 0x55, 0x18,
73 0x5E, 0x11, 0x00, 0x0A, 0x20, 0x20, 0x20, 0x20,
74 0x20, 0x20, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x43,
75 0x20, 0x39, 0x30, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A,
76 0x0A, 0x0A, 0x0A, 0x0A, 0x00, 0x00, 0x00, 0x10,
77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x68,
79 0x02, 0x03, 0x1a, 0xc0, 0x48, 0xa2, 0x10, 0x04,
80 0x02, 0x01, 0x21, 0x14, 0x13, 0x23, 0x09, 0x07,
81 0x07, 0x65, 0x03, 0x0c, 0x00, 0x10, 0x00, 0xe2,
82 0x00, 0x2a, 0x01, 0x1d, 0x00, 0x80, 0x51, 0xd0,
83 0x1c, 0x20, 0x40, 0x80, 0x35, 0x00, 0x00, 0x00,
84 0x00, 0x00, 0x00, 0x1e, 0x8c, 0x0a, 0xd0, 0x8a,
85 0x20, 0xe0, 0x2d, 0x10, 0x10, 0x3e, 0x96, 0x00,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
87 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
88 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
91 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
92 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
93 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
94 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd7
95 };
96
97 static void cobalt_set_interrupt(struct cobalt *cobalt, bool enable)
98 {
99 if (enable) {
100 unsigned irqs = COBALT_SYSSTAT_VI0_INT1_MSK |
101 COBALT_SYSSTAT_VI1_INT1_MSK |
102 COBALT_SYSSTAT_VI2_INT1_MSK |
103 COBALT_SYSSTAT_VI3_INT1_MSK |
104 COBALT_SYSSTAT_VI0_INT2_MSK |
105 COBALT_SYSSTAT_VI1_INT2_MSK |
106 COBALT_SYSSTAT_VI2_INT2_MSK |
107 COBALT_SYSSTAT_VI3_INT2_MSK |
108 COBALT_SYSSTAT_VI0_LOST_DATA_MSK |
109 COBALT_SYSSTAT_VI1_LOST_DATA_MSK |
110 COBALT_SYSSTAT_VI2_LOST_DATA_MSK |
111 COBALT_SYSSTAT_VI3_LOST_DATA_MSK |
112 COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK;
113
114 if (cobalt->have_hsma_rx)
115 irqs |= COBALT_SYSSTAT_VIHSMA_INT1_MSK |
116 COBALT_SYSSTAT_VIHSMA_INT2_MSK |
117 COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK;
118
119 if (cobalt->have_hsma_tx)
120 irqs |= COBALT_SYSSTAT_VOHSMA_INT1_MSK |
121 COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK |
122 COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK;
123 /* Clear any existing interrupts */
124 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_EDGE, 0xffffffff);
125 /* PIO Core interrupt mask register.
126 Enable ADV7604 INT1 interrupts */
127 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, irqs);
128 } else {
129 /* Disable all ADV7604 interrupts */
130 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, 0);
131 }
132 }
133
134 static unsigned cobalt_get_sd_nr(struct v4l2_subdev *sd)
135 {
136 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev);
137 unsigned i;
138
139 for (i = 0; i < COBALT_NUM_NODES; i++)
140 if (sd == cobalt->streams[i].sd)
141 return i;
142 cobalt_err("Invalid adv7604 subdev pointer!\n");
143 return 0;
144 }
145
146 static void cobalt_notify(struct v4l2_subdev *sd,
147 unsigned int notification, void *arg)
148 {
149 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev);
150 unsigned sd_nr = cobalt_get_sd_nr(sd);
151 struct cobalt_stream *s = &cobalt->streams[sd_nr];
152 bool hotplug = arg ? *((int *)arg) : false;
153
154 if (s->is_output)
155 return;
156
157 switch (notification) {
158 case ADV76XX_HOTPLUG:
159 cobalt_s_bit_sysctrl(cobalt,
160 COBALT_SYS_CTRL_HPD_TO_CONNECTOR_BIT(sd_nr), hotplug);
161 cobalt_dbg(1, "Set hotplug for adv %d to %d\n", sd_nr, hotplug);
162 break;
163 case V4L2_DEVICE_NOTIFY_EVENT:
164 cobalt_dbg(1, "Format changed for adv %d\n", sd_nr);
165 v4l2_event_queue(&s->vdev, arg);
166 break;
167 default:
168 break;
169 }
170 }
171
172 static int get_payload_size(u16 code)
173 {
174 switch (code) {
175 case 0: return 128;
176 case 1: return 256;
177 case 2: return 512;
178 case 3: return 1024;
179 case 4: return 2048;
180 case 5: return 4096;
181 default: return 0;
182 }
183 return 0;
184 }
185
186 static const char *get_link_speed(u16 stat)
187 {
188 switch (stat & PCI_EXP_LNKSTA_CLS) {
189 case 1: return "2.5 Gbit/s";
190 case 2: return "5 Gbit/s";
191 case 3: return "10 Gbit/s";
192 }
193 return "Unknown speed";
194 }
195
196 void cobalt_pcie_status_show(struct cobalt *cobalt)
197 {
198 struct pci_dev *pci_dev = cobalt->pci_dev;
199 struct pci_dev *pci_bus_dev = cobalt->pci_dev->bus->self;
200 int offset;
201 int bus_offset;
202 u32 capa;
203 u16 stat, ctrl;
204
205 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
206 bus_offset = pci_find_capability(pci_bus_dev, PCI_CAP_ID_EXP);
207
208 /* Device */
209 pci_read_config_dword(pci_dev, offset + PCI_EXP_DEVCAP, &capa);
210 pci_read_config_word(pci_dev, offset + PCI_EXP_DEVCTL, &ctrl);
211 pci_read_config_word(pci_dev, offset + PCI_EXP_DEVSTA, &stat);
212 cobalt_info("PCIe device capability 0x%08x: Max payload %d\n",
213 capa, get_payload_size(capa & PCI_EXP_DEVCAP_PAYLOAD));
214 cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n",
215 ctrl,
216 get_payload_size((ctrl & PCI_EXP_DEVCTL_PAYLOAD) >> 5),
217 get_payload_size((ctrl & PCI_EXP_DEVCTL_READRQ) >> 12));
218 cobalt_info("PCIe device status 0x%04x\n", stat);
219
220 /* Link */
221 pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &capa);
222 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKCTL, &ctrl);
223 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &stat);
224 cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n",
225 capa, get_link_speed(capa),
226 (capa & PCI_EXP_LNKCAP_MLW) >> 4);
227 cobalt_info("PCIe link control 0x%04x\n", ctrl);
228 cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n",
229 stat, get_link_speed(stat),
230 (stat & PCI_EXP_LNKSTA_NLW) >> 4);
231
232 /* Bus */
233 pci_read_config_dword(pci_bus_dev, bus_offset + PCI_EXP_LNKCAP, &capa);
234 cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n",
235 capa, get_link_speed(capa),
236 (capa & PCI_EXP_LNKCAP_MLW) >> 4);
237
238 /* Slot */
239 pci_read_config_dword(pci_dev, offset + PCI_EXP_SLTCAP, &capa);
240 pci_read_config_word(pci_dev, offset + PCI_EXP_SLTCTL, &ctrl);
241 pci_read_config_word(pci_dev, offset + PCI_EXP_SLTSTA, &stat);
242 cobalt_info("PCIe slot capability 0x%08x\n", capa);
243 cobalt_info("PCIe slot control 0x%04x\n", ctrl);
244 cobalt_info("PCIe slot status 0x%04x\n", stat);
245 }
246
247 static unsigned pcie_link_get_lanes(struct cobalt *cobalt)
248 {
249 struct pci_dev *pci_dev = cobalt->pci_dev;
250 unsigned offset;
251 u16 link;
252
253 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
254 if (!offset)
255 return 0;
256 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &link);
257 return (link & PCI_EXP_LNKSTA_NLW) >> 4;
258 }
259
260 static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt)
261 {
262 struct pci_dev *pci_dev = cobalt->pci_dev->bus->self;
263 unsigned offset;
264 u32 link;
265
266 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
267 if (!offset)
268 return 0;
269 pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &link);
270 return (link & PCI_EXP_LNKCAP_MLW) >> 4;
271 }
272
273 static void msi_config_show(struct cobalt *cobalt, struct pci_dev *pci_dev)
274 {
275 u16 ctrl, data;
276 u32 adrs_l, adrs_h;
277
278 pci_read_config_word(pci_dev, 0x52, &ctrl);
279 cobalt_info("MSI %s\n", ctrl & 1 ? "enable" : "disable");
280 cobalt_info("MSI multiple message: Capable %u. Enable %u\n",
281 (1 << ((ctrl >> 1) & 7)), (1 << ((ctrl >> 4) & 7)));
282 if (ctrl & 0x80)
283 cobalt_info("MSI: 64-bit address capable\n");
284 pci_read_config_dword(pci_dev, 0x54, &adrs_l);
285 pci_read_config_dword(pci_dev, 0x58, &adrs_h);
286 pci_read_config_word(pci_dev, 0x5c, &data);
287 if (ctrl & 0x80)
288 cobalt_info("MSI: Address 0x%08x%08x. Data 0x%04x\n",
289 adrs_h, adrs_l, data);
290 else
291 cobalt_info("MSI: Address 0x%08x. Data 0x%04x\n",
292 adrs_l, data);
293 }
294
295 static void cobalt_pci_iounmap(struct cobalt *cobalt, struct pci_dev *pci_dev)
296 {
297 if (cobalt->bar0) {
298 pci_iounmap(pci_dev, cobalt->bar0);
299 cobalt->bar0 = NULL;
300 }
301 if (cobalt->bar1) {
302 pci_iounmap(pci_dev, cobalt->bar1);
303 cobalt->bar1 = NULL;
304 }
305 }
306
307 static void cobalt_free_msi(struct cobalt *cobalt, struct pci_dev *pci_dev)
308 {
309 free_irq(pci_dev->irq, (void *)cobalt);
310
311 if (cobalt->msi_enabled)
312 pci_disable_msi(pci_dev);
313 }
314
315 static int cobalt_setup_pci(struct cobalt *cobalt, struct pci_dev *pci_dev,
316 const struct pci_device_id *pci_id)
317 {
318 u32 ctrl;
319 int ret;
320
321 cobalt_dbg(1, "enabling pci device\n");
322
323 ret = pci_enable_device(pci_dev);
324 if (ret) {
325 cobalt_err("can't enable device\n");
326 return ret;
327 }
328 pci_set_master(pci_dev);
329 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &cobalt->card_rev);
330 pci_read_config_word(pci_dev, PCI_DEVICE_ID, &cobalt->device_id);
331
332 switch (cobalt->device_id) {
333 case PCI_DEVICE_ID_COBALT:
334 cobalt_info("PCI Express interface from Omnitek\n");
335 break;
336 default:
337 cobalt_info("PCI Express interface provider is unknown!\n");
338 break;
339 }
340
341 if (pcie_link_get_lanes(cobalt) != 8) {
342 cobalt_warn("PCI Express link width is %d lanes.\n",
343 pcie_link_get_lanes(cobalt));
344 if (pcie_bus_link_get_lanes(cobalt) < 8)
345 cobalt_warn("The current slot only supports %d lanes, for best performance 8 are needed\n",
346 pcie_bus_link_get_lanes(cobalt));
347 if (pcie_link_get_lanes(cobalt) != pcie_bus_link_get_lanes(cobalt)) {
348 cobalt_err("The card is most likely not seated correctly in the PCIe slot\n");
349 ret = -EIO;
350 goto err_disable;
351 }
352 }
353
354 if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) {
355 ret = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
356 if (ret) {
357 cobalt_err("no suitable DMA available\n");
358 goto err_disable;
359 }
360 }
361
362 ret = pci_request_regions(pci_dev, "cobalt");
363 if (ret) {
364 cobalt_err("error requesting regions\n");
365 goto err_disable;
366 }
367
368 cobalt_pcie_status_show(cobalt);
369
370 cobalt->bar0 = pci_iomap(pci_dev, 0, 0);
371 cobalt->bar1 = pci_iomap(pci_dev, 1, 0);
372 if (cobalt->bar1 == NULL) {
373 cobalt->bar1 = pci_iomap(pci_dev, 2, 0);
374 cobalt_info("64-bit BAR\n");
375 }
376 if (!cobalt->bar0 || !cobalt->bar1) {
377 ret = -EIO;
378 goto err_release;
379 }
380
381 /* Reset the video inputs before enabling any interrupts */
382 ctrl = cobalt_read_bar1(cobalt, COBALT_SYS_CTRL_BASE);
383 cobalt_write_bar1(cobalt, COBALT_SYS_CTRL_BASE, ctrl & ~0xf00);
384
385 /* Disable interrupts to prevent any spurious interrupts
386 from being generated. */
387 cobalt_set_interrupt(cobalt, false);
388
389 if (pci_enable_msi_range(pci_dev, 1, 1) < 1) {
390 cobalt_err("Could not enable MSI\n");
391 cobalt->msi_enabled = false;
392 ret = -EIO;
393 goto err_release;
394 }
395 msi_config_show(cobalt, pci_dev);
396 cobalt->msi_enabled = true;
397
398 /* Register IRQ */
399 if (request_irq(pci_dev->irq, cobalt_irq_handler, IRQF_SHARED,
400 cobalt->v4l2_dev.name, (void *)cobalt)) {
401 cobalt_err("Failed to register irq %d\n", pci_dev->irq);
402 ret = -EIO;
403 goto err_msi;
404 }
405
406 omni_sg_dma_init(cobalt);
407 return 0;
408
409 err_msi:
410 pci_disable_msi(pci_dev);
411
412 err_release:
413 cobalt_pci_iounmap(cobalt, pci_dev);
414 pci_release_regions(pci_dev);
415
416 err_disable:
417 pci_disable_device(cobalt->pci_dev);
418 return ret;
419 }
420
421 static int cobalt_hdl_info_get(struct cobalt *cobalt)
422 {
423 int i;
424
425 for (i = 0; i < COBALT_HDL_INFO_SIZE; i++)
426 cobalt->hdl_info[i] =
427 ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i);
428 cobalt->hdl_info[COBALT_HDL_INFO_SIZE - 1] = '\0';
429 if (strstr(cobalt->hdl_info, COBALT_HDL_SEARCH_STR))
430 return 0;
431
432 return 1;
433 }
434
435 static void cobalt_stream_struct_init(struct cobalt *cobalt)
436 {
437 int i;
438
439 for (i = 0; i < COBALT_NUM_STREAMS; i++) {
440 struct cobalt_stream *s = &cobalt->streams[i];
441
442 s->cobalt = cobalt;
443 s->flags = 0;
444 s->is_audio = false;
445 s->is_output = false;
446 s->is_dummy = true;
447
448 /* The Memory DMA channels will always get a lower channel
449 * number than the FIFO DMA. Video input should map to the
450 * stream 0-3. The other can use stream struct from 4 and
451 * higher */
452 if (i <= COBALT_HSMA_IN_NODE) {
453 s->dma_channel = i + cobalt->first_fifo_channel;
454 s->video_channel = i;
455 s->dma_fifo_mask =
456 COBALT_SYSSTAT_VI0_LOST_DATA_MSK << (4 * i);
457 s->adv_irq_mask =
458 COBALT_SYSSTAT_VI0_INT1_MSK << (4 * i);
459 } else if (i >= COBALT_AUDIO_IN_STREAM &&
460 i <= COBALT_AUDIO_IN_STREAM + 4) {
461 unsigned idx = i - COBALT_AUDIO_IN_STREAM;
462
463 s->dma_channel = 6 + idx;
464 s->is_audio = true;
465 s->video_channel = idx;
466 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK;
467 } else if (i == COBALT_HSMA_OUT_NODE) {
468 s->dma_channel = 11;
469 s->is_output = true;
470 s->video_channel = 5;
471 s->dma_fifo_mask = COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK;
472 s->adv_irq_mask = COBALT_SYSSTAT_VOHSMA_INT1_MSK;
473 } else if (i == COBALT_AUDIO_OUT_STREAM) {
474 s->dma_channel = 12;
475 s->is_audio = true;
476 s->is_output = true;
477 s->video_channel = 5;
478 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK;
479 } else {
480 /* FIXME: Memory DMA for debug purpose */
481 s->dma_channel = i - COBALT_NUM_NODES;
482 }
483 cobalt_info("stream #%d -> dma channel #%d <- video channel %d\n",
484 i, s->dma_channel, s->video_channel);
485 }
486 }
487
488 static int cobalt_subdevs_init(struct cobalt *cobalt)
489 {
490 static struct adv76xx_platform_data adv7604_pdata = {
491 .disable_pwrdnb = 1,
492 .ain_sel = ADV7604_AIN7_8_9_NC_SYNC_3_1,
493 .bus_order = ADV7604_BUS_ORDER_BRG,
494 .blank_data = 1,
495 .op_format_mode_sel = ADV7604_OP_FORMAT_MODE0,
496 .int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH,
497 .dr_str_data = ADV76XX_DR_STR_HIGH,
498 .dr_str_clk = ADV76XX_DR_STR_HIGH,
499 .dr_str_sync = ADV76XX_DR_STR_HIGH,
500 .hdmi_free_run_mode = 1,
501 .inv_vs_pol = 1,
502 .inv_hs_pol = 1,
503 };
504 static struct i2c_board_info adv7604_info = {
505 .type = "adv7604",
506 .addr = 0x20,
507 .platform_data = &adv7604_pdata,
508 };
509
510 struct cobalt_stream *s = cobalt->streams;
511 int i;
512
513 for (i = 0; i < COBALT_NUM_INPUTS; i++) {
514 struct v4l2_subdev_format sd_fmt = {
515 .pad = ADV7604_PAD_SOURCE,
516 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
517 .format.code = MEDIA_BUS_FMT_YUYV8_1X16,
518 };
519 struct v4l2_subdev_edid cobalt_edid = {
520 .pad = ADV76XX_PAD_HDMI_PORT_A,
521 .start_block = 0,
522 .blocks = 2,
523 .edid = edid,
524 };
525 int err;
526
527 s[i].pad_source = ADV7604_PAD_SOURCE;
528 s[i].i2c_adap = &cobalt->i2c_adap[i];
529 if (s[i].i2c_adap->dev.parent == NULL)
530 continue;
531 cobalt_s_bit_sysctrl(cobalt,
532 COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(i), 1);
533 s[i].sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev,
534 s[i].i2c_adap, &adv7604_info, NULL);
535 if (!s[i].sd) {
536 if (cobalt_ignore_err)
537 continue;
538 return -ENODEV;
539 }
540 err = v4l2_subdev_call(s[i].sd, video, s_routing,
541 ADV76XX_PAD_HDMI_PORT_A, 0, 0);
542 if (err)
543 return err;
544 err = v4l2_subdev_call(s[i].sd, pad, set_edid,
545 &cobalt_edid);
546 if (err)
547 return err;
548 err = v4l2_subdev_call(s[i].sd, pad, set_fmt, NULL,
549 &sd_fmt);
550 if (err)
551 return err;
552 /* Reset channel video module */
553 cobalt_s_bit_sysctrl(cobalt,
554 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 0);
555 mdelay(2);
556 cobalt_s_bit_sysctrl(cobalt,
557 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 1);
558 mdelay(1);
559 s[i].is_dummy = false;
560 cobalt->streams[i + COBALT_AUDIO_IN_STREAM].is_dummy = false;
561 }
562 return 0;
563 }
564
565 static int cobalt_subdevs_hsma_init(struct cobalt *cobalt)
566 {
567 static struct adv7842_platform_data adv7842_pdata = {
568 .disable_pwrdnb = 1,
569 .ain_sel = ADV7842_AIN1_2_3_NC_SYNC_1_2,
570 .bus_order = ADV7842_BUS_ORDER_RBG,
571 .op_format_mode_sel = ADV7842_OP_FORMAT_MODE0,
572 .blank_data = 1,
573 .dr_str_data = 3,
574 .dr_str_clk = 3,
575 .dr_str_sync = 3,
576 .mode = ADV7842_MODE_HDMI,
577 .hdmi_free_run_enable = 1,
578 .vid_std_select = ADV7842_HDMI_COMP_VID_STD_HD_1250P,
579 .i2c_sdp_io = 0x4a,
580 .i2c_sdp = 0x48,
581 .i2c_cp = 0x22,
582 .i2c_vdp = 0x24,
583 .i2c_afe = 0x26,
584 .i2c_hdmi = 0x34,
585 .i2c_repeater = 0x32,
586 .i2c_edid = 0x36,
587 .i2c_infoframe = 0x3e,
588 .i2c_cec = 0x40,
589 .i2c_avlink = 0x42,
590 };
591 static struct i2c_board_info adv7842_info = {
592 .type = "adv7842",
593 .addr = 0x20,
594 .platform_data = &adv7842_pdata,
595 };
596 static struct v4l2_subdev_format sd_fmt = {
597 .pad = ADV7842_PAD_SOURCE,
598 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
599 .format.code = MEDIA_BUS_FMT_YUYV8_1X16,
600 };
601 static struct adv7511_platform_data adv7511_pdata = {
602 .i2c_edid = 0x7e >> 1,
603 .i2c_cec = 0x7c >> 1,
604 .i2c_pktmem = 0x70 >> 1,
605 .cec_clk = 12000000,
606 };
607 static struct i2c_board_info adv7511_info = {
608 .type = "adv7511",
609 .addr = 0x39, /* 0x39 or 0x3d */
610 .platform_data = &adv7511_pdata,
611 };
612 struct v4l2_subdev_edid cobalt_edid = {
613 .pad = ADV7842_EDID_PORT_A,
614 .start_block = 0,
615 .blocks = 2,
616 .edid = edid,
617 };
618 struct cobalt_stream *s = &cobalt->streams[COBALT_HSMA_IN_NODE];
619
620 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1];
621 if (s->i2c_adap->dev.parent == NULL)
622 return 0;
623 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 1);
624
625 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev,
626 s->i2c_adap, &adv7842_info, NULL);
627 if (s->sd) {
628 int err = v4l2_subdev_call(s->sd, pad, set_edid, &cobalt_edid);
629
630 if (err)
631 return err;
632 err = v4l2_subdev_call(s->sd, pad, set_fmt, NULL,
633 &sd_fmt);
634 if (err)
635 return err;
636 cobalt->have_hsma_rx = true;
637 s->pad_source = ADV7842_PAD_SOURCE;
638 s->is_dummy = false;
639 cobalt->streams[4 + COBALT_AUDIO_IN_STREAM].is_dummy = false;
640 /* Reset channel video module */
641 cobalt_s_bit_sysctrl(cobalt,
642 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0);
643 mdelay(2);
644 cobalt_s_bit_sysctrl(cobalt,
645 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 1);
646 mdelay(1);
647 return err;
648 }
649 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 0);
650 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_PWRDN0_TO_HSMA_TX_BIT, 0);
651 s++;
652 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1];
653 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev,
654 s->i2c_adap, &adv7511_info, NULL);
655 if (s->sd) {
656 /* A transmitter is hooked up, so we can set this bit */
657 cobalt_s_bit_sysctrl(cobalt,
658 COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 1);
659 cobalt_s_bit_sysctrl(cobalt,
660 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0);
661 cobalt_s_bit_sysctrl(cobalt,
662 COBALT_SYS_CTRL_VIDEO_TX_RESETN_BIT, 1);
663 cobalt->have_hsma_tx = true;
664 v4l2_subdev_call(s->sd, core, s_power, 1);
665 v4l2_subdev_call(s->sd, video, s_stream, 1);
666 v4l2_subdev_call(s->sd, audio, s_stream, 1);
667 v4l2_ctrl_s_ctrl(v4l2_ctrl_find(s->sd->ctrl_handler,
668 V4L2_CID_DV_TX_MODE), V4L2_DV_TX_MODE_HDMI);
669 s->is_dummy = false;
670 cobalt->streams[COBALT_AUDIO_OUT_STREAM].is_dummy = false;
671 return 0;
672 }
673 return -ENODEV;
674 }
675
676 static int cobalt_probe(struct pci_dev *pci_dev,
677 const struct pci_device_id *pci_id)
678 {
679 struct cobalt *cobalt;
680 int retval = 0;
681 int i;
682
683 /* FIXME - module parameter arrays constrain max instances */
684 i = atomic_inc_return(&cobalt_instance) - 1;
685
686 cobalt = kzalloc(sizeof(struct cobalt), GFP_ATOMIC);
687 if (cobalt == NULL)
688 return -ENOMEM;
689 cobalt->pci_dev = pci_dev;
690 cobalt->instance = i;
691
692 retval = v4l2_device_register(&pci_dev->dev, &cobalt->v4l2_dev);
693 if (retval) {
694 pr_err("cobalt: v4l2_device_register of card %d failed\n",
695 cobalt->instance);
696 kfree(cobalt);
697 return retval;
698 }
699 snprintf(cobalt->v4l2_dev.name, sizeof(cobalt->v4l2_dev.name),
700 "cobalt-%d", cobalt->instance);
701 cobalt->v4l2_dev.notify = cobalt_notify;
702 cobalt_info("Initializing card %d\n", cobalt->instance);
703
704 cobalt->irq_work_queues =
705 create_singlethread_workqueue(cobalt->v4l2_dev.name);
706 if (cobalt->irq_work_queues == NULL) {
707 cobalt_err("Could not create workqueue\n");
708 retval = -ENOMEM;
709 goto err;
710 }
711
712 INIT_WORK(&cobalt->irq_work_queue, cobalt_irq_work_handler);
713
714 /* PCI Device Setup */
715 retval = cobalt_setup_pci(cobalt, pci_dev, pci_id);
716 if (retval != 0)
717 goto err_wq;
718
719 /* Show HDL version info */
720 if (cobalt_hdl_info_get(cobalt))
721 cobalt_info("Not able to read the HDL info\n");
722 else
723 cobalt_info("%s", cobalt->hdl_info);
724
725 retval = cobalt_i2c_init(cobalt);
726 if (retval)
727 goto err_pci;
728
729 cobalt_stream_struct_init(cobalt);
730
731 retval = cobalt_subdevs_init(cobalt);
732 if (retval)
733 goto err_i2c;
734
735 if (!(cobalt_read_bar1(cobalt, COBALT_SYS_STAT_BASE) &
736 COBALT_SYSSTAT_HSMA_PRSNTN_MSK)) {
737 retval = cobalt_subdevs_hsma_init(cobalt);
738 if (retval)
739 goto err_i2c;
740 }
741
742 retval = v4l2_device_register_subdev_nodes(&cobalt->v4l2_dev);
743 if (retval)
744 goto err_i2c;
745 retval = cobalt_nodes_register(cobalt);
746 if (retval) {
747 cobalt_err("Error %d registering device nodes\n", retval);
748 goto err_i2c;
749 }
750 cobalt_set_interrupt(cobalt, true);
751 v4l2_device_call_all(&cobalt->v4l2_dev, 0, core,
752 interrupt_service_routine, 0, NULL);
753
754 cobalt_info("Initialized cobalt card\n");
755
756 cobalt_flash_probe(cobalt);
757
758 return 0;
759
760 err_i2c:
761 cobalt_i2c_exit(cobalt);
762 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0);
763 err_pci:
764 cobalt_free_msi(cobalt, pci_dev);
765 cobalt_pci_iounmap(cobalt, pci_dev);
766 pci_release_regions(cobalt->pci_dev);
767 pci_disable_device(cobalt->pci_dev);
768 err_wq:
769 destroy_workqueue(cobalt->irq_work_queues);
770 err:
771 if (retval == 0)
772 retval = -ENODEV;
773 cobalt_err("error %d on initialization\n", retval);
774
775 v4l2_device_unregister(&cobalt->v4l2_dev);
776 kfree(cobalt);
777 return retval;
778 }
779
780 static void cobalt_remove(struct pci_dev *pci_dev)
781 {
782 struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev);
783 struct cobalt *cobalt = to_cobalt(v4l2_dev);
784 int i;
785
786 cobalt_flash_remove(cobalt);
787 cobalt_set_interrupt(cobalt, false);
788 flush_workqueue(cobalt->irq_work_queues);
789 cobalt_nodes_unregister(cobalt);
790 for (i = 0; i < COBALT_NUM_ADAPTERS; i++) {
791 struct v4l2_subdev *sd = cobalt->streams[i].sd;
792 struct i2c_client *client;
793
794 if (sd == NULL)
795 continue;
796 client = v4l2_get_subdevdata(sd);
797 v4l2_device_unregister_subdev(sd);
798 i2c_unregister_device(client);
799 }
800 cobalt_i2c_exit(cobalt);
801 cobalt_free_msi(cobalt, pci_dev);
802 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0);
803 cobalt_pci_iounmap(cobalt, pci_dev);
804 pci_release_regions(cobalt->pci_dev);
805 pci_disable_device(cobalt->pci_dev);
806 destroy_workqueue(cobalt->irq_work_queues);
807
808 cobalt_info("removed cobalt card\n");
809
810 v4l2_device_unregister(v4l2_dev);
811 kfree(cobalt);
812 }
813
814 /* define a pci_driver for card detection */
815 static struct pci_driver cobalt_pci_driver = {
816 .name = "cobalt",
817 .id_table = cobalt_pci_tbl,
818 .probe = cobalt_probe,
819 .remove = cobalt_remove,
820 };
821
822 module_pci_driver(cobalt_pci_driver);
Linux kernel - Deliverables
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