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Merge tag 'tpmdd-next-20160902' into next
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885-cards.c
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 */
17
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/delay.h>
22 #include <media/drv-intf/cx25840.h>
23 #include <linux/firmware.h>
24 #include <misc/altera.h>
25
26 #include "cx23885.h"
27 #include "tuner-xc2028.h"
28 #include "netup-eeprom.h"
29 #include "netup-init.h"
30 #include "altera-ci.h"
31 #include "xc4000.h"
32 #include "xc5000.h"
33 #include "cx23888-ir.h"
34
35 static unsigned int netup_card_rev = 4;
36 module_param(netup_card_rev, int, 0644);
37 MODULE_PARM_DESC(netup_card_rev,
38 "NetUP Dual DVB-T/C CI card revision");
39 static unsigned int enable_885_ir;
40 module_param(enable_885_ir, int, 0644);
41 MODULE_PARM_DESC(enable_885_ir,
42 "Enable integrated IR controller for supported\n"
43 "\t\t CX2388[57] boards that are wired for it:\n"
44 "\t\t\tHVR-1250 (reported safe)\n"
45 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
46 "\t\t\tTeVii S470 (reported unsafe)\n"
47 "\t\t This can cause an interrupt storm with some cards.\n"
48 "\t\t Default: 0 [Disabled]");
49
50 /* ------------------------------------------------------------------ */
51 /* board config info */
52
53 struct cx23885_board cx23885_boards[] = {
54 [CX23885_BOARD_UNKNOWN] = {
55 .name = "UNKNOWN/GENERIC",
56 /* Ensure safe default for unknown boards */
57 .clk_freq = 0,
58 .input = {{
59 .type = CX23885_VMUX_COMPOSITE1,
60 .vmux = 0,
61 }, {
62 .type = CX23885_VMUX_COMPOSITE2,
63 .vmux = 1,
64 }, {
65 .type = CX23885_VMUX_COMPOSITE3,
66 .vmux = 2,
67 }, {
68 .type = CX23885_VMUX_COMPOSITE4,
69 .vmux = 3,
70 } },
71 },
72 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
73 .name = "Hauppauge WinTV-HVR1800lp",
74 .portc = CX23885_MPEG_DVB,
75 .input = {{
76 .type = CX23885_VMUX_TELEVISION,
77 .vmux = 0,
78 .gpio0 = 0xff00,
79 }, {
80 .type = CX23885_VMUX_DEBUG,
81 .vmux = 0,
82 .gpio0 = 0xff01,
83 }, {
84 .type = CX23885_VMUX_COMPOSITE1,
85 .vmux = 1,
86 .gpio0 = 0xff02,
87 }, {
88 .type = CX23885_VMUX_SVIDEO,
89 .vmux = 2,
90 .gpio0 = 0xff02,
91 } },
92 },
93 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
94 .name = "Hauppauge WinTV-HVR1800",
95 .porta = CX23885_ANALOG_VIDEO,
96 .portb = CX23885_MPEG_ENCODER,
97 .portc = CX23885_MPEG_DVB,
98 .tuner_type = TUNER_PHILIPS_TDA8290,
99 .tuner_addr = 0x42, /* 0x84 >> 1 */
100 .tuner_bus = 1,
101 .input = {{
102 .type = CX23885_VMUX_TELEVISION,
103 .vmux = CX25840_VIN7_CH3 |
104 CX25840_VIN5_CH2 |
105 CX25840_VIN2_CH1,
106 .amux = CX25840_AUDIO8,
107 .gpio0 = 0,
108 }, {
109 .type = CX23885_VMUX_COMPOSITE1,
110 .vmux = CX25840_VIN7_CH3 |
111 CX25840_VIN4_CH2 |
112 CX25840_VIN6_CH1,
113 .amux = CX25840_AUDIO7,
114 .gpio0 = 0,
115 }, {
116 .type = CX23885_VMUX_SVIDEO,
117 .vmux = CX25840_VIN7_CH3 |
118 CX25840_VIN4_CH2 |
119 CX25840_VIN8_CH1 |
120 CX25840_SVIDEO_ON,
121 .amux = CX25840_AUDIO7,
122 .gpio0 = 0,
123 } },
124 },
125 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126 .name = "Hauppauge WinTV-HVR1250",
127 .porta = CX23885_ANALOG_VIDEO,
128 .portc = CX23885_MPEG_DVB,
129 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
130 .tuner_type = TUNER_PHILIPS_TDA8290,
131 .tuner_addr = 0x42, /* 0x84 >> 1 */
132 .tuner_bus = 1,
133 #endif
134 .force_bff = 1,
135 .input = {{
136 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
137 .type = CX23885_VMUX_TELEVISION,
138 .vmux = CX25840_VIN7_CH3 |
139 CX25840_VIN5_CH2 |
140 CX25840_VIN2_CH1,
141 .amux = CX25840_AUDIO8,
142 .gpio0 = 0xff00,
143 }, {
144 #endif
145 .type = CX23885_VMUX_COMPOSITE1,
146 .vmux = CX25840_VIN7_CH3 |
147 CX25840_VIN4_CH2 |
148 CX25840_VIN6_CH1,
149 .amux = CX25840_AUDIO7,
150 .gpio0 = 0xff02,
151 }, {
152 .type = CX23885_VMUX_SVIDEO,
153 .vmux = CX25840_VIN7_CH3 |
154 CX25840_VIN4_CH2 |
155 CX25840_VIN8_CH1 |
156 CX25840_SVIDEO_ON,
157 .amux = CX25840_AUDIO7,
158 .gpio0 = 0xff02,
159 } },
160 },
161 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
162 .name = "DViCO FusionHDTV5 Express",
163 .portb = CX23885_MPEG_DVB,
164 },
165 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
166 .name = "Hauppauge WinTV-HVR1500Q",
167 .portc = CX23885_MPEG_DVB,
168 },
169 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
170 .name = "Hauppauge WinTV-HVR1500",
171 .porta = CX23885_ANALOG_VIDEO,
172 .portc = CX23885_MPEG_DVB,
173 .tuner_type = TUNER_XC2028,
174 .tuner_addr = 0x61, /* 0xc2 >> 1 */
175 .input = {{
176 .type = CX23885_VMUX_TELEVISION,
177 .vmux = CX25840_VIN7_CH3 |
178 CX25840_VIN5_CH2 |
179 CX25840_VIN2_CH1,
180 .gpio0 = 0,
181 }, {
182 .type = CX23885_VMUX_COMPOSITE1,
183 .vmux = CX25840_VIN7_CH3 |
184 CX25840_VIN4_CH2 |
185 CX25840_VIN6_CH1,
186 .gpio0 = 0,
187 }, {
188 .type = CX23885_VMUX_SVIDEO,
189 .vmux = CX25840_VIN7_CH3 |
190 CX25840_VIN4_CH2 |
191 CX25840_VIN8_CH1 |
192 CX25840_SVIDEO_ON,
193 .gpio0 = 0,
194 } },
195 },
196 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
197 .name = "Hauppauge WinTV-HVR1200",
198 .portc = CX23885_MPEG_DVB,
199 },
200 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
201 .name = "Hauppauge WinTV-HVR1700",
202 .portc = CX23885_MPEG_DVB,
203 },
204 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
205 .name = "Hauppauge WinTV-HVR1400",
206 .portc = CX23885_MPEG_DVB,
207 },
208 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
209 .name = "DViCO FusionHDTV7 Dual Express",
210 .portb = CX23885_MPEG_DVB,
211 .portc = CX23885_MPEG_DVB,
212 },
213 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
214 .name = "DViCO FusionHDTV DVB-T Dual Express",
215 .portb = CX23885_MPEG_DVB,
216 .portc = CX23885_MPEG_DVB,
217 },
218 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
219 .name = "Leadtek Winfast PxDVR3200 H",
220 .portc = CX23885_MPEG_DVB,
221 },
222 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
223 .name = "Leadtek Winfast PxPVR2200",
224 .porta = CX23885_ANALOG_VIDEO,
225 .tuner_type = TUNER_XC2028,
226 .tuner_addr = 0x61,
227 .tuner_bus = 1,
228 .input = {{
229 .type = CX23885_VMUX_TELEVISION,
230 .vmux = CX25840_VIN2_CH1 |
231 CX25840_VIN5_CH2,
232 .amux = CX25840_AUDIO8,
233 .gpio0 = 0x704040,
234 }, {
235 .type = CX23885_VMUX_COMPOSITE1,
236 .vmux = CX25840_COMPOSITE1,
237 .amux = CX25840_AUDIO7,
238 .gpio0 = 0x704040,
239 }, {
240 .type = CX23885_VMUX_SVIDEO,
241 .vmux = CX25840_SVIDEO_LUMA3 |
242 CX25840_SVIDEO_CHROMA4,
243 .amux = CX25840_AUDIO7,
244 .gpio0 = 0x704040,
245 }, {
246 .type = CX23885_VMUX_COMPONENT,
247 .vmux = CX25840_VIN7_CH1 |
248 CX25840_VIN6_CH2 |
249 CX25840_VIN8_CH3 |
250 CX25840_COMPONENT_ON,
251 .amux = CX25840_AUDIO7,
252 .gpio0 = 0x704040,
253 } },
254 },
255 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
256 .name = "Leadtek Winfast PxDVR3200 H XC4000",
257 .porta = CX23885_ANALOG_VIDEO,
258 .portc = CX23885_MPEG_DVB,
259 .tuner_type = TUNER_XC4000,
260 .tuner_addr = 0x61,
261 .radio_type = UNSET,
262 .radio_addr = ADDR_UNSET,
263 .input = {{
264 .type = CX23885_VMUX_TELEVISION,
265 .vmux = CX25840_VIN2_CH1 |
266 CX25840_VIN5_CH2 |
267 CX25840_NONE0_CH3,
268 }, {
269 .type = CX23885_VMUX_COMPOSITE1,
270 .vmux = CX25840_COMPOSITE1,
271 }, {
272 .type = CX23885_VMUX_SVIDEO,
273 .vmux = CX25840_SVIDEO_LUMA3 |
274 CX25840_SVIDEO_CHROMA4,
275 }, {
276 .type = CX23885_VMUX_COMPONENT,
277 .vmux = CX25840_VIN7_CH1 |
278 CX25840_VIN6_CH2 |
279 CX25840_VIN8_CH3 |
280 CX25840_COMPONENT_ON,
281 } },
282 },
283 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
284 .name = "Compro VideoMate E650F",
285 .portc = CX23885_MPEG_DVB,
286 },
287 [CX23885_BOARD_TBS_6920] = {
288 .name = "TurboSight TBS 6920",
289 .portb = CX23885_MPEG_DVB,
290 },
291 [CX23885_BOARD_TBS_6980] = {
292 .name = "TurboSight TBS 6980",
293 .portb = CX23885_MPEG_DVB,
294 .portc = CX23885_MPEG_DVB,
295 },
296 [CX23885_BOARD_TBS_6981] = {
297 .name = "TurboSight TBS 6981",
298 .portb = CX23885_MPEG_DVB,
299 .portc = CX23885_MPEG_DVB,
300 },
301 [CX23885_BOARD_TEVII_S470] = {
302 .name = "TeVii S470",
303 .portb = CX23885_MPEG_DVB,
304 },
305 [CX23885_BOARD_DVBWORLD_2005] = {
306 .name = "DVBWorld DVB-S2 2005",
307 .portb = CX23885_MPEG_DVB,
308 },
309 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
310 .ci_type = 1,
311 .name = "NetUP Dual DVB-S2 CI",
312 .portb = CX23885_MPEG_DVB,
313 .portc = CX23885_MPEG_DVB,
314 },
315 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
316 .name = "Hauppauge WinTV-HVR1270",
317 .portc = CX23885_MPEG_DVB,
318 },
319 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
320 .name = "Hauppauge WinTV-HVR1275",
321 .portc = CX23885_MPEG_DVB,
322 },
323 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
324 .name = "Hauppauge WinTV-HVR1255",
325 .porta = CX23885_ANALOG_VIDEO,
326 .portc = CX23885_MPEG_DVB,
327 .tuner_type = TUNER_ABSENT,
328 .tuner_addr = 0x42, /* 0x84 >> 1 */
329 .force_bff = 1,
330 .input = {{
331 .type = CX23885_VMUX_TELEVISION,
332 .vmux = CX25840_VIN7_CH3 |
333 CX25840_VIN5_CH2 |
334 CX25840_VIN2_CH1 |
335 CX25840_DIF_ON,
336 .amux = CX25840_AUDIO8,
337 }, {
338 .type = CX23885_VMUX_COMPOSITE1,
339 .vmux = CX25840_VIN7_CH3 |
340 CX25840_VIN4_CH2 |
341 CX25840_VIN6_CH1,
342 .amux = CX25840_AUDIO7,
343 }, {
344 .type = CX23885_VMUX_SVIDEO,
345 .vmux = CX25840_VIN7_CH3 |
346 CX25840_VIN4_CH2 |
347 CX25840_VIN8_CH1 |
348 CX25840_SVIDEO_ON,
349 .amux = CX25840_AUDIO7,
350 } },
351 },
352 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
353 .name = "Hauppauge WinTV-HVR1255",
354 .porta = CX23885_ANALOG_VIDEO,
355 .portc = CX23885_MPEG_DVB,
356 .tuner_type = TUNER_ABSENT,
357 .tuner_addr = 0x42, /* 0x84 >> 1 */
358 .force_bff = 1,
359 .input = {{
360 .type = CX23885_VMUX_TELEVISION,
361 .vmux = CX25840_VIN7_CH3 |
362 CX25840_VIN5_CH2 |
363 CX25840_VIN2_CH1 |
364 CX25840_DIF_ON,
365 .amux = CX25840_AUDIO8,
366 }, {
367 .type = CX23885_VMUX_SVIDEO,
368 .vmux = CX25840_VIN7_CH3 |
369 CX25840_VIN4_CH2 |
370 CX25840_VIN8_CH1 |
371 CX25840_SVIDEO_ON,
372 .amux = CX25840_AUDIO7,
373 } },
374 },
375 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
376 .name = "Hauppauge WinTV-HVR1210",
377 .portc = CX23885_MPEG_DVB,
378 },
379 [CX23885_BOARD_MYGICA_X8506] = {
380 .name = "Mygica X8506 DMB-TH",
381 .tuner_type = TUNER_XC5000,
382 .tuner_addr = 0x61,
383 .tuner_bus = 1,
384 .porta = CX23885_ANALOG_VIDEO,
385 .portb = CX23885_MPEG_DVB,
386 .input = {
387 {
388 .type = CX23885_VMUX_TELEVISION,
389 .vmux = CX25840_COMPOSITE2,
390 },
391 {
392 .type = CX23885_VMUX_COMPOSITE1,
393 .vmux = CX25840_COMPOSITE8,
394 },
395 {
396 .type = CX23885_VMUX_SVIDEO,
397 .vmux = CX25840_SVIDEO_LUMA3 |
398 CX25840_SVIDEO_CHROMA4,
399 },
400 {
401 .type = CX23885_VMUX_COMPONENT,
402 .vmux = CX25840_COMPONENT_ON |
403 CX25840_VIN1_CH1 |
404 CX25840_VIN6_CH2 |
405 CX25840_VIN7_CH3,
406 },
407 },
408 },
409 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
410 .name = "Magic-Pro ProHDTV Extreme 2",
411 .tuner_type = TUNER_XC5000,
412 .tuner_addr = 0x61,
413 .tuner_bus = 1,
414 .porta = CX23885_ANALOG_VIDEO,
415 .portb = CX23885_MPEG_DVB,
416 .input = {
417 {
418 .type = CX23885_VMUX_TELEVISION,
419 .vmux = CX25840_COMPOSITE2,
420 },
421 {
422 .type = CX23885_VMUX_COMPOSITE1,
423 .vmux = CX25840_COMPOSITE8,
424 },
425 {
426 .type = CX23885_VMUX_SVIDEO,
427 .vmux = CX25840_SVIDEO_LUMA3 |
428 CX25840_SVIDEO_CHROMA4,
429 },
430 {
431 .type = CX23885_VMUX_COMPONENT,
432 .vmux = CX25840_COMPONENT_ON |
433 CX25840_VIN1_CH1 |
434 CX25840_VIN6_CH2 |
435 CX25840_VIN7_CH3,
436 },
437 },
438 },
439 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
440 .name = "Hauppauge WinTV-HVR1850",
441 .porta = CX23885_ANALOG_VIDEO,
442 .portb = CX23885_MPEG_ENCODER,
443 .portc = CX23885_MPEG_DVB,
444 .tuner_type = TUNER_ABSENT,
445 .tuner_addr = 0x42, /* 0x84 >> 1 */
446 .force_bff = 1,
447 .input = {{
448 .type = CX23885_VMUX_TELEVISION,
449 .vmux = CX25840_VIN7_CH3 |
450 CX25840_VIN5_CH2 |
451 CX25840_VIN2_CH1 |
452 CX25840_DIF_ON,
453 .amux = CX25840_AUDIO8,
454 }, {
455 .type = CX23885_VMUX_COMPOSITE1,
456 .vmux = CX25840_VIN7_CH3 |
457 CX25840_VIN4_CH2 |
458 CX25840_VIN6_CH1,
459 .amux = CX25840_AUDIO7,
460 }, {
461 .type = CX23885_VMUX_SVIDEO,
462 .vmux = CX25840_VIN7_CH3 |
463 CX25840_VIN4_CH2 |
464 CX25840_VIN8_CH1 |
465 CX25840_SVIDEO_ON,
466 .amux = CX25840_AUDIO7,
467 } },
468 },
469 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
470 .name = "Compro VideoMate E800",
471 .portc = CX23885_MPEG_DVB,
472 },
473 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
474 .name = "Hauppauge WinTV-HVR1290",
475 .portc = CX23885_MPEG_DVB,
476 },
477 [CX23885_BOARD_MYGICA_X8558PRO] = {
478 .name = "Mygica X8558 PRO DMB-TH",
479 .portb = CX23885_MPEG_DVB,
480 .portc = CX23885_MPEG_DVB,
481 },
482 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
483 .name = "LEADTEK WinFast PxTV1200",
484 .porta = CX23885_ANALOG_VIDEO,
485 .tuner_type = TUNER_XC2028,
486 .tuner_addr = 0x61,
487 .tuner_bus = 1,
488 .input = {{
489 .type = CX23885_VMUX_TELEVISION,
490 .vmux = CX25840_VIN2_CH1 |
491 CX25840_VIN5_CH2 |
492 CX25840_NONE0_CH3,
493 }, {
494 .type = CX23885_VMUX_COMPOSITE1,
495 .vmux = CX25840_COMPOSITE1,
496 }, {
497 .type = CX23885_VMUX_SVIDEO,
498 .vmux = CX25840_SVIDEO_LUMA3 |
499 CX25840_SVIDEO_CHROMA4,
500 }, {
501 .type = CX23885_VMUX_COMPONENT,
502 .vmux = CX25840_VIN7_CH1 |
503 CX25840_VIN6_CH2 |
504 CX25840_VIN8_CH3 |
505 CX25840_COMPONENT_ON,
506 } },
507 },
508 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
509 .name = "GoTView X5 3D Hybrid",
510 .tuner_type = TUNER_XC5000,
511 .tuner_addr = 0x64,
512 .tuner_bus = 1,
513 .porta = CX23885_ANALOG_VIDEO,
514 .portb = CX23885_MPEG_DVB,
515 .input = {{
516 .type = CX23885_VMUX_TELEVISION,
517 .vmux = CX25840_VIN2_CH1 |
518 CX25840_VIN5_CH2,
519 .gpio0 = 0x02,
520 }, {
521 .type = CX23885_VMUX_COMPOSITE1,
522 .vmux = CX23885_VMUX_COMPOSITE1,
523 }, {
524 .type = CX23885_VMUX_SVIDEO,
525 .vmux = CX25840_SVIDEO_LUMA3 |
526 CX25840_SVIDEO_CHROMA4,
527 } },
528 },
529 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
530 .ci_type = 2,
531 .name = "NetUP Dual DVB-T/C-CI RF",
532 .porta = CX23885_ANALOG_VIDEO,
533 .portb = CX23885_MPEG_DVB,
534 .portc = CX23885_MPEG_DVB,
535 .num_fds_portb = 2,
536 .num_fds_portc = 2,
537 .tuner_type = TUNER_XC5000,
538 .tuner_addr = 0x64,
539 .input = { {
540 .type = CX23885_VMUX_TELEVISION,
541 .vmux = CX25840_COMPOSITE1,
542 } },
543 },
544 [CX23885_BOARD_MPX885] = {
545 .name = "MPX-885",
546 .porta = CX23885_ANALOG_VIDEO,
547 .input = {{
548 .type = CX23885_VMUX_COMPOSITE1,
549 .vmux = CX25840_COMPOSITE1,
550 .amux = CX25840_AUDIO6,
551 .gpio0 = 0,
552 }, {
553 .type = CX23885_VMUX_COMPOSITE2,
554 .vmux = CX25840_COMPOSITE2,
555 .amux = CX25840_AUDIO6,
556 .gpio0 = 0,
557 }, {
558 .type = CX23885_VMUX_COMPOSITE3,
559 .vmux = CX25840_COMPOSITE3,
560 .amux = CX25840_AUDIO7,
561 .gpio0 = 0,
562 }, {
563 .type = CX23885_VMUX_COMPOSITE4,
564 .vmux = CX25840_COMPOSITE4,
565 .amux = CX25840_AUDIO7,
566 .gpio0 = 0,
567 } },
568 },
569 [CX23885_BOARD_MYGICA_X8507] = {
570 .name = "Mygica X8502/X8507 ISDB-T",
571 .tuner_type = TUNER_XC5000,
572 .tuner_addr = 0x61,
573 .tuner_bus = 1,
574 .porta = CX23885_ANALOG_VIDEO,
575 .portb = CX23885_MPEG_DVB,
576 .input = {
577 {
578 .type = CX23885_VMUX_TELEVISION,
579 .vmux = CX25840_COMPOSITE2,
580 .amux = CX25840_AUDIO8,
581 },
582 {
583 .type = CX23885_VMUX_COMPOSITE1,
584 .vmux = CX25840_COMPOSITE8,
585 .amux = CX25840_AUDIO7,
586 },
587 {
588 .type = CX23885_VMUX_SVIDEO,
589 .vmux = CX25840_SVIDEO_LUMA3 |
590 CX25840_SVIDEO_CHROMA4,
591 .amux = CX25840_AUDIO7,
592 },
593 {
594 .type = CX23885_VMUX_COMPONENT,
595 .vmux = CX25840_COMPONENT_ON |
596 CX25840_VIN1_CH1 |
597 CX25840_VIN6_CH2 |
598 CX25840_VIN7_CH3,
599 .amux = CX25840_AUDIO7,
600 },
601 },
602 },
603 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
604 .name = "TerraTec Cinergy T PCIe Dual",
605 .portb = CX23885_MPEG_DVB,
606 .portc = CX23885_MPEG_DVB,
607 },
608 [CX23885_BOARD_TEVII_S471] = {
609 .name = "TeVii S471",
610 .portb = CX23885_MPEG_DVB,
611 },
612 [CX23885_BOARD_PROF_8000] = {
613 .name = "Prof Revolution DVB-S2 8000",
614 .portb = CX23885_MPEG_DVB,
615 },
616 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
617 .name = "Hauppauge WinTV-HVR4400/HVR5500",
618 .porta = CX23885_ANALOG_VIDEO,
619 .portb = CX23885_MPEG_DVB,
620 .portc = CX23885_MPEG_DVB,
621 .tuner_type = TUNER_NXP_TDA18271,
622 .tuner_addr = 0x60, /* 0xc0 >> 1 */
623 .tuner_bus = 1,
624 },
625 [CX23885_BOARD_HAUPPAUGE_STARBURST] = {
626 .name = "Hauppauge WinTV Starburst",
627 .portb = CX23885_MPEG_DVB,
628 },
629 [CX23885_BOARD_AVERMEDIA_HC81R] = {
630 .name = "AVerTV Hybrid Express Slim HC81R",
631 .tuner_type = TUNER_XC2028,
632 .tuner_addr = 0x61, /* 0xc2 >> 1 */
633 .tuner_bus = 1,
634 .porta = CX23885_ANALOG_VIDEO,
635 .input = {{
636 .type = CX23885_VMUX_TELEVISION,
637 .vmux = CX25840_VIN2_CH1 |
638 CX25840_VIN5_CH2 |
639 CX25840_NONE0_CH3 |
640 CX25840_NONE1_CH3,
641 .amux = CX25840_AUDIO8,
642 }, {
643 .type = CX23885_VMUX_SVIDEO,
644 .vmux = CX25840_VIN8_CH1 |
645 CX25840_NONE_CH2 |
646 CX25840_VIN7_CH3 |
647 CX25840_SVIDEO_ON,
648 .amux = CX25840_AUDIO6,
649 }, {
650 .type = CX23885_VMUX_COMPONENT,
651 .vmux = CX25840_VIN1_CH1 |
652 CX25840_NONE_CH2 |
653 CX25840_NONE0_CH3 |
654 CX25840_NONE1_CH3,
655 .amux = CX25840_AUDIO6,
656 } },
657 },
658 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
659 .name = "DViCO FusionHDTV DVB-T Dual Express2",
660 .portb = CX23885_MPEG_DVB,
661 .portc = CX23885_MPEG_DVB,
662 },
663 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
664 .name = "Hauppauge ImpactVCB-e",
665 .tuner_type = TUNER_ABSENT,
666 .porta = CX23885_ANALOG_VIDEO,
667 .input = {{
668 .type = CX23885_VMUX_COMPOSITE1,
669 .vmux = CX25840_VIN7_CH3 |
670 CX25840_VIN4_CH2 |
671 CX25840_VIN6_CH1,
672 .amux = CX25840_AUDIO7,
673 }, {
674 .type = CX23885_VMUX_SVIDEO,
675 .vmux = CX25840_VIN7_CH3 |
676 CX25840_VIN4_CH2 |
677 CX25840_VIN8_CH1 |
678 CX25840_SVIDEO_ON,
679 .amux = CX25840_AUDIO7,
680 } },
681 },
682 [CX23885_BOARD_DVBSKY_T9580] = {
683 .name = "DVBSky T9580",
684 .portb = CX23885_MPEG_DVB,
685 .portc = CX23885_MPEG_DVB,
686 },
687 [CX23885_BOARD_DVBSKY_T980C] = {
688 .name = "DVBSky T980C",
689 .portb = CX23885_MPEG_DVB,
690 },
691 [CX23885_BOARD_DVBSKY_S950C] = {
692 .name = "DVBSky S950C",
693 .portb = CX23885_MPEG_DVB,
694 },
695 [CX23885_BOARD_TT_CT2_4500_CI] = {
696 .name = "Technotrend TT-budget CT2-4500 CI",
697 .portb = CX23885_MPEG_DVB,
698 },
699 [CX23885_BOARD_DVBSKY_S950] = {
700 .name = "DVBSky S950",
701 .portb = CX23885_MPEG_DVB,
702 },
703 [CX23885_BOARD_DVBSKY_S952] = {
704 .name = "DVBSky S952",
705 .portb = CX23885_MPEG_DVB,
706 .portc = CX23885_MPEG_DVB,
707 },
708 [CX23885_BOARD_DVBSKY_T982] = {
709 .name = "DVBSky T982",
710 .portb = CX23885_MPEG_DVB,
711 .portc = CX23885_MPEG_DVB,
712 },
713 [CX23885_BOARD_HAUPPAUGE_HVR5525] = {
714 .name = "Hauppauge WinTV-HVR5525",
715 .portb = CX23885_MPEG_DVB,
716 .portc = CX23885_MPEG_DVB,
717 },
718 [CX23885_BOARD_VIEWCAST_260E] = {
719 .name = "ViewCast 260e",
720 .porta = CX23885_ANALOG_VIDEO,
721 .force_bff = 1,
722 .input = {{
723 .type = CX23885_VMUX_COMPOSITE1,
724 .vmux = CX25840_VIN6_CH1,
725 .amux = CX25840_AUDIO7,
726 }, {
727 .type = CX23885_VMUX_SVIDEO,
728 .vmux = CX25840_VIN7_CH3 |
729 CX25840_VIN5_CH1 |
730 CX25840_SVIDEO_ON,
731 .amux = CX25840_AUDIO7,
732 }, {
733 .type = CX23885_VMUX_COMPONENT,
734 .vmux = CX25840_VIN7_CH3 |
735 CX25840_VIN6_CH2 |
736 CX25840_VIN5_CH1 |
737 CX25840_COMPONENT_ON,
738 .amux = CX25840_AUDIO7,
739 } },
740 },
741 [CX23885_BOARD_VIEWCAST_460E] = {
742 .name = "ViewCast 460e",
743 .porta = CX23885_ANALOG_VIDEO,
744 .force_bff = 1,
745 .input = {{
746 .type = CX23885_VMUX_COMPOSITE1,
747 .vmux = CX25840_VIN4_CH1,
748 .amux = CX25840_AUDIO7,
749 }, {
750 .type = CX23885_VMUX_SVIDEO,
751 .vmux = CX25840_VIN7_CH3 |
752 CX25840_VIN6_CH1 |
753 CX25840_SVIDEO_ON,
754 .amux = CX25840_AUDIO7,
755 }, {
756 .type = CX23885_VMUX_COMPONENT,
757 .vmux = CX25840_VIN7_CH3 |
758 CX25840_VIN6_CH1 |
759 CX25840_VIN5_CH2 |
760 CX25840_COMPONENT_ON,
761 .amux = CX25840_AUDIO7,
762 }, {
763 .type = CX23885_VMUX_COMPOSITE2,
764 .vmux = CX25840_VIN6_CH1,
765 .amux = CX25840_AUDIO7,
766 } },
767 },
768 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
769 .name = "Hauppauge WinTV-QuadHD-DVB",
770 .portb = CX23885_MPEG_DVB,
771 .portc = CX23885_MPEG_DVB,
772 },
773 };
774 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
775
776 /* ------------------------------------------------------------------ */
777 /* PCI subsystem IDs */
778
779 struct cx23885_subid cx23885_subids[] = {
780 {
781 .subvendor = 0x0070,
782 .subdevice = 0x3400,
783 .card = CX23885_BOARD_UNKNOWN,
784 }, {
785 .subvendor = 0x0070,
786 .subdevice = 0x7600,
787 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
788 }, {
789 .subvendor = 0x0070,
790 .subdevice = 0x7800,
791 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
792 }, {
793 .subvendor = 0x0070,
794 .subdevice = 0x7801,
795 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
796 }, {
797 .subvendor = 0x0070,
798 .subdevice = 0x7809,
799 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
800 }, {
801 .subvendor = 0x0070,
802 .subdevice = 0x7911,
803 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
804 }, {
805 .subvendor = 0x18ac,
806 .subdevice = 0xd500,
807 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
808 }, {
809 .subvendor = 0x0070,
810 .subdevice = 0x7790,
811 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
812 }, {
813 .subvendor = 0x0070,
814 .subdevice = 0x7797,
815 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
816 }, {
817 .subvendor = 0x0070,
818 .subdevice = 0x7710,
819 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
820 }, {
821 .subvendor = 0x0070,
822 .subdevice = 0x7717,
823 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
824 }, {
825 .subvendor = 0x0070,
826 .subdevice = 0x71d1,
827 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
828 }, {
829 .subvendor = 0x0070,
830 .subdevice = 0x71d3,
831 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
832 }, {
833 .subvendor = 0x0070,
834 .subdevice = 0x8101,
835 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
836 }, {
837 .subvendor = 0x0070,
838 .subdevice = 0x8010,
839 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
840 }, {
841 .subvendor = 0x18ac,
842 .subdevice = 0xd618,
843 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
844 }, {
845 .subvendor = 0x18ac,
846 .subdevice = 0xdb78,
847 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
848 }, {
849 .subvendor = 0x107d,
850 .subdevice = 0x6681,
851 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
852 }, {
853 .subvendor = 0x107d,
854 .subdevice = 0x6f21,
855 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
856 }, {
857 .subvendor = 0x107d,
858 .subdevice = 0x6f39,
859 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
860 }, {
861 .subvendor = 0x185b,
862 .subdevice = 0xe800,
863 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
864 }, {
865 .subvendor = 0x6920,
866 .subdevice = 0x8888,
867 .card = CX23885_BOARD_TBS_6920,
868 }, {
869 .subvendor = 0x6980,
870 .subdevice = 0x8888,
871 .card = CX23885_BOARD_TBS_6980,
872 }, {
873 .subvendor = 0x6981,
874 .subdevice = 0x8888,
875 .card = CX23885_BOARD_TBS_6981,
876 }, {
877 .subvendor = 0xd470,
878 .subdevice = 0x9022,
879 .card = CX23885_BOARD_TEVII_S470,
880 }, {
881 .subvendor = 0x0001,
882 .subdevice = 0x2005,
883 .card = CX23885_BOARD_DVBWORLD_2005,
884 }, {
885 .subvendor = 0x1b55,
886 .subdevice = 0x2a2c,
887 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
888 }, {
889 .subvendor = 0x0070,
890 .subdevice = 0x2211,
891 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
892 }, {
893 .subvendor = 0x0070,
894 .subdevice = 0x2215,
895 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
896 }, {
897 .subvendor = 0x0070,
898 .subdevice = 0x221d,
899 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
900 }, {
901 .subvendor = 0x0070,
902 .subdevice = 0x2251,
903 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
904 }, {
905 .subvendor = 0x0070,
906 .subdevice = 0x2259,
907 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
908 }, {
909 .subvendor = 0x0070,
910 .subdevice = 0x2291,
911 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
912 }, {
913 .subvendor = 0x0070,
914 .subdevice = 0x2295,
915 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
916 }, {
917 .subvendor = 0x0070,
918 .subdevice = 0x2299,
919 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
920 }, {
921 .subvendor = 0x0070,
922 .subdevice = 0x229d,
923 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
924 }, {
925 .subvendor = 0x0070,
926 .subdevice = 0x22f0,
927 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
928 }, {
929 .subvendor = 0x0070,
930 .subdevice = 0x22f1,
931 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
932 }, {
933 .subvendor = 0x0070,
934 .subdevice = 0x22f2,
935 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
936 }, {
937 .subvendor = 0x0070,
938 .subdevice = 0x22f3,
939 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
940 }, {
941 .subvendor = 0x0070,
942 .subdevice = 0x22f4,
943 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
944 }, {
945 .subvendor = 0x0070,
946 .subdevice = 0x22f5,
947 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
948 }, {
949 .subvendor = 0x14f1,
950 .subdevice = 0x8651,
951 .card = CX23885_BOARD_MYGICA_X8506,
952 }, {
953 .subvendor = 0x14f1,
954 .subdevice = 0x8657,
955 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
956 }, {
957 .subvendor = 0x0070,
958 .subdevice = 0x8541,
959 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
960 }, {
961 .subvendor = 0x1858,
962 .subdevice = 0xe800,
963 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
964 }, {
965 .subvendor = 0x0070,
966 .subdevice = 0x8551,
967 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
968 }, {
969 .subvendor = 0x14f1,
970 .subdevice = 0x8578,
971 .card = CX23885_BOARD_MYGICA_X8558PRO,
972 }, {
973 .subvendor = 0x107d,
974 .subdevice = 0x6f22,
975 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
976 }, {
977 .subvendor = 0x5654,
978 .subdevice = 0x2390,
979 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
980 }, {
981 .subvendor = 0x1b55,
982 .subdevice = 0xe2e4,
983 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
984 }, {
985 .subvendor = 0x14f1,
986 .subdevice = 0x8502,
987 .card = CX23885_BOARD_MYGICA_X8507,
988 }, {
989 .subvendor = 0x153b,
990 .subdevice = 0x117e,
991 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
992 }, {
993 .subvendor = 0xd471,
994 .subdevice = 0x9022,
995 .card = CX23885_BOARD_TEVII_S471,
996 }, {
997 .subvendor = 0x8000,
998 .subdevice = 0x3034,
999 .card = CX23885_BOARD_PROF_8000,
1000 }, {
1001 .subvendor = 0x0070,
1002 .subdevice = 0xc108,
1003 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
1004 }, {
1005 .subvendor = 0x0070,
1006 .subdevice = 0xc138,
1007 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1008 }, {
1009 .subvendor = 0x0070,
1010 .subdevice = 0xc12a,
1011 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
1012 }, {
1013 .subvendor = 0x0070,
1014 .subdevice = 0xc1f8,
1015 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1016 }, {
1017 .subvendor = 0x1461,
1018 .subdevice = 0xd939,
1019 .card = CX23885_BOARD_AVERMEDIA_HC81R,
1020 }, {
1021 .subvendor = 0x0070,
1022 .subdevice = 0x7133,
1023 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1024 }, {
1025 .subvendor = 0x18ac,
1026 .subdevice = 0xdb98,
1027 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
1028 }, {
1029 .subvendor = 0x4254,
1030 .subdevice = 0x9580,
1031 .card = CX23885_BOARD_DVBSKY_T9580,
1032 }, {
1033 .subvendor = 0x4254,
1034 .subdevice = 0x980c,
1035 .card = CX23885_BOARD_DVBSKY_T980C,
1036 }, {
1037 .subvendor = 0x4254,
1038 .subdevice = 0x950c,
1039 .card = CX23885_BOARD_DVBSKY_S950C,
1040 }, {
1041 .subvendor = 0x13c2,
1042 .subdevice = 0x3013,
1043 .card = CX23885_BOARD_TT_CT2_4500_CI,
1044 }, {
1045 .subvendor = 0x4254,
1046 .subdevice = 0x0950,
1047 .card = CX23885_BOARD_DVBSKY_S950,
1048 }, {
1049 .subvendor = 0x4254,
1050 .subdevice = 0x0952,
1051 .card = CX23885_BOARD_DVBSKY_S952,
1052 }, {
1053 .subvendor = 0x4254,
1054 .subdevice = 0x0982,
1055 .card = CX23885_BOARD_DVBSKY_T982,
1056 }, {
1057 .subvendor = 0x0070,
1058 .subdevice = 0xf038,
1059 .card = CX23885_BOARD_HAUPPAUGE_HVR5525,
1060 }, {
1061 .subvendor = 0x1576,
1062 .subdevice = 0x0260,
1063 .card = CX23885_BOARD_VIEWCAST_260E,
1064 }, {
1065 .subvendor = 0x1576,
1066 .subdevice = 0x0460,
1067 .card = CX23885_BOARD_VIEWCAST_460E,
1068 }, {
1069 .subvendor = 0x0070,
1070 .subdevice = 0x6a28,
1071 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
1072 }, {
1073 .subvendor = 0x0070,
1074 .subdevice = 0x6b28,
1075 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
1076 },
1077 };
1078 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1079
1080 void cx23885_card_list(struct cx23885_dev *dev)
1081 {
1082 int i;
1083
1084 if (0 == dev->pci->subsystem_vendor &&
1085 0 == dev->pci->subsystem_device) {
1086 printk(KERN_INFO
1087 "%s: Board has no valid PCIe Subsystem ID and can't\n"
1088 "%s: be autodetected. Pass card=<n> insmod option\n"
1089 "%s: to workaround that. Redirect complaints to the\n"
1090 "%s: vendor of the TV card. Best regards,\n"
1091 "%s: -- tux\n",
1092 dev->name, dev->name, dev->name, dev->name, dev->name);
1093 } else {
1094 printk(KERN_INFO
1095 "%s: Your board isn't known (yet) to the driver.\n"
1096 "%s: Try to pick one of the existing card configs via\n"
1097 "%s: card=<n> insmod option. Updating to the latest\n"
1098 "%s: version might help as well.\n",
1099 dev->name, dev->name, dev->name, dev->name);
1100 }
1101 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1102 dev->name);
1103 for (i = 0; i < cx23885_bcount; i++)
1104 printk(KERN_INFO "%s: card=%d -> %s\n",
1105 dev->name, i, cx23885_boards[i].name);
1106 }
1107
1108 static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1109 {
1110 u32 sn;
1111
1112 /* The serial number record begins with tag 0x59 */
1113 if (*(eeprom_data + 0x00) != 0x59) {
1114 pr_info("%s() eeprom records are undefined, no serial number\n",
1115 __func__);
1116 return;
1117 }
1118
1119 sn = (*(eeprom_data + 0x06) << 24) |
1120 (*(eeprom_data + 0x05) << 16) |
1121 (*(eeprom_data + 0x04) << 8) |
1122 (*(eeprom_data + 0x03));
1123
1124 pr_info("%s: card '%s' sn# MM%d\n",
1125 dev->name,
1126 cx23885_boards[dev->board].name,
1127 sn);
1128 }
1129
1130 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1131 {
1132 struct tveeprom tv;
1133
1134 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
1135 eeprom_data);
1136
1137 /* Make sure we support the board model */
1138 switch (tv.model) {
1139 case 22001:
1140 /* WinTV-HVR1270 (PCIe, Retail, half height)
1141 * ATSC/QAM and basic analog, IR Blast */
1142 case 22009:
1143 /* WinTV-HVR1210 (PCIe, Retail, half height)
1144 * DVB-T and basic analog, IR Blast */
1145 case 22011:
1146 /* WinTV-HVR1270 (PCIe, Retail, half height)
1147 * ATSC/QAM and basic analog, IR Recv */
1148 case 22019:
1149 /* WinTV-HVR1210 (PCIe, Retail, half height)
1150 * DVB-T and basic analog, IR Recv */
1151 case 22021:
1152 /* WinTV-HVR1275 (PCIe, Retail, half height)
1153 * ATSC/QAM and basic analog, IR Recv */
1154 case 22029:
1155 /* WinTV-HVR1210 (PCIe, Retail, half height)
1156 * DVB-T and basic analog, IR Recv */
1157 case 22101:
1158 /* WinTV-HVR1270 (PCIe, Retail, full height)
1159 * ATSC/QAM and basic analog, IR Blast */
1160 case 22109:
1161 /* WinTV-HVR1210 (PCIe, Retail, full height)
1162 * DVB-T and basic analog, IR Blast */
1163 case 22111:
1164 /* WinTV-HVR1270 (PCIe, Retail, full height)
1165 * ATSC/QAM and basic analog, IR Recv */
1166 case 22119:
1167 /* WinTV-HVR1210 (PCIe, Retail, full height)
1168 * DVB-T and basic analog, IR Recv */
1169 case 22121:
1170 /* WinTV-HVR1275 (PCIe, Retail, full height)
1171 * ATSC/QAM and basic analog, IR Recv */
1172 case 22129:
1173 /* WinTV-HVR1210 (PCIe, Retail, full height)
1174 * DVB-T and basic analog, IR Recv */
1175 case 71009:
1176 /* WinTV-HVR1200 (PCIe, Retail, full height)
1177 * DVB-T and basic analog */
1178 case 71100:
1179 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1180 * Basic analog */
1181 case 71359:
1182 /* WinTV-HVR1200 (PCIe, OEM, half height)
1183 * DVB-T and basic analog */
1184 case 71439:
1185 /* WinTV-HVR1200 (PCIe, OEM, half height)
1186 * DVB-T and basic analog */
1187 case 71449:
1188 /* WinTV-HVR1200 (PCIe, OEM, full height)
1189 * DVB-T and basic analog */
1190 case 71939:
1191 /* WinTV-HVR1200 (PCIe, OEM, half height)
1192 * DVB-T and basic analog */
1193 case 71949:
1194 /* WinTV-HVR1200 (PCIe, OEM, full height)
1195 * DVB-T and basic analog */
1196 case 71959:
1197 /* WinTV-HVR1200 (PCIe, OEM, full height)
1198 * DVB-T and basic analog */
1199 case 71979:
1200 /* WinTV-HVR1200 (PCIe, OEM, half height)
1201 * DVB-T and basic analog */
1202 case 71999:
1203 /* WinTV-HVR1200 (PCIe, OEM, full height)
1204 * DVB-T and basic analog */
1205 case 76601:
1206 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1207 channel ATSC and MPEG2 HW Encoder */
1208 case 77001:
1209 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1210 and Basic analog */
1211 case 77011:
1212 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1213 and Basic analog */
1214 case 77041:
1215 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1216 and Basic analog */
1217 case 77051:
1218 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1219 and Basic analog */
1220 case 78011:
1221 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1222 Dual channel ATSC and MPEG2 HW Encoder */
1223 case 78501:
1224 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1225 Dual channel ATSC and MPEG2 HW Encoder */
1226 case 78521:
1227 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1228 Dual channel ATSC and MPEG2 HW Encoder */
1229 case 78531:
1230 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1231 Dual channel ATSC and MPEG2 HW Encoder */
1232 case 78631:
1233 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1234 Dual channel ATSC and MPEG2 HW Encoder */
1235 case 79001:
1236 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1237 ATSC and Basic analog */
1238 case 79101:
1239 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1240 ATSC and Basic analog */
1241 case 79501:
1242 /* WinTV-HVR1250 (PCIe, No IR, half height,
1243 ATSC [at least] and Basic analog) */
1244 case 79561:
1245 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1246 ATSC and Basic analog */
1247 case 79571:
1248 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1249 ATSC and Basic analog */
1250 case 79671:
1251 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1252 ATSC and Basic analog */
1253 case 80019:
1254 /* WinTV-HVR1400 (Express Card, Retail, IR,
1255 * DVB-T and Basic analog */
1256 case 81509:
1257 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1258 * DVB-T and MPEG2 HW Encoder */
1259 case 81519:
1260 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1261 * DVB-T and MPEG2 HW Encoder */
1262 break;
1263 case 85021:
1264 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1265 Dual channel ATSC and MPEG2 HW Encoder */
1266 break;
1267 case 85721:
1268 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1269 Dual channel ATSC and Basic analog */
1270 case 150329:
1271 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1272 break;
1273 case 166100:
1274 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
1275 DVB-T/T2/C, DVB-T/T2/C */
1276 break;
1277 case 166101:
1278 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1279 DVB-T/T2/C, DVB-T/T2/C */
1280 break;
1281 default:
1282 printk(KERN_WARNING "%s: warning: "
1283 "unknown hauppauge model #%d\n",
1284 dev->name, tv.model);
1285 break;
1286 }
1287
1288 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1289 dev->name, tv.model);
1290 }
1291
1292 /* Some TBS cards require initing a chip using a bitbanged SPI attached
1293 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1294 doesn't respond to any command. */
1295 static void tbs_card_init(struct cx23885_dev *dev)
1296 {
1297 int i;
1298 const u8 buf[] = {
1299 0xe0, 0x06, 0x66, 0x33, 0x65,
1300 0x01, 0x17, 0x06, 0xde};
1301
1302 switch (dev->board) {
1303 case CX23885_BOARD_TBS_6980:
1304 case CX23885_BOARD_TBS_6981:
1305 cx_set(GP0_IO, 0x00070007);
1306 usleep_range(1000, 10000);
1307 cx_clear(GP0_IO, 2);
1308 usleep_range(1000, 10000);
1309 for (i = 0; i < 9 * 8; i++) {
1310 cx_clear(GP0_IO, 7);
1311 usleep_range(1000, 10000);
1312 cx_set(GP0_IO,
1313 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1314 usleep_range(1000, 10000);
1315 }
1316 cx_set(GP0_IO, 7);
1317 break;
1318 }
1319 }
1320
1321 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1322 {
1323 struct cx23885_tsport *port = priv;
1324 struct cx23885_dev *dev = port->dev;
1325 u32 bitmask = 0;
1326
1327 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1328 return 0;
1329
1330 if (command != 0) {
1331 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1332 __func__, command);
1333 return -EINVAL;
1334 }
1335
1336 switch (dev->board) {
1337 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1338 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1339 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1340 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1341 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1342 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1343 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1344 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1345 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1346 /* Tuner Reset Command */
1347 bitmask = 0x04;
1348 break;
1349 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1350 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1351 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1352 /* Two identical tuners on two different i2c buses,
1353 * we need to reset the correct gpio. */
1354 if (port->nr == 1)
1355 bitmask = 0x01;
1356 else if (port->nr == 2)
1357 bitmask = 0x04;
1358 break;
1359 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1360 /* Tuner Reset Command */
1361 bitmask = 0x02;
1362 break;
1363 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1364 altera_ci_tuner_reset(dev, port->nr);
1365 break;
1366 case CX23885_BOARD_AVERMEDIA_HC81R:
1367 /* XC3028L Reset Command */
1368 bitmask = 1 << 2;
1369 break;
1370 }
1371
1372 if (bitmask) {
1373 /* Drive the tuner into reset and back out */
1374 cx_clear(GP0_IO, bitmask);
1375 mdelay(200);
1376 cx_set(GP0_IO, bitmask);
1377 }
1378
1379 return 0;
1380 }
1381
1382 void cx23885_gpio_setup(struct cx23885_dev *dev)
1383 {
1384 switch (dev->board) {
1385 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1386 /* GPIO-0 cx24227 demodulator reset */
1387 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1388 break;
1389 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1390 /* GPIO-0 cx24227 demodulator */
1391 /* GPIO-2 xc3028 tuner */
1392
1393 /* Put the parts into reset */
1394 cx_set(GP0_IO, 0x00050000);
1395 cx_clear(GP0_IO, 0x00000005);
1396 msleep(5);
1397
1398 /* Bring the parts out of reset */
1399 cx_set(GP0_IO, 0x00050005);
1400 break;
1401 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1402 /* GPIO-0 cx24227 demodulator reset */
1403 /* GPIO-2 xc5000 tuner reset */
1404 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1405 break;
1406 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1407 /* GPIO-0 656_CLK */
1408 /* GPIO-1 656_D0 */
1409 /* GPIO-2 8295A Reset */
1410 /* GPIO-3-10 cx23417 data0-7 */
1411 /* GPIO-11-14 cx23417 addr0-3 */
1412 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1413 /* GPIO-19 IR_RX */
1414
1415 /* CX23417 GPIO's */
1416 /* EIO15 Zilog Reset */
1417 /* EIO14 S5H1409/CX24227 Reset */
1418 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1419
1420 /* Put the demod into reset and protect the eeprom */
1421 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1422 mdelay(100);
1423
1424 /* Bring the demod and blaster out of reset */
1425 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1426 mdelay(100);
1427
1428 /* Force the TDA8295A into reset and back */
1429 cx23885_gpio_enable(dev, GPIO_2, 1);
1430 cx23885_gpio_set(dev, GPIO_2);
1431 mdelay(20);
1432 cx23885_gpio_clear(dev, GPIO_2);
1433 mdelay(20);
1434 cx23885_gpio_set(dev, GPIO_2);
1435 mdelay(20);
1436 break;
1437 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1438 /* GPIO-0 tda10048 demodulator reset */
1439 /* GPIO-2 tda18271 tuner reset */
1440
1441 /* Put the parts into reset and back */
1442 cx_set(GP0_IO, 0x00050000);
1443 mdelay(20);
1444 cx_clear(GP0_IO, 0x00000005);
1445 mdelay(20);
1446 cx_set(GP0_IO, 0x00050005);
1447 break;
1448 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1449 /* GPIO-0 TDA10048 demodulator reset */
1450 /* GPIO-2 TDA8295A Reset */
1451 /* GPIO-3-10 cx23417 data0-7 */
1452 /* GPIO-11-14 cx23417 addr0-3 */
1453 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1454
1455 /* The following GPIO's are on the interna AVCore (cx25840) */
1456 /* GPIO-19 IR_RX */
1457 /* GPIO-20 IR_TX 416/DVBT Select */
1458 /* GPIO-21 IIS DAT */
1459 /* GPIO-22 IIS WCLK */
1460 /* GPIO-23 IIS BCLK */
1461
1462 /* Put the parts into reset and back */
1463 cx_set(GP0_IO, 0x00050000);
1464 mdelay(20);
1465 cx_clear(GP0_IO, 0x00000005);
1466 mdelay(20);
1467 cx_set(GP0_IO, 0x00050005);
1468 break;
1469 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1470 /* GPIO-0 Dibcom7000p demodulator reset */
1471 /* GPIO-2 xc3028L tuner reset */
1472 /* GPIO-13 LED */
1473
1474 /* Put the parts into reset and back */
1475 cx_set(GP0_IO, 0x00050000);
1476 mdelay(20);
1477 cx_clear(GP0_IO, 0x00000005);
1478 mdelay(20);
1479 cx_set(GP0_IO, 0x00050005);
1480 break;
1481 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1482 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1483 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1484 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1485 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1486
1487 /* Put the parts into reset and back */
1488 cx_set(GP0_IO, 0x000f0000);
1489 mdelay(20);
1490 cx_clear(GP0_IO, 0x0000000f);
1491 mdelay(20);
1492 cx_set(GP0_IO, 0x000f000f);
1493 break;
1494 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1495 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1496 /* GPIO-0 portb xc3028 reset */
1497 /* GPIO-1 portb zl10353 reset */
1498 /* GPIO-2 portc xc3028 reset */
1499 /* GPIO-3 portc zl10353 reset */
1500
1501 /* Put the parts into reset and back */
1502 cx_set(GP0_IO, 0x000f0000);
1503 mdelay(20);
1504 cx_clear(GP0_IO, 0x0000000f);
1505 mdelay(20);
1506 cx_set(GP0_IO, 0x000f000f);
1507 break;
1508 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1509 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1510 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1511 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1512 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1513 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1514 /* GPIO-2 xc3028 tuner reset */
1515
1516 /* The following GPIO's are on the internal AVCore (cx25840) */
1517 /* GPIO-? zl10353 demod reset */
1518
1519 /* Put the parts into reset and back */
1520 cx_set(GP0_IO, 0x00040000);
1521 mdelay(20);
1522 cx_clear(GP0_IO, 0x00000004);
1523 mdelay(20);
1524 cx_set(GP0_IO, 0x00040004);
1525 break;
1526 case CX23885_BOARD_TBS_6920:
1527 case CX23885_BOARD_TBS_6980:
1528 case CX23885_BOARD_TBS_6981:
1529 case CX23885_BOARD_PROF_8000:
1530 cx_write(MC417_CTL, 0x00000036);
1531 cx_write(MC417_OEN, 0x00001000);
1532 cx_set(MC417_RWD, 0x00000002);
1533 mdelay(200);
1534 cx_clear(MC417_RWD, 0x00000800);
1535 mdelay(200);
1536 cx_set(MC417_RWD, 0x00000800);
1537 mdelay(200);
1538 break;
1539 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1540 /* GPIO-0 INTA from CiMax1
1541 GPIO-1 INTB from CiMax2
1542 GPIO-2 reset chips
1543 GPIO-3 to GPIO-10 data/addr for CA
1544 GPIO-11 ~CS0 to CiMax1
1545 GPIO-12 ~CS1 to CiMax2
1546 GPIO-13 ADL0 load LSB addr
1547 GPIO-14 ADL1 load MSB addr
1548 GPIO-15 ~RDY from CiMax
1549 GPIO-17 ~RD to CiMax
1550 GPIO-18 ~WR to CiMax
1551 */
1552 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1553 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1554 cx_clear(GP0_IO, 0x00030004);
1555 mdelay(100);/* reset delay */
1556 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1557 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1558 /* GPIO-15 IN as ~ACK, rest as OUT */
1559 cx_write(MC417_OEN, 0x00001000);
1560 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1561 cx_write(MC417_RWD, 0x0000c300);
1562 /* enable irq */
1563 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1564 break;
1565 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1566 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1567 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1568 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1569 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1570 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1571 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1572 /* GPIO-9 Demod reset */
1573
1574 /* Put the parts into reset and back */
1575 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1576 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1577 cx23885_gpio_clear(dev, GPIO_9);
1578 mdelay(20);
1579 cx23885_gpio_set(dev, GPIO_9);
1580 break;
1581 case CX23885_BOARD_MYGICA_X8506:
1582 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1583 case CX23885_BOARD_MYGICA_X8507:
1584 /* GPIO-0 (0)Analog / (1)Digital TV */
1585 /* GPIO-1 reset XC5000 */
1586 /* GPIO-2 demod reset */
1587 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1588 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1589 mdelay(100);
1590 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1591 mdelay(100);
1592 break;
1593 case CX23885_BOARD_MYGICA_X8558PRO:
1594 /* GPIO-0 reset first ATBM8830 */
1595 /* GPIO-1 reset second ATBM8830 */
1596 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1597 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1598 mdelay(100);
1599 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1600 mdelay(100);
1601 break;
1602 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1603 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1604 /* GPIO-0 656_CLK */
1605 /* GPIO-1 656_D0 */
1606 /* GPIO-2 Wake# */
1607 /* GPIO-3-10 cx23417 data0-7 */
1608 /* GPIO-11-14 cx23417 addr0-3 */
1609 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1610 /* GPIO-19 IR_RX */
1611 /* GPIO-20 C_IR_TX */
1612 /* GPIO-21 I2S DAT */
1613 /* GPIO-22 I2S WCLK */
1614 /* GPIO-23 I2S BCLK */
1615 /* ALT GPIO: EXP GPIO LATCH */
1616
1617 /* CX23417 GPIO's */
1618 /* GPIO-14 S5H1411/CX24228 Reset */
1619 /* GPIO-13 EEPROM write protect */
1620 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1621
1622 /* Put the demod into reset and protect the eeprom */
1623 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1624 mdelay(100);
1625
1626 /* Bring the demod out of reset */
1627 mc417_gpio_set(dev, GPIO_14);
1628 mdelay(100);
1629
1630 /* CX24228 GPIO */
1631 /* Connected to IF / Mux */
1632 break;
1633 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1634 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1635 break;
1636 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1637 /* GPIO-0 ~INT in
1638 GPIO-1 TMS out
1639 GPIO-2 ~reset chips out
1640 GPIO-3 to GPIO-10 data/addr for CA in/out
1641 GPIO-11 ~CS out
1642 GPIO-12 ADDR out
1643 GPIO-13 ~WR out
1644 GPIO-14 ~RD out
1645 GPIO-15 ~RDY in
1646 GPIO-16 TCK out
1647 GPIO-17 TDO in
1648 GPIO-18 TDI out
1649 */
1650 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1651 /* GPIO-0 as INT, reset & TMS low */
1652 cx_clear(GP0_IO, 0x00010006);
1653 mdelay(100);/* reset delay */
1654 cx_set(GP0_IO, 0x00000004); /* reset high */
1655 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1656 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1657 cx_write(MC417_OEN, 0x00005000);
1658 /* ~RD, ~WR high; ADDR low; ~CS high */
1659 cx_write(MC417_RWD, 0x00000d00);
1660 /* enable irq */
1661 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1662 break;
1663 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1664 case CX23885_BOARD_HAUPPAUGE_STARBURST:
1665 /* GPIO-8 tda10071 demod reset */
1666 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
1667
1668 /* Put the parts into reset and back */
1669 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1670
1671 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1672 mdelay(100);
1673 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1674 mdelay(100);
1675
1676 break;
1677 case CX23885_BOARD_AVERMEDIA_HC81R:
1678 cx_clear(MC417_CTL, 1);
1679 /* GPIO-0,1,2 setup direction as output */
1680 cx_set(GP0_IO, 0x00070000);
1681 mdelay(10);
1682 /* AF9013 demod reset */
1683 cx_set(GP0_IO, 0x00010001);
1684 mdelay(10);
1685 cx_clear(GP0_IO, 0x00010001);
1686 mdelay(10);
1687 cx_set(GP0_IO, 0x00010001);
1688 mdelay(10);
1689 /* demod tune? */
1690 cx_clear(GP0_IO, 0x00030003);
1691 mdelay(10);
1692 cx_set(GP0_IO, 0x00020002);
1693 mdelay(10);
1694 cx_set(GP0_IO, 0x00010001);
1695 mdelay(10);
1696 cx_clear(GP0_IO, 0x00020002);
1697 /* XC3028L tuner reset */
1698 cx_set(GP0_IO, 0x00040004);
1699 cx_clear(GP0_IO, 0x00040004);
1700 cx_set(GP0_IO, 0x00040004);
1701 mdelay(60);
1702 break;
1703 case CX23885_BOARD_DVBSKY_T9580:
1704 case CX23885_BOARD_DVBSKY_S952:
1705 case CX23885_BOARD_DVBSKY_T982:
1706 /* enable GPIO3-18 pins */
1707 cx_write(MC417_CTL, 0x00000037);
1708 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1709 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1710 mdelay(100);
1711 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1712 break;
1713 case CX23885_BOARD_DVBSKY_T980C:
1714 case CX23885_BOARD_DVBSKY_S950C:
1715 case CX23885_BOARD_TT_CT2_4500_CI:
1716 /*
1717 * GPIO-0 INTA from CiMax, input
1718 * GPIO-1 reset CiMax, output, high active
1719 * GPIO-2 reset demod, output, low active
1720 * GPIO-3 to GPIO-10 data/addr for CAM
1721 * GPIO-11 ~CS0 to CiMax1
1722 * GPIO-12 ~CS1 to CiMax2
1723 * GPIO-13 ADL0 load LSB addr
1724 * GPIO-14 ADL1 load MSB addr
1725 * GPIO-15 ~RDY from CiMax
1726 * GPIO-17 ~RD to CiMax
1727 * GPIO-18 ~WR to CiMax
1728 */
1729
1730 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1731 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1732 mdelay(100); /* reset delay */
1733 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1734 cx_clear(GP0_IO, 0x00010002);
1735 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1736
1737 /* GPIO-15 IN as ~ACK, rest as OUT */
1738 cx_write(MC417_OEN, 0x00001000);
1739
1740 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1741 cx_write(MC417_RWD, 0x0000c300);
1742
1743 /* enable irq */
1744 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1745 break;
1746 case CX23885_BOARD_DVBSKY_S950:
1747 cx23885_gpio_enable(dev, GPIO_2, 1);
1748 cx23885_gpio_clear(dev, GPIO_2);
1749 msleep(100);
1750 cx23885_gpio_set(dev, GPIO_2);
1751 break;
1752 case CX23885_BOARD_HAUPPAUGE_HVR5525:
1753 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1754 /*
1755 * HVR5525 GPIO Details:
1756 * GPIO-00 IR_WIDE
1757 * GPIO-02 wake#
1758 * GPIO-03 VAUX Pres.
1759 * GPIO-07 PROG#
1760 * GPIO-08 SAT_RESN
1761 * GPIO-09 TER_RESN
1762 * GPIO-10 B2_SENSE
1763 * GPIO-11 B1_SENSE
1764 * GPIO-15 IR_LED_STATUS
1765 * GPIO-19 IR_NARROW
1766 * GPIO-20 Blauster1
1767 * ALTGPIO VAUX_SWITCH
1768 * AUX_PLL_CLK : Blaster2
1769 */
1770 /* Put the parts into reset and back */
1771 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1772 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1773 msleep(100);
1774 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1775 msleep(100);
1776 break;
1777 case CX23885_BOARD_VIEWCAST_260E:
1778 case CX23885_BOARD_VIEWCAST_460E:
1779 /* For documentation purposes, it's worth noting that this
1780 * card does not have any GPIO's connected to subcomponents.
1781 */
1782 break;
1783 }
1784 }
1785
1786 int cx23885_ir_init(struct cx23885_dev *dev)
1787 {
1788 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1789 {
1790 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1791 .pin = CX23885_PIN_IR_RX_GPIO19,
1792 .function = CX23885_PAD_IR_RX,
1793 .value = 0,
1794 .strength = CX25840_PIN_DRIVE_MEDIUM,
1795 }, {
1796 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1797 .pin = CX23885_PIN_IR_TX_GPIO20,
1798 .function = CX23885_PAD_IR_TX,
1799 .value = 0,
1800 .strength = CX25840_PIN_DRIVE_MEDIUM,
1801 }
1802 };
1803 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1804
1805 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1806 {
1807 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1808 .pin = CX23885_PIN_IR_RX_GPIO19,
1809 .function = CX23885_PAD_IR_RX,
1810 .value = 0,
1811 .strength = CX25840_PIN_DRIVE_MEDIUM,
1812 }
1813 };
1814 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1815
1816 struct v4l2_subdev_ir_parameters params;
1817 int ret = 0;
1818 switch (dev->board) {
1819 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1820 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1821 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1822 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1823 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1824 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1825 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1826 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1827 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1828 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1829 /* FIXME: Implement me */
1830 break;
1831 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1832 ret = cx23888_ir_probe(dev);
1833 if (ret)
1834 break;
1835 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1836 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1837 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1838 break;
1839 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1840 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1841 ret = cx23888_ir_probe(dev);
1842 if (ret)
1843 break;
1844 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1845 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1846 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1847 /*
1848 * For these boards we need to invert the Tx output via the
1849 * IR controller to have the LED off while idle
1850 */
1851 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1852 params.enable = false;
1853 params.shutdown = false;
1854 params.invert_level = true;
1855 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1856 params.shutdown = true;
1857 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1858 break;
1859 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1860 case CX23885_BOARD_TEVII_S470:
1861 case CX23885_BOARD_MYGICA_X8507:
1862 case CX23885_BOARD_TBS_6980:
1863 case CX23885_BOARD_TBS_6981:
1864 case CX23885_BOARD_DVBSKY_T9580:
1865 case CX23885_BOARD_DVBSKY_T980C:
1866 case CX23885_BOARD_DVBSKY_S950C:
1867 case CX23885_BOARD_TT_CT2_4500_CI:
1868 case CX23885_BOARD_DVBSKY_S950:
1869 case CX23885_BOARD_DVBSKY_S952:
1870 case CX23885_BOARD_DVBSKY_T982:
1871 if (!enable_885_ir)
1872 break;
1873 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1874 if (dev->sd_ir == NULL) {
1875 ret = -ENODEV;
1876 break;
1877 }
1878 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1879 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1880 break;
1881 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1882 if (!enable_885_ir)
1883 break;
1884 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1885 if (dev->sd_ir == NULL) {
1886 ret = -ENODEV;
1887 break;
1888 }
1889 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1890 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1891 break;
1892 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1893 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1894 request_module("ir-kbd-i2c");
1895 break;
1896 }
1897
1898 return ret;
1899 }
1900
1901 void cx23885_ir_fini(struct cx23885_dev *dev)
1902 {
1903 switch (dev->board) {
1904 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1905 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1906 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1907 cx23885_irq_remove(dev, PCI_MSK_IR);
1908 cx23888_ir_remove(dev);
1909 dev->sd_ir = NULL;
1910 break;
1911 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1912 case CX23885_BOARD_TEVII_S470:
1913 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1914 case CX23885_BOARD_MYGICA_X8507:
1915 case CX23885_BOARD_TBS_6980:
1916 case CX23885_BOARD_TBS_6981:
1917 case CX23885_BOARD_DVBSKY_T9580:
1918 case CX23885_BOARD_DVBSKY_T980C:
1919 case CX23885_BOARD_DVBSKY_S950C:
1920 case CX23885_BOARD_TT_CT2_4500_CI:
1921 case CX23885_BOARD_DVBSKY_S950:
1922 case CX23885_BOARD_DVBSKY_S952:
1923 case CX23885_BOARD_DVBSKY_T982:
1924 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1925 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1926 dev->sd_ir = NULL;
1927 break;
1928 }
1929 }
1930
1931 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1932 {
1933 int data;
1934 int tdo = 0;
1935 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1936 /*TMS*/
1937 data = ((cx_read(GP0_IO)) & (~0x00000002));
1938 data |= (tms ? 0x00020002 : 0x00020000);
1939 cx_write(GP0_IO, data);
1940
1941 /*TDI*/
1942 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1943 data |= (tdi ? 0x00008000 : 0);
1944 cx_write(MC417_RWD, data);
1945 if (read_tdo)
1946 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1947
1948 cx_write(MC417_RWD, data | 0x00002000);
1949 udelay(1);
1950 /*TCK*/
1951 cx_write(MC417_RWD, data);
1952
1953 return tdo;
1954 }
1955
1956 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1957 {
1958 switch (dev->board) {
1959 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1960 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1961 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1962 if (dev->sd_ir)
1963 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1964 break;
1965 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1966 case CX23885_BOARD_TEVII_S470:
1967 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1968 case CX23885_BOARD_MYGICA_X8507:
1969 case CX23885_BOARD_TBS_6980:
1970 case CX23885_BOARD_TBS_6981:
1971 case CX23885_BOARD_DVBSKY_T9580:
1972 case CX23885_BOARD_DVBSKY_T980C:
1973 case CX23885_BOARD_DVBSKY_S950C:
1974 case CX23885_BOARD_TT_CT2_4500_CI:
1975 case CX23885_BOARD_DVBSKY_S950:
1976 case CX23885_BOARD_DVBSKY_S952:
1977 case CX23885_BOARD_DVBSKY_T982:
1978 if (dev->sd_ir)
1979 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1980 break;
1981 }
1982 }
1983
1984 void cx23885_card_setup(struct cx23885_dev *dev)
1985 {
1986 struct cx23885_tsport *ts1 = &dev->ts1;
1987 struct cx23885_tsport *ts2 = &dev->ts2;
1988
1989 static u8 eeprom[256];
1990
1991 if (dev->i2c_bus[0].i2c_rc == 0) {
1992 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1993 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1994 eeprom, sizeof(eeprom));
1995 }
1996
1997 switch (dev->board) {
1998 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1999 if (dev->i2c_bus[0].i2c_rc == 0) {
2000 if (eeprom[0x80] != 0x84)
2001 hauppauge_eeprom(dev, eeprom+0xc0);
2002 else
2003 hauppauge_eeprom(dev, eeprom+0x80);
2004 }
2005 break;
2006 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2007 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2008 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2009 if (dev->i2c_bus[0].i2c_rc == 0)
2010 hauppauge_eeprom(dev, eeprom+0x80);
2011 break;
2012 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2013 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2014 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2015 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2016 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2017 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2018 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2019 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2020 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2021 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2022 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2023 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2024 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2025 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2026 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2027 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2028 if (dev->i2c_bus[0].i2c_rc == 0)
2029 hauppauge_eeprom(dev, eeprom+0xc0);
2030 break;
2031 case CX23885_BOARD_VIEWCAST_260E:
2032 case CX23885_BOARD_VIEWCAST_460E:
2033 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
2034 tveeprom_read(&dev->i2c_bus[1].i2c_client,
2035 eeprom, sizeof(eeprom));
2036 if (dev->i2c_bus[0].i2c_rc == 0)
2037 viewcast_eeprom(dev, eeprom);
2038 break;
2039 }
2040
2041 switch (dev->board) {
2042 case CX23885_BOARD_AVERMEDIA_HC81R:
2043 /* Defaults for VID B */
2044 ts1->gen_ctrl_val = 0x4; /* Parallel */
2045 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2046 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2047 /* Defaults for VID C */
2048 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2049 ts2->gen_ctrl_val = 0x10e;
2050 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2051 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2052 break;
2053 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
2054 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
2055 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2056 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2057 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2058 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2059 /* break omitted intentionally */
2060 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2061 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2062 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2063 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2064 break;
2065 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2066 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2067 /* Defaults for VID B - Analog encoder */
2068 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2069 ts1->gen_ctrl_val = 0x10e;
2070 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2071 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2072
2073 /* APB_TSVALERR_POL (active low)*/
2074 ts1->vld_misc_val = 0x2000;
2075 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2076 cx_write(0x130184, 0xc);
2077
2078 /* Defaults for VID C */
2079 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2080 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2081 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2082 break;
2083 case CX23885_BOARD_TBS_6920:
2084 ts1->gen_ctrl_val = 0x4; /* Parallel */
2085 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2086 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2087 break;
2088 case CX23885_BOARD_TEVII_S470:
2089 case CX23885_BOARD_TEVII_S471:
2090 case CX23885_BOARD_DVBWORLD_2005:
2091 case CX23885_BOARD_PROF_8000:
2092 case CX23885_BOARD_DVBSKY_T980C:
2093 case CX23885_BOARD_DVBSKY_S950C:
2094 case CX23885_BOARD_TT_CT2_4500_CI:
2095 case CX23885_BOARD_DVBSKY_S950:
2096 ts1->gen_ctrl_val = 0x5; /* Parallel */
2097 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2098 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2099 break;
2100 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2101 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2102 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2103 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2104 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2105 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2106 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2107 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2108 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2109 break;
2110 case CX23885_BOARD_TBS_6980:
2111 case CX23885_BOARD_TBS_6981:
2112 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2113 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2114 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2115 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2116 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2117 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2118 tbs_card_init(dev);
2119 break;
2120 case CX23885_BOARD_MYGICA_X8506:
2121 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2122 case CX23885_BOARD_MYGICA_X8507:
2123 ts1->gen_ctrl_val = 0x5; /* Parallel */
2124 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2125 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2126 break;
2127 case CX23885_BOARD_MYGICA_X8558PRO:
2128 ts1->gen_ctrl_val = 0x5; /* Parallel */
2129 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2130 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2131 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2132 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2133 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2134 break;
2135 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2136 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2137 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2138 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2139 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2140 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2141 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2142 break;
2143 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2144 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2145 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2146 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2147 break;
2148 case CX23885_BOARD_DVBSKY_T9580:
2149 case CX23885_BOARD_DVBSKY_T982:
2150 ts1->gen_ctrl_val = 0x5; /* Parallel */
2151 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2152 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2153 ts2->gen_ctrl_val = 0x8; /* Serial bus */
2154 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2155 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2156 break;
2157 case CX23885_BOARD_DVBSKY_S952:
2158 ts1->gen_ctrl_val = 0x5; /* Parallel */
2159 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2160 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2161 ts2->gen_ctrl_val = 0xe; /* Serial bus */
2162 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2163 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2164 break;
2165 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2166 ts1->gen_ctrl_val = 0x5; /* Parallel */
2167 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2168 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2169 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2170 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2171 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2172 break;
2173 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2174 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2175 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2176 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2177 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2178 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2179 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2180 break;
2181 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2182 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2183 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2184 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2185 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2186 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2187 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2188 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2189 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2190 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2191 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2192 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2193 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2194 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2195 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2196 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2197 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2198 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2199 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2200 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2201 default:
2202 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2203 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2204 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2205 }
2206
2207 /* Certain boards support analog, or require the avcore to be
2208 * loaded, ensure this happens.
2209 */
2210 switch (dev->board) {
2211 case CX23885_BOARD_TEVII_S470:
2212 /* Currently only enabled for the integrated IR controller */
2213 if (!enable_885_ir)
2214 break;
2215 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2216 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2217 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2218 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2219 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2220 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2221 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2222 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2223 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2224 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2225 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2226 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2227 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2228 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2229 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2230 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2231 case CX23885_BOARD_MYGICA_X8506:
2232 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2233 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2234 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2235 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2236 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2237 case CX23885_BOARD_MPX885:
2238 case CX23885_BOARD_MYGICA_X8507:
2239 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2240 case CX23885_BOARD_AVERMEDIA_HC81R:
2241 case CX23885_BOARD_TBS_6980:
2242 case CX23885_BOARD_TBS_6981:
2243 case CX23885_BOARD_DVBSKY_T9580:
2244 case CX23885_BOARD_DVBSKY_T980C:
2245 case CX23885_BOARD_DVBSKY_S950C:
2246 case CX23885_BOARD_TT_CT2_4500_CI:
2247 case CX23885_BOARD_DVBSKY_S950:
2248 case CX23885_BOARD_DVBSKY_S952:
2249 case CX23885_BOARD_DVBSKY_T982:
2250 case CX23885_BOARD_VIEWCAST_260E:
2251 case CX23885_BOARD_VIEWCAST_460E:
2252 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2253 &dev->i2c_bus[2].i2c_adap,
2254 "cx25840", 0x88 >> 1, NULL);
2255 if (dev->sd_cx25840) {
2256 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2257 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2258 }
2259 break;
2260 }
2261
2262 switch (dev->board) {
2263 case CX23885_BOARD_VIEWCAST_260E:
2264 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2265 &dev->i2c_bus[0].i2c_adap,
2266 "cs3308", 0x82 >> 1, NULL);
2267 break;
2268 case CX23885_BOARD_VIEWCAST_460E:
2269 /* This cs3308 controls the audio from the breakout cable */
2270 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2271 &dev->i2c_bus[0].i2c_adap,
2272 "cs3308", 0x80 >> 1, NULL);
2273 /* This cs3308 controls the audio from the onboard header */
2274 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2275 &dev->i2c_bus[0].i2c_adap,
2276 "cs3308", 0x82 >> 1, NULL);
2277 break;
2278 }
2279
2280 /* AUX-PLL 27MHz CLK */
2281 switch (dev->board) {
2282 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2283 netup_initialize(dev);
2284 break;
2285 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2286 int ret;
2287 const struct firmware *fw;
2288 const char *filename = "dvb-netup-altera-01.fw";
2289 char *action = "configure";
2290 static struct netup_card_info cinfo;
2291 struct altera_config netup_config = {
2292 .dev = dev,
2293 .action = action,
2294 .jtag_io = netup_jtag_io,
2295 };
2296
2297 netup_initialize(dev);
2298
2299 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2300 if (netup_card_rev)
2301 cinfo.rev = netup_card_rev;
2302
2303 switch (cinfo.rev) {
2304 case 0x4:
2305 filename = "dvb-netup-altera-04.fw";
2306 break;
2307 default:
2308 filename = "dvb-netup-altera-01.fw";
2309 break;
2310 }
2311 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
2312 cinfo.rev, filename);
2313
2314 ret = request_firmware(&fw, filename, &dev->pci->dev);
2315 if (ret != 0)
2316 printk(KERN_ERR "did not find the firmware file. (%s) "
2317 "Please see linux/Documentation/dvb/ for more details "
2318 "on firmware-problems.", filename);
2319 else
2320 altera_init(&netup_config, fw);
2321
2322 release_firmware(fw);
2323 break;
2324 }
2325 }
2326 }
Linux kernel - Deliverables
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