drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h

   1 /*
   2 * Copyright (c) 2016 MediaTek Inc.
   3 * Author: PC Chen <pc.chen@mediatek.com>
   4 *         Tiffany Lin <tiffany.lin@mediatek.com>
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 */
  15
  16 #ifndef _MTK_VCODEC_DRV_H_
  17 #define _MTK_VCODEC_DRV_H_
  18
  19 #include <linux/platform_device.h>
  20 #include <linux/videodev2.h>
  21 #include <media/v4l2-ctrls.h>
  22 #include <media/v4l2-device.h>
  23 #include <media/v4l2-ioctl.h>
  24 #include <media/videobuf2-core.h>
  25
  26 #include "mtk_vcodec_util.h"
  27
  28 #define MTK_VCODEC_DRV_NAME     "mtk_vcodec_drv"
  29 #define MTK_VCODEC_ENC_NAME     "mtk-vcodec-enc"
  30 #define MTK_PLATFORM_STR        "platform:mt8173"
  31
  32
  33 #define MTK_VCODEC_MAX_PLANES   3
  34 #define MTK_V4L2_BENCHMARK      0
  35 #define WAIT_INTR_TIMEOUT_MS    1000
  36
  37 /**
  38  * enum mtk_hw_reg_idx - MTK hw register base index
  39  */
  40 enum mtk_hw_reg_idx {
  41         VDEC_SYS,
  42         VDEC_MISC,
  43         VDEC_LD,
  44         VDEC_TOP,
  45         VDEC_CM,
  46         VDEC_AD,
  47         VDEC_AV,
  48         VDEC_PP,
  49         VDEC_HWD,
  50         VDEC_HWQ,
  51         VDEC_HWB,
  52         VDEC_HWG,
  53         NUM_MAX_VDEC_REG_BASE,
  54         /* h264 encoder */
  55         VENC_SYS = NUM_MAX_VDEC_REG_BASE,
  56         /* vp8 encoder */
  57         VENC_LT_SYS,
  58         NUM_MAX_VCODEC_REG_BASE
  59 };
  60
  61 /**
  62  * enum mtk_instance_type - The type of an MTK Vcodec instance.
  63  */
  64 enum mtk_instance_type {
  65         MTK_INST_DECODER                = 0,
  66         MTK_INST_ENCODER                = 1,
  67 };
  68
  69 /**
  70  * enum mtk_instance_state - The state of an MTK Vcodec instance.
  71  * @MTK_STATE_FREE - default state when instance is created
  72  * @MTK_STATE_INIT - vcodec instance is initialized
  73  * @MTK_STATE_HEADER - vdec had sps/pps header parsed or venc
  74  *                      had sps/pps header encoded
  75  * @MTK_STATE_FLUSH - vdec is flushing. Only used by decoder
  76  * @MTK_STATE_ABORT - vcodec should be aborted
  77  */
  78 enum mtk_instance_state {
  79         MTK_STATE_FREE = 0,
  80         MTK_STATE_INIT = 1,
  81         MTK_STATE_HEADER = 2,
  82         MTK_STATE_FLUSH = 3,
  83         MTK_STATE_ABORT = 4,
  84 };
  85
  86 /**
  87  * struct mtk_encode_param - General encoding parameters type
  88  */
  89 enum mtk_encode_param {
  90         MTK_ENCODE_PARAM_NONE = 0,
  91         MTK_ENCODE_PARAM_BITRATE = (1 << 0),
  92         MTK_ENCODE_PARAM_FRAMERATE = (1 << 1),
  93         MTK_ENCODE_PARAM_INTRA_PERIOD = (1 << 2),
  94         MTK_ENCODE_PARAM_FORCE_INTRA = (1 << 3),
  95         MTK_ENCODE_PARAM_GOP_SIZE = (1 << 4),
  96 };
  97
  98 enum mtk_fmt_type {
  99         MTK_FMT_DEC = 0,
 100         MTK_FMT_ENC = 1,
 101         MTK_FMT_FRAME = 2,
 102 };
 103
 104 /**
 105  * struct mtk_video_fmt - Structure used to store information about pixelformats
 106  */
 107 struct mtk_video_fmt {
 108         u32     fourcc;
 109         enum mtk_fmt_type       type;
 110         u32     num_planes;
 111 };
 112
 113 /**
 114  * struct mtk_codec_framesizes - Structure used to store information about
 115  *                                                      framesizes
 116  */
 117 struct mtk_codec_framesizes {
 118         u32     fourcc;
 119         struct  v4l2_frmsize_stepwise   stepwise;
 120 };
 121
 122 /**
 123  * struct mtk_q_type - Type of queue
 124  */
 125 enum mtk_q_type {
 126         MTK_Q_DATA_SRC = 0,
 127         MTK_Q_DATA_DST = 1,
 128 };
 129
 130 /**
 131  * struct mtk_q_data - Structure used to store information about queue
 132  */
 133 struct mtk_q_data {
 134         unsigned int    visible_width;
 135         unsigned int    visible_height;
 136         unsigned int    coded_width;
 137         unsigned int    coded_height;
 138         enum v4l2_field field;
 139         unsigned int    bytesperline[MTK_VCODEC_MAX_PLANES];
 140         unsigned int    sizeimage[MTK_VCODEC_MAX_PLANES];
 141         struct mtk_video_fmt    *fmt;
 142 };
 143
 144 /**
 145  * struct mtk_enc_params - General encoding parameters
 146  * @bitrate: target bitrate in bits per second
 147  * @num_b_frame: number of b frames between p-frame
 148  * @rc_frame: frame based rate control
 149  * @rc_mb: macroblock based rate control
 150  * @seq_hdr_mode: H.264 sequence header is encoded separately or joined
 151  *                with the first frame
 152  * @intra_period: I frame period
 153  * @gop_size: group of picture size, it's used as the intra frame period
 154  * @framerate_num: frame rate numerator. ex: framerate_num=30 and
 155  *                 framerate_denom=1 menas FPS is 30
 156  * @framerate_denom: frame rate denominator. ex: framerate_num=30 and
 157  *                   framerate_denom=1 menas FPS is 30
 158  * @h264_max_qp: Max value for H.264 quantization parameter
 159  * @h264_profile: V4L2 defined H.264 profile
 160  * @h264_level: V4L2 defined H.264 level
 161  * @force_intra: force/insert intra frame
 162  */
 163 struct mtk_enc_params {
 164         unsigned int    bitrate;
 165         unsigned int    num_b_frame;
 166         unsigned int    rc_frame;
 167         unsigned int    rc_mb;
 168         unsigned int    seq_hdr_mode;
 169         unsigned int    intra_period;
 170         unsigned int    gop_size;
 171         unsigned int    framerate_num;
 172         unsigned int    framerate_denom;
 173         unsigned int    h264_max_qp;
 174         unsigned int    h264_profile;
 175         unsigned int    h264_level;
 176         unsigned int    force_intra;
 177 };
 178
 179 /**
 180  * struct mtk_vcodec_pm - Power management data structure
 181  */
 182 struct mtk_vcodec_pm {
 183         struct clk      *vcodecpll;
 184         struct clk      *univpll_d2;
 185         struct clk      *clk_cci400_sel;
 186         struct clk      *vdecpll;
 187         struct clk      *vdec_sel;
 188         struct clk      *vencpll_d2;
 189         struct clk      *venc_sel;
 190         struct clk      *univpll1_d2;
 191         struct clk      *venc_lt_sel;
 192         struct device   *larbvdec;
 193         struct device   *larbvenc;
 194         struct device   *larbvenclt;
 195         struct device   *dev;
 196         struct mtk_vcodec_dev   *mtkdev;
 197 };
 198
 199 /**
 200  * struct mtk_vcodec_ctx - Context (instance) private data.
 201  *
 202  * @type: type of the instance - decoder or encoder
 203  * @dev: pointer to the mtk_vcodec_dev of the device
 204  * @list: link to ctx_list of mtk_vcodec_dev
 205  * @fh: struct v4l2_fh
 206  * @m2m_ctx: pointer to the v4l2_m2m_ctx of the context
 207  * @q_data: store information of input and output queue
 208  *          of the context
 209  * @id: index of the context that this structure describes
 210  * @state: state of the context
 211  * @param_change: indicate encode parameter type
 212  * @enc_params: encoding parameters
 213  * @enc_if: hoooked encoder driver interface
 214  * @drv_handle: driver handle for specific decode/encode instance
 215  *
 216  * @int_cond: variable used by the waitqueue
 217  * @int_type: type of the last interrupt
 218  * @queue: waitqueue that can be used to wait for this context to
 219  *         finish
 220  * @irq_status: irq status
 221  *
 222  * @ctrl_hdl: handler for v4l2 framework
 223  * @encode_work: worker for the encoding
 224  *
 225  * @colorspace: enum v4l2_colorspace; supplemental to pixelformat
 226  * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
 227  * @quantization: enum v4l2_quantization, colorspace quantization
 228  * @xfer_func: enum v4l2_xfer_func, colorspace transfer function
 229  */
 230 struct mtk_vcodec_ctx {
 231         enum mtk_instance_type type;
 232         struct mtk_vcodec_dev *dev;
 233         struct list_head list;
 234
 235         struct v4l2_fh fh;
 236         struct v4l2_m2m_ctx *m2m_ctx;
 237         struct mtk_q_data q_data[2];
 238         int id;
 239         enum mtk_instance_state state;
 240         enum mtk_encode_param param_change;
 241         struct mtk_enc_params enc_params;
 242
 243         struct venc_common_if *enc_if;
 244         unsigned long drv_handle;
 245
 246         int int_cond;
 247         int int_type;
 248         wait_queue_head_t queue;
 249         unsigned int irq_status;
 250
 251         struct v4l2_ctrl_handler ctrl_hdl;
 252         struct work_struct encode_work;
 253
 254         enum v4l2_colorspace colorspace;
 255         enum v4l2_ycbcr_encoding ycbcr_enc;
 256         enum v4l2_quantization quantization;
 257         enum v4l2_xfer_func xfer_func;
 258 };
 259
 260 /**
 261  * struct mtk_vcodec_dev - driver data
 262  * @v4l2_dev: V4L2 device to register video devices for.
 263  * @vfd_enc: Video device for encoder.
 264  *
 265  * @m2m_dev_enc: m2m device for encoder.
 266  * @plat_dev: platform device
 267  * @vpu_plat_dev: mtk vpu platform device
 268  * @ctx_list: list of struct mtk_vcodec_ctx
 269  * @irqlock: protect data access by irq handler and work thread
 270  * @curr_ctx: The context that is waiting for codec hardware
 271  *
 272  * @reg_base: Mapped address of MTK Vcodec registers.
 273  *
 274  * @id_counter: used to identify current opened instance
 275  * @num_instances: counter of active MTK Vcodec instances
 276  *
 277  * @encode_workqueue: encode work queue
 278  *
 279  * @int_cond: used to identify interrupt condition happen
 280  * @int_type: used to identify what kind of interrupt condition happen
 281  * @dev_mutex: video_device lock
 282  * @queue: waitqueue for waiting for completion of device commands
 283  *
 284  * @enc_irq: h264 encoder irq resource
 285  * @enc_lt_irq: vp8 encoder irq resource
 286  *
 287  * @enc_mutex: encoder hardware lock.
 288  *
 289  * @pm: power management control
 290  * @dec_capability: used to identify decode capability, ex: 4k
 291  * @enc_capability: used to identify encode capability
 292  */
 293 struct mtk_vcodec_dev {
 294         struct v4l2_device v4l2_dev;
 295         struct video_device *vfd_enc;
 296
 297         struct v4l2_m2m_dev *m2m_dev_enc;
 298         struct platform_device *plat_dev;
 299         struct platform_device *vpu_plat_dev;
 300         struct list_head ctx_list;
 301         spinlock_t irqlock;
 302         struct mtk_vcodec_ctx *curr_ctx;
 303         void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
 304
 305         unsigned long id_counter;
 306         int num_instances;
 307
 308         struct workqueue_struct *encode_workqueue;
 309
 310         int int_cond;
 311         int int_type;
 312         struct mutex dev_mutex;
 313         wait_queue_head_t queue;
 314
 315         int enc_irq;
 316         int enc_lt_irq;
 317
 318         struct mutex enc_mutex;
 319
 320         struct mtk_vcodec_pm pm;
 321         unsigned int dec_capability;
 322         unsigned int enc_capability;
 323 };
 324
 325 static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh)
 326 {
 327         return container_of(fh, struct mtk_vcodec_ctx, fh);
 328 }
 329
 330 static inline struct mtk_vcodec_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl)
 331 {
 332         return container_of(ctrl->handler, struct mtk_vcodec_ctx, ctrl_hdl);
 333 }
 334
 335 #endif /* _MTK_VCODEC_DRV_H_ */