drivers/misc/mei/pci-me.c

   1 /*
   2  *
   3  * Intel Management Engine Interface (Intel MEI) Linux driver
   4  * Copyright (c) 2003-2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  */
  16 #include <linux/module.h>
  17 #include <linux/moduleparam.h>
  18 #include <linux/kernel.h>
  19 #include <linux/device.h>
  20 #include <linux/fs.h>
  21 #include <linux/errno.h>
  22 #include <linux/types.h>
  23 #include <linux/fcntl.h>
  24 #include <linux/pci.h>
  25 #include <linux/poll.h>
  26 #include <linux/ioctl.h>
  27 #include <linux/cdev.h>
  28 #include <linux/sched.h>
  29 #include <linux/uuid.h>
  30 #include <linux/compat.h>
  31 #include <linux/jiffies.h>
  32 #include <linux/interrupt.h>
  33
  34 #include <linux/pm_domain.h>
  35 #include <linux/pm_runtime.h>
  36
  37 #include <linux/mei.h>
  38
  39 #include "mei_dev.h"
  40 #include "client.h"
  41 #include "hw-me-regs.h"
  42 #include "hw-me.h"
  43
  44 /* mei_pci_tbl - PCI Device ID Table */
  45 static const struct pci_device_id mei_me_pci_tbl[] = {
  46         {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
  47         {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
  48         {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
  49         {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
  50         {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
  51         {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
  52         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
  53         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
  54         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
  55         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
  56         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
  57
  58         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
  59         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
  60         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
  61         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
  62         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
  63         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
  64         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
  65         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
  66         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
  67         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
  68         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
  69         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
  70         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
  71
  72         {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
  73         {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
  74         {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
  75         {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
  76         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
  77         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
  78         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
  79         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
  80         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
  81         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
  82         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
  83         {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
  84         {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
  85
  86         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
  87         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
  88         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
  89         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
  90
  91         {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)},
  92         {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)},
  93
  94         {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
  95         {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},
  96
  97         /* required last entry */
  98         {0, }
  99 };
 100
 101 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
 102
 103 #ifdef CONFIG_PM
 104 static inline void mei_me_set_pm_domain(struct mei_device *dev);
 105 static inline void mei_me_unset_pm_domain(struct mei_device *dev);
 106 #else
 107 static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
 108 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
 109 #endif /* CONFIG_PM */
 110
 111 /**
 112  * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
 113  *
 114  * @pdev: PCI device structure
 115  * @cfg: per generation config
 116  *
 117  * Return: true if ME Interface is valid, false otherwise
 118  */
 119 static bool mei_me_quirk_probe(struct pci_dev *pdev,
 120                                 const struct mei_cfg *cfg)
 121 {
 122         if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
 123                 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
 124                 return false;
 125         }
 126
 127         return true;
 128 }
 129
 130 /**
 131  * mei_me_probe - Device Initialization Routine
 132  *
 133  * @pdev: PCI device structure
 134  * @ent: entry in kcs_pci_tbl
 135  *
 136  * Return: 0 on success, <0 on failure.
 137  */
 138 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 139 {
 140         const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
 141         struct mei_device *dev;
 142         struct mei_me_hw *hw;
 143         unsigned int irqflags;
 144         int err;
 145
 146
 147         if (!mei_me_quirk_probe(pdev, cfg))
 148                 return -ENODEV;
 149
 150         /* enable pci dev */
 151         err = pci_enable_device(pdev);
 152         if (err) {
 153                 dev_err(&pdev->dev, "failed to enable pci device.\n");
 154                 goto end;
 155         }
 156         /* set PCI host mastering  */
 157         pci_set_master(pdev);
 158         /* pci request regions for mei driver */
 159         err = pci_request_regions(pdev, KBUILD_MODNAME);
 160         if (err) {
 161                 dev_err(&pdev->dev, "failed to get pci regions.\n");
 162                 goto disable_device;
 163         }
 164
 165         if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
 166             dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
 167
 168                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 169                 if (err)
 170                         err = dma_set_coherent_mask(&pdev->dev,
 171                                                     DMA_BIT_MASK(32));
 172         }
 173         if (err) {
 174                 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
 175                 goto release_regions;
 176         }
 177
 178
 179         /* allocates and initializes the mei dev structure */
 180         dev = mei_me_dev_init(pdev, cfg);
 181         if (!dev) {
 182                 err = -ENOMEM;
 183                 goto release_regions;
 184         }
 185         hw = to_me_hw(dev);
 186         /* mapping  IO device memory */
 187         hw->mem_addr = pci_iomap(pdev, 0, 0);
 188         if (!hw->mem_addr) {
 189                 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
 190                 err = -ENOMEM;
 191                 goto free_device;
 192         }
 193         pci_enable_msi(pdev);
 194
 195          /* request and enable interrupt */
 196         irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 197
 198         err = request_threaded_irq(pdev->irq,
 199                         mei_me_irq_quick_handler,
 200                         mei_me_irq_thread_handler,
 201                         irqflags, KBUILD_MODNAME, dev);
 202         if (err) {
 203                 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
 204                        pdev->irq);
 205                 goto disable_msi;
 206         }
 207
 208         if (mei_start(dev)) {
 209                 dev_err(&pdev->dev, "init hw failure.\n");
 210                 err = -ENODEV;
 211                 goto release_irq;
 212         }
 213
 214         pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
 215         pm_runtime_use_autosuspend(&pdev->dev);
 216
 217         err = mei_register(dev, &pdev->dev);
 218         if (err)
 219                 goto stop;
 220
 221         pci_set_drvdata(pdev, dev);
 222
 223         schedule_delayed_work(&dev->timer_work, HZ);
 224
 225         /*
 226         * For not wake-able HW runtime pm framework
 227         * can't be used on pci device level.
 228         * Use domain runtime pm callbacks instead.
 229         */
 230         if (!pci_dev_run_wake(pdev))
 231                 mei_me_set_pm_domain(dev);
 232
 233         if (mei_pg_is_enabled(dev))
 234                 pm_runtime_put_noidle(&pdev->dev);
 235
 236         dev_dbg(&pdev->dev, "initialization successful.\n");
 237
 238         return 0;
 239
 240 stop:
 241         mei_stop(dev);
 242 release_irq:
 243         mei_cancel_work(dev);
 244         mei_disable_interrupts(dev);
 245         free_irq(pdev->irq, dev);
 246 disable_msi:
 247         pci_disable_msi(pdev);
 248         pci_iounmap(pdev, hw->mem_addr);
 249 free_device:
 250         kfree(dev);
 251 release_regions:
 252         pci_release_regions(pdev);
 253 disable_device:
 254         pci_disable_device(pdev);
 255 end:
 256         dev_err(&pdev->dev, "initialization failed.\n");
 257         return err;
 258 }
 259
 260 /**
 261  * mei_me_remove - Device Removal Routine
 262  *
 263  * @pdev: PCI device structure
 264  *
 265  * mei_remove is called by the PCI subsystem to alert the driver
 266  * that it should release a PCI device.
 267  */
 268 static void mei_me_remove(struct pci_dev *pdev)
 269 {
 270         struct mei_device *dev;
 271         struct mei_me_hw *hw;
 272
 273         dev = pci_get_drvdata(pdev);
 274         if (!dev)
 275                 return;
 276
 277         if (mei_pg_is_enabled(dev))
 278                 pm_runtime_get_noresume(&pdev->dev);
 279
 280         hw = to_me_hw(dev);
 281
 282
 283         dev_dbg(&pdev->dev, "stop\n");
 284         mei_stop(dev);
 285
 286         if (!pci_dev_run_wake(pdev))
 287                 mei_me_unset_pm_domain(dev);
 288
 289         /* disable interrupts */
 290         mei_disable_interrupts(dev);
 291
 292         free_irq(pdev->irq, dev);
 293         pci_disable_msi(pdev);
 294
 295         if (hw->mem_addr)
 296                 pci_iounmap(pdev, hw->mem_addr);
 297
 298         mei_deregister(dev);
 299
 300         kfree(dev);
 301
 302         pci_release_regions(pdev);
 303         pci_disable_device(pdev);
 304
 305
 306 }
 307 #ifdef CONFIG_PM_SLEEP
 308 static int mei_me_pci_suspend(struct device *device)
 309 {
 310         struct pci_dev *pdev = to_pci_dev(device);
 311         struct mei_device *dev = pci_get_drvdata(pdev);
 312
 313         if (!dev)
 314                 return -ENODEV;
 315
 316         dev_dbg(&pdev->dev, "suspend\n");
 317
 318         mei_stop(dev);
 319
 320         mei_disable_interrupts(dev);
 321
 322         free_irq(pdev->irq, dev);
 323         pci_disable_msi(pdev);
 324
 325         return 0;
 326 }
 327
 328 static int mei_me_pci_resume(struct device *device)
 329 {
 330         struct pci_dev *pdev = to_pci_dev(device);
 331         struct mei_device *dev;
 332         unsigned int irqflags;
 333         int err;
 334
 335         dev = pci_get_drvdata(pdev);
 336         if (!dev)
 337                 return -ENODEV;
 338
 339         pci_enable_msi(pdev);
 340
 341         irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 342
 343         /* request and enable interrupt */
 344         err = request_threaded_irq(pdev->irq,
 345                         mei_me_irq_quick_handler,
 346                         mei_me_irq_thread_handler,
 347                         irqflags, KBUILD_MODNAME, dev);
 348
 349         if (err) {
 350                 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
 351                                 pdev->irq);
 352                 return err;
 353         }
 354
 355         err = mei_restart(dev);
 356         if (err)
 357                 return err;
 358
 359         /* Start timer if stopped in suspend */
 360         schedule_delayed_work(&dev->timer_work, HZ);
 361
 362         return 0;
 363 }
 364 #endif /* CONFIG_PM_SLEEP */
 365
 366 #ifdef CONFIG_PM
 367 static int mei_me_pm_runtime_idle(struct device *device)
 368 {
 369         struct pci_dev *pdev = to_pci_dev(device);
 370         struct mei_device *dev;
 371
 372         dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
 373
 374         dev = pci_get_drvdata(pdev);
 375         if (!dev)
 376                 return -ENODEV;
 377         if (mei_write_is_idle(dev))
 378                 pm_runtime_autosuspend(device);
 379
 380         return -EBUSY;
 381 }
 382
 383 static int mei_me_pm_runtime_suspend(struct device *device)
 384 {
 385         struct pci_dev *pdev = to_pci_dev(device);
 386         struct mei_device *dev;
 387         int ret;
 388
 389         dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
 390
 391         dev = pci_get_drvdata(pdev);
 392         if (!dev)
 393                 return -ENODEV;
 394
 395         mutex_lock(&dev->device_lock);
 396
 397         if (mei_write_is_idle(dev))
 398                 ret = mei_me_pg_enter_sync(dev);
 399         else
 400                 ret = -EAGAIN;
 401
 402         mutex_unlock(&dev->device_lock);
 403
 404         dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
 405
 406         if (ret && ret != -EAGAIN)
 407                 schedule_work(&dev->reset_work);
 408
 409         return ret;
 410 }
 411
 412 static int mei_me_pm_runtime_resume(struct device *device)
 413 {
 414         struct pci_dev *pdev = to_pci_dev(device);
 415         struct mei_device *dev;
 416         int ret;
 417
 418         dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
 419
 420         dev = pci_get_drvdata(pdev);
 421         if (!dev)
 422                 return -ENODEV;
 423
 424         mutex_lock(&dev->device_lock);
 425
 426         ret = mei_me_pg_exit_sync(dev);
 427
 428         mutex_unlock(&dev->device_lock);
 429
 430         dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
 431
 432         if (ret)
 433                 schedule_work(&dev->reset_work);
 434
 435         return ret;
 436 }
 437
 438 /**
 439  * mei_me_set_pm_domain - fill and set pm domain structure for device
 440  *
 441  * @dev: mei_device
 442  */
 443 static inline void mei_me_set_pm_domain(struct mei_device *dev)
 444 {
 445         struct pci_dev *pdev  = to_pci_dev(dev->dev);
 446
 447         if (pdev->dev.bus && pdev->dev.bus->pm) {
 448                 dev->pg_domain.ops = *pdev->dev.bus->pm;
 449
 450                 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
 451                 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
 452                 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
 453
 454                 dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
 455         }
 456 }
 457
 458 /**
 459  * mei_me_unset_pm_domain - clean pm domain structure for device
 460  *
 461  * @dev: mei_device
 462  */
 463 static inline void mei_me_unset_pm_domain(struct mei_device *dev)
 464 {
 465         /* stop using pm callbacks if any */
 466         dev_pm_domain_set(dev->dev, NULL);
 467 }
 468
 469 static const struct dev_pm_ops mei_me_pm_ops = {
 470         SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
 471                                 mei_me_pci_resume)
 472         SET_RUNTIME_PM_OPS(
 473                 mei_me_pm_runtime_suspend,
 474                 mei_me_pm_runtime_resume,
 475                 mei_me_pm_runtime_idle)
 476 };
 477
 478 #define MEI_ME_PM_OPS   (&mei_me_pm_ops)
 479 #else
 480 #define MEI_ME_PM_OPS   NULL
 481 #endif /* CONFIG_PM */
 482 /*
 483  *  PCI driver structure
 484  */
 485 static struct pci_driver mei_me_driver = {
 486         .name = KBUILD_MODNAME,
 487         .id_table = mei_me_pci_tbl,
 488         .probe = mei_me_probe,
 489         .remove = mei_me_remove,
 490         .shutdown = mei_me_remove,
 491         .driver.pm = MEI_ME_PM_OPS,
 492 };
 493
 494 module_pci_driver(mei_me_driver);
 495
 496 MODULE_AUTHOR("Intel Corporation");
 497 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
 498 MODULE_LICENSE("GPL v2");