mmc: sdhci-acpi: Set MMC_CAP_CMD_DURING_TFR for Intel eMMC controllers
[deliverable/linux.git] / drivers / mmc / host / sdhci-acpi.c
1 /*
2 * Secure Digital Host Controller Interface ACPI driver.
3 *
4 * Copyright (c) 2012, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 */
20
21 #include <linux/init.h>
22 #include <linux/export.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/platform_device.h>
26 #include <linux/ioport.h>
27 #include <linux/io.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/compiler.h>
30 #include <linux/stddef.h>
31 #include <linux/bitops.h>
32 #include <linux/types.h>
33 #include <linux/err.h>
34 #include <linux/interrupt.h>
35 #include <linux/acpi.h>
36 #include <linux/pm.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/delay.h>
39
40 #include <linux/mmc/host.h>
41 #include <linux/mmc/pm.h>
42 #include <linux/mmc/slot-gpio.h>
43
44 #ifdef CONFIG_X86
45 #include <asm/cpu_device_id.h>
46 #include <asm/intel-family.h>
47 #include <asm/iosf_mbi.h>
48 #endif
49
50 #include "sdhci.h"
51
52 enum {
53 SDHCI_ACPI_SD_CD = BIT(0),
54 SDHCI_ACPI_RUNTIME_PM = BIT(1),
55 SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
56 };
57
58 struct sdhci_acpi_chip {
59 const struct sdhci_ops *ops;
60 unsigned int quirks;
61 unsigned int quirks2;
62 unsigned long caps;
63 unsigned int caps2;
64 mmc_pm_flag_t pm_caps;
65 };
66
67 struct sdhci_acpi_slot {
68 const struct sdhci_acpi_chip *chip;
69 unsigned int quirks;
70 unsigned int quirks2;
71 unsigned long caps;
72 unsigned int caps2;
73 mmc_pm_flag_t pm_caps;
74 unsigned int flags;
75 int (*probe_slot)(struct platform_device *, const char *, const char *);
76 int (*remove_slot)(struct platform_device *);
77 };
78
79 struct sdhci_acpi_host {
80 struct sdhci_host *host;
81 const struct sdhci_acpi_slot *slot;
82 struct platform_device *pdev;
83 bool use_runtime_pm;
84 };
85
86 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
87 {
88 return c->slot && (c->slot->flags & flag);
89 }
90
91 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
92 {
93 u8 reg;
94
95 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
96 reg |= 0x10;
97 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
98 /* For eMMC, minimum is 1us but give it 9us for good measure */
99 udelay(9);
100 reg &= ~0x10;
101 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
102 /* For eMMC, minimum is 200us but give it 300us for good measure */
103 usleep_range(300, 1000);
104 }
105
106 static const struct sdhci_ops sdhci_acpi_ops_dflt = {
107 .set_clock = sdhci_set_clock,
108 .set_bus_width = sdhci_set_bus_width,
109 .reset = sdhci_reset,
110 .set_uhs_signaling = sdhci_set_uhs_signaling,
111 };
112
113 static const struct sdhci_ops sdhci_acpi_ops_int = {
114 .set_clock = sdhci_set_clock,
115 .set_bus_width = sdhci_set_bus_width,
116 .reset = sdhci_reset,
117 .set_uhs_signaling = sdhci_set_uhs_signaling,
118 .hw_reset = sdhci_acpi_int_hw_reset,
119 };
120
121 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
122 .ops = &sdhci_acpi_ops_int,
123 };
124
125 #ifdef CONFIG_X86
126
127 static bool sdhci_acpi_byt(void)
128 {
129 static const struct x86_cpu_id byt[] = {
130 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
131 {}
132 };
133
134 return x86_match_cpu(byt);
135 }
136
137 #define BYT_IOSF_SCCEP 0x63
138 #define BYT_IOSF_OCP_NETCTRL0 0x1078
139 #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
140
141 static void sdhci_acpi_byt_setting(struct device *dev)
142 {
143 u32 val = 0;
144
145 if (!sdhci_acpi_byt())
146 return;
147
148 if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
149 &val)) {
150 dev_err(dev, "%s read error\n", __func__);
151 return;
152 }
153
154 if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
155 return;
156
157 val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
158
159 if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
160 val)) {
161 dev_err(dev, "%s write error\n", __func__);
162 return;
163 }
164
165 dev_dbg(dev, "%s completed\n", __func__);
166 }
167
168 static bool sdhci_acpi_byt_defer(struct device *dev)
169 {
170 if (!sdhci_acpi_byt())
171 return false;
172
173 if (!iosf_mbi_available())
174 return true;
175
176 sdhci_acpi_byt_setting(dev);
177
178 return false;
179 }
180
181 #else
182
183 static inline void sdhci_acpi_byt_setting(struct device *dev)
184 {
185 }
186
187 static inline bool sdhci_acpi_byt_defer(struct device *dev)
188 {
189 return false;
190 }
191
192 #endif
193
194 static int bxt_get_cd(struct mmc_host *mmc)
195 {
196 int gpio_cd = mmc_gpio_get_cd(mmc);
197 struct sdhci_host *host = mmc_priv(mmc);
198 unsigned long flags;
199 int ret = 0;
200
201 if (!gpio_cd)
202 return 0;
203
204 spin_lock_irqsave(&host->lock, flags);
205
206 if (host->flags & SDHCI_DEVICE_DEAD)
207 goto out;
208
209 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
210 out:
211 spin_unlock_irqrestore(&host->lock, flags);
212
213 return ret;
214 }
215
216 static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
217 const char *hid, const char *uid)
218 {
219 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
220 struct sdhci_host *host;
221
222 if (!c || !c->host)
223 return 0;
224
225 host = c->host;
226
227 /* Platform specific code during emmc probe slot goes here */
228
229 if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
230 sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
231 sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
232 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
233
234 return 0;
235 }
236
237 static int sdhci_acpi_sdio_probe_slot(struct platform_device *pdev,
238 const char *hid, const char *uid)
239 {
240 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
241 struct sdhci_host *host;
242
243 if (!c || !c->host)
244 return 0;
245
246 host = c->host;
247
248 /* Platform specific code during sdio probe slot goes here */
249
250 return 0;
251 }
252
253 static int sdhci_acpi_sd_probe_slot(struct platform_device *pdev,
254 const char *hid, const char *uid)
255 {
256 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
257 struct sdhci_host *host;
258
259 if (!c || !c->host || !c->slot)
260 return 0;
261
262 host = c->host;
263
264 /* Platform specific code during sd probe slot goes here */
265
266 if (hid && !strcmp(hid, "80865ACA")) {
267 host->mmc_host_ops.get_cd = bxt_get_cd;
268 host->mmc->caps |= MMC_CAP_AGGRESSIVE_PM;
269 }
270
271 return 0;
272 }
273
274 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
275 .chip = &sdhci_acpi_chip_int,
276 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
277 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
278 MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
279 .caps2 = MMC_CAP2_HC_ERASE_SZ,
280 .flags = SDHCI_ACPI_RUNTIME_PM,
281 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
282 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
283 SDHCI_QUIRK2_STOP_WITH_TC |
284 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
285 .probe_slot = sdhci_acpi_emmc_probe_slot,
286 };
287
288 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
289 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
290 SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
291 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
292 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
293 MMC_CAP_WAIT_WHILE_BUSY,
294 .flags = SDHCI_ACPI_RUNTIME_PM,
295 .pm_caps = MMC_PM_KEEP_POWER,
296 .probe_slot = sdhci_acpi_sdio_probe_slot,
297 };
298
299 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
300 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
301 SDHCI_ACPI_RUNTIME_PM,
302 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
303 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
304 SDHCI_QUIRK2_STOP_WITH_TC,
305 .caps = MMC_CAP_WAIT_WHILE_BUSY,
306 .probe_slot = sdhci_acpi_sd_probe_slot,
307 };
308
309 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
310 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
311 .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
312 .caps = MMC_CAP_NONREMOVABLE,
313 };
314
315 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
316 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
317 .caps = MMC_CAP_NONREMOVABLE,
318 };
319
320 struct sdhci_acpi_uid_slot {
321 const char *hid;
322 const char *uid;
323 const struct sdhci_acpi_slot *slot;
324 };
325
326 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
327 { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
328 { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
329 { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
330 { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
331 { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
332 { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
333 { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
334 { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
335 { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
336 { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
337 { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
338 { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
339 { "PNP0D40" },
340 { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
341 { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
342 { },
343 };
344
345 static const struct acpi_device_id sdhci_acpi_ids[] = {
346 { "80865ACA" },
347 { "80865ACC" },
348 { "80865AD0" },
349 { "80860F14" },
350 { "80860F16" },
351 { "INT33BB" },
352 { "INT33C6" },
353 { "INT3436" },
354 { "INT344D" },
355 { "PNP0D40" },
356 { "QCOM8051" },
357 { "QCOM8052" },
358 { },
359 };
360 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
361
362 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
363 const char *uid)
364 {
365 const struct sdhci_acpi_uid_slot *u;
366
367 for (u = sdhci_acpi_uids; u->hid; u++) {
368 if (strcmp(u->hid, hid))
369 continue;
370 if (!u->uid)
371 return u->slot;
372 if (uid && !strcmp(u->uid, uid))
373 return u->slot;
374 }
375 return NULL;
376 }
377
378 static int sdhci_acpi_probe(struct platform_device *pdev)
379 {
380 struct device *dev = &pdev->dev;
381 acpi_handle handle = ACPI_HANDLE(dev);
382 struct acpi_device *device, *child;
383 struct sdhci_acpi_host *c;
384 struct sdhci_host *host;
385 struct resource *iomem;
386 resource_size_t len;
387 const char *hid;
388 const char *uid;
389 int err;
390
391 if (acpi_bus_get_device(handle, &device))
392 return -ENODEV;
393
394 /* Power on the SDHCI controller and its children */
395 acpi_device_fix_up_power(device);
396 list_for_each_entry(child, &device->children, node)
397 acpi_device_fix_up_power(child);
398
399 if (acpi_bus_get_status(device) || !device->status.present)
400 return -ENODEV;
401
402 if (sdhci_acpi_byt_defer(dev))
403 return -EPROBE_DEFER;
404
405 hid = acpi_device_hid(device);
406 uid = device->pnp.unique_id;
407
408 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
409 if (!iomem)
410 return -ENOMEM;
411
412 len = resource_size(iomem);
413 if (len < 0x100)
414 dev_err(dev, "Invalid iomem size!\n");
415
416 if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
417 return -ENOMEM;
418
419 host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host));
420 if (IS_ERR(host))
421 return PTR_ERR(host);
422
423 c = sdhci_priv(host);
424 c->host = host;
425 c->slot = sdhci_acpi_get_slot(hid, uid);
426 c->pdev = pdev;
427 c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
428
429 platform_set_drvdata(pdev, c);
430
431 host->hw_name = "ACPI";
432 host->ops = &sdhci_acpi_ops_dflt;
433 host->irq = platform_get_irq(pdev, 0);
434
435 host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
436 resource_size(iomem));
437 if (host->ioaddr == NULL) {
438 err = -ENOMEM;
439 goto err_free;
440 }
441
442 if (c->slot) {
443 if (c->slot->probe_slot) {
444 err = c->slot->probe_slot(pdev, hid, uid);
445 if (err)
446 goto err_free;
447 }
448 if (c->slot->chip) {
449 host->ops = c->slot->chip->ops;
450 host->quirks |= c->slot->chip->quirks;
451 host->quirks2 |= c->slot->chip->quirks2;
452 host->mmc->caps |= c->slot->chip->caps;
453 host->mmc->caps2 |= c->slot->chip->caps2;
454 host->mmc->pm_caps |= c->slot->chip->pm_caps;
455 }
456 host->quirks |= c->slot->quirks;
457 host->quirks2 |= c->slot->quirks2;
458 host->mmc->caps |= c->slot->caps;
459 host->mmc->caps2 |= c->slot->caps2;
460 host->mmc->pm_caps |= c->slot->pm_caps;
461 }
462
463 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
464
465 if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
466 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
467
468 if (mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL)) {
469 dev_warn(dev, "failed to setup card detect gpio\n");
470 c->use_runtime_pm = false;
471 }
472 }
473
474 err = sdhci_add_host(host);
475 if (err)
476 goto err_free;
477
478 if (c->use_runtime_pm) {
479 pm_runtime_set_active(dev);
480 pm_suspend_ignore_children(dev, 1);
481 pm_runtime_set_autosuspend_delay(dev, 50);
482 pm_runtime_use_autosuspend(dev);
483 pm_runtime_enable(dev);
484 }
485
486 device_enable_async_suspend(dev);
487
488 return 0;
489
490 err_free:
491 sdhci_free_host(c->host);
492 return err;
493 }
494
495 static int sdhci_acpi_remove(struct platform_device *pdev)
496 {
497 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
498 struct device *dev = &pdev->dev;
499 int dead;
500
501 if (c->use_runtime_pm) {
502 pm_runtime_get_sync(dev);
503 pm_runtime_disable(dev);
504 pm_runtime_put_noidle(dev);
505 }
506
507 if (c->slot && c->slot->remove_slot)
508 c->slot->remove_slot(pdev);
509
510 dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
511 sdhci_remove_host(c->host, dead);
512 sdhci_free_host(c->host);
513
514 return 0;
515 }
516
517 #ifdef CONFIG_PM_SLEEP
518
519 static int sdhci_acpi_suspend(struct device *dev)
520 {
521 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
522
523 return sdhci_suspend_host(c->host);
524 }
525
526 static int sdhci_acpi_resume(struct device *dev)
527 {
528 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
529
530 sdhci_acpi_byt_setting(&c->pdev->dev);
531
532 return sdhci_resume_host(c->host);
533 }
534
535 #endif
536
537 #ifdef CONFIG_PM
538
539 static int sdhci_acpi_runtime_suspend(struct device *dev)
540 {
541 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
542
543 return sdhci_runtime_suspend_host(c->host);
544 }
545
546 static int sdhci_acpi_runtime_resume(struct device *dev)
547 {
548 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
549
550 sdhci_acpi_byt_setting(&c->pdev->dev);
551
552 return sdhci_runtime_resume_host(c->host);
553 }
554
555 #endif
556
557 static const struct dev_pm_ops sdhci_acpi_pm_ops = {
558 SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
559 SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
560 sdhci_acpi_runtime_resume, NULL)
561 };
562
563 static struct platform_driver sdhci_acpi_driver = {
564 .driver = {
565 .name = "sdhci-acpi",
566 .acpi_match_table = sdhci_acpi_ids,
567 .pm = &sdhci_acpi_pm_ops,
568 },
569 .probe = sdhci_acpi_probe,
570 .remove = sdhci_acpi_remove,
571 };
572
573 module_platform_driver(sdhci_acpi_driver);
574
575 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
576 MODULE_AUTHOR("Adrian Hunter");
577 MODULE_LICENSE("GPL v2");
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