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[deliverable/linux.git] / drivers / net / ethernet / amazon / ena / ena_netdev.c
1 /*
2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35 #ifdef CONFIG_RFS_ACCEL
36 #include <linux/cpu_rmap.h>
37 #endif /* CONFIG_RFS_ACCEL */
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/moduleparam.h>
43 #include <linux/numa.h>
44 #include <linux/pci.h>
45 #include <linux/utsname.h>
46 #include <linux/version.h>
47 #include <linux/vmalloc.h>
48 #include <net/ip.h>
49
50 #include "ena_netdev.h"
51 #include "ena_pci_id_tbl.h"
52
53 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
54
55 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
56 MODULE_DESCRIPTION(DEVICE_NAME);
57 MODULE_LICENSE("GPL");
58 MODULE_VERSION(DRV_MODULE_VERSION);
59
60 /* Time in jiffies before concluding the transmitter is hung. */
61 #define TX_TIMEOUT (5 * HZ)
62
63 #define ENA_NAPI_BUDGET 64
64
65 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
66 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
67 static int debug = -1;
68 module_param(debug, int, 0);
69 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70
71 static struct ena_aenq_handlers aenq_handlers;
72
73 static struct workqueue_struct *ena_wq;
74
75 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
76
77 static int ena_rss_init_default(struct ena_adapter *adapter);
78
79 static void ena_tx_timeout(struct net_device *dev)
80 {
81 struct ena_adapter *adapter = netdev_priv(dev);
82
83 u64_stats_update_begin(&adapter->syncp);
84 adapter->dev_stats.tx_timeout++;
85 u64_stats_update_end(&adapter->syncp);
86
87 netif_err(adapter, tx_err, dev, "Transmit time out\n");
88
89 /* Change the state of the device to trigger reset */
90 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
91 }
92
93 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
94 {
95 int i;
96
97 for (i = 0; i < adapter->num_queues; i++)
98 adapter->rx_ring[i].mtu = mtu;
99 }
100
101 static int ena_change_mtu(struct net_device *dev, int new_mtu)
102 {
103 struct ena_adapter *adapter = netdev_priv(dev);
104 int ret;
105
106 if ((new_mtu > adapter->max_mtu) || (new_mtu < ENA_MIN_MTU)) {
107 netif_err(adapter, drv, dev,
108 "Invalid MTU setting. new_mtu: %d\n", new_mtu);
109
110 return -EINVAL;
111 }
112
113 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
114 if (!ret) {
115 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
116 update_rx_ring_mtu(adapter, new_mtu);
117 dev->mtu = new_mtu;
118 } else {
119 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
120 new_mtu);
121 }
122
123 return ret;
124 }
125
126 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
127 {
128 #ifdef CONFIG_RFS_ACCEL
129 u32 i;
130 int rc;
131
132 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues);
133 if (!adapter->netdev->rx_cpu_rmap)
134 return -ENOMEM;
135 for (i = 0; i < adapter->num_queues; i++) {
136 int irq_idx = ENA_IO_IRQ_IDX(i);
137
138 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
139 adapter->msix_entries[irq_idx].vector);
140 if (rc) {
141 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
142 adapter->netdev->rx_cpu_rmap = NULL;
143 return rc;
144 }
145 }
146 #endif /* CONFIG_RFS_ACCEL */
147 return 0;
148 }
149
150 static void ena_init_io_rings_common(struct ena_adapter *adapter,
151 struct ena_ring *ring, u16 qid)
152 {
153 ring->qid = qid;
154 ring->pdev = adapter->pdev;
155 ring->dev = &adapter->pdev->dev;
156 ring->netdev = adapter->netdev;
157 ring->napi = &adapter->ena_napi[qid].napi;
158 ring->adapter = adapter;
159 ring->ena_dev = adapter->ena_dev;
160 ring->per_napi_packets = 0;
161 ring->per_napi_bytes = 0;
162 ring->cpu = 0;
163 u64_stats_init(&ring->syncp);
164 }
165
166 static void ena_init_io_rings(struct ena_adapter *adapter)
167 {
168 struct ena_com_dev *ena_dev;
169 struct ena_ring *txr, *rxr;
170 int i;
171
172 ena_dev = adapter->ena_dev;
173
174 for (i = 0; i < adapter->num_queues; i++) {
175 txr = &adapter->tx_ring[i];
176 rxr = &adapter->rx_ring[i];
177
178 /* TX/RX common ring state */
179 ena_init_io_rings_common(adapter, txr, i);
180 ena_init_io_rings_common(adapter, rxr, i);
181
182 /* TX specific ring state */
183 txr->ring_size = adapter->tx_ring_size;
184 txr->tx_max_header_size = ena_dev->tx_max_header_size;
185 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
186 txr->sgl_size = adapter->max_tx_sgl_size;
187 txr->smoothed_interval =
188 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
189
190 /* RX specific ring state */
191 rxr->ring_size = adapter->rx_ring_size;
192 rxr->rx_copybreak = adapter->rx_copybreak;
193 rxr->sgl_size = adapter->max_rx_sgl_size;
194 rxr->smoothed_interval =
195 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
196 }
197 }
198
199 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
200 * @adapter: network interface device structure
201 * @qid: queue index
202 *
203 * Return 0 on success, negative on failure
204 */
205 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
206 {
207 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
208 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
209 int size, i, node;
210
211 if (tx_ring->tx_buffer_info) {
212 netif_err(adapter, ifup,
213 adapter->netdev, "tx_buffer_info info is not NULL");
214 return -EEXIST;
215 }
216
217 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
218 node = cpu_to_node(ena_irq->cpu);
219
220 tx_ring->tx_buffer_info = vzalloc_node(size, node);
221 if (!tx_ring->tx_buffer_info) {
222 tx_ring->tx_buffer_info = vzalloc(size);
223 if (!tx_ring->tx_buffer_info)
224 return -ENOMEM;
225 }
226
227 size = sizeof(u16) * tx_ring->ring_size;
228 tx_ring->free_tx_ids = vzalloc_node(size, node);
229 if (!tx_ring->free_tx_ids) {
230 tx_ring->free_tx_ids = vzalloc(size);
231 if (!tx_ring->free_tx_ids) {
232 vfree(tx_ring->tx_buffer_info);
233 return -ENOMEM;
234 }
235 }
236
237 /* Req id ring for TX out of order completions */
238 for (i = 0; i < tx_ring->ring_size; i++)
239 tx_ring->free_tx_ids[i] = i;
240
241 /* Reset tx statistics */
242 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
243
244 tx_ring->next_to_use = 0;
245 tx_ring->next_to_clean = 0;
246 tx_ring->cpu = ena_irq->cpu;
247 return 0;
248 }
249
250 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
251 * @adapter: network interface device structure
252 * @qid: queue index
253 *
254 * Free all transmit software resources
255 */
256 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
257 {
258 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
259
260 vfree(tx_ring->tx_buffer_info);
261 tx_ring->tx_buffer_info = NULL;
262
263 vfree(tx_ring->free_tx_ids);
264 tx_ring->free_tx_ids = NULL;
265 }
266
267 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues
268 * @adapter: private structure
269 *
270 * Return 0 on success, negative on failure
271 */
272 static int ena_setup_all_tx_resources(struct ena_adapter *adapter)
273 {
274 int i, rc = 0;
275
276 for (i = 0; i < adapter->num_queues; i++) {
277 rc = ena_setup_tx_resources(adapter, i);
278 if (rc)
279 goto err_setup_tx;
280 }
281
282 return 0;
283
284 err_setup_tx:
285
286 netif_err(adapter, ifup, adapter->netdev,
287 "Tx queue %d: allocation failed\n", i);
288
289 /* rewind the index freeing the rings as we go */
290 while (i--)
291 ena_free_tx_resources(adapter, i);
292 return rc;
293 }
294
295 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
296 * @adapter: board private structure
297 *
298 * Free all transmit software resources
299 */
300 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
301 {
302 int i;
303
304 for (i = 0; i < adapter->num_queues; i++)
305 ena_free_tx_resources(adapter, i);
306 }
307
308 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
309 * @adapter: network interface device structure
310 * @qid: queue index
311 *
312 * Returns 0 on success, negative on failure
313 */
314 static int ena_setup_rx_resources(struct ena_adapter *adapter,
315 u32 qid)
316 {
317 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
318 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
319 int size, node;
320
321 if (rx_ring->rx_buffer_info) {
322 netif_err(adapter, ifup, adapter->netdev,
323 "rx_buffer_info is not NULL");
324 return -EEXIST;
325 }
326
327 /* alloc extra element so in rx path
328 * we can always prefetch rx_info + 1
329 */
330 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
331 node = cpu_to_node(ena_irq->cpu);
332
333 rx_ring->rx_buffer_info = vzalloc_node(size, node);
334 if (!rx_ring->rx_buffer_info) {
335 rx_ring->rx_buffer_info = vzalloc(size);
336 if (!rx_ring->rx_buffer_info)
337 return -ENOMEM;
338 }
339
340 /* Reset rx statistics */
341 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
342
343 rx_ring->next_to_clean = 0;
344 rx_ring->next_to_use = 0;
345 rx_ring->cpu = ena_irq->cpu;
346
347 return 0;
348 }
349
350 /* ena_free_rx_resources - Free I/O Rx Resources
351 * @adapter: network interface device structure
352 * @qid: queue index
353 *
354 * Free all receive software resources
355 */
356 static void ena_free_rx_resources(struct ena_adapter *adapter,
357 u32 qid)
358 {
359 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
360
361 vfree(rx_ring->rx_buffer_info);
362 rx_ring->rx_buffer_info = NULL;
363 }
364
365 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
366 * @adapter: board private structure
367 *
368 * Return 0 on success, negative on failure
369 */
370 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
371 {
372 int i, rc = 0;
373
374 for (i = 0; i < adapter->num_queues; i++) {
375 rc = ena_setup_rx_resources(adapter, i);
376 if (rc)
377 goto err_setup_rx;
378 }
379
380 return 0;
381
382 err_setup_rx:
383
384 netif_err(adapter, ifup, adapter->netdev,
385 "Rx queue %d: allocation failed\n", i);
386
387 /* rewind the index freeing the rings as we go */
388 while (i--)
389 ena_free_rx_resources(adapter, i);
390 return rc;
391 }
392
393 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
394 * @adapter: board private structure
395 *
396 * Free all receive software resources
397 */
398 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
399 {
400 int i;
401
402 for (i = 0; i < adapter->num_queues; i++)
403 ena_free_rx_resources(adapter, i);
404 }
405
406 static inline int ena_alloc_rx_page(struct ena_ring *rx_ring,
407 struct ena_rx_buffer *rx_info, gfp_t gfp)
408 {
409 struct ena_com_buf *ena_buf;
410 struct page *page;
411 dma_addr_t dma;
412
413 /* if previous allocated page is not used */
414 if (unlikely(rx_info->page))
415 return 0;
416
417 page = alloc_page(gfp);
418 if (unlikely(!page)) {
419 u64_stats_update_begin(&rx_ring->syncp);
420 rx_ring->rx_stats.page_alloc_fail++;
421 u64_stats_update_end(&rx_ring->syncp);
422 return -ENOMEM;
423 }
424
425 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE,
426 DMA_FROM_DEVICE);
427 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
428 u64_stats_update_begin(&rx_ring->syncp);
429 rx_ring->rx_stats.dma_mapping_err++;
430 u64_stats_update_end(&rx_ring->syncp);
431
432 __free_page(page);
433 return -EIO;
434 }
435 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
436 "alloc page %p, rx_info %p\n", page, rx_info);
437
438 rx_info->page = page;
439 rx_info->page_offset = 0;
440 ena_buf = &rx_info->ena_buf;
441 ena_buf->paddr = dma;
442 ena_buf->len = PAGE_SIZE;
443
444 return 0;
445 }
446
447 static void ena_free_rx_page(struct ena_ring *rx_ring,
448 struct ena_rx_buffer *rx_info)
449 {
450 struct page *page = rx_info->page;
451 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
452
453 if (unlikely(!page)) {
454 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
455 "Trying to free unallocated buffer\n");
456 return;
457 }
458
459 dma_unmap_page(rx_ring->dev, ena_buf->paddr, PAGE_SIZE,
460 DMA_FROM_DEVICE);
461
462 __free_page(page);
463 rx_info->page = NULL;
464 }
465
466 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
467 {
468 u16 next_to_use;
469 u32 i;
470 int rc;
471
472 next_to_use = rx_ring->next_to_use;
473
474 for (i = 0; i < num; i++) {
475 struct ena_rx_buffer *rx_info =
476 &rx_ring->rx_buffer_info[next_to_use];
477
478 rc = ena_alloc_rx_page(rx_ring, rx_info,
479 __GFP_COLD | GFP_ATOMIC | __GFP_COMP);
480 if (unlikely(rc < 0)) {
481 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
482 "failed to alloc buffer for rx queue %d\n",
483 rx_ring->qid);
484 break;
485 }
486 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
487 &rx_info->ena_buf,
488 next_to_use);
489 if (unlikely(rc)) {
490 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
491 "failed to add buffer for rx queue %d\n",
492 rx_ring->qid);
493 break;
494 }
495 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
496 rx_ring->ring_size);
497 }
498
499 if (unlikely(i < num)) {
500 u64_stats_update_begin(&rx_ring->syncp);
501 rx_ring->rx_stats.refil_partial++;
502 u64_stats_update_end(&rx_ring->syncp);
503 netdev_warn(rx_ring->netdev,
504 "refilled rx qid %d with only %d buffers (from %d)\n",
505 rx_ring->qid, i, num);
506 }
507
508 if (likely(i)) {
509 /* Add memory barrier to make sure the desc were written before
510 * issue a doorbell
511 */
512 wmb();
513 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
514 }
515
516 rx_ring->next_to_use = next_to_use;
517
518 return i;
519 }
520
521 static void ena_free_rx_bufs(struct ena_adapter *adapter,
522 u32 qid)
523 {
524 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
525 u32 i;
526
527 for (i = 0; i < rx_ring->ring_size; i++) {
528 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
529
530 if (rx_info->page)
531 ena_free_rx_page(rx_ring, rx_info);
532 }
533 }
534
535 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
536 * @adapter: board private structure
537 *
538 */
539 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
540 {
541 struct ena_ring *rx_ring;
542 int i, rc, bufs_num;
543
544 for (i = 0; i < adapter->num_queues; i++) {
545 rx_ring = &adapter->rx_ring[i];
546 bufs_num = rx_ring->ring_size - 1;
547 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
548
549 if (unlikely(rc != bufs_num))
550 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
551 "refilling Queue %d failed. allocated %d buffers from: %d\n",
552 i, rc, bufs_num);
553 }
554 }
555
556 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
557 {
558 int i;
559
560 for (i = 0; i < adapter->num_queues; i++)
561 ena_free_rx_bufs(adapter, i);
562 }
563
564 /* ena_free_tx_bufs - Free Tx Buffers per Queue
565 * @tx_ring: TX ring for which buffers be freed
566 */
567 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
568 {
569 u32 i;
570
571 for (i = 0; i < tx_ring->ring_size; i++) {
572 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
573 struct ena_com_buf *ena_buf;
574 int nr_frags;
575 int j;
576
577 if (!tx_info->skb)
578 continue;
579
580 netdev_notice(tx_ring->netdev,
581 "free uncompleted tx skb qid %d idx 0x%x\n",
582 tx_ring->qid, i);
583
584 ena_buf = tx_info->bufs;
585 dma_unmap_single(tx_ring->dev,
586 ena_buf->paddr,
587 ena_buf->len,
588 DMA_TO_DEVICE);
589
590 /* unmap remaining mapped pages */
591 nr_frags = tx_info->num_of_bufs - 1;
592 for (j = 0; j < nr_frags; j++) {
593 ena_buf++;
594 dma_unmap_page(tx_ring->dev,
595 ena_buf->paddr,
596 ena_buf->len,
597 DMA_TO_DEVICE);
598 }
599
600 dev_kfree_skb_any(tx_info->skb);
601 }
602 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
603 tx_ring->qid));
604 }
605
606 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
607 {
608 struct ena_ring *tx_ring;
609 int i;
610
611 for (i = 0; i < adapter->num_queues; i++) {
612 tx_ring = &adapter->tx_ring[i];
613 ena_free_tx_bufs(tx_ring);
614 }
615 }
616
617 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
618 {
619 u16 ena_qid;
620 int i;
621
622 for (i = 0; i < adapter->num_queues; i++) {
623 ena_qid = ENA_IO_TXQ_IDX(i);
624 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
625 }
626 }
627
628 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
629 {
630 u16 ena_qid;
631 int i;
632
633 for (i = 0; i < adapter->num_queues; i++) {
634 ena_qid = ENA_IO_RXQ_IDX(i);
635 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
636 }
637 }
638
639 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
640 {
641 ena_destroy_all_tx_queues(adapter);
642 ena_destroy_all_rx_queues(adapter);
643 }
644
645 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
646 {
647 struct ena_tx_buffer *tx_info = NULL;
648
649 if (likely(req_id < tx_ring->ring_size)) {
650 tx_info = &tx_ring->tx_buffer_info[req_id];
651 if (likely(tx_info->skb))
652 return 0;
653 }
654
655 if (tx_info)
656 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
657 "tx_info doesn't have valid skb\n");
658 else
659 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
660 "Invalid req_id: %hu\n", req_id);
661
662 u64_stats_update_begin(&tx_ring->syncp);
663 tx_ring->tx_stats.bad_req_id++;
664 u64_stats_update_end(&tx_ring->syncp);
665
666 /* Trigger device reset */
667 set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags);
668 return -EFAULT;
669 }
670
671 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
672 {
673 struct netdev_queue *txq;
674 bool above_thresh;
675 u32 tx_bytes = 0;
676 u32 total_done = 0;
677 u16 next_to_clean;
678 u16 req_id;
679 int tx_pkts = 0;
680 int rc;
681
682 next_to_clean = tx_ring->next_to_clean;
683 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
684
685 while (tx_pkts < budget) {
686 struct ena_tx_buffer *tx_info;
687 struct sk_buff *skb;
688 struct ena_com_buf *ena_buf;
689 int i, nr_frags;
690
691 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
692 &req_id);
693 if (rc)
694 break;
695
696 rc = validate_tx_req_id(tx_ring, req_id);
697 if (rc)
698 break;
699
700 tx_info = &tx_ring->tx_buffer_info[req_id];
701 skb = tx_info->skb;
702
703 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
704 prefetch(&skb->end);
705
706 tx_info->skb = NULL;
707 tx_info->last_jiffies = 0;
708
709 if (likely(tx_info->num_of_bufs != 0)) {
710 ena_buf = tx_info->bufs;
711
712 dma_unmap_single(tx_ring->dev,
713 dma_unmap_addr(ena_buf, paddr),
714 dma_unmap_len(ena_buf, len),
715 DMA_TO_DEVICE);
716
717 /* unmap remaining mapped pages */
718 nr_frags = tx_info->num_of_bufs - 1;
719 for (i = 0; i < nr_frags; i++) {
720 ena_buf++;
721 dma_unmap_page(tx_ring->dev,
722 dma_unmap_addr(ena_buf, paddr),
723 dma_unmap_len(ena_buf, len),
724 DMA_TO_DEVICE);
725 }
726 }
727
728 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
729 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
730 skb);
731
732 tx_bytes += skb->len;
733 dev_kfree_skb(skb);
734 tx_pkts++;
735 total_done += tx_info->tx_descs;
736
737 tx_ring->free_tx_ids[next_to_clean] = req_id;
738 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
739 tx_ring->ring_size);
740 }
741
742 tx_ring->next_to_clean = next_to_clean;
743 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
744 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
745
746 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
747
748 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
749 "tx_poll: q %d done. total pkts: %d\n",
750 tx_ring->qid, tx_pkts);
751
752 /* need to make the rings circular update visible to
753 * ena_start_xmit() before checking for netif_queue_stopped().
754 */
755 smp_mb();
756
757 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) >
758 ENA_TX_WAKEUP_THRESH;
759 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
760 __netif_tx_lock(txq, smp_processor_id());
761 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) >
762 ENA_TX_WAKEUP_THRESH;
763 if (netif_tx_queue_stopped(txq) && above_thresh) {
764 netif_tx_wake_queue(txq);
765 u64_stats_update_begin(&tx_ring->syncp);
766 tx_ring->tx_stats.queue_wakeup++;
767 u64_stats_update_end(&tx_ring->syncp);
768 }
769 __netif_tx_unlock(txq);
770 }
771
772 tx_ring->per_napi_bytes += tx_bytes;
773 tx_ring->per_napi_packets += tx_pkts;
774
775 return tx_pkts;
776 }
777
778 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
779 struct ena_com_rx_buf_info *ena_bufs,
780 u32 descs,
781 u16 *next_to_clean)
782 {
783 struct sk_buff *skb;
784 struct ena_rx_buffer *rx_info =
785 &rx_ring->rx_buffer_info[*next_to_clean];
786 u32 len;
787 u32 buf = 0;
788 void *va;
789
790 len = ena_bufs[0].len;
791 if (unlikely(!rx_info->page)) {
792 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
793 "Page is NULL\n");
794 return NULL;
795 }
796
797 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
798 "rx_info %p page %p\n",
799 rx_info, rx_info->page);
800
801 /* save virt address of first buffer */
802 va = page_address(rx_info->page) + rx_info->page_offset;
803 prefetch(va + NET_IP_ALIGN);
804
805 if (len <= rx_ring->rx_copybreak) {
806 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
807 rx_ring->rx_copybreak);
808 if (unlikely(!skb)) {
809 u64_stats_update_begin(&rx_ring->syncp);
810 rx_ring->rx_stats.skb_alloc_fail++;
811 u64_stats_update_end(&rx_ring->syncp);
812 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
813 "Failed to allocate skb\n");
814 return NULL;
815 }
816
817 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
818 "rx allocated small packet. len %d. data_len %d\n",
819 skb->len, skb->data_len);
820
821 /* sync this buffer for CPU use */
822 dma_sync_single_for_cpu(rx_ring->dev,
823 dma_unmap_addr(&rx_info->ena_buf, paddr),
824 len,
825 DMA_FROM_DEVICE);
826 skb_copy_to_linear_data(skb, va, len);
827 dma_sync_single_for_device(rx_ring->dev,
828 dma_unmap_addr(&rx_info->ena_buf, paddr),
829 len,
830 DMA_FROM_DEVICE);
831
832 skb_put(skb, len);
833 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
834 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
835 rx_ring->ring_size);
836 return skb;
837 }
838
839 skb = napi_get_frags(rx_ring->napi);
840 if (unlikely(!skb)) {
841 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
842 "Failed allocating skb\n");
843 u64_stats_update_begin(&rx_ring->syncp);
844 rx_ring->rx_stats.skb_alloc_fail++;
845 u64_stats_update_end(&rx_ring->syncp);
846 return NULL;
847 }
848
849 do {
850 dma_unmap_page(rx_ring->dev,
851 dma_unmap_addr(&rx_info->ena_buf, paddr),
852 PAGE_SIZE, DMA_FROM_DEVICE);
853
854 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
855 rx_info->page_offset, len, PAGE_SIZE);
856
857 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
858 "rx skb updated. len %d. data_len %d\n",
859 skb->len, skb->data_len);
860
861 rx_info->page = NULL;
862 *next_to_clean =
863 ENA_RX_RING_IDX_NEXT(*next_to_clean,
864 rx_ring->ring_size);
865 if (likely(--descs == 0))
866 break;
867 rx_info = &rx_ring->rx_buffer_info[*next_to_clean];
868 len = ena_bufs[++buf].len;
869 } while (1);
870
871 return skb;
872 }
873
874 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
875 * @adapter: structure containing adapter specific data
876 * @ena_rx_ctx: received packet context/metadata
877 * @skb: skb currently being received and modified
878 */
879 static inline void ena_rx_checksum(struct ena_ring *rx_ring,
880 struct ena_com_rx_ctx *ena_rx_ctx,
881 struct sk_buff *skb)
882 {
883 /* Rx csum disabled */
884 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
885 skb->ip_summed = CHECKSUM_NONE;
886 return;
887 }
888
889 /* For fragmented packets the checksum isn't valid */
890 if (ena_rx_ctx->frag) {
891 skb->ip_summed = CHECKSUM_NONE;
892 return;
893 }
894
895 /* if IP and error */
896 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
897 (ena_rx_ctx->l3_csum_err))) {
898 /* ipv4 checksum error */
899 skb->ip_summed = CHECKSUM_NONE;
900 u64_stats_update_begin(&rx_ring->syncp);
901 rx_ring->rx_stats.bad_csum++;
902 u64_stats_update_end(&rx_ring->syncp);
903 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
904 "RX IPv4 header checksum error\n");
905 return;
906 }
907
908 /* if TCP/UDP */
909 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
910 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
911 if (unlikely(ena_rx_ctx->l4_csum_err)) {
912 /* TCP/UDP checksum error */
913 u64_stats_update_begin(&rx_ring->syncp);
914 rx_ring->rx_stats.bad_csum++;
915 u64_stats_update_end(&rx_ring->syncp);
916 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
917 "RX L4 checksum error\n");
918 skb->ip_summed = CHECKSUM_NONE;
919 return;
920 }
921
922 skb->ip_summed = CHECKSUM_UNNECESSARY;
923 }
924 }
925
926 static void ena_set_rx_hash(struct ena_ring *rx_ring,
927 struct ena_com_rx_ctx *ena_rx_ctx,
928 struct sk_buff *skb)
929 {
930 enum pkt_hash_types hash_type;
931
932 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
933 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
934 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
935
936 hash_type = PKT_HASH_TYPE_L4;
937 else
938 hash_type = PKT_HASH_TYPE_NONE;
939
940 /* Override hash type if the packet is fragmented */
941 if (ena_rx_ctx->frag)
942 hash_type = PKT_HASH_TYPE_NONE;
943
944 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
945 }
946 }
947
948 /* ena_clean_rx_irq - Cleanup RX irq
949 * @rx_ring: RX ring to clean
950 * @napi: napi handler
951 * @budget: how many packets driver is allowed to clean
952 *
953 * Returns the number of cleaned buffers.
954 */
955 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
956 u32 budget)
957 {
958 u16 next_to_clean = rx_ring->next_to_clean;
959 u32 res_budget, work_done;
960
961 struct ena_com_rx_ctx ena_rx_ctx;
962 struct ena_adapter *adapter;
963 struct sk_buff *skb;
964 int refill_required;
965 int refill_threshold;
966 int rc = 0;
967 int total_len = 0;
968 int rx_copybreak_pkt = 0;
969
970 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
971 "%s qid %d\n", __func__, rx_ring->qid);
972 res_budget = budget;
973
974 do {
975 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
976 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
977 ena_rx_ctx.descs = 0;
978 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
979 rx_ring->ena_com_io_sq,
980 &ena_rx_ctx);
981 if (unlikely(rc))
982 goto error;
983
984 if (unlikely(ena_rx_ctx.descs == 0))
985 break;
986
987 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
988 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
989 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
990 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
991
992 /* allocate skb and fill it */
993 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs,
994 &next_to_clean);
995
996 /* exit if we failed to retrieve a buffer */
997 if (unlikely(!skb)) {
998 next_to_clean = ENA_RX_RING_IDX_ADD(next_to_clean,
999 ena_rx_ctx.descs,
1000 rx_ring->ring_size);
1001 break;
1002 }
1003
1004 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1005
1006 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1007
1008 skb_record_rx_queue(skb, rx_ring->qid);
1009
1010 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1011 total_len += rx_ring->ena_bufs[0].len;
1012 rx_copybreak_pkt++;
1013 napi_gro_receive(napi, skb);
1014 } else {
1015 total_len += skb->len;
1016 napi_gro_frags(napi);
1017 }
1018
1019 res_budget--;
1020 } while (likely(res_budget));
1021
1022 work_done = budget - res_budget;
1023 rx_ring->per_napi_bytes += total_len;
1024 rx_ring->per_napi_packets += work_done;
1025 u64_stats_update_begin(&rx_ring->syncp);
1026 rx_ring->rx_stats.bytes += total_len;
1027 rx_ring->rx_stats.cnt += work_done;
1028 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1029 u64_stats_update_end(&rx_ring->syncp);
1030
1031 rx_ring->next_to_clean = next_to_clean;
1032
1033 refill_required = ena_com_sq_empty_space(rx_ring->ena_com_io_sq);
1034 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER;
1035
1036 /* Optimization, try to batch new rx buffers */
1037 if (refill_required > refill_threshold) {
1038 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1039 ena_refill_rx_bufs(rx_ring, refill_required);
1040 }
1041
1042 return work_done;
1043
1044 error:
1045 adapter = netdev_priv(rx_ring->netdev);
1046
1047 u64_stats_update_begin(&rx_ring->syncp);
1048 rx_ring->rx_stats.bad_desc_num++;
1049 u64_stats_update_end(&rx_ring->syncp);
1050
1051 /* Too many desc from the device. Trigger reset */
1052 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1053
1054 return 0;
1055 }
1056
1057 inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring,
1058 struct ena_ring *tx_ring)
1059 {
1060 /* We apply adaptive moderation on Rx path only.
1061 * Tx uses static interrupt moderation.
1062 */
1063 ena_com_calculate_interrupt_delay(rx_ring->ena_dev,
1064 rx_ring->per_napi_packets,
1065 rx_ring->per_napi_bytes,
1066 &rx_ring->smoothed_interval,
1067 &rx_ring->moder_tbl_idx);
1068
1069 /* Reset per napi packets/bytes */
1070 tx_ring->per_napi_packets = 0;
1071 tx_ring->per_napi_bytes = 0;
1072 rx_ring->per_napi_packets = 0;
1073 rx_ring->per_napi_bytes = 0;
1074 }
1075
1076 static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1077 struct ena_ring *rx_ring)
1078 {
1079 int cpu = get_cpu();
1080 int numa_node;
1081
1082 /* Check only one ring since the 2 rings are running on the same cpu */
1083 if (likely(tx_ring->cpu == cpu))
1084 goto out;
1085
1086 numa_node = cpu_to_node(cpu);
1087 put_cpu();
1088
1089 if (numa_node != NUMA_NO_NODE) {
1090 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1091 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node);
1092 }
1093
1094 tx_ring->cpu = cpu;
1095 rx_ring->cpu = cpu;
1096
1097 return;
1098 out:
1099 put_cpu();
1100 }
1101
1102 static int ena_io_poll(struct napi_struct *napi, int budget)
1103 {
1104 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1105 struct ena_ring *tx_ring, *rx_ring;
1106 struct ena_eth_io_intr_reg intr_reg;
1107
1108 u32 tx_work_done;
1109 u32 rx_work_done;
1110 int tx_budget;
1111 int napi_comp_call = 0;
1112 int ret;
1113
1114 tx_ring = ena_napi->tx_ring;
1115 rx_ring = ena_napi->rx_ring;
1116
1117 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1118
1119 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1120 napi_complete_done(napi, 0);
1121 return 0;
1122 }
1123
1124 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1125 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1126
1127 if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1128 napi_complete_done(napi, rx_work_done);
1129
1130 napi_comp_call = 1;
1131 /* Tx and Rx share the same interrupt vector */
1132 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1133 ena_adjust_intr_moderation(rx_ring, tx_ring);
1134
1135 /* Update intr register: rx intr delay, tx intr delay and
1136 * interrupt unmask
1137 */
1138 ena_com_update_intr_reg(&intr_reg,
1139 rx_ring->smoothed_interval,
1140 tx_ring->smoothed_interval,
1141 true);
1142
1143 /* It is a shared MSI-X. Tx and Rx CQ have pointer to it.
1144 * So we use one of them to reach the intr reg
1145 */
1146 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1147
1148 ena_update_ring_numa_node(tx_ring, rx_ring);
1149
1150 ret = rx_work_done;
1151 } else {
1152 ret = budget;
1153 }
1154
1155 u64_stats_update_begin(&tx_ring->syncp);
1156 tx_ring->tx_stats.napi_comp += napi_comp_call;
1157 tx_ring->tx_stats.tx_poll++;
1158 u64_stats_update_end(&tx_ring->syncp);
1159
1160 return ret;
1161 }
1162
1163 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1164 {
1165 struct ena_adapter *adapter = (struct ena_adapter *)data;
1166
1167 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1168
1169 /* Don't call the aenq handler before probe is done */
1170 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1171 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1172
1173 return IRQ_HANDLED;
1174 }
1175
1176 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1177 * @irq: interrupt number
1178 * @data: pointer to a network interface private napi device structure
1179 */
1180 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1181 {
1182 struct ena_napi *ena_napi = data;
1183
1184 napi_schedule(&ena_napi->napi);
1185
1186 return IRQ_HANDLED;
1187 }
1188
1189 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues)
1190 {
1191 int i, msix_vecs, rc;
1192
1193 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1194 netif_err(adapter, probe, adapter->netdev,
1195 "Error, MSI-X is already enabled\n");
1196 return -EPERM;
1197 }
1198
1199 /* Reserved the max msix vectors we might need */
1200 msix_vecs = ENA_MAX_MSIX_VEC(num_queues);
1201
1202 netif_dbg(adapter, probe, adapter->netdev,
1203 "trying to enable MSI-X, vectors %d\n", msix_vecs);
1204
1205 adapter->msix_entries = vzalloc(msix_vecs * sizeof(struct msix_entry));
1206
1207 if (!adapter->msix_entries)
1208 return -ENOMEM;
1209
1210 for (i = 0; i < msix_vecs; i++)
1211 adapter->msix_entries[i].entry = i;
1212
1213 rc = pci_enable_msix(adapter->pdev, adapter->msix_entries, msix_vecs);
1214 if (rc != 0) {
1215 netif_err(adapter, probe, adapter->netdev,
1216 "Failed to enable MSI-X, vectors %d rc %d\n",
1217 msix_vecs, rc);
1218 return -ENOSPC;
1219 }
1220
1221 netif_dbg(adapter, probe, adapter->netdev, "enable MSI-X, vectors %d\n",
1222 msix_vecs);
1223
1224 if (msix_vecs >= 1) {
1225 if (ena_init_rx_cpu_rmap(adapter))
1226 netif_warn(adapter, probe, adapter->netdev,
1227 "Failed to map IRQs to CPUs\n");
1228 }
1229
1230 adapter->msix_vecs = msix_vecs;
1231 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1232
1233 return 0;
1234 }
1235
1236 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1237 {
1238 u32 cpu;
1239
1240 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1241 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1242 pci_name(adapter->pdev));
1243 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
1244 ena_intr_msix_mgmnt;
1245 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1246 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1247 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector;
1248 cpu = cpumask_first(cpu_online_mask);
1249 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
1250 cpumask_set_cpu(cpu,
1251 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
1252 }
1253
1254 static void ena_setup_io_intr(struct ena_adapter *adapter)
1255 {
1256 struct net_device *netdev;
1257 int irq_idx, i, cpu;
1258
1259 netdev = adapter->netdev;
1260
1261 for (i = 0; i < adapter->num_queues; i++) {
1262 irq_idx = ENA_IO_IRQ_IDX(i);
1263 cpu = i % num_online_cpus();
1264
1265 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1266 "%s-Tx-Rx-%d", netdev->name, i);
1267 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
1268 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
1269 adapter->irq_tbl[irq_idx].vector =
1270 adapter->msix_entries[irq_idx].vector;
1271 adapter->irq_tbl[irq_idx].cpu = cpu;
1272
1273 cpumask_set_cpu(cpu,
1274 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
1275 }
1276 }
1277
1278 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
1279 {
1280 unsigned long flags = 0;
1281 struct ena_irq *irq;
1282 int rc;
1283
1284 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1285 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1286 irq->data);
1287 if (rc) {
1288 netif_err(adapter, probe, adapter->netdev,
1289 "failed to request admin irq\n");
1290 return rc;
1291 }
1292
1293 netif_dbg(adapter, probe, adapter->netdev,
1294 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1295 irq->affinity_hint_mask.bits[0], irq->vector);
1296
1297 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1298
1299 return rc;
1300 }
1301
1302 static int ena_request_io_irq(struct ena_adapter *adapter)
1303 {
1304 unsigned long flags = 0;
1305 struct ena_irq *irq;
1306 int rc = 0, i, k;
1307
1308 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1309 netif_err(adapter, ifup, adapter->netdev,
1310 "Failed to request I/O IRQ: MSI-X is not enabled\n");
1311 return -EINVAL;
1312 }
1313
1314 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1315 irq = &adapter->irq_tbl[i];
1316 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1317 irq->data);
1318 if (rc) {
1319 netif_err(adapter, ifup, adapter->netdev,
1320 "Failed to request I/O IRQ. index %d rc %d\n",
1321 i, rc);
1322 goto err;
1323 }
1324
1325 netif_dbg(adapter, ifup, adapter->netdev,
1326 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1327 i, irq->affinity_hint_mask.bits[0], irq->vector);
1328
1329 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1330 }
1331
1332 return rc;
1333
1334 err:
1335 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
1336 irq = &adapter->irq_tbl[k];
1337 free_irq(irq->vector, irq->data);
1338 }
1339
1340 return rc;
1341 }
1342
1343 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
1344 {
1345 struct ena_irq *irq;
1346
1347 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1348 synchronize_irq(irq->vector);
1349 irq_set_affinity_hint(irq->vector, NULL);
1350 free_irq(irq->vector, irq->data);
1351 }
1352
1353 static void ena_free_io_irq(struct ena_adapter *adapter)
1354 {
1355 struct ena_irq *irq;
1356 int i;
1357
1358 #ifdef CONFIG_RFS_ACCEL
1359 if (adapter->msix_vecs >= 1) {
1360 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
1361 adapter->netdev->rx_cpu_rmap = NULL;
1362 }
1363 #endif /* CONFIG_RFS_ACCEL */
1364
1365 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1366 irq = &adapter->irq_tbl[i];
1367 irq_set_affinity_hint(irq->vector, NULL);
1368 free_irq(irq->vector, irq->data);
1369 }
1370 }
1371
1372 static void ena_disable_msix(struct ena_adapter *adapter)
1373 {
1374 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
1375 pci_disable_msix(adapter->pdev);
1376
1377 if (adapter->msix_entries)
1378 vfree(adapter->msix_entries);
1379 adapter->msix_entries = NULL;
1380 }
1381
1382 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
1383 {
1384 int i;
1385
1386 if (!netif_running(adapter->netdev))
1387 return;
1388
1389 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
1390 synchronize_irq(adapter->irq_tbl[i].vector);
1391 }
1392
1393 static void ena_del_napi(struct ena_adapter *adapter)
1394 {
1395 int i;
1396
1397 for (i = 0; i < adapter->num_queues; i++)
1398 netif_napi_del(&adapter->ena_napi[i].napi);
1399 }
1400
1401 static void ena_init_napi(struct ena_adapter *adapter)
1402 {
1403 struct ena_napi *napi;
1404 int i;
1405
1406 for (i = 0; i < adapter->num_queues; i++) {
1407 napi = &adapter->ena_napi[i];
1408
1409 netif_napi_add(adapter->netdev,
1410 &adapter->ena_napi[i].napi,
1411 ena_io_poll,
1412 ENA_NAPI_BUDGET);
1413 napi->rx_ring = &adapter->rx_ring[i];
1414 napi->tx_ring = &adapter->tx_ring[i];
1415 napi->qid = i;
1416 }
1417 }
1418
1419 static void ena_napi_disable_all(struct ena_adapter *adapter)
1420 {
1421 int i;
1422
1423 for (i = 0; i < adapter->num_queues; i++)
1424 napi_disable(&adapter->ena_napi[i].napi);
1425 }
1426
1427 static void ena_napi_enable_all(struct ena_adapter *adapter)
1428 {
1429 int i;
1430
1431 for (i = 0; i < adapter->num_queues; i++)
1432 napi_enable(&adapter->ena_napi[i].napi);
1433 }
1434
1435 static void ena_restore_ethtool_params(struct ena_adapter *adapter)
1436 {
1437 adapter->tx_usecs = 0;
1438 adapter->rx_usecs = 0;
1439 adapter->tx_frames = 1;
1440 adapter->rx_frames = 1;
1441 }
1442
1443 /* Configure the Rx forwarding */
1444 static int ena_rss_configure(struct ena_adapter *adapter)
1445 {
1446 struct ena_com_dev *ena_dev = adapter->ena_dev;
1447 int rc;
1448
1449 /* In case the RSS table wasn't initialized by probe */
1450 if (!ena_dev->rss.tbl_log_size) {
1451 rc = ena_rss_init_default(adapter);
1452 if (rc && (rc != -EPERM)) {
1453 netif_err(adapter, ifup, adapter->netdev,
1454 "Failed to init RSS rc: %d\n", rc);
1455 return rc;
1456 }
1457 }
1458
1459 /* Set indirect table */
1460 rc = ena_com_indirect_table_set(ena_dev);
1461 if (unlikely(rc && rc != -EPERM))
1462 return rc;
1463
1464 /* Configure hash function (if supported) */
1465 rc = ena_com_set_hash_function(ena_dev);
1466 if (unlikely(rc && (rc != -EPERM)))
1467 return rc;
1468
1469 /* Configure hash inputs (if supported) */
1470 rc = ena_com_set_hash_ctrl(ena_dev);
1471 if (unlikely(rc && (rc != -EPERM)))
1472 return rc;
1473
1474 return 0;
1475 }
1476
1477 static int ena_up_complete(struct ena_adapter *adapter)
1478 {
1479 int rc, i;
1480
1481 rc = ena_rss_configure(adapter);
1482 if (rc)
1483 return rc;
1484
1485 ena_init_napi(adapter);
1486
1487 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
1488
1489 ena_refill_all_rx_bufs(adapter);
1490
1491 /* enable transmits */
1492 netif_tx_start_all_queues(adapter->netdev);
1493
1494 ena_restore_ethtool_params(adapter);
1495
1496 ena_napi_enable_all(adapter);
1497
1498 /* schedule napi in case we had pending packets
1499 * from the last time we disable napi
1500 */
1501 for (i = 0; i < adapter->num_queues; i++)
1502 napi_schedule(&adapter->ena_napi[i].napi);
1503
1504 return 0;
1505 }
1506
1507 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
1508 {
1509 struct ena_com_create_io_ctx ctx = { 0 };
1510 struct ena_com_dev *ena_dev;
1511 struct ena_ring *tx_ring;
1512 u32 msix_vector;
1513 u16 ena_qid;
1514 int rc;
1515
1516 ena_dev = adapter->ena_dev;
1517
1518 tx_ring = &adapter->tx_ring[qid];
1519 msix_vector = ENA_IO_IRQ_IDX(qid);
1520 ena_qid = ENA_IO_TXQ_IDX(qid);
1521
1522 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1523 ctx.qid = ena_qid;
1524 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1525 ctx.msix_vector = msix_vector;
1526 ctx.queue_size = adapter->tx_ring_size;
1527 ctx.numa_node = cpu_to_node(tx_ring->cpu);
1528
1529 rc = ena_com_create_io_queue(ena_dev, &ctx);
1530 if (rc) {
1531 netif_err(adapter, ifup, adapter->netdev,
1532 "Failed to create I/O TX queue num %d rc: %d\n",
1533 qid, rc);
1534 return rc;
1535 }
1536
1537 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1538 &tx_ring->ena_com_io_sq,
1539 &tx_ring->ena_com_io_cq);
1540 if (rc) {
1541 netif_err(adapter, ifup, adapter->netdev,
1542 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
1543 qid, rc);
1544 ena_com_destroy_io_queue(ena_dev, ena_qid);
1545 }
1546
1547 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
1548 return rc;
1549 }
1550
1551 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter)
1552 {
1553 struct ena_com_dev *ena_dev = adapter->ena_dev;
1554 int rc, i;
1555
1556 for (i = 0; i < adapter->num_queues; i++) {
1557 rc = ena_create_io_tx_queue(adapter, i);
1558 if (rc)
1559 goto create_err;
1560 }
1561
1562 return 0;
1563
1564 create_err:
1565 while (i--)
1566 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1567
1568 return rc;
1569 }
1570
1571 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
1572 {
1573 struct ena_com_dev *ena_dev;
1574 struct ena_com_create_io_ctx ctx = { 0 };
1575 struct ena_ring *rx_ring;
1576 u32 msix_vector;
1577 u16 ena_qid;
1578 int rc;
1579
1580 ena_dev = adapter->ena_dev;
1581
1582 rx_ring = &adapter->rx_ring[qid];
1583 msix_vector = ENA_IO_IRQ_IDX(qid);
1584 ena_qid = ENA_IO_RXQ_IDX(qid);
1585
1586 ctx.qid = ena_qid;
1587 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1588 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1589 ctx.msix_vector = msix_vector;
1590 ctx.queue_size = adapter->rx_ring_size;
1591 ctx.numa_node = cpu_to_node(rx_ring->cpu);
1592
1593 rc = ena_com_create_io_queue(ena_dev, &ctx);
1594 if (rc) {
1595 netif_err(adapter, ifup, adapter->netdev,
1596 "Failed to create I/O RX queue num %d rc: %d\n",
1597 qid, rc);
1598 return rc;
1599 }
1600
1601 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1602 &rx_ring->ena_com_io_sq,
1603 &rx_ring->ena_com_io_cq);
1604 if (rc) {
1605 netif_err(adapter, ifup, adapter->netdev,
1606 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
1607 qid, rc);
1608 ena_com_destroy_io_queue(ena_dev, ena_qid);
1609 }
1610
1611 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
1612
1613 return rc;
1614 }
1615
1616 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
1617 {
1618 struct ena_com_dev *ena_dev = adapter->ena_dev;
1619 int rc, i;
1620
1621 for (i = 0; i < adapter->num_queues; i++) {
1622 rc = ena_create_io_rx_queue(adapter, i);
1623 if (rc)
1624 goto create_err;
1625 }
1626
1627 return 0;
1628
1629 create_err:
1630 while (i--)
1631 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1632
1633 return rc;
1634 }
1635
1636 static int ena_up(struct ena_adapter *adapter)
1637 {
1638 int rc;
1639
1640 netdev_dbg(adapter->netdev, "%s\n", __func__);
1641
1642 ena_setup_io_intr(adapter);
1643
1644 rc = ena_request_io_irq(adapter);
1645 if (rc)
1646 goto err_req_irq;
1647
1648 /* allocate transmit descriptors */
1649 rc = ena_setup_all_tx_resources(adapter);
1650 if (rc)
1651 goto err_setup_tx;
1652
1653 /* allocate receive descriptors */
1654 rc = ena_setup_all_rx_resources(adapter);
1655 if (rc)
1656 goto err_setup_rx;
1657
1658 /* Create TX queues */
1659 rc = ena_create_all_io_tx_queues(adapter);
1660 if (rc)
1661 goto err_create_tx_queues;
1662
1663 /* Create RX queues */
1664 rc = ena_create_all_io_rx_queues(adapter);
1665 if (rc)
1666 goto err_create_rx_queues;
1667
1668 rc = ena_up_complete(adapter);
1669 if (rc)
1670 goto err_up;
1671
1672 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
1673 netif_carrier_on(adapter->netdev);
1674
1675 u64_stats_update_begin(&adapter->syncp);
1676 adapter->dev_stats.interface_up++;
1677 u64_stats_update_end(&adapter->syncp);
1678
1679 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1680
1681 return rc;
1682
1683 err_up:
1684 ena_destroy_all_rx_queues(adapter);
1685 err_create_rx_queues:
1686 ena_destroy_all_tx_queues(adapter);
1687 err_create_tx_queues:
1688 ena_free_all_io_rx_resources(adapter);
1689 err_setup_rx:
1690 ena_free_all_io_tx_resources(adapter);
1691 err_setup_tx:
1692 ena_free_io_irq(adapter);
1693 err_req_irq:
1694
1695 return rc;
1696 }
1697
1698 static void ena_down(struct ena_adapter *adapter)
1699 {
1700 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
1701
1702 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1703
1704 u64_stats_update_begin(&adapter->syncp);
1705 adapter->dev_stats.interface_down++;
1706 u64_stats_update_end(&adapter->syncp);
1707
1708 /* After this point the napi handler won't enable the tx queue */
1709 ena_napi_disable_all(adapter);
1710 netif_carrier_off(adapter->netdev);
1711 netif_tx_disable(adapter->netdev);
1712
1713 /* After destroy the queue there won't be any new interrupts */
1714 ena_destroy_all_io_queues(adapter);
1715
1716 ena_disable_io_intr_sync(adapter);
1717 ena_free_io_irq(adapter);
1718 ena_del_napi(adapter);
1719
1720 ena_free_all_tx_bufs(adapter);
1721 ena_free_all_rx_bufs(adapter);
1722 ena_free_all_io_tx_resources(adapter);
1723 ena_free_all_io_rx_resources(adapter);
1724 }
1725
1726 /* ena_open - Called when a network interface is made active
1727 * @netdev: network interface device structure
1728 *
1729 * Returns 0 on success, negative value on failure
1730 *
1731 * The open entry point is called when a network interface is made
1732 * active by the system (IFF_UP). At this point all resources needed
1733 * for transmit and receive operations are allocated, the interrupt
1734 * handler is registered with the OS, the watchdog timer is started,
1735 * and the stack is notified that the interface is ready.
1736 */
1737 static int ena_open(struct net_device *netdev)
1738 {
1739 struct ena_adapter *adapter = netdev_priv(netdev);
1740 int rc;
1741
1742 /* Notify the stack of the actual queue counts. */
1743 rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues);
1744 if (rc) {
1745 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
1746 return rc;
1747 }
1748
1749 rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues);
1750 if (rc) {
1751 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
1752 return rc;
1753 }
1754
1755 rc = ena_up(adapter);
1756 if (rc)
1757 return rc;
1758
1759 return rc;
1760 }
1761
1762 /* ena_close - Disables a network interface
1763 * @netdev: network interface device structure
1764 *
1765 * Returns 0, this is not allowed to fail
1766 *
1767 * The close entry point is called when an interface is de-activated
1768 * by the OS. The hardware is still under the drivers control, but
1769 * needs to be disabled. A global MAC reset is issued to stop the
1770 * hardware, and all transmit and receive resources are freed.
1771 */
1772 static int ena_close(struct net_device *netdev)
1773 {
1774 struct ena_adapter *adapter = netdev_priv(netdev);
1775
1776 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
1777
1778 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
1779 ena_down(adapter);
1780
1781 return 0;
1782 }
1783
1784 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
1785 {
1786 u32 mss = skb_shinfo(skb)->gso_size;
1787 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
1788 u8 l4_protocol = 0;
1789
1790 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
1791 ena_tx_ctx->l4_csum_enable = 1;
1792 if (mss) {
1793 ena_tx_ctx->tso_enable = 1;
1794 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
1795 ena_tx_ctx->l4_csum_partial = 0;
1796 } else {
1797 ena_tx_ctx->tso_enable = 0;
1798 ena_meta->l4_hdr_len = 0;
1799 ena_tx_ctx->l4_csum_partial = 1;
1800 }
1801
1802 switch (ip_hdr(skb)->version) {
1803 case IPVERSION:
1804 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
1805 if (ip_hdr(skb)->frag_off & htons(IP_DF))
1806 ena_tx_ctx->df = 1;
1807 if (mss)
1808 ena_tx_ctx->l3_csum_enable = 1;
1809 l4_protocol = ip_hdr(skb)->protocol;
1810 break;
1811 case 6:
1812 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
1813 l4_protocol = ipv6_hdr(skb)->nexthdr;
1814 break;
1815 default:
1816 break;
1817 }
1818
1819 if (l4_protocol == IPPROTO_TCP)
1820 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
1821 else
1822 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
1823
1824 ena_meta->mss = mss;
1825 ena_meta->l3_hdr_len = skb_network_header_len(skb);
1826 ena_meta->l3_hdr_offset = skb_network_offset(skb);
1827 ena_tx_ctx->meta_valid = 1;
1828
1829 } else {
1830 ena_tx_ctx->meta_valid = 0;
1831 }
1832 }
1833
1834 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
1835 struct sk_buff *skb)
1836 {
1837 int num_frags, header_len, rc;
1838
1839 num_frags = skb_shinfo(skb)->nr_frags;
1840 header_len = skb_headlen(skb);
1841
1842 if (num_frags < tx_ring->sgl_size)
1843 return 0;
1844
1845 if ((num_frags == tx_ring->sgl_size) &&
1846 (header_len < tx_ring->tx_max_header_size))
1847 return 0;
1848
1849 u64_stats_update_begin(&tx_ring->syncp);
1850 tx_ring->tx_stats.linearize++;
1851 u64_stats_update_end(&tx_ring->syncp);
1852
1853 rc = skb_linearize(skb);
1854 if (unlikely(rc)) {
1855 u64_stats_update_begin(&tx_ring->syncp);
1856 tx_ring->tx_stats.linearize_failed++;
1857 u64_stats_update_end(&tx_ring->syncp);
1858 }
1859
1860 return rc;
1861 }
1862
1863 /* Called with netif_tx_lock. */
1864 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
1865 {
1866 struct ena_adapter *adapter = netdev_priv(dev);
1867 struct ena_tx_buffer *tx_info;
1868 struct ena_com_tx_ctx ena_tx_ctx;
1869 struct ena_ring *tx_ring;
1870 struct netdev_queue *txq;
1871 struct ena_com_buf *ena_buf;
1872 void *push_hdr;
1873 u32 len, last_frag;
1874 u16 next_to_use;
1875 u16 req_id;
1876 u16 push_len;
1877 u16 header_len;
1878 dma_addr_t dma;
1879 int qid, rc, nb_hw_desc;
1880 int i = -1;
1881
1882 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
1883 /* Determine which tx ring we will be placed on */
1884 qid = skb_get_queue_mapping(skb);
1885 tx_ring = &adapter->tx_ring[qid];
1886 txq = netdev_get_tx_queue(dev, qid);
1887
1888 rc = ena_check_and_linearize_skb(tx_ring, skb);
1889 if (unlikely(rc))
1890 goto error_drop_packet;
1891
1892 skb_tx_timestamp(skb);
1893 len = skb_headlen(skb);
1894
1895 next_to_use = tx_ring->next_to_use;
1896 req_id = tx_ring->free_tx_ids[next_to_use];
1897 tx_info = &tx_ring->tx_buffer_info[req_id];
1898 tx_info->num_of_bufs = 0;
1899
1900 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
1901 ena_buf = tx_info->bufs;
1902 tx_info->skb = skb;
1903
1904 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
1905 /* prepared the push buffer */
1906 push_len = min_t(u32, len, tx_ring->tx_max_header_size);
1907 header_len = push_len;
1908 push_hdr = skb->data;
1909 } else {
1910 push_len = 0;
1911 header_len = min_t(u32, len, tx_ring->tx_max_header_size);
1912 push_hdr = NULL;
1913 }
1914
1915 netif_dbg(adapter, tx_queued, dev,
1916 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
1917 push_hdr, push_len);
1918
1919 if (len > push_len) {
1920 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
1921 len - push_len, DMA_TO_DEVICE);
1922 if (dma_mapping_error(tx_ring->dev, dma))
1923 goto error_report_dma_error;
1924
1925 ena_buf->paddr = dma;
1926 ena_buf->len = len - push_len;
1927
1928 ena_buf++;
1929 tx_info->num_of_bufs++;
1930 }
1931
1932 last_frag = skb_shinfo(skb)->nr_frags;
1933
1934 for (i = 0; i < last_frag; i++) {
1935 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1936
1937 len = skb_frag_size(frag);
1938 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, len,
1939 DMA_TO_DEVICE);
1940 if (dma_mapping_error(tx_ring->dev, dma))
1941 goto error_report_dma_error;
1942
1943 ena_buf->paddr = dma;
1944 ena_buf->len = len;
1945 ena_buf++;
1946 }
1947
1948 tx_info->num_of_bufs += last_frag;
1949
1950 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
1951 ena_tx_ctx.ena_bufs = tx_info->bufs;
1952 ena_tx_ctx.push_header = push_hdr;
1953 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
1954 ena_tx_ctx.req_id = req_id;
1955 ena_tx_ctx.header_len = header_len;
1956
1957 /* set flags and meta data */
1958 ena_tx_csum(&ena_tx_ctx, skb);
1959
1960 /* prepare the packet's descriptors to dma engine */
1961 rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx,
1962 &nb_hw_desc);
1963
1964 if (unlikely(rc)) {
1965 netif_err(adapter, tx_queued, dev,
1966 "failed to prepare tx bufs\n");
1967 u64_stats_update_begin(&tx_ring->syncp);
1968 tx_ring->tx_stats.queue_stop++;
1969 tx_ring->tx_stats.prepare_ctx_err++;
1970 u64_stats_update_end(&tx_ring->syncp);
1971 netif_tx_stop_queue(txq);
1972 goto error_unmap_dma;
1973 }
1974
1975 netdev_tx_sent_queue(txq, skb->len);
1976
1977 u64_stats_update_begin(&tx_ring->syncp);
1978 tx_ring->tx_stats.cnt++;
1979 tx_ring->tx_stats.bytes += skb->len;
1980 u64_stats_update_end(&tx_ring->syncp);
1981
1982 tx_info->tx_descs = nb_hw_desc;
1983 tx_info->last_jiffies = jiffies;
1984
1985 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
1986 tx_ring->ring_size);
1987
1988 /* This WMB is aimed to:
1989 * 1 - perform smp barrier before reading next_to_completion
1990 * 2 - make sure the desc were written before trigger DB
1991 */
1992 wmb();
1993
1994 /* stop the queue when no more space available, the packet can have up
1995 * to sgl_size + 2. one for the meta descriptor and one for header
1996 * (if the header is larger than tx_max_header_size).
1997 */
1998 if (unlikely(ena_com_sq_empty_space(tx_ring->ena_com_io_sq) <
1999 (tx_ring->sgl_size + 2))) {
2000 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
2001 __func__, qid);
2002
2003 netif_tx_stop_queue(txq);
2004 u64_stats_update_begin(&tx_ring->syncp);
2005 tx_ring->tx_stats.queue_stop++;
2006 u64_stats_update_end(&tx_ring->syncp);
2007
2008 /* There is a rare condition where this function decide to
2009 * stop the queue but meanwhile clean_tx_irq updates
2010 * next_to_completion and terminates.
2011 * The queue will remain stopped forever.
2012 * To solve this issue this function perform rmb, check
2013 * the wakeup condition and wake up the queue if needed.
2014 */
2015 smp_rmb();
2016
2017 if (ena_com_sq_empty_space(tx_ring->ena_com_io_sq)
2018 > ENA_TX_WAKEUP_THRESH) {
2019 netif_tx_wake_queue(txq);
2020 u64_stats_update_begin(&tx_ring->syncp);
2021 tx_ring->tx_stats.queue_wakeup++;
2022 u64_stats_update_end(&tx_ring->syncp);
2023 }
2024 }
2025
2026 if (netif_xmit_stopped(txq) || !skb->xmit_more) {
2027 /* trigger the dma engine */
2028 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2029 u64_stats_update_begin(&tx_ring->syncp);
2030 tx_ring->tx_stats.doorbells++;
2031 u64_stats_update_end(&tx_ring->syncp);
2032 }
2033
2034 return NETDEV_TX_OK;
2035
2036 error_report_dma_error:
2037 u64_stats_update_begin(&tx_ring->syncp);
2038 tx_ring->tx_stats.dma_mapping_err++;
2039 u64_stats_update_end(&tx_ring->syncp);
2040 netdev_warn(adapter->netdev, "failed to map skb\n");
2041
2042 tx_info->skb = NULL;
2043
2044 error_unmap_dma:
2045 if (i >= 0) {
2046 /* save value of frag that failed */
2047 last_frag = i;
2048
2049 /* start back at beginning and unmap skb */
2050 tx_info->skb = NULL;
2051 ena_buf = tx_info->bufs;
2052 dma_unmap_single(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
2053 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
2054
2055 /* unmap remaining mapped pages */
2056 for (i = 0; i < last_frag; i++) {
2057 ena_buf++;
2058 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
2059 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
2060 }
2061 }
2062
2063 error_drop_packet:
2064
2065 dev_kfree_skb(skb);
2066 return NETDEV_TX_OK;
2067 }
2068
2069 #ifdef CONFIG_NET_POLL_CONTROLLER
2070 static void ena_netpoll(struct net_device *netdev)
2071 {
2072 struct ena_adapter *adapter = netdev_priv(netdev);
2073 int i;
2074
2075 for (i = 0; i < adapter->num_queues; i++)
2076 napi_schedule(&adapter->ena_napi[i].napi);
2077 }
2078 #endif /* CONFIG_NET_POLL_CONTROLLER */
2079
2080 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
2081 void *accel_priv, select_queue_fallback_t fallback)
2082 {
2083 u16 qid;
2084 /* we suspect that this is good for in--kernel network services that
2085 * want to loop incoming skb rx to tx in normal user generated traffic,
2086 * most probably we will not get to this
2087 */
2088 if (skb_rx_queue_recorded(skb))
2089 qid = skb_get_rx_queue(skb);
2090 else
2091 qid = fallback(dev, skb);
2092
2093 return qid;
2094 }
2095
2096 static void ena_config_host_info(struct ena_com_dev *ena_dev)
2097 {
2098 struct ena_admin_host_info *host_info;
2099 int rc;
2100
2101 /* Allocate only the host info */
2102 rc = ena_com_allocate_host_info(ena_dev);
2103 if (rc) {
2104 pr_err("Cannot allocate host info\n");
2105 return;
2106 }
2107
2108 host_info = ena_dev->host_attr.host_info;
2109
2110 host_info->os_type = ENA_ADMIN_OS_LINUX;
2111 host_info->kernel_ver = LINUX_VERSION_CODE;
2112 strncpy(host_info->kernel_ver_str, utsname()->version,
2113 sizeof(host_info->kernel_ver_str) - 1);
2114 host_info->os_dist = 0;
2115 strncpy(host_info->os_dist_str, utsname()->release,
2116 sizeof(host_info->os_dist_str) - 1);
2117 host_info->driver_version =
2118 (DRV_MODULE_VER_MAJOR) |
2119 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2120 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
2121
2122 rc = ena_com_set_host_attributes(ena_dev);
2123 if (rc) {
2124 if (rc == -EPERM)
2125 pr_warn("Cannot set host attributes\n");
2126 else
2127 pr_err("Cannot set host attributes\n");
2128
2129 goto err;
2130 }
2131
2132 return;
2133
2134 err:
2135 ena_com_delete_host_info(ena_dev);
2136 }
2137
2138 static void ena_config_debug_area(struct ena_adapter *adapter)
2139 {
2140 u32 debug_area_size;
2141 int rc, ss_count;
2142
2143 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
2144 if (ss_count <= 0) {
2145 netif_err(adapter, drv, adapter->netdev,
2146 "SS count is negative\n");
2147 return;
2148 }
2149
2150 /* allocate 32 bytes for each string and 64bit for the value */
2151 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
2152
2153 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2154 if (rc) {
2155 pr_err("Cannot allocate debug area\n");
2156 return;
2157 }
2158
2159 rc = ena_com_set_host_attributes(adapter->ena_dev);
2160 if (rc) {
2161 if (rc == -EPERM)
2162 netif_warn(adapter, drv, adapter->netdev,
2163 "Cannot set host attributes\n");
2164 else
2165 netif_err(adapter, drv, adapter->netdev,
2166 "Cannot set host attributes\n");
2167 goto err;
2168 }
2169
2170 return;
2171 err:
2172 ena_com_delete_debug_area(adapter->ena_dev);
2173 }
2174
2175 static struct rtnl_link_stats64 *ena_get_stats64(struct net_device *netdev,
2176 struct rtnl_link_stats64 *stats)
2177 {
2178 struct ena_adapter *adapter = netdev_priv(netdev);
2179 struct ena_admin_basic_stats ena_stats;
2180 int rc;
2181
2182 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2183 return NULL;
2184
2185 rc = ena_com_get_dev_basic_stats(adapter->ena_dev, &ena_stats);
2186 if (rc)
2187 return NULL;
2188
2189 stats->tx_bytes = ((u64)ena_stats.tx_bytes_high << 32) |
2190 ena_stats.tx_bytes_low;
2191 stats->rx_bytes = ((u64)ena_stats.rx_bytes_high << 32) |
2192 ena_stats.rx_bytes_low;
2193
2194 stats->rx_packets = ((u64)ena_stats.rx_pkts_high << 32) |
2195 ena_stats.rx_pkts_low;
2196 stats->tx_packets = ((u64)ena_stats.tx_pkts_high << 32) |
2197 ena_stats.tx_pkts_low;
2198
2199 stats->rx_dropped = ((u64)ena_stats.rx_drops_high << 32) |
2200 ena_stats.rx_drops_low;
2201
2202 stats->multicast = 0;
2203 stats->collisions = 0;
2204
2205 stats->rx_length_errors = 0;
2206 stats->rx_crc_errors = 0;
2207 stats->rx_frame_errors = 0;
2208 stats->rx_fifo_errors = 0;
2209 stats->rx_missed_errors = 0;
2210 stats->tx_window_errors = 0;
2211
2212 stats->rx_errors = 0;
2213 stats->tx_errors = 0;
2214
2215 return stats;
2216 }
2217
2218 static const struct net_device_ops ena_netdev_ops = {
2219 .ndo_open = ena_open,
2220 .ndo_stop = ena_close,
2221 .ndo_start_xmit = ena_start_xmit,
2222 .ndo_select_queue = ena_select_queue,
2223 .ndo_get_stats64 = ena_get_stats64,
2224 .ndo_tx_timeout = ena_tx_timeout,
2225 .ndo_change_mtu = ena_change_mtu,
2226 .ndo_set_mac_address = NULL,
2227 .ndo_validate_addr = eth_validate_addr,
2228 #ifdef CONFIG_NET_POLL_CONTROLLER
2229 .ndo_poll_controller = ena_netpoll,
2230 #endif /* CONFIG_NET_POLL_CONTROLLER */
2231 };
2232
2233 static void ena_device_io_suspend(struct work_struct *work)
2234 {
2235 struct ena_adapter *adapter =
2236 container_of(work, struct ena_adapter, suspend_io_task);
2237 struct net_device *netdev = adapter->netdev;
2238
2239 /* ena_napi_disable_all disables only the IO handling.
2240 * We are still subject to AENQ keep alive watchdog.
2241 */
2242 u64_stats_update_begin(&adapter->syncp);
2243 adapter->dev_stats.io_suspend++;
2244 u64_stats_update_begin(&adapter->syncp);
2245 ena_napi_disable_all(adapter);
2246 netif_tx_lock(netdev);
2247 netif_device_detach(netdev);
2248 netif_tx_unlock(netdev);
2249 }
2250
2251 static void ena_device_io_resume(struct work_struct *work)
2252 {
2253 struct ena_adapter *adapter =
2254 container_of(work, struct ena_adapter, resume_io_task);
2255 struct net_device *netdev = adapter->netdev;
2256
2257 u64_stats_update_begin(&adapter->syncp);
2258 adapter->dev_stats.io_resume++;
2259 u64_stats_update_end(&adapter->syncp);
2260
2261 netif_device_attach(netdev);
2262 ena_napi_enable_all(adapter);
2263 }
2264
2265 static int ena_device_validate_params(struct ena_adapter *adapter,
2266 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2267 {
2268 struct net_device *netdev = adapter->netdev;
2269 int rc;
2270
2271 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
2272 adapter->mac_addr);
2273 if (!rc) {
2274 netif_err(adapter, drv, netdev,
2275 "Error, mac address are different\n");
2276 return -EINVAL;
2277 }
2278
2279 if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) ||
2280 (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) {
2281 netif_err(adapter, drv, netdev,
2282 "Error, device doesn't support enough queues\n");
2283 return -EINVAL;
2284 }
2285
2286 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2287 netif_err(adapter, drv, netdev,
2288 "Error, device max mtu is smaller than netdev MTU\n");
2289 return -EINVAL;
2290 }
2291
2292 return 0;
2293 }
2294
2295 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
2296 struct ena_com_dev_get_features_ctx *get_feat_ctx,
2297 bool *wd_state)
2298 {
2299 struct device *dev = &pdev->dev;
2300 bool readless_supported;
2301 u32 aenq_groups;
2302 int dma_width;
2303 int rc;
2304
2305 rc = ena_com_mmio_reg_read_request_init(ena_dev);
2306 if (rc) {
2307 dev_err(dev, "failed to init mmio read less\n");
2308 return rc;
2309 }
2310
2311 /* The PCIe configuration space revision id indicate if mmio reg
2312 * read is disabled
2313 */
2314 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
2315 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2316
2317 rc = ena_com_dev_reset(ena_dev);
2318 if (rc) {
2319 dev_err(dev, "Can not reset device\n");
2320 goto err_mmio_read_less;
2321 }
2322
2323 rc = ena_com_validate_version(ena_dev);
2324 if (rc) {
2325 dev_err(dev, "device version is too low\n");
2326 goto err_mmio_read_less;
2327 }
2328
2329 dma_width = ena_com_get_dma_width(ena_dev);
2330 if (dma_width < 0) {
2331 dev_err(dev, "Invalid dma width value %d", dma_width);
2332 rc = dma_width;
2333 goto err_mmio_read_less;
2334 }
2335
2336 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2337 if (rc) {
2338 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
2339 goto err_mmio_read_less;
2340 }
2341
2342 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2343 if (rc) {
2344 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
2345 rc);
2346 goto err_mmio_read_less;
2347 }
2348
2349 /* ENA admin level init */
2350 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true);
2351 if (rc) {
2352 dev_err(dev,
2353 "Can not initialize ena admin queue with device\n");
2354 goto err_mmio_read_less;
2355 }
2356
2357 /* To enable the msix interrupts the driver needs to know the number
2358 * of queues. So the driver uses polling mode to retrieve this
2359 * information
2360 */
2361 ena_com_set_admin_polling_mode(ena_dev, true);
2362
2363 /* Get Device Attributes*/
2364 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2365 if (rc) {
2366 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
2367 goto err_admin_init;
2368 }
2369
2370 /* Try to turn all the available aenq groups */
2371 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2372 BIT(ENA_ADMIN_FATAL_ERROR) |
2373 BIT(ENA_ADMIN_WARNING) |
2374 BIT(ENA_ADMIN_NOTIFICATION) |
2375 BIT(ENA_ADMIN_KEEP_ALIVE);
2376
2377 aenq_groups &= get_feat_ctx->aenq.supported_groups;
2378
2379 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2380 if (rc) {
2381 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
2382 goto err_admin_init;
2383 }
2384
2385 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2386
2387 ena_config_host_info(ena_dev);
2388
2389 return 0;
2390
2391 err_admin_init:
2392 ena_com_admin_destroy(ena_dev);
2393 err_mmio_read_less:
2394 ena_com_mmio_reg_read_request_destroy(ena_dev);
2395
2396 return rc;
2397 }
2398
2399 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
2400 int io_vectors)
2401 {
2402 struct ena_com_dev *ena_dev = adapter->ena_dev;
2403 struct device *dev = &adapter->pdev->dev;
2404 int rc;
2405
2406 rc = ena_enable_msix(adapter, io_vectors);
2407 if (rc) {
2408 dev_err(dev, "Can not reserve msix vectors\n");
2409 return rc;
2410 }
2411
2412 ena_setup_mgmnt_intr(adapter);
2413
2414 rc = ena_request_mgmnt_irq(adapter);
2415 if (rc) {
2416 dev_err(dev, "Can not setup management interrupts\n");
2417 goto err_disable_msix;
2418 }
2419
2420 ena_com_set_admin_polling_mode(ena_dev, false);
2421
2422 ena_com_admin_aenq_enable(ena_dev);
2423
2424 return 0;
2425
2426 err_disable_msix:
2427 ena_disable_msix(adapter);
2428
2429 return rc;
2430 }
2431
2432 static void ena_fw_reset_device(struct work_struct *work)
2433 {
2434 struct ena_com_dev_get_features_ctx get_feat_ctx;
2435 struct ena_adapter *adapter =
2436 container_of(work, struct ena_adapter, reset_task);
2437 struct net_device *netdev = adapter->netdev;
2438 struct ena_com_dev *ena_dev = adapter->ena_dev;
2439 struct pci_dev *pdev = adapter->pdev;
2440 bool dev_up, wd_state;
2441 int rc;
2442
2443 del_timer_sync(&adapter->timer_service);
2444
2445 rtnl_lock();
2446
2447 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2448 ena_com_set_admin_running_state(ena_dev, false);
2449
2450 /* After calling ena_close the tx queues and the napi
2451 * are disabled so no one can interfere or touch the
2452 * data structures
2453 */
2454 ena_close(netdev);
2455
2456 rc = ena_com_dev_reset(ena_dev);
2457 if (rc) {
2458 dev_err(&pdev->dev, "Device reset failed\n");
2459 goto err;
2460 }
2461
2462 ena_free_mgmnt_irq(adapter);
2463
2464 ena_disable_msix(adapter);
2465
2466 ena_com_abort_admin_commands(ena_dev);
2467
2468 ena_com_wait_for_abort_completion(ena_dev);
2469
2470 ena_com_admin_destroy(ena_dev);
2471
2472 ena_com_mmio_reg_read_request_destroy(ena_dev);
2473
2474 /* Finish with the destroy part. Start the init part */
2475
2476 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
2477 if (rc) {
2478 dev_err(&pdev->dev, "Can not initialize device\n");
2479 goto err;
2480 }
2481 adapter->wd_state = wd_state;
2482
2483 rc = ena_device_validate_params(adapter, &get_feat_ctx);
2484 if (rc) {
2485 dev_err(&pdev->dev, "Validation of device parameters failed\n");
2486 goto err_device_destroy;
2487 }
2488
2489 rc = ena_enable_msix_and_set_admin_interrupts(adapter,
2490 adapter->num_queues);
2491 if (rc) {
2492 dev_err(&pdev->dev, "Enable MSI-X failed\n");
2493 goto err_device_destroy;
2494 }
2495 /* If the interface was up before the reset bring it up */
2496 if (dev_up) {
2497 rc = ena_up(adapter);
2498 if (rc) {
2499 dev_err(&pdev->dev, "Failed to create I/O queues\n");
2500 goto err_disable_msix;
2501 }
2502 }
2503
2504 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
2505
2506 rtnl_unlock();
2507
2508 dev_err(&pdev->dev, "Device reset completed successfully\n");
2509
2510 return;
2511 err_disable_msix:
2512 ena_free_mgmnt_irq(adapter);
2513 ena_disable_msix(adapter);
2514 err_device_destroy:
2515 ena_com_admin_destroy(ena_dev);
2516 err:
2517 rtnl_unlock();
2518
2519 dev_err(&pdev->dev,
2520 "Reset attempt failed. Can not reset the device\n");
2521 }
2522
2523 static void check_for_missing_tx_completions(struct ena_adapter *adapter)
2524 {
2525 struct ena_tx_buffer *tx_buf;
2526 unsigned long last_jiffies;
2527 struct ena_ring *tx_ring;
2528 int i, j, budget;
2529 u32 missed_tx;
2530
2531 /* Make sure the driver doesn't turn the device in other process */
2532 smp_rmb();
2533
2534 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2535 return;
2536
2537 budget = ENA_MONITORED_TX_QUEUES;
2538
2539 for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) {
2540 tx_ring = &adapter->tx_ring[i];
2541
2542 for (j = 0; j < tx_ring->ring_size; j++) {
2543 tx_buf = &tx_ring->tx_buffer_info[j];
2544 last_jiffies = tx_buf->last_jiffies;
2545 if (unlikely(last_jiffies && time_is_before_jiffies(last_jiffies + TX_TIMEOUT))) {
2546 netif_notice(adapter, tx_err, adapter->netdev,
2547 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
2548 tx_ring->qid, j);
2549
2550 u64_stats_update_begin(&tx_ring->syncp);
2551 missed_tx = tx_ring->tx_stats.missing_tx_comp++;
2552 u64_stats_update_end(&tx_ring->syncp);
2553
2554 /* Clear last jiffies so the lost buffer won't
2555 * be counted twice.
2556 */
2557 tx_buf->last_jiffies = 0;
2558
2559 if (unlikely(missed_tx > MAX_NUM_OF_TIMEOUTED_PACKETS)) {
2560 netif_err(adapter, tx_err, adapter->netdev,
2561 "The number of lost tx completion is above the threshold (%d > %d). Reset the device\n",
2562 missed_tx, MAX_NUM_OF_TIMEOUTED_PACKETS);
2563 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2564 }
2565 }
2566 }
2567
2568 budget--;
2569 if (!budget)
2570 break;
2571 }
2572
2573 adapter->last_monitored_tx_qid = i % adapter->num_queues;
2574 }
2575
2576 /* Check for keep alive expiration */
2577 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
2578 {
2579 unsigned long keep_alive_expired;
2580
2581 if (!adapter->wd_state)
2582 return;
2583
2584 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies
2585 + ENA_DEVICE_KALIVE_TIMEOUT);
2586 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
2587 netif_err(adapter, drv, adapter->netdev,
2588 "Keep alive watchdog timeout.\n");
2589 u64_stats_update_begin(&adapter->syncp);
2590 adapter->dev_stats.wd_expired++;
2591 u64_stats_update_end(&adapter->syncp);
2592 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2593 }
2594 }
2595
2596 static void check_for_admin_com_state(struct ena_adapter *adapter)
2597 {
2598 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
2599 netif_err(adapter, drv, adapter->netdev,
2600 "ENA admin queue is not in running state!\n");
2601 u64_stats_update_begin(&adapter->syncp);
2602 adapter->dev_stats.admin_q_pause++;
2603 u64_stats_update_end(&adapter->syncp);
2604 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2605 }
2606 }
2607
2608 static void ena_update_host_info(struct ena_admin_host_info *host_info,
2609 struct net_device *netdev)
2610 {
2611 host_info->supported_network_features[0] =
2612 netdev->features & GENMASK_ULL(31, 0);
2613 host_info->supported_network_features[1] =
2614 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
2615 }
2616
2617 static void ena_timer_service(unsigned long data)
2618 {
2619 struct ena_adapter *adapter = (struct ena_adapter *)data;
2620 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
2621 struct ena_admin_host_info *host_info =
2622 adapter->ena_dev->host_attr.host_info;
2623
2624 check_for_missing_keep_alive(adapter);
2625
2626 check_for_admin_com_state(adapter);
2627
2628 check_for_missing_tx_completions(adapter);
2629
2630 if (debug_area)
2631 ena_dump_stats_to_buf(adapter, debug_area);
2632
2633 if (host_info)
2634 ena_update_host_info(host_info, adapter->netdev);
2635
2636 if (unlikely(test_and_clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2637 netif_err(adapter, drv, adapter->netdev,
2638 "Trigger reset is on\n");
2639 ena_dump_stats_to_dmesg(adapter);
2640 queue_work(ena_wq, &adapter->reset_task);
2641 return;
2642 }
2643
2644 /* Reset the timer */
2645 mod_timer(&adapter->timer_service, jiffies + HZ);
2646 }
2647
2648 static int ena_calc_io_queue_num(struct pci_dev *pdev,
2649 struct ena_com_dev *ena_dev,
2650 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2651 {
2652 int io_sq_num, io_queue_num;
2653
2654 /* In case of LLQ use the llq number in the get feature cmd */
2655 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2656 io_sq_num = get_feat_ctx->max_queues.max_llq_num;
2657
2658 if (io_sq_num == 0) {
2659 dev_err(&pdev->dev,
2660 "Trying to use LLQ but llq_num is 0. Fall back into regular queues\n");
2661
2662 ena_dev->tx_mem_queue_type =
2663 ENA_ADMIN_PLACEMENT_POLICY_HOST;
2664 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
2665 }
2666 } else {
2667 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
2668 }
2669
2670 io_queue_num = min_t(int, num_possible_cpus(), ENA_MAX_NUM_IO_QUEUES);
2671 io_queue_num = min_t(int, io_queue_num, io_sq_num);
2672 io_queue_num = min_t(int, io_queue_num,
2673 get_feat_ctx->max_queues.max_cq_num);
2674 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
2675 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
2676 if (unlikely(!io_queue_num)) {
2677 dev_err(&pdev->dev, "The device doesn't have io queues\n");
2678 return -EFAULT;
2679 }
2680
2681 return io_queue_num;
2682 }
2683
2684 static void ena_set_push_mode(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
2685 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2686 {
2687 bool has_mem_bar;
2688
2689 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
2690
2691 /* Enable push mode if device supports LLQ */
2692 if (has_mem_bar && (get_feat_ctx->max_queues.max_llq_num > 0))
2693 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV;
2694 else
2695 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2696 }
2697
2698 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
2699 struct net_device *netdev)
2700 {
2701 netdev_features_t dev_features = 0;
2702
2703 /* Set offload features */
2704 if (feat->offload.tx &
2705 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
2706 dev_features |= NETIF_F_IP_CSUM;
2707
2708 if (feat->offload.tx &
2709 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
2710 dev_features |= NETIF_F_IPV6_CSUM;
2711
2712 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
2713 dev_features |= NETIF_F_TSO;
2714
2715 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
2716 dev_features |= NETIF_F_TSO6;
2717
2718 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
2719 dev_features |= NETIF_F_TSO_ECN;
2720
2721 if (feat->offload.rx_supported &
2722 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
2723 dev_features |= NETIF_F_RXCSUM;
2724
2725 if (feat->offload.rx_supported &
2726 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
2727 dev_features |= NETIF_F_RXCSUM;
2728
2729 netdev->features =
2730 dev_features |
2731 NETIF_F_SG |
2732 NETIF_F_NTUPLE |
2733 NETIF_F_RXHASH |
2734 NETIF_F_HIGHDMA;
2735
2736 netdev->hw_features |= netdev->features;
2737 netdev->vlan_features |= netdev->features;
2738 }
2739
2740 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
2741 struct ena_com_dev_get_features_ctx *feat)
2742 {
2743 struct net_device *netdev = adapter->netdev;
2744
2745 /* Copy mac address */
2746 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
2747 eth_hw_addr_random(netdev);
2748 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
2749 } else {
2750 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
2751 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
2752 }
2753
2754 /* Set offload features */
2755 ena_set_dev_offloads(feat, netdev);
2756
2757 adapter->max_mtu = feat->dev_attr.max_mtu;
2758 }
2759
2760 static int ena_rss_init_default(struct ena_adapter *adapter)
2761 {
2762 struct ena_com_dev *ena_dev = adapter->ena_dev;
2763 struct device *dev = &adapter->pdev->dev;
2764 int rc, i;
2765 u32 val;
2766
2767 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
2768 if (unlikely(rc)) {
2769 dev_err(dev, "Cannot init indirect table\n");
2770 goto err_rss_init;
2771 }
2772
2773 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
2774 val = ethtool_rxfh_indir_default(i, adapter->num_queues);
2775 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
2776 ENA_IO_RXQ_IDX(val));
2777 if (unlikely(rc && (rc != -EPERM))) {
2778 dev_err(dev, "Cannot fill indirect table\n");
2779 goto err_fill_indir;
2780 }
2781 }
2782
2783 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
2784 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
2785 if (unlikely(rc && (rc != -EPERM))) {
2786 dev_err(dev, "Cannot fill hash function\n");
2787 goto err_fill_indir;
2788 }
2789
2790 rc = ena_com_set_default_hash_ctrl(ena_dev);
2791 if (unlikely(rc && (rc != -EPERM))) {
2792 dev_err(dev, "Cannot fill hash control\n");
2793 goto err_fill_indir;
2794 }
2795
2796 return 0;
2797
2798 err_fill_indir:
2799 ena_com_rss_destroy(ena_dev);
2800 err_rss_init:
2801
2802 return rc;
2803 }
2804
2805 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
2806 {
2807 int release_bars;
2808
2809 release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
2810 pci_release_selected_regions(pdev, release_bars);
2811 }
2812
2813 static int ena_calc_queue_size(struct pci_dev *pdev,
2814 struct ena_com_dev *ena_dev,
2815 u16 *max_tx_sgl_size,
2816 u16 *max_rx_sgl_size,
2817 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2818 {
2819 u32 queue_size = ENA_DEFAULT_RING_SIZE;
2820
2821 queue_size = min_t(u32, queue_size,
2822 get_feat_ctx->max_queues.max_cq_depth);
2823 queue_size = min_t(u32, queue_size,
2824 get_feat_ctx->max_queues.max_sq_depth);
2825
2826 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
2827 queue_size = min_t(u32, queue_size,
2828 get_feat_ctx->max_queues.max_llq_depth);
2829
2830 queue_size = rounddown_pow_of_two(queue_size);
2831
2832 if (unlikely(!queue_size)) {
2833 dev_err(&pdev->dev, "Invalid queue size\n");
2834 return -EFAULT;
2835 }
2836
2837 *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
2838 get_feat_ctx->max_queues.max_packet_tx_descs);
2839 *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
2840 get_feat_ctx->max_queues.max_packet_rx_descs);
2841
2842 return queue_size;
2843 }
2844
2845 /* ena_probe - Device Initialization Routine
2846 * @pdev: PCI device information struct
2847 * @ent: entry in ena_pci_tbl
2848 *
2849 * Returns 0 on success, negative on failure
2850 *
2851 * ena_probe initializes an adapter identified by a pci_dev structure.
2852 * The OS initialization, configuring of the adapter private structure,
2853 * and a hardware reset occur.
2854 */
2855 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2856 {
2857 struct ena_com_dev_get_features_ctx get_feat_ctx;
2858 static int version_printed;
2859 struct net_device *netdev;
2860 struct ena_adapter *adapter;
2861 struct ena_com_dev *ena_dev = NULL;
2862 static int adapters_found;
2863 int io_queue_num, bars, rc;
2864 int queue_size;
2865 u16 tx_sgl_size = 0;
2866 u16 rx_sgl_size = 0;
2867 bool wd_state;
2868
2869 dev_dbg(&pdev->dev, "%s\n", __func__);
2870
2871 if (version_printed++ == 0)
2872 dev_info(&pdev->dev, "%s", version);
2873
2874 rc = pci_enable_device_mem(pdev);
2875 if (rc) {
2876 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
2877 return rc;
2878 }
2879
2880 pci_set_master(pdev);
2881
2882 ena_dev = vzalloc(sizeof(*ena_dev));
2883 if (!ena_dev) {
2884 rc = -ENOMEM;
2885 goto err_disable_device;
2886 }
2887
2888 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
2889 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
2890 if (rc) {
2891 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
2892 rc);
2893 goto err_free_ena_dev;
2894 }
2895
2896 ena_dev->reg_bar = ioremap(pci_resource_start(pdev, ENA_REG_BAR),
2897 pci_resource_len(pdev, ENA_REG_BAR));
2898 if (!ena_dev->reg_bar) {
2899 dev_err(&pdev->dev, "failed to remap regs bar\n");
2900 rc = -EFAULT;
2901 goto err_free_region;
2902 }
2903
2904 ena_dev->dmadev = &pdev->dev;
2905
2906 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
2907 if (rc) {
2908 dev_err(&pdev->dev, "ena device init failed\n");
2909 if (rc == -ETIME)
2910 rc = -EPROBE_DEFER;
2911 goto err_free_region;
2912 }
2913
2914 ena_set_push_mode(pdev, ena_dev, &get_feat_ctx);
2915
2916 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2917 ena_dev->mem_bar = ioremap_wc(pci_resource_start(pdev, ENA_MEM_BAR),
2918 pci_resource_len(pdev, ENA_MEM_BAR));
2919 if (!ena_dev->mem_bar) {
2920 rc = -EFAULT;
2921 goto err_device_destroy;
2922 }
2923 }
2924
2925 /* initial Tx interrupt delay, Assumes 1 usec granularity.
2926 * Updated during device initialization with the real granularity
2927 */
2928 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
2929 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
2930 queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size,
2931 &rx_sgl_size, &get_feat_ctx);
2932 if ((queue_size <= 0) || (io_queue_num <= 0)) {
2933 rc = -EFAULT;
2934 goto err_device_destroy;
2935 }
2936
2937 dev_info(&pdev->dev, "creating %d io queues. queue size: %d\n",
2938 io_queue_num, queue_size);
2939
2940 /* dev zeroed in init_etherdev */
2941 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num);
2942 if (!netdev) {
2943 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
2944 rc = -ENOMEM;
2945 goto err_device_destroy;
2946 }
2947
2948 SET_NETDEV_DEV(netdev, &pdev->dev);
2949
2950 adapter = netdev_priv(netdev);
2951 pci_set_drvdata(pdev, adapter);
2952
2953 adapter->ena_dev = ena_dev;
2954 adapter->netdev = netdev;
2955 adapter->pdev = pdev;
2956
2957 ena_set_conf_feat_params(adapter, &get_feat_ctx);
2958
2959 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2960
2961 adapter->tx_ring_size = queue_size;
2962 adapter->rx_ring_size = queue_size;
2963
2964 adapter->max_tx_sgl_size = tx_sgl_size;
2965 adapter->max_rx_sgl_size = rx_sgl_size;
2966
2967 adapter->num_queues = io_queue_num;
2968 adapter->last_monitored_tx_qid = 0;
2969
2970 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
2971 adapter->wd_state = wd_state;
2972
2973 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
2974
2975 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
2976 if (rc) {
2977 dev_err(&pdev->dev,
2978 "Failed to query interrupt moderation feature\n");
2979 goto err_netdev_destroy;
2980 }
2981 ena_init_io_rings(adapter);
2982
2983 netdev->netdev_ops = &ena_netdev_ops;
2984 netdev->watchdog_timeo = TX_TIMEOUT;
2985 ena_set_ethtool_ops(netdev);
2986
2987 netdev->priv_flags |= IFF_UNICAST_FLT;
2988
2989 u64_stats_init(&adapter->syncp);
2990
2991 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
2992 if (rc) {
2993 dev_err(&pdev->dev,
2994 "Failed to enable and set the admin interrupts\n");
2995 goto err_worker_destroy;
2996 }
2997 rc = ena_rss_init_default(adapter);
2998 if (rc && (rc != -EPERM)) {
2999 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
3000 goto err_free_msix;
3001 }
3002
3003 ena_config_debug_area(adapter);
3004
3005 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
3006
3007 netif_carrier_off(netdev);
3008
3009 rc = register_netdev(netdev);
3010 if (rc) {
3011 dev_err(&pdev->dev, "Cannot register net device\n");
3012 goto err_rss;
3013 }
3014
3015 INIT_WORK(&adapter->suspend_io_task, ena_device_io_suspend);
3016 INIT_WORK(&adapter->resume_io_task, ena_device_io_resume);
3017 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
3018
3019 adapter->last_keep_alive_jiffies = jiffies;
3020
3021 init_timer(&adapter->timer_service);
3022 adapter->timer_service.expires = round_jiffies(jiffies + HZ);
3023 adapter->timer_service.function = ena_timer_service;
3024 adapter->timer_service.data = (unsigned long)adapter;
3025
3026 add_timer(&adapter->timer_service);
3027
3028 dev_info(&pdev->dev, "%s found at mem %lx, mac addr %pM Queues %d\n",
3029 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
3030 netdev->dev_addr, io_queue_num);
3031
3032 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3033
3034 adapters_found++;
3035
3036 return 0;
3037
3038 err_rss:
3039 ena_com_delete_debug_area(ena_dev);
3040 ena_com_rss_destroy(ena_dev);
3041 err_free_msix:
3042 ena_com_dev_reset(ena_dev);
3043 ena_free_mgmnt_irq(adapter);
3044 ena_disable_msix(adapter);
3045 err_worker_destroy:
3046 ena_com_destroy_interrupt_moderation(ena_dev);
3047 del_timer(&adapter->timer_service);
3048 cancel_work_sync(&adapter->suspend_io_task);
3049 cancel_work_sync(&adapter->resume_io_task);
3050 err_netdev_destroy:
3051 free_netdev(netdev);
3052 err_device_destroy:
3053 ena_com_delete_host_info(ena_dev);
3054 ena_com_admin_destroy(ena_dev);
3055 err_free_region:
3056 ena_release_bars(ena_dev, pdev);
3057 err_free_ena_dev:
3058 vfree(ena_dev);
3059 err_disable_device:
3060 pci_disable_device(pdev);
3061 return rc;
3062 }
3063
3064 /*****************************************************************************/
3065 static int ena_sriov_configure(struct pci_dev *dev, int numvfs)
3066 {
3067 int rc;
3068
3069 if (numvfs > 0) {
3070 rc = pci_enable_sriov(dev, numvfs);
3071 if (rc != 0) {
3072 dev_err(&dev->dev,
3073 "pci_enable_sriov failed to enable: %d vfs with the error: %d\n",
3074 numvfs, rc);
3075 return rc;
3076 }
3077
3078 return numvfs;
3079 }
3080
3081 if (numvfs == 0) {
3082 pci_disable_sriov(dev);
3083 return 0;
3084 }
3085
3086 return -EINVAL;
3087 }
3088
3089 /*****************************************************************************/
3090 /*****************************************************************************/
3091
3092 /* ena_remove - Device Removal Routine
3093 * @pdev: PCI device information struct
3094 *
3095 * ena_remove is called by the PCI subsystem to alert the driver
3096 * that it should release a PCI device.
3097 */
3098 static void ena_remove(struct pci_dev *pdev)
3099 {
3100 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3101 struct ena_com_dev *ena_dev;
3102 struct net_device *netdev;
3103
3104 if (!adapter)
3105 /* This device didn't load properly and it's resources
3106 * already released, nothing to do
3107 */
3108 return;
3109
3110 ena_dev = adapter->ena_dev;
3111 netdev = adapter->netdev;
3112
3113 #ifdef CONFIG_RFS_ACCEL
3114 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
3115 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
3116 netdev->rx_cpu_rmap = NULL;
3117 }
3118 #endif /* CONFIG_RFS_ACCEL */
3119
3120 unregister_netdev(netdev);
3121 del_timer_sync(&adapter->timer_service);
3122
3123 cancel_work_sync(&adapter->reset_task);
3124
3125 cancel_work_sync(&adapter->suspend_io_task);
3126
3127 cancel_work_sync(&adapter->resume_io_task);
3128
3129 ena_com_dev_reset(ena_dev);
3130
3131 ena_free_mgmnt_irq(adapter);
3132
3133 ena_disable_msix(adapter);
3134
3135 free_netdev(netdev);
3136
3137 ena_com_mmio_reg_read_request_destroy(ena_dev);
3138
3139 ena_com_abort_admin_commands(ena_dev);
3140
3141 ena_com_wait_for_abort_completion(ena_dev);
3142
3143 ena_com_admin_destroy(ena_dev);
3144
3145 ena_com_rss_destroy(ena_dev);
3146
3147 ena_com_delete_debug_area(ena_dev);
3148
3149 ena_com_delete_host_info(ena_dev);
3150
3151 ena_release_bars(ena_dev, pdev);
3152
3153 pci_disable_device(pdev);
3154
3155 ena_com_destroy_interrupt_moderation(ena_dev);
3156
3157 vfree(ena_dev);
3158 }
3159
3160 static struct pci_driver ena_pci_driver = {
3161 .name = DRV_MODULE_NAME,
3162 .id_table = ena_pci_tbl,
3163 .probe = ena_probe,
3164 .remove = ena_remove,
3165 .sriov_configure = ena_sriov_configure,
3166 };
3167
3168 static int __init ena_init(void)
3169 {
3170 pr_info("%s", version);
3171
3172 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
3173 if (!ena_wq) {
3174 pr_err("Failed to create workqueue\n");
3175 return -ENOMEM;
3176 }
3177
3178 return pci_register_driver(&ena_pci_driver);
3179 }
3180
3181 static void __exit ena_cleanup(void)
3182 {
3183 pci_unregister_driver(&ena_pci_driver);
3184
3185 if (ena_wq) {
3186 destroy_workqueue(ena_wq);
3187 ena_wq = NULL;
3188 }
3189 }
3190
3191 /******************************************************************************
3192 ******************************** AENQ Handlers *******************************
3193 *****************************************************************************/
3194 /* ena_update_on_link_change:
3195 * Notify the network interface about the change in link status
3196 */
3197 static void ena_update_on_link_change(void *adapter_data,
3198 struct ena_admin_aenq_entry *aenq_e)
3199 {
3200 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3201 struct ena_admin_aenq_link_change_desc *aenq_desc =
3202 (struct ena_admin_aenq_link_change_desc *)aenq_e;
3203 int status = aenq_desc->flags &
3204 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3205
3206 if (status) {
3207 netdev_dbg(adapter->netdev, "%s\n", __func__);
3208 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3209 netif_carrier_on(adapter->netdev);
3210 } else {
3211 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3212 netif_carrier_off(adapter->netdev);
3213 }
3214 }
3215
3216 static void ena_keep_alive_wd(void *adapter_data,
3217 struct ena_admin_aenq_entry *aenq_e)
3218 {
3219 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3220
3221 adapter->last_keep_alive_jiffies = jiffies;
3222 }
3223
3224 static void ena_notification(void *adapter_data,
3225 struct ena_admin_aenq_entry *aenq_e)
3226 {
3227 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3228
3229 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3230 "Invalid group(%x) expected %x\n",
3231 aenq_e->aenq_common_desc.group,
3232 ENA_ADMIN_NOTIFICATION);
3233
3234 switch (aenq_e->aenq_common_desc.syndrom) {
3235 case ENA_ADMIN_SUSPEND:
3236 /* Suspend just the IO queues.
3237 * We deliberately don't suspend admin so the timer and
3238 * the keep_alive events should remain.
3239 */
3240 queue_work(ena_wq, &adapter->suspend_io_task);
3241 break;
3242 case ENA_ADMIN_RESUME:
3243 queue_work(ena_wq, &adapter->resume_io_task);
3244 break;
3245 default:
3246 netif_err(adapter, drv, adapter->netdev,
3247 "Invalid aenq notification link state %d\n",
3248 aenq_e->aenq_common_desc.syndrom);
3249 }
3250 }
3251
3252 /* This handler will called for unknown event group or unimplemented handlers*/
3253 static void unimplemented_aenq_handler(void *data,
3254 struct ena_admin_aenq_entry *aenq_e)
3255 {
3256 struct ena_adapter *adapter = (struct ena_adapter *)data;
3257
3258 netif_err(adapter, drv, adapter->netdev,
3259 "Unknown event was received or event with unimplemented handler\n");
3260 }
3261
3262 static struct ena_aenq_handlers aenq_handlers = {
3263 .handlers = {
3264 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3265 [ENA_ADMIN_NOTIFICATION] = ena_notification,
3266 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3267 },
3268 .unimplemented_handler = unimplemented_aenq_handler
3269 };
3270
3271 module_init(ena_init);
3272 module_exit(ena_cleanup);
Linux kernel - Deliverables
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