drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h

   1 /*
   2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
   3  *
   4  * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34
  35 #ifndef __CXGB4_OFLD_H
  36 #define __CXGB4_OFLD_H
  37
  38 #include <linux/cache.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/skbuff.h>
  41 #include <linux/inetdevice.h>
  42 #include <linux/atomic.h>
  43 #include "cxgb4.h"
  44
  45 /* CPL message priority levels */
  46 enum {
  47         CPL_PRIORITY_DATA     = 0,  /* data messages */
  48         CPL_PRIORITY_SETUP    = 1,  /* connection setup messages */
  49         CPL_PRIORITY_TEARDOWN = 0,  /* connection teardown messages */
  50         CPL_PRIORITY_LISTEN   = 1,  /* listen start/stop messages */
  51         CPL_PRIORITY_ACK      = 1,  /* RX ACK messages */
  52         CPL_PRIORITY_CONTROL  = 1   /* control messages */
  53 };
  54
  55 #define INIT_TP_WR(w, tid) do { \
  56         (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
  57                               FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
  58         (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
  59                                FW_WR_FLOWID_V(tid)); \
  60         (w)->wr.wr_lo = cpu_to_be64(0); \
  61 } while (0)
  62
  63 #define INIT_TP_WR_CPL(w, cpl, tid) do { \
  64         INIT_TP_WR(w, tid); \
  65         OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
  66 } while (0)
  67
  68 #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
  69         (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
  70                               FW_WR_ATOMIC_V(atomic)); \
  71         (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
  72                                FW_WR_FLOWID_V(tid)); \
  73         (w)->wr.wr_lo = cpu_to_be64(0); \
  74 } while (0)
  75
  76 /* Special asynchronous notification message */
  77 #define CXGB4_MSG_AN ((void *)1)
  78
  79 struct serv_entry {
  80         void *data;
  81 };
  82
  83 union aopen_entry {
  84         void *data;
  85         union aopen_entry *next;
  86 };
  87
  88 /*
  89  * Holds the size, base address, free list start, etc of the TID, server TID,
  90  * and active-open TID tables.  The tables themselves are allocated dynamically.
  91  */
  92 struct tid_info {
  93         void **tid_tab;
  94         unsigned int ntids;
  95
  96         struct serv_entry *stid_tab;
  97         unsigned long *stid_bmap;
  98         unsigned int nstids;
  99         unsigned int stid_base;
 100         unsigned int hash_base;
 101
 102         union aopen_entry *atid_tab;
 103         unsigned int natids;
 104         unsigned int atid_base;
 105
 106         struct filter_entry *ftid_tab;
 107         unsigned int nftids;
 108         unsigned int ftid_base;
 109         unsigned int aftid_base;
 110         unsigned int aftid_end;
 111         /* Server filter region */
 112         unsigned int sftid_base;
 113         unsigned int nsftids;
 114
 115         spinlock_t atid_lock ____cacheline_aligned_in_smp;
 116         union aopen_entry *afree;
 117         unsigned int atids_in_use;
 118
 119         spinlock_t stid_lock;
 120         unsigned int stids_in_use;
 121         unsigned int sftids_in_use;
 122
 123         /* TIDs in the TCAM */
 124         atomic_t tids_in_use;
 125         /* TIDs in the HASH */
 126         atomic_t hash_tids_in_use;
 127 };
 128
 129 static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
 130 {
 131         return tid < t->ntids ? t->tid_tab[tid] : NULL;
 132 }
 133
 134 static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
 135 {
 136         return atid < t->natids ? t->atid_tab[atid].data : NULL;
 137 }
 138
 139 static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
 140 {
 141         /* Is it a server filter TID? */
 142         if (t->nsftids && (stid >= t->sftid_base)) {
 143                 stid -= t->sftid_base;
 144                 stid += t->nstids;
 145         } else {
 146                 stid -= t->stid_base;
 147         }
 148
 149         return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL;
 150 }
 151
 152 static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
 153                                     unsigned int tid)
 154 {
 155         t->tid_tab[tid] = data;
 156         if (t->hash_base && (tid >= t->hash_base))
 157                 atomic_inc(&t->hash_tids_in_use);
 158         else
 159                 atomic_inc(&t->tids_in_use);
 160 }
 161
 162 int cxgb4_alloc_atid(struct tid_info *t, void *data);
 163 int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
 164 int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data);
 165 void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
 166 void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
 167 void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid);
 168
 169 struct in6_addr;
 170
 171 int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
 172                         __be32 sip, __be16 sport, __be16 vlan,
 173                         unsigned int queue);
 174 int cxgb4_create_server6(const struct net_device *dev, unsigned int stid,
 175                          const struct in6_addr *sip, __be16 sport,
 176                          unsigned int queue);
 177 int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
 178                         unsigned int queue, bool ipv6);
 179 int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
 180                                __be32 sip, __be16 sport, __be16 vlan,
 181                                unsigned int queue,
 182                                unsigned char port, unsigned char mask);
 183 int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid,
 184                                unsigned int queue, bool ipv6);
 185
 186 static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
 187 {
 188         skb_set_queue_mapping(skb, (queue << 1) | prio);
 189 }
 190
 191 enum cxgb4_uld {
 192         CXGB4_ULD_RDMA,
 193         CXGB4_ULD_ISCSI,
 194         CXGB4_ULD_ISCSIT,
 195         CXGB4_ULD_MAX
 196 };
 197
 198 enum cxgb4_state {
 199         CXGB4_STATE_UP,
 200         CXGB4_STATE_START_RECOVERY,
 201         CXGB4_STATE_DOWN,
 202         CXGB4_STATE_DETACH
 203 };
 204
 205 enum cxgb4_control {
 206         CXGB4_CONTROL_DB_FULL,
 207         CXGB4_CONTROL_DB_EMPTY,
 208         CXGB4_CONTROL_DB_DROP,
 209 };
 210
 211 struct pci_dev;
 212 struct l2t_data;
 213 struct net_device;
 214 struct pkt_gl;
 215 struct tp_tcp_stats;
 216 struct t4_lro_mgr;
 217
 218 struct cxgb4_range {
 219         unsigned int start;
 220         unsigned int size;
 221 };
 222
 223 struct cxgb4_virt_res {                      /* virtualized HW resources */
 224         struct cxgb4_range ddp;
 225         struct cxgb4_range iscsi;
 226         struct cxgb4_range stag;
 227         struct cxgb4_range rq;
 228         struct cxgb4_range pbl;
 229         struct cxgb4_range qp;
 230         struct cxgb4_range cq;
 231         struct cxgb4_range ocq;
 232 };
 233
 234 #define OCQ_WIN_OFFSET(pdev, vres) \
 235         (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
 236
 237 /*
 238  * Block of information the LLD provides to ULDs attaching to a device.
 239  */
 240 struct cxgb4_lld_info {
 241         struct pci_dev *pdev;                /* associated PCI device */
 242         struct l2t_data *l2t;                /* L2 table */
 243         struct tid_info *tids;               /* TID table */
 244         struct net_device **ports;           /* device ports */
 245         const struct cxgb4_virt_res *vr;     /* assorted HW resources */
 246         const unsigned short *mtus;          /* MTU table */
 247         const unsigned short *rxq_ids;       /* the ULD's Rx queue ids */
 248         const unsigned short *ciq_ids;       /* the ULD's concentrator IQ ids */
 249         unsigned short nrxq;                 /* # of Rx queues */
 250         unsigned short ntxq;                 /* # of Tx queues */
 251         unsigned short nciq;                 /* # of concentrator IQ */
 252         unsigned char nchan:4;               /* # of channels */
 253         unsigned char nports:4;              /* # of ports */
 254         unsigned char wr_cred;               /* WR 16-byte credits */
 255         unsigned char adapter_type;          /* type of adapter */
 256         unsigned char fw_api_ver;            /* FW API version */
 257         unsigned int fw_vers;                /* FW version */
 258         unsigned int iscsi_iolen;            /* iSCSI max I/O length */
 259         unsigned int cclk_ps;                /* Core clock period in psec */
 260         unsigned short udb_density;          /* # of user DB/page */
 261         unsigned short ucq_density;          /* # of user CQs/page */
 262         unsigned short filt_mode;            /* filter optional components */
 263         unsigned short tx_modq[NCHAN];       /* maps each tx channel to a */
 264                                              /* scheduler queue */
 265         void __iomem *gts_reg;               /* address of GTS register */
 266         void __iomem *db_reg;                /* address of kernel doorbell */
 267         int dbfifo_int_thresh;               /* doorbell fifo int threshold */
 268         unsigned int sge_ingpadboundary;     /* SGE ingress padding boundary */
 269         unsigned int sge_egrstatuspagesize;  /* SGE egress status page size */
 270         unsigned int sge_pktshift;           /* Padding between CPL and */
 271                                              /* packet data */
 272         unsigned int pf;                     /* Physical Function we're using */
 273         bool enable_fw_ofld_conn;            /* Enable connection through fw */
 274                                              /* WR */
 275         unsigned int max_ordird_qp;          /* Max ORD/IRD depth per RDMA QP */
 276         unsigned int max_ird_adapter;        /* Max IRD memory per adapter */
 277         bool ulptx_memwrite_dsgl;            /* use of T5 DSGL allowed */
 278         unsigned int iscsi_tagmask;          /* iscsi ddp tag mask */
 279         unsigned int iscsi_pgsz_order;       /* iscsi ddp page size orders */
 280         unsigned int iscsi_llimit;           /* chip's iscsi region llimit */
 281         void **iscsi_ppm;                    /* iscsi page pod manager */
 282         int nodeid;                          /* device numa node id */
 283 };
 284
 285 struct cxgb4_uld_info {
 286         const char *name;
 287         void *(*add)(const struct cxgb4_lld_info *p);
 288         int (*rx_handler)(void *handle, const __be64 *rsp,
 289                           const struct pkt_gl *gl);
 290         int (*state_change)(void *handle, enum cxgb4_state new_state);
 291         int (*control)(void *handle, enum cxgb4_control control, ...);
 292         int (*lro_rx_handler)(void *handle, const __be64 *rsp,
 293                               const struct pkt_gl *gl,
 294                               struct t4_lro_mgr *lro_mgr,
 295                               struct napi_struct *napi);
 296         void (*lro_flush)(struct t4_lro_mgr *);
 297 };
 298
 299 int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
 300 int cxgb4_unregister_uld(enum cxgb4_uld type);
 301 int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
 302 unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
 303 unsigned int cxgb4_port_chan(const struct net_device *dev);
 304 unsigned int cxgb4_port_viid(const struct net_device *dev);
 305 unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid);
 306 unsigned int cxgb4_port_idx(const struct net_device *dev);
 307 unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
 308                             unsigned int *idx);
 309 unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus,
 310                                     unsigned short header_size,
 311                                     unsigned short data_size_max,
 312                                     unsigned short data_size_align,
 313                                     unsigned int *mtu_idxp);
 314 void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
 315                          struct tp_tcp_stats *v6);
 316 void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
 317                       const unsigned int *pgsz_order);
 318 struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
 319                                    unsigned int skb_len, unsigned int pull_len);
 320 int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
 321 int cxgb4_flush_eq_cache(struct net_device *dev);
 322 int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte);
 323 u64 cxgb4_read_sge_timestamp(struct net_device *dev);
 324
 325 enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS };
 326 int cxgb4_bar2_sge_qregs(struct net_device *dev,
 327                          unsigned int qid,
 328                          enum cxgb4_bar2_qtype qtype,
 329                          int user,
 330                          u64 *pbar2_qoffset,
 331                          unsigned int *pbar2_qid);
 332
 333 #endif  /* !__CXGB4_OFLD_H */