Merge branches 'acpi-soc', 'acpi-misc', 'acpi-pci' and 'device-properties'
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include "en.h"
34
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36 struct ethtool_drvinfo *drvinfo)
37 {
38 struct mlx5e_priv *priv = netdev_priv(dev);
39 struct mlx5_core_dev *mdev = priv->mdev;
40
41 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42 strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43 sizeof(drvinfo->version));
44 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45 "%d.%d.%d",
46 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48 sizeof(drvinfo->bus_info));
49 }
50
51 static const struct {
52 u32 supported;
53 u32 advertised;
54 u32 speed;
55 } ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER] = {
56 [MLX5E_1000BASE_CX_SGMII] = {
57 .supported = SUPPORTED_1000baseKX_Full,
58 .advertised = ADVERTISED_1000baseKX_Full,
59 .speed = 1000,
60 },
61 [MLX5E_1000BASE_KX] = {
62 .supported = SUPPORTED_1000baseKX_Full,
63 .advertised = ADVERTISED_1000baseKX_Full,
64 .speed = 1000,
65 },
66 [MLX5E_10GBASE_CX4] = {
67 .supported = SUPPORTED_10000baseKX4_Full,
68 .advertised = ADVERTISED_10000baseKX4_Full,
69 .speed = 10000,
70 },
71 [MLX5E_10GBASE_KX4] = {
72 .supported = SUPPORTED_10000baseKX4_Full,
73 .advertised = ADVERTISED_10000baseKX4_Full,
74 .speed = 10000,
75 },
76 [MLX5E_10GBASE_KR] = {
77 .supported = SUPPORTED_10000baseKR_Full,
78 .advertised = ADVERTISED_10000baseKR_Full,
79 .speed = 10000,
80 },
81 [MLX5E_20GBASE_KR2] = {
82 .supported = SUPPORTED_20000baseKR2_Full,
83 .advertised = ADVERTISED_20000baseKR2_Full,
84 .speed = 20000,
85 },
86 [MLX5E_40GBASE_CR4] = {
87 .supported = SUPPORTED_40000baseCR4_Full,
88 .advertised = ADVERTISED_40000baseCR4_Full,
89 .speed = 40000,
90 },
91 [MLX5E_40GBASE_KR4] = {
92 .supported = SUPPORTED_40000baseKR4_Full,
93 .advertised = ADVERTISED_40000baseKR4_Full,
94 .speed = 40000,
95 },
96 [MLX5E_56GBASE_R4] = {
97 .supported = SUPPORTED_56000baseKR4_Full,
98 .advertised = ADVERTISED_56000baseKR4_Full,
99 .speed = 56000,
100 },
101 [MLX5E_10GBASE_CR] = {
102 .supported = SUPPORTED_10000baseKR_Full,
103 .advertised = ADVERTISED_10000baseKR_Full,
104 .speed = 10000,
105 },
106 [MLX5E_10GBASE_SR] = {
107 .supported = SUPPORTED_10000baseKR_Full,
108 .advertised = ADVERTISED_10000baseKR_Full,
109 .speed = 10000,
110 },
111 [MLX5E_10GBASE_ER] = {
112 .supported = SUPPORTED_10000baseKR_Full,
113 .advertised = ADVERTISED_10000baseKR_Full,
114 .speed = 10000,
115 },
116 [MLX5E_40GBASE_SR4] = {
117 .supported = SUPPORTED_40000baseSR4_Full,
118 .advertised = ADVERTISED_40000baseSR4_Full,
119 .speed = 40000,
120 },
121 [MLX5E_40GBASE_LR4] = {
122 .supported = SUPPORTED_40000baseLR4_Full,
123 .advertised = ADVERTISED_40000baseLR4_Full,
124 .speed = 40000,
125 },
126 [MLX5E_100GBASE_CR4] = {
127 .speed = 100000,
128 },
129 [MLX5E_100GBASE_SR4] = {
130 .speed = 100000,
131 },
132 [MLX5E_100GBASE_KR4] = {
133 .speed = 100000,
134 },
135 [MLX5E_100GBASE_LR4] = {
136 .speed = 100000,
137 },
138 [MLX5E_100BASE_TX] = {
139 .speed = 100,
140 },
141 [MLX5E_100BASE_T] = {
142 .supported = SUPPORTED_100baseT_Full,
143 .advertised = ADVERTISED_100baseT_Full,
144 .speed = 100,
145 },
146 [MLX5E_10GBASE_T] = {
147 .supported = SUPPORTED_10000baseT_Full,
148 .advertised = ADVERTISED_10000baseT_Full,
149 .speed = 1000,
150 },
151 [MLX5E_25GBASE_CR] = {
152 .speed = 25000,
153 },
154 [MLX5E_25GBASE_KR] = {
155 .speed = 25000,
156 },
157 [MLX5E_25GBASE_SR] = {
158 .speed = 25000,
159 },
160 [MLX5E_50GBASE_CR2] = {
161 .speed = 50000,
162 },
163 [MLX5E_50GBASE_KR2] = {
164 .speed = 50000,
165 },
166 };
167
168 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
169 {
170 struct mlx5e_priv *priv = netdev_priv(dev);
171
172 switch (sset) {
173 case ETH_SS_STATS:
174 return NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
175 priv->params.num_channels * NUM_RQ_STATS +
176 priv->params.num_channels * priv->params.num_tc *
177 NUM_SQ_STATS;
178 /* fallthrough */
179 default:
180 return -EOPNOTSUPP;
181 }
182 }
183
184 static void mlx5e_get_strings(struct net_device *dev,
185 uint32_t stringset, uint8_t *data)
186 {
187 int i, j, tc, idx = 0;
188 struct mlx5e_priv *priv = netdev_priv(dev);
189
190 switch (stringset) {
191 case ETH_SS_PRIV_FLAGS:
192 break;
193
194 case ETH_SS_TEST:
195 break;
196
197 case ETH_SS_STATS:
198 /* VPORT counters */
199 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
200 strcpy(data + (idx++) * ETH_GSTRING_LEN,
201 vport_strings[i]);
202
203 /* PPORT counters */
204 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
205 strcpy(data + (idx++) * ETH_GSTRING_LEN,
206 pport_strings[i]);
207
208 /* per channel counters */
209 for (i = 0; i < priv->params.num_channels; i++)
210 for (j = 0; j < NUM_RQ_STATS; j++)
211 sprintf(data + (idx++) * ETH_GSTRING_LEN,
212 "rx%d_%s", i, rq_stats_strings[j]);
213
214 for (i = 0; i < priv->params.num_channels; i++)
215 for (tc = 0; tc < priv->params.num_tc; tc++)
216 for (j = 0; j < NUM_SQ_STATS; j++)
217 sprintf(data +
218 (idx++) * ETH_GSTRING_LEN,
219 "tx%d_%d_%s", i, tc,
220 sq_stats_strings[j]);
221 break;
222 }
223 }
224
225 static void mlx5e_get_ethtool_stats(struct net_device *dev,
226 struct ethtool_stats *stats, u64 *data)
227 {
228 struct mlx5e_priv *priv = netdev_priv(dev);
229 int i, j, tc, idx = 0;
230
231 if (!data)
232 return;
233
234 mutex_lock(&priv->state_lock);
235 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
236 mlx5e_update_stats(priv);
237 mutex_unlock(&priv->state_lock);
238
239 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
240 data[idx++] = ((u64 *)&priv->stats.vport)[i];
241
242 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
243 data[idx++] = be64_to_cpu(((__be64 *)&priv->stats.pport)[i]);
244
245 /* per channel counters */
246 for (i = 0; i < priv->params.num_channels; i++)
247 for (j = 0; j < NUM_RQ_STATS; j++)
248 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
249 &priv->state) ? 0 :
250 ((u64 *)&priv->channel[i]->rq.stats)[j];
251
252 for (i = 0; i < priv->params.num_channels; i++)
253 for (tc = 0; tc < priv->params.num_tc; tc++)
254 for (j = 0; j < NUM_SQ_STATS; j++)
255 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
256 &priv->state) ? 0 :
257 ((u64 *)&priv->channel[i]->sq[tc].stats)[j];
258 }
259
260 static void mlx5e_get_ringparam(struct net_device *dev,
261 struct ethtool_ringparam *param)
262 {
263 struct mlx5e_priv *priv = netdev_priv(dev);
264
265 param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
266 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
267 param->rx_pending = 1 << priv->params.log_rq_size;
268 param->tx_pending = 1 << priv->params.log_sq_size;
269 }
270
271 static int mlx5e_set_ringparam(struct net_device *dev,
272 struct ethtool_ringparam *param)
273 {
274 struct mlx5e_priv *priv = netdev_priv(dev);
275 bool was_opened;
276 u16 min_rx_wqes;
277 u8 log_rq_size;
278 u8 log_sq_size;
279 int err = 0;
280
281 if (param->rx_jumbo_pending) {
282 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
283 __func__);
284 return -EINVAL;
285 }
286 if (param->rx_mini_pending) {
287 netdev_info(dev, "%s: rx_mini_pending not supported\n",
288 __func__);
289 return -EINVAL;
290 }
291 if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
292 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
293 __func__, param->rx_pending,
294 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
295 return -EINVAL;
296 }
297 if (param->rx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE)) {
298 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
299 __func__, param->rx_pending,
300 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE);
301 return -EINVAL;
302 }
303 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
304 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
305 __func__, param->tx_pending,
306 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
307 return -EINVAL;
308 }
309 if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
310 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
311 __func__, param->tx_pending,
312 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
313 return -EINVAL;
314 }
315
316 log_rq_size = order_base_2(param->rx_pending);
317 log_sq_size = order_base_2(param->tx_pending);
318 min_rx_wqes = min_t(u16, param->rx_pending - 1,
319 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES);
320
321 if (log_rq_size == priv->params.log_rq_size &&
322 log_sq_size == priv->params.log_sq_size &&
323 min_rx_wqes == priv->params.min_rx_wqes)
324 return 0;
325
326 mutex_lock(&priv->state_lock);
327
328 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
329 if (was_opened)
330 mlx5e_close_locked(dev);
331
332 priv->params.log_rq_size = log_rq_size;
333 priv->params.log_sq_size = log_sq_size;
334 priv->params.min_rx_wqes = min_rx_wqes;
335
336 if (was_opened)
337 err = mlx5e_open_locked(dev);
338
339 mutex_unlock(&priv->state_lock);
340
341 return err;
342 }
343
344 static void mlx5e_get_channels(struct net_device *dev,
345 struct ethtool_channels *ch)
346 {
347 struct mlx5e_priv *priv = netdev_priv(dev);
348
349 ch->max_combined = mlx5e_get_max_num_channels(priv->mdev);
350 ch->combined_count = priv->params.num_channels;
351 }
352
353 static int mlx5e_set_channels(struct net_device *dev,
354 struct ethtool_channels *ch)
355 {
356 struct mlx5e_priv *priv = netdev_priv(dev);
357 int ncv = mlx5e_get_max_num_channels(priv->mdev);
358 unsigned int count = ch->combined_count;
359 bool was_opened;
360 int err = 0;
361
362 if (!count) {
363 netdev_info(dev, "%s: combined_count=0 not supported\n",
364 __func__);
365 return -EINVAL;
366 }
367 if (ch->rx_count || ch->tx_count) {
368 netdev_info(dev, "%s: separate rx/tx count not supported\n",
369 __func__);
370 return -EINVAL;
371 }
372 if (count > ncv) {
373 netdev_info(dev, "%s: count (%d) > max (%d)\n",
374 __func__, count, ncv);
375 return -EINVAL;
376 }
377
378 if (priv->params.num_channels == count)
379 return 0;
380
381 mutex_lock(&priv->state_lock);
382
383 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
384 if (was_opened)
385 mlx5e_close_locked(dev);
386
387 priv->params.num_channels = count;
388 mlx5e_build_default_indir_rqt(priv->params.indirection_rqt,
389 MLX5E_INDIR_RQT_SIZE, count);
390
391 if (was_opened)
392 err = mlx5e_open_locked(dev);
393
394 mutex_unlock(&priv->state_lock);
395
396 return err;
397 }
398
399 static int mlx5e_get_coalesce(struct net_device *netdev,
400 struct ethtool_coalesce *coal)
401 {
402 struct mlx5e_priv *priv = netdev_priv(netdev);
403
404 coal->rx_coalesce_usecs = priv->params.rx_cq_moderation_usec;
405 coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation_pkts;
406 coal->tx_coalesce_usecs = priv->params.tx_cq_moderation_usec;
407 coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation_pkts;
408
409 return 0;
410 }
411
412 static int mlx5e_set_coalesce(struct net_device *netdev,
413 struct ethtool_coalesce *coal)
414 {
415 struct mlx5e_priv *priv = netdev_priv(netdev);
416 struct mlx5_core_dev *mdev = priv->mdev;
417 struct mlx5e_channel *c;
418 int tc;
419 int i;
420
421 priv->params.tx_cq_moderation_usec = coal->tx_coalesce_usecs;
422 priv->params.tx_cq_moderation_pkts = coal->tx_max_coalesced_frames;
423 priv->params.rx_cq_moderation_usec = coal->rx_coalesce_usecs;
424 priv->params.rx_cq_moderation_pkts = coal->rx_max_coalesced_frames;
425
426 for (i = 0; i < priv->params.num_channels; ++i) {
427 c = priv->channel[i];
428
429 for (tc = 0; tc < c->num_tc; tc++) {
430 mlx5_core_modify_cq_moderation(mdev,
431 &c->sq[tc].cq.mcq,
432 coal->tx_coalesce_usecs,
433 coal->tx_max_coalesced_frames);
434 }
435
436 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
437 coal->rx_coalesce_usecs,
438 coal->rx_max_coalesced_frames);
439 }
440
441 return 0;
442 }
443
444 static u32 ptys2ethtool_supported_link(u32 eth_proto_cap)
445 {
446 int i;
447 u32 supported_modes = 0;
448
449 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
450 if (eth_proto_cap & MLX5E_PROT_MASK(i))
451 supported_modes |= ptys2ethtool_table[i].supported;
452 }
453 return supported_modes;
454 }
455
456 static u32 ptys2ethtool_adver_link(u32 eth_proto_cap)
457 {
458 int i;
459 u32 advertising_modes = 0;
460
461 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
462 if (eth_proto_cap & MLX5E_PROT_MASK(i))
463 advertising_modes |= ptys2ethtool_table[i].advertised;
464 }
465 return advertising_modes;
466 }
467
468 static u32 ptys2ethtool_supported_port(u32 eth_proto_cap)
469 {
470 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
471 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
472 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
473 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
474 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
475 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
476 return SUPPORTED_FIBRE;
477 }
478
479 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
480 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
481 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
482 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
483 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
484 return SUPPORTED_Backplane;
485 }
486 return 0;
487 }
488
489 static void get_speed_duplex(struct net_device *netdev,
490 u32 eth_proto_oper,
491 struct ethtool_cmd *cmd)
492 {
493 int i;
494 u32 speed = SPEED_UNKNOWN;
495 u8 duplex = DUPLEX_UNKNOWN;
496
497 if (!netif_carrier_ok(netdev))
498 goto out;
499
500 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
501 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
502 speed = ptys2ethtool_table[i].speed;
503 duplex = DUPLEX_FULL;
504 break;
505 }
506 }
507 out:
508 ethtool_cmd_speed_set(cmd, speed);
509 cmd->duplex = duplex;
510 }
511
512 static void get_supported(u32 eth_proto_cap, u32 *supported)
513 {
514 *supported |= ptys2ethtool_supported_port(eth_proto_cap);
515 *supported |= ptys2ethtool_supported_link(eth_proto_cap);
516 *supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
517 }
518
519 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
520 u8 rx_pause, u32 *advertising)
521 {
522 *advertising |= ptys2ethtool_adver_link(eth_proto_cap);
523 *advertising |= tx_pause ? ADVERTISED_Pause : 0;
524 *advertising |= (tx_pause ^ rx_pause) ? ADVERTISED_Asym_Pause : 0;
525 }
526
527 static u8 get_connector_port(u32 eth_proto)
528 {
529 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
530 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
531 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
532 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
533 return PORT_FIBRE;
534 }
535
536 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
537 | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
538 | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
539 return PORT_DA;
540 }
541
542 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
543 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
544 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
545 | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
546 return PORT_NONE;
547 }
548
549 return PORT_OTHER;
550 }
551
552 static void get_lp_advertising(u32 eth_proto_lp, u32 *lp_advertising)
553 {
554 *lp_advertising = ptys2ethtool_adver_link(eth_proto_lp);
555 }
556
557 static int mlx5e_get_settings(struct net_device *netdev,
558 struct ethtool_cmd *cmd)
559 {
560 struct mlx5e_priv *priv = netdev_priv(netdev);
561 struct mlx5_core_dev *mdev = priv->mdev;
562 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
563 u32 eth_proto_cap;
564 u32 eth_proto_admin;
565 u32 eth_proto_lp;
566 u32 eth_proto_oper;
567 int err;
568
569 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
570
571 if (err) {
572 netdev_err(netdev, "%s: query port ptys failed: %d\n",
573 __func__, err);
574 goto err_query_ptys;
575 }
576
577 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
578 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
579 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
580 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
581
582 cmd->supported = 0;
583 cmd->advertising = 0;
584
585 get_supported(eth_proto_cap, &cmd->supported);
586 get_advertising(eth_proto_admin, 0, 0, &cmd->advertising);
587 get_speed_duplex(netdev, eth_proto_oper, cmd);
588
589 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
590
591 cmd->port = get_connector_port(eth_proto_oper);
592 get_lp_advertising(eth_proto_lp, &cmd->lp_advertising);
593
594 cmd->transceiver = XCVR_INTERNAL;
595
596 err_query_ptys:
597 return err;
598 }
599
600 static u32 mlx5e_ethtool2ptys_adver_link(u32 link_modes)
601 {
602 u32 i, ptys_modes = 0;
603
604 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
605 if (ptys2ethtool_table[i].advertised & link_modes)
606 ptys_modes |= MLX5E_PROT_MASK(i);
607 }
608
609 return ptys_modes;
610 }
611
612 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
613 {
614 u32 i, speed_links = 0;
615
616 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
617 if (ptys2ethtool_table[i].speed == speed)
618 speed_links |= MLX5E_PROT_MASK(i);
619 }
620
621 return speed_links;
622 }
623
624 static int mlx5e_set_settings(struct net_device *netdev,
625 struct ethtool_cmd *cmd)
626 {
627 struct mlx5e_priv *priv = netdev_priv(netdev);
628 struct mlx5_core_dev *mdev = priv->mdev;
629 u32 link_modes;
630 u32 speed;
631 u32 eth_proto_cap, eth_proto_admin;
632 enum mlx5_port_status ps;
633 int err;
634
635 speed = ethtool_cmd_speed(cmd);
636
637 link_modes = cmd->autoneg == AUTONEG_ENABLE ?
638 mlx5e_ethtool2ptys_adver_link(cmd->advertising) :
639 mlx5e_ethtool2ptys_speed_link(speed);
640
641 err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
642 if (err) {
643 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
644 __func__, err);
645 goto out;
646 }
647
648 link_modes = link_modes & eth_proto_cap;
649 if (!link_modes) {
650 netdev_err(netdev, "%s: Not supported link mode(s) requested",
651 __func__);
652 err = -EINVAL;
653 goto out;
654 }
655
656 err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
657 if (err) {
658 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
659 __func__, err);
660 goto out;
661 }
662
663 if (link_modes == eth_proto_admin)
664 goto out;
665
666 mlx5_query_port_admin_status(mdev, &ps);
667 if (ps == MLX5_PORT_UP)
668 mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);
669 mlx5_set_port_proto(mdev, link_modes, MLX5_PTYS_EN);
670 if (ps == MLX5_PORT_UP)
671 mlx5_set_port_admin_status(mdev, MLX5_PORT_UP);
672
673 out:
674 return err;
675 }
676
677 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
678 {
679 struct mlx5e_priv *priv = netdev_priv(netdev);
680
681 return sizeof(priv->params.toeplitz_hash_key);
682 }
683
684 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
685 {
686 return MLX5E_INDIR_RQT_SIZE;
687 }
688
689 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
690 u8 *hfunc)
691 {
692 struct mlx5e_priv *priv = netdev_priv(netdev);
693
694 if (indir)
695 memcpy(indir, priv->params.indirection_rqt,
696 sizeof(priv->params.indirection_rqt));
697
698 if (key)
699 memcpy(key, priv->params.toeplitz_hash_key,
700 sizeof(priv->params.toeplitz_hash_key));
701
702 if (hfunc)
703 *hfunc = priv->params.rss_hfunc;
704
705 return 0;
706 }
707
708 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
709 {
710 struct mlx5_core_dev *mdev = priv->mdev;
711 void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
712 int i;
713
714 MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
715 mlx5e_build_tir_ctx_hash(tirc, priv);
716
717 for (i = 0; i < MLX5E_NUM_TT; i++)
718 if (IS_HASHING_TT(i))
719 mlx5_core_modify_tir(mdev, priv->tirn[i], in, inlen);
720 }
721
722 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
723 const u8 *key, const u8 hfunc)
724 {
725 struct mlx5e_priv *priv = netdev_priv(dev);
726 int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
727 void *in;
728
729 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
730 (hfunc != ETH_RSS_HASH_XOR) &&
731 (hfunc != ETH_RSS_HASH_TOP))
732 return -EINVAL;
733
734 in = mlx5_vzalloc(inlen);
735 if (!in)
736 return -ENOMEM;
737
738 mutex_lock(&priv->state_lock);
739
740 if (indir) {
741 memcpy(priv->params.indirection_rqt, indir,
742 sizeof(priv->params.indirection_rqt));
743 mlx5e_redirect_rqt(priv, MLX5E_INDIRECTION_RQT);
744 }
745
746 if (key)
747 memcpy(priv->params.toeplitz_hash_key, key,
748 sizeof(priv->params.toeplitz_hash_key));
749
750 if (hfunc != ETH_RSS_HASH_NO_CHANGE)
751 priv->params.rss_hfunc = hfunc;
752
753 mlx5e_modify_tirs_hash(priv, in, inlen);
754
755 mutex_unlock(&priv->state_lock);
756
757 kvfree(in);
758
759 return 0;
760 }
761
762 static int mlx5e_get_rxnfc(struct net_device *netdev,
763 struct ethtool_rxnfc *info, u32 *rule_locs)
764 {
765 struct mlx5e_priv *priv = netdev_priv(netdev);
766 int err = 0;
767
768 switch (info->cmd) {
769 case ETHTOOL_GRXRINGS:
770 info->data = priv->params.num_channels;
771 break;
772 default:
773 err = -EOPNOTSUPP;
774 break;
775 }
776
777 return err;
778 }
779
780 static int mlx5e_get_tunable(struct net_device *dev,
781 const struct ethtool_tunable *tuna,
782 void *data)
783 {
784 const struct mlx5e_priv *priv = netdev_priv(dev);
785 int err = 0;
786
787 switch (tuna->id) {
788 case ETHTOOL_TX_COPYBREAK:
789 *(u32 *)data = priv->params.tx_max_inline;
790 break;
791 default:
792 err = -EINVAL;
793 break;
794 }
795
796 return err;
797 }
798
799 static int mlx5e_set_tunable(struct net_device *dev,
800 const struct ethtool_tunable *tuna,
801 const void *data)
802 {
803 struct mlx5e_priv *priv = netdev_priv(dev);
804 struct mlx5_core_dev *mdev = priv->mdev;
805 bool was_opened;
806 u32 val;
807 int err = 0;
808
809 switch (tuna->id) {
810 case ETHTOOL_TX_COPYBREAK:
811 val = *(u32 *)data;
812 if (val > mlx5e_get_max_inline_cap(mdev)) {
813 err = -EINVAL;
814 break;
815 }
816
817 mutex_lock(&priv->state_lock);
818
819 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
820 if (was_opened)
821 mlx5e_close_locked(dev);
822
823 priv->params.tx_max_inline = val;
824
825 if (was_opened)
826 err = mlx5e_open_locked(dev);
827
828 mutex_unlock(&priv->state_lock);
829 break;
830 default:
831 err = -EINVAL;
832 break;
833 }
834
835 return err;
836 }
837
838 static void mlx5e_get_pauseparam(struct net_device *netdev,
839 struct ethtool_pauseparam *pauseparam)
840 {
841 struct mlx5e_priv *priv = netdev_priv(netdev);
842 struct mlx5_core_dev *mdev = priv->mdev;
843 int err;
844
845 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
846 &pauseparam->tx_pause);
847 if (err) {
848 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
849 __func__, err);
850 }
851 }
852
853 static int mlx5e_set_pauseparam(struct net_device *netdev,
854 struct ethtool_pauseparam *pauseparam)
855 {
856 struct mlx5e_priv *priv = netdev_priv(netdev);
857 struct mlx5_core_dev *mdev = priv->mdev;
858 int err;
859
860 if (pauseparam->autoneg)
861 return -EINVAL;
862
863 err = mlx5_set_port_pause(mdev,
864 pauseparam->rx_pause ? 1 : 0,
865 pauseparam->tx_pause ? 1 : 0);
866 if (err) {
867 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
868 __func__, err);
869 }
870
871 return err;
872 }
873
874 static int mlx5e_get_ts_info(struct net_device *dev,
875 struct ethtool_ts_info *info)
876 {
877 struct mlx5e_priv *priv = netdev_priv(dev);
878 int ret;
879
880 ret = ethtool_op_get_ts_info(dev, info);
881 if (ret)
882 return ret;
883
884 info->phc_index = priv->tstamp.ptp ?
885 ptp_clock_index(priv->tstamp.ptp) : -1;
886
887 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
888 return 0;
889
890 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
891 SOF_TIMESTAMPING_RX_HARDWARE |
892 SOF_TIMESTAMPING_RAW_HARDWARE;
893
894 info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
895 (BIT(1) << HWTSTAMP_TX_ON);
896
897 info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
898 (BIT(1) << HWTSTAMP_FILTER_ALL);
899
900 return 0;
901 }
902
903 const struct ethtool_ops mlx5e_ethtool_ops = {
904 .get_drvinfo = mlx5e_get_drvinfo,
905 .get_link = ethtool_op_get_link,
906 .get_strings = mlx5e_get_strings,
907 .get_sset_count = mlx5e_get_sset_count,
908 .get_ethtool_stats = mlx5e_get_ethtool_stats,
909 .get_ringparam = mlx5e_get_ringparam,
910 .set_ringparam = mlx5e_set_ringparam,
911 .get_channels = mlx5e_get_channels,
912 .set_channels = mlx5e_set_channels,
913 .get_coalesce = mlx5e_get_coalesce,
914 .set_coalesce = mlx5e_set_coalesce,
915 .get_settings = mlx5e_get_settings,
916 .set_settings = mlx5e_set_settings,
917 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
918 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
919 .get_rxfh = mlx5e_get_rxfh,
920 .set_rxfh = mlx5e_set_rxfh,
921 .get_rxnfc = mlx5e_get_rxnfc,
922 .get_tunable = mlx5e_get_tunable,
923 .set_tunable = mlx5e_set_tunable,
924 .get_pauseparam = mlx5e_get_pauseparam,
925 .set_pauseparam = mlx5e_set_pauseparam,
926 .get_ts_info = mlx5e_get_ts_info,
927 };
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