drivers/net/ethernet/mellanox/mlx5/core/en_rx.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/ip.h>
  34 #include <linux/ipv6.h>
  35 #include <linux/tcp.h>
  36 #include <net/busy_poll.h>
  37 #include "en.h"
  38
  39 static inline bool mlx5e_rx_hw_stamp(struct mlx5e_tstamp *tstamp)
  40 {
  41         return tstamp->hwtstamp_config.rx_filter == HWTSTAMP_FILTER_ALL;
  42 }
  43
  44 static inline int mlx5e_alloc_rx_wqe(struct mlx5e_rq *rq,
  45                                      struct mlx5e_rx_wqe *wqe, u16 ix)
  46 {
  47         struct sk_buff *skb;
  48         dma_addr_t dma_addr;
  49
  50         skb = netdev_alloc_skb(rq->netdev, rq->wqe_sz);
  51         if (unlikely(!skb))
  52                 return -ENOMEM;
  53
  54         dma_addr = dma_map_single(rq->pdev,
  55                                   /* hw start padding */
  56                                   skb->data,
  57                                   /* hw end padding */
  58                                   rq->wqe_sz,
  59                                   DMA_FROM_DEVICE);
  60
  61         if (unlikely(dma_mapping_error(rq->pdev, dma_addr)))
  62                 goto err_free_skb;
  63
  64         skb_reserve(skb, MLX5E_NET_IP_ALIGN);
  65
  66         *((dma_addr_t *)skb->cb) = dma_addr;
  67         wqe->data.addr = cpu_to_be64(dma_addr + MLX5E_NET_IP_ALIGN);
  68
  69         rq->skb[ix] = skb;
  70
  71         return 0;
  72
  73 err_free_skb:
  74         dev_kfree_skb(skb);
  75
  76         return -ENOMEM;
  77 }
  78
  79 bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq)
  80 {
  81         struct mlx5_wq_ll *wq = &rq->wq;
  82
  83         if (unlikely(!test_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state)))
  84                 return false;
  85
  86         while (!mlx5_wq_ll_is_full(wq)) {
  87                 struct mlx5e_rx_wqe *wqe = mlx5_wq_ll_get_wqe(wq, wq->head);
  88
  89                 if (unlikely(mlx5e_alloc_rx_wqe(rq, wqe, wq->head)))
  90                         break;
  91
  92                 mlx5_wq_ll_push(wq, be16_to_cpu(wqe->next.next_wqe_index));
  93         }
  94
  95         /* ensure wqes are visible to device before updating doorbell record */
  96         dma_wmb();
  97
  98         mlx5_wq_ll_update_db_record(wq);
  99
 100         return !mlx5_wq_ll_is_full(wq);
 101 }
 102
 103 static void mlx5e_lro_update_hdr(struct sk_buff *skb, struct mlx5_cqe64 *cqe)
 104 {
 105         struct ethhdr   *eth    = (struct ethhdr *)(skb->data);
 106         struct iphdr    *ipv4   = (struct iphdr *)(skb->data + ETH_HLEN);
 107         struct ipv6hdr  *ipv6   = (struct ipv6hdr *)(skb->data + ETH_HLEN);
 108         struct tcphdr   *tcp;
 109
 110         u8 l4_hdr_type = get_cqe_l4_hdr_type(cqe);
 111         int tcp_ack = ((CQE_L4_HDR_TYPE_TCP_ACK_NO_DATA  == l4_hdr_type) ||
 112                        (CQE_L4_HDR_TYPE_TCP_ACK_AND_DATA == l4_hdr_type));
 113
 114         u16 tot_len = be32_to_cpu(cqe->byte_cnt) - ETH_HLEN;
 115
 116         if (eth->h_proto == htons(ETH_P_IP)) {
 117                 tcp = (struct tcphdr *)(skb->data + ETH_HLEN +
 118                                         sizeof(struct iphdr));
 119                 ipv6 = NULL;
 120                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
 121         } else {
 122                 tcp = (struct tcphdr *)(skb->data + ETH_HLEN +
 123                                         sizeof(struct ipv6hdr));
 124                 ipv4 = NULL;
 125                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
 126         }
 127
 128         if (get_cqe_lro_tcppsh(cqe))
 129                 tcp->psh                = 1;
 130
 131         if (tcp_ack) {
 132                 tcp->ack                = 1;
 133                 tcp->ack_seq            = cqe->lro_ack_seq_num;
 134                 tcp->window             = cqe->lro_tcp_win;
 135         }
 136
 137         if (ipv4) {
 138                 ipv4->ttl               = cqe->lro_min_ttl;
 139                 ipv4->tot_len           = cpu_to_be16(tot_len);
 140                 ipv4->check             = 0;
 141                 ipv4->check             = ip_fast_csum((unsigned char *)ipv4,
 142                                                        ipv4->ihl);
 143         } else {
 144                 ipv6->hop_limit         = cqe->lro_min_ttl;
 145                 ipv6->payload_len       = cpu_to_be16(tot_len -
 146                                                       sizeof(struct ipv6hdr));
 147         }
 148 }
 149
 150 static inline void mlx5e_skb_set_hash(struct mlx5_cqe64 *cqe,
 151                                       struct sk_buff *skb)
 152 {
 153         u8 cht = cqe->rss_hash_type;
 154         int ht = (cht & CQE_RSS_HTYPE_L4) ? PKT_HASH_TYPE_L4 :
 155                  (cht & CQE_RSS_HTYPE_IP) ? PKT_HASH_TYPE_L3 :
 156                                             PKT_HASH_TYPE_NONE;
 157         skb_set_hash(skb, be32_to_cpu(cqe->rss_hash_result), ht);
 158 }
 159
 160 static inline bool is_first_ethertype_ip(struct sk_buff *skb)
 161 {
 162         __be16 ethertype = ((struct ethhdr *)skb->data)->h_proto;
 163
 164         return (ethertype == htons(ETH_P_IP) || ethertype == htons(ETH_P_IPV6));
 165 }
 166
 167 static inline void mlx5e_handle_csum(struct net_device *netdev,
 168                                      struct mlx5_cqe64 *cqe,
 169                                      struct mlx5e_rq *rq,
 170                                      struct sk_buff *skb)
 171 {
 172         if (unlikely(!(netdev->features & NETIF_F_RXCSUM)))
 173                 goto csum_none;
 174
 175         if (likely(cqe->hds_ip_ext & CQE_L4_OK)) {
 176                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 177         } else if (is_first_ethertype_ip(skb)) {
 178                 skb->ip_summed = CHECKSUM_COMPLETE;
 179                 skb->csum = csum_unfold((__force __sum16)cqe->check_sum);
 180                 rq->stats.csum_sw++;
 181         } else {
 182                 goto csum_none;
 183         }
 184
 185         return;
 186
 187 csum_none:
 188         skb->ip_summed = CHECKSUM_NONE;
 189         rq->stats.csum_none++;
 190 }
 191
 192 static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,
 193                                       struct mlx5e_rq *rq,
 194                                       struct sk_buff *skb)
 195 {
 196         struct net_device *netdev = rq->netdev;
 197         u32 cqe_bcnt = be32_to_cpu(cqe->byte_cnt);
 198         struct mlx5e_tstamp *tstamp = rq->tstamp;
 199         int lro_num_seg;
 200
 201         skb_put(skb, cqe_bcnt);
 202
 203         lro_num_seg = be32_to_cpu(cqe->srqn) >> 24;
 204         if (lro_num_seg > 1) {
 205                 mlx5e_lro_update_hdr(skb, cqe);
 206                 skb_shinfo(skb)->gso_size = DIV_ROUND_UP(cqe_bcnt, lro_num_seg);
 207                 rq->stats.lro_packets++;
 208                 rq->stats.lro_bytes += cqe_bcnt;
 209         }
 210
 211         if (unlikely(mlx5e_rx_hw_stamp(tstamp)))
 212                 mlx5e_fill_hwstamp(tstamp, get_cqe_ts(cqe), skb_hwtstamps(skb));
 213
 214         mlx5e_handle_csum(netdev, cqe, rq, skb);
 215
 216         skb->protocol = eth_type_trans(skb, netdev);
 217
 218         skb_record_rx_queue(skb, rq->ix);
 219
 220         if (likely(netdev->features & NETIF_F_RXHASH))
 221                 mlx5e_skb_set_hash(cqe, skb);
 222
 223         if (cqe_has_vlan(cqe))
 224                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
 225                                        be16_to_cpu(cqe->vlan_info));
 226 }
 227
 228 int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget)
 229 {
 230         struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq);
 231         int work_done;
 232
 233         /* avoid accessing cq (dma coherent memory) if not needed */
 234         if (!test_and_clear_bit(MLX5E_CQ_HAS_CQES, &cq->flags))
 235                 return 0;
 236
 237         for (work_done = 0; work_done < budget; work_done++) {
 238                 struct mlx5e_rx_wqe *wqe;
 239                 struct mlx5_cqe64 *cqe;
 240                 struct sk_buff *skb;
 241                 __be16 wqe_counter_be;
 242                 u16 wqe_counter;
 243
 244                 cqe = mlx5e_get_cqe(cq);
 245                 if (!cqe)
 246                         break;
 247
 248                 mlx5_cqwq_pop(&cq->wq);
 249
 250                 wqe_counter_be = cqe->wqe_counter;
 251                 wqe_counter    = be16_to_cpu(wqe_counter_be);
 252                 wqe            = mlx5_wq_ll_get_wqe(&rq->wq, wqe_counter);
 253                 skb            = rq->skb[wqe_counter];
 254                 prefetch(skb->data);
 255                 rq->skb[wqe_counter] = NULL;
 256
 257                 dma_unmap_single(rq->pdev,
 258                                  *((dma_addr_t *)skb->cb),
 259                                  rq->wqe_sz,
 260                                  DMA_FROM_DEVICE);
 261
 262                 if (unlikely((cqe->op_own >> 4) != MLX5_CQE_RESP_SEND)) {
 263                         rq->stats.wqe_err++;
 264                         dev_kfree_skb(skb);
 265                         goto wq_ll_pop;
 266                 }
 267
 268                 mlx5e_build_rx_skb(cqe, rq, skb);
 269                 rq->stats.packets++;
 270                 napi_gro_receive(cq->napi, skb);
 271
 272 wq_ll_pop:
 273                 mlx5_wq_ll_pop(&rq->wq, wqe_counter_be,
 274                                &wqe->next.next_wqe_index);
 275         }
 276
 277         mlx5_cqwq_update_db_record(&cq->wq);
 278
 279         /* ensure cq space is freed before enabling more cqes */
 280         wmb();
 281
 282         if (work_done == budget)
 283                 set_bit(MLX5E_CQ_HAS_CQES, &cq->flags);
 284
 285         return work_done;
 286 }