drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h

   1 /*
   2  * Copyright (c) 2013-2015, Mellanox Technologies, Ltd.  All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #ifndef __MLX5_CORE_H__
  34 #define __MLX5_CORE_H__
  35
  36 #include <linux/types.h>
  37 #include <linux/kernel.h>
  38 #include <linux/sched.h>
  39 #include <linux/if_link.h>
  40
  41 #define DRIVER_NAME "mlx5_core"
  42 #define DRIVER_VERSION "3.0-1"
  43 #define DRIVER_RELDATE  "January 2015"
  44
  45 #define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev))
  46
  47 extern int mlx5_core_debug_mask;
  48
  49 #define mlx5_core_dbg(__dev, format, ...)                               \
  50         dev_dbg(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format,      \
  51                  (__dev)->priv.name, __func__, __LINE__, current->pid,  \
  52                  ##__VA_ARGS__)
  53
  54 #define mlx5_core_dbg_mask(__dev, mask, format, ...)                    \
  55 do {                                                                    \
  56         if ((mask) & mlx5_core_debug_mask)                              \
  57                 mlx5_core_dbg(__dev, format, ##__VA_ARGS__);            \
  58 } while (0)
  59
  60 #define mlx5_core_err(__dev, format, ...)                               \
  61         dev_err(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
  62                 __func__, __LINE__, current->pid,       \
  63                ##__VA_ARGS__)
  64
  65 #define mlx5_core_warn(__dev, format, ...)                              \
  66         dev_warn(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format,     \
  67                 (__dev)->priv.name, __func__, __LINE__, current->pid,   \
  68                 ##__VA_ARGS__)
  69
  70 #define mlx5_core_info(__dev, format, ...)                              \
  71         dev_info(&(__dev)->pdev->dev, format, ##__VA_ARGS__)
  72
  73 enum {
  74         MLX5_CMD_DATA, /* print command payload only */
  75         MLX5_CMD_TIME, /* print command execution time */
  76 };
  77
  78 int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
  79 int mlx5_query_board_id(struct mlx5_core_dev *dev);
  80 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
  81 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
  82 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
  83                      unsigned long param);
  84 void mlx5_enter_error_state(struct mlx5_core_dev *dev);
  85 void mlx5_disable_device(struct mlx5_core_dev *dev);
  86 int mlx5_sriov_init(struct mlx5_core_dev *dev);
  87 void mlx5_sriov_cleanup(struct mlx5_core_dev *dev);
  88 int mlx5_sriov_attach(struct mlx5_core_dev *dev);
  89 void mlx5_sriov_detach(struct mlx5_core_dev *dev);
  90 int mlx5_core_sriov_configure(struct pci_dev *dev, int num_vfs);
  91 bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev);
  92 int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
  93 int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
  94 int mlx5_wait_for_vf_pages(struct mlx5_core_dev *dev);
  95 cycle_t mlx5_read_internal_timer(struct mlx5_core_dev *dev);
  96 u32 mlx5_get_msix_vec(struct mlx5_core_dev *dev, int vecidx);
  97 struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);
  98 void mlx5_cq_tasklet_cb(unsigned long data);
  99
 100 void mlx5_lag_add(struct mlx5_core_dev *dev, struct net_device *netdev);
 101 void mlx5_lag_remove(struct mlx5_core_dev *dev);
 102
 103 void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
 104 void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
 105 void mlx5_attach_device(struct mlx5_core_dev *dev);
 106 void mlx5_detach_device(struct mlx5_core_dev *dev);
 107 bool mlx5_device_registered(struct mlx5_core_dev *dev);
 108 int mlx5_register_device(struct mlx5_core_dev *dev);
 109 void mlx5_unregister_device(struct mlx5_core_dev *dev);
 110 void mlx5_add_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
 111 void mlx5_remove_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
 112 struct mlx5_core_dev *mlx5_get_next_phys_dev(struct mlx5_core_dev *dev);
 113 void mlx5_dev_list_lock(void);
 114 void mlx5_dev_list_unlock(void);
 115 int mlx5_dev_list_trylock(void);
 116
 117 bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv);
 118
 119 void mlx5e_init(void);
 120 void mlx5e_cleanup(void);
 121
 122 static inline int mlx5_lag_is_lacp_owner(struct mlx5_core_dev *dev)
 123 {
 124         /* LACP owner conditions:
 125          * 1) Function is physical.
 126          * 2) LAG is supported by FW.
 127          * 3) LAG is managed by driver (currently the only option).
 128          */
 129         return  MLX5_CAP_GEN(dev, vport_group_manager) &&
 130                    (MLX5_CAP_GEN(dev, num_lag_ports) > 1) &&
 131                     MLX5_CAP_GEN(dev, lag_master);
 132 }
 133
 134 #endif /* __MLX5_CORE_H__ */